Analog signal pre-processing for the Fermilab Main Injector BPM upgrade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saewert, A.L.; Rapisarda, S.M.; Wendt, M.

2006-05-01

An analog signal pre-processing scheme was developed, in the framework of the Fermilab Main Injector Beam Position Monitor (BPM) Upgrade, to interface BPM pickup signals to the new digital receiver based read-out system. A key component is the 8-channel electronics module, which uses separate frequency selective gain stages to acquire 53 MHz bunched proton, and 2.5 MHz anti-proton signals. Related hardware includes a filter and combiner box to sum pickup electrode signals in the tunnel. A controller module allows local/remote control of gain settings and activation of gain stages, and supplies test signals. Theory of operation, system overview, and somemore » design details are presented, as well as first beam measurements of the prototype hardware.« less

Hardware implementation of fuzzy Petri net as a controller.

PubMed

Gniewek, Lesław; Kluska, Jacek

2004-06-01

The paper presents a new approach to fuzzy Petri net (FPN) and its hardware implementation. The authors' motivation is as follows. Complex industrial processes can be often decomposed into many parallelly working subprocesses, which can, in turn, be modeled using Petri nets. If all the process variables (or events) are assumed to be two-valued signals, then it is possible to obtain a hardware or software control device, which works according to the algorithm described by conventional Petri net. However, the values of real signals are contained in some bounded interval and can be interpreted as events which are not only true or false, but rather true in some degree from the interval [0, 1]. Such a natural interpretation from multivalued logic (fuzzy logic) point of view, concerns sensor outputs, control signals, time expiration, etc. It leads to the idea of FPN as a controller, which one can rather simply obtain, and which would be able to process both analog, and binary signals. In the paper both graphical, and algebraic representations of the proposed FPN are given. The conditions under which transitions can be fired are described. The algebraic description of the net and a theorem which enables computation of new marking in the net, based on current marking, are formulated. Hardware implementation of the FPN, which uses fuzzy JK flip-flops and fuzzy gates, are proposed. An example illustrating usefulness of the proposed FPN for control algorithm description and its synthesis as a controller device for the concrete production process are presented.

Digital CODEC for real-time processing of broadcast quality video signals at 1.8 bits/pixel

NASA Technical Reports Server (NTRS)

Shalkhauser, Mary JO; Whyte, Wayne A., Jr.

1989-01-01

Advances in very large-scale integration and recent work in the field of bandwidth efficient digital modulation techniques have combined to make digital video processing technically feasible and potentially cost competitive for broadcast quality television transmission. A hardware implementation was developed for a DPCM-based digital television bandwidth compression algorithm which processes standard NTSC composite color television signals and produces broadcast quality video in real time at an average of 1.8 bits/pixel. The data compression algorithm and the hardware implementation of the CODEC are described, and performance results are provided.

Digital CODEC for real-time processing of broadcast quality video signals at 1.8 bits/pixel

NASA Technical Reports Server (NTRS)

Shalkhauser, Mary JO; Whyte, Wayne A.

1991-01-01

Advances in very large scale integration and recent work in the field of bandwidth efficient digital modulation techniques have combined to make digital video processing technically feasible an potentially cost competitive for broadcast quality television transmission. A hardware implementation was developed for DPCM (differential pulse code midulation)-based digital television bandwidth compression algorithm which processes standard NTSC composite color television signals and produces broadcast quality video in real time at an average of 1.8 bits/pixel. The data compression algorithm and the hardware implementation of the codec are described, and performance results are provided.

Real Time Phase Noise Meter Based on a Digital Signal Processor

NASA Technical Reports Server (NTRS)

Angrisani, Leopoldo; D'Arco, Mauro; Greenhall, Charles A.; Schiano Lo Morille, Rosario

2006-01-01

A digital signal-processing meter for phase noise measurement on sinusoidal signals is dealt with. It enlists a special hardware architecture, made up of a core digital signal processor connected to a data acquisition board, and takes advantage of a quadrature demodulation-based measurement scheme, already proposed by the authors. Thanks to an efficient measurement process and an optimized implementation of its fundamental stages, the proposed meter succeeds in exploiting all hardware resources in such an effective way as to gain high performance and real-time operation. For input frequencies up to some hundreds of kilohertz, the meter is capable both of updating phase noise power spectrum while seamlessly capturing the analyzed signal into its memory, and granting as good frequency resolution as few units of hertz.

Launching GUPPI: the Green Bank Ultimate Pulsar Processing Instrument

NASA Astrophysics Data System (ADS)

DuPlain, Ron; Ransom, Scott; Demorest, Paul; Brandt, Patrick; Ford, John; Shelton, Amy L.

2008-08-01

The National Radio Astronomy Observatory (NRAO) is launching the Green Bank Ultimate Pulsar Processing Instrument (GUPPI), a prototype flexible digital signal processor designed for pulsar observations with the Robert C. Byrd Green Bank Telescope (GBT). GUPPI uses field programmable gate array (FPGA) hardware and design tools developed by the Center for Astronomy Signal Processing and Electronics Research (CASPER) at the University of California, Berkeley. The NRAO has been concurrently developing GUPPI software and hardware using minimal software resources. The software handles instrument monitor and control, data acquisition, and hardware interfacing. GUPPI is currently an expert-only spectrometer, but supports future integration with the full GBT production system. The NRAO was able to take advantage of the unique flexibility of the CASPER FPGA hardware platform, develop hardware and software in parallel, and build a suite of software tools for monitoring, controlling, and acquiring data with a new instrument over a short timeline of just a few months. The NRAO interacts regularly with CASPER and its users, and GUPPI stands as an example of what reconfigurable computing and open-source development can do for radio astronomy. GUPPI is modular for portability, and the NRAO provides the results of development as an open-source resource.

Adaptive signal processing at NOSC

NASA Astrophysics Data System (ADS)

Albert, T. R.

1992-03-01

Adaptive signal processing work at the Naval Ocean Systems Center (NOSC) dates back to the late 1960s. It began as an IR/IED project by John McCool, who made use of an adaptive algorithm that had been developed by Professor Bernard Widrow of Stanford University. In 1972, a team lead by McCool built the first hardware implementation of the algorithm that could process in real-time at acoustic bandwidths. Early tests with the two units that were built were extremely successful, and attracted much attention. Sponsors from different commands provided funding to develop hardware for submarine, surface ship, airborne, and other systems. In addition, an effort was initiated to analyze performance and behavior of the algorithm. Most of the hardware development and analysis efforts were active through the 1970s, and a few into the 1980s. One of the original programs continues to this date.

An Open-Source Hardware and Software System for Acquisition and Real-Time Processing of Electrophysiology during High Field MRI

PubMed Central

Purdon, Patrick L.; Millan, Hernan; Fuller, Peter L.; Bonmassar, Giorgio

2008-01-01

Simultaneous recording of electrophysiology and functional magnetic resonance imaging (fMRI) is a technique of growing importance in neuroscience. Rapidly evolving clinical and scientific requirements have created a need for hardware and software that can be customized for specific applications. Hardware may require customization to enable a variety of recording types (e.g., electroencephalogram, local field potentials, or multi-unit activity) while meeting the stringent and costly requirements of MRI safety and compatibility. Real-time signal processing tools are an enabling technology for studies of learning, attention, sleep, epilepsy, neurofeedback, and neuropharmacology, yet real-time signal processing tools are difficult to develop. We describe an open source system for simultaneous electrophysiology and fMRI featuring low-noise (< 0.6 uV p-p input noise), electromagnetic compatibility for MRI (tested up to 7 Tesla), and user-programmable real-time signal processing. The hardware distribution provides the complete specifications required to build an MRI-compatible electrophysiological data acquisition system, including circuit schematics, print circuit board (PCB) layouts, Gerber files for PCB fabrication and robotic assembly, a bill of materials with part numbers, data sheets, and vendor information, and test procedures. The software facilitates rapid implementation of real-time signal processing algorithms. This system has used in human EEG/fMRI studies at 3 and 7 Tesla examining the auditory system, visual system, sleep physiology, and anesthesia, as well as in intracranial electrophysiological studies of the non-human primate visual system during 3 Tesla fMRI, and in human hyperbaric physiology studies at depths of up to 300 feet below sea level. PMID:18761038

An open-source hardware and software system for acquisition and real-time processing of electrophysiology during high field MRI.

PubMed

Purdon, Patrick L; Millan, Hernan; Fuller, Peter L; Bonmassar, Giorgio

2008-11-15

Simultaneous recording of electrophysiology and functional magnetic resonance imaging (fMRI) is a technique of growing importance in neuroscience. Rapidly evolving clinical and scientific requirements have created a need for hardware and software that can be customized for specific applications. Hardware may require customization to enable a variety of recording types (e.g., electroencephalogram, local field potentials, or multi-unit activity) while meeting the stringent and costly requirements of MRI safety and compatibility. Real-time signal processing tools are an enabling technology for studies of learning, attention, sleep, epilepsy, neurofeedback, and neuropharmacology, yet real-time signal processing tools are difficult to develop. We describe an open-source system for simultaneous electrophysiology and fMRI featuring low-noise (<0.6microV p-p input noise), electromagnetic compatibility for MRI (tested up to 7T), and user-programmable real-time signal processing. The hardware distribution provides the complete specifications required to build an MRI-compatible electrophysiological data acquisition system, including circuit schematics, print circuit board (PCB) layouts, Gerber files for PCB fabrication and robotic assembly, a bill of materials with part numbers, data sheets, and vendor information, and test procedures. The software facilitates rapid implementation of real-time signal processing algorithms. This system has been used in human EEG/fMRI studies at 3 and 7T examining the auditory system, visual system, sleep physiology, and anesthesia, as well as in intracranial electrophysiological studies of the non-human primate visual system during 3T fMRI, and in human hyperbaric physiology studies at depths of up to 300 feet below sea level.

Description, characteristics and testing of the NASA airborne radar

NASA Technical Reports Server (NTRS)

Jones, W. R.; Altiz, O.; Schaffner, P.; Schrader, J. H.; Blume, H. J. C.

1991-01-01

Presented here is a description of a coherent radar scattermeter and its associated signal processing hardware, which have been specifically designed to detect microbursts and record their radar characteristics. Radar parameters, signal processing techniques and detection algorithms, all under computer control, combine to sense and process reflectivity, clutter, and microburst data. Also presented is the system's high density, high data rate recording system. This digital system is capable of recording many minutes of the in-phase and quadrature components and corresponding receiver gains of the scattered returns for selected spatial regions, as well as other aircraft and hardware related parameters of interest for post-flight analysis. Information is given in viewgraph form.

Experiments with Sensor Motes and Java-DSP

ERIC Educational Resources Information Center

Kwon, Homin; Berisha, V.; Atti, V.; Spanias, A.

2009-01-01

Distributed wireless sensor networks (WSNs) are being proposed for various applications including defense, security, and smart stages. The introduction of hardware wireless sensors in a signal processing education setting can serve as a paradigm for data acquisition, collaborative signal processing, or simply as a platform for obtaining,…

Integrated Data and Control Level Fault Tolerance Techniques for Signal Processing Computer Design

DTIC Science & Technology

1990-09-01

TOLERANCE TECHNIQUES FOR SIGNAL PROCESSING COMPUTER DESIGN G. Robert Redinbo I. INTRODUCTION High-speed signal processing is an important application of...techniques and mathematical approaches will be expanded later to the situation where hardware errors and roundoff and quantization noise affect all...detect errors equal in number to the degree of g(X), the maximum permitted by the Singleton bound [13]. Real cyclic codes, primarily applicable to

Ultra-low-power and robust digital-signal-processing hardware for implantable neural interface microsystems.

PubMed

Narasimhan, S; Chiel, H J; Bhunia, S

2011-04-01

Implantable microsystems for monitoring or manipulating brain activity typically require on-chip real-time processing of multichannel neural data using ultra low-power, miniaturized electronics. In this paper, we propose an integrated-circuit/architecture-level hardware design framework for neural signal processing that exploits the nature of the signal-processing algorithm. First, we consider different power reduction techniques and compare the energy efficiency between the ultra-low frequency subthreshold and conventional superthreshold design. We show that the superthreshold design operating at a much higher frequency can achieve comparable energy dissipation by taking advantage of extensive power gating. It also provides significantly higher robustness of operation and yield under large process variations. Next, we propose an architecture level preferential design approach for further energy reduction by isolating the critical computation blocks (with respect to the quality of the output signal) and assigning them higher delay margins compared to the noncritical ones. Possible delay failures under parameter variations are confined to the noncritical components, allowing graceful degradation in quality under voltage scaling. Simulation results using prerecorded neural data from the sea-slug (Aplysia californica) show that the application of the proposed design approach can lead to significant improvement in total energy, without compromising the output signal quality under process variations, compared to conventional design approaches.

Event and Pulse Node Hardware Design for Nuclear Fusion Experiments

NASA Astrophysics Data System (ADS)

Fortunato, J. C.; Batista, A.; Sousa, J.; Fernandes, H.; Varandas, C. A. F.

2008-04-01

This article presents an event and pulse node hardware module (EPN) developed for use in control and data acquisition (CODAC) in current and upcoming long discharges nuclear fusion experiments. Its purpose is to allow real time event management and trigger distribution. The use of a mixture of digital signal processing and field programmable gate arrays, with fiber optic channels for event broadcast between CODAC nodes, and short length paths between the EPN and CODAC hardware, allows an effective and low latency communication path. This hardware will be integrated in the ISTTOK CODAC to allow long AC plasma discharges.

A Systematic Software, Firmware, and Hardware Codesign Methodology for Digital Signal Processing

DTIC Science & Technology

2014-03-01

possible mappings ...................................................60 Table 25. Possible optimal leaf -nodes... size weight and power UAV unmanned aerial vehicle UHF ultra-high frequency UML universal modeling language Verilog verify logic VHDL VHSIC...optimal leaf -nodes to some design patterns for embedded system design. Software and hardware partitioning is a very difficult challenge in the field of

Hardware for dynamic quantum computing.

PubMed

Ryan, Colm A; Johnson, Blake R; Ristè, Diego; Donovan, Brian; Ohki, Thomas A

2017-10-01

We describe the hardware, gateware, and software developed at Raytheon BBN Technologies for dynamic quantum information processing experiments on superconducting qubits. In dynamic experiments, real-time qubit state information is fed back or fed forward within a fraction of the qubits' coherence time to dynamically change the implemented sequence. The hardware presented here covers both control and readout of superconducting qubits. For readout, we created a custom signal processing gateware and software stack on commercial hardware to convert pulses in a heterodyne receiver into qubit state assignments with minimal latency, alongside data taking capability. For control, we developed custom hardware with gateware and software for pulse sequencing and steering information distribution that is capable of arbitrary control flow in a fraction of superconducting qubit coherence times. Both readout and control platforms make extensive use of field programmable gate arrays to enable tailored qubit control systems in a reconfigurable fabric suitable for iterative development.

Radiation effects in reconfigurable FPGAs

NASA Astrophysics Data System (ADS)

Quinn, Heather

2017-04-01

Field-programmable gate arrays (FPGAs) are co-processing hardware used in image and signal processing. FPGA are programmed with custom implementations of an algorithm. These algorithms are highly parallel hardware designs that are faster than software implementations. This flexibility and speed has made FPGAs attractive for many space programs that need in situ, high-speed signal processing for data categorization and data compression. Most commercial FPGAs are affected by the space radiation environment, though. Problems with TID has restricted the use of flash-based FPGAs. Static random access memory based FPGAs must be mitigated to suppress errors from single-event upsets. This paper provides a review of radiation effects issues in reconfigurable FPGAs and discusses methods for mitigating these problems. With careful design it is possible to use these components effectively and resiliently.

Rapid prototyping of update algorithm of discrete Fourier transform for real-time signal processing

NASA Astrophysics Data System (ADS)

Kakad, Yogendra P.; Sherlock, Barry G.; Chatapuram, Krishnan V.; Bishop, Stephen

2001-10-01

An algorithm is developed in the companion paper, to update the existing DFT to represent the new data series that results when a new signal point is received. Updating the DFT in this way uses less computation than directly evaluating the DFT using the FFT algorithm, This reduces the computational order by a factor of log2 N. The algorithm is able to work in the presence of data window function, for use with rectangular window, the split triangular, Hanning, Hamming, and Blackman windows. In this paper, a hardware implementation of this algorithm, using FPGA technology, is outlined. Unlike traditional fully customized VLSI circuits, FPGAs represent a technical break through in the corresponding industry. The FPGA implements thousands of gates of logic in a single IC chip and it can be programmed by users at their site in a few seconds or less depending on the type of device used. The risk is low and the development time is short. The advantages have made FPGAs very popular for rapid prototyping of algorithms in the area of digital communication, digital signal processing, and image processing. Our paper addresses the related issues of implementation using hardware descriptive language in the development of the design and the subsequent downloading on the programmable hardware chip.

Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator

DOEpatents

Asaad, Sameth W.; Kapur, Mohit

2016-01-05

A method, system and computer program product are disclosed for generating clock signals for a cycle accurate FPGA based hardware accelerator used to simulate operations of a device-under-test (DUT). In one embodiment, the DUT includes multiple device clocks generating multiple device clock signals at multiple frequencies and at a defined frequency ratio; and the FPG hardware accelerator includes multiple accelerator clocks generating multiple accelerator clock signals to operate the FPGA hardware accelerator to simulate the operations of the DUT. In one embodiment, operations of the DUT are mapped to the FPGA hardware accelerator, and the accelerator clock signals are generated at multiple frequencies and at the defined frequency ratio of the frequencies of the multiple device clocks, to maintain cycle accuracy between the DUT and the FPGA hardware accelerator. In an embodiment, the FPGA hardware accelerator may be used to control the frequencies of the multiple device clocks.

An all digital low data rate communication system

NASA Technical Reports Server (NTRS)

Chen, C.-H.; Fan, M.

1973-01-01

The advent of digital hardwares has made it feasible to implement many communication system components digitally. With the exception of frequency down conversion, the proposed low data rate communication system uses digital hardware completely. Although the system is designed primarily for deep space communications with large frequency uncertainty and low signal-to-noise ratio, it is also suitable for other low data rate applications with time-shared operation among a number of channels. Emphasis is placed on the fast Fourier transform receiver and the automatic frequency control via digital filtering. The speed available from the digital system allows sophisticated signal processing to reduce frequency uncertainty and to increase the signal-to-noise ratio.

An integrated framework for high level design of high performance signal processing circuits on FPGAs

NASA Astrophysics Data System (ADS)

Benkrid, K.; Belkacemi, S.; Sukhsawas, S.

2005-06-01

This paper proposes an integrated framework for the high level design of high performance signal processing algorithms' implementations on FPGAs. The framework emerged from a constant need to rapidly implement increasingly complicated algorithms on FPGAs while maintaining the high performance needed in many real time digital signal processing applications. This is particularly important for application developers who often rely on iterative and interactive development methodologies. The central idea behind the proposed framework is to dynamically integrate high performance structural hardware description languages with higher level hardware languages in other to help satisfy the dual requirement of high level design and high performance implementation. The paper illustrates this by integrating two environments: Celoxica's Handel-C language, and HIDE, a structural hardware environment developed at the Queen's University of Belfast. On the one hand, Handel-C has been proven to be very useful in the rapid design and prototyping of FPGA circuits, especially control intensive ones. On the other hand, HIDE, has been used extensively, and successfully, in the generation of highly optimised parameterisable FPGA cores. In this paper, this is illustrated in the construction of a scalable and fully parameterisable core for image algebra's five core neighbourhood operations, where fully floorplanned efficient FPGA configurations, in the form of EDIF netlists, are generated automatically for instances of the core. In the proposed combined framework, highly optimised data paths are invoked dynamically from within Handel-C, and are synthesized using HIDE. Although the idea might seem simple prima facie, it could have serious implications on the design of future generations of hardware description languages.

Software-Reconfigurable Processors for Spacecraft

NASA Technical Reports Server (NTRS)

Farrington, Allen; Gray, Andrew; Bell, Bryan; Stanton, Valerie; Chong, Yong; Peters, Kenneth; Lee, Clement; Srinivasan, Jeffrey

2005-01-01

A report presents an overview of an architecture for a software-reconfigurable network data processor for a spacecraft engaged in scientific exploration. When executed on suitable electronic hardware, the software performs the functions of a physical layer (in effect, acts as a software radio in that it performs modulation, demodulation, pulse-shaping, error correction, coding, and decoding), a data-link layer, a network layer, a transport layer, and application-layer processing of scientific data. The software-reconfigurable network processor is undergoing development to enable rapid prototyping and rapid implementation of communication, navigation, and scientific signal-processing functions; to provide a long-lived communication infrastructure; and to provide greatly improved scientific-instrumentation and scientific-data-processing functions by enabling science-driven in-flight reconfiguration of computing resources devoted to these functions. This development is an extension of terrestrial radio and network developments (e.g., in the cellular-telephone industry) implemented in software running on such hardware as field-programmable gate arrays, digital signal processors, traditional digital circuits, and mixed-signal application-specific integrated circuits (ASICs).

Instrumentation & Data Acquisition System (D AS) Engineer

NASA Technical Reports Server (NTRS)

Jackson, Markus Deon

2015-01-01

The primary job of an Instrumentation and Data Acquisition System (DAS) Engineer is to properly measure physical phenomenon of hardware using appropriate instrumentation and DAS equipment designed to record data during a specified test of the hardware. A DAS system includes a CPU or processor, a data storage device such as a hard drive, a data communication bus such as Universal Serial Bus, software to control the DAS system processes like calibrations, recording of data and processing of data. It also includes signal conditioning amplifiers, and certain sensors for specified measurements. My internship responsibilities have included testing and adjusting Pacific Instruments Model 9355 signal conditioning amplifiers, writing and performing checkout procedures, writing and performing calibration procedures while learning the basics of instrumentation.

Parallel implementation of all-digital timing recovery for high-speed and real-time optical coherent receivers.

PubMed

Zhou, Xian; Chen, Xue

2011-05-09

The digital coherent receivers combine coherent detection with digital signal processing (DSP) to compensate for transmission impairments, and therefore are a promising candidate for future high-speed optical transmission system. However, the maximum symbol rate supported by such real-time receivers is limited by the processing rate of hardware. In order to cope with this difficulty, the parallel processing algorithms is imperative. In this paper, we propose a novel parallel digital timing recovery loop (PDTRL) based on our previous work. Furthermore, for increasing the dynamic dispersion tolerance range of receivers, we embed a parallel adaptive equalizer in the PDTRL. This parallel joint scheme (PJS) can be used to complete synchronization, equalization and polarization de-multiplexing simultaneously. Finally, we demonstrate that PDTRL and PJS allow the hardware to process 112 Gbit/s POLMUX-DQPSK signal at the hundreds MHz range. © 2011 Optical Society of America

Bistatic SAR: Signal Processing and Image Formation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wahl, Daniel E.; Yocky, David A.

This report describes the significant processing steps that were used to take the raw recorded digitized signals from the bistatic synthetic aperture RADAR (SAR) hardware built for the NCNS Bistatic SAR project to a final bistatic SAR image. In general, the process steps herein are applicable to bistatic SAR signals that include the direct-path signal and the reflected signal. The steps include preprocessing steps, data extraction to for a phase history, and finally, image format. Various plots and values will be shown at most steps to illustrate the processing for a bistatic COSMO SkyMed collection gathered on June 10, 2013more » on Kirtland Air Force Base, New Mexico.« less

A research of a high precision multichannel data acquisition system

NASA Astrophysics Data System (ADS)

Zhong, Ling-na; Tang, Xiao-ping; Yan, Wei

2013-08-01

The output signals of the focusing system in lithography are analog. To convert the analog signals into digital ones which are more flexible and stable to process, a desirable data acquisition system is required. The resolution of data acquisition, to some extent, affects the accuracy of focusing. In this article, we first compared performance between the various kinds of analog-to-digital converters (ADC) available on the market at the moment. Combined with the specific requirements (sampling frequency, converting accuracy, numbers of channels etc) and the characteristics (polarization, amplitude range etc) of the analog signals, the model of the ADC to be used as the core chip in our hardware design was determined. On this basis, we chose other chips needed in the hardware circuit that would well match with ADC, then the overall hardware design was obtained. Validation of our data acquisition system was verified through experiments and it can be demonstrated that the system can effectively realize the high resolution conversion of the multi-channel analog signals and give the accurate focusing information in lithography.

Preliminary development of digital signal processing in microwave radiometers

NASA Technical Reports Server (NTRS)

Stanley, W. D.

1980-01-01

Topics covered involve a number of closely related tasks including: the development of several control loop and dynamic noise model computer programs for simulating microwave radiometer measurements; computer modeling of an existing stepped frequency radiometer in an effort to determine its optimum operational characteristics; investigation of the classical second order analog control loop to determine its ability to reduce the estimation error in a microwave radiometer; investigation of several digital signal processing unit designs; initiation of efforts to develop required hardware and software for implementation of the digital signal processing unit; and investigation of the general characteristics and peculiarities of digital processing noiselike microwave radiometer signals.

Independent component analysis algorithm FPGA design to perform real-time blind source separation

NASA Astrophysics Data System (ADS)

Meyer-Baese, Uwe; Odom, Crispin; Botella, Guillermo; Meyer-Baese, Anke

2015-05-01

The conditions that arise in the Cocktail Party Problem prevail across many fields creating a need for of Blind Source Separation. The need for BSS has become prevalent in several fields of work. These fields include array processing, communications, medical signal processing, and speech processing, wireless communication, audio, acoustics and biomedical engineering. The concept of the cocktail party problem and BSS led to the development of Independent Component Analysis (ICA) algorithms. ICA proves useful for applications needing real time signal processing. The goal of this research was to perform an extensive study on ability and efficiency of Independent Component Analysis algorithms to perform blind source separation on mixed signals in software and implementation in hardware with a Field Programmable Gate Array (FPGA). The Algebraic ICA (A-ICA), Fast ICA, and Equivariant Adaptive Separation via Independence (EASI) ICA were examined and compared. The best algorithm required the least complexity and fewest resources while effectively separating mixed sources. The best algorithm was the EASI algorithm. The EASI ICA was implemented on hardware with Field Programmable Gate Arrays (FPGA) to perform and analyze its performance in real time.

Obstacle Avoidance and Target Acquisition for Robot Navigation Using a Mixed Signal Analog/Digital Neuromorphic Processing System

PubMed Central

Milde, Moritz B.; Blum, Hermann; Dietmüller, Alexander; Sumislawska, Dora; Conradt, Jörg; Indiveri, Giacomo; Sandamirskaya, Yulia

2017-01-01

Neuromorphic hardware emulates dynamics of biological neural networks in electronic circuits offering an alternative to the von Neumann computing architecture that is low-power, inherently parallel, and event-driven. This hardware allows to implement neural-network based robotic controllers in an energy-efficient way with low latency, but requires solving the problem of device variability, characteristic for analog electronic circuits. In this work, we interfaced a mixed-signal analog-digital neuromorphic processor ROLLS to a neuromorphic dynamic vision sensor (DVS) mounted on a robotic vehicle and developed an autonomous neuromorphic agent that is able to perform neurally inspired obstacle-avoidance and target acquisition. We developed a neural network architecture that can cope with device variability and verified its robustness in different environmental situations, e.g., moving obstacles, moving target, clutter, and poor light conditions. We demonstrate how this network, combined with the properties of the DVS, allows the robot to avoid obstacles using a simple biologically-inspired dynamics. We also show how a Dynamic Neural Field for target acquisition can be implemented in spiking neuromorphic hardware. This work demonstrates an implementation of working obstacle avoidance and target acquisition using mixed signal analog/digital neuromorphic hardware. PMID:28747883

Obstacle Avoidance and Target Acquisition for Robot Navigation Using a Mixed Signal Analog/Digital Neuromorphic Processing System.

PubMed

Milde, Moritz B; Blum, Hermann; Dietmüller, Alexander; Sumislawska, Dora; Conradt, Jörg; Indiveri, Giacomo; Sandamirskaya, Yulia

2017-01-01

Neuromorphic hardware emulates dynamics of biological neural networks in electronic circuits offering an alternative to the von Neumann computing architecture that is low-power, inherently parallel, and event-driven. This hardware allows to implement neural-network based robotic controllers in an energy-efficient way with low latency, but requires solving the problem of device variability, characteristic for analog electronic circuits. In this work, we interfaced a mixed-signal analog-digital neuromorphic processor ROLLS to a neuromorphic dynamic vision sensor (DVS) mounted on a robotic vehicle and developed an autonomous neuromorphic agent that is able to perform neurally inspired obstacle-avoidance and target acquisition. We developed a neural network architecture that can cope with device variability and verified its robustness in different environmental situations, e.g., moving obstacles, moving target, clutter, and poor light conditions. We demonstrate how this network, combined with the properties of the DVS, allows the robot to avoid obstacles using a simple biologically-inspired dynamics. We also show how a Dynamic Neural Field for target acquisition can be implemented in spiking neuromorphic hardware. This work demonstrates an implementation of working obstacle avoidance and target acquisition using mixed signal analog/digital neuromorphic hardware.

A new fast and fully automated software based algorithm for extracting respiratory signal from raw PET data and its comparison to other methods.

PubMed

Kesner, Adam Leon; Kuntner, Claudia

2010-10-01

Respiratory gating in PET is an approach used to minimize the negative effects of respiratory motion on spatial resolution. It is based on an initial determination of a patient's respiratory movements during a scan, typically using hardware based systems. In recent years, several fully automated databased algorithms have been presented for extracting a respiratory signal directly from PET data, providing a very practical strategy for implementing gating in the clinic. In this work, a new method is presented for extracting a respiratory signal from raw PET sinogram data and compared to previously presented automated techniques. The acquisition of respiratory signal from PET data in the newly proposed method is based on rebinning the sinogram data into smaller data structures and then analyzing the time activity behavior in the elements of these structures. From this analysis, a 1D respiratory trace is produced, analogous to a hardware derived respiratory trace. To assess the accuracy of this fully automated method, respiratory signal was extracted from a collection of 22 clinical FDG-PET scans using this method, and compared to signal derived from several other software based methods as well as a signal derived from a hardware system. The method presented required approximately 9 min of processing time for each 10 min scan (using a single 2.67 GHz processor), which in theory can be accomplished while the scan is being acquired and therefore allowing a real-time respiratory signal acquisition. Using the mean correlation between the software based and hardware based respiratory traces, the optimal parameters were determined for the presented algorithm. The mean/median/range of correlations for the set of scans when using the optimal parameters was found to be 0.58/0.68/0.07-0.86. The speed of this method was within the range of real-time while the accuracy surpassed the most accurate of the previously presented algorithms. PET data inherently contains information about patient motion; information that is not currently being utilized. We have shown that a respiratory signal can be extracted from raw PET data in potentially real-time and in a fully automated manner. This signal correlates well with hardware based signal for a large percentage of scans, and avoids the efforts and complications associated with hardware. The proposed method to extract a respiratory signal can be implemented on existing scanners and, if properly integrated, can be applied without changes to routine clinical procedures.

The design and implementation of signal decomposition system of CL multi-wavelet transform based on DSP builder

NASA Astrophysics Data System (ADS)

Huang, Yan; Wang, Zhihui

2015-12-01

With the development of FPGA, DSP Builder is widely applied to design system-level algorithms. The algorithm of CL multi-wavelet is more advanced and effective than scalar wavelets in processing signal decomposition. Thus, a system of CL multi-wavelet based on DSP Builder is designed for the first time in this paper. The system mainly contains three parts: a pre-filtering subsystem, a one-level decomposition subsystem and a two-level decomposition subsystem. It can be converted into hardware language VHDL by the Signal Complier block that can be used in Quartus II. After analyzing the energy indicator, it shows that this system outperforms Daubenchies wavelet in signal decomposition. Furthermore, it has proved to be suitable for the implementation of signal fusion based on SoPC hardware, and it will become a solid foundation in this new field.

Stream computing for biomedical signal processing: A QRS complex detection case-study.

PubMed

Murphy, B M; O'Driscoll, C; Boylan, G B; Lightbody, G; Marnane, W P

2015-01-01

Recent developments in "Big Data" have brought significant gains in the ability to process large amounts of data on commodity server hardware. Stream computing is a relatively new paradigm in this area, addressing the need to process data in real time with very low latency. While this approach has been developed for dealing with large scale data from the world of business, security and finance, there is a natural overlap with clinical needs for physiological signal processing. In this work we present a case study of streams processing applied to a typical physiological signal processing problem: QRS detection from ECG data.

Real Time Implementation of an LPC Algorithm. Speech Signal Processing Research at CHI

DTIC Science & Technology

1975-05-01

SIGNAL PROCESSING HARDWARE 2-1 2.1 INTRODUCTION 2-1 2.2 TWO- CHANNEL AUDIO SIGNAL SYSTEM 2-2 2.3 MULTI- CHANNEL AUDIO SIGNAL SYSTEM 2-5 2.3.1... Channel Audio Signal System 2-30 I ii kv^i^ünt«.jfc*. ji .„* ,:-v*. ’.ii. *.. ...... — ■ -,,.,-c-» —ipponp ■^ TOHaBWgBpwiBWgPlpaiPWgW v.«.wN...Messages .... 1-55 1-13. Lost or Out of Order Message 1-56 2-1. Block Diagram of Two- Channel Audio Signal System . . 2-3 2-2. Block Diagram of Audio

Current trends in hardware and software for brain-computer interfaces (BCIs)

NASA Astrophysics Data System (ADS)

Brunner, P.; Bianchi, L.; Guger, C.; Cincotti, F.; Schalk, G.

2011-04-01

A brain-computer interface (BCI) provides a non-muscular communication channel to people with and without disabilities. BCI devices consist of hardware and software. BCI hardware records signals from the brain, either invasively or non-invasively, using a series of device components. BCI software then translates these signals into device output commands and provides feedback. One may categorize different types of BCI applications into the following four categories: basic research, clinical/translational research, consumer products, and emerging applications. These four categories use BCI hardware and software, but have different sets of requirements. For example, while basic research needs to explore a wide range of system configurations, and thus requires a wide range of hardware and software capabilities, applications in the other three categories may be designed for relatively narrow purposes and thus may only need a very limited subset of capabilities. This paper summarizes technical aspects for each of these four categories of BCI applications. The results indicate that BCI technology is in transition from isolated demonstrations to systematic research and commercial development. This process requires several multidisciplinary efforts, including the development of better integrated and more robust BCI hardware and software, the definition of standardized interfaces, and the development of certification, dissemination and reimbursement procedures.

Field programmable gate array processing of eye-safe all-fiber coherent wind Doppler lidar return signals

NASA Astrophysics Data System (ADS)

Abdelazim, S.; Santoro, D.; Arend, M.; Moshary, F.; Ahmed, S.

2011-11-01

A field deployable all-fiber eye-safe Coherent Doppler LIDAR is being developed at the Optical Remote Sensing Lab at the City College of New York (CCNY) and is designed to monitor wind fields autonomously and continuously in urban settings. Data acquisition is accomplished by sampling lidar return signals at 400 MHz and performing onboard processing using field programmable gate arrays (FPGAs). The FPGA is programmed to accumulate signal information that is used to calculate the power spectrum of the atmospherically back scattered signal. The advantage of using FPGA is that signal processing will be performed at the hardware level, reducing the load on the host computer and allowing for 100% return signal processing. An experimental setup measured wind speeds at ranges of up to 3 km.

Algorithm for Aligning an Array of Receiving Radio Antennas

NASA Technical Reports Server (NTRS)

Rogstad, David

2006-01-01

A digital-signal-processing algorithm (somewhat arbitrarily) called SUMPLE has been devised as a means of aligning the outputs of multiple receiving radio antennas in a large array for the purpose of receiving a weak signal transmitted by a single distant source. As used here, aligning signifies adjusting the delays and phases of the outputs from the various antennas so that their relatively weak replicas of the desired signal can be added coherently to increase the signal-to-noise ratio (SNR) for improved reception, as though one had a single larger antenna. The method was devised to enhance spacecraft-tracking and telemetry operations in NASA's Deep Space Network (DSN); the method could also be useful in such other applications as both satellite and terrestrial radio communications and radio astronomy. Heretofore, most commonly, alignment has been effected by a process that involves correlation of signals in pairs. This approach necessitates the use of a large amount of hardware most notably, the N(N - 1)/2 correlators needed to process signals from all possible pairs of N antennas. Moreover, because the incoming signals typically have low SNRs, the delay and phase adjustments are poorly determined from the pairwise correlations. SUMPLE also involves correlations, but the correlations are not performed in pairs. Instead, in a partly iterative process, each signal is appropriately weighted and then correlated with a composite signal equal to the sum of the other signals (see Figure 1). One benefit of this approach is that only N correlators are needed; in an array of N much greater than 1 antennas, this results in a significant reduction of the amount of hardware. Another benefit is that once the array achieves coherence, the correlation SNR is N - 1 times that of a pair of antennas.

Superconducting Optoelectronic Circuits for Neuromorphic Computing

NASA Astrophysics Data System (ADS)

Shainline, Jeffrey M.; Buckley, Sonia M.; Mirin, Richard P.; Nam, Sae Woo

2017-03-01

Neural networks have proven effective for solving many difficult computational problems, yet implementing complex neural networks in software is computationally expensive. To explore the limits of information processing, it is necessary to implement new hardware platforms with large numbers of neurons, each with a large number of connections to other neurons. Here we propose a hybrid semiconductor-superconductor hardware platform for the implementation of neural networks and large-scale neuromorphic computing. The platform combines semiconducting few-photon light-emitting diodes with superconducting-nanowire single-photon detectors to behave as spiking neurons. These processing units are connected via a network of optical waveguides, and variable weights of connection can be implemented using several approaches. The use of light as a signaling mechanism overcomes fanout and parasitic constraints on electrical signals while simultaneously introducing physical degrees of freedom which can be employed for computation. The use of supercurrents achieves the low power density (1 mW /cm2 at 20-MHz firing rate) necessary to scale to systems with enormous entropy. Estimates comparing the proposed hardware platform to a human brain show that with the same number of neurons (1 011) and 700 independent connections per neuron, the hardware presented here may achieve an order of magnitude improvement in synaptic events per second per watt.

Pre-Hardware Optimization of Spacecraft Image Processing Algorithms and Hardware Implementation

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Petrick, David J.; Flatley, Thomas P.; Hestnes, Phyllis; Jentoft-Nilsen, Marit; Day, John H. (Technical Monitor)

2002-01-01

Spacecraft telemetry rates and telemetry product complexity have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image data processing and color picture generation application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The proposed solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms, and reconfigurable computing hardware (RC) technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processors (DSP). It has been shown that this approach can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft.

The design of an adaptive predictive coder using a single-chip digital signal processor

NASA Astrophysics Data System (ADS)

Randolph, M. A.

1985-01-01

A speech coding processor architecture design study has been performed in which Texas Instruments TMS32010 has been selected from among three commercially available digital signal processing integrated circuits and evaluated in an implementation study of real-time Adaptive Predictive Coding (APC). The TMS32010 has been compared with AR&T Bell Laboratories DSP I and Nippon Electric Co. PD7720 and was found to be most suitable for a single chip implementation of APC. A preliminary design system based on TMS32010 has been performed, and several of the hardware and software design issues are discussed. Particular attention was paid to the design of an external memory controller which permits rapid sequential access of external RAM. As a result, it has been determined that a compact hardware implementation of the APC algorithm is feasible based of the TSM32010. Originator-supplied keywords include: vocoders, speech compression, adaptive predictive coding, digital signal processing microcomputers, speech processor architectures, and special purpose processor.

A Real-Time Capable Software-Defined Receiver Using GPU for Adaptive Anti-Jam GPS Sensors

PubMed Central

Seo, Jiwon; Chen, Yu-Hsuan; De Lorenzo, David S.; Lo, Sherman; Enge, Per; Akos, Dennis; Lee, Jiyun

2011-01-01

Due to their weak received signal power, Global Positioning System (GPS) signals are vulnerable to radio frequency interference. Adaptive beam and null steering of the gain pattern of a GPS antenna array can significantly increase the resistance of GPS sensors to signal interference and jamming. Since adaptive array processing requires intensive computational power, beamsteering GPS receivers were usually implemented using hardware such as field-programmable gate arrays (FPGAs). However, a software implementation using general-purpose processors is much more desirable because of its flexibility and cost effectiveness. This paper presents a GPS software-defined radio (SDR) with adaptive beamsteering capability for anti-jam applications. The GPS SDR design is based on an optimized desktop parallel processing architecture using a quad-core Central Processing Unit (CPU) coupled with a new generation Graphics Processing Unit (GPU) having massively parallel processors. This GPS SDR demonstrates sufficient computational capability to support a four-element antenna array and future GPS L5 signal processing in real time. After providing the details of our design and optimization schemes for future GPU-based GPS SDR developments, the jamming resistance of our GPS SDR under synthetic wideband jamming is presented. Since the GPS SDR uses commercial-off-the-shelf hardware and processors, it can be easily adopted in civil GPS applications requiring anti-jam capabilities. PMID:22164116

A real-time capable software-defined receiver using GPU for adaptive anti-jam GPS sensors.

PubMed

Seo, Jiwon; Chen, Yu-Hsuan; De Lorenzo, David S; Lo, Sherman; Enge, Per; Akos, Dennis; Lee, Jiyun

2011-01-01

Due to their weak received signal power, Global Positioning System (GPS) signals are vulnerable to radio frequency interference. Adaptive beam and null steering of the gain pattern of a GPS antenna array can significantly increase the resistance of GPS sensors to signal interference and jamming. Since adaptive array processing requires intensive computational power, beamsteering GPS receivers were usually implemented using hardware such as field-programmable gate arrays (FPGAs). However, a software implementation using general-purpose processors is much more desirable because of its flexibility and cost effectiveness. This paper presents a GPS software-defined radio (SDR) with adaptive beamsteering capability for anti-jam applications. The GPS SDR design is based on an optimized desktop parallel processing architecture using a quad-core Central Processing Unit (CPU) coupled with a new generation Graphics Processing Unit (GPU) having massively parallel processors. This GPS SDR demonstrates sufficient computational capability to support a four-element antenna array and future GPS L5 signal processing in real time. After providing the details of our design and optimization schemes for future GPU-based GPS SDR developments, the jamming resistance of our GPS SDR under synthetic wideband jamming is presented. Since the GPS SDR uses commercial-off-the-shelf hardware and processors, it can be easily adopted in civil GPS applications requiring anti-jam capabilities.

Method to improve the blade tip-timing accuracy of fiber bundle sensor under varying tip clearance

NASA Astrophysics Data System (ADS)

Duan, Fajie; Zhang, Jilong; Jiang, Jiajia; Guo, Haotian; Ye, Dechao

2016-01-01

Blade vibration measurement based on the blade tip-timing method has become an industry-standard procedure. Fiber bundle sensors are widely used for tip-timing measurement. However, the variation of clearance between the sensor and the blade will bring a tip-timing error to fiber bundle sensors due to the change in signal amplitude. This article presents methods based on software and hardware to reduce the error caused by the tip clearance change. The software method utilizes both the rising and falling edges of the tip-timing signal to determine the blade arrival time, and a calibration process suitable for asymmetric tip-timing signals is presented. The hardware method uses an automatic gain control circuit to stabilize the signal amplitude. Experiments are conducted and the results prove that both methods can effectively reduce the impact of tip clearance variation on the blade tip-timing and improve the accuracy of measurements.

Fetal Electrocardiogram Extraction and Analysis Using Adaptive Noise Cancellation and Wavelet Transformation Techniques.

PubMed

Sutha, P; Jayanthi, V E

2017-12-08

Birth defect-related demise is mainly due to congenital heart defects. In the earlier stage of pregnancy, fetus problem can be identified by finding information about the fetus to avoid stillbirths. The gold standard used to monitor the health status of the fetus is by Cardiotachography(CTG), cannot be used for long durations and continuous monitoring. There is a need for continuous and long duration monitoring of fetal ECG signals to study the progressive health status of the fetus using portable devices. The non-invasive method of electrocardiogram recording is one of the best method used to diagnose fetal cardiac problem rather than the invasive methods.The monitoring of the fECG requires development of a miniaturized hardware and a efficient signal processing algorithms to extract the fECG embedded in the mother ECG. The paper discusses a prototype hardware developed to monitor and record the raw mother ECG signal containing the fECG and a signal processing algorithm to extract the fetal Electro Cardiogram signal. We have proposed two methods of signal processing, first is based on the Least Mean Square (LMS) Adaptive Noise Cancellation technique and the other method is based on the Wavelet Transformation technique. A prototype hardware was designed and developed to acquire the raw ECG signal containing the mother and fetal ECG and the signal processing techniques were used to eliminate the noises and extract the fetal ECG and the fetal Heart Rate Variability was studied. Both the methods were evaluated with the signal acquired from a fetal ECG simulator, from the Physionet database and that acquired from the subject. Both the methods are evaluated by finding heart rate and its variability, amplitude spectrum and mean value of extracted fetal ECG. Also the accuracy, sensitivity and positive predictive value are also determined for fetal QRS detection technique. In this paper adaptive filtering technique uses Sign-sign LMS algorithm and wavelet techniques with Daubechies wavelet, employed along with de noising techniques for the extraction of fetal Electrocardiogram.Both the methods are having good sensitivity and accuracy. In adaptive method the sensitivity is 96.83, accuracy 89.87, wavelet sensitivity is 95.97 and accuracy is 88.5. Additionally, time domain parameters from the plot of heart rate variability of mother and fetus are analyzed.

A Subsystem Test Bed for Chinese Spectral Radioheliograph

NASA Astrophysics Data System (ADS)

Zhao, An; Yan, Yihua; Wang, Wei

2014-11-01

The Chinese Spectral Radioheliograph is a solar dedicated radio interferometric array that will produce high spatial resolution, high temporal resolution, and high spectral resolution images of the Sun simultaneously in decimetre and centimetre wave range. Digital processing of intermediate frequency signal is an important part in a radio telescope. This paper describes a flexible and high-speed digital down conversion system for the CSRH by applying complex mixing, parallel filtering, and extracting algorithms to process IF signal at the time of being designed and incorporates canonic-signed digit coding and bit-plane method to improve program efficiency. The DDC system is intended to be a subsystem test bed for simulation and testing for CSRH. Software algorithms for simulation and hardware language algorithms based on FPGA are written which use less hardware resources and at the same time achieve high performances such as processing high-speed data flow (1 GHz) with 10 MHz spectral resolution. An experiment with the test bed is illustrated by using geostationary satellite data observed on March 20, 2014. Due to the easy alterability of the algorithms on FPGA, the data can be recomputed with different digital signal processing algorithms for selecting optimum algorithm.

Wireless Monitoring of the Height of Condensed Water in Steam Pipes

NASA Technical Reports Server (NTRS)

Lee, Hyeong Jae; Bar-Cohen, Yoseph; Lih, Shyh-Shiuh; Badescu, Mircea; Dingizian, Arsham; Takano, Nobuyuki; Blosiu, Julian O.

2014-01-01

A wireless health monitoring system has been developed for determining the height of water condensation in the steam pipes and the data acquisition is done remotely using a wireless network system. The developed system is designed to operate in the harsh environment encountered at manholes and the pipe high temperature of over 200 °C. The test method is an ultrasonic pulse-echo and the hardware includes a pulser, receiver and wireless modem for communication. Data acquisition and signal processing software were developed to determine the water height using adaptive signal processing and data communication that can be controlled while the hardware is installed in a manhole. A statistical decision-making tool is being developed based on the field test data to determine the height of in the condensed water under high noise conditions and other environmental factors.

A Software Defined Radio Based Airplane Communication Navigation Simulation System

NASA Astrophysics Data System (ADS)

He, L.; Zhong, H. T.; Song, D.

2018-01-01

Radio communication and navigation system plays important role in ensuring the safety of civil airplane in flight. Function and performance should be tested before these systems are installed on-board. Conventionally, a set of transmitter and receiver are needed for each system, thus all the equipment occupy a lot of space and are high cost. In this paper, software defined radio technology is applied to design a common hardware communication and navigation ground simulation system, which can host multiple airplane systems with different operating frequency, such as HF, VHF, VOR, ILS, ADF, etc. We use a broadband analog frontend hardware platform, universal software radio peripheral (USRP), to transmit/receive signal of different frequency band. Software is compiled by LabVIEW on computer, which interfaces with USRP through Ethernet, and is responsible for communication and navigation signal processing and system control. An integrated testing system is established to perform functional test and performance verification of the simulation signal, which demonstrate the feasibility of our design. The system is a low-cost and common hardware platform for multiple airplane systems, which provide helpful reference for integrated avionics design.

Microprocessor-based cardiotachometer

NASA Technical Reports Server (NTRS)

Crosier, W. G.; Donaldson, J. A.

1981-01-01

Instrument operates reliably even with stress-test electrocardiogram (ECG) signals subject to noise, baseline wandering, and amplitude change. It records heart rate from preamplified, single-lead ECG input signal and produces digital and analog heart-rate outputs which are fed elsewhere. Analog hardware processes ECG input signal, producing 10-ms pulse for each heartbeat. Microprocessor analyzes resulting pulse train, identifying irregular heartbeats and maintaining stable output during lead switching. Easily modified computer program provides analysis.

An open-loop system design for deep space signal processing applications

NASA Astrophysics Data System (ADS)

Tang, Jifei; Xia, Lanhua; Mahapatra, Rabi

2018-06-01

A novel open-loop system design with high performance is proposed for space positioning and navigation signal processing. Divided by functions, the system has four modules, bandwidth selectable data recorder, narrowband signal analyzer, time-delay difference of arrival estimator and ANFIS supplement processor. A hardware-software co-design approach is made to accelerate computing capability and improve system efficiency. Embedded with the proposed signal processing algorithms, the designed system is capable of handling tasks with high accuracy over long period of continuous measurements. The experiment results show the Doppler frequency tracking root mean square error during 3 h observation is 0.0128 Hz, while the TDOA residue analysis in correlation power spectrum is 0.1166 rad.

Design and Characterization of a Secure Automatic Dependent Surveillance-Broadcast Prototype

DTIC Science & Technology

2015-03-26

during the thesis process. Thank you to Mr. Dave Prentice of AFRL for providing the Aeroflex IFR 6000 baseband signals, upon which many design decisions...35 25 Example Aeroflex IFR 6000 signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 26...Global Positioning System HDL hardware description language I in-phase IFR Instrument Flight Rules IP Internet Protocol IP intellectual property IPSec

FPGA-based real-time swept-source OCT systems for B-scan live-streaming or volumetric imaging

NASA Astrophysics Data System (ADS)

Bandi, Vinzenz; Goette, Josef; Jacomet, Marcel; von Niederhäusern, Tim; Bachmann, Adrian H.; Duelk, Marcus

2013-03-01

We have developed a Swept-Source Optical Coherence Tomography (Ss-OCT) system with high-speed, real-time signal processing on a commercially available Data-Acquisition (DAQ) board with a Field-Programmable Gate Array (FPGA). The Ss-OCT system simultaneously acquires OCT and k-clock reference signals at 500MS/s. From the k-clock signal of each A-scan we extract a remap vector for the k-space linearization of the OCT signal. The linear but oversampled interpolation is followed by a 2048-point FFT, additional auxiliary computations, and a data transfer to a host computer for real-time, live-streaming of B-scan or volumetric C-scan OCT visualization. We achieve a 100 kHz A-scan rate by parallelization of our hardware algorithms, which run on standard and affordable, commercially available DAQ boards. Our main development tool for signal analysis as well as for hardware synthesis is MATLAB® with add-on toolboxes and 3rd-party tools.

Measuring the RC time constant with Arduino

NASA Astrophysics Data System (ADS)

Pereira, N. S. A.

2016-11-01

In this work we use the Arduino UNO R3 open source hardware platform to assemble an experimental apparatus for the measurement of the time constant of an RC circuit. With adequate programming, the Arduino is used as a signal generator, a data acquisition system and a basic signal visualisation tool. Theoretical calculations are compared with direct observations from an analogue oscilloscope. Data processing and curve fitting is performed on a spreadsheet. The results obtained for the six RC test circuits are within the expected interval of values defined by the tolerance of the components. The hardware and software prove to be adequate to the proposed measurements and therefore adaptable to a laboratorial teaching and learning context.

Development of a hardware-in-loop attitude control simulator for a CubeSat satellite

NASA Astrophysics Data System (ADS)

Tapsawat, Wittawat; Sangpet, Teerawat; Kuntanapreeda, Suwat

2018-01-01

Attitude control is an important part in satellite on-orbit operation. It greatly affects the performance of satellites. Testing of an attitude determination and control subsystem (ADCS) is very challenging since it might require attitude dynamics and space environment in the orbit. This paper develops a low-cost hardware-in-loop (HIL) simulator for testing an ADCS of a CubeSat satellite. The simulator consists of a numerical simulation part, a hardware part, and a HIL interface hardware unit. The numerical simulation part includes orbital dynamics, attitude dynamics and Earth’s magnetic field. The hardware part is the real ADCS board of the satellite. The simulation part outputs satellite’s angular velocity and geomagnetic field information to the HIL interface hardware. Then, based on this information, the HIL interface hardware generates I2C signals mimicking the signals of the on-board rate-gyros and magnetometers and consequently outputs the signals to the ADCS board. The ADCS board reads the rate-gyro and magnetometer signals, calculates control signals, and drives the attitude actuators which are three magnetic torquers (MTQs). The responses of the MTQs sensed by a separated magnetometer are feedback to the numerical simulation part completing the HIL simulation loop. Experimental studies are conducted to demonstrate the feasibility and effectiveness of the simulator.

Integrated control system environment for high-throughput tomography

NASA Astrophysics Data System (ADS)

Khokhriakov, Igor; Lottermoser, Lars; Beckmann, Felix

2017-10-01

The extensive progress in hardware in recent years makes it now possible to develop nearly real time control system for tomography experiments. Such system can perform all the routines that are necessary for the experiment and provide real time feedback to the user. This feedback can be used for instant monitoring and/or for real time reconstruction. The initial design and implementation of such system was presented in the SPIE publication in 2014 [1]. In this paper an update to the system is presented. The paper will cover the following 4 topics. The first topic simply gives an overview of the system. The second topic presents the way how we integrate different software components to achieve simplicity and flexibility. As it is still in research and design phase we need a possibility to easily adjust the system to our needs introducing new components or removing old ones. The third topic presents a hardware driven tomography experiment design implemented at one of our beamlines. The basic idea is that a hardware signal is sent to the instrument hardware (camera, shutter etc). This signal is emitted by the controller of the sample axis which defines the moment when the system is ready to capture the next image i.e. next rotation angle. Finally as our software is in a constant process of evaluation a continuous integration process was implemented to reduce the time cost of redeployment and configuration of new versions.

Integration of digital signal processing technologies with pulsed electron paramagnetic resonance imaging

PubMed Central

Pursley, Randall H.; Salem, Ghadi; Devasahayam, Nallathamby; Subramanian, Sankaran; Koscielniak, Janusz; Krishna, Murali C.; Pohida, Thomas J.

2006-01-01

The integration of modern data acquisition and digital signal processing (DSP) technologies with Fourier transform electron paramagnetic resonance (FT-EPR) imaging at radiofrequencies (RF) is described. The FT-EPR system operates at a Larmor frequency (Lf) of 300 MHz to facilitate in vivo studies. This relatively low frequency Lf, in conjunction with our ~10 MHz signal bandwidth, enables the use of direct free induction decay time-locked subsampling (TLSS). This particular technique provides advantages by eliminating the traditional analog intermediate frequency downconversion stage along with the corresponding noise sources. TLSS also results in manageable sample rates that facilitate the design of DSP-based data acquisition and image processing platforms. More specifically, we utilize a high-speed field programmable gate array (FPGA) and a DSP processor to perform advanced real-time signal and image processing. The migration to a DSP-based configuration offers the benefits of improved EPR system performance, as well as increased adaptability to various EPR system configurations (i.e., software configurable systems instead of hardware reconfigurations). The required modifications to the FT-EPR system design are described, with focus on the addition of DSP technologies including the application-specific hardware, software, and firmware developed for the FPGA and DSP processor. The first results of using real-time DSP technologies in conjunction with direct detection bandpass sampling to implement EPR imaging at RF frequencies are presented. PMID:16243552

Implantable electronics: emerging design issues and an ultra light-weight security solution.

PubMed

Narasimhan, Seetharam; Wang, Xinmu; Bhunia, Swarup

2010-01-01

Implantable systems that monitor biological signals require increasingly complex digital signal processing (DSP) electronics for real-time in-situ analysis and compression of the recorded signals. While it is well-known that such signal processing hardware needs to be implemented under tight area and power constraints, new design requirements emerge with their increasing complexity. Use of nanoscale technology shows tremendous benefits in implementing these advanced circuits due to dramatic improvement in integration density and power dissipation per operation. However, it also brings in new challenges such as reliability and large idle power (due to higher leakage current). Besides, programmability of the device as well as security of the recorded information are rapidly becoming major design considerations of such systems. In this paper, we analyze the emerging issues associated with the design of the DSP unit in an implantable system. Next, we propose a novel ultra light-weight solution to address the information security issue. Unlike the conventional information security approaches like data encryption, which come at large area and power overhead and hence are not amenable for resource-constrained implantable systems, we propose a multilevel key-based scrambling algorithm, which exploits the nature of the biological signal to effectively obfuscate it. Analysis of the proposed algorithm in the context of neural signal processing and its hardware implementation shows that we can achieve high level of security with ∼ 13X lower power and ∼ 5X lower area overhead than conventional cryptographic solutions.

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Kacpura, Thomas J.; Smith, Carl R.; Liebetreu, John; Hill, Gary; Mortensen, Dale J.; Andro, Monty; Scardelletti, Maximilian C.; Farrington, Allen

2008-01-01

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Digital codec for real-time processing of broadcast quality video signals at 1.8 bits/pixel

NASA Technical Reports Server (NTRS)

Shalkhauser, Mary JO; Whyte, Wayne A., Jr.

1989-01-01

The authors present the hardware implementation of a digital television bandwidth compression algorithm which processes standard NTSC (National Television Systems Committee) composite color television signals and produces broadcast-quality video in real time at an average of 1.8 b/pixel. The sampling rate used with this algorithm results in 768 samples over the active portion of each video line by 512 active video lines per video frame. The algorithm is based on differential pulse code modulation (DPCM), but additionally utilizes a nonadaptive predictor, nonuniform quantizer, and multilevel Huffman coder to reduce the data rate substantially below that achievable with straight DPCM. The nonadaptive predictor and multilevel Huffman coder combine to set this technique apart from prior-art DPCM encoding algorithms. The authors describe the data compression algorithm and the hardware implementation of the codec and provide performance results.

Robust real-time extraction of respiratory signals from PET list-mode data

NASA Astrophysics Data System (ADS)

Salomon, André; Zhang, Bin; Olivier, Patrick; Goedicke, Andreas

2018-06-01

Respiratory motion, which typically cannot simply be suspended during PET image acquisition, affects lesions’ detection and quantitative accuracy inside or in close vicinity to the lungs. Some motion compensation techniques address this issue via pre-sorting (‘binning’) of the acquired PET data into a set of temporal gates, where each gate is assumed to be minimally affected by respiratory motion. Tracking respiratory motion is typically realized using dedicated hardware (e.g. using respiratory belts and digital cameras). Extracting respiratory signals directly from the acquired PET data simplifies the clinical workflow as it avoids handling additional signal measurement equipment. We introduce a new data-driven method ‘combined local motion detection’ (CLMD). It uses the time-of-flight (TOF) information provided by state-of-the-art PET scanners in order to enable real-time respiratory signal extraction without additional hardware resources. CLMD applies center-of-mass detection in overlapping regions based on simple back-positioned TOF event sets acquired in short time frames. Following a signal filtering and quality-based pre-selection step, the remaining extracted individual position information over time is then combined to generate a global respiratory signal. The method is evaluated using seven measured FDG studies from single and multiple scan positions of the thorax region, and it is compared to other software-based methods regarding quantitative accuracy and statistical noise stability. Correlation coefficients around 90% between the reference and the extracted signal have been found for those PET scans where motion affected features such as tumors or hot regions were present in the PET field-of-view. For PET scans with a quarter of typically applied radiotracer doses, the CLMD method still provides similar high correlation coefficients which indicates its robustness to noise. Each CLMD processing needed less than 0.4 s in total on a standard multi-core CPU and thus provides a robust and accurate approach enabling real-time processing capabilities using standard PC hardware.

Code-modulated interferometric imaging system using phased arrays

NASA Astrophysics Data System (ADS)

Chauhan, Vikas; Greene, Kevin; Floyd, Brian

2016-05-01

Millimeter-wave (mm-wave) imaging provides compelling capabilities for security screening, navigation, and bio- medical applications. Traditional scanned or focal-plane mm-wave imagers are bulky and costly. In contrast, phased-array hardware developed for mass-market wireless communications and automotive radar promise to be extremely low cost. In this work, we present techniques which can allow low-cost phased-array receivers to be reconfigured or re-purposed as interferometric imagers, removing the need for custom hardware and thereby reducing cost. Since traditional phased arrays power combine incoming signals prior to digitization, orthogonal code-modulation is applied to each incoming signal using phase shifters within each front-end and two-bit codes. These code-modulated signals can then be combined and processed coherently through a shared hardware path. Once digitized, visibility functions can be recovered through squaring and code-demultiplexing operations. Pro- vided that codes are selected such that the product of two orthogonal codes is a third unique and orthogonal code, it is possible to demultiplex complex visibility functions directly. As such, the proposed system modulates incoming signals but demodulates desired correlations. In this work, we present the operation of the system, a validation of its operation using behavioral models of a traditional phased array, and a benchmarking of the code-modulated interferometer against traditional interferometer and focal-plane arrays.

A noninvasive technique for real-time detection of bruises in apple surface based on machine vision

NASA Astrophysics Data System (ADS)

Zhao, Juan; Peng, Yankun; Dhakal, Sagar; Zhang, Leilei; Sasao, Akira

2013-05-01

Apple is one of the highly consumed fruit item in daily life. However, due to its high damage potential and massive influence on taste and export, the quality of apple has to be detected before it reaches the consumer's hand. This study was aimed to develop a hardware and software unit for real-time detection of apple bruises based on machine vision technology. The hardware unit consisted of a light shield installed two monochrome cameras at different angles, LED light source to illuminate the sample, and sensors at the entrance of box to signal the positioning of sample. Graphical Users Interface (GUI) was developed in VS2010 platform to control the overall hardware and display the image processing result. The hardware-software system was developed to acquire the images of 3 samples from each camera and display the image processing result in real time basis. An image processing algorithm was developed in Opencv and C++ platform. The software is able to control the hardware system to classify the apple into two grades based on presence/absence of surface bruises with the size of 5mm. The experimental result is promising and the system with further modification can be applicable for industrial production in near future.

An analog neural hardware implementation using charge-injection multipliers and neutron-specific gain control.

PubMed

Massengill, L W; Mundie, D B

1992-01-01

A neural network IC based on a dynamic charge injection is described. The hardware design is space and power efficient, and achieves massive parallelism of analog inner products via charge-based multipliers and spatially distributed summing buses. Basic synaptic cells are constructed of exponential pulse-decay modulation (EPDM) dynamic injection multipliers operating sequentially on propagating signal vectors and locally stored analog weights. Individually adjustable gain controls on each neutron reduce the effects of limited weight dynamic range. A hardware simulator/trainer has been developed which incorporates the physical (nonideal) characteristics of actual circuit components into the training process, thus absorbing nonlinearities and parametric deviations into the macroscopic performance of the network. Results show that charge-based techniques may achieve a high degree of neural density and throughput using standard CMOS processes.

Reactor Operations Monitoring System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hart, M.M.

1989-01-01

The Reactor Operations Monitoring System (ROMS) is a VME based, parallel processor data acquisition and safety action system designed by the Equipment Engineering Section and Reactor Engineering Department of the Savannah River Site. The ROMS will be analyzing over 8 million signal samples per minute. Sixty-eight microprocessors are used in the ROMS in order to achieve a real-time data analysis. The ROMS is composed of multiple computer subsystems. Four redundant computer subsystems monitor 600 temperatures with 2400 thermocouples. Two computer subsystems share the monitoring of 600 reactor coolant flows. Additional computer subsystems are dedicated to monitoring 400 signals from assortedmore » process sensors. Data from these computer subsystems are transferred to two redundant process display computer subsystems which present process information to reactor operators and to reactor control computers. The ROMS is also designed to carry out safety functions based on its analysis of process data. The safety functions include initiating a reactor scram (shutdown), the injection of neutron poison, and the loadshed of selected equipment. A complete development Reactor Operations Monitoring System has been built. It is located in the Program Development Center at the Savannah River Site and is currently being used by the Reactor Engineering Department in software development. The Equipment Engineering Section is designing and fabricating the process interface hardware. Upon proof of hardware and design concept, orders will be placed for the final five systems located in the three reactor areas, the reactor training simulator, and the hardware maintenance center.« less

Packet communications in satellites with multiple-beam antennas and signal processing

NASA Technical Reports Server (NTRS)

Davies, R.; Chethik, F.; Penick, M.

1980-01-01

A communication satellite with a multiple-beam antenna and onboard signal processing is considered for use in a 'message-switched' data relay system. The signal processor may incorporate demodulation, routing, storage, and remodulation of the data. A system user model is established and key functional elements for the signal processing are identified. With the throughput and delay requirements as the controlled variables, the hardware complexity, operational discipline, occupied bandwidth, and overall user end-to-end cost are estimated for (1) random-access packet switching; and (2) reservation-access packet switching. Other aspects of this network (eg, the adaptability to channel switched traffic requirements) are examined. For the given requirements and constraints, the reservation system appears to be the most attractive protocol.

Quadrature demodulation based circuit implementation of pulse stream for ultrasonic signal FRI sparse sampling

NASA Astrophysics Data System (ADS)

Shoupeng, Song; Zhou, Jiang

2017-03-01

Converting ultrasonic signal to ultrasonic pulse stream is the key step of finite rate of innovation (FRI) sparse sampling. At present, ultrasonic pulse-stream-forming techniques are mainly based on digital algorithms. No hardware circuit that can achieve it has been reported. This paper proposes a new quadrature demodulation (QD) based circuit implementation method for forming an ultrasonic pulse stream. Elaborating on FRI sparse sampling theory, the process of ultrasonic signal is explained, followed by a discussion and analysis of ultrasonic pulse-stream-forming methods. In contrast to ultrasonic signal envelope extracting techniques, a quadrature demodulation method (QDM) is proposed. Simulation experiments were performed to determine its performance at various signal-to-noise ratios (SNRs). The circuit was then designed, with mixing module, oscillator, low pass filter (LPF), and root of square sum module. Finally, application experiments were carried out on pipeline sample ultrasonic flaw testing. The experimental results indicate that the QDM can accurately convert ultrasonic signal to ultrasonic pulse stream, and reverse the original signal information, such as pulse width, amplitude, and time of arrival. This technique lays the foundation for ultrasonic signal FRI sparse sampling directly with hardware circuitry.

Real-time automatic inspection under adverse conditions

NASA Astrophysics Data System (ADS)

Carvalho, Fernando D.; Correia, Fernando C.; Freitas, Jose C. A.; Rodrigues, Fernando C.

1991-03-01

This paper presents the results of a R&D Program supported by a grant from the Ministry of Defense, devoted to the development of an inteffigent camera for surveillance in the open air. The effects of shadows, clouds and winds were problems to be solved without generating false alarm events. The system is based on a video CCD camera which generates a video CCIR signal. The signal is then processed in modular hardware which detects the changes in the scene and processes the image, in order to enhance the intruder image and path. Windows may be defined over the image in order to increase the information obtained about the intruder and a first approach to the classification of the type of intruder may be achieved. The paper describes the hardware used in the system, as well as the software, used for the installation of the camera and the software developed for the microprocessor which is responsible for the generation of the alarm signals. The paper also presents some results of surveillance tasks in the open air executed by the system with real time performance.

Brain-Inspired Photonic Signal Processor for Generating Periodic Patterns and Emulating Chaotic Systems

NASA Astrophysics Data System (ADS)

Antonik, Piotr; Haelterman, Marc; Massar, Serge

2017-05-01

Reservoir computing is a bioinspired computing paradigm for processing time-dependent signals. Its hardware implementations have received much attention because of their simplicity and remarkable performance on a series of benchmark tasks. In previous experiments, the output was uncoupled from the system and, in most cases, simply computed off-line on a postprocessing computer. However, numerical investigations have shown that feeding the output back into the reservoir opens the possibility of long-horizon time-series forecasting. Here, we present a photonic reservoir computer with output feedback, and we demonstrate its capacity to generate periodic time series and to emulate chaotic systems. We study in detail the effect of experimental noise on system performance. In the case of chaotic systems, we introduce several metrics, based on standard signal-processing techniques, to evaluate the quality of the emulation. Our work significantly enlarges the range of tasks that can be solved by hardware reservoir computers and, therefore, the range of applications they could potentially tackle. It also raises interesting questions in nonlinear dynamics and chaos theory.

Extracting a respiratory signal from raw dynamic PET data that contain tracer kinetics.

PubMed

Schleyer, P J; Thielemans, K; Marsden, P K

2014-08-07

Data driven gating (DDG) methods provide an alternative to hardware based respiratory gating for PET imaging. Several existing DDG approaches obtain a respiratory signal by observing the change in PET-counts within specific regions of acquired PET data. Currently, these methods do not allow for tracer kinetics which can interfere with the respiratory signal and introduce error. In this work, we produced a DDG method for dynamic PET studies that exhibit tracer kinetics. Our method is based on an existing approach that uses frequency-domain analysis to locate regions within raw PET data that are subject to respiratory motion. In the new approach, an optimised non-stationary short-time Fourier transform was used to create a time-varying 4D map of motion affected regions. Additional processing was required to ensure that the relationship between the sign of the respiratory signal and the physical direction of movement remained consistent for each temporal segment of the 4D map. The change in PET-counts within the 4D map during the PET acquisition was then used to generate a respiratory curve. Using 26 min dynamic cardiac NH3 PET acquisitions which included a hardware derived respiratory measurement, we show that tracer kinetics can severely degrade the respiratory signal generated by the original DDG method. In some cases, the transition of tracer from the liver to the lungs caused the respiratory signal to invert. The new approach successfully compensated for tracer kinetics and improved the correlation between the data-driven and hardware based signals. On average, good correlation was maintained throughout the PET acquisitions.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mohamed Abdelrahman; roger Haggard; Wagdy Mahmoud

The final goal of this project was the development of a system that is capable of controlling an industrial process effectively through the integration of information obtained through intelligent sensor fusion and intelligent control technologies. The industry of interest in this project was the metal casting industry as represented by cupola iron-melting furnaces. However, the developed technology is of generic type and hence applicable to several other industries. The system was divided into the following four major interacting components: 1. An object oriented generic architecture to integrate the developed software and hardware components @. Generic algorithms for intelligent signal analysismore » and sensor and model fusion 3. Development of supervisory structure for integration of intelligent sensor fusion data into the controller 4. Hardware implementation of intelligent signal analysis and fusion algorithms« less

New data processing for multichannel FIR laser interferometer

NASA Astrophysics Data System (ADS)

Jun-Ben, Chen; Xiang, Gao

1989-10-01

Usually, both the probing and reference signals received by LATGS detectors of FIR interferometer pass through hardware phase discriminator and the output phase difference--hence the electron line densities is collected for analysis and display with a computerized data acquisition system(DAS). In this paper, a new numerical method for computing the phase difference in software has been developed instead of hardware phase discriminator, the temporal resolution and stability is improved. An asymmetrical Abel inversion is applied to processing the data from a seven-channel FIR HCN laser interferometer and the space-time distributions of plasma electron density in the HT-6M tokamak are derived.

CAVIAR: a 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing- learning-actuating system for high-speed visual object recognition and tracking.

PubMed

Serrano-Gotarredona, Rafael; Oster, Matthias; Lichtsteiner, Patrick; Linares-Barranco, Alejandro; Paz-Vicente, Rafael; Gomez-Rodriguez, Francisco; Camunas-Mesa, Luis; Berner, Raphael; Rivas-Perez, Manuel; Delbruck, Tobi; Liu, Shih-Chii; Douglas, Rodney; Hafliger, Philipp; Jimenez-Moreno, Gabriel; Civit Ballcels, Anton; Serrano-Gotarredona, Teresa; Acosta-Jimenez, Antonio J; Linares-Barranco, Bernabé

2009-09-01

This paper describes CAVIAR, a massively parallel hardware implementation of a spike-based sensing-processing-learning-actuating system inspired by the physiology of the nervous system. CAVIAR uses the asychronous address-event representation (AER) communication framework and was developed in the context of a European Union funded project. It has four custom mixed-signal AER chips, five custom digital AER interface components, 45k neurons (spiking cells), up to 5M synapses, performs 12G synaptic operations per second, and achieves millisecond object recognition and tracking latencies.

Gas Sensors Characterization and Multilayer Perceptron (MLP) Hardware Implementation for Gas Identification Using a Field Programmable Gate Array (FPGA)

PubMed Central

Benrekia, Fayçal; Attari, Mokhtar; Bouhedda, Mounir

2013-01-01

This paper develops a primitive gas recognition system for discriminating between industrial gas species. The system under investigation consists of an array of eight micro-hotplate-based SnO2 thin film gas sensors with different selectivity patterns. The output signals are processed through a signal conditioning and analyzing system. These signals feed a decision-making classifier, which is obtained via a Field Programmable Gate Array (FPGA) with Very High-Speed Integrated Circuit Hardware Description Language. The classifier relies on a multilayer neural network based on a back propagation algorithm with one hidden layer of four neurons and eight neurons at the input and five neurons at the output. The neural network designed after implementation consists of twenty thousand gates. The achieved experimental results seem to show the effectiveness of the proposed classifier, which can discriminate between five industrial gases. PMID:23529119

An all digital low data rate communication system

NASA Technical Reports Server (NTRS)

Chen, C.; Fan, M.

1973-01-01

The advent of digital hardwares has made it feasible to implement many communication system components digitally. With the exception of frequency down conversion, the proposed low data rate communication system uses digital hardwares completely. Although the system is designed primarily for deep space communications with large frequency uncertainty and low signal-to-noise ratio, it is also suitable for other low data rate applications with time-shared operation among a number of channels. Emphasis is placed on the fast Fourier transform receiver and the automatic frequency control via digital filtering. The speed available from the digital system allows sophisticated signal processing to reduce frequency uncertainty and to increase the signal-to-noise ratio. The practical limitations of the system such as the finite register length are examined. It is concluded that the proposed all-digital system is not only technically feasible but also has potential cost reduction over the existing receiving systems.

DHS Internship Paper

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dreyer, J

2007-09-18

During my internship at Lawrence Livermore National Laboratory I worked with microcalorimeter gamma-ray and fast-neutron detectors based on superconducting Transition Edge Sensors (TESs). These instruments are being developed for fundamental science and nuclear non-proliferation applications because of their extremely high energy resolution; however, this comes at the expense of a small pixel size and slow decay times. The small pixel sizes are being addressed by developing detector arrays while the low count rate is being addressed by developing Digital Signal Processors (DSPs) that allow higher throughput than traditional pulse processing algorithms. Traditionally, low-temperature microcalorimeter pulses have been processed off-line withmore » optimum filtering routines based on the measured spectral characteristics of the signal and the noise. These optimum filters rely on the spectral content of the signal being identical for all events, and therefore require capturing the entire pulse signal without pile-up. In contrast, the DSP algorithm being developed is based on differences in signal levels before and after a trigger event, and therefore does not require the waveform to fully decay, or even the signal level to be close to the base line. The readout system allows for real time data acquisition and analysis at count rates exceeding 100 Hz for pulses with several {approx}ms decay times with minimal loss of energy resolution. Originally developed for gamma-ray analysis with HPGe detectors we have modified the hardware and firmware of the system to accommodate the slower TES signals and optimized the parameters of the filtering algorithm to maximize either resolution or throughput. The following presents an overview of the digital signal processing hardware and discusses the results of characterization measurements made to determine the systems performance.« less

Use phase signals to promote lifetime extension for Windows PCs.

PubMed

Hickey, Stewart; Fitzpatrick, Colin; O'Connell, Maurice; Johnson, Michael

2009-04-01

This paper proposes a signaling methodology for personal computers. Signaling may be viewed as an ecodesign strategy that can positively influence the consumer to consumer (C2C) market process. A number of parameters are identified that can provide the basis for signal implementation. These include operating time, operating temperature, operating voltage, power cycle counts, hard disk drive (HDD) self-monitoring, and reporting technology (SMART) attributes and operating system (OS) event information. All these parameters are currently attainable or derivable via embedded technologies in modern desktop systems. A case study detailing a technical implementation of how the development of signals can be achieved in personal computers that incorporate Microsoft Windows operating systems is presented. Collation of lifetime temperature data from a system processor is demonstrated as a possible means of characterizing a usage profile for a desktop system. In addition, event log data is utilized for devising signals indicative of OS quality. The provision of lifetime usage data in the form of intuitive signals indicative of both hardware and software quality can in conjunction with consumer education facilitate an optimal remarketing strategy for used systems. This implementation requires no additional hardware.

Shuttle payload S-band communications study

NASA Technical Reports Server (NTRS)

Springett, J. C.

1979-01-01

The work to identify, evaluate, and make recommendations concerning the functions and interfaces of those orbiter avionic subsystems which are dedicated to, or play some part in, handling communication signals (telemetry and command) to/from payloads (spacecraft) that will be carried into orbit by the shuttle is reported. Some principal directions of the research are: (1) analysis of the ability of the various avionic equipment to interface with and appropriately process payload signals; (2) development of criteria which will foster equipment compatibility with diverse types of payloads and signals; (3) study of operational procedures, especially those affecting signal acquisition; (4) trade-off analysis for end-to-end data link performance optimization; (5) identification of possible hardware design weakness which might degrade signal processing performance.

Computer Music

NASA Astrophysics Data System (ADS)

Cook, Perry R.

This chapter covers algorithms, technologies, computer languages, and systems for computer music. Computer music involves the application of computers and other digital/electronic technologies to music composition, performance, theory, history, and the study of perception. The field combines digital signal processing, computational algorithms, computer languages, hardware and software systems, acoustics, psychoacoustics (low-level perception of sounds from the raw acoustic signal), and music cognition (higher-level perception of musical style, form, emotion, etc.).

An Analog Circuit Approximation of the Discrete Wavelet Transform for Ultra Low Power Signal Processing in Wearable Sensor Nodes

PubMed Central

Casson, Alexander J.

2015-01-01

Ultra low power signal processing is an essential part of all sensor nodes, and particularly so in emerging wearable sensors for biomedical applications. Analog signal processing has an important role in these low power, low voltage, low frequency applications, and there is a key drive to decrease the power consumption of existing analog domain signal processing and to map more signal processing approaches into the analog domain. This paper presents an analog domain signal processing circuit which approximates the output of the Discrete Wavelet Transform (DWT) for use in ultra low power wearable sensors. Analog filters are used for the DWT filters and it is demonstrated how these generate analog domain DWT-like information that embeds information from Butterworth and Daubechies maximally flat mother wavelet responses. The Analog DWT is realised in hardware via gmC circuits, designed to operate from a 1.3 V coin cell battery, and provide DWT-like signal processing using under 115 nW of power when implemented in a 0.18 μm CMOS process. Practical examples demonstrate the effective use of the new Analog DWT on ECG (electrocardiogram) and EEG (electroencephalogram) signals recorded from humans. PMID:26694414

An Analog Circuit Approximation of the Discrete Wavelet Transform for Ultra Low Power Signal Processing in Wearable Sensor Nodes.

PubMed

Casson, Alexander J

2015-12-17

Ultra low power signal processing is an essential part of all sensor nodes, and particularly so in emerging wearable sensors for biomedical applications. Analog signal processing has an important role in these low power, low voltage, low frequency applications, and there is a key drive to decrease the power consumption of existing analog domain signal processing and to map more signal processing approaches into the analog domain. This paper presents an analog domain signal processing circuit which approximates the output of the Discrete Wavelet Transform (DWT) for use in ultra low power wearable sensors. Analog filters are used for the DWT filters and it is demonstrated how these generate analog domain DWT-like information that embeds information from Butterworth and Daubechies maximally flat mother wavelet responses. The Analog DWT is realised in hardware via g(m)C circuits, designed to operate from a 1.3 V coin cell battery, and provide DWT-like signal processing using under 115 nW of power when implemented in a 0.18 μm CMOS process. Practical examples demonstrate the effective use of the new Analog DWT on ECG (electrocardiogram) and EEG (electroencephalogram) signals recorded from humans.

Improved Air Combat Awareness; with AESA and Next-Generation Signal Processing

DTIC Science & Technology

2002-09-01

competence network Building techniques Software development environment Communication Computer architecture Modeling Real-time programming Radar...memory access, skewed load and store, 3.2 GB/s BW • Performance: 400 MFLOPS Runtime environment Custom runtime routines Driver routines Hardware

Direction of Radio Finding via MUSIC (Multiple Signal Classification) Algorithm for Hardware Design System

NASA Astrophysics Data System (ADS)

Zhang, Zheng

2017-10-01

Concept of radio direction finding systems, which use radio direction finding is based on digital signal processing algorithms. Thus, the radio direction finding system becomes capable to locate and track signals by the both. Performance of radio direction finding significantly depends on effectiveness of digital signal processing algorithms. The algorithm uses the Direction of Arrival (DOA) algorithms to estimate the number of incidents plane waves on the antenna array and their angle of incidence. This manuscript investigates implementation of the DOA algorithms (MUSIC) on the uniform linear array in the presence of white noise. The experiment results exhibit that MUSIC algorithm changed well with the radio direction.

Robust real-time extraction of respiratory signals from PET list-mode data.

PubMed

Salomon, Andre; Zhang, Bin; Olivier, Patrick; Goedicke, Andreas

2018-05-01

Respiratory motion, which typically cannot simply be suspended during PET image acquisition, affects lesions' detection and quantitative accuracy inside or in close vicinity to the lungs. Some motion compensation techniques address this issue via pre-sorting ("binning") of the acquired PET data into a set of temporal gates, where each gate is assumed to be minimally affected by respiratory motion. Tracking respiratory motion is typically realized using dedicated hardware (e.g. using respiratory belts and digital cameras). Extracting respiratory signalsdirectly from the acquired PET data simplifies the clinical workflow as it avoids to handle additional signal measurement equipment. We introduce a new data-driven method "Combined Local Motion Detection" (CLMD). It uses the Time-of-Flight (TOF) information provided by state-of-the-art PET scanners in order to enable real-time respiratory signal extraction without additional hardware resources. CLMD applies center-of-mass detection in overlapping regions based on simple back-positioned TOF event sets acquired in short time frames. Following a signal filtering and quality-based pre-selection step, the remaining extracted individual position information over time is then combined to generate a global respiratory signal. The method is evaluated using 7 measured FDG studies from single and multiple scan positions of the thorax region, and it is compared to other software-based methods regarding quantitative accuracy and statistical noise stability. Correlation coefficients around 90% between the reference and the extracted signal have been found for those PET scans where motion affected features such as tumors or hot regions were present in the PET field-of-view. For PET scans with a quarter of typically applied radiotracer doses, the CLMD method still provides similar high correlation coefficients which indicates its robustness to noise. Each CLMD processing needed less than 0.4s in total on a standard multi-core CPU and thus provides a robust and accurate approach enabling real-time processing capabilities using standard PC hardware. © 2018 Institute of Physics and Engineering in Medicine.

Virtual and flexible digital signal processing system based on software PnP and component works

NASA Astrophysics Data System (ADS)

He, Tao; Wu, Qinghua; Zhong, Fei; Li, Wei

2005-05-01

An idea about software PnP (Plug & Play) is put forward according to the hardware PnP. And base on this idea, a virtual flexible digital signal processing system (FVDSPS) is carried out. FVDSPS is composed of a main control center, many sub-function modules and other hardware I/O modules. Main control center sends out commands to sub-function modules, and manages running orders, parameters and results of sub-functions. The software kernel of FVDSPS is DSP (Digital Signal Processing) module, which communicates with the main control center through some protocols, accept commands or send requirements. The data sharing and exchanging between the main control center and the DSP modules are carried out and managed by the files system of the Windows Operation System through the effective communication. FVDSPS real orients objects, orients engineers and orients engineering problems. With FVDSPS, users can freely plug and play, and fast reconfigure a signal process system according to engineering problems without programming. What you see is what you get. Thus, an engineer can orient engineering problems directly, pay more attention to engineering problems, and promote the flexibility, reliability and veracity of testing system. Because FVDSPS orients TCP/IP protocol, through Internet, testing engineers, technology experts can be connected freely without space. Engineering problems can be resolved fast and effectively. FVDSPS can be used in many fields such as instruments and meter, fault diagnosis, device maintenance and quality control.

Photon Counting Using Edge-Detection Algorithm

NASA Technical Reports Server (NTRS)

Gin, Jonathan W.; Nguyen, Danh H.; Farr, William H.

2010-01-01

New applications such as high-datarate, photon-starved, free-space optical communications require photon counting at flux rates into gigaphoton-per-second regimes coupled with subnanosecond timing accuracy. Current single-photon detectors that are capable of handling such operating conditions are designed in an array format and produce output pulses that span multiple sample times. In order to discern one pulse from another and not to overcount the number of incoming photons, a detection algorithm must be applied to the sampled detector output pulses. As flux rates increase, the ability to implement such a detection algorithm becomes difficult within a digital processor that may reside within a field-programmable gate array (FPGA). Systems have been developed and implemented to both characterize gigahertz bandwidth single-photon detectors, as well as process photon count signals at rates into gigaphotons per second in order to implement communications links at SCPPM (serial concatenated pulse position modulation) encoded data rates exceeding 100 megabits per second with efficiencies greater than two bits per detected photon. A hardware edge-detection algorithm and corresponding signal combining and deserialization hardware were developed to meet these requirements at sample rates up to 10 GHz. The photon discriminator deserializer hardware board accepts four inputs, which allows for the ability to take inputs from a quadphoton counting detector, to support requirements for optical tracking with a reduced number of hardware components. The four inputs are hardware leading-edge detected independently. After leading-edge detection, the resultant samples are ORed together prior to deserialization. The deserialization is performed to reduce the rate at which data is passed to a digital signal processor, perhaps residing within an FPGA. The hardware implements four separate analog inputs that are connected through RF connectors. Each analog input is fed to a high-speed 1-bit comparator, which digitizes the input referenced to an adjustable threshold value. This results in four independent serial sample streams of binary 1s and 0s, which are ORed together at rates up to 10 GHz. This single serial stream is then deserialized by a factor of 16 to create 16 signal lines at a rate of 622.5 MHz or lower for input to a high-speed digital processor assembly. The new design and corresponding hardware can be employed with a quad-photon counting detector capable of handling photon rates on the order of multi-gigaphotons per second, whereas prior art was only capable of handling a single input at 1/4 the flux rate. Additionally, the hardware edge-detection algorithm has provided the ability to process 3-10 higher photon flux rates than previously possible by removing the limitation that photoncounting detector output pulses on multiple channels being ORed not overlap. Now, only the leading edges of the pulses are required to not overlap. This new photon counting digitizer hardware architecture supports a universal front end for an optical communications receiver operating at data rates from kilobits to over one gigabit per second to meet increased mission data volume requirements.

Automatic calibration and signal switching system for the particle beam fusion research data acquisition facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boyer, W.B.

1979-09-01

This report describes both the hardware and software components of an automatic calibration and signal system (Autocal) for the data acquisition system for the Sandia particle beam fusion research accelerators Hydra, Proto I, and Proto II. The Autocal hardware consists of off-the-shelf commercial equipment. The various hardware components, special modifications and overall system configuration are described. Special software has been developed to support the Autocal hardware. Software operation and maintenance are described.

Pre-Hardware Optimization of Spacecraft Image Processing Software Algorithms and Hardware Implementation

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Flatley, Thomas P.; Hestnes, Phyllis; Jentoft-Nilsen, Marit; Petrick, David J.; Day, John H. (Technical Monitor)

2001-01-01

Spacecraft telemetry rates have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image processing application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms and re-configurable computing hardware technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processing (DSP). It has been shown in [1] and [2] that this configuration can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft. However, since this technology is still maturing, intensive pre-hardware steps are necessary to achieve the benefits of hardware implementation. This paper describes these steps for the GOES-8 application, a software project developed using Interactive Data Language (IDL) (Trademark of Research Systems, Inc.) on a Workstation/UNIX platform. The solution involves converting the application to a PC/Windows/RC platform, selected mainly by the availability of low cost, adaptable high-speed RC hardware. In order for the hybrid system to run, the IDL software was modified to account for platform differences. It was interesting to examine the gains and losses in performance on the new platform, as well as unexpected observations before implementing hardware. After substantial pre-hardware optimization steps, the necessity of hardware implementation for bottleneck code in the PC environment became evident and solvable beginning with the methodology described in [1], [2], and implementing a novel methodology for this specific application [6]. The PC-RC interface bandwidth problem for the class of applications with moderate input-output data rates but large intermediate multi-thread data streams has been addressed and mitigated. This opens a new class of satellite image processing applications for bottleneck problems solution using RC technologies. The issue of a science algorithm level of abstraction necessary for RC hardware implementation is also described. Selected Matlab functions already implemented in hardware were investigated for their direct applicability to the GOES-8 application with the intent to create a library of Matlab and IDL RC functions for ongoing work. A complete class of spacecraft image processing applications using embedded re-configurable computing technology to meet real-time requirements, including performance results and comparison with the existing system, is described in this paper.

Applications of artificial intelligence to space station: General purpose intelligent sensor interface

NASA Technical Reports Server (NTRS)

Mckee, James W.

1988-01-01

This final report describes the accomplishments of the General Purpose Intelligent Sensor Interface task of the Applications of Artificial Intelligence to Space Station grant for the period from October 1, 1987 through September 30, 1988. Portions of the First Biannual Report not revised will not be included but only referenced. The goal is to develop an intelligent sensor system that will simplify the design and development of expert systems using sensors of the physical phenomena as a source of data. This research will concentrate on the integration of image processing sensors and voice processing sensors with a computer designed for expert system development. The result of this research will be the design and documentation of a system in which the user will not need to be an expert in such areas as image processing algorithms, local area networks, image processor hardware selection or interfacing, television camera selection, voice recognition hardware selection, or analog signal processing. The user will be able to access data from video or voice sensors through standard LISP statements without any need to know about the sensor hardware or software.

Digital signal processing the Tevatron BPM signals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cancelo, G.; James, E.; Wolbers, S.

2005-05-01

The Beam Position Monitor (TeV BPM) readout system at Fermilab's Tevatron has been updated and is currently being commissioned. The new BPMs use new analog and digital hardware to achieve better beam position measurement resolution. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiproton measurements. The signals provided by the two ends of the BPM pickups are processed by analog band-pass filters and sampled by 14-bit ADCs at 74.3MHz. A crucial part of this work has been the design of digital filters that process the signal. This paper describesmore » the digital processing and estimation techniques used to optimize the beam position measurement. The BPM electronics must operate in narrow-band and wide-band modes to enable measurements of closed-orbit and turn-by-turn positions. The filtering and timing conditions of the signals are tuned accordingly for the operational modes. The analysis and the optimized result for each mode are presented.« less

Optimized design of embedded DSP system hardware supporting complex algorithms

NASA Astrophysics Data System (ADS)

Li, Yanhua; Wang, Xiangjun; Zhou, Xinling

2003-09-01

The paper presents an optimized design method for a flexible and economical embedded DSP system that can implement complex processing algorithms as biometric recognition, real-time image processing, etc. It consists of a floating-point DSP, 512 Kbytes data RAM, 1 Mbytes FLASH program memory, a CPLD for achieving flexible logic control of input channel and a RS-485 transceiver for local network communication. Because of employing a high performance-price ratio DSP TMS320C6712 and a large FLASH in the design, this system permits loading and performing complex algorithms with little algorithm optimization and code reduction. The CPLD provides flexible logic control for the whole DSP board, especially in input channel, and allows convenient interface between different sensors and DSP system. The transceiver circuit can transfer data between DSP and host computer. In the paper, some key technologies are also introduced which make the whole system work efficiently. Because of the characters referred above, the hardware is a perfect flat for multi-channel data collection, image processing, and other signal processing with high performance and adaptability. The application section of this paper presents how this hardware is adapted for the biometric identification system with high identification precision. The result reveals that this hardware is easy to interface with a CMOS imager and is capable of carrying out complex biometric identification algorithms, which require real-time process.

Development of Parallel Architectures for Sensor Array Processing. Volume 1

DTIC Science & Technology

1993-08-01

required for the DOA estimation [ 1-7]. The Multiple Signal Classification ( MUSIC ) [ 1] and the Estimation of Signal Parameters by Rotational...manifold and the estimated subspace. Although MUSIC is a high resolution algorithm, it has several drawbacks including the fact that complete knowledge of...thoroughly, MUSIC algorithm was selected to develop special purpose hardware for real time computation. Summary of the MUSIC algorithm is as follows

Maglev Train Signal Processing Architecture Based on Nonlinear Discrete Tracking Differentiator.

PubMed

Wang, Zhiqiang; Li, Xiaolong; Xie, Yunde; Long, Zhiqiang

2018-05-24

In a maglev train levitation system, signal processing plays an important role for the reason that some sensor signals are prone to be corrupted by noise due to the harsh installation and operation environment of sensors and some signals cannot be acquired directly via sensors. Based on these concerns, an architecture based on a new type of nonlinear second-order discrete tracking differentiator is proposed. The function of this signal processing architecture includes filtering signal noise and acquiring needed signals for levitation purposes. The proposed tracking differentiator possesses the advantages of quick convergence, no fluttering, and simple calculation. Tracking differentiator's frequency characteristics at different parameter values are studied in this paper. The performance of this new type of tracking differentiator is tested in a MATLAB simulation and this tracking-differentiator is implemented in Very-High-Speed Integrated Circuit Hardware Description Language (VHDL). In the end, experiments are conducted separately on a test board and a maglev train model. Simulation and experiment results show that the performance of this novel signal processing architecture can fulfill the real system requirement.

Novel structures for Discrete Hartley Transform based on first-order moments

NASA Astrophysics Data System (ADS)

Xiong, Jun; Zheng, Wenjuan; Wang, Hao; Liu, Jianguo

2018-03-01

Discrete Hartley Transform (DHT) is an important tool in digital signal processing. In the present paper, the DHT is firstly transformed into the first-order moments-based form, then a new fast algorithm is proposed to calculate the first-order moments without multiplication. Based on the algorithm theory, the corresponding hardware architecture for DHT is proposed, which only contains shift operations and additions with no need for multipliers and large memory. To verify the availability and effectiveness, the proposed design is implemented with hardware description language and synthesized by Synopsys Design Compiler with 0.18-μm SMIC library. A series of experiments have proved that the proposed architecture has better performance in terms of the product of the hardware consumption and computation time.

JSATS Detector Field Manual

DOE Office of Scientific and Technical Information (OSTI.GOV)

Choi, Eric Y.; Flory, Adam E.; Lamarche, Brian L.

2014-06-01

The Juvenile Salmon Acoustic Telemetry System (JSATS) Detector is a software and hardware system that captures JSATS Acoustic Micro Transmitter (AMT) signals. The system uses hydrophones to capture acoustic signals in the water. This analog signal is then amplified and processed by the Analog to Digital Converter (ADC) and Digital Signal Processor (DSP) board in the computer. This board digitizes and processes the acoustic signal to determine if a possible JSATS tag is present. With this detection, the data will be saved to the computer for further analysis. This document details the features and functionality of the JSATS Detector software.more » The document covers how to install the software, setup and run the detector software. The document will also go over the raw binary waveform file format and CSV files containing RMS values« less

Hardware Architecture Study for NASA's Space Software Defined Radios

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Scardelletti, Maximilian C.; Mortensen, Dale J.; Kacpura, Thomas J.; Andro, Monty; Smith, Carl; Liebetreu, John

2008-01-01

This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions, and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

A reconfigurable, wearable, wireless ECG system.

PubMed

Borromeo, S; Rodriguez-Sanchez, C; Machado, F; Hernandez-Tamames, J A; de la Prieta, R

2007-01-01

New emerging concepts as "wireless hospital", "mobile healthcare" or "wearable telemonitoring" require the development of bio-signal acquisition devices to be easily integrated into the clinical routine. In this work, we present a new system for Electrocardiogram (ECG) acquisition and its processing, with wireless transmission on demand (either the complete ECG or only one alarm message, just in case a pathological heart rate detected). Size and power consumption are optimized in order to provide mobility and comfort to the patient. We have designed a modular hardware system and an autonomous platform based on a Field-Programmable Gate Array (FPGA) for developing and debugging. The modular approach allows to redesign the system in an easy way. Its adaptation to a new biomedical signal would only need small changes on it. The hardware system is composed of three layers that can be plugged/unplugged: communication layer, processing layer and sensor layer. In addition, we also present a general purpose end-user application developed for mobile phones or Personal Digital Assistant devices (PDAs).

System for detecting operating errors in a variable valve timing engine using pressure sensors

DOEpatents

Wiles, Matthew A.; Marriot, Craig D

2013-07-02

A method and control module includes a pressure sensor data comparison module that compares measured pressure volume signal segments to ideal pressure volume segments. A valve actuation hardware remedy module performs a hardware remedy in response to comparing the measured pressure volume signal segments to the ideal pressure volume segments when a valve actuation hardware failure is detected.

Implementation of an Antenna Array Signal Processing Breadboard for the Deep Space Network

NASA Technical Reports Server (NTRS)

Navarro, Robert

2006-01-01

The Deep Space Network Large Array will replace/augment 34 and 70 meter antenna assets. The array will mainly be used to support NASA's deep space telemetry, radio science, and navigation requirements. The array project will deploy three complexes in the western U.S., Australia, and European longitude each with 400 12m downlink antennas and a DSN central facility at JPL. THis facility will remotely conduct all real-time monitor and control for the network. Signal processing objectives include: provide a means to evaluate the performance of the Breadboard Array's antenna subsystem; design and build prototype hardware; demonstrate and evaluate proposed signal processing techniques; and gain experience with various technologies that may be used in the Large Array. Results are summarized..

Signal Processing for Wireless Communication MIMO System with Nano- Scaled CSDG MOSFET based DP4T RF Switch.

PubMed

Srivastava, Viranjay M

2015-01-01

In the present technological expansion, the radio frequency integrated circuits in the wireless communication technologies became useful because of the replacement of increasing number of functions, traditional hardware components by modern digital signal processing. The carrier frequencies used for communication systems, now a day, shifted toward the microwave regime. The signal processing for the multiple inputs multiple output wireless communication system using the Metal- Oxide-Semiconductor Field-Effect-Transistor (MOSFET) has been done a lot. In this research the signal processing with help of nano-scaled Cylindrical Surrounding Double Gate (CSDG) MOSFET by means of Double- Pole Four-Throw Radio-Frequency (DP4T RF) switch, in terms of Insertion loss, Isolation, Reverse isolation and Inter modulation have been analyzed. In addition to this a channel model has been presented. Here, we also discussed some patents relevant to the topic.

Hardware-software and algorithmic provision of multipoint systems for long-term monitoring of dynamic processes

NASA Astrophysics Data System (ADS)

Yakunin, A. G.; Hussein, H. M.

2017-08-01

An example of information-measuring systems for climate monitoring and operational control of energy resources consumption of the university campus that is functioning in the Altai State Technical University since 2009. The advantages of using such systems for studying various physical processes are discussed. General principles of construction of similar systems, their software, hardware and algorithmic support are considered. It is shown that their fundamental difference from traditional SCADA - systems is the use of databases for storing the results of the observation with a specialized data structure, and by preprocessing of the input signal for its compression. Another difference is the absence of clear criteria for detecting the anomalies in the time series of the observed process. The examples of algorithms that solve this problem are given.

Fast, multi-channel real-time processing of signals with microsecond latency using graphics processing units.

PubMed

Rath, N; Kato, S; Levesque, J P; Mauel, M E; Navratil, G A; Peng, Q

2014-04-01

Fast, digital signal processing (DSP) has many applications. Typical hardware options for performing DSP are field-programmable gate arrays (FPGAs), application-specific integrated DSP chips, or general purpose personal computer systems. This paper presents a novel DSP platform that has been developed for feedback control on the HBT-EP tokamak device. The system runs all signal processing exclusively on a Graphics Processing Unit (GPU) to achieve real-time performance with latencies below 8 μs. Signals are transferred into and out of the GPU using PCI Express peer-to-peer direct-memory-access transfers without involvement of the central processing unit or host memory. Tests were performed on the feedback control system of the HBT-EP tokamak using forty 16-bit floating point inputs and outputs each and a sampling rate of up to 250 kHz. Signals were digitized by a D-TACQ ACQ196 module, processing done on an NVIDIA GTX 580 GPU programmed in CUDA, and analog output was generated by D-TACQ AO32CPCI modules.

An experimental adaptive array to suppress weak interfering signals

NASA Technical Reports Server (NTRS)

Walton, Eric K.; Gupta, Inder J.; Ksienski, Aharon A.; Ward, James

1988-01-01

An experimental adaptive antenna system to suppress weak interfering signals is described. It is a sidelobe canceller with two auxiliary elements. Modified feedback loops are used to control the array weights. The received signals are simulated in hardware for parameter control. Digital processing is used for algorithm implementation and performance evaluation. The experimental results are presented. They show that interfering signals as much as 10 dB below the thermal noise level in the main channel are suppressed by 20-30 dB. Such a system has potential application in suppressing the interference encountered in direct broadcast satellite communication systems.

Microcomputer-Based Digital Signal Processing Laboratory Experiments.

ERIC Educational Resources Information Center

Tinari, Jr., Rocco; Rao, S. Sathyanarayan

1985-01-01

Describes a system (Apple II microcomputer interfaced to flexible, custom-designed digital hardware) which can provide: (1) Fast Fourier Transform (FFT) computation on real-time data with a video display of spectrum; (2) frequency synthesis experiments using the inverse FFT; and (3) real-time digital filtering experiments. (JN)

SWARM: A Compact High Resolution Correlator and Wideband VLBI Phased Array Upgrade for SMA

NASA Astrophysics Data System (ADS)

Weintroub, Jonathan

2014-06-01

A new digital back end (DBE) is being commissioned on Mauna Kea. The “SMA Wideband Astronomical ROACH2 Machine”, or SWARM, processes a 4 GHz usable band in single polarization mode and is flexibly reconfigurable for 2 GHz full Stokes dual polarization. The hardware is based on the open source Reconfigurable Open Architecture Computing Hardware 2 (ROACH2) platform from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER). A 5 GSps quad-core analog-to-digital converter board uses a commercial chip from e2v installed on a CASPER-standard printed circuit board designed by Homin Jiang’s group at ASIAA. Two ADC channels are provided per ROACH2, each sampling a 2.3 GHz Nyquist band generated by a custom wideband block downconverter (BDC). The ROACH2 logic includes 16k-channel Polyphase Filterbank (F-engine) per input followed by a 10 GbE switch based corner-turn which feeds into correlator-accumulator logic (X-engines) co-located with the F-engines. This arrangement makes very effective use of a small amount of digital hardware (just 8 ROACH2s in 1U rack mount enclosures). The primary challenge now is to meet timing at full speed for a large and very complex FPGA bit code. Design of the VLBI phased sum and recorder interface logic is also in process. Our poster will describe the instrument design, with the focus on the particular challenges of ultra wideband signal processing. Early connected commissioning and science verification data will be presented.

FPGA-based voltage and current dual drive system for high frame rate electrical impedance tomography.

PubMed

Khan, Shadab; Manwaring, Preston; Borsic, Andrea; Halter, Ryan

2015-04-01

Electrical impedance tomography (EIT) is used to image the electrical property distribution of a tissue under test. An EIT system comprises complex hardware and software modules, which are typically designed for a specific application. Upgrading these modules is a time-consuming process, and requires rigorous testing to ensure proper functioning of new modules with the existing ones. To this end, we developed a modular and reconfigurable data acquisition (DAQ) system using National Instruments' (NI) hardware and software modules, which offer inherent compatibility over generations of hardware and software revisions. The system can be configured to use up to 32-channels. This EIT system can be used to interchangeably apply current or voltage signal, and measure the tissue response in a semi-parallel fashion. A novel signal averaging algorithm, and 512-point fast Fourier transform (FFT) computation block was implemented on the FPGA. FFT output bins were classified as signal or noise. Signal bins constitute a tissue's response to a pure or mixed tone signal. Signal bins' data can be used for traditional applications, as well as synchronous frequency-difference imaging. Noise bins were used to compute noise power on the FPGA. Noise power represents a metric of signal quality, and can be used to ensure proper tissue-electrode contact. Allocation of these computationally expensive tasks to the FPGA reduced the required bandwidth between PC, and the FPGA for high frame rate EIT. In 16-channel configuration, with a signal-averaging factor of 8, the DAQ frame rate at 100 kHz exceeded 110 frames s (-1), and signal-to-noise ratio exceeded 90 dB across the spectrum. Reciprocity error was found to be for frequencies up to 1 MHz. Static imaging experiments were performed on a high-conductivity inclusion placed in a saline filled tank; the inclusion was clearly localized in the reconstructions obtained for both absolute current and voltage mode data.

Design of a signal conditioner for the Fermilab Magnet Test Facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

Giannelli, Pietro

2012-01-01

This thesis describes the design of a remotely-programmable signal conditioner for the harmonic measurement of accelerator magnets. A 10-channel signal conditioning circuit featuring bucking capabilities was designed from scratch and implemented to the level of the printed circuit board layout. Other system components were chosen from those available on the market. Software design was started with the definition of routine procedures. This thesis is part of an upgrade project for replacing obsolescent automated test equipment belonging to the Fermilab Magnet Test Facility. The design started with a given set of requirements. Using a top-down approach, all the circuits were designedmore » and their expected performances were theoretically predicted and simulated. A limited prototyping phase followed. The printed circuit boards were laid out and routed using a CAD software and focusing the design on maximum electromagnetic interference immunity. An embedded board was selected for controlling and interfacing the signal conditioning circuitry with the instrumentation network. Basic low level routines for hardware access were defined. This work covered the entire design process of the signal conditioner, resulting in a project ready for manufacturing. The expected performances are in line with the requirements and, in the cases where this was not possible, approval of trade-offs was sought and received from the end users. Part I deals with the global structure of the signal conditioner and the subdivision in functional macro-blocks. Part II treats the hardware design phase in detail, covering the analog and digital circuits, the printed circuit layouts, the embedded controller and the power supply selection. Part III deals with the basic hardware-related routines to be implemented in the final software.« less

A Method for Implementing Force-Limited Vibration Control

NASA Technical Reports Server (NTRS)

Worth, Daniel B.

1997-01-01

NASA/GSFC has implemented force-limited vibration control on a controller which can only accept one profile. The method uses a personal computer based digital signal processing board to convert force and/or moment signals into what appears to he an acceleration signal to the controller. This technique allows test centers with older controllers to use the latest force-limited control techniques for random vibration testing. The paper describes the method, hardware, and test procedures used. An example from a test performed at NASA/GSFC is used as a guide.

EMG amplifier with wireless data transmission

NASA Astrophysics Data System (ADS)

Kowalski, Grzegorz; Wildner, Krzysztof

2017-08-01

Wireless medical diagnostics is a trend in modern technology used in medicine. This paper presents a concept of realization, architecture of hardware and software implementation of an elecromyography signal (EMG) amplifier with wireless data transmission. This amplifier consists of three components: analogue processing of bioelectric signal module, micro-controller circuit and an application enabling data acquisition via a personal computer. The analogue bioelectric signal processing circuit receives electromyography signals from the skin surface, followed by initial analogue processing and preparation of the signals for further digital processing. The second module is a micro-controller circuit designed to wirelessly transmit the electromyography signals from the analogue signal converter to a personal computer. Its purpose is to eliminate the need for wired connections between the patient and the data logging device. The third block is a computer application designed to display the transmitted electromyography signals, as well as data capture and analysis. Its purpose is to provide a graphical representation of the collected data. The entire device has been thoroughly tested to ensure proper functioning. In use, the device displayed the captured electromyography signal from the arm of the patient. Amplitude- frequency characteristics were set in order to investigate the bandwidth and the overall gain of the device.

Automated Software Acceleration in Programmable Logic for an Efficient NFFT Algorithm Implementation: A Case Study.

PubMed

Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian

2017-03-28

Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation.

Automated Software Acceleration in Programmable Logic for an Efficient NFFT Algorithm Implementation: A Case Study

PubMed Central

Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian

2017-01-01

Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation. PMID:28350358

Design Automation for Streaming Systems

DTIC Science & Technology

2005-12-16

which are FIFO buffered channels. We develop a process network model for streaming sys - tems (TDFPN) and a hardware description language with built in...and may include an automatic address generator. A complete synthesis sys - tem would provide separate segment operator implementations for every...Acoustics, Speech, and Signal Processing (ICASSP ’89), pages 988– 991, 1989. [Luk et al., 1997] Wayne Luk, Nabeel Shirazi, and Peter Y. K. Cheung

Third International Workshop on Ion Mobility Spectrometry

NASA Technical Reports Server (NTRS)

Cross, John H. (Editor)

1995-01-01

Basic research in ion mobility spectrometry has given rise to rapid advancement in hardware development and applications. The Third International Workshop on Ion Mobility Spectrometry (IMS) was held October 16-19, 1994, at Johnson Space Center to provide a forum for investigators to present the most recent results of both basic and applied IMS research. Presenters included manufacturers and various users, including military research organizations and drug enforcement agencies. Thirty papers were given in the following five sessions: Fundamental IMS Studies, Instrument Development, Hyphenated IMS Techniques, Applications, and Data Reduction and Signal Processing. Advances in hardware development, software development, and user applications are described.

High-Speed Isolation Board for Flight Hardware Testing

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K.; Goodpasture, Richard L.

2011-01-01

There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 11-in. (.22 28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, Herb

2017-01-01

Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency (RF) components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. These innovations have reduced the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. An additional pay-off is the increased flexibility of the SDR: allowing the same hardware to implement multiple transponder types by altering hardware logic -no change of analog hardware is required -all of which can be ultimately accomplished in orbit.

Digital ultrasonics signal processing: Flaw data post processing use and description

NASA Technical Reports Server (NTRS)

Buel, V. E.

1981-01-01

A modular system composed of two sets of tasks which interprets the flaw data and allows compensation of the data due to transducer characteristics is described. The hardware configuration consists of two main units. A DEC LSI-11 processor running under the RT-11 sngle job, version 2C-02 operating system, controls the scanner hardware and the ultrasonic unit. A DEC PDP-11/45 processor also running under the RT-11, version 2C-02, operating system, stores, processes and displays the flaw data. The software developed the Ultrasonics Evaluation System, is divided into two catagories; transducer characterization and flaw classification. Each category is divided further into two functional tasks: a data acquisition and a postprocessor ask. The flaw characterization collects data, compresses its, and writes it to a disk file. The data is then processed by the flaw classification postprocessing task. The use and operation of a flaw data postprocessor is described.

Stanford Hardware Development Program

NASA Technical Reports Server (NTRS)

Peterson, A.; Linscott, I.; Burr, J.

1986-01-01

Architectures for high performance, digital signal processing, particularly for high resolution, wide band spectrum analysis were developed. These developments are intended to provide instrumentation for NASA's Search for Extraterrestrial Intelligence (SETI) program. The real time signal processing is both formal and experimental. The efficient organization and optimal scheduling of signal processing algorithms were investigated. The work is complemented by efforts in processor architecture design and implementation. A high resolution, multichannel spectrometer that incorporates special purpose microcoded signal processors is being tested. A general purpose signal processor for the data from the multichannel spectrometer was designed to function as the processing element in a highly concurrent machine. The processor performance required for the spectrometer is in the range of 1000 to 10,000 million instructions per second (MIPS). Multiple node processor configurations, where each node performs at 100 MIPS, are sought. The nodes are microprogrammable and are interconnected through a network with high bandwidth for neighboring nodes, and medium bandwidth for nodes at larger distance. The implementation of both the current mutlichannel spectrometer and the signal processor as Very Large Scale Integration CMOS chip sets was commenced.

Myoelectric signal processing for control of powered limb prostheses.

PubMed

Parker, P; Englehart, K; Hudgins, B

2006-12-01

Progress in myoelectric control technology has over the years been incremental, due in part to the alternating focus of the R&D between control methodology and device hardware. The technology has over the past 50 years or so moved from single muscle control of a single prosthesis function to muscle group activity control of multifunction prostheses. Central to these changes have been developments in the means of extracting information from the myoelectric signal. This paper gives an overview of the myoelectric signal processing challenge, a brief look at the challenge from an historical perspective, the state-of-the-art in myoelectric signal processing for prosthesis control, and an indication of where this field is heading. The paper demonstrates that considerable progress has been made in providing clients with useful and reliable myoelectric communication channels, and that exciting work and developments are on the horizon.

EEG Recording and Online Signal Processing on Android: A Multiapp Framework for Brain-Computer Interfaces on Smartphone

PubMed Central

Debener, Stefan; Emkes, Reiner; Volkening, Nils; Fudickar, Sebastian; Bleichner, Martin G.

2017-01-01

Objective Our aim was the development and validation of a modular signal processing and classification application enabling online electroencephalography (EEG) signal processing on off-the-shelf mobile Android devices. The software application SCALA (Signal ProCessing and CLassification on Android) supports a standardized communication interface to exchange information with external software and hardware. Approach In order to implement a closed-loop brain-computer interface (BCI) on the smartphone, we used a multiapp framework, which integrates applications for stimulus presentation, data acquisition, data processing, classification, and delivery of feedback to the user. Main Results We have implemented the open source signal processing application SCALA. We present timing test results supporting sufficient temporal precision of audio events. We also validate SCALA with a well-established auditory selective attention paradigm and report above chance level classification results for all participants. Regarding the 24-channel EEG signal quality, evaluation results confirm typical sound onset auditory evoked potentials as well as cognitive event-related potentials that differentiate between correct and incorrect task performance feedback. Significance We present a fully smartphone-operated, modular closed-loop BCI system that can be combined with different EEG amplifiers and can easily implement other paradigms. PMID:29349070

EEG Recording and Online Signal Processing on Android: A Multiapp Framework for Brain-Computer Interfaces on Smartphone.

PubMed

Blum, Sarah; Debener, Stefan; Emkes, Reiner; Volkening, Nils; Fudickar, Sebastian; Bleichner, Martin G

2017-01-01

Our aim was the development and validation of a modular signal processing and classification application enabling online electroencephalography (EEG) signal processing on off-the-shelf mobile Android devices. The software application SCALA (Signal ProCessing and CLassification on Android) supports a standardized communication interface to exchange information with external software and hardware. In order to implement a closed-loop brain-computer interface (BCI) on the smartphone, we used a multiapp framework, which integrates applications for stimulus presentation, data acquisition, data processing, classification, and delivery of feedback to the user. We have implemented the open source signal processing application SCALA. We present timing test results supporting sufficient temporal precision of audio events. We also validate SCALA with a well-established auditory selective attention paradigm and report above chance level classification results for all participants. Regarding the 24-channel EEG signal quality, evaluation results confirm typical sound onset auditory evoked potentials as well as cognitive event-related potentials that differentiate between correct and incorrect task performance feedback. We present a fully smartphone-operated, modular closed-loop BCI system that can be combined with different EEG amplifiers and can easily implement other paradigms.

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph; Mortensen, Dale

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. The extension of STRS to the SSP hardware will promote easier waveform reconfiguration and reuse. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. A FPGA-based transmit waveform implementation of the proposed standard interfaces on a laboratory breadboard SDR will be discussed.

A HWIL test facility of infrared imaging laser radar using direct signal injection

NASA Astrophysics Data System (ADS)

Wang, Qian; Lu, Wei; Wang, Chunhui; Wang, Qi

2005-01-01

Laser radar has been widely used these years and the hardware-in-the-loop (HWIL) testing of laser radar become important because of its low cost and high fidelity compare with On-the-Fly testing and whole digital simulation separately. Scene generation and projection two key technologies of hardware-in-the-loop testing of laser radar and is a complicated problem because the 3D images result from time delay. The scene generation process begins with the definition of the target geometry and reflectivity and range. The real-time 3D scene generation computer is a PC based hardware and the 3D target models were modeled using 3dsMAX. The scene generation software was written in C and OpenGL and is executed to extract the Z-buffer from the bit planes to main memory as range image. These pixels contain each target position x, y, z and its respective intensity and range value. Expensive optical injection technologies of scene projection such as LDP array, VCSEL array, DMD and associated scene generation is ongoing. But the optical scene projection is complicated and always unaffordable. In this paper a cheaper test facility was described that uses direct electronic injection to provide rang images for laser radar testing. The electronic delay and pulse shaping circuits inject the scenes directly into the seeker's signal processing unit.

Real-time Enhancement, Registration, and Fusion for a Multi-Sensor Enhanced Vision System

NASA Technical Reports Server (NTRS)

Hines, Glenn D.; Rahman, Zia-ur; Jobson, Daniel J.; Woodell, Glenn A.

2006-01-01

Over the last few years NASA Langley Research Center (LaRC) has been developing an Enhanced Vision System (EVS) to aid pilots while flying in poor visibility conditions. The EVS captures imagery using two infrared video cameras. The cameras are placed in an enclosure that is mounted and flown forward-looking underneath the NASA LaRC ARIES 757 aircraft. The data streams from the cameras are processed in real-time and displayed on monitors on-board the aircraft. With proper processing the camera system can provide better-than- human-observed imagery particularly during poor visibility conditions. However, to obtain this goal requires several different stages of processing including enhancement, registration, and fusion, and specialized processing hardware for real-time performance. We are using a real-time implementation of the Retinex algorithm for image enhancement, affine transformations for registration, and weighted sums to perform fusion. All of the algorithms are executed on a single TI DM642 digital signal processor (DSP) clocked at 720 MHz. The image processing components were added to the EVS system, tested, and demonstrated during flight tests in August and September of 2005. In this paper we briefly discuss the EVS image processing hardware and algorithms. We then discuss implementation issues and show examples of the results obtained during flight tests. Keywords: enhanced vision system, image enhancement, retinex, digital signal processing, sensor fusion

Real-time demonstration hardware for enhanced DPCM video compression algorithm

NASA Technical Reports Server (NTRS)

Bizon, Thomas P.; Whyte, Wayne A., Jr.; Marcopoli, Vincent R.

1992-01-01

The lack of available wideband digital links as well as the complexity of implementation of bandwidth efficient digital video CODECs (encoder/decoder) has worked to keep the cost of digital television transmission too high to compete with analog methods. Terrestrial and satellite video service providers, however, are now recognizing the potential gains that digital video compression offers and are proposing to incorporate compression systems to increase the number of available program channels. NASA is similarly recognizing the benefits of and trend toward digital video compression techniques for transmission of high quality video from space and therefore, has developed a digital television bandwidth compression algorithm to process standard National Television Systems Committee (NTSC) composite color television signals. The algorithm is based on differential pulse code modulation (DPCM), but additionally utilizes a non-adaptive predictor, non-uniform quantizer and multilevel Huffman coder to reduce the data rate substantially below that achievable with straight DPCM. The non-adaptive predictor and multilevel Huffman coder combine to set this technique apart from other DPCM encoding algorithms. All processing is done on a intra-field basis to prevent motion degradation and minimize hardware complexity. Computer simulations have shown the algorithm will produce broadcast quality reconstructed video at an average transmission rate of 1.8 bits/pixel. Hardware implementation of the DPCM circuit, non-adaptive predictor and non-uniform quantizer has been completed, providing realtime demonstration of the image quality at full video rates. Video sampling/reconstruction circuits have also been constructed to accomplish the analog video processing necessary for the real-time demonstration. Performance results for the completed hardware compare favorably with simulation results. Hardware implementation of the multilevel Huffman encoder/decoder is currently under development along with implementation of a buffer control algorithm to accommodate the variable data rate output of the multilevel Huffman encoder. A video CODEC of this type could be used to compress NTSC color television signals where high quality reconstruction is desirable (e.g., Space Station video transmission, transmission direct-to-the-home via direct broadcast satellite systems or cable television distribution to system headends and direct-to-the-home).

Signal processing techniques for damage detection with piezoelectric wafer active sensors and embedded ultrasonic structural radar

NASA Astrophysics Data System (ADS)

Yu, Lingyu; Bao, Jingjing; Giurgiutiu, Victor

2004-07-01

Embedded ultrasonic structural radar (EUSR) algorithm is developed for using piezoelectric wafer active sensor (PWAS) array to detect defects within a large area of a thin-plate specimen. Signal processing techniques are used to extract the time of flight of the wave packages, and thereby to determine the location of the defects with the EUSR algorithm. In our research, the transient tone-burst wave propagation signals are generated and collected by the embedded PWAS. Then, with signal processing, the frequency contents of the signals and the time of flight of individual frequencies are determined. This paper starts with an introduction of embedded ultrasonic structural radar algorithm. Then we will describe the signal processing methods used to extract the time of flight of the wave packages. The signal processing methods being used include the wavelet denoising, the cross correlation, and Hilbert transform. Though hardware device can provide averaging function to eliminate the noise coming from the signal collection process, wavelet denoising is included to ensure better signal quality for the application in real severe environment. For better recognition of time of flight, cross correlation method is used. Hilbert transform is applied to the signals after cross correlation in order to extract the envelope of the signals. Signal processing and EUSR are both implemented by developing a graphical user-friendly interface program in LabView. We conclude with a description of our vision for applying EUSR signal analysis to structural health monitoring and embedded nondestructive evaluation. To this end, we envisage an automatic damage detection application utilizing embedded PWAS, EUSR, and advanced signal processing.

Reconstruction of audio waveforms from spike trains of artificial cochlea models

PubMed Central

Zai, Anja T.; Bhargava, Saurabh; Mesgarani, Nima; Liu, Shih-Chii

2015-01-01

Spiking cochlea models describe the analog processing and spike generation process within the biological cochlea. Reconstructing the audio input from the artificial cochlea spikes is therefore useful for understanding the fidelity of the information preserved in the spikes. The reconstruction process is challenging particularly for spikes from the mixed signal (analog/digital) integrated circuit (IC) cochleas because of multiple non-linearities in the model and the additional variance caused by random transistor mismatch. This work proposes an offline method for reconstructing the audio input from spike responses of both a particular spike-based hardware model called the AEREAR2 cochlea and an equivalent software cochlea model. This method was previously used to reconstruct the auditory stimulus based on the peri-stimulus histogram of spike responses recorded in the ferret auditory cortex. The reconstructed audio from the hardware cochlea is evaluated against an analogous software model using objective measures of speech quality and intelligibility; and further tested in a word recognition task. The reconstructed audio under low signal-to-noise (SNR) conditions (SNR < –5 dB) gives a better classification performance than the original SNR input in this word recognition task. PMID:26528113

Compensation for the signal processing characteristics of ultrasound B-mode scanners in adaptive speckle reduction.

PubMed

Crawford, D C; Bell, D S; Bamber, J C

1993-01-01

A systematic method to compensate for nonlinear amplification of individual ultrasound B-scanners has been investigated in order to optimise performance of an adaptive speckle reduction (ASR) filter for a wide range of clinical ultrasonic imaging equipment. Three potential methods have been investigated: (1) a method involving an appropriate selection of the speckle recognition feature was successful when the scanner signal processing executes simple logarithmic compressions; (2) an inverse transform (decompression) of the B-mode image was effective in correcting for the measured characteristics of image data compression when the algorithm was implemented in full floating point arithmetic; (3) characterising the behaviour of the statistical speckle recognition feature under conditions of speckle noise was found to be the method of choice for implementation of the adaptive speckle reduction algorithm in limited precision integer arithmetic. In this example, the statistical features of variance and mean were investigated. The third method may be implemented on commercially available fast image processing hardware and is also better suited for transfer into dedicated hardware to facilitate real-time adaptive speckle reduction. A systematic method is described for obtaining ASR calibration data from B-mode images of a speckle producing phantom.

Real-time video signal processing by generalized DDA and control memories: three-dimensional rotation and mapping

NASA Astrophysics Data System (ADS)

Hama, Hiromitsu; Yamashita, Kazumi

1991-11-01

A new method for video signal processing is described in this paper. The purpose is real-time image transformations at low cost, low power, and small size hardware. This is impossible without special hardware. Here generalized digital differential analyzer (DDA) and control memory (CM) play a very important role. Then indentation, which is called jaggy, is caused on the boundary of a background and a foreground accompanied with the processing. Jaggy does not occur inside the transformed image because of adopting linear interpretation. But it does occur inherently on the boundary of the background and the transformed images. It causes deterioration of image quality, and must be avoided. There are two well-know ways to improve image quality, blurring and supersampling. The former does not have much effect, and the latter has the much higher cost of computing. As a means of settling such a trouble, a method is proposed, which searches for positions that may arise jaggy and smooths such points. Computer simulations based on the real data from VTR, one scene of a movie, are presented to demonstrate our proposed scheme using DDA and CMs and to confirm the effectiveness on various transformations.

Digitally Enhanced Heterodyne Interferometry

NASA Technical Reports Server (NTRS)

Shaddock, Daniel; Ware, Brent; Lay, Oliver; Dubovitsky, Serge

2010-01-01

Spurious interference limits the performance of many interferometric measurements. Digitally enhanced interferometry (DEI) improves measurement sensitivity by augmenting conventional heterodyne interferometry with pseudo-random noise (PRN) code phase modulation. DEI effectively changes the measurement problem from one of hardware (optics, electronics), which may deteriorate over time, to one of software (modulation, digital signal processing), which does not. DEI isolates interferometric signals based on their delay. Interferometric signals are effectively time-tagged by phase-modulating the laser source with a PRN code. DEI improves measurement sensitivity by exploiting the autocorrelation properties of the PRN to isolate only the signal of interest and reject spurious interference. The properties of the PRN code determine the degree of isolation.

Noncoherent sampling technique for communications parameter estimations

NASA Technical Reports Server (NTRS)

Su, Y. T.; Choi, H. J.

1985-01-01

This paper presents a method of noncoherent demodulation of the PSK signal for signal distortion analysis at the RF interface. The received RF signal is downconverted and noncoherently sampled for further off-line processing. Any mismatch in phase and frequency is then compensated for by the software using the estimation techniques to extract the baseband waveform, which is needed in measuring various signal parameters. In this way, various kinds of modulated signals can be treated uniformly, independent of modulation format, and additional distortions introduced by the receiver or the hardware measurement instruments can thus be eliminated. Quantization errors incurred by digital sampling and ensuing software manipulations are analyzed and related numerical results are presented also.

Cellular computational platform and neurally inspired elements thereof

DOEpatents

Okandan, Murat

2016-11-22

A cellular computational platform is disclosed that includes a multiplicity of functionally identical, repeating computational hardware units that are interconnected electrically and optically. Each computational hardware unit includes a reprogrammable local memory and has interconnections to other such units that have reconfigurable weights. Each computational hardware unit is configured to transmit signals into the network for broadcast in a protocol-less manner to other such units in the network, and to respond to protocol-less broadcast messages that it receives from the network. Each computational hardware unit is further configured to reprogram the local memory in response to incoming electrical and/or optical signals.

Hardware-in-the-loop tow missile system simulator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Waldman, G.S.; Wootton, J.R.; Hobson, G.L.

1993-07-06

A missile system simulator is described for use in training people for target acquisition, missile launch, and missile guidance under simulated battlefield conditions comprising: simulating means for producing a digital signal representing a simulated battlefield environment including at least one target movable therewithin, the simulating means generating an infrared map representing the field-of-view and the target; interface means for converting said digital signals to an infrared image; missile system hardware including the missile acquisition, tracking, and guidance portions thereof, said hardware sensing the infrared image to determine the location of the target in a field-of-view; and, image means for generatingmore » an infrared image of a missile launched at the target and guided thereto, the image means imposing the missile image onto the field-of-view for the missile hardware to acquire the image of the missile in addition to that of the target, and to generate guidance signals to guide the missile image to the target image, wherein the interfacing means is responsive to a guidance signal from the hardware to simulate, in real-time, the response of the missile to the guidance signal, the image means including a blackbody, laser means for irradiating the blackbody to heat it to a temperature at which it emits infrared radiation, and optic means for integrating the radiant image produced by heating the blackbody into the infrared map.« less

Frame Decoder for Consultative Committee for Space Data Systems (CCSDS)

NASA Technical Reports Server (NTRS)

Reyes, Miguel A. De Jesus

2014-01-01

GNU Radio is a free and open source development toolkit that provides signal processing to implement software radios. It can be used with low-cost external RF hardware to create software defined radios, or without hardware in a simulation-like environment. GNU Radio applications are primarily written in Python and C++. The Universal Software Radio Peripheral (USRP) is a computer-hosted software radio designed by Ettus Research. The USRP connects to a host computer via high-speed Gigabit Ethernet. Using the open source Universal Hardware Driver (UHD), we can run GNU Radio applications using the USRP. An SDR is a "radio in which some or all physical layer functions are software defined"(IEEE Definition). A radio is any kind of device that wirelessly transmits or receives radio frequency (RF) signals in the radio frequency. An SDR is a radio communication system where components that have been typically implemented in hardware are implemented in software. GNU Radio has a generic packet decoder block that is not optimized for CCSDS frames. Using this generic packet decoder will add bytes to the CCSDS frames and will not permit for bit error correction using Reed-Solomon. The CCSDS frames consist of 256 bytes, including a 32-bit sync marker (0x1ACFFC1D). This frames are generated by the Space Data Processor and GNU Radio will perform the modulation and framing operations, including frame synchronization.

Generation of optical OFDM signals using 21.4 GS/s real time digital signal processing.

PubMed

Benlachtar, Yannis; Watts, Philip M; Bouziane, Rachid; Milder, Peter; Rangaraj, Deepak; Cartolano, Anthony; Koutsoyannis, Robert; Hoe, James C; Püschel, Markus; Glick, Madeleine; Killey, Robert I

2009-09-28

We demonstrate a field programmable gate array (FPGA) based optical orthogonal frequency division multiplexing (OFDM) transmitter implementing real time digital signal processing at a sample rate of 21.4 GS/s. The QPSK-OFDM signal is generated using an 8 bit, 128 point inverse fast Fourier transform (IFFT) core, performing one transform per clock cycle at a clock speed of 167.2 MHz and can be deployed with either a direct-detection or a coherent receiver. The hardware design and the main digital signal processing functions are described, and we show that the main performance limitation is due to the low (4-bit) resolution of the digital-to-analog converter (DAC) and the 8-bit resolution of the IFFT core used. We analyze the back-to-back performance of the transmitter generating an 8.36 Gb/s optical single sideband (SSB) OFDM signal using digital up-conversion, suitable for direct-detection. Additionally, we use the device to transmit 8.36 Gb/s SSB OFDM signals over 200 km of uncompensated standard single mode fiber achieving an overall BER<10(-3).

Neuroimaging of Human Balance Control: A Systematic Review

PubMed Central

Wittenberg, Ellen; Thompson, Jessica; Nam, Chang S.; Franz, Jason R.

2017-01-01

This review examined 83 articles using neuroimaging modalities to investigate the neural correlates underlying static and dynamic human balance control, with aims to support future mobile neuroimaging research in the balance control domain. Furthermore, this review analyzed the mobility of the neuroimaging hardware and research paradigms as well as the analytical methodology to identify and remove movement artifact in the acquired brain signal. We found that the majority of static balance control tasks utilized mechanical perturbations to invoke feet-in-place responses (27 out of 38 studies), while cognitive dual-task conditions were commonly used to challenge balance in dynamic balance control tasks (20 out of 32 studies). While frequency analysis and event related potential characteristics supported enhanced brain activation during static balance control, that in dynamic balance control studies was supported by spatial and frequency analysis. Twenty-three of the 50 studies utilizing EEG utilized independent component analysis to remove movement artifacts from the acquired brain signals. Lastly, only eight studies used truly mobile neuroimaging hardware systems. This review provides evidence to support an increase in brain activation in balance control tasks, regardless of mechanical, cognitive, or sensory challenges. Furthermore, the current body of literature demonstrates the use of advanced signal processing methodologies to analyze brain activity during movement. However, the static nature of neuroimaging hardware and conventional balance control paradigms prevent full mobility and limit our knowledge of neural mechanisms underlying balance control. PMID:28443007

Global synchronization of parallel processors using clock pulse width modulation

DOEpatents

Chen, Dong; Ellavsky, Matthew R.; Franke, Ross L.; Gara, Alan; Gooding, Thomas M.; Haring, Rudolf A.; Jeanson, Mark J.; Kopcsay, Gerard V.; Liebsch, Thomas A.; Littrell, Daniel; Ohmacht, Martin; Reed, Don D.; Schenck, Brandon E.; Swetz, Richard A.

2013-04-02

A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. Current standards were researched and new standard interfaces were proposed. The implementation of the proposed standard interfaces on a laboratory breadboard SDR will be presented.

ICE: A Scalable, Low-Cost FPGA-Based Telescope Signal Processing and Networking System

NASA Astrophysics Data System (ADS)

Bandura, K.; Bender, A. N.; Cliche, J. F.; de Haan, T.; Dobbs, M. A.; Gilbert, A. J.; Griffin, S.; Hsyu, G.; Ittah, D.; Parra, J. Mena; Montgomery, J.; Pinsonneault-Marotte, T.; Siegel, S.; Smecher, G.; Tang, Q. Y.; Vanderlinde, K.; Whitehorn, N.

2016-03-01

We present an overview of the ‘ICE’ hardware and software framework that implements large arrays of interconnected field-programmable gate array (FPGA)-based data acquisition, signal processing and networking nodes economically. The system was conceived for application to radio, millimeter and sub-millimeter telescope readout systems that have requirements beyond typical off-the-shelf processing systems, such as careful control of interference signals produced by the digital electronics, and clocking of all elements in the system from a single precise observatory-derived oscillator. A new generation of telescopes operating at these frequency bands and designed with a vastly increased emphasis on digital signal processing to support their detector multiplexing technology or high-bandwidth correlators — data rates exceeding a terabyte per second — are becoming common. The ICE system is built around a custom FPGA motherboard that makes use of an Xilinx Kintex-7 FPGA and ARM-based co-processor. The system is specialized for specific applications through software, firmware and custom mezzanine daughter boards that interface to the FPGA through the industry-standard FPGA mezzanine card (FMC) specifications. For high density applications, the motherboards are packaged in 16-slot crates with ICE backplanes that implement a low-cost passive full-mesh network between the motherboards in a crate, allow high bandwidth interconnection between crates and enable data offload to a computer cluster. A Python-based control software library automatically detects and operates the hardware in the array. Examples of specific telescope applications of the ICE framework are presented, namely the frequency-multiplexed bolometer readout systems used for the South Pole Telescope (SPT) and Simons Array and the digitizer, F-engine, and networking engine for the Canadian Hydrogen Intensity Mapping Experiment (CHIME) and Hydrogen Intensity and Real-time Analysis eXperiment (HIRAX) radio interferometers.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-06-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-11-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Naval sensor data database (NSDD)

NASA Astrophysics Data System (ADS)

Robertson, Candace J.; Tubridy, Lisa H.

1999-08-01

The Naval Sensor Data database (NSDD) is a multi-year effort to archive, catalogue, and disseminate data from all types of sensors to the mine warfare, signal and image processing, and sensor development communities. The purpose is to improve and accelerate research and technology. Providing performers with the data required to develop and validate improvements in hardware, simulation, and processing will foster advances in sensor and system performance. The NSDD will provide a centralized source of sensor data in its associated ground truth, which will support an improved understanding will be benefited in the areas of signal processing, computer-aided detection and classification, data compression, data fusion, and geo-referencing, as well as sensor and sensor system design.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Teaching computer interfacing with virtual instruments in an object-oriented language.

PubMed Central

Gulotta, M

1995-01-01

LabVIEW is a graphic object-oriented computer language developed to facilitate hardware/software communication. LabVIEW is a complete computer language that can be used like Basic, FORTRAN, or C. In LabVIEW one creates virtual instruments that aesthetically look like real instruments but are controlled by sophisticated computer programs. There are several levels of data acquisition VIs that make it easy to control data flow, and many signal processing and analysis algorithms come with the software as premade VIs. In the classroom, the similarity between virtual and real instruments helps students understand how information is passed between the computer and attached instruments. The software may be used in the absence of hardware so that students can work at home as well as in the classroom. This article demonstrates how LabVIEW can be used to control data flow between computers and instruments, points out important features for signal processing and analysis, and shows how virtual instruments may be used in place of physical instrumentation. Applications of LabVIEW to the teaching laboratory are also discussed, and a plausible course outline is given. PMID:8580361

Design and Testing of Space Telemetry SCA Waveform

NASA Technical Reports Server (NTRS)

Mortensen, Dale J.; Handler, Louis M.; Quinn, Todd M.

2006-01-01

A Software Communications Architecture (SCA) Waveform for space telemetry is being developed at the NASA Glenn Research Center (GRC). The space telemetry waveform is implemented in a laboratory testbed consisting of general purpose processors, field programmable gate arrays (FPGAs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). The radio hardware is integrated with an SCA Core Framework and other software development tools. The waveform design is described from both the bottom-up signal processing and top-down software component perspectives. Simulations and model-based design techniques used for signal processing subsystems are presented. Testing with legacy hardware-based modems verifies proper design implementation and dynamic waveform operations. The waveform development is part of an effort by NASA to define an open architecture for space based reconfigurable transceivers. Use of the SCA as a reference has increased understanding of software defined radio architectures. However, since space requirements put a premium on size, mass, and power, the SCA may be impractical for today s space ready technology. Specific requirements for an SCA waveform and other lessons learned from this development are discussed.

Teaching computer interfacing with virtual instruments in an object-oriented language.

PubMed

Gulotta, M

1995-11-01

LabVIEW is a graphic object-oriented computer language developed to facilitate hardware/software communication. LabVIEW is a complete computer language that can be used like Basic, FORTRAN, or C. In LabVIEW one creates virtual instruments that aesthetically look like real instruments but are controlled by sophisticated computer programs. There are several levels of data acquisition VIs that make it easy to control data flow, and many signal processing and analysis algorithms come with the software as premade VIs. In the classroom, the similarity between virtual and real instruments helps students understand how information is passed between the computer and attached instruments. The software may be used in the absence of hardware so that students can work at home as well as in the classroom. This article demonstrates how LabVIEW can be used to control data flow between computers and instruments, points out important features for signal processing and analysis, and shows how virtual instruments may be used in place of physical instrumentation. Applications of LabVIEW to the teaching laboratory are also discussed, and a plausible course outline is given.

An open-hardware platform for optogenetics and photobiology

PubMed Central

Gerhardt, Karl P.; Olson, Evan J.; Castillo-Hair, Sebastian M.; Hartsough, Lucas A.; Landry, Brian P.; Ekness, Felix; Yokoo, Rayka; Gomez, Eric J.; Ramakrishnan, Prabha; Suh, Junghae; Savage, David F.; Tabor, Jeffrey J.

2016-01-01

In optogenetics, researchers use light and genetically encoded photoreceptors to control biological processes with unmatched precision. However, outside of neuroscience, the impact of optogenetics has been limited by a lack of user-friendly, flexible, accessible hardware. Here, we engineer the Light Plate Apparatus (LPA), a device that can deliver two independent 310 to 1550 nm light signals to each well of a 24-well plate with intensity control over three orders of magnitude and millisecond resolution. Signals are programmed using an intuitive web tool named Iris. All components can be purchased for under $400 and the device can be assembled and calibrated by a non-expert in one day. We use the LPA to precisely control gene expression from blue, green, and red light responsive optogenetic tools in bacteria, yeast, and mammalian cells and simplify the entrainment of cyanobacterial circadian rhythm. The LPA dramatically reduces the entry barrier to optogenetics and photobiology experiments. PMID:27805047

An open-hardware platform for optogenetics and photobiology

DOE PAGES

Gerhardt, Karl P.; Olson, Evan J.; Castillo-Hair, Sebastian M.; ...

2016-11-02

In optogenetics, researchers use light and genetically encoded photoreceptors to control biological processes with unmatched precision. However, outside of neuroscience, the impact of optogenetics has been limited by a lack of user-friendly, flexible, accessible hardware. Here, we engineer the Light Plate Apparatus (LPA), a device that can deliver two independent 310 to 1550 nm light signals to each well of a 24-well plate with intensity control over three orders of magnitude and millisecond resolution. Signals are programmed using an intuitive web tool named Iris. All components can be purchased for under $400 and the device can be assembled and calibratedmore » by a non-expert in one day. We use the LPA to precisely control gene expression from blue, green, and red light responsive optogenetic tools in bacteria, yeast, and mammalian cells and simplify the entrainment of cyanobacterial circadian rhythm. Lastly, the LPA dramatically reduces the entry barrier to optogenetics and photobiology experiments.« less

Highly Reconfigurable Beamformer Stimulus Generator

NASA Astrophysics Data System (ADS)

Vaviļina, E.; Gaigals, G.

2018-02-01

The present paper proposes a highly reconfigurable beamformer stimulus generator of radar antenna array, which includes three main blocks: settings of antenna array, settings of objects (signal sources) and a beamforming simulator. Following from the configuration of antenna array and object settings, different stimulus can be generated as the input signal for a beamformer. This stimulus generator is developed under a greater concept with two utterly independent paths where one is the stimulus generator and the other is the hardware beamformer. Both paths can be complemented in final and in intermediate steps as well to check and improve system performance. This way the technology development process is promoted by making each of the future hardware steps more substantive. Stimulus generator configuration capabilities and test results are presented proving the application of the stimulus generator for FPGA based beamforming unit development and tuning as an alternative to an actual antenna system.

An open-hardware platform for optogenetics and photobiology.

PubMed

Gerhardt, Karl P; Olson, Evan J; Castillo-Hair, Sebastian M; Hartsough, Lucas A; Landry, Brian P; Ekness, Felix; Yokoo, Rayka; Gomez, Eric J; Ramakrishnan, Prabha; Suh, Junghae; Savage, David F; Tabor, Jeffrey J

2016-11-02

In optogenetics, researchers use light and genetically encoded photoreceptors to control biological processes with unmatched precision. However, outside of neuroscience, the impact of optogenetics has been limited by a lack of user-friendly, flexible, accessible hardware. Here, we engineer the Light Plate Apparatus (LPA), a device that can deliver two independent 310 to 1550 nm light signals to each well of a 24-well plate with intensity control over three orders of magnitude and millisecond resolution. Signals are programmed using an intuitive web tool named Iris. All components can be purchased for under $400 and the device can be assembled and calibrated by a non-expert in one day. We use the LPA to precisely control gene expression from blue, green, and red light responsive optogenetic tools in bacteria, yeast, and mammalian cells and simplify the entrainment of cyanobacterial circadian rhythm. The LPA dramatically reduces the entry barrier to optogenetics and photobiology experiments.

An open-hardware platform for optogenetics and photobiology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gerhardt, Karl P.; Olson, Evan J.; Castillo-Hair, Sebastian M.

In optogenetics, researchers use light and genetically encoded photoreceptors to control biological processes with unmatched precision. However, outside of neuroscience, the impact of optogenetics has been limited by a lack of user-friendly, flexible, accessible hardware. Here, we engineer the Light Plate Apparatus (LPA), a device that can deliver two independent 310 to 1550 nm light signals to each well of a 24-well plate with intensity control over three orders of magnitude and millisecond resolution. Signals are programmed using an intuitive web tool named Iris. All components can be purchased for under $400 and the device can be assembled and calibratedmore » by a non-expert in one day. We use the LPA to precisely control gene expression from blue, green, and red light responsive optogenetic tools in bacteria, yeast, and mammalian cells and simplify the entrainment of cyanobacterial circadian rhythm. Lastly, the LPA dramatically reduces the entry barrier to optogenetics and photobiology experiments.« less

Optical field encryption for secure transmission of data

NASA Astrophysics Data System (ADS)

Fraser, Colin B.; Harvey, Andrew R.

2004-12-01

The growing awareness of the vulnerability of information transmitted on communication systems within the government, military and commercial sectors, has stimulated a number of areas of research within the optical community to design optical hardware encryption systems providing inherent immunity to espionage techniques. This paper describes a hardware optical encryption technique that utilises off the shelf telecommunication equipment and negates the necessity for an independent key distribution system with respect to the data transmission system, as is common with alternative encryption system implementations. This method also lends itself easily to fiber optic or free space communication and is applicable within any optical waveband. The encryption-decryption of the optical signal is achieved through low coherence optical interferometry. This requires the instantaneous processing and analysis of the signal, optically, to retrieve the relevant optical phase information hidden in the transmitted optical noise. This technology allows an authorised user to transmit encrypted information at a high data rate securely, while maintaining opaqueness to an unauthorised observer that data transmission is occurring. As the instantaneous optical field properties of the signals present in the system are essential to the optical encryption - decryption process, the system is inherently protected against electronic recording and advances in computational decryption algorithms. For organisations wishing to protect sensitive data and levels of communication activity these are highly desirable features.

BPSK Demodulation Using Digital Signal Processing

NASA Technical Reports Server (NTRS)

Garcia, Thomas R.

1996-01-01

A digital communications signal is a sinusoidal waveform that is modified by a binary (digital) information signal. The sinusoidal waveform is called the carrier. The carrier may be modified in amplitude, frequency, phase, or a combination of these. In this project a binary phase shift keyed (BPSK) signal is the communication signal. In a BPSK signal the phase of the carrier is set to one of two states, 180 degrees apart, by a binary (i.e., 1 or 0) information signal. A digital signal is a sampled version of a "real world" time continuous signal. The digital signal is generated by sampling the continuous signal at discrete points in time. The rate at which the signal is sampled is called the sampling rate (f(s)). The device that performs this operation is called an analog-to-digital (A/D) converter or a digitizer. The digital signal is composed of the sequence of individual values of the sampled BPSK signal. Digital signal processing (DSP) is the modification of the digital signal by mathematical operations. A device that performs this processing is called a digital signal processor. After processing, the digital signal may then be converted back to an analog signal using a digital-to-analog (D/A) converter. The goal of this project is to develop a system that will recover the digital information from a BPSK signal using DSP techniques. The project is broken down into the following steps: (1) Development of the algorithms required to demodulate the BPSK signal; (2) Simulation of the system; and (3) Implementation a BPSK receiver using digital signal processing hardware.

Application of the GNU Radio platform in the multistatic radar

NASA Astrophysics Data System (ADS)

Szlachetko, Boguslaw; Lewandowski, Andrzej

2009-06-01

This document presents the application of the Software Defined Radio-based platform in the multistatic radar. This platform consists of four-sensor linear antenna, Universal Software Radio Peripheral (USRP) hardware (radio frequency frontend) and GNU-Radio PC software. The paper provides information about architecture of digital signal processing performed by USRP's FPGA (digital down converting blocks) and PC host (implementation of the multichannel digital beamforming). The preliminary results of the signal recording performed by our experimental platform are presented.

Combined Cycle Engine Large-Scale Inlet for Mode Transition Experiments: System Identification Rack Hardware Design

NASA Technical Reports Server (NTRS)

Thomas, Randy; Stueber, Thomas J.

2013-01-01

The System Identification (SysID) Rack is a real-time hardware-in-the-loop data acquisition (DAQ) and control instrument rack that was designed and built to support inlet testing in the NASA Glenn Research Center 10- by 10-Foot Supersonic Wind Tunnel. This instrument rack is used to support experiments on the Combined-Cycle Engine Large-Scale Inlet for Mode Transition Experiment (CCE? LIMX). The CCE?LIMX is a testbed for an integrated dual flow-path inlet configuration with the two flow paths in an over-and-under arrangement such that the high-speed flow path is located below the lowspeed flow path. The CCE?LIMX includes multiple actuators that are designed to redirect airflow from one flow path to the other; this action is referred to as "inlet mode transition." Multiple phases of experiments have been planned to support research that investigates inlet mode transition: inlet characterization (Phase-1) and system identification (Phase-2). The SysID Rack hardware design met the following requirements to support Phase-1 and Phase-2 experiments: safely and effectively move multiple actuators individually or synchronously; sample and save effector control and position sensor feedback signals; automate control of actuator positioning based on a mode transition schedule; sample and save pressure sensor signals; and perform DAQ and control processes operating at 2.5 KHz. This document describes the hardware components used to build the SysID Rack including their function, specifications, and system interface. Furthermore, provided in this document are a SysID Rack effectors signal list (signal flow); system identification experiment setup; illustrations indicating a typical SysID Rack experiment; and a SysID Rack performance overview for Phase-1 and Phase-2 experiments. The SysID Rack described in this document was a useful tool to meet the project objectives.

Architectural design for a low cost FPGA-based traffic signal detection system in vehicles

NASA Astrophysics Data System (ADS)

López, Ignacio; Salvador, Rubén; Alarcón, Jaime; Moreno, Félix

2007-05-01

In this paper we propose an architecture for an embedded traffic signal detection system. Development of Advanced Driver Assistance Systems (ADAS) is one of the major trends of research in automotion nowadays. Examples of past and ongoing projects in the field are CHAMELEON ("Pre-Crash Application all around the vehicle" IST 1999-10108), PREVENT (Preventive and Active Safety Applications, FP6-507075, http://www.prevent-ip.org/) and AVRT in the US (Advanced Vision-Radar Threat Detection (AVRT): A Pre-Crash Detection and Active Safety System). It can be observed a major interest in systems for real-time analysis of complex driving scenarios, evaluating risk and anticipating collisions. The system will use a low cost CCD camera on the dashboard facing the road. The images will be processed by an Altera Cyclone family FPGA. The board does median and Sobel filtering of the incoming frames at PAL rate, and analyzes them for several categories of signals. The result is conveyed to the driver. The scarce resources provided by the hardware require an architecture developed for optimal use. The system will use a combination of neural networks and an adapted blackboard architecture. Several neural networks will be used in sequence for image analysis, by reconfiguring a single, generic hardware neural network in the FPGA. This generic network is optimized for speed, in order to admit several executions within the frame rate. The sequence will follow the execution cycle of the blackboard architecture. The global, blackboard architecture being developed and the hardware architecture for the generic, reconfigurable FPGA perceptron will be explained in this paper. The project is still at an early stage. However, some hardware implementation results are already available and will be offered in the paper.

Optimum SNR data compression in hardware using an Eigencoil array.

PubMed

King, Scott B; Varosi, Steve M; Duensing, G Randy

2010-05-01

With the number of receivers available on clinical MRI systems now ranging from 8 to 32 channels, data compression methods are being explored to lessen the demands on the computer for data handling and processing. Although software-based methods of compression after reception lessen computational requirements, a hardware-based method before the receiver also reduces the number of receive channels required. An eight-channel Eigencoil array is constructed by placing a hardware radiofrequency signal combiner inline after preamplification, before the receiver system. The Eigencoil array produces signal-to-noise ratio (SNR) of an optimal reconstruction using a standard sum-of-squares reconstruction, with peripheral SNR gains of 30% over the standard array. The concept of "receiver channel reduction" or MRI data compression is demonstrated, with optimal SNR using only four channels, and with a three-channel Eigencoil, superior sum-of-squares SNR was achieved over the standard eight-channel array. A three-channel Eigencoil portion of a product neurovascular array confirms in vivo SNR performance and demonstrates parallel MRI up to R = 3. This SNR-preserving data compression method advantageously allows users of MRI systems with fewer receiver channels to achieve the SNR of higher-channel MRI systems. (c) 2010 Wiley-Liss, Inc.

A novel digital pulse processing architecture for nuclear instrumentation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moline, Yoann; Thevenin, Mathieu; Corre, Gwenole

The field of nuclear instrumentation covers a wide range of applications, including counting, spectrometry, pulse shape discrimination and multi-channel coincidence. These applications are the topic of many researches, new algorithms and implementations are constantly proposed thanks to advances in digital signal processing. However, these improvements are not yet implemented in instrumentation devices. This is especially true for neutron-gamma discrimination applications which traditionally use charge comparison method while literature proposes other algorithms based on frequency domain or wavelet theory which show better performances. Another example is pileups which are generally rejected while pileup correction algorithms also exist. These processes are traditionallymore » performed offline due to two issues. The first is the Poissonian characteristic of the signal, composed of random arrival pulses which requires to current architectures to work in data flow. The second is the real-time requirement, which implies losing pulses when the pulse rate is too high. Despite the possibility of treating the pulses independently from each other, current architectures paralyze the acquisition of the signal during the processing of a pulse. This loss is called dead-time. These two issues have led current architectures to use dedicated solutions based on re-configurable components like Field Programmable Gate Arrays (FPGAs) to overcome the need of performance necessary to deal with dead-time. However, dedicated hardware algorithm implementations on re-configurable technologies are complex and time-consuming. For all these reasons, a programmable Digital pulse Processing (DPP) architecture in a high level language such as Cor C++ which can reduce dead-time would be worthwhile for nuclear instrumentation. This would reduce prototyping and test duration by reducing the level of hardware expertise to implement new algorithms. However, today's programmable solutions do not meet the need of performance to operate online and not allow scaling with the increase in the number of measurement channel. That is why an innovative DPP architecture is proposed in this paper. This architecture is able to overcome dead-time while being programmable and is flexible with the number of measurement channel. Proposed architecture is based on an innovative execution model for pulse processing applications which can be summarized as follow. The signal is not composed of pulses only, consequently, pulses processing does not have to operate on the entire signal. Therefore, the first step of our proposal is pulse extraction by the use of dedicated components named pulse extractors. The triggering step can be achieved after the analog-to-digital conversion without any signal shaping or filtering stages. Pileup detection and accurate pulse time stamping are done at this stage. Any application downstream this step can work on adaptive variable-sized array of samples simplifying pulse processing methods. Then, once the data flow is broken, it is possible to distribute pulses on Functional Units (FUs) which perform processing. As the date of each pulse is known, they can be processed individually out-of-order to provide the results. To manage the pulses distribution, a scheduler and an interconnection network are used. pulses are distributed on the first FU which is not busy without congesting the interconnection network. For this reason, the process duration does not result anymore in dead-time if there are enough FUs. FUs are designed to be standalone and to comprises at least a programmable general purpose processor (ARM, Microblaze) allowing the implementation of complex algorithms without any modification of the hardware. An acquisition chain is composed of a succession of algorithms which lead to organize our FUs as a software macro-pipeline, A simple approach consists in assigning one algorithm per FU. Consequently, the global latency becomes the worst latency of algorithms execution on FU. Moreover, as algorithms are executed locally - i.e. on a FU - this approach limits shared memory requirement. To handle multichannel, we propose FUs sharing, this approach maximize the chance to find a non-busy FU to process an incoming pulse. This is possible since each channel receive random event independently, the pulse extractors associated to them do not necessarily need to access simultaneously to all Computing resources at the same time to distribute their pulses. The major contribution of this paper is the proposition of an execution model and its associated hardware programmable architecture for digital pulse processing that can handle multiple acquisition channels while maintaining the scalability thanks to the use of shared resources. This execution model and associated architecture are validated by simulation of a cycle accurate architecture SystemC model. Proposed architecture shows promising results in terms of scalability while maintaining zero dead-time. This work also permit the sizing of hardware resources requirement required for a predefined set of applications. Future work will focus on the interconnection network and a scheduling policy that can exploit the variable-length of pulses. Then, the hardware implementation of this architecture will be performed and tested for a representative set of application.« less

High Frequency Sampling of TTL Pulses on a Raspberry Pi for Diffuse Correlation Spectroscopy Applications.

PubMed

Tivnan, Matthew; Gurjar, Rajan; Wolf, David E; Vishwanath, Karthik

2015-08-12

Diffuse Correlation Spectroscopy (DCS) is a well-established optical technique that has been used for non-invasive measurement of blood flow in tissues. Instrumentation for DCS includes a correlation device that computes the temporal intensity autocorrelation of a coherent laser source after it has undergone diffuse scattering through a turbid medium. Typically, the signal acquisition and its autocorrelation are performed by a correlation board. These boards have dedicated hardware to acquire and compute intensity autocorrelations of rapidly varying input signal and usually are quite expensive. Here we show that a Raspberry Pi minicomputer can acquire and store a rapidly varying time-signal with high fidelity. We show that this signal collected by a Raspberry Pi device can be processed numerically to yield intensity autocorrelations well suited for DCS applications. DCS measurements made using the Raspberry Pi device were compared to those acquired using a commercial hardware autocorrelation board to investigate the stability, performance, and accuracy of the data acquired in controlled experiments. This paper represents a first step toward lowering the instrumentation cost of a DCS system and may offer the potential to make DCS become more widely used in biomedical applications.

High Frequency Sampling of TTL Pulses on a Raspberry Pi for Diffuse Correlation Spectroscopy Applications

PubMed Central

Tivnan, Matthew; Gurjar, Rajan; Wolf, David E.; Vishwanath, Karthik

2015-01-01

Diffuse Correlation Spectroscopy (DCS) is a well-established optical technique that has been used for non-invasive measurement of blood flow in tissues. Instrumentation for DCS includes a correlation device that computes the temporal intensity autocorrelation of a coherent laser source after it has undergone diffuse scattering through a turbid medium. Typically, the signal acquisition and its autocorrelation are performed by a correlation board. These boards have dedicated hardware to acquire and compute intensity autocorrelations of rapidly varying input signal and usually are quite expensive. Here we show that a Raspberry Pi minicomputer can acquire and store a rapidly varying time-signal with high fidelity. We show that this signal collected by a Raspberry Pi device can be processed numerically to yield intensity autocorrelations well suited for DCS applications. DCS measurements made using the Raspberry Pi device were compared to those acquired using a commercial hardware autocorrelation board to investigate the stability, performance, and accuracy of the data acquired in controlled experiments. This paper represents a first step toward lowering the instrumentation cost of a DCS system and may offer the potential to make DCS become more widely used in biomedical applications. PMID:26274961

Laser pulse coded signal frequency measuring device based on DSP and CPLD

NASA Astrophysics Data System (ADS)

Zhang, Hai-bo; Cao, Li-hua; Geng, Ai-hui; Li, Yan; Guo, Ru-hai; Wang, Ting-feng

2011-06-01

Laser pulse code is an anti-jamming measures used in semi-active laser guided weapons. On account of the laser-guided signals adopting pulse coding mode and the weak signal processing, it need complex calculations in the frequency measurement process according to the laser pulse code signal time correlation to meet the request in optoelectronic countermeasures in semi-active laser guided weapons. To ensure accurately completing frequency measurement in a short time, it needed to carry out self-related process with the pulse arrival time series composed of pulse arrival time, calculate the signal repetition period, and then identify the letter type to achieve signal decoding from determining the time value, number and rank number in a signal cycle by Using CPLD and DSP for signal processing chip, designing a laser-guided signal frequency measurement in the pulse frequency measurement device, improving the signal processing capability through the appropriate software algorithms. In this article, we introduced the principle of frequency measurement of the device, described the hardware components of the device, the system works and software, analyzed the impact of some system factors on the accuracy of the measurement. The experimental results indicated that this system improve the accuracy of the measurement under the premise of volume, real-time, anti-interference, low power of the laser pulse frequency measuring device. The practicality of the design, reliability has been demonstrated from the experimental point of view.

The signal extraction of fetal heart rate based on wavelet transform and BP neural network

NASA Astrophysics Data System (ADS)

Yang, Xiao Hong; Zhang, Bang-Cheng; Fu, Hu Dai

2005-04-01

This paper briefly introduces the collection and recognition of bio-medical signals, designs the method to collect FM signals. A detailed discussion on the system hardware, structure and functions is also given. Under LabWindows/CVI,the hardware and the driver do compatible, the hardware equipment work properly actively. The paper adopts multi threading technology for real-time analysis and makes use of latency time of CPU effectively, expedites program reflect speed, improves the program to perform efficiency. One threading is collecting data; the other threading is analyzing data. Using the method, it is broaden to analyze the signal in real-time. Wavelet transform to remove the main interference in the FM and by adding time-window to recognize with BP network; Finally the results of collecting signals and BP networks are discussed. 8 pregnant women's signals of FM were collected successfully by using the sensor. The correctness rate of BP network recognition is about 83.3% by using the above measure.

Application of SNMP on CATV

NASA Astrophysics Data System (ADS)

Huang, Hong-bin; Liu, Wei-ping; Chen, Shun-er; Zheng, Liming

2005-02-01

A new type of CATV network management system developed by universal MCU, which supports SNMP, is proposed in this paper. From the point of view in both hardware and software, the function and method of every modules inside the system, which include communications in the physical layer, protocol process, data process, and etc, are analyzed. In our design, the management system takes IP MAN as data transmission channel and every controlled object in the management structure has a SNMP agent. In the SNMP agent developed, there are four function modules, including physical layer communication module, protocol process module, internal data process module and MIB management module. In the paper, the structure and function of every module are designed and demonstrated while the related hardware circuit, software flow as well as the experimental results are tested. Furthermore, by introducing RTOS into the software programming, the universal MCU procedure can conducts such multi-thread management as fast Ethernet controller driving, TCP/IP process, serial port signal monitoring and so on, which greatly improves efficiency of CPU.

Development of multichannel analyzer using sound card ADC for nuclear spectroscopy system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ibrahim, Maslina Mohd; Yussup, Nolida; Lombigit, Lojius

This paper describes the development of Multi-Channel Analyzer (MCA) using sound card analogue to digital converter (ADC) for nuclear spectroscopy system. The system was divided into a hardware module and a software module. Hardware module consist of detector NaI (Tl) 2” by 2”, Pulse Shaping Amplifier (PSA) and a build in ADC chip from readily available in any computers’ sound system. The software module is divided into two parts which are a pre-processing of raw digital input and the development of the MCA software. Band-pass filter and baseline stabilization and correction were implemented for the pre-processing. For the MCA development,more » the pulse height analysis method was used to process the signal before displaying it using histogram technique. The development and tested result for using the sound card as an MCA are discussed.« less

Smart wireless sensor for physiological monitoring.

PubMed

Tomasic, Ivan; Avbelj, Viktor; Trobec, Roman

2015-01-01

Presented is a wireless body sensor capable of measuring local potential differences on a body surface. By using on-sensor signal processing capabilities, and developed algorithms for off-line signal processing on a personal computing device, it is possible to record single channel ECG, heart rate, breathing rate, EMG, and when three sensors are applied, even the 12-lead ECG. The sensor is portable, unobtrusive, and suitable for both inpatient and outpatient monitoring. The paper presents the sensor's hardware and results of power consumption analysis. The sensor's capabilities of recording various physiological parameters are also presented and illustrated. The paper concludes with envisioned sensor's future developments and prospects.

The software system development for the TAMU real-time fan beam scatterometer data processors

NASA Technical Reports Server (NTRS)

Clark, B. V.; Jean, B. R.

1980-01-01

A software package was designed and written to process in real-time any one quadrature channel pair of radar scatterometer signals form the NASA L- or C-Band radar scatterometer systems. The software was successfully tested in the C-Band processor breadboard hardware using recorded radar and NERDAS (NASA Earth Resources Data Annotation System) signals as the input data sources. The processor development program and the overall processor theory of operation and design are described. The real-time processor software system is documented and the results of the laboratory software tests, and recommendations for the efficient application of the data processing capabilities are presented.

Fpga based L-band pulse doppler radar design and implementation

NASA Astrophysics Data System (ADS)

Savci, Kubilay

As its name implies RADAR (Radio Detection and Ranging) is an electromagnetic sensor used for detection and locating targets from their return signals. Radar systems propagate electromagnetic energy, from the antenna which is in part intercepted by an object. Objects reradiate a portion of energy which is captured by the radar receiver. The received signal is then processed for information extraction. Radar systems are widely used for surveillance, air security, navigation, weather hazard detection, as well as remote sensing applications. In this work, an FPGA based L-band Pulse Doppler radar prototype, which is used for target detection, localization and velocity calculation has been built and a general-purpose Pulse Doppler radar processor has been developed. This radar is a ground based stationary monopulse radar, which transmits a short pulse with a certain pulse repetition frequency (PRF). Return signals from the target are processed and information about their location and velocity is extracted. Discrete components are used for the transmitter and receiver chain. The hardware solution is based on Xilinx Virtex-6 ML605 FPGA board, responsible for the control of the radar system and the digital signal processing of the received signal, which involves Constant False Alarm Rate (CFAR) detection and Pulse Doppler processing. The algorithm is implemented in MATLAB/SIMULINK using the Xilinx System Generator for DSP tool. The field programmable gate arrays (FPGA) implementation of the radar system provides the flexibility of changing parameters such as the PRF and pulse length therefore it can be used with different radar configurations as well. A VHDL design has been developed for 1Gbit Ethernet connection to transfer digitized return signal and detection results to PC. An A-Scope software has been developed with C# programming language to display time domain radar signals and detection results on PC. Data are processed both in FPGA chip and on PC. FPGA uses fixed point arithmetic operations as it is fast and facilitates source requirement as it consumes less hardware than floating point arithmetic operations. The software uses floating point arithmetic operations, which ensure precision in processing at the expense of speed. The functionality of the radar system has been tested for experimental validation in the field with a moving car and the validation of submodules are tested with synthetic data simulated on MATLAB.

ALMA Correlator Real-Time Data Processor

NASA Astrophysics Data System (ADS)

Pisano, J.; Amestica, R.; Perez, J.

2005-10-01

The design of a real-time Linux application utilizing Real-Time Application Interface (RTAI) to process real-time data from the radio astronomy correlator for the Atacama Large Millimeter Array (ALMA) is described. The correlator is a custom-built digital signal processor which computes the cross-correlation function of two digitized signal streams. ALMA will have 64 antennas with 2080 signal streams each with a sample rate of 4 giga-samples per second. The correlator's aggregate data output will be 1 gigabyte per second. The software is defined by hard deadlines with high input and processing data rates, while requiring interfaces to non real-time external computers. The designed computer system - the Correlator Data Processor or CDP, consists of a cluster of 17 SMP computers, 16 of which are compute nodes plus a master controller node all running real-time Linux kernels. Each compute node uses an RTAI kernel module to interface to a 32-bit parallel interface which accepts raw data at 64 megabytes per second in 1 megabyte chunks every 16 milliseconds. These data are transferred to tasks running on multiple CPUs in hard real-time using RTAI's LXRT facility to perform quantization corrections, data windowing, FFTs, and phase corrections for a processing rate of approximately 1 GFLOPS. Highly accurate timing signals are distributed to all seventeen computer nodes in order to synchronize them to other time-dependent devices in the observatory array. RTAI kernel tasks interface to the timing signals providing sub-millisecond timing resolution. The CDP interfaces, via the master node, to other computer systems on an external intra-net for command and control, data storage, and further data (image) processing. The master node accesses these external systems utilizing ALMA Common Software (ACS), a CORBA-based client-server software infrastructure providing logging, monitoring, data delivery, and intra-computer function invocation. The software is being developed in tandem with the correlator hardware which presents software engineering challenges as the hardware evolves. The current status of this project and future goals are also presented.

Analog Signal Correlating Using an Analog-Based Signal Conditioning Front End

NASA Technical Reports Server (NTRS)

Prokop, Norman; Krasowski, Michael

2013-01-01

This innovation is capable of correlating two analog signals by using an analog-based signal conditioning front end to hard-limit the analog signals through adaptive thresholding into a binary bit stream, then performing the correlation using a Hamming "similarity" calculator function embedded in a one-bit digital correlator (OBDC). By converting the analog signal into a bit stream, the calculation of the correlation function is simplified, and less hardware resources are needed. This binary representation allows the hardware to move from a DSP where instructions are performed serially, into digital logic where calculations can be performed in parallel, greatly speeding up calculations.

Dynamic Synchronous Capture Algorithm for an Electromagnetic Flowmeter.

PubMed

Fanjiang, Yong-Yi; Lu, Shih-Wei

2017-04-10

This paper proposes a dynamic synchronous capture (DSC) algorithm to calculate the flow rate for an electromagnetic flowmeter. The characteristics of the DSC algorithm can accurately calculate the flow rate signal and efficiently convert an analog signal to upgrade the execution performance of a microcontroller unit (MCU). Furthermore, it can reduce interference from abnormal noise. It is extremely steady and independent of fluctuations in the flow measurement. Moreover, it can calculate the current flow rate signal immediately (m/s). The DSC algorithm can be applied to the current general MCU firmware platform without using DSP (Digital Signal Processing) or a high-speed and high-end MCU platform, and signal amplification by hardware reduces the demand for ADC accuracy, which reduces the cost.

Signal design study for shuttle/TDRSS Ku-band uplink

NASA Technical Reports Server (NTRS)

1976-01-01

The adequacy of the signal design approach chosen for the TDRSS/orbiter uplink was evaluated. Critical functions and/or components associated with the baseline design were identified, and design alternatives were developed for those areas considered high risk. A detailed set of RF and signal processing performance specifications for the orbiter hardware associated with the TDRSS/orbiter Ku band uplink was analyzed. Performances of a detailed design of the PN despreader, the PSK carrier synchronization loop, and the symbol synchronizer are identified. The performance of the downlink signal by means of computer simulation to obtain a realistic determination of bit error rate degradations was studied. The three channel PM downlink signal was detailed by means of analysis and computer simulation.

Dynamic Synchronous Capture Algorithm for an Electromagnetic Flowmeter

PubMed Central

Fanjiang, Yong-Yi; Lu, Shih-Wei

2017-01-01

This paper proposes a dynamic synchronous capture (DSC) algorithm to calculate the flow rate for an electromagnetic flowmeter. The characteristics of the DSC algorithm can accurately calculate the flow rate signal and efficiently convert an analog signal to upgrade the execution performance of a microcontroller unit (MCU). Furthermore, it can reduce interference from abnormal noise. It is extremely steady and independent of fluctuations in the flow measurement. Moreover, it can calculate the current flow rate signal immediately (m/s). The DSC algorithm can be applied to the current general MCU firmware platform without using DSP (Digital Signal Processing) or a high-speed and high-end MCU platform, and signal amplification by hardware reduces the demand for ADC accuracy, which reduces the cost. PMID:28394306

YARR - A PCIe based Readout Concept for Current and Future ATLAS Pixel Modules

NASA Astrophysics Data System (ADS)

Heim, Timon

2017-10-01

The Yet Another Rapid Readout (YARR) system is a DAQ system designed for the readout of current generation ATLAS Pixel FE-I4 and next generation chips. It utilises a commercial-off-the-shelf PCIe FPGA card as a reconfigurable I/O interface, which acts as a simple gateway to pipe all data from the Pixel modules via the high speed PCIe connection into the host system’s memory. Relying on modern CPU architectures, which enables the usage of parallelised processing in threads and commercial high speed interfaces in everyday computers, it is possible to perform all processing on a software level in the host CPU. Although FPGAs are very powerful at parallel signal processing their firmware is hard to maintain and constrained by their connected hardware. Software, on the other hand, is very portable and upgraded frequently with new features coming at no cost. A DAQ concept which does not rely on the underlying hardware for acceleration also eases the transition from prototyping in the laboratory to the full scale implementation in the experiment. The overall concept and data flow will be outlined, as well as the challenges and possible bottlenecks which can be encountered when moving the processing from hardware to software.

Definition and fabrication of an airborne scatterometer radar signal processor

NASA Technical Reports Server (NTRS)

1976-01-01

A hardware/software system which incorporates a microprocessor design and software for the calculation of normalized radar cross section in real time was developed. Interface is provided to decommutate the NASA ADAS data stream for aircraft parameters used in processing and to provide output in the form of strip chart and pcm compatible data recording.

Success Story of Radar Technology in Automotive Applications

NASA Astrophysics Data System (ADS)

Meinecke, Marc-Michael; Jerhot, Jiři

2012-05-01

The radar technology has a long history of over more than one century. In contrast to this its application in the automotive domain is a quite young activity. The enablers of this relatively new research field are presented in this article from a car manufacturers perspective covering aspects of signal processing algorithms, hardware and driver assistance applications.

Development of a software and hardware system for monitoring the air cleaning process using a cyclone-separator

NASA Astrophysics Data System (ADS)

Nicolaeva, B. K.; Borisov, A. P.; Zlochevskiy, V. L.

2017-08-01

The article is devoted to the development of a hardware-software complex for monitoring and controlling the process of air purification by means of a cyclone-separator. The hardware of this complex is the Arduino platform, to which are connected pressure sensors, air velocities, dustmeters, which allow monitoring of the main parameters of the cyclone-separator. Also, a frequency converter was developed to regulate the rotation speed of an asynchronous motor necessary to correct the flow rate, the control signals of which come with Arduino. The program part of the complex is written in the form of a web application in the programming language JavaScript and inserts into CSS and HTML for the user interface. This program allows you to receive data from sensors, build dependencies in real time and control the speed of rotation of an asynchronous electric drive. The conducted experiment shows that the cleaning efficiency is 95-99.9%, while the airflow at the cyclone inlet is 16-18 m/s, and at the exit 50-70 m/s.

[A novel biologic electricity signal measurement based on neuron chip].

PubMed

Lei, Yinsheng; Wang, Mingshi; Sun, Tongjing; Zhu, Qiang; Qin, Ran

2006-06-01

Neuron chip is a multiprocessor with three pipeline CPU; its communication protocol and control processor are integrated in effect to carry out the function of communication, control, attemper, I/O, etc. A novel biologic electronic signal measurement network system is composed of intelligent measurement nodes with neuron chip at the core. In this study, the electronic signals such as ECG, EEG, EMG and BOS can be synthetically measured by those intelligent nodes, and some valuable diagnostic messages are found. Wavelet transform is employed in this system to analyze various biologic electronic signals due to its strong time-frequency ability of decomposing signal local character. Better effect is gained. This paper introduces the hardware structure of network and intelligent measurement node, the measurement theory and the signal figure of data acquisition and processing.

High-speed digital signal normalization for feature identification

NASA Technical Reports Server (NTRS)

Ortiz, J. A.; Meredith, B. D.

1983-01-01

A design approach for high speed normalization of digital signals was developed. A reciprocal look up table technique is employed, where a digital value is mapped to its reciprocal via a high speed memory. This reciprocal is then multiplied with an input signal to obtain the normalized result. Normalization improves considerably the accuracy of certain feature identification algorithms. By using the concept of pipelining the multispectral sensor data processing rate is limited only by the speed of the multiplier. The breadboard system was found to operate at an execution rate of five million normalizations per second. This design features high precision, a reduced hardware complexity, high flexibility, and expandability which are very important considerations for spaceborne applications. It also accomplishes a high speed normalization rate essential for real time data processing.

Agile waveforms for joint SAR-GMTI processing

NASA Astrophysics Data System (ADS)

Jaroszewski, Steven; Corbeil, Allan; McMurray, Stephen; Majumder, Uttam; Bell, Mark R.; Corbeil, Jeffrey; Minardi, Michael

2016-05-01

Wideband radar waveforms that employ spread-spectrum techniques were investigated and experimentally tested. The waveforms combine bi-phase coding with a traditional LFM chirp and are applicable to joint SAR-GMTI processing. After de-spreading, the received signals can be processed to support simultaneous GMTI and high resolution SAR imaging missions by airborne radars. The spread spectrum coding techniques can provide nearly orthogonal waveforms and offer enhanced operations in some environments by distributing the transmitted energy over a large instantaneous bandwidth. The LFM component offers the desired Doppler tolerance. In this paper, the waveforms are formulated and a shift-register approach for de-spreading the received signals is described. Hardware loop-back testing has shown the feasibility of using these waveforms in experimental radar test bed.

Computational problems and signal processing in SETI

NASA Technical Reports Server (NTRS)

Deans, Stanley R.; Cullers, D. K.; Stauduhar, Richard

1991-01-01

The Search for Extraterrestrial Intelligence (SETI), currently being planned at NASA, will require that an enormous amount of data (on the order of 10 exp 11 distinct signal paths for a typical observation) be analyzed in real time by special-purpose hardware. Even though the SETI system design is not based on maximum entropy and Bayesian methods (partly due to the real-time processing constraint), it is expected that enough data will be saved to be able to apply these and other methods off line where computational complexity is not an overriding issue. Interesting computational problems that relate directly to the system design for processing such an enormous amount of data have emerged. Some of these problems are discussed, along with the current status on their solution.

A CCD experimental platform for large telescope in Antarctica based on FPGA

NASA Astrophysics Data System (ADS)

Zhu, Yuhua; Qi, Yongjun

2014-07-01

The CCD , as a detector , is one of the important components of astronomical telescopes. For a large telescope in Antarctica, a set of CCD detector system with large size, high sensitivity and low noise is indispensable. Because of the extremely low temperatures and unattended, system maintenance and software and hardware upgrade become hard problems. This paper introduces a general CCD controller experiment platform, using Field programmable gate array FPGA, which is, in fact, a large-scale field reconfigurable array. Taking the advantage of convenience to modify the system, construction of driving circuit, digital signal processing module, network communication interface, control algorithm validation, and remote reconfigurable module may realize. With the concept of integrated hardware and software, the paper discusses the key technology of building scientific CCD system suitable for the special work environment in Antarctica, focusing on the method of remote reconfiguration for controller via network and then offering a feasible hardware and software solution.

Performance evaluation of heart sound cancellation in FPGA hardware implementation for electronic stethoscope.

PubMed

Chao, Chun-Tang; Maneetien, Nopadon; Wang, Chi-Jo; Chiou, Juing-Shian

2014-01-01

This paper presents the design and evaluation of the hardware circuit for electronic stethoscopes with heart sound cancellation capabilities using field programmable gate arrays (FPGAs). The adaptive line enhancer (ALE) was adopted as the filtering methodology to reduce heart sound attributes from the breath sounds obtained via the electronic stethoscope pickup. FPGAs were utilized to implement the ALE functions in hardware to achieve near real-time breath sound processing. We believe that such an implementation is unprecedented and crucial toward a truly useful, standalone medical device in outpatient clinic settings. The implementation evaluation with one Altera cyclone II-EP2C70F89 shows that the proposed ALE used 45% resources of the chip. Experiments with the proposed prototype were made using DE2-70 emulation board with recorded body signals obtained from online medical archives. Clear suppressions were observed in our experiments from both the frequency domain and time domain perspectives.

Modeling selective attention using a neuromorphic analog VLSI device.

PubMed

Indiveri, G

2000-12-01

Attentional mechanisms are required to overcome the problem of flooding a limited processing capacity system with information. They are present in biological sensory systems and can be a useful engineering tool for artificial visual systems. In this article we present a hardware model of a selective attention mechanism implemented on a very large-scale integration (VLSI) chip, using analog neuromorphic circuits. The chip exploits a spike-based representation to receive, process, and transmit signals. It can be used as a transceiver module for building multichip neuromorphic vision systems. We describe the circuits that carry out the main processing stages of the selective attention mechanism and provide experimental data for each circuit. We demonstrate the expected behavior of the model at the system level by stimulating the chip with both artificially generated control signals and signals obtained from a saliency map, computed from an image containing several salient features.

Sensing Methods for Detecting Analog Television Signals

NASA Astrophysics Data System (ADS)

Rahman, Mohammad Azizur; Song, Chunyi; Harada, Hiroshi

This paper introduces a unified method of spectrum sensing for all existing analog television (TV) signals including NTSC, PAL and SECAM. We propose a correlation based method (CBM) with a single reference signal for sensing any analog TV signals. In addition we also propose an improved energy detection method. The CBM approach has been implemented in a hardware prototype specially designed for participating in Singapore TV white space (WS) test trial conducted by Infocomm Development Authority (IDA) of the Singapore government. Analytical and simulation results of the CBM method will be presented in the paper, as well as hardware testing results for sensing various analog TV signals. Both AWGN and fading channels will be considered. It is shown that the theoretical results closely match with those from simulations. Sensing performance of the hardware prototype will also be presented in fading environment by using a fading simulator. We present performance of the proposed techniques in terms of probability of false alarm, probability of detection, sensing time etc. We also present a comparative study of the various techniques.

[3D-TV health assessment system by the multi-modal physiological signals].

PubMed

Li, Zhongqiang; Xing, Lidong; Qian, Zhiyu; Wang, Xiao; Yu, Defei; Liu, Baoyu; Jin, Shuai

2014-03-01

In order to meet the requirements of the multi-physiological signal measurement of the 3D-TV health assessment, try to find the suitable biological acquisition chips and design the hardware system which can detect different physiological signals in real time. The systems mainly uses ARM11/S3C6410 microcontroller to control the EEG/EOG acquisition chip RHA2116 and the ECG acquisition chip ADS1298, and then the microcontroller transfer the data collected by the chips to the PC software by the USB port which can display and save the experimental data in real time, then use the Matlab software for further processing of the data, finally make a final health assessment. In the meantime, for the different varieties in the different brain regions of watching 3D-TV, developed the special brain electrode placement and the experimental data processing methods, then effectively disposed the multi-signal data in the multilevel.

Modern Radar Techniques for Geophysical Applications: Two Examples

NASA Technical Reports Server (NTRS)

Arokiasamy, B. J.; Bianchi, C.; Sciacca, U.; Tutone, G.; Zirizzotti, A.; Zuccheretti, E.

2005-01-01

The last decade of the evolution of radar was heavily influenced by the rapid increase in the information processing capabilities. Advances in solid state radio HF devices, digital technology, computing architectures and software offered the designers to develop very efficient radars. In designing modern radars the emphasis goes towards the simplification of the system hardware, reduction of overall power, which is compensated by coding and real time signal processing techniques. Radars are commonly employed in geophysical radio soundings like probing the ionosphere; stratosphere-mesosphere measurement, weather forecast, GPR and radio-glaciology etc. In the laboratorio di Geofisica Ambientale of the Istituto Nazionale di Geofisica e Vulcanologia (INGV), Rome, Italy, we developed two pulse compression radars. The first is a HF radar called AIS-INGV; Advanced Ionospheric Sounder designed both for the purpose of research and for routine service of the HF radio wave propagation forecast. The second is a VHF radar called GLACIORADAR, which will be substituting the high power envelope radar used by the Italian Glaciological group. This will be employed in studying the sub glacial structures of Antarctica, giving information about layering, the bed rock and sub glacial lakes if present. These are low power radars, which heavily rely on advanced hardware and powerful real time signal processing. Additional information is included in the original extended abstract.

Performance verification and system integration tests of the pulse shape processor for the soft x-ray spectrometer onboard ASTRO-H

NASA Astrophysics Data System (ADS)

Takeda, Sawako; Tashiro, Makoto S.; Ishisaki, Yoshitaka; Tsujimoto, Masahiro; Seta, Hiromi; Shimoda, Yuya; Yamaguchi, Sunao; Uehara, Sho; Terada, Yukikatsu; Fujimoto, Ryuichi; Mitsuda, Kazuhisa

2014-07-01

The soft X-ray spectrometer (SXS) aboard ASTRO-H is equipped with dedicated digital signal processing units called pulse shape processors (PSPs). The X-ray microcalorimeter system SXS has 36 sensor pixels, which are operated at 50 mK to measure heat input of X-ray photons and realize an energy resolution of 7 eV FWHM in the range 0.3-12.0 keV. Front-end signal processing electronics are used to filter and amplify the electrical pulse output from the sensor and for analog-to-digital conversion. The digitized pulses from the 36 pixels are multiplexed and are sent to the PSP over low-voltage differential signaling lines. Each of two identical PSP units consists of an FPGA board, which assists the hardware logic, and two CPU boards, which assist the onboard software. The FPGA board triggers at every pixel event and stores the triggering information as a pulse waveform in the installed memory. The CPU boards read the event data to evaluate pulse heights by an optimal filtering algorithm. The evaluated X-ray photon data (including the pixel ID, energy, and arrival time information) are transferred to the satellite data recorder along with event quality information. The PSP units have been developed and tested with the engineering model (EM) and the flight model. Utilizing the EM PSP, we successfully verified the entire hardware system and the basic software design of the PSPs, including their communication capability and signal processing performance. In this paper, we show the key metrics of the EM test, such as accuracy and synchronicity of sampling clocks, event grading capability, and resultant energy resolution.

High accuracy GNSS based navigation in GEO

NASA Astrophysics Data System (ADS)

Capuano, Vincenzo; Shehaj, Endrit; Blunt, Paul; Botteron, Cyril; Farine, Pierre-André

2017-07-01

Although significant improvements in efficiency and performance of communication satellites have been achieved in the past decades, it is expected that the demand for new platforms in Geostationary Orbit (GEO) and for the On-Orbit Servicing (OOS) on the existing ones will continue to rise. Indeed, the GEO orbit is used for many applications including direct broadcast as well as communications. At the same time, Global Navigation Satellites System (GNSS), originally designed for land, maritime and air applications, has been successfully used as navigation system in Low Earth Orbit (LEO) and its further utilization for navigation of geosynchronous satellites becomes a viable alternative offering many advantages over present ground based methods. Following our previous studies of GNSS signal characteristics in Medium Earth Orbit (MEO), GEO and beyond, in this research we specifically investigate the processing of different GNSS signals, with the goal to determine the best navigation performance they can provide in a GEO mission. Firstly, a detailed selection among different GNSS signals and different combinations of them is discussed, taking into consideration the L1 and L5 frequency bands, and the GPS and Galileo constellations. Then, the implementation of an Orbital Filter is summarized, which adaptively fuses the GN1SS observations with an accurate orbital forces model. Finally, simulation tests of the navigation performance achievable by processing the selected combination of GNSS signals are carried out. The results obtained show an achievable positioning accuracy of less than one meter. In addition, hardware-in-the-loop tests are presented using a COTS receiver connected to our GNSS Spirent simulator, in order to collect real-time hardware-in-the-loop observations and process them by the proposed navigation module.

Laplace Transform Based Radiative Transfer Studies

NASA Astrophysics Data System (ADS)

Hu, Y.; Lin, B.; Ng, T.; Yang, P.; Wiscombe, W.; Herath, J.; Duffy, D.

2006-12-01

Multiple scattering is the major uncertainty for data analysis of space-based lidar measurements. Until now, accurate quantitative lidar data analysis has been limited to very thin objects that are dominated by single scattering, where photons from the laser beam only scatter a single time with particles in the atmosphere before reaching the receiver, and simple linear relationship between physical property and lidar signal exists. In reality, multiple scattering is always a factor in space-based lidar measurement and it dominates space- based lidar returns from clouds, dust aerosols, vegetation canopy and phytoplankton. While multiple scattering are clear signals, the lack of a fast-enough lidar multiple scattering computation tool forces us to treat the signal as unwanted "noise" and use simple multiple scattering correction scheme to remove them. Such multiple scattering treatments waste the multiple scattering signals and may cause orders of magnitude errors in retrieved physical properties. Thus the lack of fast and accurate time-dependent radiative transfer tools significantly limits lidar remote sensing capabilities. Analyzing lidar multiple scattering signals requires fast and accurate time-dependent radiative transfer computations. Currently, multiple scattering is done with Monte Carlo simulations. Monte Carlo simulations take minutes to hours and are too slow for interactive satellite data analysis processes and can only be used to help system / algorithm design and error assessment. We present an innovative physics approach to solve the time-dependent radiative transfer problem. The technique utilizes FPGA based reconfigurable computing hardware. The approach is as following, 1. Physics solution: Perform Laplace transform on the time and spatial dimensions and Fourier transform on the viewing azimuth dimension, and convert the radiative transfer differential equation solving into a fast matrix inversion problem. The majority of the radiative transfer computation goes to matrix inversion processes, FFT and inverse Laplace transforms. 2. Hardware solutions: Perform the well-defined matrix inversion, FFT and Laplace transforms on highly parallel, reconfigurable computing hardware. This physics-based computational tool leads to accurate quantitative analysis of space-based lidar signals and improves data quality of current lidar mission such as CALIPSO. This presentation will introduce the basic idea of this approach, preliminary results based on SRC's FPGA-based Mapstation, and how we may apply it to CALIPSO data analysis.

Digital Baseband Architecture For Transponder

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.; Yeh, Hen-Geul

1995-01-01

Proposed advanced transponder for long-distance radio communication system with turnaround ranging contains carrier-signal-tracking loop including baseband digital "front end." For reduced cost, transponder includes analog intermediate-frequency (IF) section and analog automatic gain control (AGC) loop at first of two IF mixers. However, second IF mixer redesigned to ease digitization of baseband functions. To conserve power and provide for simpler and smaller transponder hardware, baseband digital signal-processing circuits designed to implement undersampling scheme. Furthermore, sampling scheme and sampling frequency chosen so redesign involves minimum modification of command-detector unit (CDU).

Active-passive bistatic surveillance for long range air defense

NASA Astrophysics Data System (ADS)

Wardrop, B.; Molyneux-Berry, M. R. B.

1992-06-01

A hypothetical mobile support receiver capable of working within existing and future air defense networks as a means to maintain essential surveillance functions is considered. It is shown how multibeam receiver architecture supported by digital signal processing can substantially improve surveillance performance against chaff and jamming threats. A dual-mode support receiver concept is proposed which is based on the state-of-the-art phased-array technology, modular processing in industry standard hardware and existing networks.

A real-time GNSS-R system based on software-defined radio and graphics processing units

NASA Astrophysics Data System (ADS)

Hobiger, Thomas; Amagai, Jun; Aida, Masanori; Narita, Hideki

2012-04-01

Reflected signals of the Global Navigation Satellite System (GNSS) from the sea or land surface can be utilized to deduce and monitor physical and geophysical parameters of the reflecting area. Unlike most other remote sensing techniques, GNSS-Reflectometry (GNSS-R) operates as a passive radar that takes advantage from the increasing number of navigation satellites that broadcast their L-band signals. Thereby, most of the GNSS-R receiver architectures are based on dedicated hardware solutions. Software-defined radio (SDR) technology has advanced in the recent years and enabled signal processing in real-time, which makes it an ideal candidate for the realization of a flexible GNSS-R system. Additionally, modern commodity graphic cards, which offer massive parallel computing performances, allow to handle the whole signal processing chain without interfering with the PC's CPU. Thus, this paper describes a GNSS-R system which has been developed on the principles of software-defined radio supported by General Purpose Graphics Processing Units (GPGPUs), and presents results from initial field tests which confirm the anticipated capability of the system.

Software platform for rapid prototyping of NIRS brain computer interfacing techniques.

PubMed

Matthews, Fiachra; Soraghan, Christopher; Ward, Tomas E; Markham, Charles; Pearlmutter, Barak A

2008-01-01

This paper describes the control system of a next-generation optical brain-computer interface (BCI). Using functional near-infrared spectroscopy (fNIRS) as a BCI modality is a relatively new concept, and research has only begun to explore approaches for its implementation. It is necessary to have a system by which it is possible to investigate the signal processing and classification techniques available in the BCI community. Most importantly, these techniques must be easily testable in real-time applications. The system we describe was built using LABVIEW, a graphical programming language designed for interaction with National Instruments hardware. This platform allows complete configurability from hardware control and regulation, testing and filtering in a graphical interface environment.

Study of the GPS inter-frequency calibration of timing receivers

NASA Astrophysics Data System (ADS)

Defraigne, P.; Huang, W.; Bertrand, B.; Rovera, D.

2018-02-01

When calibrating Global Positioning System (GPS) stations dedicated to timing, the hardware delays of P1 and P2, the P(Y)-codes on frequencies L1 and L2, are determined separately. In the international atomic time (TAI) network the GPS stations of the time laboratories are calibrated relatively against reference stations. This paper aims at determining the consistency between the P1 and P2 hardware delays (called dP1 and dP2) of these reference stations, and to look at the stability of the inter-signal hardware delays dP1-dP2 of all the stations in the network. The method consists of determining the dP1-dP2 directly from the GPS pseudorange measurements corrected for the frequency-dependent antenna phase center and the frequency-dependent ionosphere corrections, and then to compare these computed dP1-dP2 to the calibrated values. Our results show that the differences between the computed and calibrated dP1-dP2 are well inside the expected combined uncertainty of the two quantities. Furthermore, the consistency between the calibrated time transfer solution obtained from either single-frequency P1 or dual-frequency P3 for reference laboratories is shown to be about 1.0 ns, well inside the 2.1 ns uB uncertainty of a time transfer link based on GPS P3 or Precise Point Positioning. This demonstrates the good consistency between the P1 and P2 hardware delays of the reference stations used for calibration in the TAI network. The long-term stability of the inter-signal hardware delays is also analysed from the computed dP1-dP2. It is shown that only variations larger than 2 ns can be detected for a particular station, while variations of 200 ps can be detected when differentiating the results between two stations. Finally, we also show that in the differential calibration process as used in the TAI network, using the same antenna phase center or using different positions for L1 and L2 signals gives maximum differences of 200 ps on the hardware delays of the separate codes P1 and P2; however, the final impact on the P3 combination is less than 10 ps.

A portable fetal heart monitor and its adaption to the detection of certain prenatal abnormalities

NASA Technical Reports Server (NTRS)

Zahorian, Stephen A.

1994-01-01

There were three primary objectives for this task: (1) The investigation of the feasibility of making the fetal heart rate monitor portable, using a laptop computer; (2) Improvements in the signal processing for the monitor; and (3) Implementation of a real-time hardware software system. These tasks have been completed as discussed in the following section.

[Results of testing of MINISKAN mobile gamma-ray camera and specific features of its design].

PubMed

Utkin, V M; Kumakhov, M A; Blinov, N N; Korsunskiĭ, V N; Fomin, D K; Kolesnikova, N V; Tultaev, A V; Nazarov, A A; Tararukhina, O B

2007-01-01

The main results of engineering, biomedical, and clinical testing of MINISKAN mobile gamma-ray camera are presented. Specific features of the camera hardware and software, as well as the main technical specifications, are described. The gamma-ray camera implements a new technology based on reconstructive tomography, aperture encoding, and digital processing of signals.

Signal processing and control challenges for smart vehicles

NASA Astrophysics Data System (ADS)

Zhang, Hui; Braun, Simon G.

2017-03-01

Smart phones have changed not only the mobile phone market but also our society during the past few years. Could the next potential intelligent device may be the vehicle? Judging by the visibility, in all media, of the numerous attempts to develop autonomous vehicles, this is certainly one of the logical outcomes. Smart vehicles would be equipped with an advanced operating system such that the vehicles could communicate with others, optimize the operation to reduce fuel consumption and emissions, enhance safety, or even become self-driving. These combined new features of vehicles require instrumentation and hardware developments, fast signal processing/fusion, decision making and online optimization. Meanwhile, the inevitable increasing system complexity would certainly challenges the control unit design.

A Closed-Loop Hardware Simulation of Decentralized Satellite Formation Control

NASA Technical Reports Server (NTRS)

Ebimuma, Takuji; Lightsey, E. Glenn; Baur, Frank (Technical Monitor)

2002-01-01

In recent years, there has been significant interest in the use of formation flying spacecraft for a variety of earth and space science missions. Formation flying may provide smaller and cheaper satellites that, working together, have more capability than larger and more expensive satellites. Several decentralized architectures have been proposed for autonomous establishment and maintenance of satellite formations. In such architectures, each satellite cooperatively maintains the shape of the formation without a central supervisor, and processing only local measurement information. The Global Positioning System (GPS) sensors are ideally suited to provide such local position and velocity measurements to the individual satellites. An investigation of the feasibility of a decentralized approach to satellite formation flying was originally presented by Carpenter. He extended a decentralized linear-quadratic-Gaussian (LQG) framework proposed by Speyer in a fashion similar to an extended Kalman filter (EKE) which processed GPS position fix solutions. The new decentralized LQG architecture was demonstrated in a numerical simulation for a realistic scenario that is similar to missions that have been proposed by NASA and the U.S. Air Force. Another decentralized architecture was proposed by Park et al. using carrier differential-phase GPS (CDGPS). Recently, Busse et al demonstrated the decentralized CDGPS architecture in a hardware-in-the-loop simulation on the Formation Flying TestBed (FFTB) at Goddard Space Flight Center (GSFC), which features two Spirent Cox 16 channel GPS signal generator. Although representing a step forward by utilizing GPS signal simulators for a spacecraft formation flying simulation, only an open-loop performance, in which no maneuvers were executed based on the real-time state estimates, was considered. In this research, hardware experimentation has been extended to include closed-loop integrated guidance and navigation of multiple spacecraft formations using GPS receivers and real-time vehicle telemetry. A hardware closed-loop simulation has been performed using the decentralized LQG architecture proposed by Carpenter in the GPS test facility at the Center for Space Research (CSR). This is the first presentation using this type of hardware for demonstration of closed-loop spacecraft formation flying.

Magnetic Nanoparticle Thermometer: An Investigation of Minimum Error Transmission Path and AC Bias Error

PubMed Central

Du, Zhongzhou; Su, Rijian; Liu, Wenzhong; Huang, Zhixing

2015-01-01

The signal transmission module of a magnetic nanoparticle thermometer (MNPT) was established in this study to analyze the error sources introduced during the signal flow in the hardware system. The underlying error sources that significantly affected the precision of the MNPT were determined through mathematical modeling and simulation. A transfer module path with the minimum error in the hardware system was then proposed through the analysis of the variations of the system error caused by the significant error sources when the signal flew through the signal transmission module. In addition, a system parameter, named the signal-to-AC bias ratio (i.e., the ratio between the signal and AC bias), was identified as a direct determinant of the precision of the measured temperature. The temperature error was below 0.1 K when the signal-to-AC bias ratio was higher than 80 dB, and other system errors were not considered. The temperature error was below 0.1 K in the experiments with a commercial magnetic fluid (Sample SOR-10, Ocean Nanotechnology, Springdale, AR, USA) when the hardware system of the MNPT was designed with the aforementioned method. PMID:25875188

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shepard, Kenneth L.; Sturcken, Noah Andrew

Power controller includes an output terminal having an output voltage, at least one clock generator to generate a plurality of clock signals and a plurality of hardware phases. Each hardware phase is coupled to the at least one clock generator and the output terminal and includes a comparator. Each hardware phase is configured to receive a corresponding one of the plurality of clock signals and a reference voltage, combine the corresponding clock signal and the reference voltage to produce a reference input, generate a feedback voltage based on the output voltage, compare the reference input and the feedback voltage usingmore » the comparator and provide a comparator output to the output terminal, whereby the comparator output determines a duty cycle of the power controller. An integrated circuit including the power controller is also provided.« less

Non-parametric PCM to ADM conversion. [Pulse Code to Adaptive Delta Modulation

NASA Technical Reports Server (NTRS)

Locicero, J. L.; Schilling, D. L.

1977-01-01

An all-digital technique to convert pulse code modulated (PCM) signals into adaptive delta modulation (ADM) format is presented. The converter developed is shown to be independent of the statistical parameters of the encoded signal and can be constructed with only standard digital hardware. The structure of the converter is simple enough to be fabricated on a large scale integrated circuit where the advantages of reliability and cost can be optimized. A concise evaluation of this PCM to ADM translation technique is presented and several converters are simulated on a digital computer. A family of performance curves is given which displays the signal-to-noise ratio for sinusoidal test signals subjected to the conversion process, as a function of input signal power for several ratios of ADM rate to Nyquist rate.

Performance Analysis of a Hardware Implemented Complex Signal Kurtosis Radio-Frequency Interference Detector

NASA Technical Reports Server (NTRS)

Schoenwald, Adam J.; Bradley, Damon C.; Mohammed, Priscilla N.; Piepmeier, Jeffrey R.; Wong, Mark

2016-01-01

In the field of microwave radiometry, Radio Frequency Interference (RFI) consistently degrades the value of scientific results. Through the use of digital receivers and signal processing, the effects of RFI on scientific measurements can be reduced depending on certain circumstances. As technology allows us to implement wider band digital receivers for radiometry, the problem of RFI mitigation changes. Our work focuses on finding a detector that outperforms real kurtosis in wide band scenarios. The algorithm implemented is a complex signal kurtosis detector which was modeled and simulated. The performance of both complex and real signal kurtosis is evaluated for continuous wave, pulsed continuous wave, and wide band quadrature phase shift keying (QPSK) modulations. The use of complex signal kurtosis increased the detectability of interference.

Signal timing on a shoestring

DOT National Transportation Integrated Search

2005-03-01

The conventional approach to signal timing optimization and field deployment requires current traffic flow data, experience with optimization models, familiarity with the signal controller hardware, and knowledge of field operations including signal ...

Signal timing on a shoestring.

DOT National Transportation Integrated Search

2005-03-01

The conventional approach to signal timing optimization and field deployment requires current traffic flow data, experience with optimization models, familiarity with the signal controller hardware, and knowledge of field operations including signal ...

Rapid-X - An FPGA Development Toolset Using a Custom Simulink Library for MTCA.4 Modules

NASA Astrophysics Data System (ADS)

Prędki, Paweł; Heuer, Michael; Butkowski, Łukasz; Przygoda, Konrad; Schlarb, Holger; Napieralski, Andrzej

2015-06-01

The recent introduction of advanced hardware architectures such as the Micro Telecommunications Computing Architecture (MTCA) caused a change in the approach to implementation of control schemes in many fields. The development has been moving away from traditional programming languages ( C/C++), to hardware description languages (VHDL, Verilog), which are used in FPGA development. With MATLAB/Simulink it is possible to describe complex systems with block diagrams and simulate their behavior. Those diagrams are then used by the HDL experts to implement exactly the required functionality in hardware. Both the porting of existing applications and adaptation of new ones require a lot of development time from them. To solve this, Xilinx System Generator, a toolbox for MATLAB/Simulink, allows rapid prototyping of those block diagrams using hardware modelling. It is still up to the firmware developer to merge this structure with the hardware-dependent HDL project. This prevents the application engineer from quickly verifying the proposed schemes in real hardware. The framework described in this article overcomes these challenges, offering a hardware-independent library of components that can be used in Simulink/System Generator models. The components are subsequently translated into VHDL entities and integrated with a pre-prepared VHDL project template. Furthermore, the entire implementation process is run in the background, giving the user an almost one-click path from control scheme modelling and simulation to bit-file generation. This approach allows the application engineers to quickly develop new schemes and test them in real hardware environment. The applications may range from simple data logging or signal generation ones to very advanced controllers. Taking advantage of the Simulink simulation capabilities and user-friendly hardware implementation routines, the framework significantly decreases the development time of FPGA-based applications.

Low cost MATLAB-based pulse oximeter for deployment in research and development applications.

PubMed

Shokouhian, M; Morling, R C S; Kale, I

2013-01-01

Problems such as motion artifact and effects of ambient lights have forced developers to design different signal processing techniques and algorithms to increase the reliability and accuracy of the conventional pulse oximeter device. To evaluate the robustness of these techniques, they are applied either to recorded data or are implemented on chip to be applied to real-time data. Recorded data is the most common method of evaluating however it is not as reliable as real-time measurements. On the other hand, hardware implementation can be both expensive and time consuming. This paper presents a low cost MATLAB-based pulse oximeter that can be used for rapid evaluation of newly developed signal processing techniques and algorithms. Flexibility to apply different signal processing techniques, providing both processed and unprocessed data along with low implementation cost are the important features of this design which makes it ideal for research and development purposes, as well as commercial, hospital and healthcare application.

Development of a frequency-modulated ultrasonic sensor inspired by bat echolocation

NASA Astrophysics Data System (ADS)

Kepa, Krzysztof; Abaid, Nicole

2015-03-01

Bats have evolved to sense using ultrasonic signals with a variety of different frequency signatures which interact with their environment. Among these signals, those with time-varying frequencies may enable the animals to gather more complex information for obstacle avoidance and target tracking. Taking inspiration from this system, we present the development of a sonar sensor capable of generating frequency-modulated ultrasonic signals. The device is based on a miniature mobile computer, with on board data capture and processing capabilities, which is designed for eventual autonomous operation in a robotic swarm. The hardware and software components of the sensor are detailed, as well their integration. Preliminary results for target detection using both frequency-modulated and constant frequency signals are discussed.

Research and design of intelligent distributed traffic signal light control system based on CAN bus

NASA Astrophysics Data System (ADS)

Chen, Yu

2007-12-01

Intelligent distributed traffic signal light control system was designed based on technologies of infrared, CAN bus, single chip microprocessor (SCM), etc. The traffic flow signal is processed with the core of SCM AT89C51. At the same time, the SCM controls the CAN bus controller SJA1000/transceiver PCA82C250 to build a CAN bus communication system to transmit data. Moreover, up PC realizes to connect and communicate with SCM through USBCAN chip PDIUSBD12. The distributed traffic signal light control system with three control styles of Vehicle flux, remote and PC is designed. This paper introduces the system composition method and parts of hardware/software design in detail.

A novel low-complexity digital filter design for wearable ECG devices

PubMed Central

Mehrnia, Alireza

2017-01-01

Wearable and implantable Electrocardiograph (ECG) devices are becoming prevailing tools for continuous real-time personal health monitoring. The ECG signal can be contaminated by various types of noise and artifacts (e.g., powerline interference, baseline wandering) that must be removed or suppressed for accurate ECG signal processing. Limited device size, power consumption and cost are critical issues that need to be carefully considered when designing any portable health monitoring device, including a battery-powered ECG device. This work presents a novel low-complexity noise suppression reconfigurable finite impulse response (FIR) filter structure for wearable ECG and heart monitoring devices. The design relies on a recently introduced optimally-factored FIR filter method. The new filter structure and several of its useful features are presented in detail. We also studied the hardware complexity of the proposed structure and compared it with the state-of-the-art. The results showed that the new ECG filter has a lower hardware complexity relative to the state-of-the-art ECG filters. PMID:28384272

ScanImage: flexible software for operating laser scanning microscopes.

PubMed

Pologruto, Thomas A; Sabatini, Bernardo L; Svoboda, Karel

2003-05-17

Laser scanning microscopy is a powerful tool for analyzing the structure and function of biological specimens. Although numerous commercial laser scanning microscopes exist, some of the more interesting and challenging applications demand custom design. A major impediment to custom design is the difficulty of building custom data acquisition hardware and writing the complex software required to run the laser scanning microscope. We describe a simple, software-based approach to operating a laser scanning microscope without the need for custom data acquisition hardware. Data acquisition and control of laser scanning are achieved through standard data acquisition boards. The entire burden of signal integration and image processing is placed on the CPU of the computer. We quantitate the effectiveness of our data acquisition and signal conditioning algorithm under a variety of conditions. We implement our approach in an open source software package (ScanImage) and describe its functionality. We present ScanImage, software to run a flexible laser scanning microscope that allows easy custom design.

Develop Direct Geo-referencing System Based on Open Source Software and Hardware Platform

NASA Astrophysics Data System (ADS)

Liu, H. S.; Liao, H. M.

2015-08-01

Direct geo-referencing system uses the technology of remote sensing to quickly grasp images, GPS tracks, and camera position. These data allows the construction of large volumes of images with geographic coordinates. So that users can be measured directly on the images. In order to properly calculate positioning, all the sensor signals must be synchronized. Traditional aerial photography use Position and Orientation System (POS) to integrate image, coordinates and camera position. However, it is very expensive. And users could not use the result immediately because the position information does not embed into image. To considerations of economy and efficiency, this study aims to develop a direct geo-referencing system based on open source software and hardware platform. After using Arduino microcontroller board to integrate the signals, we then can calculate positioning with open source software OpenCV. In the end, we use open source panorama browser, panini, and integrate all these to open source GIS software, Quantum GIS. A wholesome collection of data - a data processing system could be constructed.

A novel low-complexity digital filter design for wearable ECG devices.

PubMed

Asgari, Shadnaz; Mehrnia, Alireza

2017-01-01

Wearable and implantable Electrocardiograph (ECG) devices are becoming prevailing tools for continuous real-time personal health monitoring. The ECG signal can be contaminated by various types of noise and artifacts (e.g., powerline interference, baseline wandering) that must be removed or suppressed for accurate ECG signal processing. Limited device size, power consumption and cost are critical issues that need to be carefully considered when designing any portable health monitoring device, including a battery-powered ECG device. This work presents a novel low-complexity noise suppression reconfigurable finite impulse response (FIR) filter structure for wearable ECG and heart monitoring devices. The design relies on a recently introduced optimally-factored FIR filter method. The new filter structure and several of its useful features are presented in detail. We also studied the hardware complexity of the proposed structure and compared it with the state-of-the-art. The results showed that the new ECG filter has a lower hardware complexity relative to the state-of-the-art ECG filters.

GPU-accelerated algorithms for compressed signals recovery with application to astronomical imagery deblurring

NASA Astrophysics Data System (ADS)

Fiandrotti, Attilio; Fosson, Sophie M.; Ravazzi, Chiara; Magli, Enrico

2018-04-01

Compressive sensing promises to enable bandwidth-efficient on-board compression of astronomical data by lifting the encoding complexity from the source to the receiver. The signal is recovered off-line, exploiting GPUs parallel computation capabilities to speedup the reconstruction process. However, inherent GPU hardware constraints limit the size of the recoverable signal and the speedup practically achievable. In this work, we design parallel algorithms that exploit the properties of circulant matrices for efficient GPU-accelerated sparse signals recovery. Our approach reduces the memory requirements, allowing us to recover very large signals with limited memory. In addition, it achieves a tenfold signal recovery speedup thanks to ad-hoc parallelization of matrix-vector multiplications and matrix inversions. Finally, we practically demonstrate our algorithms in a typical application of circulant matrices: deblurring a sparse astronomical image in the compressed domain.

A Real-Time Image Acquisition And Processing System For A RISC-Based Microcomputer

NASA Astrophysics Data System (ADS)

Luckman, Adrian J.; Allinson, Nigel M.

1989-03-01

A low cost image acquisition and processing system has been developed for the Acorn Archimedes microcomputer. Using a Reduced Instruction Set Computer (RISC) architecture, the ARM (Acorn Risc Machine) processor provides instruction speeds suitable for image processing applications. The associated improvement in data transfer rate has allowed real-time video image acquisition without the need for frame-store memory external to the microcomputer. The system is comprised of real-time video digitising hardware which interfaces directly to the Archimedes memory, and software to provide an integrated image acquisition and processing environment. The hardware can digitise a video signal at up to 640 samples per video line with programmable parameters such as sampling rate and gain. Software support includes a work environment for image capture and processing with pixel, neighbourhood and global operators. A friendly user interface is provided with the help of the Archimedes Operating System WIMP (Windows, Icons, Mouse and Pointer) Manager. Windows provide a convenient way of handling images on the screen and program control is directed mostly by pop-up menus.

A hardware-software system for the automation of verification and calibration of oil metering units secondary equipment

NASA Astrophysics Data System (ADS)

Boyarnikov, A. V.; Boyarnikova, L. V.; Kozhushko, A. A.; Sekachev, A. F.

2017-08-01

In the article the process of verification (calibration) of oil metering units secondary equipment is considered. The purpose of the work is to increase the reliability and reduce the complexity of this process by developing a software and hardware system that provides automated verification and calibration. The hardware part of this complex carries out the commutation of the measuring channels of the verified controller and the reference channels of the calibrator in accordance with the introduced algorithm. The developed software allows controlling the commutation of channels, setting values on the calibrator, reading the measured data from the controller, calculating errors and compiling protocols. This system can be used for checking the controllers of the secondary equipment of the oil metering units in the automatic verification mode (with the open communication protocol) or in the semi-automatic verification mode (without it). The peculiar feature of the approach used is the development of a universal signal switch operating under software control, which can be configured for various verification methods (calibration), which allows to cover the entire range of controllers of metering units secondary equipment. The use of automatic verification with the help of a hardware and software system allows to shorten the verification time by 5-10 times and to increase the reliability of measurements, excluding the influence of the human factor.

Ku-band antenna acquisition and tracking performance study, volume 4

NASA Technical Reports Server (NTRS)

Huang, T. C.; Lindsey, W. C.

1977-01-01

The results pertaining to the tradeoff analysis and performance of the Ku-band shuttle antenna pointing and signal acquisition system are presented. The square, hexagonal and spiral antenna trajectories were investigated assuming the TDRS postulated uncertainty region and a flexible statistical model for the location of the TDRS within the uncertainty volume. The scanning trajectories, shuttle/TDRS signal parameters and dynamics, and three signal acquisition algorithms were integrated into a hardware simulation. The hardware simulation is quite flexible in that it allows for the evaluation of signal acquisition performance for an arbitrary (programmable) antenna pattern, a large range of C/N sub O's, various TDRS/shuttle a priori uncertainty distributions, and three distinct signal search algorithms.

Use of Field Programmable Gate Array Technology in Future Space Avionics

NASA Technical Reports Server (NTRS)

Ferguson, Roscoe C.; Tate, Robert

2005-01-01

Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.

An acceleration framework for synthetic aperture radar algorithms

NASA Astrophysics Data System (ADS)

Kim, Youngsoo; Gloster, Clay S.; Alexander, Winser E.

2017-04-01

Algorithms for radar signal processing, such as Synthetic Aperture Radar (SAR) are computationally intensive and require considerable execution time on a general purpose processor. Reconfigurable logic can be used to off-load the primary computational kernel onto a custom computing machine in order to reduce execution time by an order of magnitude as compared to kernel execution on a general purpose processor. Specifically, Field Programmable Gate Arrays (FPGAs) can be used to accelerate these kernels using hardware-based custom logic implementations. In this paper, we demonstrate a framework for algorithm acceleration. We used SAR as a case study to illustrate the potential for algorithm acceleration offered by FPGAs. Initially, we profiled the SAR algorithm and implemented a homomorphic filter using a hardware implementation of the natural logarithm. Experimental results show a linear speedup by adding reasonably small processing elements in Field Programmable Gate Array (FPGA) as opposed to using a software implementation running on a typical general purpose processor.

PPM Receiver Implemented in Software

NASA Technical Reports Server (NTRS)

Gray, Andrew; Kang, Edward; Lay, Norman; Vilnrotter, Victor; Srinivasan, Meera; Lee, Clement

2010-01-01

A computer program has been written as a tool for developing optical pulse-position- modulation (PPM) receivers in which photodetector outputs are fed to analog-to-digital converters (ADCs) and all subsequent signal processing is performed digitally. The program can be used, for example, to simulate an all-digital version of the PPM receiver described in Parallel Processing of Broad-Band PPM Signals (NPO-40711), which appears elsewhere in this issue of NASA Tech Briefs. The program can also be translated into a design for digital PPM receiver hardware. The most notable innovation embodied in the software and the underlying PPM-reception concept is a digital processing subsystem that performs synchronization of PPM time slots, even though the digital processing is, itself, asynchronous in the sense that no attempt is made to synchronize it with the incoming optical signal a priori and there is no feedback to analog signal processing subsystems or ADCs. Functions performed by the software receiver include time-slot synchronization, symbol synchronization, coding preprocessing, and diagnostic functions. The program is written in the MATLAB and Simulink software system. The software receiver is highly parameterized and, hence, programmable: for example, slot- and symbol-synchronization filters have programmable bandwidths.

Measurement fidelity of heart rate variability signal processing: The devil is in the details

PubMed Central

Jarrin, Denise C.; McGrath, Jennifer J.; Giovanniello, Sabrina; Poirier, Paul; Lambert, Marie

2017-01-01

Heart rate variability (HRV) is a particularly valuable quantitative marker of the flexibility and balance of the autonomic nervous system. Significant advances in software programs to automatically derive HRV have led to its extensive use in psychophysiological research. However, there is a lack of systematic comparisons across software programs used to derive HRV indices. Further, researchers report meager details on important signal processing decisions making synthesis across studies challenging. The aim of the present study was to evaluate the measurement fidelity of time- and frequency-domain HRV indices derived from three predominant signal processing software programs commonly used in clinical and research settings. Triplicate ECG recordings were derived from 20 participants using identical data acquisition hardware. Among the time-domain indices, there was strong to excellent correspondence (ICCavg =0.93) for SDNN, SDANN, SDNNi, rMSSD, and pNN50. The frequency-domain indices yielded excellent correspondence (ICCavg =0.91) for LF, HF, and LF/HF ratio, except for VLF which exhibited poor correspondence (ICCavg =0.19). Stringent user-decisions and technical specifications for nuanced HRV processing details are essential to ensure measurement fidelity across signal processing software programs. PMID:22820268

Design of a Single Channel Modulated Wideband Converter for Wideband Spectrum Sensing: Theory, Architecture and Hardware Implementation

PubMed Central

Liu, Weisong; Huang, Zhitao; Wang, Xiang; Sun, Weichao

2017-01-01

In a cognitive radio sensor network (CRSN), wideband spectrum sensing devices which aims to effectively exploit temporarily vacant spectrum intervals as soon as possible are of great importance. However, the challenge of increasingly high signal frequency and wide bandwidth requires an extremely high sampling rate which may exceed today’s best analog-to-digital converters (ADCs) front-end bandwidth. Recently, the newly proposed architecture called modulated wideband converter (MWC), is an attractive analog compressed sensing technique that can highly reduce the sampling rate. However, the MWC has high hardware complexity owing to its parallel channel structure especially when the number of signals increases. In this paper, we propose a single channel modulated wideband converter (SCMWC) scheme for spectrum sensing of band-limited wide-sense stationary (WSS) signals. With one antenna or sensor, this scheme can save not only sampling rate but also hardware complexity. We then present a new, SCMWC based, single node CR prototype System, on which the spectrum sensing algorithm was tested. Experiments on our hardware prototype show that the proposed architecture leads to successful spectrum sensing. And the total sampling rate as well as hardware size is only one channel’s consumption of MWC. PMID:28471410

Large-N correlator systems for low frequency radio astronomy

NASA Astrophysics Data System (ADS)

Foster, Griffin

Low frequency radio astronomy has entered a second golden age driven by the development of a new class of large-N interferometric arrays. The low frequency array (LOFAR) and a number of redshifted HI Epoch of Reionization (EoR) arrays are currently undergoing commission and regularly observing. Future arrays of unprecedented sensitivity and resolutions at low frequencies, such as the square kilometer array (SKA) and the hydrogen epoch of reionization array (HERA), are in development. The combination of advancements in specialized field programmable gate array (FPGA) hardware for signal processing, computing and graphics processing unit (GPU) resources, and new imaging and calibration algorithms has opened up the oft underused radio band below 300 MHz. These interferometric arrays require efficient implementation of digital signal processing (DSP) hardware to compute the baseline correlations. FPGA technology provides an optimal platform to develop new correlators. The significant growth in data rates from these systems requires automated software to reduce the correlations in real time before storing the data products to disk. Low frequency, widefield observations introduce a number of unique calibration and imaging challenges. The efficient implementation of FX correlators using FPGA hardware is presented. Two correlators have been developed, one for the 32 element BEST-2 array at Medicina Observatory and the other for the 96 element LOFAR station at Chilbolton Observatory. In addition, calibration and imaging software has been developed for each system which makes use of the radio interferometry measurement equation (RIME) to derive calibrations. A process for generating sky maps from widefield LOFAR station observations is presented. Shapelets, a method of modelling extended structures such as resolved sources and beam patterns has been adapted for radio astronomy use to further improve system calibration. Scaling of computing technology allows for the development of larger correlator systems, which in turn allows for improvements in sensitivity and resolution. This requires new calibration techniques which account for a broad range of systematic effects.

Simple simulation training system for short-wave radio station

NASA Astrophysics Data System (ADS)

Tan, Xianglin; Shao, Zhichao; Tu, Jianhua; Qu, Fuqi

2018-04-01

The short-wave radio station is a most important transmission equipment of our signal corps, but in the actual teaching process, which exist the phenomenon of fewer equipment and more students, making the students' short-wave radio operation and practice time is very limited. In order to solve the above problems, to carry out shortwave radio simple simulation training system development is very necessary. This project is developed by combining hardware and software to simulate the voice communication operation and signal principle of shortwave radio station, and can test the signal flow of shortwave radio station. The test results indicate that this system is simple operation, human-machine interface friendly and can improve teaching more efficiency.

Can your software engineer program your PLC?

NASA Astrophysics Data System (ADS)

Borrowman, Alastair J.; Taylor, Philip

2016-07-01

The use of Programmable Logic Controllers (PLCs) in the control of large physics experiments is ubiquitous1, 2, 3. The programming of these controllers is normally the domain of engineers with a background in electronics, this paper introduces PLC program development from the software engineer's perspective. PLC programs provide the link between control software running on PC architecture systems and physical hardware controlled and monitored by digital and analog signals. The higher-level software running on the PC is typically responsible for accepting operator input and from this deciding when and how hardware connected to the PLC is controlled. The PLC accepts demands from the PC, considers the current state of its connected hardware and if correct to do so (based upon interlocks or other constraints) adjusts its hardware output signals appropriately for the PC's demands. A published ICD (Interface Control Document) defines the PLC memory locations available to be written and read by the PC to control and monitor the hardware. Historically the method of programming PLCs has been ladder diagrams that closely resemble circuit diagrams, however, PLC manufacturers nowadays also provide, and promote, the use of higher-level programming languages4. Based on techniques used in the development of high-level PC software to control PLCs for multiple telescopes, this paper examines the development of PLC programs to operate the hardware of a medical cyclotron beamline controlled from a PC using the Experimental Physics and Industrial Control System (EPICS), which is also widely used in telescope control5, 6, 7. The PLC used is the new generation Siemens S7-1200 programmed using Siemens Pascal based Structured Control Language (SCL), which is their implementation of Structured Text (ST). The approach described is that from a software engineer's perspective, utilising Siemens Totally Integrated Automation (TIA) Portal integrated development environment (IDE) to create modular PLC programs based upon reusable functions capable of being unit tested without the PLC connected to hardware. Emphasis has been placed on designing an interface between EPICS and SCL that enforces correct operation of hardware through stringent separation of PC accessible PLC memory and hardware I/O addresses used only by the PLC. The paper also introduces the method used to automate the creation, from the same source document, the PLC memory structure (tag) definitions (defining memory used to access hardware I/O and that accessed by the PC) and creation of the PC program data structures (EPICS database records) used to access the permitted PLC addresses. From direct experience this paper demonstrates the advantages of PLC program development being shared between electronic and software engineers, to enable use of the most appropriate processes from both the perspective of the hardware and the higher-level software used to control it.

Multi-Beam Radio Frequency (RF) Aperture Arrays Using Multiplierless Approximate Fast Fourier Transform (FFT)

DTIC Science & Technology

2017-08-01

filtering, correlation and radio- astronomy . In this report approximate transforms that closely follow the DFT have been studied and found. The approximate...communications, data networks, sensor networks, cognitive radio, radar and beamforming, imaging, filtering, correlation and radio- astronomy . FFTs efficiently...public release; distribution is unlimited. 4.3 Digital Hardware and Design Architectures Collaboration for Astronomy Signal Processing and Electronics

Using Depth Recovery in Humans

DTIC Science & Technology

1988-07-07

presence of oriented luminance discontinuities or "edges" in the image data (Marr & Poggio, i976; Dey, 1975; Nelson, 1975 & 1977; Marr, Palm & Poggio, 1978...primitives, namely computational expense, is rapidly diminishing as we continue to benefit from dramatic advances in signal processing hardware...dimensional weighting function of simple cells are well fitted by Gabor functions. Pollen & Ronner (1981) demonstrated that simple cells which are tuned to

Concepts for on-board satellite image registration. Volume 2: IAS prototype performance evaluation standard definition

NASA Astrophysics Data System (ADS)

Daluge, D. R.; Ruedger, W. H.

1981-06-01

Problems encountered in testing onboard signal processing hardware designed to achieve radiometric and geometric correction of satellite imaging data are considered. These include obtaining representative image and ancillary data for simulation and the transfer and storage of a large quantity of image data at very high speed. The high resolution, high speed preprocessing of LANDSAT-D imagery is considered.

Digital test signal generation: An accurate SNR calibration approach for the DSN

NASA Technical Reports Server (NTRS)

Gutierrez-Luaces, Benito O.

1993-01-01

In support of the on-going automation of the Deep Space Network (DSN) a new method of generating analog test signals with accurate signal-to-noise ratio (SNR) is described. High accuracy is obtained by simultaneous generation of digital noise and signal spectra at the desired bandwidth (base-band or bandpass). The digital synthesis provides a test signal embedded in noise with the statistical properties of a stationary random process. Accuracy is dependent on test integration time and limited only by the system quantization noise (0.02 dB). The monitor and control as well as signal-processing programs reside in a personal computer (PC). Commands are transmitted to properly configure the specially designed high-speed digital hardware. The prototype can generate either two data channels modulated or not on a subcarrier, or one QPSK channel, or a residual carrier with one biphase data channel. The analog spectrum generated is on the DC to 10 MHz frequency range. These spectra may be up-converted to any desired frequency without loss on the characteristics of the SNR provided. Test results are presented.

Safe to Fly: Certifying COTS Hardware for Spaceflight

NASA Technical Reports Server (NTRS)

Fichuk, Jessica L.

2011-01-01

Providing hardware for the astronauts to use on board the Space Shuttle or International Space Station (ISS) involves a certification process that entails evaluating hardware safety, weighing risks, providing mitigation, and verifying requirements. Upon completion of this certification process, the hardware is deemed safe to fly. This process from start to finish can be completed as quickly as 1 week or can take several years in length depending on the complexity of the hardware and whether the item is a unique custom design. One area of cost and schedule savings that NASA implements is buying Commercial Off the Shelf (COTS) hardware and certifying it for human spaceflight as safe to fly. By utilizing commercial hardware, NASA saves time not having to develop, design and build the hardware from scratch, as well as a timesaving in the certification process. By utilizing COTS hardware, the current detailed certification process can be simplified which results in schedule savings. Cost savings is another important benefit of flying COTS hardware. Procuring COTS hardware for space use can be more economical than custom building the hardware. This paper will investigate the cost savings associated with certifying COTS hardware to NASA s standards rather than performing a custom build.

Land Mobile Satellite Service (LMSS) channel simulator: An end-to-end hardware simulation and study of the LMSS communications links

NASA Technical Reports Server (NTRS)

Salmasi, A. B. (Editor); Springett, J. C.; Sumida, J. T.; Richter, P. H.

1984-01-01

The design and implementation of the Land Mobile Satellite Service (LMSS) channel simulator as a facility for an end to end hardware simulation of the LMSS communications links, primarily with the mobile terminal is described. A number of studies are reported which show the applications of the channel simulator as a facility for validation and assessment of the LMSS design requirements and capabilities by performing quantitative measurements and qualitative audio evaluations for various link design parameters and channel impairments under simulated LMSS operating conditions. As a first application, the LMSS channel simulator was used in the evaluation of a system based on the voice processing and modulation (e.g., NBFM with 30 kHz of channel spacing and a 2 kHz rms frequency deviation for average talkers) selected for the Bell System's Advanced Mobile Phone Service (AMPS). The various details of the hardware design, qualitative audio evaluation techniques, signal to channel impairment measurement techniques, the justifications for criteria of different parameter selection in regards to the voice processing and modulation methods, and the results of a number of parametric studies are further described.

Motor imaginary-based brain-machine interface design using programmable logic controllers for the disabled.

PubMed

Jeyabalan, Vickneswaran; Samraj, Andrews; Loo, Chu Kiong

2010-10-01

Aiming at the implementation of brain-machine interfaces (BMI) for the aid of disabled people, this paper presents a system design for real-time communication between the BMI and programmable logic controllers (PLCs) to control an electrical actuator that could be used in devices to help the disabled. Motor imaginary signals extracted from the brain’s motor cortex using an electroencephalogram (EEG) were used as a control signal. The EEG signals were pre-processed by means of adaptive recursive band-pass filtrations (ARBF) and classified using simplified fuzzy adaptive resonance theory mapping (ARTMAP) in which the classified signals are then translated into control signals used for machine control via the PLC. A real-time test system was designed using MATLAB for signal processing, KEP-Ware V4 OLE for process control (OPC), a wireless local area network router, an Omron Sysmac CPM1 PLC and a 5 V/0.3A motor. This paper explains the signal processing techniques, the PLC's hardware configuration, OPC configuration and real-time data exchange between MATLAB and PLC using the MATLAB OPC toolbox. The test results indicate that the function of exchanging real-time data can be attained between the BMI and PLC through OPC server and proves that it is an effective and feasible method to be applied to devices such as wheelchairs or electronic equipment.

Computer Music

NASA Astrophysics Data System (ADS)

Cook, Perry

This chapter covers algorithms, technologies, computer languages, and systems for computer music. Computer music involves the application of computers and other digital/electronic technologies to music composition, performance, theory, history, and perception. The field combines digital signal processing, computational algorithms, computer languages, hardware and software systems, acoustics, psychoacoustics (low-level perception of sounds from the raw acoustic signal), and music cognition (higher-level perception of musical style, form, emotion, etc.). Although most people would think that analog synthesizers and electronic music substantially predate the use of computers in music, many experiments and complete computer music systems were being constructed and used as early as the 1950s.

Intelligent lightening system of urban and rural road traffic based on pyroelectric infrared detector

NASA Astrophysics Data System (ADS)

Miao, Man-Xiang

2007-12-01

By using the photo-voltage characteristics of pyroelectric infrared detector to fulfill signal acquisition, the detecting signal is processed with the core of a single chip microprocessor AT89C51. AT89C51 controls the CAN bus controller SJA1000/transceiver 82C250 to structure CAN bus communication system to transmit data through serial interface MAX232 connected with PC. The intelligent lightening system of urban and rural road traffic was carried out. In this paper, its construction and part's methods of hardware and software design were introduced in detail.

Compressive Sensing Image Sensors-Hardware Implementation

PubMed Central

Dadkhah, Mohammadreza; Deen, M. Jamal; Shirani, Shahram

2013-01-01

The compressive sensing (CS) paradigm uses simultaneous sensing and compression to provide an efficient image acquisition technique. The main advantages of the CS method include high resolution imaging using low resolution sensor arrays and faster image acquisition. Since the imaging philosophy in CS imagers is different from conventional imaging systems, new physical structures have been developed for cameras that use the CS technique. In this paper, a review of different hardware implementations of CS encoding in optical and electrical domains is presented. Considering the recent advances in CMOS (complementary metal–oxide–semiconductor) technologies and the feasibility of performing on-chip signal processing, important practical issues in the implementation of CS in CMOS sensors are emphasized. In addition, the CS coding for video capture is discussed. PMID:23584123

SETI prototype system for NASA's Sky Survey microwave observing project - A progress report

NASA Technical Reports Server (NTRS)

Klein, M. J.; Gulkis, S.; Wilck, H. C.

1990-01-01

Two complementary search strategies, a Targeted Search and a Sky Survey, are part of NASA's SETI microwave observing project scheduled to begin in October of 1992. The current progress in the development of hardware and software elements of the JPL Sky Survey data processing system are presented. While the Targeted Search stresses sensitivity allowing the detection of either continuous or pulsed signals over the 1-3 GHz frequency range, the Sky Survey gives up sensitivity to survey the 99 percent of the sky that is not covered by the Targeted Search. The Sky Survey spans a larger frequency range from 1-10 GHz. The two searches will deploy special-purpose digital signal processing equipment designed and built to automate the observing and data processing activities. A two-million channel digital wideband spectrum analyzer and a signal processor system will serve as a prototype for the SETI Sky Survey processor. The design will permit future expansion to meet the SETI requirement that the processor concurrently search for left and right circularly polarized signals.

Low-complexity camera digital signal imaging for video document projection system

NASA Astrophysics Data System (ADS)

Hsia, Shih-Chang; Tsai, Po-Shien

2011-04-01

We present high-performance and low-complexity algorithms for real-time camera imaging applications. The main functions of the proposed camera digital signal processing (DSP) involve color interpolation, white balance, adaptive binary processing, auto gain control, and edge and color enhancement for video projection systems. A series of simulations demonstrate that the proposed method can achieve good image quality while keeping computation cost and memory requirements low. On the basis of the proposed algorithms, the cost-effective hardware core is developed using Verilog HDL. The prototype chip has been verified with one low-cost programmable device. The real-time camera system can achieve 1270 × 792 resolution with the combination of extra components and can demonstrate each DSP function.

Discrete-Time Demodulator Architectures for Free-Space Broadband Optical Pulse-Position Modulation

NASA Technical Reports Server (NTRS)

Gray, A. A.; Lee, C.

2004-01-01

The objective of this work is to develop discrete-time demodulator architectures for broadband optical pulse-position modulation (PPM) that are capable of processing Nyquist or near-Nyquist data rates. These architectures are motivated by the numerous advantages of realizing communications demodulators in digital very large scale integrated (VLSI) circuits. The architectures are developed within a framework that encompasses a large body of work in optical communications, synchronization, and multirate discrete-time signal processing and are constrained by the limitations of the state of the art in digital hardware. This work attempts to create a bridge between theoretical communication algorithms and analysis for deep-space optical PPM and modern digital VLSI. The primary focus of this work is on the synthesis of discrete-time processing architectures for accomplishing the most fundamental functions required in PPM demodulators, post-detection filtering, synchronization, and decision processing. The architectures derived are capable of closely approximating the theoretical performance of the continuous-time algorithms from which they are derived. The work concludes with an outline of the development path that leads to hardware.

Implementation of an RBF neural network on embedded systems: real-time face tracking and identity verification.

PubMed

Yang, Fan; Paindavoine, M

2003-01-01

This paper describes a real time vision system that allows us to localize faces in video sequences and verify their identity. These processes are image processing techniques based on the radial basis function (RBF) neural network approach. The robustness of this system has been evaluated quantitatively on eight video sequences. We have adapted our model for an application of face recognition using the Olivetti Research Laboratory (ORL), Cambridge, UK, database so as to compare the performance against other systems. We also describe three hardware implementations of our model on embedded systems based on the field programmable gate array (FPGA), zero instruction set computer (ZISC) chips, and digital signal processor (DSP) TMS320C62, respectively. We analyze the algorithm complexity and present results of hardware implementations in terms of the resources used and processing speed. The success rates of face tracking and identity verification are 92% (FPGA), 85% (ZISC), and 98.2% (DSP), respectively. For the three embedded systems, the processing speeds for images size of 288 /spl times/ 352 are 14 images/s, 25 images/s, and 4.8 images/s, respectively.

Architecture and Implementation of OpenPET Firmware and Embedded Software

PubMed Central

Abu-Nimeh, Faisal T.; Ito, Jennifer; Moses, William W.; Peng, Qiyu; Choong, Woon-Seng

2016-01-01

OpenPET is an open source, modular, extendible, and high-performance platform suitable for multi-channel data acquisition and analysis. Due to the flexibility of the hardware, firmware, and software architectures, the platform is capable of interfacing with a wide variety of detector modules not only in medical imaging but also in homeland security applications. Analog signals from radiation detectors share similar characteristics – a pulse whose area is proportional to the deposited energy and whose leading edge is used to extract a timing signal. As a result, a generic design method of the platform is adopted for the hardware, firmware, and software architectures and implementations. The analog front-end is hosted on a module called a Detector Board, where each board can filter, combine, timestamp, and process multiple channels independently. The processed data is formatted and sent through a backplane bus to a module called Support Board, where 1 Support Board can host up to eight Detector Board modules. The data in the Support Board, coming from 8 Detector Board modules, can be aggregated or correlated (if needed) depending on the algorithm implemented or runtime mode selected. It is then sent out to a computer workstation for further processing. The number of channels (detector modules), to be processed, mandates the overall OpenPET System Configuration, which is designed to handle up to 1,024 channels using 16-channel Detector Boards in the Standard System Configuration and 16,384 channels using 32-channel Detector Boards in the Large System Configuration. PMID:27110034

Performance Evaluation of Heart Sound Cancellation in FPGA Hardware Implementation for Electronic Stethoscope

PubMed Central

Chao, Chun-Tang

2014-01-01

This paper presents the design and evaluation of the hardware circuit for electronic stethoscopes with heart sound cancellation capabilities using field programmable gate arrays (FPGAs). The adaptive line enhancer (ALE) was adopted as the filtering methodology to reduce heart sound attributes from the breath sounds obtained via the electronic stethoscope pickup. FPGAs were utilized to implement the ALE functions in hardware to achieve near real-time breath sound processing. We believe that such an implementation is unprecedented and crucial toward a truly useful, standalone medical device in outpatient clinic settings. The implementation evaluation with one Altera cyclone II–EP2C70F89 shows that the proposed ALE used 45% resources of the chip. Experiments with the proposed prototype were made using DE2-70 emulation board with recorded body signals obtained from online medical archives. Clear suppressions were observed in our experiments from both the frequency domain and time domain perspectives. PMID:24790573

Automated Monitoring with a BSP Fault-Detection Test

NASA Technical Reports Server (NTRS)

Bickford, Randall L.; Herzog, James P.

2003-01-01

The figure schematically illustrates a method and procedure for automated monitoring of an asset, as well as a hardware- and-software system that implements the method and procedure. As used here, asset could signify an industrial process, power plant, medical instrument, aircraft, or any of a variety of other systems that generate electronic signals (e.g., sensor outputs). In automated monitoring, the signals are digitized and then processed in order to detect faults and otherwise monitor operational status and integrity of the monitored asset. The major distinguishing feature of the present method is that the fault-detection function is implemented by use of a Bayesian sequential probability (BSP) technique. This technique is superior to other techniques for automated monitoring because it affords sensitivity, not only to disturbances in the mean values, but also to very subtle changes in the statistical characteristics (variance, skewness, and bias) of the monitored signals.

Optical modulator system

NASA Technical Reports Server (NTRS)

Brand, J.

1972-01-01

The fabrication, test, and delivery of an optical modulator system which will operate with a mode-locked Nd:YAG laser indicating at either 1.06 or 0.53 micrometers is discussed. The delivered hardware operates at data rates up to 400 Mbps and includes a 0.53 micrometer electrooptic modulator, a 1.06 micrometer electrooptic modulator with power supply and signal processing electronics with power supply. The modulators contain solid state drivers which accept digital signals with MECL logic levels, temperature controllers to maintain a stable thermal environment for the modulator crystals, and automatic electronic compensation to maximize the extinction ratio. The modulators use two lithium tantalate crystals cascaded in a double pass configuration. The signal processing electronics include encoding electronics which are capable of digitizing analog signals between the limit of + or - 0.75 volts at a maximum rate of 80 megasamples per second with 5 bit resolution. The digital samples are serialized and made available as a 400 Mbps serial NRZ data source for the modulators. A pseudorandom (PN) generator is also included in the signal processing electronics. This data source generates PN sequences with lengths between 31 bits and 32,767 bits in a serial NRZ format at rates up to 400 Mbps.

A real time dynamic data acquisition and processing system for velocity, density, and total temperature fluctuation measurements

NASA Technical Reports Server (NTRS)

Clukey, Steven J.

1991-01-01

The real time Dynamic Data Acquisition and Processing System (DDAPS) is described which provides the capability for the simultaneous measurement of velocity, density, and total temperature fluctuations. The system of hardware and software is described in context of the wind tunnel environment. The DDAPS replaces both a recording mechanism and a separate data processing system. DDAPS receives input from hot wire anemometers. Amplifiers and filters condition the signals with computer controlled modules. The analog signals are simultaneously digitized and digitally recorded on disk. Automatic acquisition collects necessary calibration and environment data. Hot wire sensitivities are generated and applied to the hot wire data to compute fluctuations. The presentation of the raw and processed data is accomplished on demand. The interface to DDAPS is described along with the internal mechanisms of DDAPS. A summary of operations relevant to the use of the DDAPS is also provided.

Research and development of an electrochemical biocide reactor

NASA Technical Reports Server (NTRS)

See, G. G.; Bodo, C. A.; Glennon, J. P.

1975-01-01

An alternate disinfecting process to chemical agents, heat, or radiation in an aqueous media has been studied. The process is called an electrochemical biocide and employs cyclic, low-level voltages at chemically inert electrodes to pass alternating current through water and, in the process, to destroy microorganisms. The paper describes experimental hardware, methodology, and results with a tracer microorganism (Escherichia coli). The results presented show the effects on microorganism kill of operating parameters, including current density (15 to 55 mA/sq cm (14 to 51 ASF)), waveform of applied electrical signal (square, triangular, sine), frequency of applied electrical signal (0.5 to 1.5 Hz), process water flow rate (100 to 600 cc/min (1.6 to 9.5 gph)), and reactor resident time (0 to 4 min). Comparisons are made between the disinfecting property of the electrochemical biocide and chlorine, bromine, and iodine.

Fast convergent frequency-domain MIMO equalizer for few-mode fiber communication systems

NASA Astrophysics Data System (ADS)

He, Xuan; Weng, Yi; Wang, Junyi; Pan, Z.

2018-02-01

Space division multiplexing using few-mode fibers has been extensively explored to sustain the continuous traffic growth. In few-mode fiber optical systems, both spatial and polarization modes are exploited to transmit parallel channels, thus increasing the overall capacity. However, signals on spatial channels inevitably suffer from the intrinsic inter-modal coupling and large accumulated differential mode group delay (DMGD), which causes spatial modes de-multiplex even harder. Many research articles have demonstrated that frequency domain adaptive multi-input multi-output (MIMO) equalizer can effectively compensate the DMGD and demultiplex the spatial channels with digital signal processing (DSP). However, the large accumulated DMGD usually requires a large number of training blocks for the initial convergence of adaptive MIMO equalizers, which will decrease the overall system efficiency and even degrade the equalizer performance in fast-changing optical channels. Least mean square (LMS) algorithm is always used in MIMO equalization to dynamically demultiplex the spatial signals. We have proposed to use signal power spectral density (PSD) dependent method and noise PSD directed method to improve the convergence speed of adaptive frequency domain LMS algorithm. We also proposed frequency domain recursive least square (RLS) algorithm to further increase the convergence speed of MIMO equalizer at cost of greater hardware complexity. In this paper, we will compare the hardware complexity and convergence speed of signal PSD dependent and noise power directed algorithms against the conventional frequency domain LMS algorithm. In our numerical study of a three-mode 112 Gbit/s PDM-QPSK optical system with 3000 km transmission, the noise PSD directed and signal PSD dependent methods could improve the convergence speed by 48.3% and 36.1% respectively, at cost of 17.2% and 10.7% higher hardware complexity. We will also compare the frequency domain RLS algorithm against conventional frequency domain LMS algorithm. Our numerical study shows that, in a three-mode 224 Gbit/s PDM-16-QAM system with 3000 km transmission, the RLS algorithm could improve the convergence speed by 53.7% over conventional frequency domain LMS algorithm.

Spectral imaging applications: Remote sensing, environmental monitoring, medicine, military operations, factory automation and manufacturing

NASA Technical Reports Server (NTRS)

Gat, N.; Subramanian, S.; Barhen, J.; Toomarian, N.

1996-01-01

This paper reviews the activities at OKSI related to imaging spectroscopy presenting current and future applications of the technology. The authors discuss the development of several systems including hardware, signal processing, data classification algorithms and benchmarking techniques to determine algorithm performance. Signal processing for each application is tailored by incorporating the phenomenology appropriate to the process, into the algorithms. Pixel signatures are classified using techniques such as principal component analyses, generalized eigenvalue analysis and novel very fast neural network methods. The major hyperspectral imaging systems developed at OKSI include the Intelligent Missile Seeker (IMS) demonstration project for real-time target/decoy discrimination, and the Thermal InfraRed Imaging Spectrometer (TIRIS) for detection and tracking of toxic plumes and gases. In addition, systems for applications in medical photodiagnosis, manufacturing technology, and for crop monitoring are also under development.

Introduction to the Special Issue on Digital Signal Processing in Radio Astronomy

NASA Astrophysics Data System (ADS)

Price, D. C.; Kocz, J.; Bailes, M.; Greenhill, L. J.

2016-03-01

Advances in astronomy are intimately linked to advances in digital signal processing (DSP). This special issue is focused upon advances in DSP within radio astronomy. The trend within that community is to use off-the-shelf digital hardware where possible and leverage advances in high performance computing. In particular, graphics processing units (GPUs) and field programmable gate arrays (FPGAs) are being used in place of application-specific circuits (ASICs); high-speed Ethernet and Infiniband are being used for interconnect in place of custom backplanes. Further, to lower hurdles in digital engineering, communities have designed and released general-purpose FPGA-based DSP systems, such as the CASPER ROACH board, ASTRON Uniboard, and CSIRO Redback board. In this introductory paper, we give a brief historical overview, a summary of recent trends, and provide an outlook on future directions.

Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

PubMed Central

Brito, Nuno; Ferreira, Carlos; Alves, Filipe; Cabral, Jorge; Gaspar, João; Monteiro, João; Rocha, Luís

2016-01-01

The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr), quality factor (Q), and pull-in voltage (Vpi) within 1.5 s with repeatability better than 5 ppt (parts per thousand). A full-wafer with 420 devices under test (DUTs) has been evaluated detecting the faulty devices and providing important design specification feedback to the designers. PMID:27657087

A Fully Integrated Sensor SoC with Digital Calibration Hardware and Wireless Transceiver at 2.4 GHz

PubMed Central

Kim, Dong-Sun; Jang, Sung-Joon; Hwang, Tae-Ho

2013-01-01

A single-chip sensor system-on-a-chip (SoC) that implements radio for 2.4 GHz, complete digital baseband physical layer (PHY), 10-bit sigma-delta analog-to-digital converter and dedicated sensor calibration hardware for industrial sensing systems has been proposed and integrated in a 0.18-μm CMOS technology. The transceiver's building block includes a low-noise amplifier, mixer, channel filter, receiver signal-strength indicator, frequency synthesizer, voltage-controlled oscillator, and power amplifier. In addition, the digital building block consists of offset quadrature phase-shift keying (OQPSK) modulation, demodulation, carrier frequency offset compensation, auto-gain control, digital MAC function, sensor calibration hardware and embedded 8-bit microcontroller. The digital MAC function supports cyclic redundancy check (CRC), inter-symbol timing check, MAC frame control, and automatic retransmission. The embedded sensor signal processing block consists of calibration coefficient calculator, sensing data calibration mapper and sigma-delta analog-to-digital converter with digital decimation filter. The sensitivity of the overall receiver and the error vector magnitude (EVM) of the overall transmitter are −99 dBm and 18.14%, respectively. The proposed calibration scheme has a reduction of errors by about 45.4% compared with the improved progressive polynomial calibration (PPC) method and the maximum current consumption of the SoC is 16 mA. PMID:23698271

Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response.

PubMed

Brito, Nuno; Ferreira, Carlos; Alves, Filipe; Cabral, Jorge; Gaspar, João; Monteiro, João; Rocha, Luís

2016-09-21

The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr), quality factor (Q), and pull-in voltage (Vpi) within 1.5 s with repeatability better than 5 ppt (parts per thousand). A full-wafer with 420 devices under test (DUTs) has been evaluated detecting the faulty devices and providing important design specification feedback to the designers.

Imaging synthetic aperture radar

DOEpatents

Burns, Bryan L.; Cordaro, J. Thomas

1997-01-01

A linear-FM SAR imaging radar method and apparatus to produce a real-time image by first arranging the returned signals into a plurality of subaperture arrays, the columns of each subaperture array having samples of dechirped baseband pulses, and further including a processing of each subaperture array to obtain coarse-resolution in azimuth, then fine-resolution in range, and lastly, to combine the processed subapertures to obtain the final fine-resolution in azimuth. Greater efficiency is achieved because both the transmitted signal and a local oscillator signal mixed with the returned signal can be varied on a pulse-to-pulse basis as a function of radar motion. Moreover, a novel circuit can adjust the sampling location and the A/D sample rate of the combined dechirped baseband signal which greatly reduces processing time and hardware. The processing steps include implementing a window function, stabilizing either a central reference point and/or all other points of a subaperture with respect to doppler frequency and/or range as a function of radar motion, sorting and compressing the signals using a standard fourier transforms. The stabilization of each processing part is accomplished with vector multiplication using waveforms generated as a function of radar motion wherein these waveforms may be synthesized in integrated circuits. Stabilization of range migration as a function of doppler frequency by simple vector multiplication is a particularly useful feature of the invention; as is stabilization of azimuth migration by correcting for spatially varying phase errors prior to the application of an autofocus process.

On Certain New Methodology for Reducing Sensor and Readout Electronics Circuitry Noise in Digital Domain

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Miko, Joseph; Bradley, Damon; Heinzen, Katherine

2008-01-01

NASA Hubble Space Telescope (HST) and upcoming cosmology science missions carry instruments with multiple focal planes populated with many large sensor detector arrays. These sensors are passively cooled to low temperatures for low-level light (L3) and near-infrared (NIR) signal detection, and the sensor readout electronics circuitry must perform at extremely low noise levels to enable new required science measurements. Because we are at the technological edge of enhanced performance for sensors and readout electronics circuitry, as determined by thermal noise level at given temperature in analog domain, we must find new ways of further compensating for the noise in the signal digital domain. To facilitate this new approach, state-of-the-art sensors are augmented at their array hardware boundaries by non-illuminated reference pixels, which can be used to reduce noise attributed to sensors. There are a few proposed methodologies of processing in the digital domain the information carried by reference pixels, as employed by the Hubble Space Telescope and the James Webb Space Telescope Projects. These methods involve using spatial and temporal statistical parameters derived from boundary reference pixel information to enhance the active (non-reference) pixel signals. To make a step beyond this heritage methodology, we apply the NASA-developed technology known as the Hilbert- Huang Transform Data Processing System (HHT-DPS) for reference pixel information processing and its utilization in reconfigurable hardware on-board a spaceflight instrument or post-processing on the ground. The methodology examines signal processing for a 2-D domain, in which high-variance components of the thermal noise are carried by both active and reference pixels, similar to that in processing of low-voltage differential signals and subtraction of a single analog reference pixel from all active pixels on the sensor. Heritage methods using the aforementioned statistical parameters in the digital domain (such as statistical averaging of the reference pixels themselves) zeroes out the high-variance components, and the counterpart components in the active pixels remain uncorrected. This paper describes how the new methodology was demonstrated through analysis of fast-varying noise components using the Hilbert-Huang Transform Data Processing System tool (HHT-DPS) developed at NASA and the high-level programming language MATLAB (Trademark of MathWorks Inc.), as well as alternative methods for correcting for the high-variance noise component, using an HgCdTe sensor data. The NASA Hubble Space Telescope data post-processing, as well as future deep-space cosmology projects on-board instrument data processing from all the sensor channels, would benefit from this effort.

Aging of Polymers and Composites.

DTIC Science & Technology

1981-07-21

used to characterize the aging processes in the epoxy resin system, MY720 (mainly tetraglycidaldiaminodiphenyl methane, Ciba-Geigy) cured with Eporal...or nitrogen is used to purge the sample chamber; however, other gases can be used . The sample stage incorporates two matched heaters and Signal ...mass spectral data from the PAMS experiments. The hardware used in this facility is shown in Figure D2. The multiplexer permits the use of one analog

Avionics-compatible video facial cognizer for detection of pilot incapacitation.

PubMed

Steffin, Morris

2006-01-01

High-acceleration loss of consciousness is a serious problem for military pilots. In this laboratory, a video cognizer has been developed that in real time detects facial changes closely coupled to the onset of loss of consciousness. Efficient algorithms are compatible with video digital signal processing hardware and are thus configurable on an autonomous single board that generates alarm triggers to activate autopilot, and is avionics-compatible.

Research on intelligent monitoring technology of machining process

NASA Astrophysics Data System (ADS)

Wang, Taiyong; Meng, Changhong; Zhao, Guoli

1995-08-01

Based upon research on sound and vibration characteristics of tool condition, we explore the multigrade monitoring system which takes single-chip microcomputers as the core hardware. By using the specially designed pickup true signal devices, we can more effectively do the intelligent multigrade monitoring and forecasting, and furthermore, we can build the tool condition models adaptively. This is the key problem in FMS, CIMS, and even the IMS.

FMCW Radar Jamming Techniques and Analysis

DTIC Science & Technology

2013-09-01

an education system that is compacted with various radar capabilities, the circuitry does not provide the full functionality of each type of radar as...example of a typical FMCW architecture. The hardware components and their functionalities are explained individually in the order of the signal processing...drawn. Chapter IV presents a MATLAB model that emulates the functionality of the homodyne FMCW radar discussed in Chapter II. The model design and

Concepts for on-board satellite image registration. Volume 2: IAS prototype performance evaluation standard definition. [NEEDS Information Adaptive System

NASA Technical Reports Server (NTRS)

Daluge, D. R.; Ruedger, W. H.

1981-01-01

Problems encountered in testing onboard signal processing hardware designed to achieve radiometric and geometric correction of satellite imaging data are considered. These include obtaining representative image and ancillary data for simulation and the transfer and storage of a large quantity of image data at very high speed. The high resolution, high speed preprocessing of LANDSAT-D imagery is considered.

0-6775 : NTCIP-based traffic signal evaluation and optimization toolbox.

DOT National Transportation Integrated Search

2014-08-01

Routine maintenance of traffic signals requires : identification and resolution of hardware faults : and operational inefficiencies. Like most : agencies in charge of operating and maintaining : traffic signals scattered over large geographic : regio...

Software breadboard study

NASA Technical Reports Server (NTRS)

Nuckolls, C.; Frank, Mark

1990-01-01

The overall goal of this study was to develop new concepts and technology for the Comet Rendezvous Asteroid Flyby (CRAF), Cassini, and other future deep space missions which maximally conform to the Functional Specification for the NASA X-Band Transponder (NXT), FM513778 (preliminary, revised July 26, 1988). The study is composed of two tasks. The first task was to investigate a new digital signal processing technique which involves the processing of 1-bit samples and has the potential for significant size, mass, power, and electrical performance improvements over conventional analog approaches. The entire X-band receiver tracking loop was simulated on a digital computer using a high-level programming language. Simulations on this 'software breadboard' showed the technique to be well-behaved and a good approximation to its analog predecessor from threshold to strong signal levels in terms of tracking-loop performance, command signal-to-noise ratio and ranging signal-to-noise ratio. The successful completion of this task paves the way for building a hardware breadboard, the recommended next step in confirming this approach is ready for incorporation into flight hardware. The second task in this study was to investigate another technique which provides considerable simplification in the synthesis of the receiver first LO over conventional phase-locked multiplier schemes and in this approach, provides down-conversion for an S-band emergency receive mode without the need of an additional LO. The objective of this study was to develop methodology and models to predict the conversion loss, input RF bandwidth, and output RF bandwidth of a series GaAs FET sampling mixer and to breadboard and test a circuit design suitable for the X and S-band down-conversion applications.

NASA-STD-(I)-6016, Standard Materials and Processes Requirements for Spacecraft

NASA Technical Reports Server (NTRS)

Pedley, Michael; Griffin, Dennis

2006-01-01

This document is directed toward Materials and Processes (M&P) used in the design, fabrication, and testing of flight components for all NASA manned, unmanned, robotic, launch vehicle, lander, in-space and surface systems, and spacecraft program/project hardware elements. All flight hardware is covered by the M&P requirements of this document, including vendor designed, off-the-shelf, and vendor furnished items. Materials and processes used in interfacing ground support equipment (GSE); test equipment; hardware processing equipment; hardware packaging; and hardware shipment shall be controlled to prevent damage to or contamination of flight hardware.

Prototyping scalable digital signal processing systems for radio astronomy using dataflow models

NASA Astrophysics Data System (ADS)

Sane, N.; Ford, J.; Harris, A. I.; Bhattacharyya, S. S.

2012-05-01

There is a growing trend toward using high-level tools for design and implementation of radio astronomy digital signal processing (DSP) systems. Such tools, for example, those from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER), are usually platform-specific, and lack high-level, platform-independent, portable, scalable application specifications. This limits the designer's ability to experiment with designs at a high-level of abstraction and early in the development cycle. We address some of these issues using a model-based design approach employing dataflow models. We demonstrate this approach by applying it to the design of a tunable digital downconverter (TDD) used for narrow-bandwidth spectroscopy. Our design is targeted toward an FPGA platform, called the Interconnect Break-out Board (IBOB), that is available from the CASPER. We use the term TDD to refer to a digital downconverter for which the decimation factor and center frequency can be reconfigured without the need for regenerating the hardware code. Such a design is currently not available in the CASPER DSP library. The work presented in this paper focuses on two aspects. First, we introduce and demonstrate a dataflow-based design approach using the dataflow interchange format (DIF) tool for high-level application specification, and we integrate this approach with the CASPER tool flow. Secondly, we explore the trade-off between the flexibility of TDD designs and the low hardware cost of fixed-configuration digital downconverter (FDD) designs that use the available CASPER DSP library. We further explore this trade-off in the context of a two-stage downconversion scheme employing a combination of TDD or FDD designs.

Design of an integrated sensor system for the detection of traces of different molecules in the air

NASA Astrophysics Data System (ADS)

Strle, D.; Muševič, I.

2015-04-01

This article presents the design of a miniature detection system and its associated signal processing electronics, which can detect and selectively recognize vapor traces of different materials in the air - including explosives. It is based on the array of surface-functionalized COMB capacitive sensors and extremely low noise, analog, integrated electronic circuit, hardwired digital signal processing hardware and additional software running on a PC. The instrument is sensitive and selective, consumes a minimum amount of energy, is very small (few mm3) and cheap to produce in large quantities, and is insensitive to mechanical influences. Using an electronic detection system built of low noise analog front-end and hard-wired digital signal processing, it is possible to detect less than 0.3ppt of TNT molecules in the atmosphere (3 TNT molecules in 1013 molecules of the air) at 25°C on a 1 Hz bandwidth using very small volume and approx. 10 mA current from a 5V supply voltage. The sensors are implemented in a modified MEMS process and analog electronics in 0.18 um CMOS technology.

An efficient ASIC implementation of 16-channel on-line recursive ICA processor for real-time EEG system.

PubMed

Fang, Wai-Chi; Huang, Kuan-Ju; Chou, Chia-Ching; Chang, Jui-Chung; Cauwenberghs, Gert; Jung, Tzyy-Ping

2014-01-01

This is a proposal for an efficient very-large-scale integration (VLSI) design, 16-channel on-line recursive independent component analysis (ORICA) processor ASIC for real-time EEG system, implemented with TSMC 40 nm CMOS technology. ORICA is appropriate to be used in real-time EEG system to separate artifacts because of its highly efficient and real-time process features. The proposed ORICA processor is composed of an ORICA processing unit and a singular value decomposition (SVD) processing unit. Compared with previous work [1], this proposed ORICA processor has enhanced effectiveness and reduced hardware complexity by utilizing a deeper pipeline architecture, shared arithmetic processing unit, and shared registers. The 16-channel random signals which contain 8-channel super-Gaussian and 8-channel sub-Gaussian components are used to analyze the dependence of the source components, and the average correlation coefficient is 0.95452 between the original source signals and extracted ORICA signals. Finally, the proposed ORICA processor ASIC is implemented with TSMC 40 nm CMOS technology, and it consumes 15.72 mW at 100 MHz operating frequency.

A stethoscope with wavelet separation of cardiac and respiratory sounds for real time telemedicine implemented on field-programmable gate array

NASA Astrophysics Data System (ADS)

Castro, Víctor M.; Muñoz, Nestor A.; Salazar, Antonio J.

2015-01-01

Auscultation is one of the most utilized physical examination procedures for listening to lung, heart and intestinal sounds during routine consults and emergencies. Heart and lung sounds overlap in the thorax. An algorithm was used to separate them based on the discrete wavelet transform with multi-resolution analysis, which decomposes the signal into approximations and details. The algorithm was implemented in software and in hardware to achieve real-time signal separation. The heart signal was found in detail eight and the lung signal in approximation six. The hardware was used to separate the signals with a delay of 256 ms. Sending wavelet decomposition data - instead of the separated full signa - allows telemedicine applications to function in real time over low-bandwidth communication channels.

Electronic voltage and current transformers testing device.

PubMed

Pan, Feng; Chen, Ruimin; Xiao, Yong; Sun, Weiming

2012-01-01

A method for testing electronic instrument transformers is described, including electronic voltage and current transformers (EVTs, ECTs) with both analog and digital outputs. A testing device prototype is developed. It is based on digital signal processing of the signals that are measured at the secondary outputs of the tested transformer and the reference transformer when the same excitation signal is fed to their primaries. The test that estimates the performance of the prototype has been carried out at the National Centre for High Voltage Measurement and the prototype is approved for testing transformers with precision class up to 0.2 at the industrial frequency (50 Hz or 60 Hz). The device is suitable for on-site testing due to its high accuracy, simple structure and low-cost hardware.

Low Temperature Performance of High-Speed Neural Network Circuits

NASA Technical Reports Server (NTRS)

Duong, T.; Tran, M.; Daud, T.; Thakoor, A.

1995-01-01

Artificial neural networks, derived from their biological counterparts, offer a new and enabling computing paradigm specially suitable for such tasks as image and signal processing with feature classification/object recognition, global optimization, and adaptive control. When implemented in fully parallel electronic hardware, it offers orders of magnitude speed advantage. Basic building blocks of the new architecture are the processing elements called neurons implemented as nonlinear operational amplifiers with sigmoidal transfer function, interconnected through weighted connections called synapses implemented using circuitry for weight storage and multiply functions either in an analog, digital, or hybrid scheme.

High Speed, Low Cost Telemetry Access from Space Development Update on Programmable Ultra Lightweight System Adaptable Radio (PULSAR)

NASA Technical Reports Server (NTRS)

Simms, William Herbert, III; Varnavas, Kosta; Eberly, Eric

2014-01-01

Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 1990's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast, the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. Conventional transponders are built to a specific platform and must be redesigned for every new bus while the SDR is adaptive in nature and can fit numerous applications with no hardware modifications. A SDR uses a minimum amount of analog / Radio Frequency (RF) components to up/down-convert the RF signal to/from a digital format. Once the signal is digitized, all processing is performed using hardware or software logic. Typical SDR digital processes include; filtering, modulation, up/down converting and demodulation. NASA Marshall Space Flight Center (MSFC) Programmable Ultra Lightweight System Adaptable Radio (PULSAR) leverages existing MSFC SDR designs and commercial sector enhanced capabilities to provide a path to a radiation tolerant SDR transponder. These innovations (1) reduce the cost of NASA Low Earth Orbit (LEO) and Deep Space standard transponders, (2) decrease power requirements, and (3) commensurately reduce volume. A second pay-off is the increased SDR flexibility by allowing the same hardware to implement multiple transponder types simply by altering hardware logic - no change of hardware is required - all of which will ultimately be accomplished in orbit. Development of SDR technology for space applications will provide a highly capable, low cost transponder to programs of all sizes. The MSFC PULSAR Project results in a Technology Readiness Level (TRL) 7 low-cost telemetry system available to Smallsat and CubeSat missions, as well as other platforms. This paper documents the continued development and verification/validation of the MSFC SDR, called PULSAR, which contributes to advancing the state-of-the-art in transponder design - directly applicable to the SmallSat and CubeSat communities. This paper focuses on lessons learned on the first sub-orbital flight (high altitude balloon) and the follow-on steps taken to validate PULSAR. A sounding rocket launch, currently planned for 03/2015, will further expose PULSAR to the high dynamics of sub-orbital flights. Future opportunities for orbiting satellite incorporation reside in the small satellite missions (FASTSat, CubeSat. etc.).

A New Indoor Positioning System Architecture Using GPS Signals.

PubMed

Xu, Rui; Chen, Wu; Xu, Ying; Ji, Shengyue

2015-04-29

The pseudolite system is a good alternative for indoor positioning systems due to its large coverage area and accurate positioning solution. However, for common Global Positioning System (GPS) receivers, the pseudolite system requires some modifications of the user terminals. To solve the problem, this paper proposes a new pseudolite-based indoor positioning system architecture. The main idea is to receive real-world GPS signals, repeat each satellite signal and transmit those using indoor transmitting antennas. The transmitted GPS-like signal can be processed (signal acquisition and tracking, navigation data decoding) by the general receiver and thus no hardware-level modification on the receiver is required. In addition, all Tx can be synchronized with each other since one single clock is used in Rx/Tx. The proposed system is simulated using a software GPS receiver. The simulation results show the indoor positioning system is able to provide high accurate horizontal positioning in both static and dynamic situations.

A Self-Calibrating Radar Sensor System for Measuring Vital Signs.

PubMed

Huang, Ming-Chun; Liu, Jason J; Xu, Wenyao; Gu, Changzhan; Li, Changzhi; Sarrafzadeh, Majid

2016-04-01

Vital signs (i.e., heartbeat and respiration) are crucial physiological signals that are useful in numerous medical applications. The process of measuring these signals should be simple, reliable, and comfortable for patients. In this paper, a noncontact self-calibrating vital signs monitoring system based on the Doppler radar is presented. The system hardware and software were designed with a four-tiered layer structure. To enable accurate vital signs measurement, baseband signals in the radar sensor were modeled and a framework for signal demodulation was proposed. Specifically, a signal model identification method was formulated into a quadratically constrained l1 minimization problem and solved using the upper bound and linear matrix inequality (LMI) relaxations. The performance of the proposed system was comprehensively evaluated using three experimental sets, and the results indicated that this system can be used to effectively measure human vital signs.

WE-DE-206-01: MRI Signal in Biological Tissues - Proton, Spin, T1, T2, T2*

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gorny, K.

Magnetic resonance imaging (MRI) has become an essential part of clinical imaging due to its ability to render high soft tissue contrast. Instead of ionizing radiation, MRI use strong magnetic field, radio frequency waves and field gradients to create diagnostic useful images. It can be used to image the anatomy and also functional and physiological activities within the human body. Knowledge of the basic physical principles underlying MRI acquisition is vitally important to successful image production and proper image interpretation. This lecture will give an overview of the spin physics, imaging principle of MRI, the hardware of the MRI scanner,more » and various pulse sequences and their applications. It aims to provide a conceptual foundation to understand the image formation process of a clinical MRI scanner. Learning Objectives: Understand the origin of the MR signal and contrast from the spin physics level. Understand the main hardware components of a MRI scanner and their purposes Understand steps for MR image formation including spatial encoding and image reconstruction Understand the main kinds of MR pulse sequences and their characteristics.« less

Digital simulation of a communication link for Pioneer Saturn Uranus atmospheric entry probe, part 1

NASA Technical Reports Server (NTRS)

Hinrichs, C. A.

1975-01-01

A digital simulation study is presented for a candidate modulator/demodulator design in an atmospheric scintillation environment with Doppler, Doppler rate, and signal attenuation typical of the conditions of an outer planet atmospheric probe. The simulation results indicate that the mean channel error rate with and without scintillation are similar to theoretical characterizations of the link. The simulation gives information for calculating other channel statistics and generates a quantized symbol stream on magnetic tape from which error correction decoding is analyzed. Results from the magnetic tape data analyses are also included. The receiver and bit synchronizer are modeled in the simulation at the level of hardware component parameters rather than at the loop equation level and individual hardware parameters are identified. The atmospheric scintillation amplitude and phase are modeled independently. Normal and log normal amplitude processes are studied. In each case the scintillations are low pass filtered. The receiver performance is given for a range of signal to noise ratios with and without the effects of scintillation. The performance is reviewed for critical reciever parameter variations.

Low-power hardware implementation of movement decoding for brain computer interface with reduced-resolution discrete cosine transform.

PubMed

Minho Won; Albalawi, Hassan; Xin Li; Thomas, Donald E

2014-01-01

This paper describes a low-power hardware implementation for movement decoding of brain computer interface. Our proposed hardware design is facilitated by two novel ideas: (i) an efficient feature extraction method based on reduced-resolution discrete cosine transform (DCT), and (ii) a new hardware architecture of dual look-up table to perform discrete cosine transform without explicit multiplication. The proposed hardware implementation has been validated for movement decoding of electrocorticography (ECoG) signal by using a Xilinx FPGA Zynq-7000 board. It achieves more than 56× energy reduction over a reference design using band-pass filters for feature extraction.

Simulink/PARS Integration Support

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vacaliuc, B.; Nakhaee, N.

2013-12-18

The state of the art for signal processor hardware has far out-paced the development tools for placing applications on that hardware. In addition, signal processors are available in a variety of architectures, each uniquely capable of handling specific types of signal processing efficiently. With these processors becoming smaller and demanding less power, it has become possible to group multiple processors, a heterogeneous set of processors, into single systems. Different portions of the desired problem set can be assigned to different processor types as appropriate. As software development tools do not keep pace with these processors, especially when multiple processors ofmore » different types are used, a method is needed to enable software code portability among multiple processors and multiple types of processors along with their respective software environments. Sundance DSP, Inc. has developed a software toolkit called “PARS”, whose objective is to provide a framework that uses suites of tools provided by different vendors, along with modeling tools and a real time operating system, to build an application that spans different processor types. The software language used to express the behavior of the system is a very high level modeling language, “Simulink”, a MathWorks product. ORNL has used this toolkit to effectively implement several deliverables. This CRADA describes this collaboration between ORNL and Sundance DSP, Inc.« less

Hardware Timestamping for an Image Acquisition System Based on FlexRIO and IEEE 1588 v2 Standard

NASA Astrophysics Data System (ADS)

Esquembri, S.; Sanz, D.; Barrera, E.; Ruiz, M.; Bustos, A.; Vega, J.; Castro, R.

2016-02-01

Current fusion devices usually implement distributed acquisition systems for the multiple diagnostics of their experiments. However, each diagnostic is composed by hundreds or even thousands of signals, including images from the vessel interior. These signals and images must be correctly timestamped, because all the information will be analyzed to identify plasma behavior using temporal correlations. For acquisition devices without synchronization mechanisms the timestamp is given by another device with timing capabilities when signaled by the first device. Later, each data should be related with its timestamp, usually via software. This critical action is unfeasible for software applications when sampling rates are high. In order to solve this problem this paper presents the implementation of an image acquisition system with real-time hardware timestamping mechanism. This is synchronized with a master clock using the IEEE 1588 v2 Precision Time Protocol (PTP). Synchronization, image acquisition and processing, and timestamping mechanisms are implemented using Field Programmable Gate Array (FPGA) and a timing card -PTP v2 synchronized. The system has been validated using a camera simulator streaming videos from fusion databases. The developed architecture is fully compatible with ITER Fast Controllers and has been integrated with EPICS to control and monitor the whole system.

Forward and adjoint spectral-element simulations of seismic wave propagation using hardware accelerators

NASA Astrophysics Data System (ADS)

Peter, Daniel; Videau, Brice; Pouget, Kevin; Komatitsch, Dimitri

2015-04-01

Improving the resolution of tomographic images is crucial to answer important questions on the nature of Earth's subsurface structure and internal processes. Seismic tomography is the most prominent approach where seismic signals from ground-motion records are used to infer physical properties of internal structures such as compressional- and shear-wave speeds, anisotropy and attenuation. Recent advances in regional- and global-scale seismic inversions move towards full-waveform inversions which require accurate simulations of seismic wave propagation in complex 3D media, providing access to the full 3D seismic wavefields. However, these numerical simulations are computationally very expensive and need high-performance computing (HPC) facilities for further improving the current state of knowledge. During recent years, many-core architectures such as graphics processing units (GPUs) have been added to available large HPC systems. Such GPU-accelerated computing together with advances in multi-core central processing units (CPUs) can greatly accelerate scientific applications. There are mainly two possible choices of language support for GPU cards, the CUDA programming environment and OpenCL language standard. CUDA software development targets NVIDIA graphic cards while OpenCL was adopted mainly by AMD graphic cards. In order to employ such hardware accelerators for seismic wave propagation simulations, we incorporated a code generation tool BOAST into an existing spectral-element code package SPECFEM3D_GLOBE. This allows us to use meta-programming of computational kernels and generate optimized source code for both CUDA and OpenCL languages, running simulations on either CUDA or OpenCL hardware accelerators. We show here applications of forward and adjoint seismic wave propagation on CUDA/OpenCL GPUs, validating results and comparing performances for different simulations and hardware usages.

Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers.

PubMed

Carrillo, Snaider; Harkin, Jim; McDaid, Liam; Pande, Sandeep; Cawley, Seamus; McGinley, Brian; Morgan, Fearghal

2012-09-01

The brain is highly efficient in how it processes information and tolerates faults. Arguably, the basic processing units are neurons and synapses that are interconnected in a complex pattern. Computer scientists and engineers aim to harness this efficiency and build artificial neural systems that can emulate the key information processing principles of the brain. However, existing approaches cannot provide the dense interconnect for the billions of neurons and synapses that are required. Recently a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an efficient, robust computing platform. However, the use of the NoC as an interconnection fabric for large-scale SNNs demands a good trade-off between scalability, throughput, neuron/synapse ratio and power consumption. This paper presents a novel traffic-aware, adaptive NoC router, which forms part of a proposed embedded mixed-signal SNN architecture called EMBRACE (EMulating Biologically-inspiRed ArChitectures in hardwarE). The proposed adaptive NoC router provides the inter-neuron connectivity for EMBRACE, maintaining router communication and avoiding dropped router packets by adapting to router traffic congestion. Results are presented on throughput, power and area performance analysis of the adaptive router using a 90 nm CMOS technology which outperforms existing NoCs in this domain. The adaptive behaviour of the router is also verified on a Stratix II FPGA implementation of a 4 × 2 router array with real-time traffic congestion. The presented results demonstrate the feasibility of using the proposed adaptive NoC router within the EMBRACE architecture to realise large-scale SNNs on embedded hardware. Copyright © 2012 Elsevier Ltd. All rights reserved.

Hardware Design and Implementation of Fixed-Width Standard and Truncated 4×4, 6×6, 8×8 and 12×12-BIT Multipliers Using Fpga

NASA Astrophysics Data System (ADS)

Rais, Muhammad H.

2010-06-01

This paper presents Field Programmable Gate Array (FPGA) implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). Truncated multiplier is a good candidate for digital signal processing (DSP) applications such as finite impulse response (FIR) and discrete cosine transform (DCT). Remarkable reduction in FPGA resources, delay, and power can be achieved using truncated multipliers instead of standard parallel multipliers when the full precision of the standard multiplier is not required. The truncated multipliers show significant improvement as compared to standard multipliers. Results show that the anomaly in Spartan-3 AN average connection and maximum pin delay have been efficiently reduced in Virtex-4 device.

[The design of a cardiac monitoring and analysing system with low power consumption].

PubMed

Chen, Zhen-cheng; Ni, Li-li; Zhu, Yan-gao; Wang, Hong-yan; Ma, Yan

2002-07-01

The paper deals with a portable analyzing monitor system with liquid crystal display (LCD), which is low in power consumption and suitable for China's specific conditions. Apart from the development of the overall scheme of the system, the paper introduces the design of the hardware and the software. The 80196 single chip microcomputer is used as the central microprocessor to process and real-time electrocardiac signal data. The system have the following functions: five types of arrhythmia analysis, alarm, freeze, and record of automatic paperfeeding. The portable system can be operated by alternate-current (AC) or direct-current (DC). Its hardware circuit is simplified and its software structure is optimized. Multiple low power consumption and LCD unit are adopted in its modular designs.

On the Hilbert-Huang Transform Theoretical Foundation

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Blank, Karin; Huang, Norden E.

2004-01-01

The Hilbert-Huang Transform [HHT] is a novel empirical method for spectrum analysis of non-linear and non-stationary signals. The HHT is a recent development and much remains to be done to establish the theoretical foundation of the HHT algorithms. This paper develops the theoretical foundation for the convergence of the HHT sifting algorithm and it proves that the finest spectrum scale will always be the first generated by the HHT Empirical Mode Decomposition (EMD) algorithm. The theoretical foundation for cutting an extrema data points set into two parts is also developed. This then allows parallel signal processing for the HHT computationally complex sifting algorithm and its optimization in hardware.

Prototype real-time baseband signal combiner. [deep space network

NASA Technical Reports Server (NTRS)

Howard, L. D.

1980-01-01

The design and performance of a prototype real-time baseband signal combiner, used to enhance the received Voyager 2 spacecraft signals during the Jupiter flyby, is described. Hardware delay paths, operating programs, and firmware are discussed.

Data Telemetry and Acquisition System for Acoustic Signal Processing Investigations.

DTIC Science & Technology

1996-02-20

were VME- based computer systems operating under the VxWorks real - time operating system . Each system shared a common hardware and software... real - time operating system . It interfaces to the Berg PCM Decommutator board, which searches for the embedded synchronization word in the data and re...software were built on top of this architecture. The multi-tasking, message queue and memory management facilities of the VxWorks real - time operating system are

Distributed ice accretion sensor for smart aircraft structures

NASA Technical Reports Server (NTRS)

Gerardi, J. J.; Hickman, G. A.

1989-01-01

A distributed ice accretion sensor is presented, based on the concept of smart structures. Ice accretion is determined using spectral techniques to process signals from piezoelectric sensors integral to the airfoil skin. Frequency shifts in the leading edge structural skin modes are correlated to ice thickness. It is suggested that this method may be used to detect ice over large areas with minimal hardware. Results are presented from preliminary tests to measure simulated ice growth.

Detection and Processing Techniques of FECG Signal for Fetal Monitoring

PubMed Central

2009-01-01

Fetal electrocardiogram (FECG) signal contains potentially precise information that could assist clinicians in making more appropriate and timely decisions during labor. The ultimate reason for the interest in FECG signal analysis is in clinical diagnosis and biomedical applications. The extraction and detection of the FECG signal from composite abdominal signals with powerful and advance methodologies are becoming very important requirements in fetal monitoring. The purpose of this review paper is to illustrate the various methodologies and developed algorithms on FECG signal detection and analysis to provide efficient and effective ways of understanding the FECG signal and its nature for fetal monitoring. A comparative study has been carried out to show the performance and accuracy of various methods of FECG signal analysis for fetal monitoring. Finally, this paper further focused some of the hardware implementations using electrical signals for monitoring the fetal heart rate. This paper opens up a passage for researchers, physicians, and end users to advocate an excellent understanding of FECG signal and its analysis procedures for fetal heart rate monitoring system. PMID:19495912

Laser Peening Effects on Friction Stir Welding

NASA Technical Reports Server (NTRS)

Hatameleh, Omar

2009-01-01

The laser peening process can result in considerable improvement to crack initiation, propagation, and mechanical properties in FSW which equates to longer hardware service life Processed hardware safety is improved by producing higher failure tolerant hardware, and reducing risk. Lowering hardware maintenance cost produces longer hardware service life, and lower hardware down time. Application of this proposed technology will result in substantial benefits and savings throughout the life of the treated components

Architecture and Implementation of OpenPET Firmware and Embedded Software

DOE PAGES

Abu-Nimeh, Faisal T.; Ito, Jennifer; Moses, William W.; ...

2016-01-11

OpenPET is an open source, modular, extendible, and high-performance platform suitable for multi-channel data acquisition and analysis. Due to the versatility of the hardware, firmware, and software architectures, the platform is capable of interfacing with a wide variety of detector modules not only in medical imaging but also in homeland security applications. Analog signals from radiation detectors share similar characteristics-a pulse whose area is proportional to the deposited energy and whose leading edge is used to extract a timing signal. As a result, a generic design method of the platform is adopted for the hardware, firmware, and software architectures andmore » implementations. The analog front-end is hosted on a module called a Detector Board, where each board can filter, combine, timestamp, and process multiple channels independently. The processed data is formatted and sent through a backplane bus to a module called Support Board, where 1 Support Board can host up to eight Detector Board modules. The data in the Support Board, coming from 8 Detector Board modules, can be aggregated or correlated (if needed) depending on the algorithm implemented or runtime mode selected. It is then sent out to a computer workstation for further processing. The number of channels (detector modules), to be processed, mandates the overall OpenPET System Configuration, which is designed to handle up to 1,024 channels using 16-channel Detector Boards in the Standard System Configuration and 16,384 channels using 32-channel Detector Boards in the Large System Configuration.« less

Design and simulation of programmable relational optoelectronic time-pulse coded processors as base elements for sorting neural networks

NASA Astrophysics Data System (ADS)

Krasilenko, Vladimir G.; Nikolsky, Alexander I.; Lazarev, Alexander A.; Lazareva, Maria V.

2010-05-01

In the paper we show that the biologically motivated conception of time-pulse encoding usage gives a set of advantages (single methodological basis, universality, tuning simplicity, learning and programming et al) at creation and design of sensor systems with parallel input-output and processing for 2D structures hybrid and next generations neuro-fuzzy neurocomputers. We show design principles of programmable relational optoelectronic time-pulse encoded processors on the base of continuous logic, order logic and temporal waves processes. We consider a structure that execute analog signal extraction, analog and time-pulse coded variables sorting. We offer optoelectronic realization of such base relational order logic element, that consists of time-pulse coded photoconverters (pulse-width and pulse-phase modulators) with direct and complementary outputs, sorting network on logical elements and programmable commutation blocks. We make technical parameters estimations of devices and processors on such base elements by simulation and experimental research: optical input signals power 0.2 - 20 uW, processing time 1 - 10 us, supply voltage 1 - 3 V, consumption power 10 - 100 uW, extended functional possibilities, learning possibilities. We discuss some aspects of possible rules and principles of learning and programmable tuning on required function, relational operation and realization of hardware blocks for modifications of such processors. We show that it is possible to create sorting machines, neural networks and hybrid data-processing systems with untraditional numerical systems and pictures operands on the basis of such quasiuniversal hardware simple blocks with flexible programmable tuning.

Multibeam Gpu Transient Pipeline for the Medicina BEST-2 Array

NASA Astrophysics Data System (ADS)

Magro, A.; Hickish, J.; Adami, K. Z.

2013-09-01

Radio transient discovery using next generation radio telescopes will pose several digital signal processing and data transfer challenges, requiring specialized high-performance backends. Several accelerator technologies are being considered as prototyping platforms, including Graphics Processing Units (GPUs). In this paper we present a real-time pipeline prototype capable of processing multiple beams concurrently, performing Radio Frequency Interference (RFI) rejection through thresholding, correcting for the delay in signal arrival times across the frequency band using brute-force dedispersion, event detection and clustering, and finally candidate filtering, with the capability of persisting data buffers containing interesting signals to disk. This setup was deployed at the BEST-2 SKA pathfinder in Medicina, Italy, where several benchmarks and test observations of astrophysical transients were conducted. These tests show that on the deployed hardware eight 20 MHz beams can be processed simultaneously for 640 Dispersion Measure (DM) values. Furthermore, the clustering and candidate filtering algorithms employed prove to be good candidates for online event detection techniques. The number of beams which can be processed increases proportionally to the number of servers deployed and number of GPUs, making it a viable architecture for current and future radio telescopes.

Development of a Radio Frequency Space Environment Path Emulator for Evaluating Spacecraft Ranging Hardware

NASA Technical Reports Server (NTRS)

Mitchell, Jason W.; Baldwin, Philip J.; Kurichh, Rishi; Naasz, Bo J.; Luquette, Richard J.

2007-01-01

The Formation Flying Testbed (FFTB) at the National Aeronautics and Space Administration (NASA) Goddard Space Flight Center (GSFC) provides a hardware-in-the-loop test environment for formation navigation and control. The facility is evolving as a modular, hybrid, dynamic simulation facility for end-to-end guidance, navigation and. control (GN&C) design and analysis of formation flying spacecraft. The core capabilities of the FFTB, as a platform for testing critical hardware and software algorithms in-the-loop, have expanded to include S-band Radio Frequency (RF) modems for inter-spacecraft communication and ranging. To enable realistic simulations that require RF ranging sensors for relative navigation, a mechanism is needed to buffer the RF signals exchanged between spacecraft that accurately emulates the dynamic environment through which the RF signals travel, including the effects of medium, moving platforms, and radiated power. The Path Emulator for RF Signals (PERFS), currently under development at NASA GSFC, provides this capability. The function and performance of a prototype device are presented.

Characterization of a Prototype Radio Frequency Space Environment Path Emulator for Evaluating Spacecraft Ranging Hardware

NASA Technical Reports Server (NTRS)

Mitchell, Jason W.; Baldwin, Philip J.; Kurichh, Rishi; Naasz, Bo J.; Luquette, Richard J.

2007-01-01

The Formation Flying Testbed (FFTB) at the National Aeronautics and Space Administration (NASA) Goddard Space Flight Center (GSFC) provides a hardware-in-the-loop test environment for formation navigation and control. The facility is evolving as a modular, hybrid, dynamic simulation facility for end-to-end guidance, navigation and control (GN&C) design and analysis of formation flying spacecraft. The core capabilities of the FFTB, as a platform for testing critical hardware and software algorithms in-the-loop, have expanded to include S-band Radio Frequency (RF) modems for interspacecraft communication and ranging. To enable realistic simulations that require RF ranging sensors for relative navigation, a mechanism is needed to buffer the RF signals exchanged between spacecraft that accurately emulates the dynamic environment through which the RF signals travel, including the effects of the medium, moving platforms, and radiated power. The Path Emulator for Radio Frequency Signals (PERFS), currently under development at NASA GSFC, provides this capability. The function and performance of a prototype device are presented.

Retrospective data-driven respiratory gating for PET/CT

NASA Astrophysics Data System (ADS)

Schleyer, Paul J.; O'Doherty, Michael J.; Barrington, Sally F.; Marsden, Paul K.

2009-04-01

Respiratory motion can adversely affect both PET and CT acquisitions. Respiratory gating allows an acquisition to be divided into a series of motion-reduced bins according to the respiratory signal, which is typically hardware acquired. In order that the effects of motion can potentially be corrected for, we have developed a novel, automatic, data-driven gating method which retrospectively derives the respiratory signal from the acquired PET and CT data. PET data are acquired in listmode and analysed in sinogram space, and CT data are acquired in cine mode and analysed in image space. Spectral analysis is used to identify regions within the CT and PET data which are subject to respiratory motion, and the variation of counts within these regions is used to estimate the respiratory signal. Amplitude binning is then used to create motion-reduced PET and CT frames. The method was demonstrated with four patient datasets acquired on a 4-slice PET/CT system. To assess the accuracy of the data-derived respiratory signal, a hardware-based signal was acquired for comparison. Data-driven gating was successfully performed on PET and CT datasets for all four patients. Gated images demonstrated respiratory motion throughout the bin sequences for all PET and CT series, and image analysis and direct comparison of the traces derived from the data-driven method with the hardware-acquired traces indicated accurate recovery of the respiratory signal.

A Low-Cost Modular Platform for Heterogeneous Data Acquisition with Accurate Interchannel Synchronization

PubMed Central

Blanco-Claraco, José Luis; López-Martínez, Javier; Torres-Moreno, José Luis; Giménez-Fernández, Antonio

2015-01-01

Most experimental fields of science and engineering require the use of data acquisition systems (DAQ), devices in charge of sampling and converting electrical signals into digital data and, typically, performing all of the required signal preconditioning. Since commercial DAQ systems are normally focused on specific types of sensors and actuators, systems engineers may need to employ mutually-incompatible hardware from different manufacturers in applications demanding heterogeneous inputs and outputs, such as small-signal analog inputs, differential quadrature rotatory encoders or variable current outputs. A common undesirable side effect of heterogeneous DAQ hardware is the lack of an accurate synchronization between samples captured by each device. To solve such a problem with low-cost hardware, we present a novel modular DAQ architecture comprising a base board and a set of interchangeable modules. Our main design goal is the ability to sample all sources at predictable, fixed sampling frequencies, with a reduced synchronization mismatch (<1 μs) between heterogeneous signal sources. We present experiments in the field of mechanical engineering, illustrating vibration spectrum analyses from piezoelectric accelerometers and, as a novelty in these kinds of experiments, the spectrum of quadrature encoder signals. Part of the design and software will be publicly released online. PMID:26516865

Unpowered wireless generation and sensing of ultrasound

NASA Astrophysics Data System (ADS)

Huang, Haiying

2013-04-01

This paper presents a wireless ultrasound pitch-catch system that demonstrates the wireless generation and sensing of ultrasounds based on the principle of frequency conversion. The wireless ultrasound pitch-catch system consists of a wireless interrogator and two wireless ultrasound transducers. The wireless interrogator generates an ultrasound-modulated signal and a carrier signal, both at the microwave frequency, and transmits these two signals to the wireless ultrasound actuator using a pair of antennas. Upon receiving these two signals, the wireless ultrasound actuator recovers the ultrasound excitation signal using a passive mixer and then supplies it to a piezoelectric wafer sensor for ultrasound generation in the structure. For wireless ultrasound sensing, the frequency conversion process is reversed. The ultrasound sensing signal is up-converted to a microwave signal by the wireless ultrasound sensor and is recovered at the wireless interrogator using a homodyne receiver. To differentiate the wireless actuator from the wireless sensor, each wireless transducer is equipped with a narrowband microwave filter so that it only responds to the carrier frequency that matches the filter's operation bandwidth. The principle of operation of the wireless pitch-catch system, the hardware implementation, and the associated data processing algorithm to recover the ultrasound signal from the wirelessly received signal are described. The wirelessly acquired ultrasound signal is compared with those acquired using wired connection in both time and frequency domain.

High-fidelity real-time maritime scene rendering

NASA Astrophysics Data System (ADS)

Shyu, Hawjye; Taczak, Thomas M.; Cox, Kevin; Gover, Robert; Maraviglia, Carlos; Cahill, Colin

2011-06-01

The ability to simulate authentic engagements using real-world hardware is an increasingly important tool. For rendering maritime environments, scene generators must be capable of rendering radiometrically accurate scenes with correct temporal and spatial characteristics. When the simulation is used as input to real-world hardware or human observers, the scene generator must operate in real-time. This paper introduces a novel, real-time scene generation capability for rendering radiometrically accurate scenes of backgrounds and targets in maritime environments. The new model is an optimized and parallelized version of the US Navy CRUISE_Missiles rendering engine. It was designed to accept environmental descriptions and engagement geometry data from external sources, render a scene, transform the radiometric scene using the electro-optical response functions of a sensor under test, and output the resulting signal to real-world hardware. This paper reviews components of the scene rendering algorithm, and details the modifications required to run this code in real-time. A description of the simulation architecture and interfaces to external hardware and models is presented. Performance assessments of the frame rate and radiometric accuracy of the new code are summarized. This work was completed in FY10 under Office of Secretary of Defense (OSD) Central Test and Evaluation Investment Program (CTEIP) funding and will undergo a validation process in FY11.

MRI monitoring of focused ultrasound sonications near metallic hardware.

PubMed

Weber, Hans; Ghanouni, Pejman; Pascal-Tenorio, Aurea; Pauly, Kim Butts; Hargreaves, Brian A

2018-07-01

To explore the temperature-induced signal change in two-dimensional multi-spectral imaging (2DMSI) for fast thermometry near metallic hardware to enable MR-guided focused ultrasound surgery (MRgFUS) in patients with implanted metallic hardware. 2DMSI was optimized for temperature sensitivity and applied to monitor focus ultrasound surgery (FUS) sonications near metallic hardware in phantoms and ex vivo porcine muscle tissue. Further, we evaluated its temperature sensitivity for in vivo muscle in patients without metallic hardware. In addition, we performed a comparison of temperature sensitivity between 2DMSI and conventional proton-resonance-frequency-shift (PRFS) thermometry at different distances from metal devices and different signal-to-noise ratios (SNR). 2DMSI thermometry enabled visualization of short ultrasound sonications near metallic hardware. Calibration using in vivo muscle yielded a constant temperature sensitivity for temperatures below 43 °C. For an off-resonance coverage of ± 6 kHz, we achieved a temperature sensitivity of 1.45%/K, resulting in a minimum detectable temperature change of ∼2.5 K for an SNR of 100 with a temporal resolution of 6 s per frame. The proposed 2DMSI thermometry has the potential to allow MR-guided FUS treatments of patients with metallic hardware and therefore expand its reach to a larger patient population. Magn Reson Med 80:259-271, 2018. © 2017 International Society for Magnetic Resonance in Medicine. © 2017 International Society for Magnetic Resonance in Medicine.

Electro-optic voltage sensor with Multiple Beam Splitting

DOEpatents

Woods, Gregory K.; Renak, Todd W.; Crawford, Thomas M.; Davidson, James R.

2000-01-01

A miniature electro-optic voltage sensor system capable of accurate operation at high voltages without use of the dedicated voltage dividing hardware. The invention achieves voltage measurement without significant error contributions from neighboring conductors or environmental perturbations. The invention employs a transmitter, a sensor, a detector, and a signal processor. The transmitter produces a beam of electromagnetic radiation which is routed into the sensor. Within the sensor the beam undergoes the Pockels electro-optic effect. The electro-optic effect produces a modulation of the beam's polarization, which is in turn converted to a pair of independent conversely-amplitude-modulated signals, from which the voltage of the E-field is determined by the signal processor. The use of converse AM signals enables the signal processor to better distinguish signal from noise. The sensor converts the beam by splitting the beam in accordance with the axes of the beam's polarization state (an ellipse) into at least two AM signals. These AM signals are fed into a signal processor and processed to determine the voltage between a ground conductor and the conductor on which voltage is being measured.

Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing

PubMed Central

Chen, Szi-Wen; Chen, Yuan-Ho

2015-01-01

In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz. PMID:26501290

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Ormsby, John (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing (DSP) functions. Such capability also makes and FPGA a suitable platform for the digital implementation of closed loop controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance in a compact form-factor. Other researchers have presented the notion that a second order digital filter with proportional-integral-derivative (PID) control functionality can be implemented in an FPGA. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSF) devices. Our goal is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. Meeting our goals requires alternative compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching these goals.

Hardware design and implementation of a wavelet de-noising procedure for medical signal preprocessing.

PubMed

Chen, Szi-Wen; Chen, Yuan-Ho

2015-10-16

In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz.

Bi-Fi: an embedded sensor/system architecture for REMOTE biological monitoring.

PubMed

Farshchi, Shahin; Pesterev, Aleksey; Nuyujukian, Paul H; Mody, Istvan; Judy, Jack W

2007-11-01

Wireless-enabled processor modules intended for communicating low-frequency phenomena (i.e., temperature, humidity, and ambient light) have been enabled to acquire and transmit multiple biological signals in real time, which has been achieved by using computationally efficient data acquisition, filtering, and compression algorithms, and interfacing the modules with biological interface hardware. The sensor modules can acquire and transmit raw biological signals at a rate of 32 kb/s, which is near the hardware limit of the modules. Furthermore, onboard signal processing enables one channel, sampled at a rate of 4000 samples/s at 12-bit resolution, to be compressed via adaptive differential-pulse-code modulation (ADPCM) and transmitted in real time. In addition, the sensors can be configured to filter and transmit individual time-referenced "spike" waveforms, or to transmit the spike height and width for alleviating network traffic and increasing battery life. The system is capable of acquiring eight channels of analog signals as well as data via an asynchronous serial connection. A back-end server archives the biological data received via networked gateway sensors, and hosts them to a client application that enables users to browse recorded data. The system also acquires, filters, and transmits oxygen saturation and pulse rate via a commercial-off-the-shelf interface board. The system architecture can be configured for performing real-time nonobtrusive biological monitoring of humans or rodents. This paper demonstrates that low-power, computational, and bandwidth-constrained wireless-enabled platforms can indeed be leveraged for wireless biosignal monitoring.

Video Guidance Sensor and Time-of-Flight Rangefinder

NASA Technical Reports Server (NTRS)

Bryan, Thomas; Howard, Richard; Bell, Joseph L.; Roe, Fred D.; Book, Michael L.

2007-01-01

A proposed video guidance sensor (VGS) would be based mostly on the hardware and software of a prior Advanced VGS (AVGS), with some additions to enable it to function as a time-of-flight rangefinder (in contradistinction to a triangulation or image-processing rangefinder). It would typically be used at distances of the order of 2 or 3 kilometers, where a typical target would appear in a video image as a single blob, making it possible to extract the direction to the target (but not the orientation of the target or the distance to the target) from a video image of light reflected from the target. As described in several previous NASA Tech Briefs articles, an AVGS system is an optoelectronic system that provides guidance for automated docking of two vehicles. In the original application, the two vehicles are spacecraft, but the basic principles of design and operation of the system are applicable to aircraft, robots, objects maneuvered by cranes, or other objects that may be required to be aligned and brought together automatically or under remote control. In a prior AVGS system of the type upon which the now-proposed VGS is largely based, the tracked vehicle is equipped with one or more passive targets that reflect light from one or more continuous-wave laser diode(s) on the tracking vehicle, a video camera on the tracking vehicle acquires images of the targets in the reflected laser light, the video images are digitized, and the image data are processed to obtain the direction to the target. The design concept of the proposed VGS does not call for any memory or processor hardware beyond that already present in the prior AVGS, but does call for some additional hardware and some additional software. It also calls for assignment of some additional tasks to two subsystems that are parts of the prior VGS: a field-programmable gate array (FPGA) that generates timing and control signals, and a digital signal processor (DSP) that processes the digitized video images. The additional timing and control signals generated by the FPGA would cause the VGS to alternate between an imaging (direction-finding) mode and a time-of-flight (range-finding mode) and would govern operation in the range-finding mode.

Overview of the NASA SETI Program

NASA Technical Reports Server (NTRS)

Oliver, B. M.

1986-01-01

The NASA Search of Extraterrestrial Intelligence (SETI) program plan is to scan the microwave window from 1 to 10 GHz with existing radio telescopes and sophisticated signal processing equipment looking for narrow band features that might represent artificial signals. A microwave spectrometer was built and is being field tested. A pattern recognition computer to search for drifting continuous wave signals and pulse trains in the output spectra is being designed. Equipment to characterize the radio frequency interference environment was also built. The plan is to complete the hardware and software by FY-88. Then, with increased funding, this equipment will be replicated in Very Large Scale Integration form. Observations, both a complete sky survey and a search fo nearby solar type stars, will begin in about 1990. The hypothesis that very powerful signals exist or that signals are being beamed at us will be tested. To detect the kinds of signals radiated at distances of 100 light years will require a collecting area kilometers in diameter.

Stepped-frequency GPR for utility line detection using polarization-dependent scattering

NASA Astrophysics Data System (ADS)

Jensen, Ole K.; Gregersen, Ole G.

2000-04-01

A GPR for detection of buried cables and pipes is developed by Ekko Dane Production in cooperation with Aalborg University. The appearance is a 'lawn mower' model including antennas, electronics and on-line data processing. A successful result is obtained by combining dedicated hardware and signal processing. The inherent signal to clutter ratio is bad, but making measurements at many polarization angles and subsequent signal processing improves the ratio. A simple model of the polarization dependence of the scattering from the target is used. The method is improved by combining the polarization filtering with averaging over small horizontal displacements. A stepped frequency measurement system is used. The method often implies long measurement times, but this problem is overcome by development of fast RF-electronics. Standard signal processors are used for real-time data processing. Several antenna array configurations are tested and optimized for low coupling between transmitter and receiver and for a short impulse response. A large number of tests have been made for different targets, e.g. metal cables and plastic pipes filled with air or water. Tests have been made under realistic ground conditions, including sand, wet clay, pavements and grass covered soil. The results show reliable detection even when the conditions are difficult.

Real-time Enhancement, Registration, and Fusion for an Enhanced Vision System

NASA Technical Reports Server (NTRS)

Hines, Glenn D.; Rahman, Zia-ur; Jobson, Daniel J.; Woodell, Glenn A.

2006-01-01

Over the last few years NASA Langley Research Center (LaRC) has been developing an Enhanced Vision System (EVS) to aid pilots while flying in poor visibility conditions. The EVS captures imagery using two infrared video cameras. The cameras are placed in an enclosure that is mounted and flown forward-looking underneath the NASA LaRC ARIES 757 aircraft. The data streams from the cameras are processed in real-time and displayed on monitors on-board the aircraft. With proper processing the camera system can provide better-than-human-observed imagery particularly during poor visibility conditions. However, to obtain this goal requires several different stages of processing including enhancement, registration, and fusion, and specialized processing hardware for real-time performance. We are using a real-time implementation of the Retinex algorithm for image enhancement, affine transformations for registration, and weighted sums to perform fusion. All of the algorithms are executed on a single TI DM642 digital signal processor (DSP) clocked at 720 MHz. The image processing components were added to the EVS system, tested, and demonstrated during flight tests in August and September of 2005. In this paper we briefly discuss the EVS image processing hardware and algorithms. We then discuss implementation issues and show examples of the results obtained during flight tests.

Electronic Voltage and Current Transformers Testing Device

PubMed Central

Pan, Feng; Chen, Ruimin; Xiao, Yong; Sun, Weiming

2012-01-01

A method for testing electronic instrument transformers is described, including electronic voltage and current transformers (EVTs, ECTs) with both analog and digital outputs. A testing device prototype is developed. It is based on digital signal processing of the signals that are measured at the secondary outputs of the tested transformer and the reference transformer when the same excitation signal is fed to their primaries. The test that estimates the performance of the prototype has been carried out at the National Centre for High Voltage Measurement and the prototype is approved for testing transformers with precision class up to 0.2 at the industrial frequency (50 Hz or 60 Hz). The device is suitable for on-site testing due to its high accuracy, simple structure and low-cost hardware. PMID:22368510

Bluetooth-based sensor networks for remotely monitoring the physiological signals of a patient.

PubMed

Zhang, Ying; Xiao, Hannan

2009-11-01

Integrating intelligent medical microsensors into a wireless communication network makes it possible to remotely collect physiological signals of a patient, release the patient from being tethered to monitoring medical instrumentations, and facilitate the patient's early hospital discharge. This can further improve life quality by providing continuous observation without the need of disrupting the patient's normal life, thus reducing the risk of infection significantly, and decreasing the cost of the hospital and the patient. This paper discusses the implementation issues, and describes the overall system architecture of our developed Bluetooth sensor network for patient monitoring and the corresponding heart activity sensors. It also presents our approach to developing the intelligent physiological sensor nodes involving integration of Bluetooth radio technology, hardware and software organization, and our solutions for onboard signal processing.

The development of a power spectral density processor for C and L band airborne radar scatterometer sensor systems

NASA Technical Reports Server (NTRS)

Harrison, D. A., III; Chladek, J. T.

1983-01-01

A real-time signal processor was developed for the NASA/JSC L-and C-band airborne radar scatterometer sensor systems. The purpose of the effort was to reduce ground data processing costs. Conversion of two quadrature channels of data (like and cross polarized) was made to obtain Power Spectral Density (PSD) values. A chirp-z transform (CZT) approach was used to filter the Doppler return signal and improved high frequency and angular resolution was realized. The processors have been tested with record signals and excellent results were obtained. CZT filtering can be readily applied to scatterometers operating at other wavelengths by altering the sample frequency. The design of the hardware and software and the results of the performance tests are described in detail.

Inferring Human Activity Recognition with Ambient Sound on Wireless Sensor Nodes.

PubMed

Salomons, Etto L; Havinga, Paul J M; van Leeuwen, Henk

2016-09-27

A wireless sensor network that consists of nodes with a sound sensor can be used to obtain context awareness in home environments. However, the limited processing power of wireless nodes offers a challenge when extracting features from the signal, and subsequently, classifying the source. Although multiple papers can be found on different methods of sound classification, none of these are aimed at limited hardware or take the efficiency of the algorithms into account. In this paper, we compare and evaluate several classification methods on a real sensor platform using different feature types and classifiers, in order to find an approach that results in a good classifier that can run on limited hardware. To be as realistic as possible, we trained our classifiers using sound waves from many different sources. We conclude that despite the fact that the classifiers are often of low quality due to the highly restricted hardware resources, sufficient performance can be achieved when (1) the window length for our classifiers is increased, and (2) if we apply a two-step approach that uses a refined classification after a global classification has been performed.

Resource Efficient Hardware Architecture for Fast Computation of Running Max/Min Filters

PubMed Central

Torres-Huitzil, Cesar

2013-01-01

Running max/min filters on rectangular kernels are widely used in many digital signal and image processing applications. Filtering with a k × k kernel requires of k 2 − 1 comparisons per sample for a direct implementation; thus, performance scales expensively with the kernel size k. Faster computations can be achieved by kernel decomposition and using constant time one-dimensional algorithms on custom hardware. This paper presents a hardware architecture for real-time computation of running max/min filters based on the van Herk/Gil-Werman (HGW) algorithm. The proposed architecture design uses less computation and memory resources than previously reported architectures when targeted to Field Programmable Gate Array (FPGA) devices. Implementation results show that the architecture is able to compute max/min filters, on 1024 × 1024 images with up to 255 × 255 kernels, in around 8.4 milliseconds, 120 frames per second, at a clock frequency of 250 MHz. The implementation is highly scalable for the kernel size with good performance/area tradeoff suitable for embedded applications. The applicability of the architecture is shown for local adaptive image thresholding. PMID:24288456

WE-DE-206-02: MRI Hardware - Magnet, Gradient, RF Coils

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kocharian, A.

Magnetic resonance imaging (MRI) has become an essential part of clinical imaging due to its ability to render high soft tissue contrast. Instead of ionizing radiation, MRI use strong magnetic field, radio frequency waves and field gradients to create diagnostic useful images. It can be used to image the anatomy and also functional and physiological activities within the human body. Knowledge of the basic physical principles underlying MRI acquisition is vitally important to successful image production and proper image interpretation. This lecture will give an overview of the spin physics, imaging principle of MRI, the hardware of the MRI scanner,more » and various pulse sequences and their applications. It aims to provide a conceptual foundation to understand the image formation process of a clinical MRI scanner. Learning Objectives: Understand the origin of the MR signal and contrast from the spin physics level. Understand the main hardware components of a MRI scanner and their purposes Understand steps for MR image formation including spatial encoding and image reconstruction Understand the main kinds of MR pulse sequences and their characteristics.« less

Design and Analysis of a Neuromemristive Reservoir Computing Architecture for Biosignal Processing

PubMed Central

Kudithipudi, Dhireesha; Saleh, Qutaiba; Merkel, Cory; Thesing, James; Wysocki, Bryant

2016-01-01

Reservoir computing (RC) is gaining traction in several signal processing domains, owing to its non-linear stateful computation, spatiotemporal encoding, and reduced training complexity over recurrent neural networks (RNNs). Previous studies have shown the effectiveness of software-based RCs for a wide spectrum of applications. A parallel body of work indicates that realizing RNN architectures using custom integrated circuits and reconfigurable hardware platforms yields significant improvements in power and latency. In this research, we propose a neuromemristive RC architecture, with doubly twisted toroidal structure, that is validated for biosignal processing applications. We exploit the device mismatch to implement the random weight distributions within the reservoir and propose mixed-signal subthreshold circuits for energy efficiency. A comprehensive analysis is performed to compare the efficiency of the neuromemristive RC architecture in both digital(reconfigurable) and subthreshold mixed-signal realizations. Both Electroencephalogram (EEG) and Electromyogram (EMG) biosignal benchmarks are used for validating the RC designs. The proposed RC architecture demonstrated an accuracy of 90 and 84% for epileptic seizure detection and EMG prosthetic finger control, respectively. PMID:26869876

A New Multiplier Structure for Digital Signal Processing

DTIC Science & Technology

1980-01-01

8217 ’) ’ 1 ’ ’ ":"/’.4 -r ,’::33,!. ,4 .1,4 .. . ...;.r I ’I,’ C!’ vdI I"., 1" r;’O . ;AOO..󈧳 -, :𔄀. "’ rO0000’:’- 4 . 6.67 - 1733:::: .. 1...pipelined execution rate can he purchased at a small hardware cost. Example: p - 211 . 2048 , x = 1040, y = 352, then Z = <xy>p 1536 S + + Al:s = 1376; (j(s

Propagation Terminal Design and Measurements

NASA Technical Reports Server (NTRS)

Nessel, James

2015-01-01

The NASA propagation terminal has been designed and developed by the Glenn Research Center and is presently deployed at over 5 NASA and partner ground stations worldwide collecting information on the effects of the atmosphere on Ka-band and millimeter wave communications links. This lecture provides an overview of the fundamentals and requirements of the measurement of atmospheric propagation effects and, specifically, the types of hardware and digital signal processing techniques employed by current state-of-the-art propagation terminal systems.

Project Cyclops: a Design Study of a System for Detecting Extraterrestrial Intelligent Life

NASA Technical Reports Server (NTRS)

1972-01-01

The requirements in hardware, manpower, time and funding to conduct a realistic effort aimed at detecting the existence of extraterrestrial intelligent life are examined. The methods used are limited to present or near term future state-of-the-art techniques. Subjects discussed include: (1) possible methods of contact, (2) communication by electromagnetic waves, (3) antenna array and system facilities, (4) antenna elements, (5) signal processing, (6) search strategy, and (7) radio and radar astronomy.

LANDSAT-D flight segment operations manual, volume 1

NASA Technical Reports Server (NTRS)

Varhola, J.

1982-01-01

Hardware, systems, and subsystems for the multimission modular spacecraft used for LANDSAT 4 are described and depicted in block diagrams and schematics. Components discussed include the modular attitude control system; the communication and data handling subsystem; the narrowband tape recorder; the on-board computer; the propulsion module subsystem; the signal conditioning and control unit; the modular power subsystem; the solar array drive and power transmission assembly; the power distribution unit; the digital processing unit; and the wideband communication subsystem.

Ultranarrowband searches for extraterrestrial intelligence with dedicated signal-processing hardware

NASA Technical Reports Server (NTRS)

Horowitz, P.; Matthews, B. S.; Forster, J.; Linscott, I.; Teague, C. C.; Chen, K.; Backus, P.

1986-01-01

An evaluation is made of the prospects for SETI applications of multichannel spectroscopy, assuming narrowband RF beacon transmission, with a mHz resolution that matches interstellar medium properties. Receiver Doppler corrections must furnish substantial interference rejection. Results are presented from an Arecibo antenna search of 250 sunlike stars at 1.4 and 2.8 GHz. A meridian transit search of the northern sky is also in progress with the Harvard-Smithsonian 26-m antenna.

High Resolution Imaging with MUSTANG-2 on the GBT

NASA Astrophysics Data System (ADS)

Stanchfield, Sara; Ade, Peter; Aguirre, James; Brevik, Justus A.; Cho, Hsiao-Mei; Datta, Rahul; Devlin, Mark; Dicker, Simon R.; Dober, Bradley; Duff, Shannon M.; Egan, Dennis; Ford, Pam; Hilton, Gene; Hubmayr, Johannes; Irwin, Kent; Knowles, Kenda; Marganian, Paul; Mason, Brian Scott; Mates, John A. B.; McMahon, Jeff; Mello, Melinda; Mroczkowski, Tony; Romero, Charles; Sievers, Jonathon; Tucker, Carole; Vale, Leila R.; Vissers, Michael; White, Steven; Whitehead, Mark; Ullom, Joel; Young, Alexander

2018-01-01

We present early science results from MUSTANG-2, a 90 GHz feedhorn-coupled, microwave SQUID-multiplexed TES bolometer array operating on the Robert C. Byrd Green Bank Telescope (GBT). The feedhorn and waveguide-probe-coupled detector technology is a mature technology, which has been used on instruments such as the South Pole Telescope, the Atacama Cosmology Telescope, and the Atacama B-mode Search telescope. The microwave SQUID multiplexer-based readout system developed for MUSTANG-2 currently reads out 66 detectors with a single coaxial cable and will eventually allow thousands of detectors to be multiplexed. This microwave SQUID multiplexer combines the proven abilities of millimeter wave TES detectors with the multiplexing capabilities of KIDs with no degradation in noise performance of the detectors. Each multiplexing device is read out using warm electronics consisting of a commercially available ROACH board, a DAC/ADC card, and an Intermediate Frequency mixer circuit. The hardware was originally developed by the Collaboration for Astronomy Signal Processing and Electronic Research (CASPER) group, whose primary goal is to develop scalable FPGA-based hardware with the flexibility to be used in a wide range of radio signal processing applications. MUSTANG-2 is the first on-sky instrument to use microwave SQUID multiplexing and is available as a shared-risk/PI instrument on the GBT. In MUSTANG-2’s first season 7 separate proposals were awarded a total of 230 hours of telescope time.

A full-duplex optical access system with hybrid 64/16/4QAM-OFDM downlink

NASA Astrophysics Data System (ADS)

He, Chao; Tan, Ze-fu; Shao, Yu-feng; Cai, Li; Pu, He-sheng; Zhu, Yun-le; Huang, Si-si; Liu, Yu

2016-09-01

A full-duplex optical passive access scheme is proposed and verified by simulation, in which hybrid 64/16/4-quadrature amplitude modulation (64/16/4QAM) orthogonal frequency division multiplexing (OFDM) optical signal is for downstream transmission and non-return-to-zero (NRZ) optical signal is for upstream transmission. In view of the transmitting and receiving process for downlink optical signal, in-phase/quadrature-phase (I/Q) modulation based on Mach-Zehnder modulator (MZM) and homodyne coherent detection technology are employed, respectively. The simulation results show that the bit error ratio ( BER) less than hardware decision forward error correction (HD-FEC) threshold is successfully obtained over transmission path with 20-km-long standard single mode fiber (SSMF) for hybrid downlink modulation OFDM optical signal. In addition, by dividing the system bandwidth into several subchannels consisting of some continuous subcarriers, it is convenient for users to select different channels depending on requirements of communication.

Signal processing for distributed sensor concept: DISCO

NASA Astrophysics Data System (ADS)

Rafailov, Michael K.

2007-04-01

Distributed Sensor concept - DISCO proposed for multiplication of individual sensor capabilities through cooperative target engagement. DISCO relies on ability of signal processing software to format, to process and to transmit and receive sensor data and to exploit those data in signal synthesis process. Each sensor data is synchronized formatted, Signal-to-Noise Ration (SNR) enhanced and distributed inside of the sensor network. Signal processing technique for DISCO is Recursive Adaptive Frame Integration of Limited data - RAFIL technique that was initially proposed [1] as a way to improve the SNR, reduce data rate and mitigate FPA correlated noise of an individual sensor digital video-signal processing. In Distributed Sensor Concept RAFIL technique is used in segmented way, when constituencies of the technique are spatially and/or temporally separated between transmitters and receivers. Those constituencies include though not limited to two thresholds - one is tuned for optimum probability of detection, the other - to manage required false alarm rate, and limited frame integration placed somewhere between the thresholds as well as formatters, conventional integrators and more. RAFIL allows a non-linear integration that, along with SNR gain, provides system designers more capability where cost, weight, or power considerations limit system data rate, processing, or memory capability [2]. DISCO architecture allows flexible optimization of SNR gain, data rates and noise suppression on sensor's side and limited integration, re-formatting and final threshold on node's side. DISCO with Recursive Adaptive Frame Integration of Limited data may have flexible architecture that allows segmenting the hardware and software to be best suitable for specific DISCO applications and sensing needs - whatever it is air-or-space platforms, ground terminals or integration of sensors network.

Hybrid receiver study

NASA Technical Reports Server (NTRS)

Stone, M. S.; Mcadam, P. L.; Saunders, O. W.

1977-01-01

The results are presented of a 4 month study to design a hybrid analog/digital receiver for outer planet mission probe communication links. The scope of this study includes functional design of the receiver; comparisons between analog and digital processing; hardware tradeoffs for key components including frequency generators, A/D converters, and digital processors; development and simulation of the processing algorithms for acquisition, tracking, and demodulation; and detailed design of the receiver in order to determine its size, weight, power, reliability, and radiation hardness. In addition, an evaluation was made of the receiver's capabilities to perform accurate measurement of signal strength and frequency for radio science missions.

Software for Acoustic Rendering

NASA Technical Reports Server (NTRS)

Miller, Joel D.

2003-01-01

SLAB is a software system that can be run on a personal computer to simulate an acoustic environment in real time. SLAB was developed to enable computational experimentation in which one can exert low-level control over a variety of signal-processing parameters, related to spatialization, for conducting psychoacoustic studies. Among the parameters that can be manipulated are the number and position of reflections, the fidelity (that is, the number of taps in finite-impulse-response filters), the system latency, and the update rate of the filters. Another goal in the development of SLAB was to provide an inexpensive means of dynamic synthesis of virtual audio over headphones, without need for special-purpose signal-processing hardware. SLAB has a modular, object-oriented design that affords the flexibility and extensibility needed to accommodate a variety of computational experiments and signal-flow structures. SLAB s spatial renderer has a fixed signal-flow architecture corresponding to a set of parallel signal paths from each source to a listener. This fixed architecture can be regarded as a compromise that optimizes efficiency at the expense of complete flexibility. Such a compromise is necessary, given the design goal of enabling computational psychoacoustic experimentation on inexpensive personal computers.

Seismic signal processing on heterogeneous supercomputers

NASA Astrophysics Data System (ADS)

Gokhberg, Alexey; Ermert, Laura; Fichtner, Andreas

2015-04-01

The processing of seismic signals - including the correlation of massive ambient noise data sets - represents an important part of a wide range of seismological applications. It is characterized by large data volumes as well as high computational input/output intensity. Development of efficient approaches towards seismic signal processing on emerging high performance computing systems is therefore essential. Heterogeneous supercomputing systems introduced in the recent years provide numerous computing nodes interconnected via high throughput networks, every node containing a mix of processing elements of different architectures, like several sequential processor cores and one or a few graphical processing units (GPU) serving as accelerators. A typical representative of such computing systems is "Piz Daint", a supercomputer of the Cray XC 30 family operated by the Swiss National Supercomputing Center (CSCS), which we used in this research. Heterogeneous supercomputers provide an opportunity for manifold application performance increase and are more energy-efficient, however they have much higher hardware complexity and are therefore much more difficult to program. The programming effort may be substantially reduced by the introduction of modular libraries of software components that can be reused for a wide class of seismology applications. The ultimate goal of this research is design of a prototype for such library suitable for implementing various seismic signal processing applications on heterogeneous systems. As a representative use case we have chosen an ambient noise correlation application. Ambient noise interferometry has developed into one of the most powerful tools to image and monitor the Earth's interior. Future applications will require the extraction of increasingly small details from noise recordings. To meet this demand, more advanced correlation techniques combined with very large data volumes are needed. This poses new computational problems that require dedicated HPC solutions. The chosen application is using a wide range of common signal processing methods, which include various IIR filter designs, amplitude and phase correlation, computing the analytic signal, and discrete Fourier transforms. Furthermore, various processing methods specific for seismology, like rotation of seismic traces, are used. Efficient implementation of all these methods on the GPU-accelerated systems represents several challenges. In particular, it requires a careful distribution of work between the sequential processors and accelerators. Furthermore, since the application is designed to process very large volumes of data, special attention had to be paid to the efficient use of the available memory and networking hardware resources in order to reduce intensity of data input and output. In our contribution we will explain the software architecture as well as principal engineering decisions used to address these challenges. We will also describe the programming model based on C++ and CUDA that we used to develop the software. Finally, we will demonstrate performance improvements achieved by using the heterogeneous computing architecture. This work was supported by a grant from the Swiss National Supercomputing Centre (CSCS) under project ID d26.

Automated recognition of helium speech. Phase I: Investigation of microprocessor based analysis/synthesis system

NASA Astrophysics Data System (ADS)

Jelinek, H. J.

1986-01-01

This is the Final Report of Electronic Design Associates on its Phase I SBIR project. The purpose of this project is to develop a method for correcting helium speech, as experienced in diver-surface communication. The goal of the Phase I study was to design, prototype, and evaluate a real time helium speech corrector system based upon digital signal processing techniques. The general approach was to develop hardware (an IBM PC board) to digitize helium speech and software (a LAMBDA computer based simulation) to translate the speech. As planned in the study proposal, this initial prototype may now be used to assess expected performance from a self contained real time system which uses an identical algorithm. The Final Report details the work carried out to produce the prototype system. Four major project tasks were: a signal processing scheme for converting helium speech to normal sounding speech was generated. The signal processing scheme was simulated on a general purpose (LAMDA) computer. Actual helium speech was supplied to the simulation and the converted speech was generated. An IBM-PC based 14 bit data Input/Output board was designed and built. A bibliography of references on speech processing was generated.

Simplifying the circuit of Josephson parametric converters

NASA Astrophysics Data System (ADS)

Abdo, Baleegh; Brink, Markus; Chavez-Garcia, Jose; Keefe, George

Josephson parametric converters (JPCs) are quantum-limited three-wave mixing devices that can play various important roles in quantum information processing in the microwave domain, including amplification of quantum signals, transduction of quantum information, remote entanglement of qubits, nonreciprocal amplification, and circulation of signals. However, the input-output and biasing circuit of a state-of-the-art JPC consists of bulky components, i.e. two commercial off-chip broadband 180-degree hybrids, four phase-matched short coax cables, and one superconducting magnetic coil. Such bulky hardware significantly hinders the integration of JPCs in scalable quantum computing architectures. In my talk, I will present ideas on how to simplify the JPC circuit and show preliminary experimental results

Fault Detection and Safety in Closed-Loop Artificial Pancreas Systems

PubMed Central

2014-01-01

Continuous subcutaneous insulin infusion pumps and continuous glucose monitors enable individuals with type 1 diabetes to achieve tighter blood glucose control and are critical components in a closed-loop artificial pancreas. Insulin infusion sets can fail and continuous glucose monitor sensor signals can suffer from a variety of anomalies, including signal dropout and pressure-induced sensor attenuations. In addition to hardware-based failures, software and human-induced errors can cause safety-related problems. Techniques for fault detection, safety analyses, and remote monitoring techniques that have been applied in other industries and applications, such as chemical process plants and commercial aircraft, are discussed and placed in the context of a closed-loop artificial pancreas. PMID:25049365

FPGA Based High Speed Data Acquisition System for Electrical Impedance Tomography

PubMed Central

Khan, S; Borsic, A; Manwaring, Preston; Hartov, Alexander; Halter, Ryan

2014-01-01

Electrical Impedance Tomography (EIT) systems are used to image tissue bio-impedance. EIT provides a number of features making it attractive for use as a medical imaging device including the ability to image fast physiological processes (>60 Hz), to meet a range of clinical imaging needs through varying electrode geometries and configurations, to impart only non-ionizing radiation to a patient, and to map the significant electrical property contrasts present between numerous benign and pathological tissues. To leverage these potential advantages for medical imaging, we developed a modular 32 channel data acquisition (DAQ) system using National Instruments’ PXI chassis, along with FPGA, ADC, Signal Generator and Timing and Synchronization modules. To achieve high frame rates, signal demodulation and spectral characteristics of higher order harmonics were computed using dedicated FFT-hardware built into the FPGA module. By offloading the computing onto FPGA, we were able to achieve a reduction in throughput required between the FPGA and PC by a factor of 32:1. A custom designed analog front end (AFE) was used to interface electrodes with our system. Our system is wideband, and capable of acquiring data for input signal frequencies ranging from 100 Hz to 12 MHz. The modular design of both the hardware and software will allow this system to be flexibly configured for the particular clinical application. PMID:24729790

Electronic processing and control system with programmable hardware

NASA Technical Reports Server (NTRS)

Alkalaj, Leon (Inventor); Fang, Wai-Chi (Inventor); Newell, Michael A. (Inventor)

1998-01-01

A computer system with reprogrammable hardware allowing dynamically allocating hardware resources for different functions and adaptability for different processors and different operating platforms. All hardware resources are physically partitioned into system-user hardware and application-user hardware depending on the specific operation requirements. A reprogrammable interface preferably interconnects the system-user hardware and application-user hardware.

Development and programming of Geophonino: A low cost Arduino-based seismic recorder for vertical geophones

NASA Astrophysics Data System (ADS)

Soler-Llorens, J. L.; Galiana-Merino, J. J.; Giner-Caturla, J.; Jauregui-Eslava, P.; Rosa-Cintas, S.; Rosa-Herranz, J.

2016-09-01

The commercial data acquisition systems used for seismic exploration are usually expensive equipment. In this work, a low cost data acquisition system (Geophonino) has been developed for recording seismic signals from a vertical geophone. The signal goes first through an instrumentation amplifier, INA155, which is suitable for low amplitude signals like the seismic noise, and an anti-aliasing filter based on the MAX7404 switched-capacitor filter. After that, the amplified and filtered signal is digitized and processed by Arduino Due and registered in an SD memory card. Geophonino is configured for continuous registering, where the sampling frequency, the amplitude gain and the registering time are user-defined. The complete prototype is an open source and open hardware system. It has been tested by comparing the registered signals with the ones obtained through different commercial data recording systems and different kind of geophones. The obtained results show good correlation between the tested measurements, presenting Geophonino as a low-cost alternative system for seismic data recording.

Real-Time Processing Library for Open-Source Hardware Biomedical Sensors

PubMed Central

Castro-García, Juan A.; Lebrato-Vázquez, Clara

2018-01-01

Applications involving data acquisition from sensors need samples at a preset frequency rate, the filtering out of noise and/or analysis of certain frequency components. We propose a novel software architecture based on open-software hardware platforms which allows programmers to create data streams from input channels and easily implement filters and frequency analysis objects. The performances of the different classes given in the size of memory allocated and execution time (number of clock cycles) were analyzed in the low-cost platform Arduino Genuino. In addition, 11 people took part in an experiment in which they had to implement several exercises and complete a usability test. Sampling rates under 250 Hz (typical for many biomedical applications) makes it feasible to implement filters, sliding windows and Fourier analysis, operating in real time. Participants rated software usability at 70.2 out of 100 and the ease of use when implementing several signal processing applications was rated at just over 4.4 out of 5. Participants showed their intention of using this software because it was percieved as useful and very easy to use. The performances of the library showed that it may be appropriate for implementing small biomedical real-time applications or for human movement monitoring, even in a simple open-source hardware device like Arduino Genuino. The general perception about this library is that it is easy to use and intuitive. PMID:29596394

Real-Time Processing Library for Open-Source Hardware Biomedical Sensors.

PubMed

Molina-Cantero, Alberto J; Castro-García, Juan A; Lebrato-Vázquez, Clara; Gómez-González, Isabel M; Merino-Monge, Manuel

2018-03-29

Applications involving data acquisition from sensors need samples at a preset frequency rate, the filtering out of noise and/or analysis of certain frequency components. We propose a novel software architecture based on open-software hardware platforms which allows programmers to create data streams from input channels and easily implement filters and frequency analysis objects. The performances of the different classes given in the size of memory allocated and execution time (number of clock cycles) were analyzed in the low-cost platform Arduino Genuino. In addition, 11 people took part in an experiment in which they had to implement several exercises and complete a usability test. Sampling rates under 250 Hz (typical for many biomedical applications) makes it feasible to implement filters, sliding windows and Fourier analysis, operating in real time. Participants rated software usability at 70.2 out of 100 and the ease of use when implementing several signal processing applications was rated at just over 4.4 out of 5. Participants showed their intention of using this software because it was percieved as useful and very easy to use. The performances of the library showed that it may be appropriate for implementing small biomedical real-time applications or for human movement monitoring, even in a simple open-source hardware device like Arduino Genuino. The general perception about this library is that it is easy to use and intuitive.

Coal conversion systems design and process modeling. Volume 2: Installation of MPPM on the Signal 9 computer

NASA Technical Reports Server (NTRS)

1981-01-01

Relevant differences between the MPPM resident IBM 370computer and the NASA Sigma 9 computer are described as well as the MPPM system itself and its development. Problems encountered and solutions used to overcome these difficulties during installation of the MPPM system at MSFC are discussed. Remaining work on the installation effort is summarized. The relevant hardware features incorporated in the program are described and their implications on the transportability of the MPPM source code are examined.

A Procedure for Measuring Latencies in Brain-Computer Interfaces

PubMed Central

Wilson, J. Adam; Mellinger, Jürgen; Schalk, Gerwin; Williams, Justin

2011-01-01

Brain-computer interface (BCI) systems must process neural signals with consistent timing in order to support adequate system performance. Thus, it is important to have the capability to determine whether a particular BCI configuration (i.e., hardware, software) provides adequate timing performance for a particular experiment. This report presents a method of measuring and quantifying different aspects of system timing in several typical BCI experiments across a range of settings, and presents comprehensive measures of expected overall system latency for each experimental configuration. PMID:20403781

Combinatorial FSK modulation for power-efficient high-rate communications

NASA Technical Reports Server (NTRS)

Wagner, Paul K.; Budinger, James M.; Vanderaar, Mark J.

1991-01-01

Deep-space and satellite communications systems must be capable of conveying high-rate data accurately with low transmitter power, often through dispersive channels. A class of noncoherent Combinatorial Frequency Shift Keying (CFSK) modulation schemes is investigated which address these needs. The bit error rate performance of this class of modulation formats is analyzed and compared to the more traditional modulation types. Candidate modulator, demodulator, and digital signal processing (DSP) hardware structures are examined in detail. System-level issues are also discussed.

A Self-Diagnostic System for the M6 Accelerometer

NASA Technical Reports Server (NTRS)

Flanagan, Patrick M.; Lekki, John

2001-01-01

The design of a Self-Diagnostic (SD) accelerometer system for the Space Shuttle Main Engine is presented. This retrofit system connects diagnostic electronic hardware and software to the current M6 accelerometer system. This paper discusses the general operation of the M6 accelerometer SD system and procedures for developing and evaluating the SD system. Signal processing techniques using M6 accelerometer diagnostic data are explained. Test results include diagnostic data responding to changing ambient temperature, mounting torque and base mounting impedance.

The FONT5 Bunch-by-Bunch Position and Angle Feedback System at ATF2

NASA Astrophysics Data System (ADS)

Apsimon, R. J.; Bett, D. R.; Burrows, P. N.; Christian, G. B.; Constance, B.; Davis, M. R.; Gerbershagen, A.; Perry, C.; Resta-Lopez, J.

The FONT5 upstream beam-based feedback system at ATF2 is designed to correct the position and angle jitter at the entrance to the ATF2 final-focus system, and also to demonstrate a prototype intra-train feedback system for the International Linear Collider interaction point. We discuss the hardware, from stripline BPMs to kickers, and RF and digital signal processing, as well as presenting results from the latest beam tests at ATF2.

A low power biomedical signal processor ASIC based on hardware software codesign.

PubMed

Nie, Z D; Wang, L; Chen, W G; Zhang, T; Zhang, Y T

2009-01-01

A low power biomedical digital signal processor ASIC based on hardware and software codesign methodology was presented in this paper. The codesign methodology was used to achieve higher system performance and design flexibility. The hardware implementation included a low power 32bit RISC CPU ARM7TDMI, a low power AHB-compatible bus, and a scalable digital co-processor that was optimized for low power Fast Fourier Transform (FFT) calculations. The co-processor could be scaled for 8-point, 16-point and 32-point FFTs, taking approximate 50, 100 and 150 clock circles, respectively. The complete design was intensively simulated using ARM DSM model and was emulated by ARM Versatile platform, before conducted to silicon. The multi-million-gate ASIC was fabricated using SMIC 0.18 microm mixed-signal CMOS 1P6M technology. The die area measures 5,000 microm x 2,350 microm. The power consumption was approximately 3.6 mW at 1.8 V power supply and 1 MHz clock rate. The power consumption for FFT calculations was less than 1.5 % comparing with the conventional embedded software-based solution.

Expanding Hardware-in-the-Loop Formation Navigation and Control with Radio Frequency Crosslink Ranging

NASA Technical Reports Server (NTRS)

Mitchell, Jason W.; Barbee, Brent W.; Baldwin, Philip J.; Luquette, Richard J.

2007-01-01

The Formation Flying Testbed (FFTB) at the National Aeronautics and Space Administration (NASA) Goddard Space Flight Center (GSFC) provides a hardware-in-the-loop test environment for formation navigation and control. The facility continues to evolve as a modular, hybrid, dynamic simulation facility for end-to-end guidance, navigation, and control (GN&C) design and analysis of formation flying spacecraft. The core capabilities of the FFTB, as a platform for testing critical hardware and software algorithms in-the-loop, are reviewed with a focus on recent improvements. With the most recent improvement, in support of Technology Readiness Level (TRL) 6 testing of the Inter-spacecraft Ranging and Alarm System (IRAS) for the Magnetospheric Multiscale (MMS) mission, the FFTB has significantly expanded its ability to perform realistic simulations that require Radio Frequency (RF) ranging sensors for relative navigation with the Path Emulator for RF Signals (PERFS). The PERFS, currently under development at NASA GSFC, modulates RF signals exchanged between spacecraft. The RF signals are modified to accurately reflect the dynamic environment through which they travel, including the effects of medium, moving platforms, and radiated power.

Programmed optoelectronic time-pulse coded relational processor as base element for sorting neural networks

NASA Astrophysics Data System (ADS)

Krasilenko, Vladimir G.; Bardachenko, Vitaliy F.; Nikolsky, Alexander I.; Lazarev, Alexander A.

2007-04-01

In the paper we show that the biologically motivated conception of the use of time-pulse encoding gives the row of advantages (single methodological basis, universality, simplicity of tuning, training and programming et al) at creation and designing of sensor systems with parallel input-output and processing, 2D-structures of hybrid and neuro-fuzzy neurocomputers of next generations. We show principles of construction of programmable relational optoelectronic time-pulse coded processors, continuous logic, order logic and temporal waves processes, that lie in basis of the creation. We consider structure that executes extraction of analog signal of the set grade (order), sorting of analog and time-pulse coded variables. We offer optoelectronic realization of such base relational elements of order logic, which consists of time-pulse coded phototransformers (pulse-width and pulse-phase modulators) with direct and complementary outputs, sorting network on logical elements and programmable commutations blocks. We make estimations of basic technical parameters of such base devices and processors on their basis by simulation and experimental research: power of optical input signals - 0.200-20 μW, processing time - microseconds, supply voltage - 1.5-10 V, consumption power - hundreds of microwatts per element, extended functional possibilities, training possibilities. We discuss some aspects of possible rules and principles of training and programmable tuning on the required function, relational operation and realization of hardware blocks for modifications of such processors. We show as on the basis of such quasiuniversal hardware simple block and flexible programmable tuning it is possible to create sorting machines, neural networks and hybrid data-processing systems with the untraditional numerical systems and pictures operands.

Wireless Energy Harvesting Two-Way Relay Networks with Hardware Impairments.

PubMed

Peng, Chunling; Li, Fangwei; Liu, Huaping

2017-11-13

This paper considers a wireless energy harvesting two-way relay (TWR) network where the relay has energy-harvesting abilities and the effects of practical hardware impairments are taken into consideration. In particular, power splitting (PS) receiver is adopted at relay to harvests the power it needs for relaying the information between the source nodes from the signals transmitted by the source nodes, and hardware impairments is assumed suffered by each node. We analyze the effect of hardware impairments [-20]on both decode-and-forward (DF) relaying and amplify-and-forward (AF) relaying networks. By utilizing the obtained new expressions of signal-to-noise-plus-distortion ratios, the exact analytical expressions of the achievable sum rate and ergodic capacities for both DF and AF relaying protocols are derived. Additionally, the optimal power splitting (OPS) ratio that maximizes the instantaneous achievable sum rate is formulated and solved for both protocols. The performances of DF and AF protocols are evaluated via numerical results, which also show the effects of various network parameters on the system performance and on the OPS ratio design.

Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control

NASA Astrophysics Data System (ADS)

Qiu, Mo; Yu, Simin; Wen, Yuqiong; Lü, Jinhu; He, Jianbin; Lin, Zhuosheng

In this paper, a novel design methodology and its FPGA hardware implementation for a universal chaotic signal generator is proposed via the Verilog HDL fixed-point algorithm and state machine control. According to continuous-time or discrete-time chaotic equations, a Verilog HDL fixed-point algorithm and its corresponding digital system are first designed. In the FPGA hardware platform, each operation step of Verilog HDL fixed-point algorithm is then controlled by a state machine. The generality of this method is that, for any given chaotic equation, it can be decomposed into four basic operation procedures, i.e. nonlinear function calculation, iterative sequence operation, iterative values right shifting and ceiling, and chaotic iterative sequences output, each of which corresponds to only a state via state machine control. Compared with the Verilog HDL floating-point algorithm, the Verilog HDL fixed-point algorithm can save the FPGA hardware resources and improve the operation efficiency. FPGA-based hardware experimental results validate the feasibility and reliability of the proposed approach.

Short-time windowed covariance: A metric for identifying non-stationary, event-related covariant cortical sites

PubMed Central

Blakely, Timothy; Ojemann, Jeffrey G.; Rao, Rajesh P.N.

2014-01-01

Background Electrocorticography (ECoG) signals can provide high spatio-temporal resolution and high signal to noise ratio recordings of local neural activity from the surface of the brain. Previous studies have shown that broad-band, spatially focal, high-frequency increases in ECoG signals are highly correlated with movement and other cognitive tasks and can be volitionally modulated. However, significant additional information may be present in inter-electrode interactions, but adding additional higher order inter-electrode interactions can be impractical from a computational aspect, if not impossible. New method In this paper we present a new method of calculating high frequency interactions between electrodes called Short-Time Windowed Covariance (STWC) that builds on mathematical techniques currently used in neural signal analysis, along with an implementation that accelerates the algorithm by orders of magnitude by leveraging commodity, off-the-shelf graphics processing unit (GPU) hardware. Results Using the hardware-accelerated implementation of STWC, we identify many types of event-related inter-electrode interactions from human ECoG recordings on global and local scales that have not been identified by previous methods. Unique temporal patterns are observed for digit flexion in both low- (10 mm spacing) and high-resolution (3 mm spacing) electrode arrays. Comparison with existing methods Covariance is a commonly used metric for identifying correlated signals, but the standard covariance calculations do not allow for temporally varying covariance. In contrast STWC allows and identifies event-driven changes in covariance without identifying spurious noise correlations. Conclusions: STWC can be used to identify event-related neural interactions whose high computational load is well suited to GPU capabilities. PMID:24211499

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Development of Data Acquisition Set-up for Steady-state Experiments

NASA Astrophysics Data System (ADS)

Srivastava, Amit K.; Gupta, Arnab D.; Sunil, S.; Khan, Ziauddin

2017-04-01

For short duration experiments, generally digitized data is transferred for processing and storage after the experiment whereas in case of steady-state experiment the data is acquired, processed, displayed and stored continuously in pipelined manner. This requires acquiring data through special techniques for storage and on-the-go viewing data to display the current data trends for various physical parameters. A small data acquisition set-up is developed for continuously acquiring signals from various physical parameters at different sampling rate for long duration experiment. This includes the hardware set-up for signal digitization, Field Programmable Gate Arrays (FPGA) based timing system for clock synchronization and event/trigger distribution, time slicing of data streams for storage of data chunks to enable viewing of data during acquisition and channel profile display through down sampling etc. In order to store a long data stream of indefinite/long time duration, the data stream is divided into data slices/chunks of user defined time duration. Data chunks avoid the problem of non-access of server data until the channel data file is closed at the end of the long duration experiment. A graphical user interface has been developed in Lab VIEW application development environment for configuring the data acquisition hardware and storing data chunks on local machine as well as at remote data server through Python for further data access. The data plotting and analysis utilities have been developed with Python software, which provides tools for further data processing. This paper describes the development and implementation of data acquisition for steady-state experiment.

Hardware efficient monitoring of input/output signals

NASA Technical Reports Server (NTRS)

Driscoll, Kevin R. (Inventor); Hall, Brendan (Inventor); Paulitsch, Michael (Inventor)

2012-01-01

A communication device comprises first and second circuits to implement a plurality of ports via which the communicative device is operable to communicate over a plurality of communication channels. For each of the plurality of ports, the communication device comprises: command hardware that includes a first transmitter to transmit data over a respective one of the plurality of channels and a first receiver to receive data from the respective one of the plurality of channels; and monitor hardware that includes a second receiver coupled to the first transmitter and a third receiver coupled to the respective one of the plurality of channels. The first circuit comprises the command hardware for a first subset of the plurality of ports. The second circuit comprises the monitor hardware for the first subset of the plurality of ports and the command hardware for a second subset of the plurality of ports.

Hardware based redundant multi-threading inside a GPU for improved reliability

DOEpatents

Sridharan, Vilas; Gurumurthi, Sudhanva

2015-05-05

A system and method for verifying computation output using computer hardware are provided. Instances of computation are generated and processed on hardware-based processors. As instances of computation are processed, each instance of computation receives a load accessible to other instances of computation. Instances of output are generated by processing the instances of computation. The instances of output are verified against each other in a hardware based processor to ensure accuracy of the output.

Hardware support for software controlled fast reconfiguration of performance counters

DOEpatents

Salapura, Valentina; Wisniewski, Robert W.

2013-06-18

Hardware support for software controlled reconfiguration of performance counters may include a plurality of performance counters collecting one or more counts of one or more selected activities. A storage element stores data value representing a time interval, and a timer element reads the data value and detects expiration of the time interval based on the data value and generates a signal. A plurality of configuration registers stores a set of performance counter configurations. A state machine receives the signal and selects a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters.

Hardware support for software controlled fast reconfiguration of performance counters

DOEpatents

Salapura, Valentina; Wisniewski, Robert W

2013-09-24

Hardware support for software controlled reconfiguration of performance counters may include a plurality of performance counters collecting one or more counts of one or more selected activities. A storage element stores data value representing a time interval, and a timer element reads the data value and detects expiration of the time interval based on the data value and generates a signal. A plurality of configuration registers stores a set of performance counter configurations. A state machine receives the signal and selects a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters.

Grid Connected Functionality

DOE Data Explorer

Baker, Kyri; Jin, Xin; Vaidynathan, Deepthi; Jones, Wesley; Christensen, Dane; Sparn, Bethany; Woods, Jason; Sorensen, Harry; Lunacek, Monte

2016-08-04

Dataset demonstrating the potential benefits that residential buildings can provide for frequency regulation services in the electric power grid. In a hardware-in-the-loop (HIL) implementation, simulated homes along with a physical laboratory home are coordinated via a grid aggregator, and it is shown that their aggregate response has the potential to follow the regulation signal on a timescale of seconds. Connected (communication-enabled), devices in the National Renewable Energy Laboratory's (NREL's) Energy Systems Integration Facility (ESIF) received demand response (DR) requests from a grid aggregator, and the devices responded accordingly to meet the signal while satisfying user comfort bounds and physical hardware limitations.

A neuromorphic VLSI device for implementing 2-D selective attention systems.

PubMed

Indiveri, G

2001-01-01

Selective attention is a mechanism used to sequentially select and process salient subregions of the input space, while suppressing inputs arriving from nonsalient regions. By processing small amounts of sensory information in a serial fashion, rather than attempting to process all the sensory data in parallel, this mechanism overcomes the problem of flooding limited processing capacity systems with sensory inputs. It is found in many biological systems and can be a useful engineering tool for developing artificial systems that need to process in real-time sensory data. In this paper we present a neuromorphic hardware model of a selective attention mechanism implemented on a very large scale integration (VLSI) chip, using analog circuits. The chip makes use of a spike-based representation for receiving input signals, transmitting output signals and for shifting the selection of the attended input stimulus over time. It can be interfaced to neuromorphic sensors and actuators, for implementing multichip selective attention systems. We describe the characteristics of the circuits used in the architecture and present experimental data measured from the system.

Bandwidth Efficient Wireless Digital Modem Developed

NASA Technical Reports Server (NTRS)

Kifle, Muli

1999-01-01

NASA Lewis Research Center has developed a digital approach for broadcasting highfidelity audio (nearly compact disk (CD) quality sound) in the commercial frequencymodulated (FM) broadcast band. This digital approach provides a means of achieving high data transmission rates with low hardware complexity--including low mass, size, and power consumption. Lewis has completed the design and prototype development of a bandwidth-efficient digital modem (modulator and demodulator) that uses a spectrally efficient modulation scheme: 16-ary rectangular quadrature amplitude modulation, or 16- ary QAM. The digital implementation is based strictly on inexpensive, commercial off-theshelf digital signal processing (DSP) hardware to perform up and down conversions and pulse shaping. The digital modem transmits data at rates up to 76 kilobits per second (kbps), which is almost 3 times faster than standard 28.8-kbps telephone modems. In addition, the modem offers improved power and spectral performance, flexible operation, and low-cost implementation.

Towards a visual modeling approach to designing microelectromechanical system transducers

NASA Astrophysics Data System (ADS)

Dewey, Allen; Srinivasan, Vijay; Icoz, Evrim

1999-12-01

In this paper, we address initial design capture and system conceptualization of microelectromechanical system transducers based on visual modeling and design. Visual modeling frames the task of generating hardware description language (analog and digital) component models in a manner similar to the task of generating software programming language applications. A structured topological design strategy is employed, whereby microelectromechanical foundry cell libraries are utilized to facilitate the design process of exploring candidate cells (topologies), varying key aspects of the transduction for each topology, and determining which topology best satisfies design requirements. Coupled-energy microelectromechanical system characterizations at a circuit level of abstraction are presented that are based on branch constitutive relations and an overall system of simultaneous differential and algebraic equations. The resulting design methodology is called visual integrated-microelectromechanical VHDL-AMS interactive design (VHDL-AMS is visual hardware design language for analog and mixed signal).

A high performance cost-effective digital complex correlator for an X-band polarimetry survey.

PubMed

Bergano, Miguel; Rocha, Armando; Cupido, Luís; Barbosa, Domingos; Villela, Thyrso; Boas, José Vilas; Rocha, Graça; Smoot, George F

2016-01-01

The detailed knowledge of the Milky Way radio emission is important to characterize galactic foregrounds masking extragalactic and cosmological signals. The update of the global sky models describing radio emissions over a very large spectral band requires high sensitivity experiments capable of observing large sky areas with long integration times. Here, we present the design of a new 10 GHz (X-band) polarimeter digital back-end to map the polarization components of the galactic synchrotron radiation field of the Northern Hemisphere sky. The design follows the digital processing trends in radio astronomy and implements a large bandwidth (1 GHz) digital complex cross-correlator to extract the Stokes parameters of the incoming synchrotron radiation field. The hardware constraints cover the implemented VLSI hardware description language code and the preliminary results. The implementation is based on the simultaneous digitized acquisition of the Cartesian components of the two linear receiver polarization channels. The design strategy involves a double data rate acquisition of the ADC interleaved parallel bus, and field programmable gate array device programming at the register transfer mode. The digital core of the back-end is capable of processing 32 Gbps and is built around an Altera field programmable gate array clocked at 250 MHz, 1 GSps analog to digital converters and a clock generator. The control of the field programmable gate array internal signal delays and a convenient use of its phase locked loops provide the timing requirements to achieve the target bandwidths and sensitivity. This solution is convenient for radio astronomy experiments requiring large bandwidth, high functionality, high volume availability and low cost. Of particular interest, this correlator was developed for the Galactic Emission Mapping project and is suitable for large sky area polarization continuum surveys. The solutions may also be adapted to be used at signal processing subsystem levels for large projects like the square kilometer array testbeds.

Electro-optic voltage sensor with beam splitting

DOEpatents

Woods, Gregory K.; Renak, Todd W.; Davidson, James R.; Crawford, Thomas M.

2002-01-01

The invention is a miniature electro-optic voltage sensor system capable of accurate operation at high voltages without use of the dedicated voltage dividing hardware typically found in the prior art. The invention achieves voltage measurement without significant error contributions from neighboring conductors or environmental perturbations. The invention employs a transmitter, a sensor, a detector, and a signal processor. The transmitter produces a beam of electromagnetic radiation which is routed into the sensor. Within the sensor the beam undergoes the Pockels electro-optic effect. The electro-optic effect produces a modulation of the beam's polarization, which is in turn converted to a pair of independent conversely-amplitude-modulated signals, from which the voltage of the E-field is determined by the signal processor. The use of converse AM signals enables the signal processor to better distinguish signal from noise. The sensor converts the beam by splitting the beam in accordance with the axes of the beam's polarization state (an ellipse) into at least two AM signals. These AM signals are fed into a signal processor and processed to determine the voltage between a ground conductor and the conductor on which voltage is being measured.

Terabit bandwidth-adaptive transmission using low-complexity format-transparent digital signal processing.

PubMed

Zhuge, Qunbi; Morsy-Osman, Mohamed; Chagnon, Mathieu; Xu, Xian; Qiu, Meng; Plant, David V

2014-02-10

In this paper, we propose a low-complexity format-transparent digital signal processing (DSP) scheme for next generation flexible and energy-efficient transceiver. It employs QPSK symbols as the training and pilot symbols for the initialization and tracking stage of the receiver-side DSP, respectively, for various modulation formats. The performance is numerically and experimentally evaluated in a dual polarization (DP) 11 Gbaud 64QAM system. Employing the proposed DSP scheme, we conduct a system-level study of Tb/s bandwidth-adaptive superchannel transmissions with flexible modulation formats including QPSK, 8QAM and 16QAM. The spectrum bandwidth allocation is realized in the digital domain instead of turning on/off sub-channels, which improves the performance of higher order QAM. Various transmission distances ranging from 240 km to 6240 km are demonstrated with a colorless detection for hardware complexity reduction.

Design and performance test of NIRS-based spinal cord lesion detector

NASA Astrophysics Data System (ADS)

Li, Nanxi; Li, Ting

2018-02-01

Spinal cord lesions can cause a series of severe complications, which can even lead to paralysis with high mortality. However, the traditional diagnosis of spinal cord lesion relies on complicated imaging modalities and other invasive and dangerous methods. Here, we have designed a small monitor based on NIRS technology for noninvasive monitoring for spinal cord lesions. The development of the instrument system includes the design of hardware circuits and the program of software. In terms of hardware, OPT1011 is selected as the light detector, and the appropriate probe distribution structure is selected according to the simulation result of Monte Carlo Simulation. At the same time, the powerful controller is selected as our system's central processing chip for the circuit design, and the data is transmitted by serial port to the host computer for post processing. Finally, we verify the stability and feasibility of the instrument system. It is found that the spinal signal could be obviously detected in the system, which indicates that our monitor based on NIRS technology has the potential to monitor the spinal lesion.

Advanced telemetry systems for payloads. Technology needs, objectives and issues

NASA Technical Reports Server (NTRS)

1990-01-01

The current trends in advanced payload telemetry are the new developments in advanced modulation/coding, the applications of intelligent techniques, data distribution processing, and advanced signal processing methodologies. Concerted efforts will be required to design ultra-reliable man-rated software to cope with these applications. The intelligence embedded and distributed throughout various segments of the telemetry system will need to be overridden by an operator in case of life-threatening situations, making it a real-time integration issue. Suitable MIL standards on physical interfaces and protocols will be adopted to suit the payload telemetry system. New technologies and techniques will be developed for fast retrieval of mass data. Currently, these technology issues are being addressed to provide more efficient, reliable, and reconfigurable systems. There is a need, however, to change the operation culture. The current role of NASA as a leader in developing all the new innovative hardware should be altered to save both time and money. We should use all the available hardware/software developed by the industry and use the existing standards rather than inventing our own.

Applying compressive sensing to TEM video: A substantial frame rate increase on any camera

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stevens, Andrew; Kovarik, Libor; Abellan, Patricia

One of the main limitations of imaging at high spatial and temporal resolution during in-situ transmission electron microscopy (TEM) experiments is the frame rate of the camera being used to image the dynamic process. While the recent development of direct detectors has provided the hardware to achieve frame rates approaching 0.1 ms, the cameras are expensive and must replace existing detectors. In this paper, we examine the use of coded aperture compressive sensing (CS) methods to increase the frame rate of any camera with simple, low-cost hardware modifications. The coded aperture approach allows multiple sub-frames to be coded and integratedmore » into a single camera frame during the acquisition process, and then extracted upon readout using statistical CS inversion. Here we describe the background of CS and statistical methods in depth and simulate the frame rates and efficiencies for in-situ TEM experiments. Depending on the resolution and signal/noise of the image, it should be possible to increase the speed of any camera by more than an order of magnitude using this approach.« less

Applying compressive sensing to TEM video: A substantial frame rate increase on any camera

DOE PAGES

Stevens, Andrew; Kovarik, Libor; Abellan, Patricia; ...

2015-08-13

One of the main limitations of imaging at high spatial and temporal resolution during in-situ transmission electron microscopy (TEM) experiments is the frame rate of the camera being used to image the dynamic process. While the recent development of direct detectors has provided the hardware to achieve frame rates approaching 0.1 ms, the cameras are expensive and must replace existing detectors. In this paper, we examine the use of coded aperture compressive sensing (CS) methods to increase the frame rate of any camera with simple, low-cost hardware modifications. The coded aperture approach allows multiple sub-frames to be coded and integratedmore » into a single camera frame during the acquisition process, and then extracted upon readout using statistical CS inversion. Here we describe the background of CS and statistical methods in depth and simulate the frame rates and efficiencies for in-situ TEM experiments. Depending on the resolution and signal/noise of the image, it should be possible to increase the speed of any camera by more than an order of magnitude using this approach.« less

Arduino: a low-cost multipurpose lab equipment.

PubMed

D'Ausilio, Alessandro

2012-06-01

Typical experiments in psychological and neurophysiological settings often require the accurate control of multiple input and output signals. These signals are often generated or recorded via computer software and/or external dedicated hardware. Dedicated hardware is usually very expensive and requires additional software to control its behavior. In the present article, I present some accuracy tests on a low-cost and open-source I/O board (Arduino family) that may be useful in many lab environments. One of the strengths of Arduinos is the possibility they afford to load the experimental script on the board's memory and let it run without interfacing with computers or external software, thus granting complete independence, portability, and accuracy. Furthermore, a large community has arisen around the Arduino idea and offers many hardware add-ons and hundreds of free scripts for different projects. Accuracy tests show that Arduino boards may be an inexpensive tool for many psychological and neurophysiological labs.

Hardware development process for Human Research facility applications

NASA Astrophysics Data System (ADS)

Bauer, Liz

2000-01-01

The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

Passive coherent location direct signal suppression using hardware mixing techniques

NASA Astrophysics Data System (ADS)

Kaiser, Sean A.; Christianson, Andrew J.; Narayanan, Ram M.

2017-05-01

Passive coherent location (PCL) is a radar technique, in which the system uses reflections from opportunistic illumination sources in the environment for detection and tracking. Typically, PCL uses civilian communication transmitters not ideally suited for radar. The physical geometry of PCL is developed on the basis of bistatic radar without control of the transmitter antenna or waveform design. This poses the problem that often the receiver is designed with two antennas and channels, one for reference and one for surveillance. The surveillance channel is also contaminated with the direct signal and thus direct signal suppression (DSS) techniques must be used. This paper proposes an analytical solution based around hardware for DSS which is compared to other methods available in the literature. The methods are tested in varying bistatic geometries and with varying target radar cross section (RCS) and signal-to-noise ratio (SNR).

MONTAGE: A Methodology for Designing Composable End-to-End Secure Distributed Systems

DTIC Science & Technology

2012-08-01

83 7.6 Formal Model of Loc Separation . . . . . . . . . . . . . . . . . . . . . . . . . 84 7.6.1 Static Partitions...Next, we derive five requirements (called Loc Separation, Implicit Parameter Separation, Error Signaling Separation, Conf Separation, and Next Call...hypervisors and hardware) and a real cloud (with shared hypervisors and hardware) that satisfies these requirements. Finally we study Loc Separation

What does voice-processing technology support today?

PubMed Central

Nakatsu, R; Suzuki, Y

1995-01-01

This paper describes the state of the art in applications of voice-processing technologies. In the first part, technologies concerning the implementation of speech recognition and synthesis algorithms are described. Hardware technologies such as microprocessors and DSPs (digital signal processors) are discussed. Software development environment, which is a key technology in developing applications software, ranging from DSP software to support software also is described. In the second part, the state of the art of algorithms from the standpoint of applications is discussed. Several issues concerning evaluation of speech recognition/synthesis algorithms are covered, as well as issues concerning the robustness of algorithms in adverse conditions. Images Fig. 3 PMID:7479720

General Purpose Graphics Processing Unit Based High-Rate Rice Decompression and Reed-Solomon Decoding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Loughry, Thomas A.

As the volume of data acquired by space-based sensors increases, mission data compression/decompression and forward error correction code processing performance must likewise scale. This competency development effort was explored using the General Purpose Graphics Processing Unit (GPGPU) to accomplish high-rate Rice Decompression and high-rate Reed-Solomon (RS) decoding at the satellite mission ground station. Each algorithm was implemented and benchmarked on a single GPGPU. Distributed processing across one to four GPGPUs was also investigated. The results show that the GPGPU has considerable potential for performing satellite communication Data Signal Processing, with three times or better performance improvements and up to tenmore » times reduction in cost over custom hardware, at least in the case of Rice Decompression and Reed-Solomon Decoding.« less

(abstract) A High Throughput 3-D Inner Product Processor

NASA Technical Reports Server (NTRS)

Daud, Tuan

1996-01-01

A particularily challenging image processing application is the real time scene acquisition and object discrimination. It requires spatio-temporal recognition of point and resolved objects at high speeds with parallel processing algorithms. Neural network paradigms provide fine grain parallism and, when implemented in hardware, offer orders of magnitude speed up. However, neural networks implemented on a VLSI chip are planer architectures capable of efficient processing of linear vector signals rather than 2-D images. Therefore, for processing of images, a 3-D stack of neural-net ICs receiving planar inputs and consuming minimal power are required. Details of the circuits with chip architectures will be described with need to develop ultralow-power electronics. Further, use of the architecture in a system for high-speed processing will be illustrated.

A triple-mode hexa-standard reconfigurable TI cross-coupled ΣΔ modulator

NASA Astrophysics Data System (ADS)

Prakash A. V, Jos; Jose, Babita R.; Mathew, Jimson; Jose, Bijoy A.

2017-07-01

Hardware reconfigurability is an attractive solution for modern multi-standard wireless systems. This paper analyses the performance and implementation of an efficient triple-mode hexa-standard reconfigurable sigma-delta (∑Δ) modulator designed for six different wireless communication standards. Enhanced noise-shaping characteristics and increased digitisation rate, obtained by time-interleaved cross-coupling of ∑Δ paths, have been utilised for the modulator design. Power/hardware efficiency and the capability to acclimate the requirements of wide hexa-standard specifications are achieved by introducing an advanced noise-shaping structure, the dual-extended architecture. Simulation results of the proposed architecture using Hspice shows that the proposed modulator obtains a peak signal-to-noise ratio of 83.4/80.2/67.8/61.5/60.8/51.03 dB for hexa-standards, i.e. GSM/Bluetooth/GPS/WCDMA/WLAN/WiMAX standards with significantly less hardware and low operating frequency. The proposed architecture is implemented in 45 nm CMOS process using a 1 V supply and 0.7 V input range with a power consumption of 1.93 mW. Both architectural- and transistor-level simulation results prove the effectiveness and feasibility of this architecture to accomplish multi-standard cellular communication characteristics.

[Multi-channel motion signal acquisition system and experimental results].

PubMed

Zhong, Sheng; Yi, Wanguan; Deng, Ke; Zhan, Kai; Wen, Huiying; Chen, Xin

2014-09-01

For the study of muscle function and features during exercise, a multi-channel data acquisition system was developed, the overall design of the system, hardware composition, the function of system and so on have made a detail implements. The synchronous acquisition and storage of the surface EMG signal, joint angle signal, plantar pressure signal, ultrasonic image and initial results have been achieved.

Calibration of Galileo signals for time metrology.

PubMed

Defraigne, Pascale; Aerts, Wim; Cerretto, Giancarlo; Cantoni, Elena; Sleewaegen, Jean-Marie

2014-12-01

Using global navigation satellite system (GNSS) signals for accurate timing and time transfer requires the knowledge of all electric delays of the signals inside the receiving system. GNSS stations dedicated to timing or time transfer are classically calibrated only for Global Positioning System (GPS) signals. This paper proposes a procedure to determine the hardware delays of a GNSS receiving station for Galileo signals, once the delays of the GPS signals are known. This approach makes use of the broadcast satellite inter-signal biases, and is based on the ionospheric delay measured from dual-frequency combinations of GPS and Galileo signals. The uncertainty on the so-determined hardware delays is estimated to 3.7 ns for each isolated code in the L5 frequency band, and 4.2 ns for the ionosphere-free combination of E1 with a code of the L5 frequency band. For the calibration of a time transfer link between two stations, another approach can be used, based on the difference between the common-view time transfer results obtained with calibrated GPS data and with uncalibrated Galileo data. It is shown that the results obtained with this approach or with the ionospheric method are equivalent.

Scalable Multiprocessor for High-Speed Computing in Space

NASA Technical Reports Server (NTRS)

Lux, James; Lang, Minh; Nishimoto, Kouji; Clark, Douglas; Stosic, Dorothy; Bachmann, Alex; Wilkinson, William; Steffke, Richard

2004-01-01

A report discusses the continuing development of a scalable multiprocessor computing system for hard real-time applications aboard a spacecraft. "Hard realtime applications" signifies applications, like real-time radar signal processing, in which the data to be processed are generated at "hundreds" of pulses per second, each pulse "requiring" millions of arithmetic operations. In these applications, the digital processors must be tightly integrated with analog instrumentation (e.g., radar equipment), and data input/output must be synchronized with analog instrumentation, controlled to within fractions of a microsecond. The scalable multiprocessor is a cluster of identical commercial-off-the-shelf generic DSP (digital-signal-processing) computers plus generic interface circuits, including analog-to-digital converters, all controlled by software. The processors are computers interconnected by high-speed serial links. Performance can be increased by adding hardware modules and correspondingly modifying the software. Work is distributed among the processors in a parallel or pipeline fashion by means of a flexible master/slave control and timing scheme. Each processor operates under its own local clock; synchronization is achieved by broadcasting master time signals to all the processors, which compute offsets between the master clock and their local clocks.

Adaptive Temporal Matched Filtering for Noise Suppression in Fiber Optic Distributed Acoustic Sensing.

PubMed

Ölçer, İbrahim; Öncü, Ahmet

2017-06-05

Distributed vibration sensing based on phase-sensitive optical time domain reflectometry ( ϕ -OTDR) is being widely used in several applications. However, one of the main challenges in coherent detection-based ϕ -OTDR systems is the fading noise, which impacts the detection performance. In addition, typical signal averaging and differentiating techniques are not suitable for detecting high frequency events. This paper presents a new approach for reducing the effect of fading noise in fiber optic distributed acoustic vibration sensing systems without any impact on the frequency response of the detection system. The method is based on temporal adaptive processing of ϕ -OTDR signals. The fundamental theory underlying the algorithm, which is based on signal-to-noise ratio (SNR) maximization, is presented, and the efficacy of our algorithm is demonstrated with laboratory experiments and field tests. With the proposed digital processing technique, the results show that more than 10 dB of SNR values can be achieved without any reduction in the system bandwidth and without using additional optical amplifier stages in the hardware. We believe that our proposed adaptive processing approach can be effectively used to develop fiber optic-based distributed acoustic vibration sensing systems.

Adaptive Temporal Matched Filtering for Noise Suppression in Fiber Optic Distributed Acoustic Sensing

PubMed Central

Ölçer, İbrahim; Öncü, Ahmet

2017-01-01

Distributed vibration sensing based on phase-sensitive optical time domain reflectometry (ϕ-OTDR) is being widely used in several applications. However, one of the main challenges in coherent detection-based ϕ-OTDR systems is the fading noise, which impacts the detection performance. In addition, typical signal averaging and differentiating techniques are not suitable for detecting high frequency events. This paper presents a new approach for reducing the effect of fading noise in fiber optic distributed acoustic vibration sensing systems without any impact on the frequency response of the detection system. The method is based on temporal adaptive processing of ϕ-OTDR signals. The fundamental theory underlying the algorithm, which is based on signal-to-noise ratio (SNR) maximization, is presented, and the efficacy of our algorithm is demonstrated with laboratory experiments and field tests. With the proposed digital processing technique, the results show that more than 10 dB of SNR values can be achieved without any reduction in the system bandwidth and without using additional optical amplifier stages in the hardware. We believe that our proposed adaptive processing approach can be effectively used to develop fiber optic-based distributed acoustic vibration sensing systems. PMID:28587240

A decision-directed network for dual-polarization crosstalk cancellation

NASA Technical Reports Server (NTRS)

Weber, W. J., III

1979-01-01

Frequency reuse in the specific form of dual-polarized microwave communication systems has grown in importance in recent years as a practical means of radio spectrum conservation. Ideally the capacity of a given frequency allocation can be doubled through dual-polarization. However, hardware imperfections and propagation effects, particularly rain depolarization, prevent the achievement of this doubling without severe system performance degradation. A decision-directed cross-polarization correction network is presented whose operation depends on only simple base-band signal processing. No pilot tones or frequency offsets are required. The loop can work with any two-dimensional signal set for digital data transmission. The loop has been experimentally verified and provides a means of doubling the data capacity with little performance degradation.

Comparison of different shielding methods in acquisition of physiological signals.

PubMed

Yanbing Jiang; Ning Ji; Hui Wang; Xueyu Liu; Yanjuan Geng; Peng Li; Shixiong Chen; Guanglin Li

2017-07-01

Power line interference in the surrounding environment could usually introduce many difficulties when collecting and analyzing physiological signals. Since power line interference is usually several orders of amplitude larger than the physiological electrical signals, methods of suppressing power line interference should be considered during the signal acquisition. Many studies used a hardware or software band-stop filter to suppress power line interference but it could easily cause attenuations and distortions to the signal of interest. In this study, two kinds of methods that used different signals to drive the shields of the electrodes were proposed to reduce the impacts of power line interference. Three channels of two physiological signals (ECG and EMG) were simultaneously collected when the electrodes were not shielded (No-Shield), shielded by ground signals (GND-Shield) and shielded by buffered signals of the corresponding electrodes (Active-Shield), respectively, on a custom hardware platform based on TI ADS1299. The results showed that power line interference would be significantly suppressed when using shielding approaches, and the Active-Shield method could achieve the best performance with a power line interference reduction up to 36dB. The study suggested that the Active-Shield method at the analog front-end was a great candidate to reduce power line interference in routine acquisitions of physiological signals.

A Common Approach for the Certifying of International Space Station (ISS) Basic Hardware for Ground Safety

NASA Technical Reports Server (NTRS)

Kirkpatrick, Paul D.; Trinchero, Jean-Pierre

2005-01-01

In order to support the International Space Station, as well as any future long term human missions, vast amounts of logistical-type hardware is required to be processed through the various launch sites. This category consists of such hardware as spare parts, replacement items, and upgraded hardware. The category also includes samples for experiments and consumables. One attribute that all these items have is they are generally non-hazardous, at least to ground personnel. Even though the items are non-hazardous, launch site ground safety has a responsibility for the protection of personnel, the flight hardware, and launch site resources. In order to fulfill this responsibility, the safety organization must have knowledge of the hardware and its operations. Conversely, the hardware providers are entitled to a process that is commensurate with the hazard. Additionally, a common system should be in place that is flexible enough to account for the requirements at all launch sites, so that, the hardware provider need only complete one process for ground safety regardless of the launch site.

Development of Hardware-in-the-Loop Simulation Based on Gazebo and Pixhawk for Unmanned Aerial Vehicles

NASA Astrophysics Data System (ADS)

Nguyen, Khoa Dang; Ha, Cheolkeun

2018-04-01

Hardware-in-the-loop simulation (HILS) is well known as an effective approach in the design of unmanned aerial vehicles (UAV) systems, enabling engineers to test the control algorithm on a hardware board with a UAV model on the software. Performance of HILS is determined by performances of the control algorithm, the developed model, and the signal transfer between the hardware and software. The result of HILS is degraded if any signal could not be transferred to the correct destination. Therefore, this paper aims to develop a middleware software to secure communications in HILS system for testing the operation of a quad-rotor UAV. In our HILS, the Gazebo software is used to generate a nonlinear six-degrees-of-freedom (6DOF) model, sensor model, and 3D visualization for the quad-rotor UAV. Meanwhile, the flight control algorithm is designed and implemented on the Pixhawk hardware. New middleware software, referred to as the control application software (CAS), is proposed to ensure the connection and data transfer between Gazebo and Pixhawk using the multithread structure in Qt Creator. The CAS provides a graphical user interface (GUI), allowing the user to monitor the status of packet transfer, and perform the flight control commands and the real-time tuning parameters for the quad-rotor UAV. Numerical implementations have been performed to prove the effectiveness of the middleware software CAS suggested in this paper.

Development of a digital method for neutron/gamma-ray discrimination based on matched filtering

NASA Astrophysics Data System (ADS)

Korolczuk, S.; Linczuk, M.; Romaniuk, R.; Zychor, I.

2016-09-01

Neutron/gamma-ray discrimination is crucial for measurements with detectors sensitive to both neutron and gamma-ray radiation. Different techniques to discriminate between neutrons and gamma-rays based on pulse shape analysis are widely used in many applications, e.g., homeland security, radiation dosimetry, environmental monitoring, fusion experiments, nuclear spectroscopy. A common requirement is to improve a radiation detection level with a high detection reliability. Modern electronic components, such as high speed analog to digital converters and powerful programmable digital circuits for signal processing, allow us to develop a fully digital measurement system. With this solution it is possible to optimize digital signal processing algorithms without changing any electronic components in an acquisition signal path. We report on results obtained with a digital acquisition system DNG@NCBJ designed at the National Centre for Nuclear Research. A 2'' × 2'' EJ309 liquid scintillator was used to register mixed neutron and gamma-ray radiation from PuBe sources. A dedicated algorithm for pulse shape discrimination, based on real-time filtering, was developed and implemented in hardware.

A CMOS ASIC Design for SiPM Arrays

PubMed Central

Dey, Samrat; Banks, Lushon; Chen, Shaw-Pin; Xu, Wenbin; Lewellen, Thomas K.; Miyaoka, Robert S.; Rudell, Jacques C.

2012-01-01

Our lab has previously reported on novel board-level readout electronics for an 8×8 silicon photomultiplier (SiPM) array featuring row/column summation technique to reduce the hardware requirements for signal processing. We are taking the next step by implementing a monolithic CMOS chip which is based on the row-column architecture. In addition, this paper explores the option of using diagonal summation as well as calibration to compensate for temperature and process variations. Further description of a timing pickoff signal which aligns all of the positioning (spatial channels) pulses in the array is described. The ASIC design is targeted to be scalable with the detector size and flexible to accommodate detectors from different vendors. This paper focuses on circuit implementation issues associated with the design of the ASIC to interface our Phase II MiCES FPGA board with a SiPM array. Moreover, a discussion is provided for strategies to eventually integrate all the analog and mixed-signal electronics with the SiPM, on either a single-silicon substrate or multi-chip module (MCM). PMID:24825923

Smart Vest: wearable multi-parameter remote physiological monitoring system.

PubMed

Pandian, P S; Mohanavelu, K; Safeer, K P; Kotresh, T M; Shakunthala, D T; Gopal, Parvati; Padaki, V C

2008-05-01

The wearable physiological monitoring system is a washable shirt, which uses an array of sensors connected to a central processing unit with firmware for continuously monitoring physiological signals. The data collected can be correlated to produce an overall picture of the wearer's health. In this paper, we discuss the wearable physiological monitoring system called 'Smart Vest'. The Smart Vest consists of a comfortable to wear vest with sensors integrated for monitoring physiological parameters, wearable data acquisition and processing hardware and remote monitoring station. The wearable data acquisition system is designed using microcontroller and interfaced with wireless communication and global positioning system (GPS) modules. The physiological signals monitored are electrocardiogram (ECG), photoplethysmogram (PPG), body temperature, blood pressure, galvanic skin response (GSR) and heart rate. The acquired physiological signals are sampled at 250samples/s, digitized at 12-bit resolution and transmitted wireless to a remote physiological monitoring station along with the geo-location of the wearer. The paper describes a prototype Smart Vest system used for remote monitoring of physiological parameters and the clinical validation of the data are also presented.

Broadband quantitative NQR for authentication of vitamins and dietary supplements

NASA Astrophysics Data System (ADS)

Chen, Cheng; Zhang, Fengchao; Bhunia, Swarup; Mandal, Soumyajit

2017-05-01

We describe hardware, pulse sequences, and algorithms for nuclear quadrupole resonance (NQR) spectroscopy of medicines and dietary supplements. Medicine and food safety is a pressing problem that has drawn more and more attention. NQR is an ideal technique for authenticating these substances because it is a non-invasive method for chemical identification. We have recently developed a broadband NQR front-end that can excite and detect 14N NQR signals over a wide frequency range; its operating frequency can be rapidly set by software, while sensitivity is comparable to conventional narrowband front-ends over the entire range. This front-end improves the accuracy of authentication by enabling multiple-frequency experiments. We have also developed calibration and signal processing techniques to convert measured NQR signal amplitudes into nuclear spin densities, thus enabling its use as a quantitative technique. Experimental results from several samples are used to illustrate the proposed methods.

DigiSeis—A software component for digitizing seismic signals using the PC sound card

NASA Astrophysics Data System (ADS)

Amin Khan, Khalid; Akhter, Gulraiz; Ahmad, Zulfiqar

2012-06-01

An innovative software-based approach to develop an inexpensive experimental seismic recorder is presented. This approach requires no hardware as the built-in PC sound card is used for digitization of seismic signals. DigiSeis, an ActiveX component is developed to capture the digitized seismic signals from the sound card and deliver them to applications for processing and display. A seismic recorder application software SeisWave is developed over this component, which provides real-time monitoring and display of seismic events picked by a pair of external geophones. This recorder can be used as an educational aid for conducting seismic experiments. It can also be connected with suitable seismic sensors to record earthquakes. The software application and the ActiveX component are available for download. This component can be used to develop seismic recording applications according to user specific requirements.

Design of Weft Detection System in The Stenter Machine

NASA Astrophysics Data System (ADS)

Gu, Minming; Xu, Xianju; Dai, Wenzhan

2017-12-01

In order to build an effective automatic weft-straightening system, it is important for the sensing device to detect most the possible fabric styles, designs, colours and structures, an optical sensing system that detects the angular orientation of weft threads in a moving web of a textile has been built. It contains an adjustable light source, two lens systems and photodiode sensor array. The sensor array includes 13 radial pattern of photosensitive areas that each generate an electrical signal proportional to the total intensity of the light incident on the area. The moving shadow of a weft thread passing over the area will modulate the output signal. A signal processed circuit was built to do the I/V conversion, amplifying, hardware filtering. An embed micro control system then deals with the information of these signals, calculates the angle of the weft drew. Finally, the experiments were done, the results showed that the weft detection system can deal with the fabric weft skew up to 30° and has achieved good results in the application.

Pre-Hardware Optimization and Implementation Of Fast Optics Closed Control Loop Algorithms

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Lyon, Richard G.; Herman, Jay R.; Abuhassan, Nader

2004-01-01

One of the main heritage tools used in scientific and engineering data spectrum analysis is the Fourier Integral Transform and its high performance digital equivalent - the Fast Fourier Transform (FFT). The FFT is particularly useful in two-dimensional (2-D) image processing (FFT2) within optical systems control. However, timing constraints of a fast optics closed control loop would require a supercomputer to run the software implementation of the FFT2 and its inverse, as well as other image processing representative algorithm, such as numerical image folding and fringe feature extraction. A laboratory supercomputer is not always available even for ground operations and is not feasible for a night project. However, the computationally intensive algorithms still warrant alternative implementation using reconfigurable computing technologies (RC) such as Digital Signal Processors (DSP) and Field Programmable Gate Arrays (FPGA), which provide low cost compact super-computing capabilities. We present a new RC hardware implementation and utilization architecture that significantly reduces the computational complexity of a few basic image-processing algorithm, such as FFT2, image folding and phase diversity for the NASA Solar Viewing Interferometer Prototype (SVIP) using a cluster of DSPs and FPGAs. The DSP cluster utilization architecture also assures avoidance of a single point of failure, while using commercially available hardware. This, combined with the control algorithms pre-hardware optimization, or the first time allows construction of image-based 800 Hertz (Hz) optics closed control loops on-board a spacecraft, based on the SVIP ground instrument. That spacecraft is the proposed Earth Atmosphere Solar Occultation Imager (EASI) to study greenhouse gases CO2, C2H, H2O, O3, O2, N2O from Lagrange-2 point in space. This paper provides an advanced insight into a new type of science capabilities for future space exploration missions based on on-board image processing for control and for robotics missions using vision sensors. It presents a top-level description of technologies required for the design and construction of SVIP and EASI and to advance the spatial-spectral imaging and large-scale space interferometry science and engineering.

Hardware Prototyping of Neural Network based Fetal Electrocardiogram Extraction

NASA Astrophysics Data System (ADS)

Hasan, M. A.; Reaz, M. B. I.

2012-01-01

The aim of this paper is to model the algorithm for Fetal ECG (FECG) extraction from composite abdominal ECG (AECG) using VHDL (Very High Speed Integrated Circuit Hardware Description Language) for FPGA (Field Programmable Gate Array) implementation. Artificial Neural Network that provides efficient and effective ways of separating FECG signal from composite AECG signal has been designed. The proposed method gives an accuracy of 93.7% for R-peak detection in FHR monitoring. The designed VHDL model is synthesized and fitted into Altera's Stratix II EP2S15F484C3 using the Quartus II version 8.0 Web Edition for FPGA implementation.

Universal Decoder for PPM of any Order

NASA Technical Reports Server (NTRS)

Moision, Bruce E.

2010-01-01

A recently developed algorithm for demodulation and decoding of a pulse-position- modulation (PPM) signal is suitable as a basis for designing a single hardware decoding apparatus to be capable of handling any PPM order. Hence, this algorithm offers advantages of greater flexibility and lower cost, in comparison with prior such algorithms, which necessitate the use of a distinct hardware implementation for each PPM order. In addition, in comparison with the prior algorithms, the present algorithm entails less complexity in decoding at large orders. An unavoidably lengthy presentation of background information, including definitions of terms, is prerequisite to a meaningful summary of this development. As an aid to understanding, the figure illustrates the relevant processes of coding, modulation, propagation, demodulation, and decoding. An M-ary PPM signal has M time slots per symbol period. A pulse (signifying 1) is transmitted during one of the time slots; no pulse (signifying 0) is transmitted during the other time slots. The information intended to be conveyed from the transmitting end to the receiving end of a radio or optical communication channel is a K-bit vector u. This vector is encoded by an (N,K) binary error-correcting code, producing an N-bit vector a. In turn, the vector a is subdivided into blocks of m = log2(M) bits and each such block is mapped to an M-ary PPM symbol. The resultant coding/modulation scheme can be regarded as equivalent to a nonlinear binary code. The binary vector of PPM symbols, x is transmitted over a Poisson channel, such that there is obtained, at the receiver, a Poisson-distributed photon count characterized by a mean background count nb during no-pulse time slots and a mean signal-plus-background count of ns+nb during a pulse time slot. In the receiver, demodulation of the signal is effected in an iterative soft decoding process that involves consideration of relationships among photon counts and conditional likelihoods of m-bit vectors of coded bits. Inasmuch as the likelihoods of all the m-bit vectors of coded bits mapping to the same PPM symbol are correlated, the best performance is obtained when the joint mbit conditional likelihoods are utilized. Unfortunately, the complexity of decoding, measured in the number of operations per bit, grows exponentially with m, and can thus become prohibitively expensive for large PPM orders. For a system required to handle multiple PPM orders, the cost is even higher because it is necessary to have separate decoding hardware for each order. This concludes the prerequisite background information. In the present algorithm, the decoding process as described above is modified by, among other things, introduction of an lbit marginalizer sub-algorithm. The term "l-bit marginalizer" signifies that instead of m-bit conditional likelihoods, the decoder computes l-bit conditional likelihoods, where l is fixed. Fixing l, regardless of the value of m, makes it possible to use a single hardware implementation for any PPM order. One could minimize the decoding complexity and obtain an especially simple design by fixing l at 1, but this would entail some loss of performance. An intermediate solution is to fix l at some value, greater than 1, that may be less than or greater than m. This solution makes it possible to obtain the desired flexibility to handle any PPM order while compromising between complexity and loss of performance.

Hardware Verification of Laser Noise Cancellation and Gravitational Wave Extraction using Time-Delay Interferometry

NASA Astrophysics Data System (ADS)

Mitryk, Shawn; Mueller, Guido

The Laser Interferometer Space Antenna (LISA) is a space-based modified Michelson interfer-ometer designed to measure gravitational radiation in the frequency range from 30 uHz to 1 Hz. The interferometer measurement system (IMS) utilizes one-way laser phase measurements to cancel the laser phase noise, reconstruct the proof-mass motion, and extract the gravitational wave (GW) induced laser phase modulations in post-processing using a technique called time-delay interferometry (TDI). Unfortunately, there exist few hard-ware verification experiments of the IMS. The University of Florida LISA Interferometry Simulator (UFLIS) is designed to perform hardware-in-the-loop simulations of the LISA interferometry system, modeling the characteris-tics of the LISA mission as accurately as possible. This depends, first, on replicating the laser pre-stabilization by locking the laser phase to an ultra-stable Zerodur cavity length reference using the PDH locking method. Phase measurements of LISA-like photodetector beat-notes are taken using the UF-phasemeter (PM) which can measure the laser BN frequency to within an accuracy of 0.22 uHz. The inter-space craft (SC) laser links including the time-delay due to the 5 Gm light travel time along the LISA arms, the laser Doppler shifts due to differential SC motion, and the GW induced laser phase modulations are simulated electronically using the electronic phase delay (EPD) unit. The EPD unit replicates the laser field propagation between SC by measuring a photodetector beat-note frequency with the UF-phasemeter and storing the information in memory. After the requested delay time, the frequency information is added to a Doppler offset and a GW-like frequency modulation. The signal is then regenerated with the inter-SC laser phase affects applied. Utilizing these components, I will present the first complete TDI simulations performed using the UFLIS. The LISA model is presented along-side the simulation, comparing the generation and measurement of LISA-like signals. Phasemeter measurements are used in post-processing and combined in the linear combinations defined by TDI, thus, canceling the laser phase and phase-lock loop noise to extract the applied GW modulation buried under the noise. Nine order of magnitude common mode laser noise cancellation is achieved at a frequency of 1 mHz and the GW signal is clearly visible after the laser and PLL noise cancellation.

The role of hardware in learning engineering fundamentals: An empirical study of engineering design and product analysis activity

NASA Astrophysics Data System (ADS)

Brereton, Margot Felicity

A series of short engineering exercises and design projects was created to help students learn to apply abstract knowledge to physical experiences with hardware. The exercises involved designing machines from kits of materials and dissecting and analyzing familiar household products. Students worked in teams. During the activities students brought their knowledge of engineering fundamentals to bear. Videotape analysis was used to identify and characterize the ways in which hardware contributed to learning fundamental concepts. Structural and qualitative analyses of videotaped activities were undertaken. Structural analysis involved counting the references to theory and hardware and the extent of interleaving of references in activity. The analysis found that there was much more discussion linking fundamental concepts to hardware in some activities than in others. The analysis showed that the interleaving of references to theory and hardware in activity is observable and quantifiable. Qualitative analysis was used to investigate the dialog linking concepts and hardware. Students were found to advance their designs and their understanding of engineering fundamentals through a negotiation process in which they pitted abstract concepts against hardware behavior. Through this process students sorted out theoretical assumptions and causal relations. In addition they discovered design assumptions, functional connections and physical embodiments of abstract concepts in hardware, developing a repertoire of familiar hardware components and machines. Hardware was found to be integral to learning, affecting the course of inquiry and the dynamics of group interaction. Several case studies are presented to illustrate the processes at work. The research illustrates the importance of working across the boundary between abstractions and experiences with hardware in order to learn engineering and physical sciences. The research findings are: (a) the negotiation process by which students discover fundamental concepts in hardware (and three central causes of negotiation breakdown); (b) a characterization of the ways that material systems contribute to learning activities, (the seven roles of hardware in learning); (c) the characteristics of activities that support discovering fundamental concepts in hardware (plus several engineering exercises); (d) a research methodology to examine how students learn in practice.

Dedicated hardware processor and corresponding system-on-chip design for real-time laser speckle imaging.

PubMed

Jiang, Chao; Zhang, Hongyan; Wang, Jia; Wang, Yaru; He, Heng; Liu, Rui; Zhou, Fangyuan; Deng, Jialiang; Li, Pengcheng; Luo, Qingming

2011-11-01

Laser speckle imaging (LSI) is a noninvasive and full-field optical imaging technique which produces two-dimensional blood flow maps of tissues from the raw laser speckle images captured by a CCD camera without scanning. We present a hardware-friendly algorithm for the real-time processing of laser speckle imaging. The algorithm is developed and optimized specifically for LSI processing in the field programmable gate array (FPGA). Based on this algorithm, we designed a dedicated hardware processor for real-time LSI in FPGA. The pipeline processing scheme and parallel computing architecture are introduced into the design of this LSI hardware processor. When the LSI hardware processor is implemented in the FPGA running at the maximum frequency of 130 MHz, up to 85 raw images with the resolution of 640×480 pixels can be processed per second. Meanwhile, we also present a system on chip (SOC) solution for LSI processing by integrating the CCD controller, memory controller, LSI hardware processor, and LCD display controller into a single FPGA chip. This SOC solution also can be used to produce an application specific integrated circuit for LSI processing.

Beam Instrument Development System

DOE Office of Scientific and Technical Information (OSTI.GOV)

DOOLITTLE, LAWRENCE; HUANG, GANG; DU, QIANG

Beam Instrumentation Development System (BIDS) is a collection of common support libraries and modules developed during a series of Low-Level Radio Frequency (LLRF) control and timing/synchronization projects. BIDS includes a collection of Hardware Description Language (HDL) libraries and software libraries. The BIDS can be used for the development of any FPGA-based system, such as LLRF controllers. HDL code in this library is generic and supports common Digital Signal Processing (DSP) functions, FPGA-specific drivers (high-speed serial link wrappers, clock generation, etc.), ADC/DAC drivers, Ethernet MAC implementation, etc.

The search for extraterrestrial intelligence: Telecommunications technology

NASA Technical Reports Server (NTRS)

Edelson, R. E.; Levy, G. S.

1980-01-01

Efforts to discover evidence of intelligent extraterrestrial life have become not only feasible, but respectable. Fledgling observational projects have begun that will use state-of-the-art hardware to develop sophisticated receiving and data processing systems. The rationale behind the Search for Extraterrestrial Intelligence, the manner in which the program is taking shape, and the implications for telecommunications are described. It is concluded that the breadth of technological development required for the detection of signals from galactic brethren has particular relevance for the future of telecommunications in Earth oriented uses.

Floating-point scaling technique for sources separation automatic gain control

NASA Astrophysics Data System (ADS)

Fermas, A.; Belouchrani, A.; Ait-Mohamed, O.

2012-07-01

Based on the floating-point representation and taking advantage of scaling factor indetermination in blind source separation (BSS) processing, we propose a scaling technique applied to the separation matrix, to avoid the saturation or the weakness in the recovered source signals. This technique performs an automatic gain control in an on-line BSS environment. We demonstrate the effectiveness of this technique by using the implementation of a division-free BSS algorithm with two inputs, two outputs. The proposed technique is computationally cheaper and efficient for a hardware implementation compared to the Euclidean normalisation.

PC-Based systems for experiments in optical characterization of materials

NASA Astrophysics Data System (ADS)

López-Mora, C. C.; Trejo-Duran, M.; Alvarado-Méndez, E.; Rojas-Laguna, R.; Vargas-Rodríguez, E.; Estudillo-Ayala, J. M.; Mata-Chavez, R.; Sukhoivanov, I.; García-Pérez, A.; Ibarra-Manzano, O. G.; Andrade-Lucio, J. A.

2011-01-01

An automatic control for applications of optical characterization of materials using the optical Z-Scan technique is presented in this work. The emphasis is placed in the design of the graphical user interface (GUI) and the automation process. For this purpose, we use a USB data acquisition module with programmable I/O ports for control and signals acquisition for the complete system. The control software was developed using the graphical programming language LabVIEW® and compiled in order to obtain a portable system with the hardware used in this work.

Middle Atmosphere Program. Handbook for MAP, volume 28

NASA Technical Reports Server (NTRS)

Liu, C. H. (Editor); Edwards, Belva (Editor)

1989-01-01

Extended abstracts from the fourth workshop on the technical and scientific aspects of MST (mesosphere stratosphere troposphere) radar are presented. Individual sessions addressed the following topics: meteorological applications of MST and ST radars, networks, and campaigns; dynamics of the equatorial middle atmosphere; interpretation of radar returns from clear air; techniques for studying gravity waves and turbulence; intercomparison and calibration of wind and wave measurements at various frequencies; progress in existing and planned MST and ST radars; hardware design for MST and ST radars and boundary layer/lower troposphere profilers; signal processing; and data management.

Rotational fluid flow experiment: WPI/MITRE advanced space design GASCAN 2

NASA Technical Reports Server (NTRS)

Daly, Walter F.; Harr, Lee; Paduano, Rocco; Yee, Tony; Eubbani, Eddy; Delprado, Jaime; Khanna, Ajay

1991-01-01

The design and implementation is examined of an electro-mechanical system for studying vortex behavior in a microgravity environment. Most of the existing equipment was revised and redesigned as necessary. Emphasis was placed on the documentation and integration of the mechanical and electrical subsystems. Project results include the reconfiguration and thorough testing of all the hardware subsystems, the implementation of an infrared gas entrainment detector, new signal processing circuitry for the ultrasonic fluid circulation device, improved prototype interface circuits, and software for overall control of experiment design operation.

Literature Review of the State of the Art for Graphical User Interfaces (GUI) for a Series of Oil Quality Monitoring Sensors for Shipboard Equipment

DTIC Science & Technology

2011-03-01

sensors, the hardware may impose amplification and filtering on the input signal prior to the A/D conversion process. The third component in the...Assessment by FTIR – A Case Study on HEMM in Indian Mines”, Industrial Lubrication and Tribology , Vol. 152, pp. 61-66, 2000. [7] KarisAllen, K.J...and Engine Oil Condition”, Industrial Lubrication and Tribology , April 2005. [16] Jakoby, B., Eisenschmid, H., Schatz, O., “On-Board Evaluation of

Gamma ray spectroscopy with Arduino UNO

NASA Astrophysics Data System (ADS)

Lavelle, C. M.

2018-05-01

We review a simple gamma ray spectrometer constructed on a solderless breadboard. The spectrometer's detector consists of a CsI(Tl) scintillator and silicon photomultiplier (SiPM) and its readout is facilitated by an Arduino UNO. The system is low cost and utilizes a minimum of components while still achieving satisfactory charge linearity and noise levels. This instrument can be used in instructional laboratories to introduce both radiation detection and analog signal processing concepts. We also expect it will be of interest to those seeking to introduce gamma spectroscopy to the expanding ecosystem of Arduino hardware.

High-Speed Data Recorder for Space, Geodesy, and Other High-Speed Recording Applications

NASA Technical Reports Server (NTRS)

Taveniku, Mikael

2013-01-01

A high-speed data recorder and replay equipment has been developed for reliable high-data-rate recording to disk media. It solves problems with slow or faulty disks, multiple disk insertions, high-altitude operation, reliable performance using COTS hardware, and long-term maintenance and upgrade path challenges. The current generation data recor - ders used within the VLBI community are aging, special-purpose machines that are both slow (do not meet today's requirements) and are very expensive to maintain and operate. Furthermore, they are not easily upgraded to take advantage of commercial technology development, and are not scalable to multiple 10s of Gbit/s data rates required by new applications. The innovation provides a softwaredefined, high-speed data recorder that is scalable with technology advances in the commercial space. It maximally utilizes current technologies without being locked to a particular hardware platform. The innovation also provides a cost-effective way of streaming large amounts of data from sensors to disk, enabling many applications to store raw sensor data and perform post and signal processing offline. This recording system will be applicable to many applications needing realworld, high-speed data collection, including electronic warfare, softwaredefined radar, signal history storage of multispectral sensors, development of autonomous vehicles, and more.

NDAS Hardware Translation Layer Development

NASA Technical Reports Server (NTRS)

Nazaretian, Ryan N.; Holladay, Wendy T.

2011-01-01

The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Montenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of Field Programmable Gate Arrays (FPGA's) in the hardware implementation of fast digital signal processing functions. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used Proportional-Integral-Derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a Digital Signal Processor (DSP) device or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using DSP devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, Pulse Width Modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacemap. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive-control algorithm approaches. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Design of the intelligent smoke alarm system based on photoelectric smoke

NASA Astrophysics Data System (ADS)

Ma, Jiangfei; Yang, Xiufang; Wang, Peipei

2017-02-01

This paper designed a kind of intelligent smoke alarm system based on photoelectric smoke detector and temperature, The system takes AT89C51 MCU as the core of hardware control and Labview as the host computer monitoring center.The sensor system acquires temperature signals and smoke signals, the MCU control A/D by Sampling and converting the output analog signals , and then the two signals will be uploaded to the host computer through the serial communication. To achieve real-time monitoring of smoke and temperature in the environment, LabVIEW monitoring platform need to hold, process, analysis and display these samping signals. The intelligent smoke alarm system is suitable for large scale shopping malls and other public places, which can greatly reduce the false alarm rate of fire, The experimental results show that the system runs well and can alarm when the setting threshold is reached,and the threshold parameters can be adjusted according to the actual conditions of the field. The system is easy to operate, simple in structure, intelligent, low cost, and with strong practical value.

Potential Damage to Flight Hardware from MIL-STD-462 CS02 Setup

NASA Technical Reports Server (NTRS)

Harris, Patrick K.; Block, Nathan F.

2003-01-01

The MIL-STD-462 CS02 conducted susceptibility test setup includes an audio transformer, with the secondary used as an inductor, and a large capacitor. Together, these two components form an L-type low-pass filter to minimize the injected test signal input into the power source. Some flight hardware power input configurations are not compatible with this setup and break into oscillation when powered up. This, in turn, can damage flight hardware. Such an oscillation resulted in the catastrophic failure of an item tested in the Goddard Space Flight Center (GSFC) Large electromagnetic compatibility (EMC) Test Facility.

Potential Damage to Flight Hardware from MIL-STD-462 CS02 Setup

NASA Technical Reports Server (NTRS)

Harris, Patrick K.; Block, Nathan F.

2002-01-01

The MIL-STD-462 CS02 conducted susceptibility test setup, performed during electromagnetic compatibility (EMC) testing, consists of an audio transformer with the secondary used as an inductor and a large capacitor. Together, these two components form an L-type low-pass filter to minimize the injected test signal input into the power source. Some flight hardware power input configurations are not compatible with this setup and break into oscillation when powered up. This can damage flight hardware and caused a catastrophic failure to an item tested in the Goddard Space Flight Center (GSFC) Large EMC Test Facility.

An embedded controller for a 7-degree of freedom prosthetic arm.

PubMed

Tenore, Francesco; Armiger, Robert S; Vogelstein, R Jacob; Wenstrand, Douglas S; Harshbarger, Stuart D; Englehart, Kevin

2008-01-01

We present results from an embedded real-time hardware system capable of decoding surface myoelectric signals (sMES) to control a seven degree of freedom upper limb prosthesis. This is one of the first hardware implementations of sMES decoding algorithms and the most advanced controller to-date. We compare decoding results from the device to simulation results from a real-time PC-based operating system. Performance of both systems is shown to be similar, with decoding accuracy greater than 90% for the floating point software simulation and 80% for fixed point hardware and software implementations.

Mini-O, simple Omega receiver hardware for user education

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1976-01-01

A problem with the Omega system is a lack of suitable low cost hardware for the small user community. A collection of do it yourself circuit modules are under development intended for use by educational institutions, small boat owners, aviation enthusiasts, and others who have some skills in fabricating their own electronic equipment. Applications of the hardware to time frequency standards measurements, signal propagation monitoring, and navigation experiments are presented. A family of Mini-O systems have been constructed varying from the simplest RF preamplifiers and narrowband filters front-ends, to sophisticated microcomputer interface adapters.

Design and development of data acquisition system based on WeChat hardware

NASA Astrophysics Data System (ADS)

Wang, Zhitao; Ding, Lei

2018-06-01

Data acquisition system based on WeChat hardware provides methods for popularization and practicality of data acquisition. The whole system is based on WeChat hardware platform, where the hardware part is developed on DA14580 development board and the software part is based on Alibaba Cloud. We designed service module, logic processing module, data processing module and database module. The communication between hardware and software uses AirSync Protocal. We tested this system by collecting temperature and humidity data, and the result shows that the system can aquisite the temperature and humidity in real time according to settings.

A fast, programmable hardware architecture for spaceborne SAR processing

NASA Technical Reports Server (NTRS)

Bennett, J. R.; Cumming, I. G.; Lim, J.; Wedding, R. M.

1983-01-01

The launch of spaceborne SARs during the 1980's is discussed. The satellite SARs require high quality and high throughput ground processors. Compression ratios in range and azimuth of greater than 500 and 150 respectively lead to frequency domain processing and data computation rates in excess of 2000 million real operations per second for C-band SARs under consideration. Various hardware architectures are examined and two promising candidates and proceeds to recommend a fast, programmable hardware architecture for spaceborne SAR processing are selected. Modularity and programmability are introduced as desirable attributes for the purpose of HTSP hardware selection.

A space-based classification system for RF transients

NASA Astrophysics Data System (ADS)

Moore, K. R.; Call, D.; Johnson, S.; Payne, T.; Ford, W.; Spencer, K.; Wilkerson, J. F.; Baumgart, C.

The FORTE (Fast On-Orbit Recording of Transient Events) small satellite is scheduled for launch in mid 1995. The mission is to measure and classify VHF (30-300 MHz) electromagnetic pulses, primarily due to lightning, within a high noise environment dominated by continuous wave carriers such as TV and FM stations. The FORTE Event Classifier will use specialized hardware to implement signal processing and neural network algorithms that perform onboard classification of RF transients and carriers. Lightning events will also be characterized with optical data telemetered to the ground. A primary mission science goal is to develop a comprehensive understanding of the correlation between the optical flash and the VHF emissions from lightning. By combining FORTE measurements with ground measurements and/or active transmitters, other science issues can be addressed. Examples include the correlation of global precipitation rates with lightning flash rates and location, the effects of large scale structures within the ionosphere (such as traveling ionospheric disturbances and horizontal gradients in the total electron content) on the propagation of broad bandwidth RF signals, and various areas of lightning physics. Event classification is a key feature of the FORTE mission. Neural networks are promising candidates for this application. The authors describe the proposed FORTE Event Classifier flight system, which consists of a commercially available digital signal processing board and a custom board, and discuss work on signal processing and neural network algorithms.

Towards Contactless Silent Speech Recognition Based on Detection of Active and Visible Articulators Using IR-UWB Radar

PubMed Central

Shin, Young Hoon; Seo, Jiwon

2016-01-01

People with hearing or speaking disabilities are deprived of the benefits of conventional speech recognition technology because it is based on acoustic signals. Recent research has focused on silent speech recognition systems that are based on the motions of a speaker’s vocal tract and articulators. Because most silent speech recognition systems use contact sensors that are very inconvenient to users or optical systems that are susceptible to environmental interference, a contactless and robust solution is hence required. Toward this objective, this paper presents a series of signal processing algorithms for a contactless silent speech recognition system using an impulse radio ultra-wide band (IR-UWB) radar. The IR-UWB radar is used to remotely and wirelessly detect motions of the lips and jaw. In order to extract the necessary features of lip and jaw motions from the received radar signals, we propose a feature extraction algorithm. The proposed algorithm noticeably improved speech recognition performance compared to the existing algorithm during our word recognition test with five speakers. We also propose a speech activity detection algorithm to automatically select speech segments from continuous input signals. Thus, speech recognition processing is performed only when speech segments are detected. Our testbed consists of commercial off-the-shelf radar products, and the proposed algorithms are readily applicable without designing specialized radar hardware for silent speech processing. PMID:27801867

Towards Contactless Silent Speech Recognition Based on Detection of Active and Visible Articulators Using IR-UWB Radar.

PubMed

Shin, Young Hoon; Seo, Jiwon

2016-10-29

People with hearing or speaking disabilities are deprived of the benefits of conventional speech recognition technology because it is based on acoustic signals. Recent research has focused on silent speech recognition systems that are based on the motions of a speaker's vocal tract and articulators. Because most silent speech recognition systems use contact sensors that are very inconvenient to users or optical systems that are susceptible to environmental interference, a contactless and robust solution is hence required. Toward this objective, this paper presents a series of signal processing algorithms for a contactless silent speech recognition system using an impulse radio ultra-wide band (IR-UWB) radar. The IR-UWB radar is used to remotely and wirelessly detect motions of the lips and jaw. In order to extract the necessary features of lip and jaw motions from the received radar signals, we propose a feature extraction algorithm. The proposed algorithm noticeably improved speech recognition performance compared to the existing algorithm during our word recognition test with five speakers. We also propose a speech activity detection algorithm to automatically select speech segments from continuous input signals. Thus, speech recognition processing is performed only when speech segments are detected. Our testbed consists of commercial off-the-shelf radar products, and the proposed algorithms are readily applicable without designing specialized radar hardware for silent speech processing.

Feasibility of an ultra-low power digital signal processor platform as a basis for a fully implantable brain-computer interface system.

PubMed

Wang, Po T; Gandasetiawan, Keulanna; McCrimmon, Colin M; Karimi-Bidhendi, Alireza; Liu, Charles Y; Heydari, Payam; Nenadic, Zoran; Do, An H

2016-08-01

A fully implantable brain-computer interface (BCI) can be a practical tool to restore independence to those affected by spinal cord injury. We envision that such a BCI system will invasively acquire brain signals (e.g. electrocorticogram) and translate them into control commands for external prostheses. The feasibility of such a system was tested by implementing its benchtop analogue, centered around a commercial, ultra-low power (ULP) digital signal processor (DSP, TMS320C5517, Texas Instruments). A suite of signal processing and BCI algorithms, including (de)multiplexing, Fast Fourier Transform, power spectral density, principal component analysis, linear discriminant analysis, Bayes rule, and finite state machine was implemented and tested in the DSP. The system's signal acquisition fidelity was tested and characterized by acquiring harmonic signals from a function generator. In addition, the BCI decoding performance was tested, first with signals from a function generator, and subsequently using human electroencephalogram (EEG) during eyes opening and closing task. On average, the system spent 322 ms to process and analyze 2 s of data. Crosstalk (<;-65 dB) and harmonic distortion (~1%) were minimal. Timing jitter averaged 49 μs per 1000 ms. The online BCI decoding accuracies were 100% for both function generator and EEG data. These results show that a complex BCI algorithm can be executed on an ULP DSP without compromising performance. This suggests that the proposed hardware platform may be used as a basis for future, fully implantable BCI systems.

A data-driven modeling approach to stochastic computation for low-energy biomedical devices.

PubMed

Lee, Kyong Ho; Jang, Kuk Jin; Shoeb, Ali; Verma, Naveen

2011-01-01

Low-power devices that can detect clinically relevant correlations in physiologically-complex patient signals can enable systems capable of closed-loop response (e.g., controlled actuation of therapeutic stimulators, continuous recording of disease states, etc.). In ultra-low-power platforms, however, hardware error sources are becoming increasingly limiting. In this paper, we present how data-driven methods, which allow us to accurately model physiological signals, also allow us to effectively model and overcome prominent hardware error sources with nearly no additional overhead. Two applications, EEG-based seizure detection and ECG-based arrhythmia-beat classification, are synthesized to a logic-gate implementation, and two prominent error sources are introduced: (1) SRAM bit-cell errors and (2) logic-gate switching errors ('stuck-at' faults). Using patient data from the CHB-MIT and MIT-BIH databases, performance similar to error-free hardware is achieved even for very high fault rates (up to 0.5 for SRAMs and 7 × 10(-2) for logic) that cause computational bit error rates as high as 50%.

Digitally balanced detection for optical tomography.

PubMed

Hafiz, Rehan; Ozanyan, Krikor B

2007-10-01

Analog balanced Photodetection has found extensive usage for sensing of a weak absorption signal buried in laser intensity noise. This paper proposes schemes for compact, affordable, and flexible digital implementation of the already established analog balanced detection, as part of a multichannel digital tomography system. Variants of digitally balanced detection (DBD) schemes, suitable for weak signals on a largely varying background or weakly varying envelopes of high frequency carrier waves, are introduced analytically and elaborated in terms of algorithmic and hardware flow. The DBD algorithms are implemented on a low-cost general purpose reconfigurable hardware (field-programmable gate array), utilizing less than half of its resources. The performance of the DBD schemes compare favorably with their analog counterpart: A common mode rejection ratio of 50 dB was observed over a bandwidth of 300 kHz, limited mainly by the host digital hardware. The close relationship between the DBD outputs and those of known analog balancing circuits is discussed in principle and shown experimentally in the example case of propane gas detection.

Presenting the master of all conductivity meters, and how it tastes streamflow

NASA Astrophysics Data System (ADS)

Weijs, S. V.; Parlange, M. B.

2012-04-01

For measuring streamflow in small Alpine streams, the salt dilution method is suitable and often used. By injecting a known mass of salt in the stream and measuring the downstream salt concentration as a function of time, we can obtain the streamflow by integration of the time signal. The underlying assumption is that the salt is well mixed within the stream cross-section. In this method, the salt concentration us usually measured through its relation with conductivity. Several commercial systems exist to do these conductivity measurements and automatically process the results. The problem we encountered when using these systems, however, is that uncertainty is often hidden under the hood. Because the processing happens onboard, researchers may be tempted to put too much trust in the final measurement outcomes. This is somewhat remediated by using a system with two probes which are individually processed to a streamflow outcome. We found that the salt-wave was differently shaped for the faster part of the stream compared to the sides, and therefore gave different readings for the discharge. To come a more probabilistic characterization of streamflow, and to know what is under the hood, we decided to build our own conductivity meter, equipped with eight probes covering the cross section. This enables quantifying some of the uncertainty in the streamflow measurements, which is important for testing hydrological models. This poster shows the first results and the hardware setup. We based our hardware on the open source hardware platform Arduino, and believe that by sharing both the design and the drawbacks, we contribute to the evolution of better measurement equipment or at least better understanding of its shortcomings.

An evaluation of the directed flow graph methodology

NASA Technical Reports Server (NTRS)

Snyder, W. E.; Rajala, S. A.

1984-01-01

The applicability of the Directed Graph Methodology (DGM) to the design and analysis of special purpose image and signal processing hardware was evaluated. A special purpose image processing system was designed and described using DGM. The design, suitable for very large scale integration (VLSI) implements a region labeling technique. Two computer chips were designed, both using metal-nitride-oxide-silicon (MNOS) technology, as well as a functional system utilizing those chips to perform real time region labeling. The system is described in terms of DGM primitives. As it is currently implemented, DGM is inappropriate for describing synchronous, tightly coupled, special purpose systems. The nature of the DGM formalism lends itself more readily to modeling networks of general purpose processors.

Blind detection of giant pulses: GPU implementation

NASA Astrophysics Data System (ADS)

Ait-Allal, Dalal; Weber, Rodolphe; Dumez-Viou, Cédric; Cognard, Ismael; Theureau, Gilles

2012-01-01

Radio astronomical pulsar observations require specific instrumentation and dedicated signal processing to cope with the dispersion caused by the interstellar medium. Moreover, the quality of observations can be limited by radio frequency interference (RFI) generated by Telecommunications activity. This article presents the innovative pulsar instrumentation based on graphical processing units (GPU) which has been designed at the Nançay Radio Astronomical Observatory. In addition, for giant pulsar search, we propose a new approach which combines a hardware-efficient search method and some RFI mitigation capabilities. Although this approach is less sensitive than the classical approach, its advantage is that no a priori information on the pulsar parameters is required. The validation of a GPU implementation is under way.

Automated processing of dynamic properties of intraventricular pressure by computer program and electronic circuit.

PubMed

Adler, D; Mahler, Y

1980-04-01

A procedure for automatic detection and digital processing of the maximum first derivative of the intraventricular pressure (dp/dtmax), time to dp/dtmax(t - dp/dt) and beat-to-beat intervals have been developed. The procedure integrates simple electronic circuits with a short program using a simple algorithm for the detection of the points of interest. The tasks of differentiating the pressure signal and detecting the onset of contraction were done by electronics, while the tasks of finding the values of dp/dtmax, t - dp/dt, beat-to-beat intervals and all computations needed were done by software. Software/hardware 'trade off' considerations and the accuracy and reliability of the system are discussed.

A retrospective detection algorithm for extraction of weak targets in clutter and interference environments

NASA Astrophysics Data System (ADS)

Prengaman, R. J.; Thurber, R. E.; Bath, W. G.

The usefulness of radar systems depends on the ability to distinguish between signals returned from desired targets and noise. A retrospective processor uses all contacts (or 'plots') from several past radar scans, taking into account all possible target trajectories formed from stored contacts for each input detection. The processor eliminates many false alarms, while retaining those contacts describing resonable trajectories. The employment of a retrospective processor makes it, therefore, possible to obtain large improvements in detection sensitivity in certain important clutter environments. Attention is given to the retrospective processing concept, a theoretical analysis of the multiscan detection process, the experimental evaluation of retrospective data filter, and aspects of retrospective data filter hardware implementation.

Consistency analysis on laser signal in laser guided weapon simulation

NASA Astrophysics Data System (ADS)

Yin, Ruiguang; Zhang, Wenpan; Guo, Hao; Gan, Lin

2015-10-01

The hardware-in-the-loop simulation is widely used in laser semi-active guidance weapon experiments, the authenticity of the laser guidance signal is the key problem of reliability. In order to evaluate the consistency of the laser guidance signal, this paper analyzes the angle of sight, laser energy density, laser spot size, atmospheric back scattering, sun radiation and SNR by comparing the different working state between actual condition and hardware-in-the-loop simulation. Based on measured data, mathematical simulation and optical simulation result, laser guidance signal effects on laser seeker are determined. By using Monte Carlo method, the laser guided weapon trajectory and impact point distribution are obtained, the influence of the systematic error are analyzed. In conclusion it is pointed out that the difference between simulation system and actual system has little influence in normal guidance, has great effect on laser jamming. The research is helpful to design and evaluation of laser guided weapon simulation.

Method and apparatus for detecting timing errors in a system oscillator

DOEpatents

Gliebe, Ronald J.; Kramer, William R.

1993-01-01

A method of detecting timing errors in a system oscillator for an electronic device, such as a power supply, includes the step of comparing a system oscillator signal with a delayed generated signal and generating a signal representative of the timing error when the system oscillator signal is not identical to the delayed signal. An LED indicates to an operator that a timing error has occurred. A hardware circuit implements the above-identified method.

Distributed digital signal processors for multi-body flexible structures

NASA Technical Reports Server (NTRS)

Lee, Gordon K. F.

1992-01-01

Multi-body flexible structures, such as those currently under investigation in spacecraft design, are large scale (high-order) dimensional systems. Controlling and filtering such structures is a computationally complex problem. This is particularly important when many sensors and actuators are located along the structure and need to be processed in real time. This report summarizes research activity focused on solving the signal processing (that is, information processing) issues of multi-body structures. A distributed architecture is developed in which single loop processors are employed for local filtering and control. By implementing such a philosophy with an embedded controller configuration, a supervising controller may be used to process global data and make global decisions as the local devices are processing local information. A hardware testbed, a position controller system for a servo motor, is employed to illustrate the capabilities of the embedded controller structure. Several filtering and control structures which can be modeled as rational functions can be implemented on the system developed in this research effort. Thus the results of the study provide a support tool for many Control/Structure Interaction (CSI) NASA testbeds such as the Evolutionary model and the nine-bay truss structure.

Reduction of Background Noise in the NASA Ames 40- by 80-Foot Wind Tunnel

NASA Technical Reports Server (NTRS)

Jaeger, Stephen M.; Allen, Christopher S.; Soderman, Paul T.; Olson, Larry E. (Technical Monitor)

1995-01-01

Background noise in both open-jet and closed wind tunnels adversely affects the signal-to-noise ratio of acoustic measurements. To measure the noise of increasingly quieter aircraft models, the background noise will have to be reduced by physical means or through signal processing. In a closed wind tunnel, such as the NASA Ames 40- by 80- Foot Wind Tunnel, the principle background noise sources can be classified as: (1) fan drive noise; (2) microphone self-noise; (3) aerodynamically induced noise from test-dependent hardware such as model struts and junctions; and (4) noise from the test section walls and vane set. This paper describes the steps taken to minimize the influence of each of these background noise sources in the 40 x 80.

An additional study and implementation of tone calibrated technique of modulation

NASA Technical Reports Server (NTRS)

Rafferty, W.; Bechtel, L. K.; Lay, N. E.

1985-01-01

The Tone Calibrated Technique (TCT) was shown to be theoretically free from an error floor, and is only limited, in practice, by implementation constraints. The concept of the TCT transmission scheme along with a baseband implementation of a suitable demodulator is introduced. Two techniques for the generation of the TCT signal are considered: a Manchester source encoding scheme (MTCT) and a subcarrier based technique (STCT). The results are summarized for the TCT link computer simulation. The hardware implementation of the MTCT system is addressed and the digital signal processing design considerations involved in satisfying the modulator/demodulator requirements are outlined. The program findings are discussed and future direction are suggested based on conclusions made regarding the suitability of the TCT system for the transmission channel presently under consideration.

Realization of Minimum and Maximum Gate Function in Ta2O5-based Memristive Devices

NASA Astrophysics Data System (ADS)

Breuer, Thomas; Nielen, Lutz; Roesgen, Bernd; Waser, Rainer; Rana, Vikas; Linn, Eike

2016-04-01

Redox-based resistive switching devices (ReRAM) are considered key enablers for future non-volatile memory and logic applications. Functionally enhanced ReRAM devices could enable new hardware concepts, e.g. logic-in-memory or neuromorphic applications. In this work, we demonstrate the implementation of ReRAM-based fuzzy logic gates using Ta2O5 devices to enable analogous Minimum and Maximum operations. The realized gates consist of two anti-serially connected ReRAM cells offering two inputs and one output. The cells offer an endurance up to 106 cycles. By means of exemplary input signals, each gate functionality is verified and signal constraints are highlighted. This realization could improve the efficiency of analogous processing tasks such as sorting networks in the future.

Signal processing in urodynamics: towards high definition urethral pressure profilometry.

PubMed

Klünder, Mario; Sawodny, Oliver; Amend, Bastian; Ederer, Michael; Kelp, Alexandra; Sievert, Karl-Dietrich; Stenzl, Arnulf; Feuer, Ronny

2016-03-22

Urethral pressure profilometry (UPP) is used in the diagnosis of stress urinary incontinence (SUI) which is a significant medical, social, and economic problem. Low spatial pressure resolution, common occurrence of artifacts, and uncertainties in data location limit the diagnostic value of UPP. To overcome these limitations, high definition urethral pressure profilometry (HD-UPP) combining enhanced UPP hardware and signal processing algorithms has been developed. In this work, we present the different signal processing steps in HD-UPP and show experimental results from female minipigs. We use a special microtip catheter with high angular pressure resolution and an integrated inclination sensor. Signals from the catheter are filtered and time-correlated artifacts removed. A signal reconstruction algorithm processes pressure data into a detailed pressure image on the urethra's inside. Finally, the pressure distribution on the urethra's outside is calculated through deconvolution. A mathematical model of the urethra is contained in a point-spread-function (PSF) which is identified depending on geometric and material properties of the urethra. We additionally investigate the PSF's frequency response to determine the relevant frequency band for pressure information on the urinary sphincter. Experimental pressure data are spatially located and processed into high resolution pressure images. Artifacts are successfully removed from data without blurring other details. The pressure distribution on the urethra's outside is reconstructed and compared to the one on the inside. Finally, the pressure images are mapped onto the urethral geometry calculated from inclination and position data to provide an integrated image of pressure distribution, anatomical shape, and location. With its advanced sensing capabilities, the novel microtip catheter collects an unprecedented amount of urethral pressure data. Through sequential signal processing steps, physicians are provided with detailed information on the pressure distribution in and around the urethra. Therefore, HD-UPP overcomes many current limitations of conventional UPP and offers the opportunity to evaluate urethral structures, especially the sphincter, in context of the correct anatomical location. This could enable the development of focal therapy approaches in the treatment of SUI.

A portable device for rapid nondestructive detection of fresh meat quality

NASA Astrophysics Data System (ADS)

Lin, Wan; Peng, Yankun

2014-05-01

Quality attributes of fresh meat influence nutritional value and consumers' purchasing power. In order to meet the demand of inspection department for portable device, a rapid and nondestructive detection device for fresh meat quality based on ARM (Advanced RISC Machines) processor and VIS/NIR technology was designed. Working principal, hardware composition, software system and functional test were introduced. Hardware system consisted of ARM processing unit, light source unit, detection probe unit, spectral data acquisition unit, LCD (Liquid Crystal Display) touch screen display unit, power unit and the cooling unit. Linux operating system and quality parameters acquisition processing application were designed. This system has realized collecting spectral signal, storing, displaying and processing as integration with the weight of 3.5 kg. 40 pieces of beef were used in experiment to validate the stability and reliability. The results indicated that prediction model developed using PLSR method using SNV as pre-processing method had good performance, with the correlation coefficient of 0.90 and root mean square error of 1.56 for validation set for L*, 0.95 and 1.74 for a*，0.94 and 0.59 for b*, 0.88 and 0.13 for pH, 0.79 and 12.46 for tenderness, 0.89 and 0.91 for water content, respectively. The experimental result shows that this device can be a useful tool for detecting quality of meat.

FPGA-based sleep apnea screening device for home monitoring.

PubMed

Al-Ashmouny, K haledM; Hamed, Hisham M; Morsy, Ahmed A

2006-01-01

We present the hardware design of an FPGA-based portable device for home screening of sleep apnea syndromes. The device is simple to use, inexpensive, and uses only three signals, namely the nasal air flow and the thorax and abdomen effort signals. The device hardware stores data of overnight sleep on a Secure Digital card. At the clinic, the sleep specialist reads in the stored data and uses an algorithm for the detection and classification of sleep apnea. The device is fairly low-cost and may help spread the ability to diagnose more cases of sleep apnea. Most sleep apnea cases currently go undiagnosed because of cost and practicality limitations of overnight polysomnography at sleep labs.

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

NASA Technical Reports Server (NTRS)

Al Hassan, Mohammad; Britton, Paul; Hatfield, Glen Spencer; Novack, Steven D.

2017-01-01

Today's launch vehicles complex electronic and avionics systems heavily utilize Field Programmable Gate Array (FPGA) integrated circuits (IC) for their superb speed and reconfiguration capabilities. Consequently, FPGAs are prevalent ICs in communication protocols such as MILSTD- 1553B and in control signal commands such as in solenoid valve actuations. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

Scalable digital hardware for a trapped ion quantum computer

NASA Astrophysics Data System (ADS)

Mount, Emily; Gaultney, Daniel; Vrijsen, Geert; Adams, Michael; Baek, So-Young; Hudek, Kai; Isabella, Louis; Crain, Stephen; van Rynbach, Andre; Maunz, Peter; Kim, Jungsang

2016-12-01

Many of the challenges of scaling quantum computer hardware lie at the interface between the qubits and the classical control signals used to manipulate them. Modular ion trap quantum computer architectures address scalability by constructing individual quantum processors interconnected via a network of quantum communication channels. Successful operation of such quantum hardware requires a fully programmable classical control system capable of frequency stabilizing the continuous wave lasers necessary for loading, cooling, initialization, and detection of the ion qubits, stabilizing the optical frequency combs used to drive logic gate operations on the ion qubits, providing a large number of analog voltage sources to drive the trap electrodes, and a scheme for maintaining phase coherence among all the controllers that manipulate the qubits. In this work, we describe scalable solutions to these hardware development challenges.

Design and Performance of the Multiplexed SQUID/TES Array at Ninety Gigahertz

NASA Astrophysics Data System (ADS)

Stanchfield, Sara; Ade, Peter; Aguirre, James; Brevik, Justus A.; Cho, Hsiao-Mei; Datta, Rahul; Devlin, Mark; Dicker, Simon R.; Dober, Bradley; Duff, Shannon M.; Egan, Dennis; Ford, Pam; Hilton, Gene; Hubmayr, Johannes; Irwin, Kent; Knowles, Kenda; Marganian, Paul; Mason, Brian Scott; Mates, John A. B.; McMahon, Jeff; Mello, Melinda; Mroczkowski, Tony; Romero, Charles; Sievers, Jonathon; Tucker, Carole; Vale, Leila R.; Vissers, Michael; White, Steven; Whitehead, Mark; Ullom, Joel; Young, Alexander

2018-01-01

We present the array performance and astronomical images from early science results from MUSTANG-2, a 90 GHz feedhorn-coupled, microwave SQUID-multiplexed TES bolometer array operating on the Robert C. Byrd Green Bank Telescope (GBT). MUSTANG-2 was installed on the GBT on December 2, 2016 and immediately began commissioning efforts, followed by science observations, which are expected to conclude June 2017. The feedhorn and waveguide-probe-coupled detector technology is a mature technology, which has been used on instrument including the South Pole Telescope, the Atacama Cosmology Telescope, and the Atacama B-mode Search telescope. The microwave SQUID readout system developed for MUSTANG-2 currently reads out 66 detectors with a single coaxial cable and will eventually allow thousands of detectors to be multiplexed. This microwave SQUID multiplexer combines the proven abilities of millimeterwave TES detectors with the multiplexing capabilities of KIDs with no degradation in noise performance of the detectors. Each multiplexing device is read out using warm electronics consisting of a commercially available ROACH board, a DAC/ADC card, and an Intermediate Frequency mixer circuit. The hardware was originally developed by the UC Berkeley Collaboration for Astronomy Signal Processing and Electronic Research (CASPER) group, whose primary goal is to develop scalable FPGA-based hardware with the flexibility to be used in a wide range of radio signal processing applications. MUSTANG-2 is the first on-sky instrument to use microwave SQUID multiplexing and is available as a shared-risk/PI instrument on the GBT. In MUSTANG-2's first season 7 separate proposals were awarded a total of 230 hours of telescope time.

Human Systems Engineering for Launch processing at Kennedy Space Center (KSC)

NASA Technical Reports Server (NTRS)

Henderson, Gena; Stambolian, Damon B.; Stelges, Katrine

2012-01-01

Launch processing at Kennedy Space Center (KSC) is primarily accomplished by human users of expensive and specialized equipment. In order to reduce the likelihood of human error, to reduce personal injuries, damage to hardware, and loss of mission the design process for the hardware needs to include the human's relationship with the hardware. Just as there is electrical, mechanical, and fluids, the human aspect is just as important. The focus of this presentation is to illustrate how KSC accomplishes the inclusion of the human aspect in the design using human centered hardware modeling and engineering. The presentations also explain the current and future plans for research and development for improving our human factors analysis tools and processes.

Towards a neuromorphic vestibular system.

PubMed

Corradi, Federico; Zambrano, Davide; Raglianti, Marco; Passetti, Giovanni; Laschi, Cecilia; Indiveri, Giacomo

2014-10-01

The vestibular system plays a crucial role in the sense of balance and spatial orientation in mammals. It is a sensory system that detects both rotational and translational motion of the head, via its semicircular canals and otoliths respectively. In this work, we propose a real-time hardware model of an artificial vestibular system, implemented using a custom neuromorphic Very Large Scale Integration (VLSI) multi-neuron chip interfaced to a commercial Inertial Measurement Unit (IMU). The artificial vestibular system is realized with spiking neurons that reproduce the responses of biological hair cells present in the real semicircular canals and otholitic organs. We demonstrate the real-time performance of the hybrid analog-digital system and characterize its response properties, presenting measurements of a successful encoding of angular velocities as well as linear accelerations. As an application, we realized a novel implementation of a recurrent integrator network capable of keeping track of the current angular position. The experimental results provided validate the hardware implementation via comparisons with a detailed computational neuroscience model. In addition to being an ideal tool for developing bio-inspired robotic technologies, this work provides a basis for developing a complete low-power neuromorphic vestibular system which integrates the hardware model of the neural signal processing pathway described with custom bio-mimetic gyroscopic sensors, exploiting neuromorphic principles in both mechanical and electronic aspects.

Developing an Integration Infrastructure for Distributed Engine Control Technologies

NASA Technical Reports Server (NTRS)

Culley, Dennis; Zinnecker, Alicia; Aretskin-Hariton, Eliot; Kratz, Jonathan

2014-01-01

Turbine engine control technology is poised to make the first revolutionary leap forward since the advent of full authority digital engine control in the mid-1980s. This change aims squarely at overcoming the physical constraints that have historically limited control system hardware on aero-engines to a federated architecture. Distributed control architecture allows complex analog interfaces existing between system elements and the control unit to be replaced by standardized digital interfaces. Embedded processing, enabled by high temperature electronics, provides for digitization of signals at the source and network communications resulting in a modular system at the hardware level. While this scheme simplifies the physical integration of the system, its complexity appears in other ways. In fact, integration now becomes a shared responsibility among suppliers and system integrators. While these are the most obvious changes, there are additional concerns about performance, reliability, and failure modes due to distributed architecture that warrant detailed study. This paper describes the development of a new facility intended to address the many challenges of the underlying technologies of distributed control. The facility is capable of performing both simulation and hardware studies ranging from component to system level complexity. Its modular and hierarchical structure allows the user to focus their interaction on specific areas of interest.

Arrays of Miniature Microphones for Aeroacoustic Testing

NASA Technical Reports Server (NTRS)

Shams, Qamar A.; Humphreys, William M.; Sealey, Bradley S.; Bartram, Scott M.; Zuckewar, Allan J.; Comeaux, Toby; Adams, James K.

2007-01-01

A phased-array system comprised of custom-made and commercially available microelectromechanical system (MEMS) silicon microphones and custom ancillary hardware has been developed for use in aeroacoustic testing in hard-walled and acoustically treated wind tunnels. Recent advances in the areas of multi-channel signal processing and beam forming have driven the construction of phased arrays containing ever-greater numbers of microphones. Traditional obstacles to this trend have been posed by (1) the high costs of conventional condenser microphones, associated cabling, and support electronics and (2) the difficulty of mounting conventional microphones in the precise locations required for high-density arrays. The present development overcomes these obstacles. One of the hallmarks of the new system is a series of fabricated platforms on which multiple microphones can be mounted. These mounting platforms, consisting of flexible polyimide circuit-board material (see left side of figure), include all the necessary microphone power and signal interconnects. A single bus line connects all microphones to a common power supply, while the signal lines terminate in one or more data buses on the sides of the circuit board. To minimize cross talk between array channels, ground lines are interposed as shields between all the data bus signal lines. The MEMS microphones are electrically connected to the boards via solder pads that are built into the printed wiring. These flexible circuit boards share many characteristics with their traditional rigid counterparts, but can be manufactured much thinner, as small as 0.1 millimeter, and much lighter with boards weighing as much as 75 percent less than traditional rigid ones. For a typical hard-walled wind-tunnel installation, the flexible printed-circuit board is bonded to the tunnel wall and covered with a face sheet that contains precise cutouts for the microphones. Once the face sheet is mounted, a smooth surface is established over the entire array due to the flush mounting of all microphones (see right side of figure). The face sheet is made from a continuous glass-woven-fabric base impregnated with an epoxy resin binder. This material offers a combination of high mechanical strength and low dielectric loss, making it suitable for withstanding the harsh test section environment present in many wind tunnels, while at the same time protecting the underlying polyimide board. Customized signal-conditioning hardware consisting of line drivers and antialiasing filters are coupled with the array. The line drivers are constructed using low-supply-current, high-gain-bandwidth operational amplifiers designed to transmit the microphone signals several dozen feet from the array to external acquisition hardware. The anti-alias filters consist of individual Chebyshev low-pass filters (one for each microphone channel) housed on small printed-circuit boards mounted on one or more motherboards. The mother/daughter board design results in a modular system, which is easy to debug and service and which enables the filter characteristics to be changed by swapping daughter boards with ones containing different filter parameters. The filter outputs are passed to commercially- available acquisition hardware to digitize and store the conditioned microphone signals. Wind-tunnel testing of the new MEMS microphone polyimide mounting system shows that the array performance is comparable to that of traditional arrays, but with significantly less cost of construction.

Equalization filters for multiple-channel electromyogram arrays

PubMed Central

Clancy, Edward A.; Xia, Hongfang; Christie, Anita; Kamen, Gary

2007-01-01

Multiple channels of electromyogram activity are frequently transduced via electrodes, then combined electronically to form one electrophysiologic recording, e.g. bipolar, linear double difference and Laplacian montages. For high quality recordings, precise gain and frequency response matching of the individual electrode potentials is achieved in hardware (e.g., an instrumentation amplifier for bipolar recordings). This technique works well when the number of derived signals is small and the montages are pre-determined. However, for array electrodes employing a variety of montages, hardware channel matching can be expensive and tedious, and limits the number of derived signals monitored. This report describes a method for channel matching based on the concept of equalization filters. Monopolar potentials are recorded from each site without precise hardware matching. During a calibration phase, a time-varying linear chirp voltage is applied simultaneously to each site and recorded. Based on the calibration recording, each monopolar channel is digitally filtered to “correct” for (equalize) differences in the individual channels, and then any derived montages subsequently created. In a hardware demonstration system, the common mode rejection ratio (at 60 Hz) of bipolar montages improved from 35.2 ± 5.0 dB (prior to channel equalization) to 69.0 ± 5.0 dB (after equalization). PMID:17614134

The digital compensation technology system for automotive pressure sensor

NASA Astrophysics Data System (ADS)

Guo, Bin; Li, Quanling; Lu, Yi; Luo, Zai

2011-05-01

Piezoresistive pressure sensor be made of semiconductor silicon based on Piezoresistive phenomenon, has many characteristics. But since the temperature effect of semiconductor, the performance of silicon sensor is also changed by temperature, and the pressure sensor without temperature drift can not be produced at present. This paper briefly describe the principles of sensors, the function of pressure sensor and the various types of compensation method, design the detailed digital compensation program for automotive pressure sensor. Simulation-Digital mixed signal conditioning is used in this dissertation, adopt signal conditioning chip MAX1452. AVR singlechip ATMEGA128 and other apparatus; fulfill the design of digital pressure sensor hardware circuit and singlechip hardware circuit; simultaneously design the singlechip software; Digital pressure sensor hardware circuit is used to implementing the correction and compensation of sensor; singlechip hardware circuit is used to implementing to controll the correction and compensation of pressure sensor; singlechip software is used to implementing to fulfill compensation arithmetic. In the end, it implement to measure the output of sensor, and contrast to the data of non-compensation, the outcome indicates that the compensation precision of compensated sensor output is obviously better than non-compensation sensor, not only improving the compensation precision but also increasing the stabilization of pressure sensor.

Real Time Data Acquisition and Online Signal Processing for Magnetoencephalography

NASA Astrophysics Data System (ADS)

Rongen, H.; Hadamschek, V.; Schiek, M.

2006-06-01

To establish improved therapies for patients suffering from severe neurological and psychiatric diseases, a demand controlled and desynchronizing brain-pacemaker has been developed with techniques from statistical physics and nonlinear dynamics. To optimize the novel therapeutic approach, brain activity is investigated with a Magnetoencephalography (MEG) system prior to surgery. For this, a real time data acquisition system for a 148 channel MEG and online signal processing for artifact rejection, filtering, cross trial phase resetting analysis and three-dimensional (3-D) reconstruction of the cerebral current sources was developed. The developed PCI bus hardware is based on a FPGA and DSP design, using the benefits from both architectures. The reconstruction and visualization of the 3-D volume data is done by the PC which hosts the real time DAQ and pre-processing board. The framework of the MEG-online system is introduced and the architecture of the real time DAQ board and online reconstruction is described. In addition we show first results with the MEG-Online system for the investigation of dynamic brain activities in relation to external visual stimulation, based on test data sets.

Two examples of intelligent systems based on smart materials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Unsworth, J.

1994-12-31

Two intelligent systems are described which are based on smart materials. The operation of the systems also rely on conventional well known technologies such as electronics, signal conditioning, signal processing, microprocessors and engineering design. However without the smart materials the development and integration into the intelligent systems would not have been possible. System 1 is a partial discharge monitor for on-line continuous checking of the condition of electrical power transformers. The ultrasonic and radio frequency detectors in this system rely on special piezoelectric composite integrated with a compact annular metal ring. Partial discharges set up ultrasonic and radio frequency signalsmore » which are received by the integrated detectors. The signals are amplified, conditioned, signal processed, the time interval between the two signals measured and the level of partial discharge activity averaged and assessed for numerous pairs and alarms triggered on remote control panels if the level is dangerous. The system has the capability of initiating automatic shutdown of the transformer once it is linked into the control computers of the electrical power authority. System 2 is called a Security Cradle and is an intelligent 3D shield designed to use the properties of electro active polymers to prevent hardware hackers from stealing valuable of sensitive information from memory devices (e.g., EPROMS) housed in computer or microprocessor installations.« less

Design and implementation in VHDL code of the two-dimensional fast Fourier transform for frequency filtering, convolution and correlation operations

NASA Astrophysics Data System (ADS)

Vilardy, Juan M.; Giacometto, F.; Torres, C. O.; Mattos, L.

2011-01-01

The two-dimensional Fast Fourier Transform (FFT 2D) is an essential tool in the two-dimensional discrete signals analysis and processing, which allows developing a large number of applications. This article shows the description and synthesis in VHDL code of the FFT 2D with fixed point binary representation using the programming tool Simulink HDL Coder of Matlab; showing a quick and easy way to handle overflow, underflow and the creation registers, adders and multipliers of complex data in VHDL and as well as the generation of test bench for verification of the codes generated in the ModelSim tool. The main objective of development of the hardware architecture of the FFT 2D focuses on the subsequent completion of the following operations applied to images: frequency filtering, convolution and correlation. The description and synthesis of the hardware architecture uses the XC3S1200E family Spartan 3E FPGA from Xilinx Manufacturer.

An integrated dexterous robotic testbed for space applications

NASA Technical Reports Server (NTRS)

Li, Larry C.; Nguyen, Hai; Sauer, Edward

1992-01-01

An integrated dexterous robotic system was developed as a testbed to evaluate various robotics technologies for advanced space applications. The system configuration consisted of a Utah/MIT Dexterous Hand, a PUMA 562 arm, a stereo vision system, and a multiprocessing computer control system. In addition to these major subsystems, a proximity sensing system was integrated with the Utah/MIT Hand to provide capability for non-contact sensing of a nearby object. A high-speed fiber-optic link was used to transmit digitized proximity sensor signals back to the multiprocessing control system. The hardware system was designed to satisfy the requirements for both teleoperated and autonomous operations. The software system was designed to exploit parallel processing capability, pursue functional modularity, incorporate artificial intelligence for robot control, allow high-level symbolic robot commands, maximize reusable code, minimize compilation requirements, and provide an interactive application development and debugging environment for the end users. An overview is presented of the system hardware and software configurations, and implementation is discussed of subsystem functions.

Audio-based detection and evaluation of eating behavior using the smartwatch platform.

PubMed

Kalantarian, Haik; Sarrafzadeh, Majid

2015-10-01

In recent years, smartwatches have emerged as a viable platform for a variety of medical and health-related applications. In addition to the benefits of a stable hardware platform, these devices have a significant advantage over other wrist-worn devices, in that user acceptance of watches is higher than other custom hardware solutions. In this paper, we describe signal-processing techniques for identification of chews and swallows using a smartwatch device׳s built-in microphone. Moreover, we conduct a survey to evaluate the potential of the smartwatch as a platform for monitoring nutrition. The focus of this paper is to analyze the overall applicability of a smartwatch-based system for food-intake monitoring. Evaluation results confirm the efficacy of our technique; classification was performed between apple and potato chip bites, water swallows, talking, and ambient noise, with an F-measure of 94.5% based on 250 collected samples. Copyright © 2015 Elsevier Ltd. All rights reserved.

Development of an Advanced Hydraulic Fracture Mapping System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Norm Warpinski; Steve Wolhart; Larry Griffin

The project to develop an advanced hydraulic fracture mapping system consisted of both hardware and analysis components in an effort to build, field, and analyze combined data from tiltmeter and microseismic arrays. The hardware sections of the project included: (1) the building of new tiltmeter housings with feedthroughs for use in conjunction with a microseismic array, (2) the development of a means to use separate telemetry systems for the tilt and microseismic arrays, and (3) the selection and fabrication of an accelerometer sensor system to improve signal-to-noise ratios. The analysis sections of the project included a joint inversion for analysismore » and interpretation of combined tiltmeter and microseismic data and improved methods for extracting slippage planes and other reservoir information from the microseisms. In addition, testing was performed at various steps in the process to assess the data quality and problems/issues that arose during various parts of the project. A prototype array was successfully tested and a full array is now being fabricated for industrial use.« less

Design of PH sensor signal acquisition and display system

NASA Astrophysics Data System (ADS)

Qian, Huifa; Zhang, Quanzhu; Deng, Yonghong

2017-06-01

With the continuous development of sensor manufacturing technology, how to better deal with the signal is particularly important. PH value of the sensor voltage generated by the signal as a signal, through the MCU acquisition A / D conversion, and ultimately through the digital display of its PH value. The system uses hardware and software to achieve the results obtained with the high-precision PH meter to strive to improve the accuracy and reduce error.

Software defined radio (SDR) architecture for concurrent multi-satellite communications

NASA Astrophysics Data System (ADS)

Maheshwarappa, Mamatha R.

SDRs have emerged as a viable approach for space communications over the last decade by delivering low-cost hardware and flexible software solutions. The flexibility introduced by the SDR concept not only allows the realisation of concurrent multiple standards on one platform, but also promises to ease the implementation of one communication standard on differing SDR platforms by signal porting. This technology would facilitate implementing reconfigurable nodes for parallel satellite reception in Mobile/Deployable Ground Segments and Distributed Satellite Systems (DSS) for amateur radio/university satellite operations. This work outlines the recent advances in embedded technologies that can enable new communication architectures for concurrent multi-satellite or satellite-to-ground missions where multi-link challenges are associated. This research proposes a novel concept to run advanced parallelised SDR back-end technologies in a Commercial-Off-The-Shelf (COTS) embedded system that can support multi-signal processing for multi-satellite scenarios simultaneously. The initial SDR implementation could support only one receiver chain due to system saturation. However, the design was optimised to facilitate multiple signals within the limited resources available on an embedded system at any given time. This was achieved by providing a VHDL solution to the existing Python and C/C++ programming languages along with parallelisation so as to accelerate performance whilst maintaining the flexibility. The improvement in the performance was validated at every stage through profiling. Various cases of concurrent multiple signals with different standards such as frequency (with Doppler effect) and symbol rates were simulated in order to validate the novel architecture proposed in this research. Also, the architecture allows the system to be reconfigurable by providing the opportunity to change the communication standards in soft real-time. The chosen COTS solution provides a generic software methodology for both ground and space applications that will remain unaltered despite new evolutions in hardware, and supports concurrent multi-standard, multi-channel and multi-rate telemetry signals.

The Impact of Flight Hardware Scavenging on Space Logistics

NASA Technical Reports Server (NTRS)

Oeftering, Richard C.

2011-01-01

For a given fixed launch vehicle capacity the logistics payload delivered to the moon may be only roughly 20 percent of the payload delivered to the International Space Station (ISS). This is compounded by the much lower flight frequency to the moon and thus low availability of spares for maintenance. This implies that lunar hardware is much more scarce and more costly per kilogram than ISS and thus there is much more incentive to preserve hardware. The Constellation Lunar Surface System (LSS) program is considering ways of utilizing hardware scavenged from vehicles including the Altair lunar lander. In general, the hardware will have only had a matter of hours of operation yet there may be years of operational life remaining. By scavenging this hardware the program, in effect, is treating vehicle hardware as part of the payload. Flight hardware may provide logistics spares for system maintenance and reduce the overall logistics footprint. This hardware has a wide array of potential applications including expanding the power infrastructure, and exploiting in-situ resources. Scavenging can also be seen as a way of recovering the value of, literally, billions of dollars worth of hardware that would normally be discarded. Scavenging flight hardware adds operational complexity and steps must be taken to augment the crew s capability with robotics, capabilities embedded in flight hardware itself, and external processes. New embedded technologies are needed to make hardware more serviceable and scavengable. Process technologies are needed to extract hardware, evaluate hardware, reconfigure or repair hardware, and reintegrate it into new applications. This paper also illustrates how scavenging can be used to drive down the cost of the overall program by exploiting the intrinsic value of otherwise discarded flight hardware.

Research on distributed optical fiber sensing data processing method based on LabVIEW

NASA Astrophysics Data System (ADS)

Li, Zhonghu; Yang, Meifang; Wang, Luling; Wang, Jinming; Yan, Junhong; Zuo, Jing

2018-01-01

The pipeline leak detection and leak location problem have gotten extensive attention in the industry. In this paper, the distributed optical fiber sensing system is designed based on the heat supply pipeline. The data processing method of distributed optical fiber sensing based on LabVIEW is studied emphatically. The hardware system includes laser, sensing optical fiber, wavelength division multiplexer, photoelectric detector, data acquisition card and computer etc. The software system is developed using LabVIEW. The software system adopts wavelet denoising method to deal with the temperature information, which improved the SNR. By extracting the characteristic value of the fiber temperature information, the system can realize the functions of temperature measurement, leak location and measurement signal storage and inquiry etc. Compared with traditional negative pressure wave method or acoustic signal method, the distributed optical fiber temperature measuring system can measure several temperatures in one measurement and locate the leak point accurately. It has a broad application prospect.

High resolution ultrasonic spectroscopy system for nondestructive evaluation

NASA Technical Reports Server (NTRS)

Chen, C. H.

1991-01-01

With increased demand for high resolution ultrasonic evaluation, computer based systems or work stations become essential. The ultrasonic spectroscopy method of nondestructive evaluation (NDE) was used to develop a high resolution ultrasonic inspection system supported by modern signal processing, pattern recognition, and neural network technologies. The basic system which was completed consists of a 386/20 MHz PC (IBM AT compatible), a pulser/receiver, a digital oscilloscope with serial and parallel communications to the computer, an immersion tank with motor control of X-Y axis movement, and the supporting software package, IUNDE, for interactive ultrasonic evaluation. Although the hardware components are commercially available, the software development is entirely original. By integrating signal processing, pattern recognition, maximum entropy spectral analysis, and artificial neural network functions into the system, many NDE tasks can be performed. The high resolution graphics capability provides visualization of complex NDE problems. The phase 3 efforts involve intensive marketing of the software package and collaborative work with industrial sectors.

Software/hardware distributed processing network supporting the Ada environment

NASA Astrophysics Data System (ADS)

Wood, Richard J.; Pryk, Zen

1993-09-01

A high-performance, fault-tolerant, distributed network has been developed, tested, and demonstrated. The network is based on the MIPS Computer Systems, Inc. R3000 Risc for processing, VHSIC ASICs for high speed, reliable, inter-node communications and compatible commercial memory and I/O boards. The network is an evolution of the Advanced Onboard Signal Processor (AOSP) architecture. It supports Ada application software with an Ada- implemented operating system. A six-node implementation (capable of expansion up to 256 nodes) of the RISC multiprocessor architecture provides 120 MIPS of scalar throughput, 96 Mbytes of RAM and 24 Mbytes of non-volatile memory. The network provides for all ground processing applications, has merit for space-qualified RISC-based network, and interfaces to advanced Computer Aided Software Engineering (CASE) tools for application software development.

Real-time object tracking based on scale-invariant features employing bio-inspired hardware.

PubMed

Yasukawa, Shinsuke; Okuno, Hirotsugu; Ishii, Kazuo; Yagi, Tetsuya

2016-09-01

We developed a vision sensor system that performs a scale-invariant feature transform (SIFT) in real time. To apply the SIFT algorithm efficiently, we focus on a two-fold process performed by the visual system: whole-image parallel filtering and frequency-band parallel processing. The vision sensor system comprises an active pixel sensor, a metal-oxide semiconductor (MOS)-based resistive network, a field-programmable gate array (FPGA), and a digital computer. We employed the MOS-based resistive network for instantaneous spatial filtering and a configurable filter size. The FPGA is used to pipeline process the frequency-band signals. The proposed system was evaluated by tracking the feature points detected on an object in a video. Copyright © 2016 Elsevier Ltd. All rights reserved.

A complexity-scalable software-based MPEG-2 video encoder.

PubMed

Chen, Guo-bin; Lu, Xin-ning; Wang, Xing-guo; Liu, Ji-lin

2004-05-01

With the development of general-purpose processors (GPP) and video signal processing algorithms, it is possible to implement a software-based real-time video encoder on GPP, and its low cost and easy upgrade attract developers' interests to transfer video encoding from specialized hardware to more flexible software. In this paper, the encoding structure is set up first to support complexity scalability; then a lot of high performance algorithms are used on the key time-consuming modules in coding process; finally, at programming level, processor characteristics are considered to improve data access efficiency and processing parallelism. Other programming methods such as lookup table are adopted to reduce the computational complexity. Simulation results showed that these ideas could not only improve the global performance of video coding, but also provide great flexibility in complexity regulation.

Implementation of Bluetooth technology in processing aspheric mirrors

NASA Astrophysics Data System (ADS)

Chen, Dong-yun; Li, Xiao-jin

2010-10-01

This paper adopts the Bluetooth wireless transmission to replace the conducting rings currently using in the active lap process to overcome the cost and abrasion problems brought by the conducting rings, which has great significance for reducing the costs of processing large aspheric mirrors. Based on the actual application requirements, Article proposes the overall program of using Bluetooth technology as data transmission, including the active lap-side and machine tool-side: In the machine tool-side, the MCU separately connects with Bluetooth module and the sensor via UART0 and UART1 serial port, and when the MCU receives the signals sending from the sensor, the MCU packs and then sends them through the Bluetooth module; while in the active lap side, the CCAL reads-out the position signals of sensor detecting in dual-port memory via one-side ports, and the other side ports connect with the MCU's high ports P4-P7, so the MCU can unpacks and stores the position signals receiving via Bluetooth module. This paper designs and implements the system's hardware circuit, and mainly introduces the ways of serial and parallel. Based upon the realized system, design the test program for the Bluetooth wireless transmission and the experiment results, in the condition of the active lap processing large aspheric mirrors, showed that Bluetooth technology can meet the requirements of practical applications.

Real-Time GPS-Alternative Navigation Using Commodity Hardware

DTIC Science & Technology

2007-06-01

4.1 Test Plan and Setup ..............................................................................................84 4.1.1 Component and...improvements planned , the most influential for navigation are additional signals, frequencies, and improved signal strength. These improvements will... planned and implemented to provide maximum extensibility for additional sensors and functionality without disturbing the core GPU-accelerated

Development of ROACH firmware for microwave multiplexed X-ray TES microcalorimeters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Madden, T. J.; Cecil, T. W.; Gades, L. M.

We are developing room temperature electronics based upon the ROACH platform for reading out microwave multiplexed X-ray TES. ROACH is an open-source hardware and software platform featuring a large Xilinx Field Programmable Gate Array (FPGA), Power PC processor, several 10GB Ethernet SFP+ interfaces, and a collection of daughter boards for analog signal generation and acquisition. The combination of a ROACH board, ADC/DAC conversion daughter boards, and hardware for RF mixing allows for the generation and capture of multiple RF tones for reading out microwave multiplexed x-ray TES microcalorimeters. The FPGA is used to generate multiple tones in base band, frommore » 10MHz to 250MHz, which are subsequently mixed to RF in the multiple GHz range and sent through the microwave multiplexer. The tones are generated in the FPGA by storing a large lookup table in Quad Data Rate (QDR) SRAM modules and playing out the waveform to a DAC board. Once the signal has been modulated to RF, passed through the microwave multiplexer, and has been modulated back to base band, the signal is digitized by an ADC board. The tones are modulated to 0Hz by using a FPGA circuit consisting of a polyphase filter bank, several Xilinx FFT blocks, Xilinx CORDIC blocks (for converting to magnitude and phase), and special phase accumulator circuit for mixing to exactly 0Hz. Upwards of 256 channels can be simultaneously captured and written into a bank of 256 First-In-First-Out (FIFO) memories, with each FIFO corresponding to a channel. Individual channel data can be further processed in the FPGA before being streamed through a 10GB Ethernet fiber-optic interface to a Linux system. The Linux system runs software written in Python and QT C++ for controlling the ROACH system, capturing data, and processing data.« less

Windowing technique in FM radar realized by FPGA for better target resolution

NASA Astrophysics Data System (ADS)

Ponomaryov, Volodymyr I.; Escamilla-Hernandez, Enrique; Kravchenko, Victor F.

2006-09-01

Remote sensing systems, such as SAR usually apply FM signals to resolve nearly placed targets (objects) and improve SNR. Main drawbacks in the pulse compression of FM radar signal that it can add the range side-lobes in reflectivity measurements. Using weighting window processing in time domain it is possible to decrease significantly the side-lobe level (SLL) of output radar signal that permits to resolve small or low power targets those are masked by powerful ones. There are usually used classical windows such as Hamming, Hanning, Blackman-Harris, Kaiser-Bessel, Dolph-Chebyshev, Gauss, etc. in window processing. Additionally to classical ones in here we also use a novel class of windows based on atomic functions (AF) theory. For comparison of simulation and experimental results we applied the standard parameters, such as coefficient of amplification, maximum level of side-lobe, width of main lobe, etc. In this paper we also proposed to implement the compression-windowing model on a hardware level employing Field Programmable Gate Array (FPGA) that offers some benefits like instantaneous implementation, dynamic reconfiguration, design, and field programmability. It has been investigated the pulse compression design on FPGA applying classical and novel window technique to reduce the SLL in absence and presence of noise. The paper presents simulated and experimental examples of detection of small or nearly placed targets in the imaging radar. Paper also presents the experimental hardware results of windowing in FM radar demonstrating resolution of the several targets for classical rectangular, Hamming, Kaiser-Bessel, and some novel ones: Up(x), fup 4(x)•D 3(x), fup 6(x)•G 3(x), etc. It is possible to conclude that windows created on base of the AFs offer better decreasing of the SLL in cases of presence or absence of noise and when we move away of the main lobe in comparison with classical windows.

Interchangeable end effector tools utilized on the PFMA

NASA Technical Reports Server (NTRS)

Cody, Joe; Carroll, John; Crow, George; Gierow, Paul; Littles, Jay; Maness, Michael; Morrison, Jim

1992-01-01

An instrumented task board, used for measuring forces applied by the Protoflight Manipulator Arm (PFMA) to the task board, was fabricated and delivered to Marshall Space Flight Center. SRS Technologies phased out the existing IBM compatible data acquisition system, used with a instrumented task board, and integrated the force measuring electronic hardware in with the Macintosh II data acquisition system. The purpose of this change was to acquire all data with the same time tag, allowing easier and more accurate data reduction in addition to real-time graphics. A three-dimensional optical position sensing system for determining the location of the PFMA's end effect or in reference to the center of the instrumented task board was also designed and delivered under. An improved task board was fabricated which included an improved instrumented beam design. The modified design of the task board improved the force/torque measurement system by increasing the sensitivity, reliability, load range and ease of maintenance. A calibration panel for the optical position system was also designed and fabricated. The calibration method developed for the position sensors enhanced the performance of the sensors as well as simplified the installation and calibration procedures required. The modifications made under this effort expanded the capabilities of the task board system. The system developed determines the arm's position relative to the task board and measures the signals to the joints resulting from the operator's control signals in addition to the task board forces. The software and hardware required to calculate and record the position of the PFMA during the performance of tasks with the instrumented task board were defined, designed and delivered to MSFC. PFMA joint input signals can be measured from a breakout box to evaluate the sensitivity or response of the arm operation to control commands. The data processing system provides the capability for post processing of time-history graphics and plots of the PFMA positions, the operator's actions, and the PFMA servo reactions in addition to realtime force and position sensor data presentation.

Interchangeable end effector tools utilized on the PFMA

NASA Astrophysics Data System (ADS)

Cody, Joe; Carroll, John; Crow, George; Gierow, Paul; Littles, Jay; Maness, Michael; Morrison, Jim

1992-02-01

An instrumented task board, used for measuring forces applied by the Protoflight Manipulator Arm (PFMA) to the task board, was fabricated and delivered to Marshall Space Flight Center. SRS Technologies phased out the existing IBM compatible data acquisition system, used with a instrumented task board, and integrated the force measuring electronic hardware in with the Macintosh II data acquisition system. The purpose of this change was to acquire all data with the same time tag, allowing easier and more accurate data reduction in addition to real-time graphics. A three-dimensional optical position sensing system for determining the location of the PFMA's end effect or in reference to the center of the instrumented task board was also designed and delivered under. An improved task board was fabricated which included an improved instrumented beam design. The modified design of the task board improved the force/torque measurement system by increasing the sensitivity, reliability, load range and ease of maintenance. A calibration panel for the optical position system was also designed and fabricated. The calibration method developed for the position sensors enhanced the performance of the sensors as well as simplified the installation and calibration procedures required. The modifications made under this effort expanded the capabilities of the task board system. The system developed determines the arm's position relative to the task board and measures the signals to the joints resulting from the operator's control signals in addition to the task board forces. The software and hardware required to calculate and record the position of the PFMA during the performance of tasks with the instrumented task board were defined, designed and delivered to MSFC. PFMA joint input signals can be measured from a breakout box to evaluate the sensitivity or response of the arm operation to control commands. The data processing system provides the capability for post processing of time-history graphics and plots of the PFMA positions, the operator's actions, and the PFMA servo reactions in addition to realtime force and position sensor data presentation.

Reconfigurable Transceiver and Software-Defined Radio Architecture and Technology Evaluated for NASA Space Communications

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Kacpura, Thomas J.

2004-01-01

The NASA Glenn Research Center is investigating the development and suitability of a software-based open-architecture for space-based reconfigurable transceivers (RTs) and software-defined radios (SDRs). The main objectives of this project are to enable advanced operations and reduce mission costs. SDRs are becoming more common because of the capabilities of reconfigurable digital signal processing technologies such as field programmable gate arrays and digital signal processors, which place radio functions in firmware and software that were traditionally performed with analog hardware components. Features of interest of this communications architecture include nonproprietary open standards and application programming interfaces to enable software reuse and portability, independent hardware and software development, and hardware and software functional separation. The goals for RT and SDR technologies for NASA space missions include prelaunch and on-orbit frequency and waveform reconfigurability and programmability, high data rate capability, and overall communications and processing flexibility. These operational advances over current state-of-art transceivers will be provided to reduce the power, mass, and cost of RTs and SDRs for space communications. The open architecture for NASA communications will support existing (legacy) communications needs and capabilities while providing a path to more capable, advanced waveform development and mission concepts (e.g., ad hoc constellations with self-healing networks and high-rate science data return). A study was completed to assess the state of the art in RT architectures, implementations, and technologies. In-house researchers conducted literature searches and analysis, interviewed Government and industry contacts, and solicited information and white papers from industry on space-qualifiable RTs and SDRs and their associated technologies for space-based NASA applications. The white papers were evaluated, compiled, and used to assess RT and SDR system architectures and core technology elements to determine an appropriate investment strategy to advance these technologies to meet future mission needs. The use of these radios in the space environment represents a challenge because of the space radiation suitability of the components, which drastically reduces the processing capability. The radios available for space are considered to be RTs (as opposed to SDRs), which are digitally programmable radios with selectable changes from an architecture combining analog and digital components. The limited flexibility of this design contrasts against the desire to have a power-efficient solution and open architecture.

The high accuracy data processing system of laser interferometry signals based on MSP430

NASA Astrophysics Data System (ADS)

Qi, Yong-yue; Lin, Yu-chi; Zhao, Mei-rong

2009-07-01

Generally speaking there are two orthogonal signals used in single-frequency laser interferometer for differentiating direction and electronic subdivision. However there usually exist three errors with the interferential signals: zero offsets error, unequal amplitude error and quadrature phase shift error. These three errors have a serious impact on subdivision precision. Based on Heydemann error compensation algorithm, it is proposed to achieve compensation of the three errors. Due to complicated operation of the Heydemann mode, a improved arithmetic is advanced to decrease the calculating time effectively in accordance with the special characteristic that only one item of data will be changed in each fitting algorithm operation. Then a real-time and dynamic compensatory circuit is designed. Taking microchip MSP430 as the core of hardware system, two input signals with the three errors are turned into digital quantity by the AD7862. After data processing in line with improved arithmetic, two ideal signals without errors are output by the AD7225. At the same time two original signals are turned into relevant square wave and imported to the differentiating direction circuit. The impulse exported from the distinguishing direction circuit is counted by the timer of the microchip. According to the number of the pulse and the soft subdivision the final result is showed by LED. The arithmetic and the circuit are adopted to test the capability of a laser interferometer with 8 times optical path difference and the measuring accuracy of 12-14nm is achieved.

Hardware acceleration and verification of systems designed with hardware description languages (HDL)

NASA Astrophysics Data System (ADS)

Wisniewski, Remigiusz; Wegrzyn, Marek

2005-02-01

Hardware description languages (HDLs) allow creating bigger and bigger designs nowadays. The size of prototyped systems very often exceeds million gates. Therefore verification process of the designs takes several hours or even days. The solution for this problem can be solved by hardware acceleration of simulation.

Man-Portable Simultaneous Magnetometer and EM System (MSEMS)

DTIC Science & Technology

2008-12-01

expensive fluxgate magnetometers . This is because the interleaving hardware is expecting a Larmor signal as input; it performs period counting of the...Larmor signal between EM61 pulses to convert the frequency-based Larmor signal into nanotesla. A fluxgate magnetometer does not employ the resonance...FINAL REPORT Man-Portable Simultaneous Magnetometer and EM System (MSEMS) ESTCP Project MM-0414 December 2008 Robert Siegel Science

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, William H.

2017-01-01

Software Defined Radio is an industry term describing a method of utilizing a minimum amount of Radio Frequency (RF)/analog electronics before digitization takes place. Upon digitization all other functions are performed in software/firmware. There are as many different types of SDRs as there are data systems. Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. This presentation will show how the emerging SDR market has leveraged the existing commercial sector to provide a path to a radiation tolerant SDR transponder. These innovations will reduce the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. A second pay-off is the increased flexibility of the SDR by allowing the same hardware to implement multiple transponder types by altering hardware logic - no change of analog hardware is required - all of which can be ultimately accomplished in orbit. This in turn would provide high capability and low cost transponder to programs of all sizes.

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, Herb

2017-01-01

Software Defined Radio is an industry term describing a method of utilizing a minimum amount of Radio Frequency (RF)/analog electronics before digitization takes place. Upon digitization all other functions are performed in software/firmware. There are as many different types of SDRs as there are data systems. Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. This presentation will show how the emerging SDR market has leveraged the existing commercial sector to provide a path to a radiation tolerant SDR transponder. These innovations will reduce the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. A second pay-off is the increased flexibility of the SDR by allowing the same hardware to implement multiple transponder types by altering hardware logic - no change of analog hardware is required - all of which can be ultimately accomplished in orbit. This in turn would provide high capability and low cost transponder to programs of all sizes

Acoustic Source Localization via Time Difference of Arrival Estimation for Distributed Sensor Networks Using Tera-Scale Optical Core Devices

DOE PAGES

Imam, Neena; Barhen, Jacob

2009-01-01

For real-time acoustic source localization applications, one of the primary challenges is the considerable growth in computational complexity associated with the emergence of ever larger, active or passive, distributed sensor networks. These sensors rely heavily on battery-operated system components to achieve highly functional automation in signal and information processing. In order to keep communication requirements minimal, it is desirable to perform as much processing on the receiver platforms as possible. However, the complexity of the calculations needed to achieve accurate source localization increases dramatically with the size of sensor arrays, resulting in substantial growth of computational requirements that cannot bemore » readily met with standard hardware. One option to meet this challenge builds upon the emergence of digital optical-core devices. The objective of this work was to explore the implementation of key building block algorithms used in underwater source localization on the optical-core digital processing platform recently introduced by Lenslet Inc. This demonstration of considerably faster signal processing capability should be of substantial significance to the design and innovation of future generations of distributed sensor networks.« less

Optimization of the coherence function estimation for multi-core central processing unit

NASA Astrophysics Data System (ADS)

Cheremnov, A. G.; Faerman, V. A.; Avramchuk, V. S.

2017-02-01

The paper considers use of parallel processing on multi-core central processing unit for optimization of the coherence function evaluation arising in digital signal processing. Coherence function along with other methods of spectral analysis is commonly used for vibration diagnosis of rotating machinery and its particular nodes. An algorithm is given for the function evaluation for signals represented with digital samples. The algorithm is analyzed for its software implementation and computational problems. Optimization measures are described, including algorithmic, architecture and compiler optimization, their results are assessed for multi-core processors from different manufacturers. Thus, speeding-up of the parallel execution with respect to sequential execution was studied and results are presented for Intel Core i7-4720HQ и AMD FX-9590 processors. The results show comparatively high efficiency of the optimization measures taken. In particular, acceleration indicators and average CPU utilization have been significantly improved, showing high degree of parallelism of the constructed calculating functions. The developed software underwent state registration and will be used as a part of a software and hardware solution for rotating machinery fault diagnosis and pipeline leak location with acoustic correlation method.

A novel visual hardware behavioral language

NASA Technical Reports Server (NTRS)

Li, Xueqin; Cheng, H. D.

1992-01-01

Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

Field Programmable Gate Array Reliability Analysis Guidelines for Launch Vehicle Reliability Block Diagrams

NASA Technical Reports Server (NTRS)

Al Hassan, Mohammad; Britton, Paul; Hatfield, Glen Spencer; Novack, Steven D.

2017-01-01

Field Programmable Gate Arrays (FPGAs) integrated circuits (IC) are one of the key electronic components in today's sophisticated launch and space vehicle complex avionic systems, largely due to their superb reprogrammable and reconfigurable capabilities combined with relatively low non-recurring engineering costs (NRE) and short design cycle. Consequently, FPGAs are prevalent ICs in communication protocols and control signal commands. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

Structural Health Monitoring Analysis for the Orbiter Wing Leading Edge

NASA Technical Reports Server (NTRS)

Yap, Keng C.

2010-01-01

This viewgraph presentation reviews Structural Health Monitoring Analysis for the Orbiter Wing Leading Edge. The Wing Leading Edge Impact Detection System (WLE IDS) and the Impact Analysis Process are also described to monitor WLE debris threats. The contents include: 1) Risk Management via SHM; 2) Hardware Overview; 3) Instrumentation; 4) Sensor Configuration; 5) Debris Hazard Monitoring; 6) Ascent Response Summary; 7) Response Signal; 8) Distribution of Flight Indications; 9) Probabilistic Risk Analysis (PRA); 10) Model Correlation; 11) Impact Tests; 12) Wing Leading Edge Modeling; 13) Ascent Debris PRA Results; and 14) MM/OD PRA Results.

Effects of pulse width and coding on radar returns from clear air

NASA Technical Reports Server (NTRS)

Cornish, C. R.

1983-01-01

In atmospheric radar studies it is desired to obtain maximum information about the atmosphere and to use efficiently the radar transmitter and processing hardware. Large pulse widths are used to increase the signal to noise ratio since clear air returns are generally weak and maximum height coverage is desired. Yet since good height resolution is equally important, pulse compression techniques such as phase coding are employed to optimize the average power of the transmitter. Considerations in implementing a coding scheme and subsequent effects of an impinging pulse on the atmosphere are investigated.

Overview of the CLIC detector and its physics potential

NASA Astrophysics Data System (ADS)

Ström, Rickard

2017-12-01

The CLIC detector and physics study (CLICdp) is an international collaboration that investigates the physics potential of the Compact Linear Collider (CLIC). CLIC is a high-energy electron-positron collider under development, aiming for centre-of-mass energies from a few hundred GeV to 3 TeV. In addition to physics studies based on full Monte Carlo simulations of signal and background processes, CLICdp performs cuttingedge hardware R&D. In this contribution CLICdp will present recent results from physics prospect studies, emphasising Higgs studies. Additionally the new CLIC detector model and the recently updated CLIC baseline staging scenario will be presented.

Design and development of a multibeam 1.4 GHz pushbroom microwave radiometer

NASA Technical Reports Server (NTRS)

Lawrence, R. W.; Bailey, M. C.; Harrington, R. F.; Hearn, C. P.; Wells, J. G.; Stanley, W. D.

1986-01-01

The design and operation of a multiple beam, digital signal processing radiometer are discussed. The discussion includes a brief description of each major subsystem and an overall explanation of the hardware requirements and operation. A series of flight tests was conducted in which sea-truth sites, as well as an existing radiometer were used to verify the Pushbroom Radiometer performance. The results of these tests indicate that the Pushbroom Radiometer did meet the sensitivity design goal of 1.0 kelvin, and exceeded the accuracy requirement of 2.0 kelvin. Additional performance characteristics and test results are also presented.

Development of dual sensor hand-held detector

NASA Astrophysics Data System (ADS)

Sezgin, Mehmet

2010-04-01

In this paper hand-held dual sensor detector development requirements are considered dedicated to buried object detection. Design characteristics of such a system are categorized and listed. Hardware and software structures, ergonomics, user interface, environmental and EMC/EMI tests to be applied and performance test issues are studied. Main properties of the developed system (SEZER) are presented, which contains Metal Detector (MD) and Ground Penetrating Radar (GPR). The realized system has ergonomic structure and can detect both metallic and non-metallic buried objects. Moreover classification of target is possible if it was defined to the signal processing software in learning phase.

Rotational fluid flow experiment

NASA Technical Reports Server (NTRS)

1991-01-01

This project which began in 1986 as part of the Worcester Polytechnic Institute (WPI) Advanced Space Design Program focuses on the design and implementation of an electromechanical system for studying vortex behavior in a microgravity environment. Most of the existing equipment was revised and redesigned by this project team, as necessary. Emphasis was placed on documentation and integration of the electrical and mechanical subsystems. Project results include reconfiguration and thorough testing of all hardware subsystems, implementation of an infrared gas entrainment detector, new signal processing circuitry for the ultrasonic fluid circulation device, improved prototype interface circuits, and software for overall control of experiment operation.

[Research on a non-invasive pulse wave detection and analysis system].

PubMed

Li, Ting; Yu, Gang

2008-10-01

A novel non-invasive pulse wave detection and analysis system has been developed, including the software and the hardware. Bi-channel signals can be acquired, stored and shown on the screen dynamically at the same time. Pulse wave can be reshown and printed after pulse wave analysis and pulse wave velocity analysis. This system embraces a computer which is designed for fast data saving, analyzing and processing, and a portable data sampling machine which is based on a singlechip. Experimental results have shown that the system is stable and easy to use, and the parameters are calculated accurately.

Solar wind monitor—a school geophysics project

NASA Astrophysics Data System (ADS)

Robinson, Ian

2018-05-01

Described is an established geophysics project to construct a solar wind monitor based on a nT resolution fluxgate magnetometer. Low-cost and appropriate from school to university level it incorporates elements of astrophysics, geophysics, electronics, programming, computer networking and signal processing. The system monitors the earth’s field in real-time uploading data and graphs to a website every few minutes. Modular design encourages construction and testing by teams of students as well as expansion and refinement. The system has been tested running unattended for months at a time. Both the hardware design and software is published as open-source [1, 10].

A portable detection instrument based on DSP for beef marbling

NASA Astrophysics Data System (ADS)

Zhou, Tong; Peng, Yankun

2014-05-01

Beef marbling is one of the most important indices to assess beef quality. Beef marbling is graded by the measurement of the fat distribution density in the rib-eye region. However quality grades of beef in most of the beef slaughtering houses and businesses depend on trainees using their visual senses or comparing the beef slice to the Chinese standard sample cards. Manual grading demands not only great labor but it also lacks objectivity and accuracy. Aiming at the necessity of beef slaughtering houses and businesses, a beef marbling detection instrument was designed. The instrument employs Charge-coupled Device (CCD) imaging techniques, digital image processing, Digital Signal Processor (DSP) control and processing techniques and Liquid Crystal Display (LCD) screen display techniques. The TMS320DM642 digital signal processor of Texas Instruments (TI) is the core that combines high-speed data processing capabilities and real-time processing features. All processes such as image acquisition, data transmission, image processing algorithms and display were implemented on this instrument for a quick, efficient, and non-invasive detection of beef marbling. Structure of the system, working principle, hardware and software are introduced in detail. The device is compact and easy to transport. The instrument can determine the grade of beef marbling reliably and correctly.

Research of processes of reception and analysis of dynamic digital medical images in hardware/software complexes used for diagnostics and treatment of cardiovascular diseases

NASA Astrophysics Data System (ADS)

Karmazikov, Y. V.; Fainberg, E. M.

2005-06-01

Work with DICOM compatible equipment integrated into hardware and software systems for medical purposes has been considered. Structures of process of reception and translormation of the data are resulted by the example of digital rentgenography and angiography systems, included in hardware-software complex DIMOL-IK. Algorithms of reception and the analysis of the data are offered. Questions of the further processing and storage of the received data are considered.

A Channelization-Based DOA Estimation Method for Wideband Signals

PubMed Central

Guo, Rui; Zhang, Yue; Lin, Qianqiang; Chen, Zengping

2016-01-01

In this paper, we propose a novel direction of arrival (DOA) estimation method for wideband signals with sensor arrays. The proposed method splits the wideband array output into multiple frequency sub-channels and estimates the signal parameters using a digital channelization receiver. Based on the output sub-channels, a channelization-based incoherent signal subspace method (Channelization-ISM) and a channelization-based test of orthogonality of projected subspaces method (Channelization-TOPS) are proposed. Channelization-ISM applies narrowband signal subspace methods on each sub-channel independently. Then the arithmetic mean or geometric mean of the estimated DOAs from each sub-channel gives the final result. Channelization-TOPS measures the orthogonality between the signal and the noise subspaces of the output sub-channels to estimate DOAs. The proposed channelization-based method isolates signals in different bandwidths reasonably and improves the output SNR. It outperforms the conventional ISM and TOPS methods on estimation accuracy and dynamic range, especially in real environments. Besides, the parallel processing architecture makes it easy to implement on hardware. A wideband digital array radar (DAR) using direct wideband radio frequency (RF) digitization is presented. Experiments carried out in a microwave anechoic chamber with the wideband DAR are presented to demonstrate the performance. The results verify the effectiveness of the proposed method. PMID:27384566

SSME Main Combustion Chamber (MCC) hot oil dewaxing

NASA Technical Reports Server (NTRS)

Akpati, Anthony U.

1995-01-01

In an attempt to comply with the changing environmental regulations, a process was developed for the replacement of perchloroethylene in the dewaxing of the Space Shuttle Main Engine (SSME) Main Combustion Chamber (MCC) and other associated hardware filled with the Rigidax (R) casting compound. Rigidax (R) is a hard blue-dyed, calcium carbonate filled thermoplastic casting compound (melting point 77 C) that is melted and poured into hardware cavities to prevent contamination during material removal processes, i.e. machining, grinding, drilling, and deburring. Additionally, it serves as a maskant for designated areas during electroforming processes. Laboratory testing was conducted to evaluate seven alternate fluids for the replacement of perchloroethylene in the dewaxing process. Based upon successful laboratory results, a mineral oil was selected for testing on actual hardware. The final process developed involves simultaneous immersion and flushing of the MCC channels using a distinct eight stage process. A nonvolatile hydrocarbon analysis of a solvent flush sample is performed to determine the hardware cleanliness for comparison to the previous perchloroethylene dewaxing process.

SSME Main Combustion Chamber (MCC) 'Hot Oil' Dewaxing

NASA Technical Reports Server (NTRS)

Akpati, Anthony U.

1994-01-01

In an attempt to comply with the changing environmental regulations, a process was developed for the replacement of perchloroethylene in the dewaxing of the Space Shuttle Main Engine (SSME) Main Combustion Chamber (MCC) and other associated hardware filled with the Rigidax(registered mark) casting compound. Rigidax(registered mark) is a hard blue-dyed, calcium carbonate filled thermoplastic casting compound (melting point 77 C) that is melted and poured into hardware cavities to prevent contamination during material removal processes, i.e. machining, grinding, drilling, and deburring. Additionally, it serves as a maskant for designated areas during electroforming processes. Laboratory testing was conducted to evaluate seven alternate fluids for the replacement of perchloroethylene in the dewaxing process. Based upon successful laboratory results, a mineral oil was selected for testing on actual hardware. The final process developed involves simultaneous immersion and flushing of the MCC channels using a distinct eight stage process. A nonvolatile hydrocarbon analysis of a solvent flush sample is performed to determine the hardware cleanliness for comparison to the previous perchloroethylene dewaxing process.

Field programmable gate array based fuzzy neural signal processing system for differential diagnosis of QRS complex tachycardia and tachyarrhythmia in noisy ECG signals.

PubMed

Chowdhury, Shubhajit Roy

2012-04-01

The paper reports of a Field Programmable Gate Array (FPGA) based embedded system for detection of QRS complex in a noisy electrocardiogram (ECG) signal and thereafter differential diagnosis of tachycardia and tachyarrhythmia. The QRS complex has been detected after application of entropy measure of fuzziness to build a detection function of ECG signal, which has been previously filtered to remove power line interference and base line wander. Using the detected QRS complexes, differential diagnosis of tachycardia and tachyarrhythmia has been performed. The entire algorithm has been realized in hardware on an FPGA. Using the standard CSE ECG database, the algorithm performed highly effectively. The performance of the algorithm in respect of QRS detection with sensitivity (Se) of 99.74% and accuracy of 99.5% is achieved when tested using single channel ECG with entropy criteria. The performance of the QRS detection system has been compared and found to be better than most of the QRS detection systems available in literature. Using the system, 200 patients have been diagnosed with an accuracy of 98.5%.

A Procedural Electroencephalogram Simulator for Evaluation of Anesthesia Monitors.

PubMed

Petersen, Christian Leth; Görges, Matthias; Massey, Roslyn; Dumont, Guy Albert; Ansermino, J Mark

2016-11-01

Recent research and advances in the automation of anesthesia are driving the need to better understand electroencephalogram (EEG)-based anesthesia end points and to test the performance of anesthesia monitors. This effort is currently limited by the need to collect raw EEG data directly from patients. A procedural method to synthesize EEG signals was implemented in a mobile software application. The application is capable of sending the simulated signal to an anesthesia depth of hypnosis monitor. Systematic sweeps of the simulator generate functional monitor response profiles reminiscent of how network analyzers are used to test electronic components. Three commercial anesthesia monitors (Entropy, NeuroSENSE, and BIS) were compared with this new technology, and significant response and feature variations between the monitor models were observed; this includes reproducible, nonmonotonic apparent multistate behavior and significant hysteresis at light levels of anesthesia. Anesthesia monitor response to a procedural simulator can reveal significant differences in internal signal processing algorithms. The ability to synthesize EEG signals at different anesthetic depths potentially provides a new method for systematically testing EEG-based monitors and automated anesthesia systems with all sensor hardware fully operational before human trials.

Shuttle/TDRSS Ku-band downlink study

NASA Technical Reports Server (NTRS)

Meyer, R.

1976-01-01

Assessing the adequacy of the baseline signal design approach, developing performance specifications for the return link hardware, and performing detailed design and parameter optimization tasks was accomplished by completing five specific study tasks. The results of these tasks show that the basic signal structure design is sound and that the goals can be met. Constraints placed on return link hardware by this structure allow reasonable specifications to be written so that no extreme technical risk areas in equipment design are foreseen. A third channel can be added to the PM mode without seriously degrading the other services. The feasibility of using only a PM mode was shown to exist, however, this will require use of some digital TV transmission techniques. Each task and its results are summarized.

A neuromorphic network for generic multivariate data classification

PubMed Central

Schmuker, Michael; Pfeil, Thomas; Nawrot, Martin Paul

2014-01-01

Computational neuroscience has uncovered a number of computational principles used by nervous systems. At the same time, neuromorphic hardware has matured to a state where fast silicon implementations of complex neural networks have become feasible. En route to future technical applications of neuromorphic computing the current challenge lies in the identification and implementation of functional brain algorithms. Taking inspiration from the olfactory system of insects, we constructed a spiking neural network for the classification of multivariate data, a common problem in signal and data analysis. In this model, real-valued multivariate data are converted into spike trains using “virtual receptors” (VRs). Their output is processed by lateral inhibition and drives a winner-take-all circuit that supports supervised learning. VRs are conveniently implemented in software, whereas the lateral inhibition and classification stages run on accelerated neuromorphic hardware. When trained and tested on real-world datasets, we find that the classification performance is on par with a naïve Bayes classifier. An analysis of the network dynamics shows that stable decisions in output neuron populations are reached within less than 100 ms of biological time, matching the time-to-decision reported for the insect nervous system. Through leveraging a population code, the network tolerates the variability of neuronal transfer functions and trial-to-trial variation that is inevitably present on the hardware system. Our work provides a proof of principle for the successful implementation of a functional spiking neural network on a configurable neuromorphic hardware system that can readily be applied to real-world computing problems. PMID:24469794

Known-plaintext attack on the double phase encoding and its implementation with parallel hardware

NASA Astrophysics Data System (ADS)

Wei, Hengzheng; Peng, Xiang; Liu, Haitao; Feng, Songlin; Gao, Bruce Z.

2008-03-01

A known-plaintext attack on the double phase encryption scheme implemented with parallel hardware is presented. The double random phase encoding (DRPE) is one of the most representative optical cryptosystems developed in mid of 90's and derives quite a few variants since then. Although the DRPE encryption system has a strong power resisting to a brute-force attack, the inherent architecture of DRPE leaves a hidden trouble due to its linearity nature. Recently the real security strength of this opto-cryptosystem has been doubted and analyzed from the cryptanalysis point of view. In this presentation, we demonstrate that the optical cryptosystems based on DRPE architecture are vulnerable to known-plain text attack. With this attack the two encryption keys in the DRPE can be accessed with the help of the phase retrieval technique. In our approach, we adopt hybrid input-output algorithm (HIO) to recover the random phase key in the object domain and then infer the key in frequency domain. Only a plaintext-ciphertext pair is sufficient to create vulnerability. Moreover this attack does not need to select particular plaintext. The phase retrieval technique based on HIO is an iterative process performing Fourier transforms, so it fits very much into the hardware implementation of the digital signal processor (DSP). We make use of the high performance DSP to accomplish the known-plaintext attack. Compared with the software implementation, the speed of the hardware implementation is much fast. The performance of this DSP-based cryptanalysis system is also evaluated.

Robustness of spiking Deep Belief Networks to noise and reduced bit precision of neuro-inspired hardware platforms.

PubMed

Stromatias, Evangelos; Neil, Daniel; Pfeiffer, Michael; Galluppi, Francesco; Furber, Steve B; Liu, Shih-Chii

2015-01-01

Increasingly large deep learning architectures, such as Deep Belief Networks (DBNs) are the focus of current machine learning research and achieve state-of-the-art results in different domains. However, both training and execution of large-scale Deep Networks require vast computing resources, leading to high power requirements and communication overheads. The on-going work on design and construction of spike-based hardware platforms offers an alternative for running deep neural networks with significantly lower power consumption, but has to overcome hardware limitations in terms of noise and limited weight precision, as well as noise inherent in the sensor signal. This article investigates how such hardware constraints impact the performance of spiking neural network implementations of DBNs. In particular, the influence of limited bit precision during execution and training, and the impact of silicon mismatch in the synaptic weight parameters of custom hybrid VLSI implementations is studied. Furthermore, the network performance of spiking DBNs is characterized with regard to noise in the spiking input signal. Our results demonstrate that spiking DBNs can tolerate very low levels of hardware bit precision down to almost two bits, and show that their performance can be improved by at least 30% through an adapted training mechanism that takes the bit precision of the target platform into account. Spiking DBNs thus present an important use-case for large-scale hybrid analog-digital or digital neuromorphic platforms such as SpiNNaker, which can execute large but precision-constrained deep networks in real time.