InGaAlAsPN: A Materials System for Silicon Based Optoelectronics and Heterostructure Device Technologies

NASA Technical Reports Server (NTRS)

Broekaert, T. P. E.; Tang, S.; Wallace, R. M.; Beam, E. A., III; Duncan, W. M.; Kao, Y. -C.; Liu, H. -Y.

1995-01-01

A new material system is proposed for silicon based opto-electronic and heterostructure devices; the silicon lattice matched compositions of the (In,Ga,Al)-(As,P)N 3-5 compounds. In this nitride alloy material system, the bandgap is expected to be direct at the silicon lattice matched compositions with a bandgap range most likely to be in the infrared to visible. At lattice constants ranging between those of silicon carbide and silicon, a wider bandgap range is expected to be available and the high quality material obtained through lattice matching could enable applications such as monolithic color displays, high efficiency multi-junction solar cells, opto-electronic integrated circuits for fiber communications, and the transfer of existing 3-5 technology to silicon.

Molecular Monolayers for Electrical Passivation and Functionalization of Silicon-Based Solar Energy Devices.

PubMed

Veerbeek, Janneke; Firet, Nienke J; Vijselaar, Wouter; Elbersen, Rick; Gardeniers, Han; Huskens, Jurriaan

2017-01-11

Silicon-based solar fuel devices require passivation for optimal performance yet at the same time need functionalization with (photo)catalysts for efficient solar fuel production. Here, we use molecular monolayers to enable electrical passivation and simultaneous functionalization of silicon-based solar cells. Organic monolayers were coupled to silicon surfaces by hydrosilylation in order to avoid an insulating silicon oxide layer at the surface. Monolayers of 1-tetradecyne were shown to passivate silicon micropillar-based solar cells with radial junctions, by which the efficiency increased from 8.7% to 9.9% for n + /p junctions and from 7.8% to 8.8% for p + /n junctions. This electrical passivation of the surface, most likely by removal of dangling bonds, is reflected in a higher shunt resistance in the J-V measurements. Monolayers of 1,8-nonadiyne were still reactive for click chemistry with a model catalyst, thus enabling simultaneous passivation and future catalyst coupling.

Gold-based electrical interconnections for microelectronic devices

DOEpatents

Peterson, Kenneth A.; Garrett, Stephen E.; Reber, Cathleen A.; Watson, Robert D.

2002-01-01

A method of making an electrical interconnection from a microelectronic device to a package, comprising ball or wedge compression bonding a gold-based conductor directly to a silicon surface, such as a polysilicon bonding pad in a MEMS or IMEMS device, without using layers of aluminum or titanium disposed in-between the conductor and the silicon surface. After compression bonding, optional heating of the bond above 363 C. allows formation of a liquid gold-silicon eutectic phase containing approximately 3% (by weight) silicon, which significantly improves the bond strength by reforming and enhancing the initial compression bond. The same process can be used for improving the bond strength of Au--Ge bonds by forming a liquid Au-12Ge eutectic phase.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

NASA Astrophysics Data System (ADS)

Hussain, Muhammad M.; Rojas, Jhonathan P.; Torres Sevilla, Galo A.

2013-05-01

Today's information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor - heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon - industry's darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%).

Conformable large-area position-sensitive photodetectors based on luminescence-collecting silicone waveguides

NASA Astrophysics Data System (ADS)

Bartu, Petr; Koeppe, Robert; Arnold, Nikita; Neulinger, Anton; Fallon, Lisa; Bauer, Siegfried

2010-06-01

Position sensitive detection schemes based on the lateral photoeffect rely on inorganic semiconductors. Such position sensitive devices (PSDs) are reliable and robust, but preparation with large active areas is expensive and use on curved substrates is impossible. Here we present a novel route for the fabrication of conformable PSDs which allows easy preparation on large areas, and use on curved surfaces. Our device is based on stretchable silicone waveguides with embedded fluorescent dyes, used in conjunction with small silicon photodiodes. Impinging laser light (e.g., from a laser pointer) is absorbed by the dye in the PSD and re-emitted as fluorescence light at a larger wavelength. Due to the isotropic emission from the fluorescent dye molecules, most of the re-emitted light is coupled into the planar silicone waveguide and directed to the edges of the device. Here the light signals are detected via embedded small silicon photodiodes arranged in a regular pattern. Using a mathematical algorithm derived by extensive using of models from global positioning system (GPS) systems and human activity monitoring, the position of light spots is easily calculated. Additionally, the device shows high durability against mechanical stress, when clamped in an uniaxial stretcher and mechanically loaded up to 15% strain. The ease of fabrication, conformability, and durability of the device suggests its use as interface devices and as sensor skin for future robots.

Plastic-Syringe Induced Silicone Contamination in Organic Photvoltaic Fabrication: Implications for Small-Volume Additives

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carr, John A.; Nalwa, Kanwar S.; Mahadevapuram, Rakesh

Herein, the implications of silicone contamination found in solution-processed conjugated polymer solar cells are explored. Similar to a previous work based on molecular cells, we find this contamination as a result of the use of plastic syringes during fabrication. However, in contrast to the molecular case, we find that glass-syringe fabricated devices give superior performance than plastic-syringe fabricated devices in poly(3-hexylthiophene)-based cells. We find that the unintentional silicone addition alters the solution’s wettability, which translates to a thinner, less absorbent film on spinning. With many groups studying the effects of small-volume additives, this work should be closely considered as manymore » of these additives may also directly alter the solutions’ wettability, or the amount of silicone dissolved off the plastic syringes, or both. Thereby, film thickness, which generally is not reported in detail, can vary significantly from device to device.« less

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

NASA Astrophysics Data System (ADS)

Cunning, Benjamin V.; Ahmed, Mohsin; Mishra, Neeraj; Ranjbar Kermany, Atieh; Wood, Barry; Iacopi, Francesca

2014-08-01

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices.

Thermally-isolated silicon-based integrated circuits and related methods

DOEpatents

Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

2017-05-09

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

High-speed all-optical logic inverter based on stimulated Raman scattering in silicon nanocrystal.

PubMed

Sen, Mrinal; Das, Mukul K

2015-11-01

In this paper, we propose a new device architecture for an all-optical logic inverter (NOT gate), which is cascadable with a similar device. The inverter is based on stimulated Raman scattering in silicon nanocrystal waveguides, which are embedded in a silicon photonic crystal structure. The Raman response function of silicon nanocrystal is evaluated to explore the transfer characteristic of the inverter. A maximum product criterion for the noise margin is taken to analyze the cascadability of the inverter. The time domain response of the inverter, which explores successful inversion operation at 100 Gb/s, is analyzed. Propagation delay of the inverter is on the order of 5 ps, which is less than the delay in most of the electronic logic families as of today. Overall dimension of the device is around 755  μm ×15  μm, which ensures integration compatibility with the matured silicon industry.

Materials and processing approaches for foundry-compatible transient electronics

PubMed Central

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-01-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries. PMID:28652373

Neutron radiation tolerance of Au-activated silicon

NASA Technical Reports Server (NTRS)

Joyner, W. T.

1987-01-01

Double injection devices prepared by the introduction of deep traps, using the Au activation method have been found to tolerate gamma irradiation into the Gigarad (Si) region without significant degradation of operating characteristics. Silicon double injection devices, using deep levels creacted by Au diffusion, can tolerate fast neutron irradiation up to 10 to the 15th n/sq cm. Significant parameter degradation occurs at 10 to the 16th n/sq cm. However, since the actual doping of the basic material begins to change as a result of the transmutation of silicon into phosphorus for neutron fluences greater than 10 to the 17th/sq cm, the radiation tolerance of these devices is approaching the limit possible for any device based on initially doped silicon.

Microcrystalline silicon thin-film transistors for large area electronic applications

NASA Astrophysics Data System (ADS)

Chan, Kah-Yoong; Bunte, Eerke; Knipp, Dietmar; Stiebig, Helmut

2007-11-01

Thin-film transistors (TFTs) based on microcrystalline silicon (µc-Si:H) exhibit high charge carrier mobilities exceeding 35 cm2 V-1 s-1. The devices are fabricated by plasma-enhanced chemical vapor deposition at substrate temperatures below 200 °C. The fabrication process of the µc-Si:H TFTs is similar to the low temperature fabrication of amorphous silicon TFTs. The electrical characteristics of the µc-Si:H-based transistors will be presented. As the device charge carrier mobility of short channel TFTs is limited by the contacts, the influence of the drain and source contacts on the device parameters including the device charge carrier mobility and the device threshold voltage will be discussed. The experimental data will be described by a modified standard transistor model which accounts for the contact effects. Furthermore, the transmission line method was used to extract the device parameters including the contact resistance. The modified standard transistor model and the transmission line method will be compared in terms of the extracted device parameters and contact resistances.

Si/Ge elatform for lasers, amplifiers, and nonlinear optical devices based on the Raman Effect

NASA Astrophysics Data System (ADS)

Claps, Ricardo; Dimitropoulos, Dimitrios; Raghunathan, Varun; Fathpour, Sasan; Jalali, Bahram; Jusserand, Bernard

2007-02-01

The use of a silicon-germanium platform for the development of optically active devices will be discussed in this paper, from the perspective of Raman and Brillouin scattering phenomena. Silicon-Germanium is becoming a prevalent technology for the development of high speed CMOS transistors, with advances in several key parameters as high carrier mobility, low cost, and reduced manufacturing logistics. Traditionally, Si-Ge structures have been used in the optoelectronics arena as photodetectors, due to the enhanced absorption of Ge in the telecommunications band. Recent developments in Raman-based nonlinearities for devices based on a silicon-on-insulator platform have shed light on the possibility of using these effects in Si-Ge architectures. Lasing and amplification have been demonstrated using a SiGe alloy structure, and Brillouin/Raman activity from acoustic phonon modes in SiGe superlattices has been predicted. Moreover, new Raman-active branches and inhomogeneously broadened spectra result from optical phonon modes, offering new perspectives for optical device applications. The possibilities for an electrically-pumped Raman laser will be outlined, and the potential for design and development of silicon-based, Tera-Hertz wave emitters and/or receivers.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

NASA Astrophysics Data System (ADS)

Es-Sakhi, Azzedin D.

Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Silicon coupled with plasmon nanocavities generates bright visible hot luminescence

NASA Astrophysics Data System (ADS)

Cho, Chang-Hee; Aspetti, Carlos O.; Park, Joohee; Agarwal, Ritesh

2013-04-01

To address the limitations in device speed and performance in silicon-based electronics, there have been extensive studies on silicon optoelectronics with a view to achieving ultrafast optical data processing. The biggest challenge has been to develop an efficient silicon-based light source, because the indirect bandgap of silicon gives rise to extremely low emission efficiencies. Although light emission in quantum-confined silicon at sub-10 nm length scales has been demonstrated, there are difficulties in integrating quantum structures with conventional electronics. It is desirable to develop new concepts to obtain emission from silicon at length scales compatible with current electronic devices (20-100 nm), which therefore do not utilize quantum-confinement effects. Here, we demonstrate an entirely new method to achieve bright visible light emission in `bulk-sized' silicon coupled with plasmon nanocavities at room temperature, from non-thermalized carrier recombination. The highly enhanced emission (internal quantum efficiency of >1%) in plasmonic silicon, together with its size compatibility with current silicon electronics, provides new avenues for developing monolithically integrated light sources on conventional microchips.

A transistor based on 2D material and silicon junction

NASA Astrophysics Data System (ADS)

Kim, Sanghoek; Lee, Seunghyun

2017-07-01

A new type of graphene-silicon junction transistor based on bipolar charge-carrier injection was designed and investigated. In contrast to many recent studies on graphene field-effect transistor (FET), this device is a new type of bipolar junction transistor (BJT). The transistor fully utilizes the Fermi level tunability of graphene under bias to increase the minority-carrier injection efficiency of the base-emitter junction in the BJT. Single-layer graphene was used to form the emitter and the collector, and a p-type silicon was used as the base. The output of this transistor was compared with a metal-silicon junction transistor ( i.e. surface-barrier transistor) to understand the difference between a graphene-silicon junction and metal-silicon Schottky junction. A significantly higher current gain was observed in the graphene-silicon junction transistor as the base current was increased. The graphene-semiconductor heterojunction transistor offers several unique advantages, such as an extremely thin device profile, a low-temperature (< 110 °C) fabrication process, low cost (no furnace process), and high-temperature tolerance due to graphene's stability. A transistor current gain ( β) of 33.7 and a common-emitter amplifier voltage gain of 24.9 were achieved.

Polycrystalline silicon study: Low-cost silicon refining technology prospects and semiconductor-grade polycrystalline silicon availability through 1988

NASA Technical Reports Server (NTRS)

Costogue, E. N.; Ferber, R.; Lutwack, R.; Lorenz, J. H.; Pellin, R.

1984-01-01

Photovoltaic arrays that convert solar energy into electrical energy can become a cost effective bulk energy generation alternative, provided that an adequate supply of low cost materials is available. One of the key requirements for economic photovoltaic cells is reasonably priced silicon. At present, the photovoltaic industry is dependent upon polycrystalline silicon refined by the Siemens process primarily for integrated circuits, power devices, and discrete semiconductor devices. This dependency is expected to continue until the DOE sponsored low cost silicon refining technology developments have matured to the point where they are in commercial use. The photovoltaic industry can then develop its own source of supply. Silicon material availability and market pricing projections through 1988 are updated based on data collected early in 1984. The silicon refining industry plans to meet the increasing demands of the semiconductor device and photovoltaic product industries are overviewed. In addition, the DOE sponsored technology research for producing low cost polycrystalline silicon, probabilistic cost analysis for the two most promising production processes for achieving the DOE cost goals, and the impacts of the DOE photovoltaics program silicon refining research upon the commercial polycrystalline silicon refining industry are addressed.

THz-wave generation via difference frequency mixing in strained silicon based waveguide utilizing its second order susceptibility χ((2)).

PubMed

Saito, Kyosuke; Tanabe, Tadao; Oyama, Yutaka

2014-07-14

Terahertz (THz) wave generation via difference frequency mixing (DFM) process in strain silicon membrane waveguides by introducing the straining layer is theoretically investigated. The Si(3)N(4) straining layer induces anisotropic compressive strain in the silicon core and results in the appearance of the bulk second order nonlinear susceptibility χ((2)) by breaking the crystal symmetry. We have proposed waveguide structures for THz wave generation under the DFM process by .using the modal birefringence in the waveguide core. Our simulations show that an output power of up to 0.95 mW can be achieved at 9.09 THz. The strained silicon optical device may open a widow in the field of the silicon-based active THz photonic device applications.

Seventh workshop on the role of impurities and defects in silicon device processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

NONE

1997-08-01

This workshop is the latest in a series which has looked at technological issues related to the commercial development and success of silicon based photovoltaic (PV) modules. PV modules based on silicon are the most common at present, but face pressure from other technologies in terms of cell performance and cell cost. This workshop addresses a problem which is a factor in the production costs of silicon based PV modules.

Resonator-Based Silicon Electro-Optic Modulator with Low Power Consumption

NASA Astrophysics Data System (ADS)

Xin, Maoqing; Danner, Aaron J.; Eng Png, Ching; Thor Lim, Soon

2009-04-01

This paper demonstrates, via simulation, an electro-optic modulator based on a subwavelength Fabry-Perot resonator cavity with low power consumption of 86 µW/µm. This is, to the best of our knowledge, the lowest power reported for silicon photonic bandgap modulators. The device is modulated at a doped p-i-n junction overlapping the cavity in a silicon waveguide perforated with etched holes, with the doping area optimized for minimum power consumption. The surface area of the entire device is only 2.1 µm2, which compares favorably to other silicon-based modulators. A modulation speed of at least 300 MHz is detected from the electrical simulator after sidewall doping is introduced which is suitable for sensing or fiber to the home (FTTH) technologies, where speed can be traded for low cost and power consumption. The device does not rely on ultra-high Q, and could serve as a sensor, modulator, or passive filter with built-in calibration.

Porous silicon carbide (SIC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1996-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Research on SOI-based micro-resonator devices

NASA Astrophysics Data System (ADS)

Xiao, Xi; Xu, Haihua; Hu, Yingtao; Zhou, Liang; Xiong, Kang; Li, Zhiyong; Li, Yuntao; Fan, Zhongchao; Han, Weihua; Yu, Yude; Yu, Jinzhong

2010-10-01

SOI (silicon-on-insulator)-based micro-resonator is the key building block of silicon photonics, which is considered as a promising solution to alleviate the bandwidth bottleneck of on-chip interconnects. Silicon-based sub-micron waveguide, microring and microdisk devices are investigated in Institute of Semiconductors, Chinese Academy of Sciences. The main progress in recent years is presented in this talk, such as high Q factor single mode microdisk filters, compact thirdorder microring filters with the through/drop port extinctions to be ~ 30/40 dB, fast microring electro-optical switches with the switch time of < 400 ps and crosstalk < -23 dB, and > 10 Gbit/s high speed microring modulators.

Light Absorption Enhancement of Silicon-Based Photovoltaic Devices with Multiple Bandgap Structures of Porous Silicon

PubMed Central

Wu, Kuen-Hsien; Li, Chong-Wei

2015-01-01

Porous-silicon (PS) multi-layered structures with three stacked PS layers of different porosity were prepared on silicon (Si) substrates by successively tuning the electrochemical-etching parameters in an anodization process. The three PS layers have different optical bandgap energy and construct a triple-layered PS (TLPS) structure with multiple bandgap energy. Photovoltaic devices were fabricated by depositing aluminum electrodes of Schottky contacts on the surfaces of the developed TLPS structures. The TLPS-based devices exhibit broadband photoresponses within the spectrum of the solar irradiation and get high photocurrent for the incident light of a tungsten lamp. The improved spectral responses of devices are owing to the multi-bandgap structures of TLPS, which are designed with a layered configuration analog to a tandem cell for absorbing a wider energy range of the incidental sun light. The large photocurrent is mainly ascribed to an enhanced light-absorption ability as a result of applying nanoporous-Si thin films as the surface layers to absorb the short-wavelength light and to improve the Schottky contacts of devices. Experimental results reveal that the multi-bandgap PS structures produced from electrochemical-etching of Si wafers are potentially promising for development of highly efficient Si-based solar cells. PMID:28793542

Silicon carbide, an emerging high temperature semiconductor

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Powell, J. Anthony

1991-01-01

In recent years, the aerospace propulsion and space power communities have expressed a growing need for electronic devices that are capable of sustained high temperature operation. Applications for high temperature electronic devices include development instrumentation within engines, engine control, and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Other earth-based applications include deep-well drilling instrumentation, nuclear reactor instrumentation and control, and automotive sensors. To meet the needs of these applications, the High Temperature Electronics Program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. Research is focussed on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of silicon carbide electronic devices and integrated sensors. The progress made in developing silicon carbide is presented, and the challenges that lie ahead are discussed.

Silicon-Based Thermoelectrics: Harvesting Low Quality Heat Using Economically Printed Flexible Nanostructured Stacked Thermoelectric Junctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

2010-03-01

Broad Funding Opportunity Announcement Project: UIUC is experimenting with silicon-based materials to develop flexible thermoelectric devices—which convert heat into energy—that can be mass-produced at low cost. A thermoelectric device, which resembles a computer chip, creates electricity when a different temperature is applied to each of its sides. Existing commercial thermoelectric devices contain the element tellurium, which limits production levels because tellurium has become increasingly rare. UIUC is replacing this material with microscopic silicon wires that are considerably cheaper and could be equally effective. Improvements in thermoelectric device production could return enough wasted heat to add up to 23% to ourmore » current annual electricity production.« less

Ultra-Sensitive Magnetoresistive Displacement Sensing Device

NASA Technical Reports Server (NTRS)

Olivas, John D. (Inventor); Lairson, Bruce M. (Inventor); Ramesham, Rajeshuni (Inventor)

2003-01-01

An ultrasensitive displacement sensing device for use in accelerometers, pressure gauges, temperature transducers, and the like, comprises a sputter deposited, multilayer, magnetoresistive field sensor with a variable electrical resistance based on an imposed magnetic field. The device detects displacement by sensing changes in the local magnetic field about the magnetoresistive field sensor caused by the displacement of a hard magnetic film on a movable microstructure. The microstructure, which may be a cantilever, membrane, bridge, or other microelement, moves under the influence of an acceleration a known displacement predicted by the configuration and materials selected, and the resulting change in the electrical resistance of the MR sensor can be used to calculate the displacement. Using a micromachining approach, very thin silicon and silicon nitride membranes are fabricated in one preferred embodiment by means of anisotropic etching of silicon wafers. Other approaches include reactive ion etching of silicon on insulator (SOI), or Low Pressure Chemical Vapor Deposition of silicon nitride films over silicon substrates. The device is found to be improved with the use of giant magnetoresistive elements to detect changes in the local magnetic field.

High-sensitivity silicon nanowire phototransistors

NASA Astrophysics Data System (ADS)

Tan, Siew Li; Zhao, Xingyan; Dan, Yaping

2014-08-01

Silicon nanowires (SiNWs) have emerged as a promising material for high-sensitivity photodetection in the UV, visible and near-infrared spectral ranges. In this work, we demonstrate novel planar SiNW phototransistors on silicon-oninsulator (SOI) substrate using CMOS-compatible processes. The device consists of a bipolar transistor structure with an optically-injected base region. The electronic and optical properties of the SiNW phototransistors are investigated. Preliminary simulation and experimental results show that nanowire geometry, doping densities and surface states have considerable effects on the device performance, and that a device with optimized parameters can potentially outperform conventional Si photodetectors.

Laser deposition of resonant silicon nanoparticles on perovskite for photoluminescence enhancement

NASA Astrophysics Data System (ADS)

Tiguntseva, E. Y.; Zalogina, A. S.; Milichko, V. A.; Zuev, D. A.; Omelyanovich, M. M.; Ishteev, A.; Cerdan Pasaran, A.; Haroldson, R.; Makarov, S. V.; Zakhidov, A. A.

2017-11-01

Hybrid lead halide perovskite based optoelectronics is a promising area of modern technologies yielding excellent characteristics of light emitting diodes and lasers as well as high efficiencies of photovoltaic devices. However, the efficiency of perovskite based devices hold a potential of further improvement. Here we demonstrate high photoluminescence efficiency of perovskites thin films via deposition of resonant silicon nanoparticles on their surface. The deposited nanoparticles have a number of advances over their plasmonic counterparts, which were applied in previous studies. We show experimentally the increase of photoluminescence of perovskite film with the silicon nanoparticles by 150 % as compared to the film without the nanoparticles. The results are supported by numerical calculations. Our results pave the way to high throughput implementation of low loss resonant nanoparticles in order to create highly effective perovskite based optoelectronic devices.

Advanced Silicon-on-Insulator: Crystalline Silicon on Atomic Layer Deposited Beryllium Oxide.

PubMed

Min Lee, Seung; Hwan Yum, Jung; Larsen, Eric S; Chul Lee, Woo; Keun Kim, Seong; Bielawski, Christopher W; Oh, Jungwoo

2017-10-16

Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance. Devices based on SOI or silicon-on-sapphire technology are primarily used in high-performance radio frequency (RF) and radiation sensitive applications as well as for reducing the short channel effects in microelectronic devices. Despite their advantages, the high substrate cost and overheating problems associated with complexities in substrate fabrication as well as the low thermal conductivity of silicon oxide prevent broad applications of this technology. To overcome these challenges, we describe a new approach of using beryllium oxide (BeO). The use of atomic layer deposition (ALD) for producing this material results in lowering the SOI wafer production cost. Furthermore, the use of BeO exhibiting a high thermal conductivity might minimize the self-heating issues. We show that crystalline Si can be grown on ALD BeO and the resultant devices exhibit potential for use in advanced SOI technology applications.

Realization of an ultra-compact polarization beam splitter using asymmetric MMI based on silicon nitride / silicon-on-insulator platform.

PubMed

Sun, Xiao; Aitchison, J Stewart; Mojahedi, Mo

2017-04-03

We have experimentally demonstrated a compact polarization beam splitter (PBS) based on the silicon nitride/silicon-on-insulator platform using the recently proposed augmented-low-index-guiding (ALIG) waveguide structure. The two orthogonal polarizations are split in an asymmetric multimode interference (MMI) section, which was 1.6 μm wide and 4.8 μm long. The device works well over the entire C-band wavelength range and has a measured low insertion loss of less than 1 dB. The polarization extinction ratio at the Bar Port is approximately 17 dB and at the Cross Port is approximately 25 dB. The design of the device is robust and has a good fabrication tolerance.

High-Bandgap Silicon Nanocrystal Solar Cells: Device Fabrication, Characterization, and Modeling

NASA Astrophysics Data System (ADS)

Löper, Philipp; Canino, Mariaconcetta; Schnabel, Manuel; Summonte, Caterina; Janz, Stefan; Zacharias, Margit

Silicon nanocrystals (Si NCs) embedded in Si-based dielectrics provide a Si-based high-bandgap material (1.7 eV) and enable the construction of crystalline Si tandem solar cells. This chapter focusses on Si NC embedded in silicon carbide, because silicon carbide offers electrical conduction through the matrix material. The material development is reviewed, and optical modeling is introduced as a powerful method to monitor the four material components, amorphous and crystalline silicon as well as amorphous and crystalline silicon carbide. In the second part of this chapter, recent device developments for the photovoltaic characterization of Si NCs are examined. The controlled growth of Si NCs involves high-temperature annealing which deteriorates the properties of any previously established selective contacts. A membrane-based device is presented to overcome these limitations. In this approach, the formation of both selective contacts is carried out after high-temperature annealing and is therefore not affected by the latter. We examine p-i-n solar cells with an intrinsic region made of Si NCs embedded in silicon carbide. Device failure due to damaged insulation layers is analyzed by light beam-induced current measurements. An optical model of the device is presented for improving the cell current. A characterization scheme for Si NC p-i-n solar cells is presented which aims at determining the fundamental transport and recombination properties, i.e., the effective mobility lifetime product, of the nanocrystal layer at device level. For this means, an illumination-dependent analysis of Si NC p-i-n solar cells is carried out within the framework of the constant field approximation. The analysis builds on an optical device model, which is used to assess the photogenerated current in each of the device layers. Illumination-dependent current-voltage curves are modelled with a voltage-dependent current collection function with only two free parameters, and excellent agreement is found between theory and experiment. An effective mobility lifetime product of 10-10 cm2/V is derived and confirmed independently from an alternative method. The procedure discussed in this chapter is proposed as a characterization scheme for further material development, providing an optimization parameter (the effective mobility lifetime product) relevant for the photovoltaic performance of Si NC films.

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

Silicon-On-Insulator (SOI) Devices and Mixed-Signal Circuits for Extreme Temperature Applications

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik

2008-01-01

Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.

Multi-junction solar cell device

DOEpatents

Friedman, Daniel J.; Geisz, John F.

2007-12-18

A multi-junction solar cell device (10) is provided. The multi-junction solar cell device (10) comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device (10) comprises a bottom active cell (20) having a single-crystal silicon substrate base and an emitter layer (23). The multi-junction device (10) further comprises one or two subsequent active cells each having a base layer (32) and an emitter layer (23) with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal III-V semiconductor alloy that is substantially lattice-matched to the silicon substrate (22). The polarity of the active p-n junction cells is either p-on-n or n-on-p. The present invention further includes a method for substantially lattice matching single-crystal III-V semiconductor layers with the silicon substrate (22) by including boron and/or nitrogen in the chemical structure of these layers.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

PubMed Central

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics.

PubMed

Rao, Sandro; Pangallo, Giovanni; Della Corte, Francesco Giuseppe

2016-01-06

Hydrogenated amorphous silicon (a-Si:H) shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34-40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

PubMed

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

Enhancing the Efficiency of Silicon-Based Solar Cells by the Piezo-Phototronic Effect.

PubMed

Zhu, Laipan; Wang, Longfei; Pan, Caofeng; Chen, Libo; Xue, Fei; Chen, Baodong; Yang, Leijing; Su, Li; Wang, Zhong Lin

2017-02-28

Although there are numerous approaches for fabricating solar cells, the silicon-based photovoltaics are still the most widely used in industry and around the world. A small increase in the efficiency of silicon-based solar cells has a huge economic impact and practical importance. We fabricate a silicon-based nanoheterostructure (p + -Si/p-Si/n + -Si (and n-Si)/n-ZnO nanowire (NW) array) photovoltaic device and demonstrate the enhanced device performance through significantly enhanced light absorption by NW array and effective charge carrier separation by the piezo-phototronic effect. The strain-induced piezoelectric polarization charges created at n-doped Si-ZnO interfaces can effectively modulate the corresponding band structure and electron gas trapped in the n + -Si/n-ZnO NW nanoheterostructure and thus enhance the transport process of local charge carriers. The efficiency of the solar cell was improved from 8.97% to 9.51% by simply applying a static compress strain. This study indicates that the piezo-phototronic effect can enhance the performance of a large-scale silicon-based solar cell, with great potential for industrial applications.

George E. Pake Prize Lecture: CMOS Technology Roadmap: Is Scaling Ending?

NASA Astrophysics Data System (ADS)

Chen, Tze-Chiang (T. C.)

The development of silicon technology has been based on the principle of physics and driven by the system needs. Traditionally, the system needs have been satisfied by the increase in transistor density and performance, as suggested by Moore's Law and guided by ''Dennard CMOS scaling theory''. As the silicon industry moves towards the 14nm node and beyond, three of the most important challenges facing Moore's Law and continued CMOS scaling are the growing standby power dissipation, the increasing variability in device characteristics and the ever increasing manufacturing cost. Actually, the first two factors are the embodiments of CMOS approaching atomistic and quantum-mechanical physics boundaries. Industry directions for addressing these challenges are also developing along three primary approaches: Extending silicon scaling through innovations in materials and device structure, expanding the level of integration through three-dimensional structures comprised of through-silicon-vias holes and chip stacking in order to enhance functionality and parallelism and exploring post-silicon CMOS innovation with new nano-devices based on distinctly different principles of physics, new materials and new processes such as spintronics, carbon nanotubes and nanowires. Hence, the infusion of new materials, innovative integration and novel device structures will continue to extend CMOS technology scaling for at least another decade.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Lithographically defined few-electron silicon quantum dots based on a silicon-on-insulator substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Horibe, Kosuke; Oda, Shunri; Kodera, Tetsuo, E-mail: kodera.t.ac@m.titech.ac.jp

2015-02-23

Silicon quantum dot (QD) devices with a proximal single-electron transistor (SET) charge sensor have been fabricated in a metal-oxide-semiconductor structure based on a silicon-on-insulator substrate. The charge state of the QDs was clearly read out using the charge sensor via the SET current. The lithographically defined small QDs enabled clear observation of the few-electron regime of a single QD and a double QD by charge sensing. Tunnel coupling on tunnel barriers of the QDs can be controlled by tuning the top-gate voltages, which can be used for manipulation of the spin quantum bit via exchange interaction between tunnel-coupled QDs. Themore » lithographically defined silicon QD device reported here is technologically simple and does not require electrical gates to create QD confinement potentials, which is advantageous for the integration of complicated constructs such as multiple QD structures with SET charge sensors for the purpose of spin-based quantum computing.« less

David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices

NASA Astrophysics Data System (ADS)

Riel, Heike

Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.

In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

PubMed Central

Makey, Ghaith; Elahi, Parviz; Çolakoğlu, Tahir; Ergeçen, Emre; Yavuz, Özgün; Hübner, René; Borra, Mona Zolfaghari; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ömer

2017-01-01

Silicon is an excellent material for microelectronics and integrated photonics1–3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e., “in-chip” microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances. PMID:28983323

In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

NASA Astrophysics Data System (ADS)

Tokel, Onur; Turnalı, Ahmet; Makey, Ghaith; Elahi, Parviz; ćolakoǧlu, Tahir; Ergeçen, Emre; Yavuz, Ã.-zgün; Hübner, René; Zolfaghari Borra, Mona; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ã.-mer

2017-10-01

Silicon is an excellent material for microelectronics and integrated photonics1-3, with untapped potential for mid-infrared optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow the fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realized with techniques like reactive ion etching. Embedded optical elements7, electronic devices and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1-µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has an optical index different to that in unmodified parts, enabling the creation of numerous photonic devices. Optionally, these parts can be chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface—that is, `in-chip'—microstructures for microfluidic cooling of chips, vias, micro-electro-mechanical systems, photovoltaic applications and photonic devices that match or surpass corresponding state-of-the-art device performances.

Cascaded Mach-Zehnder wavelength filters in silicon photonics for low loss and flat pass-band WDM (de-)multiplexing.

PubMed

Horst, Folkert; Green, William M J; Assefa, Solomon; Shank, Steven M; Vlasov, Yurii A; Offrein, Bert Jan

2013-05-20

We present 1-to-8 wavelength (de-)multiplexer devices based on a binary tree of cascaded Mach-Zehnder-like lattice filters, and manufactured using a 90 nm CMOS-integrated silicon photonics technology. We demonstrate that these devices combine a flat pass-band over more than 50% of the channel spacing with low insertion loss of less than 1.6 dB, and have a small device size of approximately 500 × 400 µm. This makes this type of filters well suited for application as WDM (de-)multiplexer in silicon photonics transceivers for optical data communication in large scale computer systems.

A Silicon Nanocrystal Schottky Junction Solar Cell produced from Colloidal Silicon Nanocrystals

PubMed Central

2010-01-01

Solution-processed semiconductors are seen as a promising route to reducing the cost of the photovoltaic device manufacture. We are reporting a single-layer Schottky photovoltaic device that was fabricated by spin-coating intrinsic silicon nanocrystals (Si NCs) from colloidal suspension. The thin-film formation process was based on Si NCs without any ligand attachment, exchange, or removal reactions. The Schottky junction device showed a photovoltaic response with a power conversion efficiency of 0.02%, a fill factor of 0.26, short circuit-current density of 0.148 mA/cm2, and open-circuit voltage of 0.51 V. PMID:20676200

Compact Quantum Random Number Generator with Silicon Nanocrystals Light Emitting Device Coupled to a Silicon Photomultiplier

NASA Astrophysics Data System (ADS)

Bisadi, Zahra; Acerbi, Fabio; Fontana, Giorgio; Zorzi, Nicola; Piemonte, Claudio; Pucker, Georg; Pavesi, Lorenzo

2018-02-01

A small-sized photonic quantum random number generator, easy to be implemented in small electronic devices for secure data encryption and other applications, is highly demanding nowadays. Here, we propose a compact configuration with Silicon nanocrystals large area light emitting device (LED) coupled to a Silicon photomultiplier to generate random numbers. The random number generation methodology is based on the photon arrival time and is robust against the non-idealities of the detector and the source of quantum entropy. The raw data show high quality of randomness and pass all the statistical tests in national institute of standards and technology tests (NIST) suite without a post-processing algorithm. The highest bit rate is 0.5 Mbps with the efficiency of 4 bits per detected photon.

Silicon based multilayer photoelectrodes for photoelectrolysis of water to produce hydrogen from the sun

NASA Astrophysics Data System (ADS)

Faruque, Faisal

The main objective of this work is to study different materials for the direct photosynthesis of hydrogen from water. A variety of photocatalysts such as titanium dioxide, titanium oxy-nitride, silicon carbide, and gallium nitride are being investigated by others for the clean production of hydrogen for fuel cells and hydrogen economy. Our approach was to deposit suitable metallic regions on photocatalyst nanoparticles to direct the efficient synthesis of hydrogen to a particular site for convenient collection. We studied different electrode metals such as gold, platinum, titanium, palladium, and tungsten. We also studied different solar cell materials such as silicon (p- and n-types), silicon carbide and titanium dioxide semiconductors in order to efficiently generate electrons under illumination. We introduced a novel silicon-based multilayer photosynthesis device to take advantage of suitable properties of silicon and tungsten to efficiently produce hydrogen. The device consisted of a silicon (0.5mm) substrate, a deposited atomic layer of Al2O 3 (1nm), a doped polysilicon (0.1microm), and finally a tungsten nanoporous (5-10nm) layer acting as an interface electrode with water. The Al2O 3 layer was introduced to reduce leakage current and to prevent the spreading of the diffused p-n junction layer between the silicon and doped polysilicon layers. The surface of the photoelectrode was coated with nanotextured tungsten nanopores (TNP), which increased the surface area of the electrodes to the electrolyte, assisting in electron-hole mobility, and acting as a photocatalyst. The reported device exhibited a fill factor (%FF) of 27.22% and solar-to-hydrogen conversion efficiency of 0.03174%. This thesis describes the structures of the device, and offers a characterization and comparison between different photoelectrodes.

Self-formed cylindrical microcapillaries through surface migration of silicon and their application to single-cell analysis

NASA Astrophysics Data System (ADS)

Zeng, Fan; Luo, Yuan; Yobas, Levent; Wong, Man

2013-05-01

Surface migration of monocrystalline silicon has been applied to demonstrate self-formed cylindrical microcapillaries with diameters from 0.8 to 2.8 µm based on the microstructured substrate topography. The microcapillaries are entirely enclosed in silicon and can be conveniently etched to create fluidic access ports and microchannels for their subsequent integration into functional microfluidic devices. Moreover, the microcapillaries can be thermally oxidized through their access ports with silica walls remain intact upon release from surrounding silicon in an effort to enhance optical clarity. Straight microcapillaries and microcapillaries with perpendicular turns and crossings (junctions) have all been fabricated and validated for fluidic continuity with a fluorescein solution pumped through. The utility of the microcapillaries has been showcased on particle traps in which biological cells are probed for single-cell impedance spectroscopy. The approach disclosed, given its full compatibility with semiconductor device fabrication, offers great potential towards intelligent cell and molecule-based devices merging microelectronics and microfluidics.

Silicon nano-membrane based photonic crystal microcavities for high sensitivity bio-sensing.

PubMed

Lai, Wei-Cheng; Chakravarty, Swapnajit; Zou, Yi; Chen, Ray T

2012-04-01

We experimentally demonstrated photonic crystal microcavity based resonant sensors coupled to photonic crystal waveguides in silicon nano-membrane on insulator for chemical and bio-sensing. Linear L-type microcavities are considered. In contrast to cavities with small mode volumes, but low quality factors for bio-sensing, we showed increasing the length of the microcavity enhances the quality factor of the resonance by an order of magnitude and increases the resonance wavelength shift while retaining compact device characteristics. Q~26760 and sensitivity down to 15 ng/ml and ~110 pg/mm2 in bio-sensing was experimentally demonstrated on silicon-on-insulator devices.

An optical microsystem based on vertical silicon-air Bragg mirror for liquid substances monitoring

NASA Astrophysics Data System (ADS)

De Stefano, Luca; Rendina, Ivo; Rea, Ilaria; Rotiroti, Lucia; De Tommasi, Edoardo; Barillaro, Giuseppe

2007-05-01

In this work, an integrated optical microsystems for the continuous detection of flammable liquids has been fabricated and characterized. The proposed system is composed of a the transducer element, which is a vertical silicon/air Bragg mirror fabricated by silicon electrochemical micromachining, sealed with a cover glass anodically bonded on its top. The device has been optically characterized in presence of liquid substances of environmental interest, such as ethanol and isopropanol. The preliminary experimental results are in good agreement with the theoretical calculations and show the possibility to use the device as an optical sensor based on the change of its reflectivity spectrum.

Silicon Carbide Technology

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2006-01-01

Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

Nano-islands integrated evanescence-based lab-on-a-chip on silica-on-silicon and polydimethylsiloxane hybrid platform for detection of recombinant growth hormone

PubMed Central

Ozhikandathil, J.; Packirisamy, M.

2012-01-01

Integration of nano-materials in optical microfluidic devices facilitates the realization of miniaturized analytical systems with enhanced sensing abilities for biological and chemical substances. In this work, a novel method of integration of gold nano-islands in a silica-on-silicon-polydimethylsiloxane microfluidic device is reported. The device works based on the nano-enhanced evanescence technique achieved by interacting the evanescent tail of propagating wave with the gold nano-islands integrated on the core of the waveguide resulting in the modification of the propagating UV-visible spectrum. The biosensing ability of the device is investigated by finite-difference time-domain simulation with a simplified model of the device. The performance of the proposed device is demonstrated for the detection of recombinant growth hormone based on antibody-antigen interaction. PMID:24106526

Development of an amorphous selenium based photoconductor and its application in a high-sensitivity photodetector (Conference Presentation)

NASA Astrophysics Data System (ADS)

Masuzawa, Tomoaki; Ebisudani, Taishi; Ochiai, Jun; Saito, Ichitaro; Yamada, Takatoshi; Chua, Daniel H. C.; Mimura, Hidenori; Okano, Ken

2016-09-01

Although present imaging devices are mostly silicon-based devices such as CMOS and CCD, these devices are reaching their sensitivity limit due to the band gap of silicon. Amorphous selenium (a-Se) is a promising candidate for high- sensitivity photo imaging devices, because of its low thermal noise, high spatial resolution, as well as adaptability to wide-area deposition. In addition, internal signal amplification is reported on a-Se based photodetectors, which enables a photodetector having effective quantum efficiency over 100 % against visible light. Since a-Se has sensitivity to UV and soft X-rays, the reported internal signal amplification should be applicable to UV and X-ray detection. However, application of the internal signal amplification required high voltage, which caused unexpected breakdown at the contact or thin-film transistor-based signal read-out. For this reason, vacuum devices having electron-beam read-out is proposed. The advantages of vacuum-type devices are vacuum insulation and its extremely low dark current. In this study, we present recent progresses in developing a-Se based photoconductive films and photodetector using nitrogen-doped diamond electron beam source as signal read-out. A novel electrochemical method is used to dope impurities into a-Se, turning the material from weak p-type to n-type. A p-n junction is formed within a-Se photoconductive film, which has increased the sensitivity of a-Se based photodetector. Our result suggests a possibility of high sensitivity photodetector that can potentially break the limit of silicon-based devices.

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors

PubMed Central

Marrs, Michael A.; Raupp, Gregory B.

2016-01-01

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm2 and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate. PMID:27472329

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors.

PubMed

Marrs, Michael A; Raupp, Gregory B

2016-07-26

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm² and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate.

The Optical Emission and Absorption Properties of Silicon-Germanium Superlattice Structures Grown on Non-Conventional Silicon Substrate Orientation

DTIC Science & Technology

1994-08-01

evidence needed to someday design and build a silicon- based infrared detector that can efficiently detect light at normal incidence. I chose to...detector a. spectral response b. dark current c. qutiantuam efficiency MAKE DEVICE Figure 1. A simple schematic diagram describing a basic materials... based . If we can extend the capabilities of silicon into the near infrared (iR), the nation would be well- positioned to exploit our advantage in this

Silicon carbidonitride based phosphors and lighting devices using the same

DOEpatents

Li, Yuanqiang; Romanelli, Michael Dennis; Tian, Yongchi

2013-09-17

Disclosed herein are novel families of silicon carbidonitride phosphor compositions. In certain embodiments, optimal ranges of carbon content have been identified which provide excellent luminescence and thermal stability characteristics.

Fabrication and characterization of active nanostructures

NASA Astrophysics Data System (ADS)

Opondo, Noah F.

Three different nanostructure active devices have been designed, fabricated and characterized. Junctionless transistors based on highly-doped silicon nanowires fabricated using a bottom-up fabrication approach are first discussed. The fabrication avoids the ion implantation step since silicon nanowires are doped in-situ during growth. Germanium junctionless transistors fabricated with a top down approach starting from a germanium on insulator substrate and using a gate stack of high-k dielectrics and GeO2 are also presented. The levels and origin of low-frequency noise in junctionless transistor devices fabricated from silicon nanowires and also from GeOI devices are reported. Low-frequency noise is an indicator of the quality of the material, hence its characterization can reveal the quality and perhaps reliability of fabricated transistors. A novel method based on low-frequency noise measurement to envisage trap density in the semiconductor bandgap near the semiconductor/oxide interface of nanoscale silicon junctionless transistors (JLTs) is presented. Low-frequency noise characterization of JLTs biased in saturation is conducted at different gate biases. The noise spectrum indicates either a Lorentzian or 1/f. A simple analysis of the low-frequency noise data leads to the density of traps and their energy within the semiconductor bandgap. The level of noise in silicon JLT devices is lower than reported values on transistors fabricated using a top-down approach. This noise level can be significantly improved by improving the quality of dielectric and the channel interface. A micro-vacuum electron device based on silicon field emitters for cold cathode emission is also presented. The presented work utilizes vertical Si nanowires fabricated by means of self-assembly, standard lithography and etching techniques as field emitters in this dissertation. To obtain a high nanowire density, hence a high current density, a simple and inexpensive Langmuir Blodgett technique to deposit silica nanoparticles as a mask to etch Si is adopted. Fabrication and characterization of a metal-gated microtriode with a high current density and low operating voltage are presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Light-emitting diodes based on colloidal silicon quantum dots

NASA Astrophysics Data System (ADS)

Zhao, Shuangyi; Liu, Xiangkai; Pi, Xiaodong; Yang, Deren

2018-06-01

Colloidal silicon quantum dots (Si QDs) hold great promise for the development of printed Si electronics. Given their novel electronic and optical properties, colloidal Si QDs have been intensively investigated for optoelectronic applications. Among all kinds of optoelectronic devices based on colloidal Si QDs, QD light-emitting diodes (LEDs) play an important role. It is encouraging that the performance of LEDs based on colloidal Si QDs has been significantly increasing in the past decade. In this review, we discuss the effects of the QD size, QD surface and device structure on the performance of colloidal Si-QD LEDs. The outlook on the further optimization of the device performance is presented at the end.

Guided Acoustic and Optical Waves in Silicon-on-Insulator for Brillouin Scattering and Optomechanics

DTIC Science & Technology

2016-08-01

APL PHOTONICS 1, 071301 (2016) Guided acoustic and optical waves in silicon-on- insulator for Brillouin scattering and optomechanics Christopher J...is possible to simultaneously guide optical and acoustic waves in the technologically important silicon on insulator (SOI) material system. Thin...mechanism on which to base on-chip nonlinear optical devices compatible with a rapidly growing silicon photonics toolbox.3–9 While silicon on insulator

SSP Technology Investigation of a High-Voltage DC-DC Converter

NASA Technical Reports Server (NTRS)

Pappas, J. A.; Grady, W. M.; George, Patrick J. (Technical Monitor)

2002-01-01

The goal of this project was to establish the feasibility of a high-voltage DC-DC converter based on a rod-array triggered vacuum switch (RATVS) for the Space Solar Power system. The RATVS has many advantages over silicon and silicon-carbide devices. The RATVS is attractive for this application because it is a high-voltage device that has already been demonstrated at currents in excess of the requirement for an SSP device and at much higher per-device voltages than existing or near-term solid state switching devices. The RATVS packs a much higher specific power rating than any solid-state device and it is likely to be more tolerant of its surroundings in space. In addition, pursuit of an RATVS-based system would provide NASA with a nearer-term and less expensive power converter option for the SSP.

Single-Event Effects in Silicon and Silicon Carbide Power Devices

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

2014-01-01

NASA Electronics Parts and Packaging program-funded activities over the past year on single-event effects in silicon and silicon carbide power devices are presented, with focus on SiC device failure signatures.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime.

PubMed

Goykhman, Ilya; Desiatov, Boris; Khurgin, Jacob; Shappir, Joseph; Levy, Uriel

2011-06-08

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

Piezoresistive silicon nanowire resonators as embedded building blocks in thick SOI

NASA Astrophysics Data System (ADS)

Nasr Esfahani, Mohammad; Kilinc, Yasin; Çagatay Karakan, M.; Orhan, Ezgi; Hanay, M. Selim; Leblebici, Yusuf; Erdem Alaca, B.

2018-04-01

The use of silicon nanowire resonators in nanoelectromechanical systems for new-generation sensing and communication devices faces integration challenges with higher-order structures. Monolithic and deterministic integration of such nanowires with the surrounding microscale architecture within the same thick crystal is a critical aspect for the improvement of throughput, reliability and device functionality. A monolithic and IC-compatible technology based on a tuned combination of etching and protection processes was recently introduced yielding silicon nanowires within a 10 μ m-thick device layer. Motivated by its success, the implications of the technology regarding the electromechanical resonance are studied within a particular setting, where the resonator is co-fabricated with all terminals and tuning electrodes. Frequency response is measured via piezoresistive readout with frequency down-mixing. Measurements indicate mechanical resonance with frequencies as high as 100 MHz exhibiting a Lorentzian behavior with proper transition to nonlinearity, while Allan deviation on the order of 3-8 ppm is achieved. Enabling the fabrication of silicon nanowires in thick silicon crystals using conventional semiconductor manufacturing, the present study thus demonstrates an alternative pathway to bottom-up and thin silicon-on-insulator approaches for silicon nanowire resonators.

Radiation Effects on the Electrical Properties of Hafnium Oxide Based MOS Capacitors

DTIC Science & Technology

2011-03-01

Figures Figure Page 1. Conceptual illustration of the creation of electron-hole pairs and displacement damage in a n -type silicon metal-oxide-silicon...Illustration of the effect, in a CV plot, of oxide trapped charge for a hypothetical n -type device...8 5. Illustration of the effect, in a CV plot, of interface trapped charge for a hypothetical n -type device

R&D issues in scale-up and manufacturing of amorphous silicon tandem modules

NASA Astrophysics Data System (ADS)

Arya, R. R.; Carlson, D. E.; Chen, L. F.; Ganguly, G.; He, M.; Lin, G.; Middya, R.; Wood, G.; Newton, J.; Bennett, M.; Jackson, F.; Willing, F.

1999-03-01

R & D on amorphous silicon based tandem junction devices has improved the throughtput, the material utilization, and the performance of devices on commercial tin oxide coated glass. The tandem junction technology has been scaled-up to produce 8.6 Ft2 monolithically integrated modules in manufacturing at the TF1 plant. Optimization of performance and stability of these modules is ongoing.

TID Simulation of Advanced CMOS Devices for Space Applications

NASA Astrophysics Data System (ADS)

Sajid, Muhammad

2016-07-01

This paper focuses on Total Ionizing Dose (TID) effects caused by accumulation of charges at silicon dioxide, substrate/silicon dioxide interface, Shallow Trench Isolation (STI) for scaled CMOS bulk devices as well as at Buried Oxide (BOX) layer in devices based on Silicon-On-Insulator (SOI) technology to be operated in space radiation environment. The radiation induced leakage current and corresponding density/concentration electrons in leakage current path was presented/depicted for 180nm, 130nm and 65nm NMOS, PMOS transistors based on CMOS bulk as well as SOI process technologies on-board LEO and GEO satellites. On the basis of simulation results, the TID robustness analysis for advanced deep sub-micron technologies was accomplished up to 500 Krad. The correlation between the impact of technology scaling and magnitude of leakage current with corresponding total dose was established utilizing Visual TCAD Genius program.

Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lauermann, M.; Weimann, C.; Palmer, R.

2014-05-27

We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

Mid-infrared materials and devices on a Si platform for optical sensing

PubMed Central

Singh, Vivek; Lin, Pao Tai; Patel, Neil; Lin, Hongtao; Li, Lan; Zou, Yi; Deng, Fei; Ni, Chaoying; Hu, Juejun; Giammarco, James; Soliani, Anna Paola; Zdyrko, Bogdan; Luzinov, Igor; Novak, Spencer; Novak, Jackie; Wachtel, Peter; Danto, Sylvain; Musgraves, J David; Richardson, Kathleen; Kimerling, Lionel C; Agarwal, Anuradha M

2014-01-01

In this article, we review our recent work on mid-infrared (mid-IR) photonic materials and devices fabricated on silicon for on-chip sensing applications. Pedestal waveguides based on silicon are demonstrated as broadband mid-IR sensors. Our low-loss mid-IR directional couplers demonstrated in SiNx waveguides are useful in differential sensing applications. Photonic crystal cavities and microdisk resonators based on chalcogenide glasses for high sensitivity are also demonstrated as effective mid-IR sensors. Polymer-based functionalization layers, to enhance the sensitivity and selectivity of our sensor devices, are also presented. We discuss the design of mid-IR chalcogenide waveguides integrated with polycrystalline PbTe detectors on a monolithic silicon platform for optical sensing, wherein the use of a low-index spacer layer enables the evanescent coupling of mid-IR light from the waveguides to the detector. Finally, we show the successful fabrication processing of our first prototype mid-IR waveguide-integrated detectors. PMID:27877641

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moreno, Gilbert

The objective for this project is to develop thermal management strategies to enable efficient and high-temperature wide-bandgap (WBG)-based power electronic systems (e.g., emerging inverter and DC-DC converter). Device- and system-level thermal analyses are conducted to determine the thermal limitations of current automotive power modules under elevated device temperature conditions. Additionally, novel cooling concepts and material selection will be evaluated to enable high-temperature silicon and WBG devices in power electronics components. WBG devices (silicon carbide [SiC], gallium nitride [GaN]) promise to increase efficiency, but will be driven as hard as possible. This creates challenges for thermal management and reliability.

Initial steps toward the realization of large area arrays of single photon counting pixels based on polycrystalline silicon TFTs

NASA Astrophysics Data System (ADS)

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua; Jiang, Hao; Street, Robert A.; Lu, Jeng Ping

2014-03-01

The thin-film semiconductor processing methods that enabled creation of inexpensive liquid crystal displays based on amorphous silicon transistors for cell phones and televisions, as well as desktop, laptop and mobile computers, also facilitated the development of devices that have become ubiquitous in medical x-ray imaging environments. These devices, called active matrix flat-panel imagers (AMFPIs), measure the integrated signal generated by incident X rays and offer detection areas as large as ~43×43 cm2. In recent years, there has been growing interest in medical x-ray imagers that record information from X ray photons on an individual basis. However, such photon counting devices have generally been based on crystalline silicon, a material not inherently suited to the cost-effective manufacture of monolithic devices of a size comparable to that of AMFPIs. Motivated by these considerations, we have developed an initial set of small area prototype arrays using thin-film processing methods and polycrystalline silicon transistors. These prototypes were developed in the spirit of exploring the possibility of creating large area arrays offering single photon counting capabilities and, to our knowledge, are the first photon counting arrays fabricated using thin film techniques. In this paper, the architecture of the prototype pixels is presented and considerations that influenced the design of the pixel circuits, including amplifier noise, TFT performance variations, and minimum feature size, are discussed.

Silicon deposition in nanopores using a liquid precursor.

PubMed

Masuda, Takashi; Tatsuda, Narihito; Yano, Kazuhisa; Shimoda, Tatsuya

2016-11-22

Techniques for depositing silicon into nanosized spaces are vital for the further scaling down of next-generation devices in the semiconductor industry. In this study, we filled silicon into 3.5-nm-diameter nanopores with an aspect ratio of 70 by exploiting thermodynamic behaviour based on the van der Waals energy of vaporized cyclopentasilane (CPS). We originally synthesized CPS as a liquid precursor for semiconducting silicon. Here we used CPS as a gas source in thermal chemical vapour deposition under atmospheric pressure because vaporized CPS can fill nanopores spontaneously. Our estimation of the free energy of CPS based on Lifshitz van der Waals theory clarified the filling mechanism, where CPS vapour in the nanopores readily undergoes capillary condensation because of its large molar volume compared to those of other vapours such as water, toluene, silane, and disilane. Consequently, a liquid-specific feature was observed during the deposition process; specifically, condensed CPS penetrated into the nanopores spontaneously via capillary force. The CPS that filled the nanopores was then transformed into solid silicon by thermal decomposition at 400 °C. The developed method is expected to be used as a nanoscale silicon filling technology, which is critical for the fabrication of future quantum scale silicon devices.

Silicon deposition in nanopores using a liquid precursor

NASA Astrophysics Data System (ADS)

Masuda, Takashi; Tatsuda, Narihito; Yano, Kazuhisa; Shimoda, Tatsuya

2016-11-01

Techniques for depositing silicon into nanosized spaces are vital for the further scaling down of next-generation devices in the semiconductor industry. In this study, we filled silicon into 3.5-nm-diameter nanopores with an aspect ratio of 70 by exploiting thermodynamic behaviour based on the van der Waals energy of vaporized cyclopentasilane (CPS). We originally synthesized CPS as a liquid precursor for semiconducting silicon. Here we used CPS as a gas source in thermal chemical vapour deposition under atmospheric pressure because vaporized CPS can fill nanopores spontaneously. Our estimation of the free energy of CPS based on Lifshitz van der Waals theory clarified the filling mechanism, where CPS vapour in the nanopores readily undergoes capillary condensation because of its large molar volume compared to those of other vapours such as water, toluene, silane, and disilane. Consequently, a liquid-specific feature was observed during the deposition process; specifically, condensed CPS penetrated into the nanopores spontaneously via capillary force. The CPS that filled the nanopores was then transformed into solid silicon by thermal decomposition at 400 °C. The developed method is expected to be used as a nanoscale silicon filling technology, which is critical for the fabrication of future quantum scale silicon devices.

Postfabrication Phase Error Correction of Silicon Photonic Circuits by Single Femtosecond Laser Pulses

DOE PAGES

Bachman, Daniel; Chen, Zhijiang; Wang, Christopher; ...

2016-11-29

Phase errors caused by fabrication variations in silicon photonic integrated circuits are an important problem, which negatively impacts device yield and performance. This study reports our recent progress in the development of a method for permanent, postfabrication phase error correction of silicon photonic circuits based on femtosecond laser irradiation. Using beam shaping technique, we achieve a 14-fold enhancement in the phase tuning resolution of the method with a Gaussian-shaped beam compared to a top-hat beam. The large improvement in the tuning resolution makes the femtosecond laser method potentially useful for very fine phase trimming of silicon photonic circuits. Finally, wemore » also show that femtosecond laser pulses can directly modify silicon photonic devices through a SiO 2 cladding layer, making it the only permanent post-fabrication method that can tune silicon photonic circuits protected by an oxide cladding.« less

Optical silicones for use in harsh operating environments

NASA Astrophysics Data System (ADS)

Riegler, Bill; Bruner, Stephen J.; Elgin, Randall

2004-12-01

The optics industry widely uses silcones for various fiber optic cable potting applications and light emitting diode protection. Optics manufacturers know traditional silicone elastomers, gels, thixotropic gels, and fluids not only perform extremely well in high temperature applications, but also offer refractive index matching so that silicones can transmit light with admirable efficiency. However, because environmental conditions may affect a material's performance over time, one must also consider the conditions the device operates in to ensure long-term reliability. External environments may include exposure to a combination of UV light and temperature, while other environments may expose devices to hydrocarbon based fuels. This paper will delve into the chemistry of silicones and functional groups that lend themselves to properties such as temperature, fuel, and radiation resistance to show shy silicone is the material of choice for optic applications under normally harmful forms of exposure. Data will be presented to examine silicone's performance in these environment.

Pseudo-direct bandgap transitions in silicon nanocrystals: effects on optoelectronics and thermoelectrics

NASA Astrophysics Data System (ADS)

Singh, Vivek; Yu, Yixuan; Sun, Qi-C.; Korgel, Brian; Nagpal, Prashant

2014-11-01

While silicon nanostructures are extensively used in electronics, the indirect bandgap of silicon poses challenges for optoelectronic applications like photovoltaics and light emitting diodes (LEDs). Here, we show that size-dependent pseudo-direct bandgap transitions in silicon nanocrystals dominate the interactions between (photoexcited) charge carriers and phonons, and hence the optoelectronic properties of silicon nanocrystals. Direct measurements of the electronic density of states (DOS) for different sized silicon nanocrystals reveal that these pseudo-direct transitions, likely arising from the nanocrystal surface, can couple with the quantum-confined silicon states. Moreover, we demonstrate that since these transitions determine the interactions of charge carriers with phonons, they change the light emission, absorption, charge carrier diffusion and phonon drag (Seebeck coefficient) in nanoscaled silicon semiconductors. Therefore, these results can have important implications for the design of optoelectronics and thermoelectric devices based on nanostructured silicon.While silicon nanostructures are extensively used in electronics, the indirect bandgap of silicon poses challenges for optoelectronic applications like photovoltaics and light emitting diodes (LEDs). Here, we show that size-dependent pseudo-direct bandgap transitions in silicon nanocrystals dominate the interactions between (photoexcited) charge carriers and phonons, and hence the optoelectronic properties of silicon nanocrystals. Direct measurements of the electronic density of states (DOS) for different sized silicon nanocrystals reveal that these pseudo-direct transitions, likely arising from the nanocrystal surface, can couple with the quantum-confined silicon states. Moreover, we demonstrate that since these transitions determine the interactions of charge carriers with phonons, they change the light emission, absorption, charge carrier diffusion and phonon drag (Seebeck coefficient) in nanoscaled silicon semiconductors. Therefore, these results can have important implications for the design of optoelectronics and thermoelectric devices based on nanostructured silicon. Electronic supplementary information (ESI) available. See DOI: 10.1039/c4nr04688a

Fabrication of a novel carbon nanotube & graphene based device for gas detection

NASA Astrophysics Data System (ADS)

Khosravi, Yusef; Abdi, Yaser; Arzi, Ezatollah

2018-06-01

We present a novel, simple method for gas detection using a nano-device fabricated on a silicon substrate. The proposed method is based on changing the density of state (DOS) of a graphene sheet during the gas absorption. Fabrication of the carbon nanotube (CNT) and graphene based device for gas detection includes silicon micro machining and the growth of vertically aligned CNTs. Field emission between the as-grown CNTs and the graphene sheet which is placed on top of the CNTs is measured at a liquid nitrogen temperature to obtain the DOS of the structure in different gas environments. The measured local DOS of the structure using the fabricated device showed that each gas had its own signatory spectrum. We believe that this method will open up a new and simple way of fabricating a portable gas spectroscope.

A physically transient form of silicon electronics.

PubMed

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

2012-09-28

A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

Titanium dioxide/silicon hole-blocking selective contact to enable double-heterojunction crystalline silicon-based solar cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nagamatsu, Ken A., E-mail: knagamat@princeton.edu; Man, Gabriel; Jhaveri, Janam

2015-03-23

In this work, we use an electron-selective titanium dioxide (TiO{sub 2}) heterojunction contact to silicon to block minority carrier holes in the silicon from recombining at the cathode contact of a silicon-based photovoltaic device. We present four pieces of evidence demonstrating the beneficial effect of adding the TiO{sub 2} hole-blocking layer: reduced dark current, increased open circuit voltage (V{sub OC}), increased quantum efficiency at longer wavelengths, and increased stored minority carrier charge under forward bias. The importance of a low rate of recombination of minority carriers at the Si/TiO{sub 2} interface for effective blocking of minority carriers is quantitatively described.more » The anode is made of a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) heterojunction to silicon which forms a hole selective contact, so that the entire device is made at a maximum temperature of 100 °C, with no doping gradients or junctions in the silicon. A low rate of recombination of minority carriers at the Si/TiO{sub 2} interface is crucial for effective blocking of minority carriers. Such a pair of complementary carrier-selective heterojunctions offers a path towards high-efficiency silicon solar cells using relatively simple and near-room temperature fabrication techniques.« less

Silicone-Based Triboelectric Nanogenerator for Water Wave Energy Harvesting.

PubMed

Xiao, Tian Xiao; Jiang, Tao; Zhu, Jian Xiong; Liang, Xi; Xu, Liang; Shao, Jia Jia; Zhang, Chun Lei; Wang, Jie; Wang, Zhong Lin

2018-01-31

Triboelectric nanogenerator (TENG) has been proven to be efficient for harvesting water wave energy, which is one of the most promising renewable energy sources. In this work, a TENG with a silicone rubber/carbon black composite electrode was designed for converting the water wave energy into electricity. The silicone-based electrode with a soft texture provides a better contact with the dielectric film. Furthermore, a spring structure is introduced to transform low-frequency water wave motions into high-frequency vibrations. They together improve the output performance and efficiency of TENG. The output performances of TENGs are further enhanced by optimizing the triboelectric material pair and tribo-surface area. A spring-assisted TENG device with the segmented silicone rubber-based electrode structure was sealed into a waterproof box, which delivers a maximum power density of 2.40 W m -3 , as triggered by the water waves. The present work provides a new strategy for fabricating high-performance TENG devices by coupling flexible electrodes and spring structure for harvesting water wave energy.

Recent advances in small molecule OLED-on-silicon microdisplays

NASA Astrophysics Data System (ADS)

Ghosh, Amalkumar P.; Ali, Tariq A.; Khayrullin, Ilyas; Vazan, Fridrich; Prache, Olivier F.; Wacyk, Ihor

2009-08-01

High resolution OLED-on-silicon microdisplay technology is unique and challenging since it requires very small subpixel dimensions (~ 2-5 microns). eMagin's OLED microdisplay is based on white top emitter architecture using small molecule organic materials. The devices are fabricated using high Tg materials. The devices are hermetically sealed with vacuum deposited thin film layers. LCD-type color filters are patterned using photolithography methods to generate primary R, G, B colors. Results of recent improvements in the OLED-on-silicon microdisplay technology, with emphasis on efficiencies, lifetimes, grey scale and CIE color coordinates for SVGA and SXGA resolution microdisplays is presented.

A Ratiometric Wavelength Measurement Based on a Silicon-on-Insulator Directional Coupler Integrated Device

PubMed Central

Wang, Pengfei; Hatta, Agus Muhamad; Zhao, Haoyu; Zheng, Jie; Farrell, Gerald; Brambilla, Gilberto

2015-01-01

A ratiometric wavelength measurement based on a Silicon-on-Insulator (SOI) integrated device is proposed and designed, which consists of directional couplers acting as two edge filters with opposite spectral responses. The optimal separation distance between two parallel silicon waveguides and the interaction length of the directional coupler are designed to meet the desired spectral response by using local supermodes. The wavelength discrimination ability of the designed ratiometric structure is demonstrated by a beam propagation method numerically and then is verified experimentally. The experimental results have shown a general agreement with the theoretical models. The ratiometric wavelength system demonstrates a resolution of better than 50 pm at a wavelength around 1550 nm with ease of assembly and calibration. PMID:26343668

Electron-beam-induced information storage in hydrogenated amorphous silicon devices

DOEpatents

Yacobi, B.G.

1985-03-18

A method for recording and storing information in a hydrogenated amorphous silicon device, comprising: depositing hydrogenated amorphous silicon on a substrate to form a charge collection device; and generating defects in the hydrogenated amorphous silicon device, wherein the defects act as recombination centers that reduce the lifetime of carriers, thereby reducing charge collection efficiency and thus in the charge collection mode of scanning probe instruments, regions of the hydrogenated amorphous silicon device that contain the defects appear darker in comparison to regions of the device that do not contain the defects, leading to a contrast formation for pattern recognition and information storage.

Si photonics technology for future optical interconnection

NASA Astrophysics Data System (ADS)

Zheng, Xuezhe; Krishnamoorthy, Ashok V.

2011-12-01

Scaling of computing systems require ultra-efficient interconnects with large bandwidth density. Silicon photonics offers a disruptive solution with advantages in reach, energy efficiency and bandwidth density. We review our progress in developing building blocks for ultra-efficient WDM silicon photonic links. Employing microsolder based hybrid integration with low parasitics and high density, we optimize photonic devices on SOI platforms and VLSI circuits on more advanced bulk CMOS technology nodes independently. Progressively, we successfully demonstrated single channel hybrid silicon photonic transceivers at 5 Gbps and 10 Gbps, and 80 Gbps arrayed WDM silicon photonic transceiver using reverse biased depletion ring modulators and Ge waveguide photo detectors. Record-high energy efficiency of less than 100fJ/bit and 385 fJ/bit were achieved for the hybrid integrated transmitter and receiver, respectively. Waveguide grating based optical proximity couplers were developed with low loss and large optical bandwidth to enable multi-layer intra/inter-chip optical interconnects. Thermal engineering of WDM devices by selective substrate removal, together with WDM link using synthetic wavelength comb, we significantly improved the device tuning efficiency and reduced the tuning range. Using these innovative techniques, two orders of magnitude tuning power reduction was achieved. And tuning cost of only a few 10s of fJ/bit is expected for high data rate WDM silicon photonic links.

Solid state microdosimetry.

PubMed

Bradley, P D; Rosenfeld, A B; Zaider, M

2001-09-01

A review of solid state microdosimetry is presented with an emphasis on silicon-based devices. The historical foundations and basics of microdosimetry are briefly provided. Various methods of experimental regional microdosimetry are discussed to facilitate a comparison with the more recent development of silicon microdosimetry. In particular, the performance characteristics of a proportional gas counter and a silicon microdosimeter are compared. Recent improvements in silicon microdosimetry address the issues of requirement specification, non-spherical shape, tissue equivalence, sensitive volume definition (charge collection complexity) and low noise requirements which have previously impeded the implementation of silicon-based microdosimetry. A prototype based on silicon-on-insulator technology is described along with some example results from clinical high LET radiotherapy facilities. A brief summary of the applications of microdosimetry is included. c2001 Elsevier Science B.V. All rights reserved.

Silicon photonics: Design, fabrication, and characterization of on-chip optical interconnects

NASA Astrophysics Data System (ADS)

Hsieh, I.-Wei

In recent years, the research field of silicon photonics has been developing rapidly from a concept to a demonstrated technology, and has gathered much attention from both academia and industry communities. Its many potential applications in long-haul telecommunication, mid-range data-communication, on-chip optical interconnection networks, and nano-scale sensing as well as its compatibility with electronic integrated circuits have driven much effort in realizing silicon photonics both as a disruptive technology for existing markets and as an enabling technology for new ones. Despite the promising future of silicon photonics, many fundamental issues still remain to be understood---both in the linear- and nonlinear-optical regimes. There are also many engineering challenges to make silicon photonics the gold standard in photonic integrated circuits. In this thesis, we focus on the design, fabrication, and characterization of active and passive silicon-on-insulator (SOI) photonic devices. The SOI material system differs from most conventional optical material platforms because of its high-refractive-index-contrast, which enables engineers to design very compact integrated photonic networks with sub-micron transverse waveguide dimensions and sharp bends. On the other hand, because most analytical formulas for designing waveguide devices are valid only in low-index-contrast cases, SOI photonic devices need to be analyzed numerically for accurate results. The second chapter of this thesis describes some common numerical methods such as Beam Propagation Method (BPM) and Finite Element Method (FEM) for waveguide-design simulations, and presents two design studies based on these methods. The compatibility of silicon photonic integrated circuits with conventional CMOS fabrication technology is another important aspect that distinguishes silicon photonics from others such as III-V materials and lithium niobate. However, the requirements for fabricating silicon photonic devices are quite different from those of electronic devices. Minimizing propagation losses by reducing sidewall roughness to nanometer scale over a device length of several millimeters or even centimeters has prompted researchers in academia and industry to refine the fabrication process. Chapter 3 of this thesis summarizes our efforts in fabricating silicon photonic devices using standard CMOS technology. Chapter 4 describes the characterization of nonlinear effects, including self-phase modulation (SPM), cross-phase modulation (XPM), and supercontinuum generation in silicon-wire waveguides. Silicon-wire waveguides are strip waveguides with submicron transverse dimensions, which allow strong light confinement inside the silicon core. This strong optical confinement, in addition to the large third-order nonlinear optical susceptibility of crystalline silicon, leads to a net nonlinearity which is several orders of magnitude higher than the nonlinearity of silica fiber. Significant nonlinear effects can be observed and characterized over a device length of only several millimeters in silicon wires with very small input power. These effects provide opportunities for engineers to design active silicon photonic devices which are compact and energy-efficient. Chapter 5 presents a realization of an integrated SOI optical isolator, which is a critical yet often overlooked component in photonic integrated circuits. This study shows the feasibility to make a hybrid garnet/SOI active device with very promising results. Finally, Chapter 6 summarizes our demonstration of transmitting terabit-scale data streams in silicon-wire waveguides, which is an important first-step towards enabling intra-chip interconnection networks with ultra-high bandwidths. Although the scope of this thesis is limited to providing only fractional views of the whole silicon photonics area, it provides enough references for interested readers to conduct further literature research in other aspects of silicon photonics. It is the author's hope that the thesis would convey to its readers the significance and potential of this exciting emerging technology.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachman, Daniel; Chen, Zhijiang; Wang, Christopher

Phase errors caused by fabrication variations in silicon photonic integrated circuits are an important problem, which negatively impacts device yield and performance. This study reports our recent progress in the development of a method for permanent, postfabrication phase error correction of silicon photonic circuits based on femtosecond laser irradiation. Using beam shaping technique, we achieve a 14-fold enhancement in the phase tuning resolution of the method with a Gaussian-shaped beam compared to a top-hat beam. The large improvement in the tuning resolution makes the femtosecond laser method potentially useful for very fine phase trimming of silicon photonic circuits. Finally, wemore » also show that femtosecond laser pulses can directly modify silicon photonic devices through a SiO 2 cladding layer, making it the only permanent post-fabrication method that can tune silicon photonic circuits protected by an oxide cladding.« less

Strain effects in low-dimensional silicon MOS and AlGaN/GaN HEMT devices

NASA Astrophysics Data System (ADS)

Baykan, Mehmet Onur

Strained silicon technology is a well established method to enhance sub-100nm MOSFET performance. With the scalability of process-induced strain, strained silicon channels have been used in every advanced CMOS technology since the 90nm node. At the 22nm node, due to the detrimental short channel effects, non-planar silicon CMOS has emerged as a viable solution to sustain transistor scaling without compromising the device performance. Therefore, it is necessary to conduct a physics based investigation of the effects of mechanical strain in silicon MOS device performance enhancement, as the transverse and longitudinal device dimensions scale down for future technology nodes. While silicon is widely used as the material basis for logic transistors, AlGaN/GaN HEMTs promise a superior device platform over silicon based power MOSFETs for high-frequency and high-power applications. In contrast to the mature Si crystal growth technology, the abundance of defects in the GaN material system creates obstacles for the realization of a reliable AlGaN/GaN HEMT device technology. Due to the high levels of internal mechanical strain present in AlGaN/GaN HEMTs, it is of utmost importance to understand the impact of mechanical stress on AlGaN/GaN trap generation. First, we have investigated the underlying physics of the comparable electron mobility observed in (100) and (110) sidewall silicon double-gate FinFETs, which is different from the observed planar (100) and (110) electron mobility. By conducting a systematic experimental study, it is shown that the undoped body, metal gate induced stress, and volume-inversion effects do not explain the comparable electron mobility. Using a self-consistent double-gate FinFET simulator, we have showed that for (110) FinFETs, an increased population of electrons is obtained for the Delta2 valley due to the heavy nonparabolic confinement mass, leading to a comparable average electron transport effective mass for both orientations. The width dependent strain response of tri-gate p-type FinFETs are experimentally extracted using a 4-point bending jig. It is found that the low-field piezoresistance coefficient of p-type FinFETs can be modeled by using a weighted conductance average of the top and sidewall bulk piezoresistance coefficients. Next, the strain enhancement of p-type ballistic silicon nanowire MOSFETs is studied using sp3d 5s* basis nearest-neighbor tight-binding simulations coupled with a semiclassical top-of-the-barrier transport model. Size and orientation dependent strain enhancement of ballistic hole transport is explained by the strain-induced modification of the 1D nanowire valence band density-of-states. Further insights are provided for future p-type high-performance silicon nanowire logic devices. A physics based investigation is conducted to understand the strain effects on surface roughness limited electron mobility in silicon inversion layers. Based on the evidence from electrical and material characterization, a strain-induced surface morphology change is hypothesized. To model the observed electrical characteristics, we have employed a self-consistent MOSFET mobility simulator coupled with an ad hoc strain-induced roughness modification. The strain induced surface morphology change is found to be consistent among electrical and materials characterization, as well as transport simulations. In order to bridge the gap between the drift-diffusion based models for long-channel devices and the quasi-ballistic models for nanoscale channels, a unified carrier transport model is developed using an updated one-flux theory. Including the high-field and carrier confinement effects, a surface-potential based analytical transmission expression is obtained for the entire MOSFET operation range. With the new channel transmission equation and average carrier drift velocity, a new expression for channel ballisticity is defined. Impact of mechanical strain on carrier transport for both nMOSFETs and pMOSFETs in both linear and saturation regimes is explained using the new channel transmission definitions. To understand the impact of mechanical strain on AlGaN/GaN HEMT trap generation, we have devised an experimental method to obtain the photon flux-normalized relative areal trap density distribution using photoionization spectroscopy technique. The details of the trap extraction method and the experimental setup are given. Using this setup, the trap characteristics are extracted for both ungated transmission line module (TLM) and gated HEMT devices from both Si and SiC substrates. The changes in the device trap characteristics are emphasized before and after electrical stressing. It is found through the step-voltage stressing of the AlGaN/GaN HEMT gate stack that the device degradation is due to the near bandgap trap generation, which are shown to be related to the structural defects in GaN.

Top-Down Nanofabrication and Characterization of 20 nm Silicon Nanowires for Biosensing Applications

PubMed Central

M. N, M. Nuzaihan; Hashim, U.; Md Arshad, M. K.; Ruslinda, A. Rahim; Rahman, S. F. A.; Fathil, M. F. M.; Ismail, Mohd. H.

2016-01-01

A top-down nanofabrication approach is used to develop silicon nanowires from silicon-on-insulator (SOI) wafers and involves direct-write electron beam lithography (EBL), inductively coupled plasma-reactive ion etching (ICP-RIE) and a size reduction process. To achieve nanometer scale size, the crucial factors contributing to the EBL and size reduction processes are highlighted. The resulting silicon nanowires, which are 20 nm in width and 30 nm in height (with a triangular shape) and have a straight structure over the length of 400 μm, are fabricated precisely at the designed location on the device. The device is applied in biomolecule detection based on the changes in drain current (Ids), electrical resistance and conductance of the silicon nanowires upon hybridization to complementary target deoxyribonucleic acid (DNA). In this context, the scaled-down device exhibited superior performances in terms of good specificity and high sensitivity, with a limit of detection (LOD) of 10 fM, enables for efficient label-free, direct and higher-accuracy DNA molecules detection. Thus, this silicon nanowire can be used as an improved transducer and serves as novel biosensor for future biomedical diagnostic applications. PMID:27022732

Performance of an SOI Boot-Strapped Full-Bridge MOSFET Driver, Type CHT-FBDR, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Monolithic microfabricated valves and pumps by multilayer soft lithography.

PubMed

Unger, M A; Chou, H P; Thorsen, T; Scherer, A; Quake, S R

2000-04-07

Soft lithography is an alternative to silicon-based micromachining that uses replica molding of nontraditional elastomeric materials to fabricate stamps and microfluidic channels. We describe here an extension to the soft lithography paradigm, multilayer soft lithography, with which devices consisting of multiple layers may be fabricated from soft materials. We used this technique to build active microfluidic systems containing on-off valves, switching valves, and pumps entirely out of elastomer. The softness of these materials allows the device areas to be reduced by more than two orders of magnitude compared with silicon-based devices. The other advantages of soft lithography, such as rapid prototyping, ease of fabrication, and biocompatibility, are retained.

Electron-beam-induced information storage in hydrogenated amorphous silicon device

DOEpatents

Yacobi, Ben G.

1986-01-01

A method for recording and storing information in a hydrogenated amorphous silicon device, comprising: depositing hydrogenated amorphous silicon on a substrate to form a charge-collection device; and generating defects in the hydrogenated amorphous silicon device, wherein the defects act as recombination centers that reduce the lifetime of carriers, thereby reducing charge-collection efficiency; and thus in the charge-collection mode of scanning probe instruments, regions of the hydrogenated amorphous silicon device that contain the defects appear darker in comparison to regions of the device that do not contain the defects, leading to a contrast formation for pattern recognition and information storage, in the device, which darkened areas can be restored to their original charge-collection efficiency by heating the hydrogenated amorphous silicon to a temperature of about 100.degree. C. to 250.degree. C. for a sufficient period of time to provide for such restoration.

All-silicon tandem solar cells: Practical limits for energy conversion and possible routes for improvement

NASA Astrophysics Data System (ADS)

Jia, Xuguang; Puthen-Veettil, Binesh; Xia, Hongze; Yang, Terry Chien-Jen; Lin, Ziyun; Zhang, Tian; Wu, Lingfeng; Nomoto, Keita; Conibeer, Gavin; Perez-Wurfl, Ivan

2016-06-01

Silicon nanocrystals (Si NCs) embedded in a dielectric matrix is regarded as one of the most promising materials for the third generation photovoltaics, owing to their tunable bandgap that allows fabrication of optimized tandem devices. Previous work has demonstrated fabrication of Si NCs based tandem solar cells by sputter-annealing of thin multi-layers of silicon rich oxide and SiO2. However, these device efficiencies were much lower than expected given that their theoretical values are much higher. Thus, it is necessary to understand the practical conversion efficiency limits for these devices. In this article, practical efficiency limits of Si NC based double junction tandem cells determined by fundamental material properties such as minority carrier, mobility, and lifetime are investigated. The practical conversion efficiency limits for these devices are significantly different from the reported efficiency limits which use Shockley-Queisser assumptions. Results show that the practical efficiency limit of a double junction cell (1.6 eV Si NC top cell and a 25% efficient c-Si PERL cell as the bottom cell) is 32%. Based on these results suggestions for improvement to the performance of Si nanocrystal based tandem solar cells in terms of the different parameters that were simulated are presented.

Embedding solar cell materials with on-board integrated energy storage for load-leveling and dark power delivery (Presentation Recording)

NASA Astrophysics Data System (ADS)

Pint, Cary L.; Westover, Andrew S.; Cohn, Adam P.; Erwin, William R.; Share, Keith; Metke, Thomas; Bardhan, Rizia

2015-10-01

This work will discuss our recent advances focused on integrating high power energy storage directly into the native materials of both conventional photovoltaics (PV) and dye-sensitized solar cells (DSSCs). In the first case (PV), we demonstrate the ability to etch high surface-area porous silicon charge storage interfaces directly into the backside of a conventional polycrystalline silicon photovoltaic device exhibiting over 14% efficiency. These high surface area materials are then coupled with solid-state ionic liquid-polymer electrolytes to produce solid-state fully integrated devices where the PV device can directly inject charge into an on-board supercapacitor that can be separately discharged under dark conditions with a Coulombic efficiency of 84%. In a similar manner, we further demonstrate that surface engineered silicon materials can be utilized to replace Pt counterelectrodes in conventional DSSC energy conversion devices. As the silicon counterelectrodes rely strictly on surface Faradaic chemical reactions with the electrolyte on one side of the wafer electrode, we demonstrate double-sided processing of electrodes that enables dual-function of the material for simultaneous energy storage and conversion, each on opposing sides. In both of these devices, we demonstrate the ability to produce an all-silicon coupled energy conversion and storage system through the common ability to convert unused silicon in solar cells into high power silicon-based supercapacitors. Beyond the proof-of-concept design and performance of this integrated solar-storage system, this talk will conclude with a brief discussion of the hurdles and challenges that we envision for this emerging area both from a fundamental and technological viewpoint.

Verilog-A Device Models for Cryogenic Temperature Operation of Bulk Silicon CMOS Devices

NASA Technical Reports Server (NTRS)

Akturk, Akin; Potbhare, Siddharth; Goldsman, Neil; Holloway, Michael

2012-01-01

Verilog-A based cryogenic bulk CMOS (complementary metal oxide semiconductor) compact models are built for state-of-the-art silicon CMOS processes. These models accurately predict device operation at cryogenic temperatures down to 4 K. The models are compatible with commercial circuit simulators. The models extend the standard BSIM4 [Berkeley Short-channel IGFET (insulated-gate field-effect transistor ) Model] type compact models by re-parameterizing existing equations, as well as adding new equations that capture the physics of device operation at cryogenic temperatures. These models will allow circuit designers to create optimized, reliable, and robust circuits operating at cryogenic temperatures.

Performance study of double SOI image sensors

NASA Astrophysics Data System (ADS)

Miyoshi, T.; Arai, Y.; Fujita, Y.; Hamasaki, R.; Hara, K.; Ikegami, Y.; Kurachi, I.; Nishimura, R.; Ono, S.; Tauchi, K.; Tsuboyama, T.; Yamada, M.

2018-02-01

Double silicon-on-insulator (DSOI) sensors composed of two thin silicon layers and one thick silicon layer have been developed since 2011. The thick substrate consists of high resistivity silicon with p-n junctions while the thin layers are used as SOI-CMOS circuitry and as shielding to reduce the back-gate effect and crosstalk between the sensor and the circuitry. In 2014, a high-resolution integration-type pixel sensor, INTPIX8, was developed based on the DSOI concept. This device is fabricated using a Czochralski p-type (Cz-p) substrate in contrast to a single SOI (SSOI) device having a single thin silicon layer and a Float Zone p-type (FZ-p) substrate. In the present work, X-ray spectra of both DSOI and SSOI sensors were obtained using an Am-241 radiation source at four gain settings. The gain of the DSOI sensor was found to be approximately three times that of the SSOI device because the coupling capacitance is reduced by the DSOI structure. An X-ray imaging demonstration was also performed and high spatial resolution X-ray images were obtained.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2004-12-07

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process For Direct Integration Of A Thin-Film Silicon P-N Junction Diode With A Magnetic Tunnel Junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2005-08-23

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2003-01-01

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Infrared charge-injection-device array performance at low background

NASA Technical Reports Server (NTRS)

Mccreight, C. R.; Goebel, J. H.

1981-01-01

Low-background tests of a 1 x 32 Si:Bi charge-injection-device (CID) IR detector are carried out to evaluate its feasibility for space-based astronomical observations. Optimum performance is obtained at a temperature of 11 K. The sensitivity is found to compare well with that of discrete extrinsic silicon photoconductors. The measured sensitivity and the apparent absence of anomalous effects make extrinsic silicon CID arrays very promising for astronomical applications.

R&D issues in scale-up and manufacturing of amorphous silicon tandem modules

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arya, R.R.; Carlson, D.E.; Chen, L.F.

1999-03-01

R & D on amorphous silicon based tandem junction devices has improved the throughtput, the material utilization, and the performance of devices on commercial tin oxide coated glass. The tandem junction technology has been scaled-up to produce 8.6&hthinsp;Ft{sup 2} monolithically integrated modules in manufacturing at the TF1 plant. Optimization of performance and stability of these modules is ongoing. {copyright} {ital 1999 American Institute of Physics.}

Crystalline silicon photovoltaics via low-temperature TiO 2/Si and PEDOT/Si heterojunctions

NASA Astrophysics Data System (ADS)

Nagamatsu, Ken Alfred

The most important goals in developing solar cell technology are to achieve high power conversion efficiencies and lower costs of manufacturing. Solar cells based on crystalline silicon currently dominate the market because they can achieve high efficiency. However, conventional p-n junction solar cells require high-temperature diffusions of dopants, and conventional heterojunction cells based on amorphous silicon require plasma-enhanced deposition, both of which can add manufacturing costs. This dissertation investigates an alternative approach, which is to form crystalline-silicon-based solar cells using heterojunctions with materials that are easily deposited at low temperatures and without plasma enhancement, such as organic semiconductors and metal oxides. We demonstrate a heterojunction between the organic polymer, poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT), and crystalline silicon, which acts as a hole-selective contact and an alternative to a diffused p-n junction. We also present the use of a heterojunction between titanium dioxide and crystalline silicon as a passivating electron-selective contact. The Si/TiO2 heterojunction is demonstrated for the first time as a back-surface field in a crystalline silicon solar cell, and is incorporated into a PEDOT/Si device. The resulting PEDOT/Si/TiO2 solar cell represents an alternative to conventional silicon solar cells that rely on thermally-diffused junctions or plasma-deposited heterojunctions. Finally, we investigate the merits of using conductive networks of silver nanowires to enhance the photovoltaic performance of PEDOT/Si solar cells. The investigation of these materials and devices contributes to the growing body of work regarding crystalline silicon solar cells made with selective contacts.

Lithographic fabrication of nanoapertures

DOEpatents

Fleming, James G.

2003-01-01

A new class of silicon-based lithographically defined nanoapertures and processes for their fabrication using conventional silicon microprocessing technology have been invented. The new ability to create and control such structures should significantly extend our ability to design and implement chemically selective devices and processes.

Potentialities of silicon nanowire forests for thermoelectric generation

NASA Astrophysics Data System (ADS)

Dimaggio, Elisabetta; Pennelli, Giovanni

2018-04-01

Silicon is a material with very good thermoelectric properties, with regard to Seebeck coefficient and electrical conductivity. Low thermal conductivities, and hence high thermal to electrical conversion efficiencies, can be achieved in nanostructures, which are smaller than the phonon mean free path but large enough to preserve the electrical conductivity. We demonstrate that it is possible to fabricate a leg of a thermoelectric generator based on large collections of long nanowires, placed perpendicularly to the two faces of a silicon wafer. The process exploits the metal assisted etching technique which is simple, low cost, and can be easily applied to large surfaces. Copper can be deposited by electrodeposition on both faces, so that contacts can be provided, on top of the nanowires. Thermal conductivity of silicon nanowire forests with more than 107 nanowires mm-2 have been measured; the result is comparable with that achieved by several groups on devices based on few nanowires. On the basis of the measured parameters, numerical calculations of the efficiency of silicon-based thermoelectric generators are reported, and the potentialities of these devices for thermal to electrical energy conversion are shown. Criteria to improve the conversion efficiency are suggested and described.

SiC Technology

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

1998-01-01

Silicon carbide (SiC)-based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching [1- 4] for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications [5-7] to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be realized in experimental SiC devices, primarily due to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems [9]. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high temperature and/or high power SiC electronics are identified.

Broadband transverse magnetic pass polarizer with low insertion loss based on silicon nitride waveguide

NASA Astrophysics Data System (ADS)

Sharma, Tarun Kumar; Ranganath, Praveen; Nambiar, Siddharth; Selvaraja, Shankar Kumar

2018-03-01

A horizontally asymmetric transverse magnetic (TM) pass polarizer is presented. The device passes only TM mode and rejects transverse electric (TE) mode. The proposed device has an asymmetricity in the horizontal direction comprising a direction coupler region with a silicon waveguide, silicon nitride waveguide, and an air gap, all residing on silica. Between three equal width Si waveguides, we have one region filled with air and the other with SiN with unequal optimized widths. The device with its optimal dimensions yields an extremely low insertion loss (IL) of 0.16 dB for TM→TM, while TE is rejected by an IL of >48 dB. The proposed polarizer is operated between C&L bands with a high extinction ratio and broadband width of about 110 nm.

Vertical power MOS transistor as a thermoelectric quasi-nanowire device

NASA Astrophysics Data System (ADS)

Roizin, Gregory; Beeri, Ofer; Peretz, Mor Mordechai; Gelbstein, Yaniv

2016-12-01

Nano-materials exhibit superior performance over bulk materials in a variety of applications such as direct heat to electricity thermoelectric generators (TEGs) and many more. However, a gap still exists for the integration of these nano-materials into practical applications. This study explores the feasibility of utilizing the advantages of nano-materials' thermo-electric properties, using regular bulk technology. Present-day TEGs are often applied by dedicated thermoelectric materials such as semiconductor alloys (e.g., PbTe, BiTe) whereas the standard semiconductor materials such as the doped silicon have not been widely addressed, with limited exceptions of nanowires. This study attempts to close the gap between the nano-materials' properties and the well-established bulk devices, approached for the first time by exploiting the nano-metric dimensions of the conductive channel in metal-oxide-semiconductor (MOS) structures. A significantly higher electrical current than expected from a bulk silicon device has been experimentally measured as a result of the application of a positive gate voltage and a temperature gradient between the "source" and the "drain" terminals of a commercial NMOS transistor. This finding implies on a "quasi-nanowire" behaviour of the transistor channel, which can be easily controlled by the transistor's gate voltage that is applied. This phenomenon enables a considerable improvement of silicon based TEGs, fabricated by traditional silicon technology. Four times higher ZT values (TEG quality factor) compared to conventional bulk silicon have been observed for an off-the-shelf silicon device. By optimizing the device, it is believed that even higher ZT values can be achieved.

A silicon carbide array for electrocorticography and peripheral nerve recording.

PubMed

Diaz-Botia, C A; Luna, L E; Neely, R M; Chamanzar, M; Carraro, C; Carmena, J M; Sabes, P N; Maboudian, R; Maharbiz, M M

2017-10-01

Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

A silicon carbide array for electrocorticography and peripheral nerve recording

NASA Astrophysics Data System (ADS)

Diaz-Botia, C. A.; Luna, L. E.; Neely, R. M.; Chamanzar, M.; Carraro, C.; Carmena, J. M.; Sabes, P. N.; Maboudian, R.; Maharbiz, M. M.

2017-10-01

Objective. Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. Approach. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. Main results. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Significance. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

Hybrid Integrated Platforms for Silicon Photonics

PubMed Central

Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

2010-01-01

A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

Nanophotonic applications for silicon-on-insulator (SOI)

NASA Astrophysics Data System (ADS)

de la Houssaye, Paul R.; Russell, Stephen D.; Shimabukuro, Randy L.

2004-07-01

Silicon-on-insulator is a proven technology for very large scale integration of microelectronic devices. The technology also offers the potential for development of nanophotonic devices and the ability to interface such devices to the macroscopic world. This paper will report on fabrication techniques used to form nano-structured silicon wires on an insulating structure that is amenable to interfacing nanostructured sensors with high-performance microelectronic circuitry for practical implementation. Nanostructures formed on silicon-on-sapphire can also exploit the transparent substrate for novel device geometries. This research harnesses the unique properties of a high-quality single crystal film of silicon on sapphire and uses the film thickness as one of the confinement dimensions. Lateral arrays of silicon nanowires were fabricated in the thin (5 to 20 nm) silicon layer and studied. This technique offers simplified contact to individual wires and provides wire surfaces that are more readily accessible for controlled alteration and device designs.

All-solid-state supercapacitors on silicon using graphene from silicon carbide

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Bei; Ahmed, Mohsin; Iacopi, Francesca, E-mail: f.iacopi@griffith.edu.au

2016-05-02

Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitancemore » behavior with a specific area capacitance of up to 174 μF cm{sup −2} with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.« less

A Physically Transient Form of Silicon Electronics, With Integrated Sensors, Actuators and Power Supply

PubMed Central

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A.; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L.; Zakin, Mitchell R.; Slepian, Marvin J.; Huang, Yonggang; Omenetto, Fiorenzo G.; Rogers, John A.

2013-01-01

A remarkable feature of modern silicon electronics is its ability to remain functionally and physically invariant, almost indefinitely for many practical purposes. Here, we introduce a silicon-based technology that offers the opposite behavior: it gradually vanishes over time, in a well-controlled, programmed manner. Devices that are ‘transient’ in this sense create application possibilities that cannot be addressed with conventional electronics, such as active implants that exist for medically useful timeframes, but then completely dissolve and disappear via resorption by the body. We report a comprehensive set of materials, manufacturing schemes, device components and theoretical design tools for a complementary metal oxide semiconductor (CMOS) electronics of this type, together with four different classes of sensors and actuators in addressable arrays, two options for power supply and a wireless control strategy. A transient silicon device capable of delivering thermal therapy in an implantable mode and its demonstration in animal models illustrate a system-level example of this technology. PMID:23019646

Coherent manipulation of a Si/SiGe-based singlet-triplet qubit

NASA Astrophysics Data System (ADS)

Gyure, Mark

2012-02-01

Electrically defined silicon-based qubits are expected to show improved quantum memory characteristics in comparison to GaAs-based devices due to reduced hyperfine interactions with nuclear spins. Silicon-based qubit devices have proved more challenging to build than their GaAs-based counterparts, but recently several groups have reported substantial progress in single-qubit initialization, measurement, and coherent operation. We report [1] coherent control of electron spins in two coupled quantum dots in an undoped Si/SiGe heterostructure, forming two levels of a singlet-triplet qubit. We measure a nuclei-induced T2^* of 360 ns, an increase over similar measurements in GaAs-based quantum dots by nearly two orders of magnitude. We also describe the results from detailed modeling of our materials and devices that show this value for T2^* is consistent with theoretical expectations for our estimated dot sizes and a natural abundance of ^29Si. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressly or implied, of the United States Department of Defense or the U.S. Government. Approved for public release, distribution unlimited.[4pt] [1] B. M. Maune et al., ``Coherent Singlet-Triplet Oscillations in a Silicon-based Double Quantum Dot,'' accepted by Nature.

Mode-converting coupler for silicon-on-sapphire devices

NASA Astrophysics Data System (ADS)

Zlatanovic, S.; Offord, B. W.; Owen, M.; Shimabukuro, R.; Jacobs, E. W.

2015-02-01

Silicon-on-sapphire devices are attractive for the mid-infrared optical applications up to 5 microns due to the low loss of both silicon and sapphire in this wavelength band. Designing efficient couplers for silicon-on-sapphire devices presents a challenge due to a highly confined mode in silicon and large values of refractive index of both silicon and sapphire. Here, we present design, fabrication, and measurements of a mode-converting coupler for silicon-on-sapphire waveguides. We utilize a mode converter layout that consists of a large waveguide that is overlays a silicon inverse tapered waveguide. While this geometry was previously utilized for silicon-on-oxide devices, the novelty is in using materials that are compatible with the silicon-on-sapphire platform. In the current coupler the overlaying waveguide is made of silicon nitride. Silicon nitride is the material of choice because of the large index of refraction and low absorption from near-infrared to mid-infrared. The couplers were fabricated using a 0.25 micron silicon-on-sapphire process. The measured coupling loss from tapered lensed silica fibers to the silicon was 4.8dB/coupler. We will describe some challenges in fabrication process and discuss ways to overcome them.

Origami silicon optoelectronics for hemispherical electronic eye systems.

PubMed

Zhang, Kan; Jung, Yei Hwan; Mikael, Solomon; Seo, Jung-Hun; Kim, Munho; Mi, Hongyi; Zhou, Han; Xia, Zhenyang; Zhou, Weidong; Gong, Shaoqin; Ma, Zhenqiang

2017-11-24

Digital image sensors in hemispherical geometries offer unique imaging advantages over their planar counterparts, such as wide field of view and low aberrations. Deforming miniature semiconductor-based sensors with high-spatial resolution into such format is challenging. Here we report a simple origami approach for fabricating single-crystalline silicon-based focal plane arrays and artificial compound eyes that have hemisphere-like structures. Convex isogonal polyhedral concepts allow certain combinations of polygons to fold into spherical formats. Using each polygon block as a sensor pixel, the silicon-based devices are shaped into maps of truncated icosahedron and fabricated on flexible sheets and further folded either into a concave or convex hemisphere. These two electronic eye prototypes represent simple and low-cost methods as well as flexible optimization parameters in terms of pixel density and design. Results demonstrated in this work combined with miniature size and simplicity of the design establish practical technology for integration with conventional electronic devices.

Summary of theoretical and experimental investigation of grating type, silicon photovoltaic cells. [using p-n junctions on light receiving surface of base crystal

NASA Technical Reports Server (NTRS)

Chen, L. Y.; Loferski, J. J.

1975-01-01

Theoretical and experimental aspects are summarized for single crystal, silicon photovoltaic devices made by forming a grating pattern of p/n junctions on the light receiving surface of the base crystal. Based on the general semiconductor equations, a mathematical description is presented for the photovoltaic properties of such grating-like structures in a two dimensional form. The resulting second order elliptical equation is solved by computer modeling to give solutions for various, reasonable, initial values of bulk resistivity, excess carrier concentration, and surface recombination velocity. The validity of the computer model is established by comparison with p/n devices produced by alloying an aluminum grating pattern into the surface of n-type silicon wafers. Current voltage characteristics and spectral response curves are presented for cells of this type constructed on wafers of different resistivities and orientations.

Full-color OLED on silicon microdisplay

NASA Astrophysics Data System (ADS)

Ghosh, Amalkumar P.

2002-02-01

eMagin has developed numerous enhancements to organic light emitting diode (OLED) technology, including a unique, up- emitting structure for OLED-on-silicon microdisplay devices. Recently, eMagin has fabricated full color SVGA+ resolution OLED microdisplays on silicon, with over 1.5 million color elements. The display is based on white light emission from OLED followed by LCD-type red, green and blue color filters. The color filters are patterned directly on OLED devices following suitable thin film encapsulation and the drive circuits are built directly on single crystal silicon. The resultant color OLED technology, with hits high efficiency, high brightness, and low power consumption, is ideally suited for near to the eye applications such as wearable PCS, wireless Internet applications and mobile phone, portable DVD viewers, digital cameras and other emerging applications.

Use of silicon oxynitride as a sacrificial material for microelectromechanical devices

DOEpatents

Habermehl, Scott D.; Sniegowski, Jeffry J.

2001-01-01

The use of silicon oxynitride (SiO.sub.x N.sub.y) as a sacrificial material for forming a microelectromechanical (MEM) device is disclosed. Whereas conventional sacrificial materials such as silicon dioxide and silicate glasses are compressively strained, the composition of silicon oxynitride can be selected to be either tensile-strained or substantially-stress-free. Thus, silicon oxynitride can be used in combination with conventional sacrificial materials to limit an accumulation of compressive stress in a MEM device; or alternately the MEM device can be formed entirely with silicon oxynitride. Advantages to be gained from the use of silicon oxynitride as a sacrificial material for a MEM device include the formation of polysilicon members that are substantially free from residual stress, thereby improving the reliability of the MEM device; an ability to form the MEM device with a higher degree of complexity and more layers of structural polysilicon than would be possible using conventional compressively-strained sacrificial materials; and improved manufacturability resulting from the elimination of wafer distortion that can arise from an excess of accumulated stress in conventional sacrificial materials. The present invention is useful for forming many different types of MEM devices including accelerometers, sensors, motors, switches, coded locks, and flow-control devices, with or without integrated electronic circuitry.

Gating electrical transport through DNA molecules that bridge between silicon nanogaps.

PubMed

Takagi, Shogo; Takada, Tadao; Matsuo, Naoto; Yokoyama, Shin; Nakamura, Mitsunobu; Yamana, Kazushige

2012-03-21

DNA electronic devices were prepared on silicon-based three-terminal electrodes. Both ends of DNA molecules (400 bp long, mixed sequences) were bridged via chemical bonds between the source-drain nanogap (120 nm) electrodes. S-Shaped I-V curves were obtained and the electric current can be modulated by the gate voltage. The DNA molecules act as semiconducting p-type nanowires in the three-terminal device. This journal is © The Royal Society of Chemistry 2012

A MEMS Infrared Thermopile Fabricated from Silicon-On-Insulator with Phononic Crystal Structures and Carbon Nanotube Absorption Layer

NASA Astrophysics Data System (ADS)

Gray, Kory Forrest

The goal of this project was to examine the possibility of creating a novel thermal infrared detector based on silicon CMOS technology that has been enhanced by the latest nano-engineering discoveries. Silicon typically is not thought as an efficient thermoelectric material. However recent advancements in nanotechnology have improved the potential for a highly sensitive infrared detector based on nano-structured silicon. The thermal conductivity of silicon has been shown to be reduced from 150 W/mK down to 60 W/mK just by decreasing the scale of the silicon from bulk down to the sub-micron scale. Further reduction of the thermal conductivity has been shown by patterning silicon with a phonon crystal structure which has been reported to have thermal conductivities down to 10 W/mK. The phonon crystal structure consists of a 2D array of holes that are etched into the silicon. The size and pitch of the holes are on the order of the mean free path of the phonons in silicon which is approximately 200-500nm. This particular device had 200nm holes on a 400nm pitch. The Seebeck coefficient of silicon can also be enhanced by the reduction of the material from the bulk to sub-micron scale and with degenerate level doping. The combination of decreased thermal conductivity and increased Seebeck coefficient allow silicon to be a promising material for thermoelectric infrared detectors. The highly doped silicon is desired to reduce the electrical resistance of the device. The low electrical resistance is required to reduce the Johnson noise of the device which is the dominant noise source for most thermal detectors. This project designed a MEMS thermopile using a silicon-on-insulator substrate, and a CMOS compatible process. The basic thermopile consists of a silicon dioxide membrane with phononic crystal patterned silicon thermocouples around the edges of the membrane. Vertical aligned, multi-walled, carbon nanotubes were used as the infrared absorption layer. A MEMS thermoelectric detector with a D* of 3 * 107 cm Hz 0.5/W was demonstrated with a time response of 3-10 milliseconds. With this initial research, it is possible to improve the D* to the high 108 cm Hz 0.5/W range by slightly changing the design of the thermopile and patterning the absorption layer.

Fabrication of flexible and vertical silicon nanowire electronics.

PubMed

Weisse, Jeffrey M; Lee, Chi Hwan; Kim, Dong Rip; Zheng, Xiaolin

2012-06-13

Vertical silicon nanowire (SiNW) array devices directly connected on both sides to metallic contacts were fabricated on various non-Si-based substrates (e.g., glass, plastics, and metal foils) in order to fully exploit the nanomaterial properties for final applications. The devices were realized with uniform length Ag-assisted electroless etched SiNW arrays that were detached from their fabrication substrate, typically Si wafers, reattached to arbitrary substrates, and formed with metallic contacts on both sides of the NW array. Electrical characterization of the SiNW array devices exhibits good current-voltage characteristics consistent with the SiNW morphology.

Experimental observation of polarized electroluminescence from edge-emission organic light emitting devices

NASA Astrophysics Data System (ADS)

Ran, G. Z.; Jiang, D. F.; Kan, Q.; Chen, H. D.

2010-12-01

We have observed a strongly polarized edge-emission from an organic light emitting device (OLED) with a silicon anode and a stacked Sm/Au (or Ag) cathode. For the OLED with a Sm/Au cathode, the transverse magnetic (TM) mode is stronger than the transverse electric (TE) mode by a factor of 2, while the polarization ratio of TM:TE is close to 300 for that with a Sm/Ag cathode. The polarization results from the scattering of surface plasmon polaritons at the device boundary. Such a silicon-based OLED is potentially an electrically excited SPP source in plasmonics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moreno, Gilbert; Bennion, Kevin

This project will develop thermal management strategies to enable efficient and high-temperature wide-bandgap (WBG)-based power electronic systems (e.g., emerging inverter and DC-DC converter designs). The use of WBG-based devices in automotive power electronics will improve efficiency and increase driving range in electric-drive vehicles; however, the implementation of this technology is limited, in part, due to thermal issues. This project will develop system-level thermal models to determine the thermal limitations of current automotive power modules under elevated device temperature conditions. Additionally, novel cooling concepts and material selection will be evaluated to enable high-temperature silicon and WBG devices in power electronics components.more » WBG devices (silicon carbide [SiC], gallium nitride [GaN]) promise to increase efficiency, but will be driven as hard as possible. This creates challenges for thermal management and reliability.« less

Angle-resolved diffraction grating biosensor based on porous silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lv, Changwu; Li, Peng; Jia, Zhenhong, E-mail: jzhh@xju.edu.cn

2016-03-07

In this study, an optical biosensor based on a porous silicon composite structure was fabricated using a simple method. This structure consists of a thin, porous silicon surface diffraction grating and a one-dimensional porous silicon photonic crystal. An angle-resolved diffraction efficiency spectrum was obtained by measuring the diffraction efficiency at a range of incident angles. The angle-resolved diffraction efficiency of the 2nd and 3rd orders was studied experimentally and theoretically. The device was sensitive to the change of refractive index in the presence of a biomolecule indicated by the shift of the diffraction efficiency spectrum. The sensitivity of this sensormore » was investigated through use of an 8 base pair antifreeze protein DNA hybridization. The shifts of the angle-resolved diffraction efficiency spectrum showed a relationship with the change of the refractive index, and the detection limit of the biosensor reached 41.7 nM. This optical device is highly sensitive, inexpensive, and simple to fabricate. Using shifts in diffraction efficiency spectrum to detect biological molecules has not yet been explored, so this study establishes a foundation for future work.« less

Silicide/Silicon Hetero-Junction Structure for Thermoelectric Applications.

PubMed

Jun, Dongsuk; Kim, Soojung; Choi, Wonchul; Kim, Junsoo; Zyung, Taehyoung; Jang, Moongyu

2015-10-01

We fabricated silicide/silicon hetero-junction structured thermoelectric device by CMOS process for the reduction of thermal conductivity with the scatterings of phonons at silicide/silicon interfaces. Electrical conductivities, Seebeck coefficients, power factors, and temperature differences are evaluated using the steady state analysis method. Platinum silicide/silicon multilayered structure showed an enhanced Seebeck coefficient and power factor characteristics, which was considered for p-leg element. Also, erbium silicide/silicon structure showed an enhanced Seebeck coefficient, which was considered for an n-leg element. Silicide/silicon multilayered structure is promising for thermoelectric applications by reducing thermal conductivity with an enhanced Seebeck coefficient. However, because of the high thermal conductivity of the silicon packing during thermal gradient is not a problem any temperature difference. Therefore, requires more testing and analysis in order to overcome this problem. Thermoelectric generators are devices that based on the Seebeck effect, convert temperature differences into electrical energy. Although thermoelectric phenomena have been used for heating and cooling applications quite extensively, it is only in recent years that interest has increased in energy generation.

Graphene as a transparent electrode for amorphous silicon-based solar cells

NASA Astrophysics Data System (ADS)

Vaianella, F.; Rosolen, G.; Maes, B.

2015-06-01

The properties of graphene in terms of transparency and conductivity make it an ideal candidate to replace indium tin oxide (ITO) in a transparent conducting electrode. However, graphene is not always as good as ITO for some applications, due to a non-negligible absorption. For amorphous silicon photovoltaics, we have identified a useful case with a graphene-silica front electrode that improves upon ITO. For both electrode technologies, we simulate the weighted absorption in the active layer of planar amorphous silicon-based solar cells with a silver back-reflector. The graphene device shows a significantly increased absorbance compared to ITO-based cells for a large range of silicon thicknesses (34.4% versus 30.9% for a 300 nm thick silicon layer), and this result persists over a wide range of incidence angles.

Thermal ink-jet device using single-chip silicon microchannels

NASA Astrophysics Data System (ADS)

Wuu, DongSing; Cheng, Chen-Yue; Horng, RayHua; Chan, G. C.; Chiu, Sao-Ling; Wu, Yi-Yung

1998-06-01

We present a new method to fabricate silicon microfluidic channels by through-hole etching with subsequent planarization. The method is based on etching out the deep grooves through a perforated silicon carbide membrane, followed by sealing the membrane with plasma-enhanced chemical vapor deposition (PECVD). Low-pressure-chemical-vapor- deposited (LPCVD) polysilicon was used as a sacrificial layer to define the channel structure and only one etching step is required. This permits the realization of planarization after a very deep etching step in silicon and offers the possibility for film deposition, resist spinning and film patterning across deep grooves. The process technology was demonstrated on the fabrication of a monolithic silicon microchannel structure for thermal inkjet printing. The Ta-Al heater arrays are integrated on the top of each microchannel, which connect to a common on-chip front-end ink reservoir. The fabrication of this device requires six masks and no active nozzle-to-chip alignment. Moreover, the present micromachining process is compatible with the addition of on-chip circuitry for multiplexing the heater control signals. Heat transfer efficiency to the ink is enhanced by the high thermal conductivity of the silicon carbide in the channel ceiling, while the bulk silicon maintains high interchannel isolation. The fabricated inkjet devices show the droplet sizes of 20 - 50 micrometer in diameter with various channel dimensions and stable ejection of ink droplets more than 1 million.

Low-resistivity photon-transparent window attached to photo-sensitive silicon detector

DOEpatents

Holland, Stephen Edward

2000-02-15

The invention comprises a combination of a low resistivity, or electrically conducting, silicon layer that is transparent to long or short wavelength photons and is attached to the backside of a photon-sensitive layer of silicon, such as a silicon wafer or chip. The window is applied to photon sensitive silicon devices such as photodiodes, charge-coupled devices, active pixel sensors, low-energy x-ray sensors and other radiation detectors. The silicon window is applied to the back side of a photosensitive silicon wafer or chip so that photons can illuminate the device from the backside without interference from the circuit printed on the frontside. A voltage sufficient to fully deplete the high-resistivity photosensitive silicon volume of charge carriers is applied between the low-resistivity back window and the front, patterned, side of the device. This allows photon-induced charge created at the backside to reach the front side of the device and to be processed by any circuitry attached to the front side. Using the inventive combination, the photon sensitive silicon layer does not need to be thinned beyond standard fabrication methods in order to achieve full charge-depletion in the silicon volume. In one embodiment, the inventive backside window is applied to high resistivity silicon to allow backside illumination while maintaining charge isolation in CCD pixels.

Applications of Photonic Crystals to Photovoltaic Devices

NASA Astrophysics Data System (ADS)

Foster, Stephen

Photonic crystals are structures that exhibit wavelength-scale spatial periodicity in their dielectric function. They are best known for their ability to exhibit complete photonic band gaps (PBGs) - spectral regions over which no light can propagate within the crystal. PBGs are specific instances of a more general phenomenon, in which the local photonic density of states can be enhanced or suppressed over different frequency ranges by tuning the properties of the crystal. This can be used to redirect, concentrate, or even trap light incident on the crystal. In this thesis, we investigate how photonic crystals can be used to enhance the efficiency of photovoltaic devices by trapping light. Due to the many different types of photovoltaic devices in existence (varying widely in materials used, modes of operation, and internal structure), there is no single light trapping architecture that can be applied to all photovoltaics. In this work we study a number of different devices: dye-sensitized solar cells, polymer solar cells, silicon-perovskite tandem cells, and single-junction silicon cells. We propose novel photonic crystal-based light trapping designs for each type of device, and evaluate these designs numerically to demonstrate their effectiveness. Full-field optical simulations of the cell are performed for each design, using either finite element method (FEM) or finite-difference time-domain (FDTD) techniques. Where appropriate, electrical modelling of the cell is also performed, through either the use of a simple one-diode model, or by obtaining full solutions to the semiconductor drift-diffusion equations within the cell. In all cases we find that the photonic crystal-based designs significantly outperform their non-nanostructured counterparts. In the case of dye-sensitized and polymer cells, enhancements in light absorption of 33% and 40% (respectively) are seen, relative to reference cells with planar geometries. In the case of silicon-perovskite tandem cells and silicon cells, projected power conversion efficiencies of over 30% are obtained, well beyond the current world record for silicon-based cells. We conclude the thesis with a discussion on the overall prospects for photonic crystal-based solar cells, with a focus on the factors that make solar cell technologies amenable to light trapping.

Optimization of hybrid organic/inorganic poly(3-hexylthiophene-2,5-diyl)/silicon solar cells

NASA Astrophysics Data System (ADS)

Weingarten, Martin; Sanders, Simon; Stümmler, Dominik; Pfeiffer, Pascal; Vescan, Andrei; Kalisch, Holger

2016-04-01

In the last years, hybrid organic/silicon solar cells have attracted great interest in photovoltaic research due to their potential to become a low-cost alternative for the conventionally used silicon pn-junction solar cells. This work is focused on hybrid solar cells based on the polymer poly(3-hexylthiophene-2,5-diyl), which was deposited on n-doped crystalline silicon via spin-coating under ambient conditions. By employing an anisotropic etching step with potassium hydroxide (KOH), the reflection losses at the silicon surface were reduced. Hereby, the short-circuit current density of the hybrid devices was increased by 31%, leading to a maximum power conversion efficiency (PCE) of 13.1% compared to a PCE of 10.7% for the devices without KOH etching. In addition, the contacts were improved by replacing gold with the more conductive silver as top grid material to reduce the contact resistance and by introducing a thin (˜0.5 nm) lithium fluoride layer between the silicon and the aluminum backside contact to improve electron collection and hole blocking. Hereby, the open-circuit voltage and the fill factor of the hybrid solar cells were further improved and devices with very high PCE up to 14.2% have been realized.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics.

Aerospace Sensor Component and Subsystem Investigation and Innovation-2 Component Exploration and Development (ASCSII-2 CED) Delivery Order 0003: Hermetically Sealed Cavities in 3-D GaAs-Silicon and Silicon-Silicon Packages for Microelectromechanical System (MEMS) Devices Using Selective and Large-Scale Bonding

DTIC Science & Technology

2003-03-01

and silicon-to-silicon to produce cavities for 3-D assembly of MEMS devices has been demonstrated using SnAgCu and eutectic SnPb solders. Laser and...of GaAs-to-silicon and silicon-to-silicon to produce cavities for 3-D assembly of MEMS devices has been demonstrated using SnAgCu and euctectic...research_images/ 3.2 Solder Reflow The reflow profile for SnAgCu solder was developed on the Sikama convection/ conduction reflow oven using a continuous

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Water Splitting Using Porous Silicon Photo-electrodes for Hydrogen Production

NASA Astrophysics Data System (ADS)

Ali, M.; Starkov, V. V.; Gosteva, E. A.; Druzhinin, A. V.; Sattar, S.

2017-11-01

This paper presents the efficiency study results of using gradient-porous silicon structures with different morphology, as photo-anodes for photo-electrochemical dissociation of water. The results of a study of the physicochemical properties of gradient-porous silicon structures show the relatively low cost and simplicity of the technological process, as well as the possibility of forming structures with predefined properties, allow the creation of effective devices for artificial photosynthesis based on porous silicon for subsequent use in hydrogen energy.

Vacuum Microelectronic Field Emission Array Devices for Microwave Amplification.

NASA Astrophysics Data System (ADS)

Mancusi, Joseph Edward

This dissertation presents the design, analysis, and measurement of vacuum microelectronic devices which use field emission to extract an electron current from arrays of silicon cones. The arrays of regularly-spaced silicon cones, the field emission cathodes or emitters, are fabricated with an integrated gate electrode which controls the electric field at the tip of the cone, and thus the electron current. An anode or collector electrode is placed above the array to collect the emission current. These arrays, which are fabricated in a standard silicon processing facility, are developed for use as high power microwave amplifiers. Field emission has been studied extensively since it was first characterized in 1928, however due to the large electric fields required practical field emission devices are difficult to make. With the development of the semiconductor industry came the development of fabrication equipment and techniques which allow for the manufacture of the precision micron-scale structures necessary for practical field emission devices. The active region of a field emission device is a vacuum, therefore the electron travel is ballistic. This analysis of field emission devices includes electric field and electron emission modeling, development of a device equivalent circuit, analysis of the parameters in the equivalent circuit, and device testing. Variations in device structure are taken into account using a statistical model based upon device measurements. Measurements of silicon field emitter arrays at DC and RF are presented and analyzed. In this dissertation, the equivalent circuit is developed from the analysis of the device structure. The circuit parameters are calculated from geometrical considerations and material properties, or are determined from device measurements. It is necessary to include the emitter resistance in the equivalent circuit model since relatively high resistivity silicon wafers are used. As is demonstrated, the circuit model accurately predicts the magnitude of the emission current at a number of typical bias current levels when the device is operating at frequencies within the range of 10 MHz to 1 GHz. At low frequencies and at high frequencies within this range, certain parameters are negligible, and simplifications may be made in the equivalent circuit model.

A practical guide for the fabrication of microfluidic devices using glass and silicon

PubMed Central

Iliescu, Ciprian; Taylor, Hayden; Avram, Marioara; Miao, Jianmin; Franssila, Sami

2012-01-01

This paper describes the main protocols that are used for fabricating microfluidic devices from glass and silicon. Methods for micropatterning glass and silicon are surveyed, and their limitations are discussed. Bonding methods that can be used for joining these materials are summarized and key process parameters are indicated. The paper also outlines techniques for forming electrical connections between microfluidic devices and external circuits. A framework is proposed for the synthesis of a complete glass/silicon device fabrication flow. PMID:22662101

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Linear and passive silicon diodes, isolators, and logic gates

NASA Astrophysics Data System (ADS)

Li, Zhi-Yuan

2013-12-01

Silicon photonic integrated devices and circuits have offered a promising means to revolutionalize information processing and computing technologies. One important reason is that these devices are compatible with conventional complementary metal oxide semiconductor (CMOS) processing technology that overwhelms current microelectronics industry. Yet, the dream to build optical computers has yet to come without the breakthrough of several key elements including optical diodes, isolators, and logic gates with low power, high signal contrast, and large bandwidth. Photonic crystal has a great power to mold the flow of light in micrometer/nanometer scale and is a promising platform for optical integration. In this paper we present our recent efforts of design, fabrication, and characterization of ultracompact, linear, passive on-chip optical diodes, isolators and logic gates based on silicon two-dimensional photonic crystal slabs. Both simulation and experiment results show high performance of these novel designed devices. These linear and passive silicon devices have the unique properties of small fingerprint, low power request, large bandwidth, fast response speed, easy for fabrication, and being compatible with COMS technology. Further improving their performance would open up a road towards photonic logics and optical computing and help to construct nanophotonic on-chip processor architectures for future optical computers.

Electroluminescence from metal-oxide-semiconductor devices with erbium-doped CeO{sub 2} films on silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lv, Chunyan; Department of Chemistry, Huzhou University, Zhejiang, Huzhou 313000; Zhu, Chen

2015-04-06

We report on erbium (Er)-related electroluminescence (EL) in the visible and near-infrared (NIR) from metal-oxide-semiconductor (MOS) devices with Er-doped CeO{sub 2} (CeO{sub 2}:Er) films on silicon. The onset voltage of such EL under either forward or reverse bias is smaller than 10 V. Moreover, the EL quenching can be avoidable for the CeO{sub 2}:Er-based MOS devices. Analysis on the current-voltage characteristic of the device indicates that the electron transportation at the EL-enabling voltages under either forward or reverse bias is dominated by trap-assisted tunneling mechanism. Namely, electrons in n{sup +}-Si/ITO can tunnel into the conduction band of CeO{sub 2} host viamore » defect states at sufficiently high forward/reverse bias voltages. Then, a fraction of such electrons are accelerated by electric field to become hot electrons, which impact-excite the Er{sup 3+} ions, thus leading to characteristic emissions. It is believed that this work has laid the foundation for developing viable silicon-based emitters using CeO{sub 2}:Er films.« less

Graphene-silicon phase modulators with gigahertz bandwidth

NASA Astrophysics Data System (ADS)

Sorianello, V.; Midrio, M.; Contestabile, G.; Asselberghs, I.; Van Campenhout, J.; Huyghebaert, C.; Goykhman, I.; Ott, A. K.; Ferrari, A. C.; Romagnoli, M.

2018-01-01

The modulator is a key component in optical communications. Several graphene-based amplitude modulators have been reported based on electro-absorption. However, graphene phase modulators (GPMs) are necessary for functions such as applying complex modulation formats or making switches or phased arrays. Here, we present a 10 Gb s-1 GPM integrated in a Mach-Zehnder interferometer configuration. This is a compact device based on a graphene-insulator-silicon capacitor, with a phase-shifter length of 300 μm and extinction ratio of 35 dB. The GPM has a modulation efficiency of 0.28 V cm at 1,550 nm. It has 5 GHz electro-optical bandwidth and operates at 10 Gb s-1 with 2 V peak-to-peak driving voltage in a push-pull configuration for binary transmission of a non-return-to-zero data stream over 50 km of single-mode fibre. This device is the key building block for graphene-based integrated photonics, enabling compact and energy-efficient hybrid graphene-silicon modulators for telecom, datacom and other applications.

A 2-terminal perovskite/silicon multijunction solar cell enabled by a silicon tunnel junction

DOE PAGES

Mailoa, Jonathan P.; Bailie, Colin D.; Johlin, Eric C.; ...

2015-03-24

With the advent of efficient high-bandgap metal-halide perovskite photovoltaics, an opportunity exists to make perovskite/silicon tandem solar cells. We fabricate a monolithic tandem by developing a silicon-based interband tunnel junction that facilitates majority-carrier charge recombination between the perovskite and silicon sub-cells. We demonstrate a 1 cm 2 2-terminal monolithic perovskite/silicon multijunction solar cell with a V OC as high as 1.65 V. As a result, we achieve a stable 13.7% power conversion efficiency with the perovskite as the current-limiting sub-cell, and identify key challenges for this device architecture to reach efficiencies over 25%.

Process for utilizing low-cost graphite substrates for polycrystalline solar cells

NASA Technical Reports Server (NTRS)

Chu, T. L. (Inventor)

1978-01-01

Low cost polycrystalline silicon solar cells supported on substrates were prepared by depositing successive layers of polycrystalline silicon containing appropriate dopants over supporting substrates of a member selected from the group consisting of metallurgical grade polycrystalline silicon, graphite and steel coated with a diffusion barrier of silica, borosilicate, phosphosilicate, or mixtures thereof such that p-n junction devices were formed which effectively convert solar energy to electrical energy. To improve the conversion efficiency of the polycrystalline silicon solar cells, the crystallite size in the silicon was substantially increased by melting and solidifying a base layer of polycrystalline silicon before depositing the layers which form the p-n junction.

Broadly tunable terahertz difference-frequency generation in quantum cascade lasers on silicon

NASA Astrophysics Data System (ADS)

Jung, Seungyong; Kim, Jae Hyun; Jiang, Yifan; Vijayraghavan, Karun; Belkin, Mikhail A.

2018-01-01

We report broadly tunable terahertz (THz) sources based on intracavity Cherenkov difference-frequency generation in quantum cascade lasers transfer-printed on high-resistivity silicon substrates. Spectral tuning from 1.3 to 4.3 THz was obtained from a 2-mm long laser chip using a modified Littrow external cavity setup. The THz power output and the midinfrared-to-THz conversion efficiency of the devices transferred on silicon are dramatically enhanced, compared with the devices on a native semi-insulating InP substrate. Enhancement is particularly significant at higher THz frequencies, where the tail of the Reststrahlen band results in a strong absorption of THz light in the InP substrate.

Graphene-Based Reversible Nano-Switch/Sensor Schottky Diode

NASA Technical Reports Server (NTRS)

Miranda, Felix A.; Meador, Michael A.; Theofylaktos, Onoufrios; Pinto, Nicholas J.; Mueller, Carl H.; Santos-Perez, Javier

2010-01-01

This proof-of-concept device consists of a thin film of graphene deposited on an electrodized doped silicon wafer. The graphene film acts as a conductive path between a gold electrode deposited on top of a silicon dioxide layer and the reversible side of the silicon wafer, so as to form a Schottky diode. By virtue of the two-dimensional nature of graphene, this device has extreme sensitivity to different gaseous species, thereby serving as a building block for a volatile species sensor, with the attribute of having reversibility properties. That is, the sensor cycles between active and passive sensing states in response to the presence or absence of the gaseous species.

Sleeve reaction chamber system

DOEpatents

Northrup, M Allen [Berkeley, CA; Beeman, Barton V [San Mateo, CA; Benett, William J [Livermore, CA; Hadley, Dean R [Manteca, CA; Landre, Phoebe [Livermore, CA; Lehew, Stacy L [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA

2009-08-25

A chemical reaction chamber system that combines devices such as doped polysilicon for heating, bulk silicon for convective cooling, and thermoelectric (TE) coolers to augment the heating and cooling rates of the reaction chamber or chambers. In addition the system includes non-silicon-based reaction chambers such as any high thermal conductivity material used in combination with a thermoelectric cooling mechanism (i.e., Peltier device). The heat contained in the thermally conductive part of the system can be used/reused to heat the device, thereby conserving energy and expediting the heating/cooling rates. The system combines a micromachined silicon reaction chamber, for example, with an additional module/device for augmented heating/cooling using the Peltier effect. This additional module is particularly useful in extreme environments (very hot or extremely cold) where augmented heating/cooling would be useful to speed up the thermal cycling rates. The chemical reaction chamber system has various applications for synthesis or processing of organic, inorganic, or biochemical reactions, including the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction.

Acoustic Emission Characteristics of Nanocrystalline Porous Silicon Device Driven as an Ultrasonic Speaker

NASA Astrophysics Data System (ADS)

Tsubaki, Kenji; Komoda, Takuya; Koshida, Nobuyoshi

2006-04-01

It is shown that the dc-superimposed driving mode is more useful for the efficient operation of a novel thermally induced ultrasonic emitter based on nanocrystalline porous silicon (nc-PS) than the conventional simple ac-voltage driving mode. The nc-PS device is composed of a patterned heater electrode, an nc-PS layer and a single crystalline silicon (c-Si) substrate. The almost complete thermally insulating property of nc-PS as a quantum-sized system makes it possible to apply the nc-PS device as an ultrasonic generator by efficient thermo acoustic conversion without any mechanical vibrations. In the dc-superimposed driving mode, the output frequency is the same as the input frequency and a stationary temperature rise is kept constant independent of input peak-to-peak voltage. In addition, power efficiency is significantly increases compared with that in the ac-voltage driving mode without affecting on the temperature rise. The present results suggest the further possibility of the nc-PS device being used as a functional speaker.

A multispectral sorting device for isolating single wheat kernels with high protein content

USDA-ARS?s Scientific Manuscript database

Automated sorting of single wheat kernels according to protein content was demonstrated using two novel multispectral sorting devices with different spectral ranges; 470-1070 nm (silicone based detector) and 910nm-1550 nm (InGaAs based detector). The multispectral data were acquired by rapidly (~12...

Continuous-flow mass production of silicon nanowires via substrate-enhanced metal-catalyzed electroless etching of silicon with dissolved oxygen as an oxidant.

PubMed

Hu, Ya; Peng, Kui-Qing; Liu, Lin; Qiao, Zhen; Huang, Xing; Wu, Xiao-Ling; Meng, Xiang-Min; Lee, Shuit-Tong

2014-01-13

Silicon nanowires (SiNWs) are attracting growing interest due to their unique properties and promising applications in photovoltaic devices, thermoelectric devices, lithium-ion batteries, and biotechnology. Low-cost mass production of SiNWs is essential for SiNWs-based nanotechnology commercialization. However, economic, controlled large-scale production of SiNWs remains challenging and rarely attainable. Here, we demonstrate a facile strategy capable of low-cost, continuous-flow mass production of SiNWs on an industrial scale. The strategy relies on substrate-enhanced metal-catalyzed electroless etching (MCEE) of silicon using dissolved oxygen in aqueous hydrofluoric acid (HF) solution as an oxidant. The distinct advantages of this novel MCEE approach, such as simplicity, scalability and flexibility, make it an attractive alternative to conventional MCEE methods.

Core-shell heterojunction of silicon nanowire arrays and carbon quantum dots for photovoltaic devices and self-driven photodetectors.

PubMed

Xie, Chao; Nie, Biao; Zeng, Longhui; Liang, Feng-Xia; Wang, Ming-Zheng; Luo, Linbao; Feng, Mei; Yu, Yongqiang; Wu, Chun-Yan; Wu, Yucheng; Yu, Shu-Hong

2014-04-22

Silicon nanostructure-based solar cells have lately intrigued intensive interest because of their promising potential in next-generation solar energy conversion devices. Herein, we report a silicon nanowire (SiNW) array/carbon quantum dot (CQD) core-shell heterojunction photovoltaic device by directly coating Ag-assisted chemical-etched SiNW arrays with CQDs. The heterojunction with a barrier height of 0.75 eV exhibited excellent rectifying behavior with a rectification ratio of 10(3) at ±0.8 V in the dark and power conversion efficiency (PCE) as high as 9.10% under AM 1.5G irradiation. It is believed that such a high PCE comes from the improved optical absorption as well as the optimized carrier transfer and collection capability. Furthermore, the heterojunction could function as a high-performance self-driven visible light photodetector operating in a wide switching wavelength with good stability, high sensitivity, and fast response speed. It is expected that the present SiNW array/CQD core-shell heterojunction device could find potential applications in future high-performance optoelectronic devices.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1995-03-21

A method is disclosed for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics. 7 figures.

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

Silicon synaptic transistor for hardware-based spiking neural network and neuromorphic system

NASA Astrophysics Data System (ADS)

Kim, Hyungjin; Hwang, Sungmin; Park, Jungjin; Park, Byung-Gook

2017-10-01

Brain-inspired neuromorphic systems have attracted much attention as new computing paradigms for power-efficient computation. Here, we report a silicon synaptic transistor with two electrically independent gates to realize a hardware-based neural network system without any switching components. The spike-timing dependent plasticity characteristics of the synaptic devices are measured and analyzed. With the help of the device model based on the measured data, the pattern recognition capability of the hardware-based spiking neural network systems is demonstrated using the modified national institute of standards and technology handwritten dataset. By comparing systems with and without inhibitory synapse part, it is confirmed that the inhibitory synapse part is an essential element in obtaining effective and high pattern classification capability.

Silicon synaptic transistor for hardware-based spiking neural network and neuromorphic system.

PubMed

Kim, Hyungjin; Hwang, Sungmin; Park, Jungjin; Park, Byung-Gook

2017-10-06

Brain-inspired neuromorphic systems have attracted much attention as new computing paradigms for power-efficient computation. Here, we report a silicon synaptic transistor with two electrically independent gates to realize a hardware-based neural network system without any switching components. The spike-timing dependent plasticity characteristics of the synaptic devices are measured and analyzed. With the help of the device model based on the measured data, the pattern recognition capability of the hardware-based spiking neural network systems is demonstrated using the modified national institute of standards and technology handwritten dataset. By comparing systems with and without inhibitory synapse part, it is confirmed that the inhibitory synapse part is an essential element in obtaining effective and high pattern classification capability.

21 CFR 878.4025 - Silicone sheeting.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Silicone sheeting. 878.4025 Section 878.4025 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Surgical Devices § 878.4025 Silicone sheeting. (a...

21 CFR 878.4025 - Silicone sheeting.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Silicone sheeting. 878.4025 Section 878.4025 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Surgical Devices § 878.4025 Silicone sheeting. (a...

21 CFR 878.4025 - Silicone sheeting.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Silicone sheeting. 878.4025 Section 878.4025 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Surgical Devices § 878.4025 Silicone sheeting. (a...

21 CFR 878.4025 - Silicone sheeting.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Silicone sheeting. 878.4025 Section 878.4025 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Surgical Devices § 878.4025 Silicone sheeting. (a...

Amorphous silicon Schottky barrier solar cells incorporating a thin insulating layer and a thin doped layer

DOEpatents

Carlson, David E.

1980-01-01

Amorphous silicon Schottky barrier solar cells which incorporate a thin insulating layer and a thin doped layer adjacent to the junction forming metal layer exhibit increased open circuit voltages compared to standard rectifying junction metal devices, i.e., Schottky barrier devices, and rectifying junction metal insulating silicon devices, i.e., MIS devices.

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

PubMed Central

Hazut, Ori; Agarwala, Arunava; Subramani, Thangavel; Waichman, Sharon; Yerushalmi, Roie

2013-01-01

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra shallow and sharp doping profiles at the nanometer scale. In MLCD process the dopant source is a monolayer containing dopant atoms. In this article a detailed procedure for surface doping of silicon substrate as well as silicon nanowires is demonstrated. Phosphorus dopant source was formed using tetraethyl methylenediphosphonate monolayer on a silicon substrate. This monolayer containing substrate was brought to contact with a pristine intrinsic silicon target substrate and annealed while in contact. Sheet resistance of the target substrate was measured using 4 point probe. Intrinsic silicon nanowires were synthesized by chemical vapor deposition (CVD) process using a vapor-liquid-solid (VLS) mechanism; gold nanoparticles were used as catalyst for nanowire growth. The nanowires were suspended in ethanol by mild sonication. This suspension was used to dropcast the nanowires on silicon substrate with a silicon nitride dielectric top layer. These nanowires were doped with phosphorus in similar manner as used for the intrinsic silicon wafer. Standard photolithography process was used to fabricate metal electrodes for the formation of nanowire based field effect transistor (NW-FET). The electrical properties of a representative nanowire device were measured by a semiconductor device analyzer and a probe station. PMID:24326774

Integrated Microfluidic Gas Sensors for Water Monitoring

NASA Technical Reports Server (NTRS)

Zhu, L.; Sniadecki, N.; DeVoe, D. L.; Beamesderfer, M.; Semancik, S.; DeVoe, D. L.

2003-01-01

A silicon-based microhotplate tin oxide (SnO2) gas sensor integrated into a polymer-based microfluidic system for monitoring of contaminants in water systems is presented. This device is designed to sample a water source, control the sample vapor pressure within a microchannel using integrated resistive heaters, and direct the vapor past the integrated gas sensor for analysis. The sensor platform takes advantage of novel technology allowing direct integration of discrete silicon chips into a larger polymer microfluidic substrate, including seamless fluidic and electrical interconnects between the substrate and silicon chip.

50 Gb/s hybrid silicon traveling-wave electroabsorption modulator.

PubMed

Tang, Yongbo; Chen, Hui-Wen; Jain, Siddharth; Peters, Jonathan D; Westergren, Urban; Bowers, John E

2011-03-28

We have demonstrated a traveling-wave electroabsorption modulator based on the hybrid silicon platform. For a device with a 100 μm active segment, the small-signal electro/optical response renders a 3 dB bandwidth of around 42 GHz and its modulation efficiency reaches 23 GHz/V. A dynamic extinction ratio of 9.8 dB with a driving voltage swing of only 2 V was demonstrated at a transmission rate of 50 Gb/s. This represents a significant improvement for modulators compatible with integration of silicon-based photonic integrated circuits.

Measurement of Young's modulus and residual stress of thin SiC layers for MEMS high temperature applications

NASA Astrophysics Data System (ADS)

Pabst, Oliver; Schiffer, Michael; Obermeier, Ernst; Tekin, Tolga; Lang, Klaus Dieter; Ngo, Ha-Duong

2011-06-01

Silicon carbide (SiC) is a promising material for applications in harsh environments. Standard silicon (Si) microelectromechanical systems (MEMS) are limited in operating temperature to temperatures below 130 °C for electronic devices and below 600 °C for mechanical devices. Due to its large bandgap SiC enables MEMS with significantly higher operating temperatures. Furthermore, SiC exhibits high chemical stability and thermal conductivity. Young's modulus and residual stress are important mechanical properties for the design of sophisticated SiC-based MEMS devices. In particular, residual stresses are strongly dependent on the deposition conditions. Literature values for Young's modulus range from 100 to 400 GPa, and residual stresses range from 98 to 486 MPa. In this paper we present our work on investigating Young's modulus and residual stress of SiC films deposited on single crystal bulk silicon using bulge testing. This method is based on measurement of pressure-dependent membrane deflection. Polycrystalline as well as single crystal cubic silicon carbide samples are studied. For the samples tested, average Young's modulus and residual stress measured are 417 GPa and 89 MPa for polycrystalline samples. For single crystal samples, the according values are 388 GPa and 217 MPa. These results compare well with literature values.

Charge-injection-device 2 x 64 element infrared array performance

NASA Technical Reports Server (NTRS)

Mckelvey, M. E.; Mccreight, C. R.; Goebel, J. H.; Reeves, A. A.

1985-01-01

Three 2 x 64 element Si:Bi accumulation-mode charge-injection-device (CID) arrays were tested at low and moderate background to evaluate their usefulness for space-based astronomical observations. Testing was conducted both in the laboratory and in ground-based telescope IR observations. The devices showed an average readout noise level below 200 equivalent electrons, a peak responsivity of 4 A/W, and a noise equivalent power of 3 x 10 to the -17th W/sq rt Hz. This sensitivity compares well with that of nonintegrating discrete extrinsic silicon photoconductors. The array well capacity was significantly smaller than predicted. The measured sensitivity makes extrinsic silicon CID arrays useful for certain astronomical applications. However, their readout efficiency and frequency response represent serious limitations in low-background applications.

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

PubMed Central

Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E.; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S.

2015-01-01

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

Silicon-graphene photonic devices

NASA Astrophysics Data System (ADS)

Yin, Yanlong; Li, Jiang; Xu, Yang; Tsang, Hon Ki; Dai, Daoxin

2018-06-01

Silicon photonics has attracted much attention because of the advantages of CMOS (complementary-metal-oxide-semiconductor) compatibility, ultra-high integrated density, etc. Great progress has been achieved in the past decades. However, it is still not easy to realize active silicon photonic devices and circuits by utilizing the material system of pure silicon due to the limitation of the intrinsic properties of silicon. Graphene has been regarded as a promising material for optoelectronics due to its unique properties and thus provides a potential option for realizing active photonic integrated devices on silicon. In this paper, we present a review on recent progress of some silicon-graphene photonic devices for photodetection, all-optical modulation, as well as thermal-tuning. Project supported by the National Major Research and Development Program (No. 2016YFB0402502), the National Natural Science Foundation of China (Nos. 11374263, 61422510, 61431166001, 61474099, 61674127), and the National Key Research and Development Program (No. 2016YFA0200200).

Anti-reflective device having an anti-reflective surface formed of silicon spikes with nano-tips

NASA Technical Reports Server (NTRS)

Bae, Youngsam (Inventor); Manohara, Harish (Inventor); Mobasser, Sohrab (Inventor); Lee, Choonsup (Inventor)

2011-01-01

Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.

Anti- reflective device having an anti-reflection surface formed of silicon spikes with nano-tips

NASA Technical Reports Server (NTRS)

Bae, Youngsman (Inventor); Mooasser, Sohrab (Inventor); Manohara, Harish (Inventor); Lee, Choonsup (Inventor); Bae, Kungsam (Inventor)

2009-01-01

Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.

Modeling and Simulation of - and Silicon Germanium-Base Bipolar Transistors Operating at a Wide Range of Temperatures.

NASA Astrophysics Data System (ADS)

Shaheed, M. Reaz

1995-01-01

Higher speed at lower cost and at low power consumption is a driving force for today's semiconductor technology. Despite a substantial effort toward achieving this goal via alternative technologies such as III-V compounds, silicon technology still dominates mainstream electronics. Progress in silicon technology will continue for some time with continual scaling of device geometry. However, there are foreseeable limits on achievable device performance, reliability and scaling for room temperature technologies. Thus, reduced temperature operation is commonly viewed as a means for continuing the progress towards higher performance. Although silicon CMOS will be the first candidate for low temperature applications, bipolar devices will be used in a hybrid fashion, as line drivers or in limited critical path elements. Silicon -germanium-base bipolar transistors look especially attractive for low-temperature bipolar applications. At low temperatures, various new physical phenomena become important in determining device behavior. Carrier freeze-out effects which are negligible at room temperature, become of crucial importance for analyzing the low temperature device characteristics. The conventional Pearson-Bardeen model of activation energy, used for calculation of carrier freeze-out, is based on an incomplete picture of the physics that takes place and hence, leads to inaccurate results at low temperatures. Plasma -induced bandgap narrowing becomes more pronounced in device characteristics at low temperatures. Even with modern numerical simulators, this effect is not well modeled or simulated. In this dissertation, improved models for such physical phenomena are presented. For accurate simulation of carrier freeze-out, the Pearson-Bardeen model has been extended to include the temperature dependence of the activation energy. The extraction of the model is based on the rigorous, first-principle theoretical calculations available in the literature. The new model is shown to provide consistently accurate values for base sheet resistance for both Si- and SiGe-base transistors over a wide range of temperatures. A model for plasma-induced bandgap narrowing suitable for implementation in a numerical simulator has been developed. The appropriate method of incorporating this model in a drift -diffusion solver is described. The importance of including this model for low temperature simulation is demonstrated. With these models in place, the enhanced simulator has been used for evaluating and designing the Si- and SiGe-base bipolar transistors. Silicon-germanium heterojunction bipolar transistors offer significant performance and cost advantages over conventional technologies in the production of integrated circuits for communications, computer and transportation applications. Their high frequency performance at low cost, will find widespread use in the currently exploding wireless communication market. However, the high performance SiGe-base transistors are prone to have a low common-emitter breakdown voltage. In this dissertation, a modification in the collector design is proposed for improving the breakdown voltage without sacrificing the high frequency performance. A comprehensive simulation study of p-n-p SiGe-base transistors has been performed. Different figures of merit such as drive current, current gain, cut -off frequency and Early voltage were compared between a graded germanium profile and an abrupt germanium profile. The differences in the performance level between the two profiles diminishes as the base width is scaled down.

21 CFR 878.3530 - Silicone inflatable breast prosthesis.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Silicone inflatable breast prosthesis. 878.3530 Section 878.3530 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3530 Silicone...

21 CFR 878.3540 - Silicone gel-filled breast prosthesis.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Silicone gel-filled breast prosthesis. 878.3540 Section 878.3540 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3540 Silicone gel...

21 CFR 878.3530 - Silicone inflatable breast prosthesis.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Silicone inflatable breast prosthesis. 878.3530 Section 878.3530 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3530 Silicone...

21 CFR 878.3530 - Silicone inflatable breast prosthesis.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Silicone inflatable breast prosthesis. 878.3530 Section 878.3530 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3530 Silicone...

21 CFR 878.3540 - Silicone gel-filled breast prosthesis.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Silicone gel-filled breast prosthesis. 878.3540 Section 878.3540 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3540 Silicone gel...

21 CFR 878.3530 - Silicone inflatable breast prosthesis.

Code of Federal Regulations, 2010 CFR

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Silicone inflatable breast prosthesis. 878.3530 Section 878.3530 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3530 Silicone...

21 CFR 878.3540 - Silicone gel-filled breast prosthesis.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Silicone gel-filled breast prosthesis. 878.3540 Section 878.3540 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3540 Silicone gel...

21 CFR 878.3530 - Silicone inflatable breast prosthesis.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Silicone inflatable breast prosthesis. 878.3530 Section 878.3530 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES GENERAL AND PLASTIC SURGERY DEVICES Prosthetic Devices § 878.3530 Silicone...

High-performance silicon nanowire bipolar phototransistors

NASA Astrophysics Data System (ADS)

Tan, Siew Li; Zhao, Xingyan; Chen, Kaixiang; Crozier, Kenneth B.; Dan, Yaping

2016-07-01

Silicon nanowires (SiNWs) have emerged as sensitive absorbing materials for photodetection at wavelengths ranging from ultraviolet (UV) to the near infrared. Most of the reports on SiNW photodetectors are based on photoconductor, photodiode, or field-effect transistor device structures. These SiNW devices each have their own advantages and trade-offs in optical gain, response time, operating voltage, and dark current noise. Here, we report on the experimental realization of single SiNW bipolar phototransistors on silicon-on-insulator substrates. Our SiNW devices are based on bipolar transistor structures with an optically injected base region and are fabricated using CMOS-compatible processes. The experimentally measured optoelectronic characteristics of the SiNW phototransistors are in good agreement with simulation results. The SiNW phototransistors exhibit significantly enhanced response to UV and visible light, compared with typical Si p-i-n photodiodes. The near infrared responsivities of the SiNW phototransistors are comparable to those of Si avalanche photodiodes but are achieved at much lower operating voltages. Compared with other reported SiNW photodetectors as well as conventional bulk Si photodiodes and phototransistors, the SiNW phototransistors in this work demonstrate the combined advantages of high gain, high photoresponse, low dark current, and low operating voltage.

Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

NASA Astrophysics Data System (ADS)

Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

2016-03-01

Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on porous silicon, dissolution tests for 0.1 M and 0.01 M NaOH trigger solutions, EIS analysis for VOx coated devices, and EDS compositional analysis of VOx. (ii) Video showing transient behavior of integrated VOx/porous silicon scaffolds. See DOI: 10.1039/c5nr09095d

Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-04-02

A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.

Advances in Single and Multijunction III-V Photovoltaics on Silicon for Space Power

NASA Technical Reports Server (NTRS)

Wilt, David M.; Fitzgerald, Eugene A.; Ringel, Steven A.

2005-01-01

A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.

Dipole-allowed direct band gap silicon superlattices

PubMed Central

Oh, Young Jun; Lee, In-Ho; Kim, Sunghyun; Lee, Jooyoung; Chang, Kee Joo

2015-01-01

Silicon is the most popular material used in electronic devices. However, its poor optical properties owing to its indirect band gap nature limit its usage in optoelectronic devices. Here we present the discovery of super-stable pure-silicon superlattice structures that can serve as promising materials for solar cell applications and can lead to the realization of pure Si-based optoelectronic devices. The structures are almost identical to that of bulk Si except that defective layers are intercalated in the diamond lattice. The superlattices exhibit dipole-allowed direct band gaps as well as indirect band gaps, providing ideal conditions for the investigation of a direct-to-indirect band gap transition. The fact that almost all structural portions of the superlattices originate from bulk Si warrants their stability and good lattice matching with bulk Si. Through first-principles molecular dynamics simulations, we confirmed their thermal stability and propose a possible method to synthesize the defective layer through wafer bonding. PMID:26656482

Thermally Stable Ohmic Contacts on Silicon Carbide Developed for High- Temperature Sensors and Electronics

NASA Technical Reports Server (NTRS)

Okojie, Robert S.

2001-01-01

The NASA aerospace program, in particular, requires breakthrough instrumentation inside the combustion chambers of engines for the purpose of, among other things, improving computational fluid dynamics code validation and active engine behavioral control (combustion, flow, stall, and noise). This environment can be as high as 600 degrees Celsius, which is beyond the capability of silicon and gallium arsenide devices. Silicon-carbide- (SiC-) based devices appear to be the most technologically mature among wide-bandgap semiconductors with the proven capability to function at temperatures above 500 degrees Celsius. However, the contact metalization of SiC degrades severely beyond this temperature because of factors such as the interdiffusion between layers, oxidation of the contact, and compositional and microstructural changes at the metal/semiconductor interface. These mechanisms have been proven to be device killers. Very costly and weight-adding packaging schemes that include vacuum sealing are sometimes adopted as a solution.

Variable temperature performance of a fully screen printed transistor switch

NASA Astrophysics Data System (ADS)

Zambou, Serges; Magunje, Batsirai; Rhyme, Setshedi; Walton, Stanley D.; Idowu, M. Florence; Unuigbe, David; Britton, David T.; Härting, Margit

2016-12-01

This article reports on the variable temperature performance of a flexible printed transistor which works as a current driven switch. In this work, electronic ink is formulated from nanostructured silicon produced by milling polycrystalline silicon. The study of the silicon active layer shows that its conductivity is based on thermal activation of carriers, and could be used as active layers in active devices. We further report on the transistors switching operation and their electrical performance under variable temperature. The reliability of the transistors at constant current bias was also investigated. Analysis of the electrical transfer characteristics from 340 to 10 K showed that the printed devices' current ON/OFF ratio increases as temperature decreases making it a better switch at lower temperatures. A constant current bias on a terminal for up to six hours shows extraordinary stability in electrical performance of the device.

Magneto-transport phenomena in metal/SiO2/n(p)-Si hybrid structures

NASA Astrophysics Data System (ADS)

Volkov, N. V.; Tarasov, A. S.; Rautskii, M. V.; Lukyanenko, A. V.; Bondarev, I. A.; Varnakov, S. N.; Ovchinnikov, S. G.

2018-04-01

Present review touches upon a subject of magnetotransport phenomena in hybrid structures which consist of ferromagnetic or nonmagnetic metal layer, layer of silicon oxide and silicon substrate with n- or p-type conductivity. Main attention will be paid to a number gigantic magnetotransport effects discovered in the devices fabricated on the base of the M/SiO2/n(p)-Si (M is ferromagnetic or paramagnetic metal) hybrid structures. These effects include bias induced dc magnetoresistance, gigantic magnetoimpedance, dc magnetoresistance induced by an optical irradiation and lateral magneto-photo-voltaic effect. The magnetoresistance ratio in ac and dc modes for some of our devices can exceed 106% in a magnetic field below 1 T. For lateral magneto-photo-voltaic effect, the relative change of photo-voltage in magnetic field can reach 103% at low temperature. Two types of mechanisms are responsible for sensitivity of the transport properties of the silicon based hybrid structures to magnetic field. One is related to transformation of the energy structure of the (donor) acceptor states including states near SiO2/n(p)-Si interface in magnetic field. Other mechanism is caused by the Lorentz force action. The features in behaviour of magnetotransport effects in concrete device depend on composition of the used structure, device topology and experimental conditions (bias voltage, optical radiation and others). Obtained results can be base for design of some electronic devices driven by a magnetic field. They can also provide an enhancement of the functionality for existing sensors.

C-14 beta converter

NASA Astrophysics Data System (ADS)

Gurskaya, A. V.; Dolgopolov, M. V.; Chepurnov, V. I.

2017-11-01

The study discusses the prospects for the development of low-voltage power supply sources. Beta isotope sources present great advantages for autonomous uninterrupted operation of remote devices, which gives an impulse to rapid development of betavoltaics. Silicon carbide homo- and hetero-structures serve as the isotope-based energy converters. We propose a new technology for isotope-based converter fabrication using silicon carbide and carbon-14 heterostructure as the active substance.

Transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

A Flexible Sensing Unit Manufacturing Method of Electrochemical Seismic Sensor

PubMed Central

Li, Guanglei; Sun, Zhenyuan; Wang, Junbo; Chen, Deyong; Chen, Lianhong; Xu, Chao; Qi, Wenjie; Zheng, Yu

2018-01-01

This paper presents an electrochemical seismic sensor in which paraylene was used as a substrate and insulating layer of micro-fabricated electrodes, enabling the detection of seismic signals with enhanced sensitivities in comparison to silicon-based counterparts. Based on microfabrication, paralene-based electrochemical seismic sensors were fabricated in which the thickness of the insulating spacer was 6.7 μm. Compared to silicon-based counterparts with ~100 μm insulating layers, the parylene-based devices produced higher sensitivities of 490.3 ± 6.1 V/(m/s) vs. 192.2 ± 1.9 V/(m/s) at 0.1 Hz, 4764.4 ± 18 V/(m/s) vs. 318.9 ± 6.5 V/(m/s) at 1 Hz, and 4128.1 ± 38.3 V/(m/s) vs. 254.5 ± 4.2 V/(m/s) at 10 Hz. In addition, the outputs of the parylene vs. silicon devices in response to two transit inputs were compared, producing peak responses of 2.97 V vs. 0.22 V and 2.41 V vs. 0.19 V, respectively. Furthermore, the self-noises of parylene vs. silicon-based devices were compared as follows: −82.3 ± 3.9 dB vs. −90.4 ± 9.4 dB at 0.1 Hz, −75.7 ± 7.3 dB vs. −98.2 ± 9.9 dB at 1 Hz, and −62.4 ± 7.7 dB vs. −91.1 ± 8.1 dB at 10 Hz. The developed parylene-based electrochemical seismic sensors may function as an enabling technique for further detection of seismic motions in various applications. PMID:29641455

Micro-architecture embedding ultra-thin interlayer to bond diamond and silicon via direct fusion

NASA Astrophysics Data System (ADS)

Kim, Jong Cheol; Kim, Jongsik; Xin, Yan; Lee, Jinhyung; Kim, Young-Gyun; Subhash, Ghatu; Singh, Rajiv K.; Arjunan, Arul C.; Lee, Haigun

2018-05-01

The continuous demand on miniaturized electronic circuits bearing high power density illuminates the need to modify the silicon-on-insulator-based chip architecture. This is because of the low thermal conductivity of the few hundred nanometer-thick insulator present between the silicon substrate and active layers. The thick insulator is notorious for releasing the heat generated from the active layers during the operation of devices, leading to degradation in their performance and thus reducing their lifetime. To avoid the heat accumulation, we propose a method to fabricate the silicon-on-diamond (SOD) microstructure featured by an exceptionally thin silicon oxycarbide interlayer (˜3 nm). While exploiting the diamond as an insulator, we employ spark plasma sintering to render the silicon directly fused to the diamond. Notably, this process can manufacture the SOD microarchitecture via a simple/rapid way and incorporates the ultra-thin interlayer for minute thermal resistance. The method invented herein expects to minimize the thermal interfacial resistance of the devices and is thus deemed as a breakthrough appealing to the current chip industry.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

NASA Astrophysics Data System (ADS)

Balpande, Suresh S.; Pande, Rajesh S.

2016-04-01

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and schottky diodes based voltage multiplier.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Balpande, Suresh S., E-mail: balpandes@rknec.edu; Pande, Rajesh S.

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition tomore » this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and schottky diodes based voltage multiplier.« less

The development of silicon carbide-based power electronics devices

NASA Astrophysics Data System (ADS)

Hopkins, Richard H.; Perkins, John F.

1995-01-01

In 1989 Westinghouse created an internally funded initiative to develop silicon carbide materials and device technology for a variety of potential commercial and military applications. Westinghouse saw silicon carbide as having the potential for dual use. For space applications, size and weight reductions could be achieved, together with increased reliability. Terrestrially, uses in harsh-temperature environments would be enabled. Theoretically, the physical and electrical properties of silicon carbide were highly promising for high-power, high-temperature, radiation-hardened electronics. However, bulk material with the requisite electronic qualities was not available, and the methods needed to produce a silicon carbide wafer—to fabricate high-quality devices—and to transition these technologies into a commercial product were considered to be a high-risk investment. It was recognized that through a collaborative effort, the CCDS could provide scientific expertise in several areas, thus reducing this risk. These included modeling of structures, electrical contacts, dielectrics, and epitaxial growth. This collaboration has been very successful, with developed technologies being transferred to Westinghouse.

Strategies to improve electrode positioning and safety in cochlear implants.

PubMed

Rebscher, S J; Heilmann, M; Bruszewski, W; Talbot, N H; Snyder, R L; Merzenich, M M

1999-03-01

An injection-molded internal supporting rib has been produced to control the flexibility of silicone rubber encapsulated electrodes designed to electrically stimulate the auditory nerve in human subjects with severe to profound hearing loss. The rib molding dies, and molds for silicone rubber encapsulation of the electrode, were designed and machined using AutoCad and MasterCam software packages in a PC environment. After molding, the prototype plastic ribs were iteratively modified based on observations of the performance of the rib/silicone composite insert in a clear plastic model of the human scala tympani cavity. The rib-based electrodes were reliably inserted farther into these models, required less insertion force and were positioned closer to the target auditory neural elements than currently available cochlear implant electrodes. With further design improvements the injection-molded rib may also function to accurately support metal stimulating contacts and wire leads during assembly to significantly increase the manufacturing efficiency of these devices. This method to reliably control the mechanical properties of miniature implantable devices with multiple electrical leads may be valuable in other areas of biomedical device design.

Questing and the application for silicon based ternary compound within ultra-thin layer of SIS intermediate region

NASA Astrophysics Data System (ADS)

Chen, Shumin; Gao, Ming; Wan, Yazhou; Du, Huiwei; Li, Yong; Ma, Zhongquan

2016-12-01

A silicon based ternary compound was supposed to be solid synthesized with In, Si and O elements by magnetron sputtering of indium tin oxide target (ITO) onto crystal silicon substrate at 250 °C. To make clear the configuration of the intermediate region, a potential method to obtain the chemical bonding of Si with other existing elements was exploited by X-ray photoelectron spectroscopy (XPS) instrument combined with other assisted techniques. The phase composition and solid structure of the interfacial region between ITO and Si substrate were investigated by X-ray diffraction (XRD) and high resolution cross sectional transmission electron microscope (HR-TEM). A photovoltaic device with structure of Al/Ag/ITO/SiOx/p-Si/Al was assembled by depositing ITO films onto the p-Si substrate by using magnetron sputtering. The new matter has been assumed to be a buffer layer for semiconductor-insulator-semiconductor (SIS) photovoltaic device and plays critical role for the promotion of optoelectronic conversion performance from the view point of device physics.

Electromagnetic wave propagation along T and Y-splitters composed of silicon nanorods, gold slots, and silica substrate

NASA Astrophysics Data System (ADS)

Ahmadivand, Arash; Pala, Nezih; Golmohammadi, Saeed

2015-05-01

Silicon nanorods in arrays on a glass substrate that are situated through a gap between two gold slots have been utilized to design efficient long-range optical nanostructures as splitters to function at near infrared spectrum. Designing silicon arrays in T and Y-shape regimes, we examined the optical responses of the proposed devices during guiding of transverse and longitudinal electric modes (TE and LE-modes). Transmission loss factors, group velocity of guided waves, the ratio of transmitted power, and the decay length for both of the devices have been reported using numerical methods. We showed that the proposed structures have strong potentials to employ in designing photonic structures with lower ratio of energy extinction and low radiation losses. The overall length of the structures is 2.2 μm which verifies its compaction in comparison to analogous splitters that are designed based on DLSPPWs and nanoparticle-based waveguides devices. Proposed subwavelength optical power transportation mechanisms are highly compatible to employ in photonic integration circuit (PIC) systems.

Single-Event Effects in Silicon Carbide Power Devices

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Ikpe, Stanley; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

2015-01-01

This report summarizes the NASA Electronic Parts and Packaging Program Silicon Carbide Power Device Subtask efforts in FY15. Benefits of SiC are described and example NASA Programs and Projects desiring this technology are given. The current status of the radiation tolerance of silicon carbide power devices is given and paths forward in the effort to develop heavy-ion single-event effect hardened devices indicated.

Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids.

PubMed

Strobel, Sebastian; Hernández, Rocío Murcia; Hansen, Allan G; Tornow, Marc

2008-09-17

We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10(-18) farad and asymmetric resistances of 30 and 300 MΩ, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology.

Strain-Induced Spin-Resonance Shifts in Silicon Devices

NASA Astrophysics Data System (ADS)

Pla, J. J.; Bienfait, A.; Pica, G.; Mansir, J.; Mohiyaddin, F. A.; Zeng, Z.; Niquet, Y. M.; Morello, A.; Schenkel, T.; Morton, J. J. L.; Bertet, P.

2018-04-01

In spin-based quantum-information-processing devices, the presence of control and detection circuitry can change the local environment of a spin by introducing strain and electric fields, altering its resonant frequencies. These resonance shifts can be large compared to intrinsic spin linewidths, and it is therefore important to study, understand, and model such effects in order to better predict device performance. We investigate a sample of bismuth donor spins implanted in a silicon chip, on top of which a superconducting aluminum microresonator is fabricated. The on-chip resonator provides two functions: it produces local strain in the silicon due to the larger thermal contraction of the aluminum, and it enables sensitive electron spin-resonance spectroscopy of donors close to the surface that experience this strain. Through finite-element strain simulations, we are able to reconstruct key features of our experiments, including the electron spin-resonance spectra. Our results are consistent with a recently observed mechanism for producing shifts of the hyperfine interaction for donors in silicon, which is linear with the hydrostatic component of an applied strain.

All silicon waveguide spherical microcavity coupler device.

PubMed

Xifré-Pérez, E; Domenech, J D; Fenollosa, R; Muñoz, P; Capmany, J; Meseguer, F

2011-02-14

A coupler based on silicon spherical microcavities coupled to silicon waveguides for telecom wavelengths is presented. The light scattered by the microcavity is detected and analyzed as a function of the wavelength. The transmittance signal through the waveguide is strongly attenuated (up to 25 dB) at wavelengths corresponding to the Mie resonances of the microcavity. The coupling between the microcavity and the waveguide is experimentally demonstrated and theoretically modeled with the help of FDTD calculations.

Nanoscale doping of compound semiconductors by solid phase dopant diffusion

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Jaehyun, E-mail: jaehyun.ahn@utexas.edu; Koh, Donghyi; Roy, Anupam

2016-03-21

Achieving damage-free, uniform, abrupt, ultra-shallow junctions while simultaneously controlling the doping concentration on the nanoscale is an ongoing challenge to the scaling down of electronic device dimensions. Here, we demonstrate a simple method of effectively doping ΙΙΙ-V compound semiconductors, specifically InGaAs, by a solid phase doping source. This method is based on the in-diffusion of oxygen and/or silicon from a deposited non-stoichiometric silicon dioxide (SiO{sub x}) film on InGaAs, which then acts as donors upon activation by annealing. The dopant profile and concentration can be controlled by the deposited film thickness and thermal annealing parameters, giving active carrier concentration ofmore » 1.4 × 10{sup 18 }cm{sup −3}. Our results also indicate that conventional silicon based processes must be carefully reviewed for compound semiconductor device fabrication to prevent unintended doping.« less

3D hybrid integrated lasers for silicon photonics

NASA Astrophysics Data System (ADS)

Song, B.; Pinna, S.; Liu, Y.; Megalini, L.; Klamkin, J.

2018-02-01

A novel 3D hybrid integration platform combines group III-V materials and silicon photonics to yield high-performance lasers is presented. This platform is based on flip-chip bonding and vertical optical coupling integration. In this work, indium phosphide (InP) devices with monolithic vertical total internal reflection turning mirrors were bonded to active silicon photonic circuits containing vertical grating couplers. Greater than 2 mW of optical power was coupled into a silicon waveguide from an InP laser. The InP devices can also be bonded directly to the silicon substrate, providing an efficient path for heat dissipation owing to the higher thermal conductance of silicon compared to InP. Lasers realized with this technique demonstrated a thermal impedance as low as 6.2°C/W, allowing for high efficiency and operation at high temperature. InP reflective semiconductor optical amplifiers were also integrated with 3D hybrid integration to form integrated external cavity lasers. These lasers demonstrated a wavelength tuning range of 30 nm, relative intensity noise lower than -135 dB/Hz and laser linewidth of 1.5 MHz. This platform is promising for integration of InP lasers and photonic integrated circuits on silicon photonics.

Chemical vapor deposition and characterization of polysilanes polymer based thin films and their applications in compound semiconductors and silicon devices

NASA Astrophysics Data System (ADS)

Oulachgar, El Hassane

As the semiconductors industry is moving toward nanodevices, there is growing need to develop new materials and thin films deposition processes which could enable strict control of the atomic composition and structure of thin film materials in order to achieve precise control on their electrical and optical properties. The accurate control of thin film characteristics will become increasingly important as the miniaturization of semiconductor devices continue. There is no doubt that chemical synthesis of new materials and their self assembly will play a major role in the design and fabrication of next generation semiconductor devices. The objective of this work is to investigate the chemical vapor deposition (CVD) process of thin film using a polymeric precursor as a source material. This process offers many advantages including low deposition cost, hazard free working environment, and most importantly the ability to customize the polymer source material through polymer synthesis and polymer functionalization. The combination between polymer synthesis and CVD process will enable the design of new generation of complex thin film materials with a wide range of improved chemical, mechanical, electrical and optical properties which cannot be easily achieved through conventional CVD processes based on gases and small molecule precursors. In this thesis we mainly focused on polysilanes polymers and more specifically poly(dimethylsilanes). The interest in these polymers is motivated by their distinctive electronic and photonic properties which are attributed to the delocalization of the sigma-electron along the Si-Si backbone chain. These characteristics make polysilane polymers very promising in a broad range of applications as a dielectric, a semiconductor and a conductor. The polymer-based CVD process could be eventually extended to other polymer source materials such as polygermanes, as well as and a variety of other inorganic and hybrid organic-inorganic polymers. This work has demonstrated that a polysilane polymeric source can be used to deposit a wide range of thin film materials exhibiting similar properties with conventional ceramic materials such as silicon carbide (SiC), silicon oxynitride (SiON), silicon oxycarbide (SiOC) silicon dioxide (SiO2) and silicon nitride (Si3N4). The strict control of the deposition process allows precise control of the electrical, optical and chemical properties of polymer-based thin films within a broad range. This work has also demonstrated for the first time that poly(dimethylsilmaes) polymers deposited by CVD can be used to effectively passivate both silicon and gallium arsenide MOS devices. This finding makes polymer-based thin films obtained by CVD very promising for the development of high-kappa dielectric materials for next generation high-mobility CMOS technology. Keywords. Thin films, Polymers, Vapor Phase Deposition, CVD, Nanodielectrics, Organosilanes, Polysilanes, GaAs Passivation, MOSFET, Silicon Oxynitride, Integrated Waveguide, Silicon Carbide, Compound Semiconductors.

Effect of silicide/silicon hetero-junction structure on thermal conductivity and Seebeck coefficient.

PubMed

Choi, Wonchul; Park, Young-Sam; Hyun, Younghoon; Zyung, Taehyoung; Kim, Jaehyeon; Kim, Soojung; Jeon, Hyojin; Shin, Mincheol; Jang, Moongyu

2013-12-01

We fabricated a thermoelectric device with a silicide/silicon laminated hetero-structure by using RF sputtering and rapid thermal annealing. The device was observed to have Ohmic characteristics by I-V measurement. The temperature differences and Seebeck coefficients of the proposed silicide/silicon laminated and bulk structure were measured. The laminated thermoelectric device shows suppression of heat flow from the hot to cold side. This is supported by the theory that the atomic mass difference between silicide and silicon creates a scattering center for phonons. The major impact of our work is that phonon transmission is suppressed at the interface between silicide and silicon without degrading electrical conductivity. The estimated thermal conductivity of the 3-layer laminated device is 126.2 +/- 3.7 W/m. K. Thus, by using the 3-layer laminated structure, thermal conductivity is reduced by around 16% compared to bulk silicon. However, the Seebeck coefficient of the thermoelectric device is degraded compared to that of bulk silicon. It is understood that electrical conductivity is improved by using silicide as a scattering center.

Wavelength dispersion characteristics of integrated silicon avalanche LEDs: potential applications in futuristic on-chip micro- and nano-biosensors

NASA Astrophysics Data System (ADS)

Okhai, Timothy A.; Snyman, Lukas W.; Polleux, Jean-Luc

2016-02-01

Si Av LEDs are easily integrated in on-chip integrated circuitry. They have high modulation frequencies into the GHz range and can be fabricated to sub-micron dimensions. Due to subsurface light generation in the silicon device itself, and the high refractive index differences between silicon and the device environment, the exiting light radiation has interesting dispersion characteristics. Three junction micro p+-np+ Silicon Avalanche based Light Emitting Devices (Si Av LEDs) have been analyzed in terms of dispersion characteristics, generally resulting in different wavelengths of light (colors) being emitted at different angles and solid angles from the surfaces of these devices. The emission wavelength is in the 450 - 850 nm range. The devices are of micron dimension and operate at 8 - 10V, 1μA - 2mA. The emission spot sizes are about 1 micron square. Emission intensities are up to 500 nW.μm-2. The observed dispersion characteristics range from 0.05 degrees per nm per degree at emission angle of 5 degrees, to 0.15 degrees per nm at emission angles of 30 degrees. It is believed that the dispersion characteristics can find interesting and futuristic on-chip electro-optic applications involving particularly a ranging from on chip micro optical wavelength dispersers, communication de-multiplexers, and novel bio-sensor applications. All of these could penetrate into the nanoscale dimensions.

Communication: Photoinduced carbon dioxide binding with surface-functionalized silicon quantum dots.

PubMed

Douglas-Gallardo, Oscar A; Sánchez, Cristián Gabriel; Vöhringer-Martinez, Esteban

2018-04-14

Nowadays, the search for efficient methods able to reduce the high atmospheric carbon dioxide concentration has turned into a very dynamic research area. Several environmental problems have been closely associated with the high atmospheric level of this greenhouse gas. Here, a novel system based on the use of surface-functionalized silicon quantum dots (sf-SiQDs) is theoretically proposed as a versatile device to bind carbon dioxide. Within this approach, carbon dioxide trapping is modulated by a photoinduced charge redistribution between the capping molecule and the silicon quantum dots (SiQDs). The chemical and electronic properties of the proposed SiQDs have been studied with a Density Functional Theory and Density Functional Tight-Binding (DFTB) approach along with a time-dependent model based on the DFTB framework. To the best of our knowledge, this is the first report that proposes and explores the potential application of a versatile and friendly device based on the use of sf-SiQDs for photochemically activated carbon dioxide fixation.

Communication: Photoinduced carbon dioxide binding with surface-functionalized silicon quantum dots

NASA Astrophysics Data System (ADS)

Douglas-Gallardo, Oscar A.; Sánchez, Cristián Gabriel; Vöhringer-Martinez, Esteban

2018-04-01

Nowadays, the search for efficient methods able to reduce the high atmospheric carbon dioxide concentration has turned into a very dynamic research area. Several environmental problems have been closely associated with the high atmospheric level of this greenhouse gas. Here, a novel system based on the use of surface-functionalized silicon quantum dots (sf-SiQDs) is theoretically proposed as a versatile device to bind carbon dioxide. Within this approach, carbon dioxide trapping is modulated by a photoinduced charge redistribution between the capping molecule and the silicon quantum dots (SiQDs). The chemical and electronic properties of the proposed SiQDs have been studied with a Density Functional Theory and Density Functional Tight-Binding (DFTB) approach along with a time-dependent model based on the DFTB framework. To the best of our knowledge, this is the first report that proposes and explores the potential application of a versatile and friendly device based on the use of sf-SiQDs for photochemically activated carbon dioxide fixation.

Ambipolar Barristors for Reconfigurable Logic Circuits.

PubMed

Liu, Yuan; Zhang, Guo; Zhou, Hailong; Li, Zheng; Cheng, Rui; Xu, Yang; Gambin, Vincent; Huang, Yu; Duan, Xiangfeng

2017-03-08

Vertical heterostructures based on graphene have emerged as a unique architecture for novel electronic devices with unusual characteristics. Here we report a new design of vertical ambipolar barristors based on metal-graphene-silicon-graphene sandwich structure, using the bottom graphene as a gate-tunable "active contact", the top graphene as an adaptable Ohmic contact, and the low doping thin silicon layer as the switchable channel. Importantly, with finite density of states and weak screening effect of graphene, we demonstrate, for the first time, that both the carrier concentration and majority carrier type in the sandwiched silicon can be readily modulated by gate potential penetrating through graphene. It can thus enable a new type of ambipolar barristors with an ON-OFF ratio exceeding 10 3 . Significantly, these ambipolar barristors can be flexibly configured into either p-type or n-type transistors and used to create integrated circuits with reconfigurable logic functions. This unconventional device structure and ambipolar reconfigurable characteristics can open up exciting opportunities in future electronics based on graphene or two-dimensional van der Waals heterostructures.

Growth of carbon nanotubes by Fe-catalyzed chemical vapor processes on silicon-based substrates

NASA Astrophysics Data System (ADS)

Angelucci, Renato; Rizzoli, Rita; Vinciguerra, Vincenzo; Fortuna Bevilacqua, Maria; Guerri, Sergio; Corticelli, Franco; Passini, Mara

2007-03-01

In this paper, a site-selective catalytic chemical vapor deposition synthesis of carbon nanotubes on silicon-based substrates has been developed in order to get horizontally oriented nanotubes for field effect transistors and other electronic devices. Properly micro-fabricated silicon oxide and polysilicon structures have been used as substrates. Iron nanoparticles have been obtained both from a thin Fe film evaporated by e-gun and from iron nitrate solutions accurately dispersed on the substrates. Single-walled nanotubes with diameters as small as 1 nm, bridging polysilicon and silicon dioxide “pillars”, have been grown. The morphology and structure of CNTs have been characterized by SEM, AFM and Raman spectroscopy.

Micrometer size polarization independent depletion-type photonic modulator in Silicon On Insulator

NASA Astrophysics Data System (ADS)

Gardes, F. Y.; Tsakmakidis, K. L.; Thomson, D.; Reed, G. T.; Mashanovich, G. Z.; Hess, O.; Avitabile, D.

2007-04-01

The trend in silicon photonics, in the last few years has been to reduce waveguide size to obtain maximum gain in the real estate of devices as well as to increase the performance of active devices. Using different methods for the modulation, optical modulators in silicon have seen their bandwidth increased to reach multi GHz frequencies. In order to simplify fabrication, one requirement for a waveguide, as well as for a modulator, is to retain polarisation independence in any state of operation and to be as small as possible. In this paper we provide a way to obtain polarization independence and improve the efficiency of an optical modulator using a V-shaped pn junction base on the natural etch angle of silicon, 54.7 deg. This modulator is compared to a flat junction depletion type modulator of the same size and doping concentration.

Heterojunction Solar Cells Based on Silicon and Composite Films of Graphene Oxide and Carbon Nanotubes.

PubMed

Yu, LePing; Tune, Daniel; Shearer, Cameron; Shapter, Joseph

2015-09-07

Graphene oxide (GO) sheets have been used as the surfactant to disperse single-walled carbon nanotubes (CNT) in water to prepare GO/CNT electrodes that are applied to silicon to form a heterojunction that can be used in solar cells. GO/CNT films with different ratios of the two components and with various thicknesses have been used as semitransparent electrodes, and the influence of both factors on the performance of the solar cell has been studied. The degradation rate of the GO/CNT-silicon devices under ambient conditions has also been explored. The influence of the film thickness on the device performance is related to the interplay of two competing factors, namely, sheet resistance and transmittance. CNTs help to improve the conductivity of the GO/CNT film, and GO is able to protect the silicon from oxidation in the atmosphere. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Athermal Annealing of Silicon

NASA Astrophysics Data System (ADS)

Fischer, R. P.; Grun, J.; Ting, A.; Felix, C.; Peckerar, M.; Fatemi, M.; Manka, C. K.

1999-11-01

Current semiconductor annealing methods are based on thermal processes which are accompanied by diffusion that degrades the definition of device features or causes other problems. This will be a serious obstacle for the production of next-generation ultra-high density, low power semiconductor devices. Experiments underway at NRL utilize a new annealing method which is much faster than thermal annealing and does not depend upon thermal energy (J. Grun, et al)., Phys. Rev. Letters 78, 1584 (1997).. A 10 J, 30 nsec, 1.053 nm wavelength laser pulse is focussed to approximately 1 mm diameter on a silicon sample. Acoustic and shock waves propagate from the impact region, which deposit mechanical energy into the material and anneal the silicon. Experimental results will be presented on annealing neutron-transmutation-doped (NTD) and ion implanted silicon samples with impurity concentrations from 1 × 10^15-3 × 10^20/cm^3.

View from... Group IV Photonics: Industry meets academia

NASA Astrophysics Data System (ADS)

Pile, David

2012-12-01

Silicon photonics and devices based on group IV elements are overcoming the tough economic downturns that have rocked industry over the past 12 years. Cross fertilization between academia and industry may lead to new devices that are both innovative and profitable.

Overview of Silicon Carbide Technology: Device, Converter, System, and Application

DOE PAGES

Wang, Fei; Zhang, Zheyu

2016-12-28

This article overviews the silicon carbide (SiC) technology. The focus is on the benefits of SiC based power electronics for converters and systems, as well as their ability in enabling new applications. The challenges and research trends on the design and application of SiC power electronics are also discussed.

Increasing Stabilized Performance Of Amorphous Silicon Based Devices Produced By Highly Hydrogen Diluted Lower Temperature Plasma Deposition.

DOEpatents

Li, Yaun-Min; Bennett, Murray S.; Yang, Liyou

1999-08-24

High quality, stable photovoltaic and electronic amorphous silicon devices which effectively resist light-induced degradation and current-induced degradation, are produced by a special plasma deposition process. Powerful, efficient single and multi-junction solar cells with high open circuit voltages and fill factors and with wider bandgaps, can be economically fabricated by the special plasma deposition process. The preferred process includes relatively low temperature, high pressure, glow discharge of silane in the presence of a high concentration of hydrogen gas.

Increased Stabilized Performance Of Amorphous Silicon Based Devices Produced By Highly Hydrogen Diluted Lower Temperature Plasma Deposition.

DOEpatents

Li, Yaun-Min; Bennett, Murray S.; Yang, Liyou

1997-07-08

High quality, stable photovoltaic and electronic amorphous silicon devices which effectively resist light-induced degradation and current-induced degradation, are produced by a special plasma deposition process. Powerful, efficient single and multi-junction solar cells with high open circuit voltages and fill factors and with wider bandgaps, can be economically fabricated by the special plasma deposition process. The preferred process includes relatively low temperature, high pressure, glow discharge of silane in the presence of a high concentration of hydrogen gas.

Silicon nanowires for photovoltaic solar energy conversion.

PubMed

Peng, Kui-Qing; Lee, Shuit-Tong

2011-01-11

Semiconductor nanowires are attracting intense interest as a promising material for solar energy conversion for the new-generation photovoltaic (PV) technology. In particular, silicon nanowires (SiNWs) are under active investigation for PV applications because they offer novel approaches for solar-to-electric energy conversion leading to high-efficiency devices via simple manufacturing. This article reviews the recent developments in the utilization of SiNWs for PV applications, the relationship between SiNW-based PV device structure and performance, and the challenges to obtaining high-performance cost-effective solar cells.

Silicon-based sleeve devices for chemical reactions

DOEpatents

Northrup, M. Allen; Mariella, Jr., Raymond P.; Carrano, Anthony V.; Balch, Joseph W.

1996-01-01

A silicon-based sleeve type chemical reaction chamber that combines heaters, such as doped polysilicon for heating, and bulk silicon for convection cooling. The reaction chamber combines a critical ratio of silicon and silicon nitride to the volume of material to be heated (e.g., a liquid) in order to provide uniform heating, yet low power requirements. The reaction chamber will also allow the introduction of a secondary tube (e.g., plastic) into the reaction sleeve that contains the reaction mixture thereby alleviating any potential materials incompatibility issues. The reaction chamber may be utilized in any chemical reaction system for synthesis or processing of organic, inorganic, or biochemical reactions, such as the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction, which are examples of a synthetic, thermal-cycling-based reaction. The reaction chamber may also be used in synthesis instruments, particularly those for DNA amplification and synthesis.

Silicon-based sleeve devices for chemical reactions

DOEpatents

Northrup, M.A.; Mariella, R.P. Jr.; Carrano, A.V.; Balch, J.W.

1996-12-31

A silicon-based sleeve type chemical reaction chamber is described that combines heaters, such as doped polysilicon for heating, and bulk silicon for convection cooling. The reaction chamber combines a critical ratio of silicon and silicon nitride to the volume of material to be heated (e.g., a liquid) in order to provide uniform heating, yet low power requirements. The reaction chamber will also allow the introduction of a secondary tube (e.g., plastic) into the reaction sleeve that contains the reaction mixture thereby alleviating any potential materials incompatibility issues. The reaction chamber may be utilized in any chemical reaction system for synthesis or processing of organic, inorganic, or biochemical reactions, such as the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction, which are examples of a synthetic, thermal-cycling-based reaction. The reaction chamber may also be used in synthesis instruments, particularly those for DNA amplification and synthesis. 32 figs.

Nanogranular SiO2 proton gated silicon layer transistor mimicking biological synapses

NASA Astrophysics Data System (ADS)

Liu, M. J.; Huang, G. S.; Feng, P.; Guo, Q. L.; Shao, F.; Tian, Z. A.; Li, G. J.; Wan, Q.; Mei, Y. F.

2016-06-01

Silicon on insulator (SOI)-based transistors gated by nanogranular SiO2 proton conducting electrolytes were fabricated to mimic synapse behaviors. This SOI-based device has both top proton gate and bottom buried oxide gate. Electrical transfer properties of top proton gate show hysteresis curves different from those of bottom gate, and therefore, excitatory post-synaptic current and paired pulse facilitation (PPF) behavior of biological synapses are mimicked. Moreover, we noticed that PPF index can be effectively tuned by the spike interval applied on the top proton gate. Synaptic behaviors and functions, like short-term memory, and its properties are also experimentally demonstrated in our device. Such SOI-based electronic synapses are promising for building neuromorphic systems.

Transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1995-05-09

A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

Method for fabricating transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1997-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Method for fabricating transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1997-09-02

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

A mock heart engineered with helical aramid fibers for in vitro cardiovascular device testing.

PubMed

Jansen-Park, So-Hyun; Hsu, Po-Lin; Müller, Indra; Steinseifer, Ulrich; Abel, Dirk; Autschbach, Rüdiger; Rossaint, Rolf; Schmitz-Rode, Thomas

2017-04-01

Mock heart circulation loops (MHCLs) serve as in-vitro platforms to investigate the physiological interaction between circulatory systems and cardiovascular devices. A mock heart (MH) engineered with silicone walls and helical aramid fibers, to mimic the complex contraction of a natural heart, has been developed to advance the MHCL previously developed in our group. A mock aorta with an anatomical shape enables the evaluation of a cannulation method for ventricular assist devices (VADs) and investigation of the usage of clinical measurement systems like pressure-volume catheters. Ventricle and aorta molds were produced based on MRI data and cast with silicone. Aramid fibers were layered in the silicone ventricle to reproduce ventricle torsion. A rotating hollow shaft was connected to the apex enabling the rotation of the MH and the connection of a VAD. Silicone wall thickness, aramid fiber angle and fiber pitch were varied to generate different MH models. All MH models were placed in a tank filled with variable amounts of water and air simulating the compliance. In this work, physiological ventricular torsion angles (15°-26°) and physiological pressure-volume loops were achieved. This MHCL can serve as a comprehensive testing platform for cardiovascular devices, such as artificial heart valves and cannulation of VADs.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.; Archer, Leo B.; Brown, George A.; Wallace, Robert M.

2000-01-01

An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.

High-performance silicon photonics technology for telecommunications applications.

PubMed

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-04-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge-based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge-based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications.

High-performance silicon photonics technology for telecommunications applications

PubMed Central

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-01-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge–based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge–based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications. PMID:27877659

High-performance silicon photonics technology for telecommunications applications

NASA Astrophysics Data System (ADS)

Yamada, Koji; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Hiraki, Tatsurou; Takeda, Kotaro; Fukuda, Hiroshi; Ishikawa, Yasuhiko; Wada, Kazumi; Yamamoto, Tsuyoshi

2014-04-01

By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge-based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge-based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications.

Microfabricated sleeve devices for chemical reactions

DOEpatents

Northrup, M. Allen

2003-01-01

A silicon-based sleeve type chemical reaction chamber that combines heaters, such as doped polysilicon for heating, and bulk silicon for convection cooling. The reaction chamber combines a critical ratio of silicon and non-silicon based materials to provide the thermal properties desired. For example, the chamber may combine a critical ratio of silicon and silicon nitride to the volume of material to be heated (e.g., a liquid) in order to provide uniform heating, yet low power requirements. The reaction chamber will also allow the introduction of a secondary tube (e.g., plastic) into the reaction sleeve that contains the reaction mixture thereby alleviating any potential materials incompatibility issues. The reaction chamber may be utilized in any chemical reaction system for synthesis or processing of organic, inorganic, or biochemical reactions, such as the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction, which are examples of a synthetic, thermal-cycling-based reaction. The reaction chamber may also be used in synthesis instruments, particularly those for DNA amplification and synthesis.

Heterogeneous silicon mesostructures for lipid-supported bioelectric interfaces

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Yuanwen; Carvalho-de-Souza, João L.; Wong, Raymond C. S.

Silicon-based materials have widespread application as biophysical tools and biomedical devices. Here we introduce a biocompatible and degradable mesostructured form of silicon with multi-scale structural and chemical heterogeneities. The material was synthesized using mesoporous silica as a template through a chemical vapour deposition process. It has an amorphous atomic structure, an ordered nanowire-based framework and random submicrometre voids, and shows an average Young’s modulus that is 2–3 orders of magnitude smaller than that of single-crystalline silicon. In addition, we used the heterogeneous silicon mesostructures to design a lipid-bilayer-supported bioelectric interface that is remotely controlled and temporally transient, and that permitsmore » non-genetic and subcellular optical modulation of the electrophysiology dynamics in single dorsal root ganglia neurons. Our findings suggest that the biomimetic expansion of silicon into heterogeneous and deformable forms can open up opportunities in extracellular biomaterial or bioelectric systems.« less

Heterogeneous silicon mesostructures for lipid-supported bioelectric interfaces

PubMed Central

Jiang, Yuanwen; Carvalho-de-Souza, João L.; Wong, Raymond C. S.; Luo, Zhiqiang; Isheim, Dieter; Zuo, Xiaobing; Nicholls, Alan W.; Jung, Il Woong; Yue, Jiping; Liu, Di-Jia; Wang, Yucai; De Andrade, Vincent; Xiao, Xianghui; Navrazhnykh, Luizetta; Weiss, Dara E.; Wu, Xiaoyang; Seidman, David N.; Bezanilla, Francisco; Tian, Bozhi

2017-01-01

Silicon-based materials have widespread application as biophysical tools and biomedical devices. Here we introduce a biocompatible and degradable mesostructured form of silicon with multiscale structural and chemical heterogeneities. The material was synthesized using mesoporous silica as a template through a chemical-vapor-deposition process. It has an amorphous atomic structure, an ordered nanowire-based framework, and random submicrometre voids, and shows an average Young’s modulus that is 2–3 orders of magnitude smaller than that of single crystalline silicon. In addition, we used the heterogeneous silicon mesostructures to design a lipid-bilayer-supported bioelectric interface that is remotely controlled and temporally transient, and that permits non-genetic and subcellular optical modulation of the electrophysiology dynamics in single dorsal root ganglia neurons. Our findings suggest that the biomimetic expansion of silicon into heterogeneous and deformable forms can open up opportunities in extracellular biomaterial or bioelectric systems. PMID:27348576

Fundamental device design considerations in the development of disruptive nanoelectronics.

PubMed

Singh, R; Poole, J O; Poole, K F; Vaidya, S D

2002-01-01

In the last quarter of a century silicon-based integrated circuits (ICs) have played a major role in the growth of the economy throughout the world. A number of new technologies, such as quantum computing, molecular computing, DNA molecules for computing, etc., are currently being explored to create a product to replace semiconductor transistor technology. We have examined all of the currently explored options and found that none of these options are suitable as silicon IC's replacements. In this paper we provide fundamental device criteria that must be satisfied for the successful operation of a manufacturable, not yet invented, device. The two fundamental limits are the removal of heat and reliability. The switching speed of any practical man-made computing device will be in the range of 10(-15) to 10(-3) s. Heisenberg's uncertainty principle and the computer architecture set the heat generation limit. The thermal conductivity of the materials used in the fabrication of a nanodimensional device sets the heat removal limit. In current electronic products, redundancy plays a significant part in improving the reliability of parts with macroscopic defects. In the future, microscopic and even nanoscopic defects will play a critical role in the reliability of disruptive nanoelectronics. The lattice vibrations will set the intrinsic reliability of future computing systems. The two critical limits discussed in this paper provide criteria for the selection of materials used in the fabrication of future devices. Our work shows that diamond contains the clue to providing computing devices that will surpass the performance of silicon-based nanoelectronics.

Photovoltaic device using single wall carbon nanotubes and method of fabricating the same

DOEpatents

Biris, Alexandru S.; Li, Zhongrui

2012-11-06

A photovoltaic device and methods for forming the same. In one embodiment, the photovoltaic device has a silicon substrate, and a film comprising a plurality of single wall carbon nanotubes disposed on the silicon substrate, wherein the plurality of single wall carbon nanotubes forms a plurality of heterojunctions with the silicon in the substrate.

A molecular shift register based on electron transfer

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Josenelson; Beratan, David N.

1988-01-01

An electronic shift-register memory at the molecular level is described. The memory elements are based on a chain of electron-transfer molecules and the information is shifted by photoinduced electron-transfer reactions. This device integrates designed electronic molecules onto a very large scale integrated (silicon microelectronic) substrate, providing an example of a 'molecular electronic device' that could actually be made. The design requirements for such a device and possible synthetic strategies are discussed. Devices along these lines should have lower energy usage and enhanced storage density.

Comparison of nickel silicide and aluminium ohmic contact metallizations for low-temperature quantum transport measurements.

PubMed

Polley, Craig M; Clarke, Warrick R; Simmons, Michelle Y

2011-10-03

We examine nickel silicide as a viable ohmic contact metallization for low-temperature, low-magnetic-field transport measurements of atomic-scale devices in silicon. In particular, we compare a nickel silicide metallization with aluminium, a common ohmic contact for silicon devices. Nickel silicide can be formed at the low temperatures (<400°C) required for maintaining atomic precision placement in donor-based devices, and it avoids the complications found with aluminium contacts which become superconducting at cryogenic measurement temperatures. Importantly, we show that the use of nickel silicide as an ohmic contact at low temperatures does not affect the thermal equilibration of carriers nor contribute to hysteresis in a magnetic field.

High-alignment-accuracy transfer printing of passive silicon waveguide structures.

PubMed

Ye, Nan; Muliuk, Grigorij; Trindade, Antonio Jose; Bower, Chris; Zhang, Jing; Uvin, Sarah; Van Thourhout, Dries; Roelkens, Gunther

2018-01-22

We demonstrate the transfer printing of passive silicon devices on a silicon-on-insulator target waveguide wafer. Adiabatic taper structures and directional coupler structures were designed for 1310 nm and 1600 nm wavelength coupling tolerant for ± 1 µm misalignment. The release of silicon devices from the silicon substrate was realized by underetching the buried oxide layer while protecting the back-end stack. Devices were successfully picked by a PDMS stamp, by breaking the tethers that kept the silicon coupons in place on the source substrate, and printed with high alignment accuracy on a silicon photonic target wafer. Coupling losses of -1.5 +/- 0.5 dB for the adiabatic taper at 1310 nm wavelength and -0.5 +/- 0.5 dB for the directional coupler at 1600 nm wavelength are obtained.

Plasmonic engineering of spontaneous emission from silicon nanocrystals.

PubMed

Goffard, Julie; Gérard, Davy; Miska, Patrice; Baudrion, Anne-Laure; Deturche, Régis; Plain, Jérôme

2013-01-01

Silicon nanocrystals offer huge advantages compared to other semi-conductor quantum dots as they are made from an abundant, non-toxic material and are compatible with silicon devices. Besides, among a wealth of extraordinary properties ranging from catalysis to nanomedicine, metal nanoparticles are known to increase the radiative emission rate of semiconductor quantum dots. Here, we use gold nanoparticles to accelerate the emission of silicon nanocrystals. The resulting integrated hybrid emitter is 5-fold brighter than bare silicon nanocrystals. We also propose an in-depth analysis highlighting the role of the different physical parameters in the photoluminescence enhancement phenomenon. This result has important implications for the practical use of silicon nanocrystals in optoelectronic devices, for instance for the design of efficient down-shifting devices that could be integrated within future silicon solar cells.

Energy Conversion Properties of ZnSiP2, a Lattice-Matched Material for Silicon-Based Tandem Photovoltaics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Martinez, Aaron D.; Warren, Emily L.; Gorai, Prashun

ZnSiP2 demonstrates promising potential as an optically active material on silicon. There has been a longstanding need for wide band gap materials that can be integrated with Si for tandem photovoltaics and other optoelectronic applications. ZnSiP2 is an inexpensive, earth abundant, wide band gap material that is stable and lattice matched with silicon. This conference proceeding summarizes our PV-relevant work on bulk single crystal ZnSiP2, highlighting the key findings and laying the ground work for integration into Si-based tandem devices.

Integration of mask and silicon metrology in DFM

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

2009-03-01

We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based on the profiling method of the field proven CD metrology algorithm. The detected edges are then converted to GDSII format, which is a standard format for a design data, and utilized for various DFM systems such as simulation. Namely, by integrating pattern shapes of mask and silicon formed during a manufacturing process into GDSII format, it makes it possible to bridge highly accurate pattern profile information over to the design field of various EDA systems. These are fully integrated into design data and automated. Bi-directional cross probing between mask data and process control data is allowed by linking them. This method is a solution for total optimization that covers Design, MDP, mask production and silicon device producing. This method therefore is regarded as a strategic DFM approach in the semiconductor metrology.

Process for forming a porous silicon member in a crystalline silicon member

DOEpatents

Northrup, M. Allen; Yu, Conrad M.; Raley, Norman F.

1999-01-01

Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters.

Exploration of maximum count rate capabilities for large-area photon counting arrays based on polycrystalline silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua

2016-03-01

Pixelated photon counting detectors with energy discrimination capabilities are of increasing clinical interest for x-ray imaging. Such detectors, presently in clinical use for mammography and under development for breast tomosynthesis and spectral CT, usually employ in-pixel circuits based on crystalline silicon - a semiconductor material that is generally not well-suited for economic manufacture of large-area devices. One interesting alternative semiconductor is polycrystalline silicon (poly-Si), a thin-film technology capable of creating very large-area, monolithic devices. Similar to crystalline silicon, poly-Si allows implementation of the type of fast, complex, in-pixel circuitry required for photon counting - operating at processing speeds that are not possible with amorphous silicon (the material currently used for large-area, active matrix, flat-panel imagers). The pixel circuits of two-dimensional photon counting arrays are generally comprised of four stages: amplifier, comparator, clock generator and counter. The analog front-end (in particular, the amplifier) strongly influences performance and is therefore of interest to study. In this paper, the relationship between incident and output count rate of the analog front-end is explored under diagnostic imaging conditions for a promising poly-Si based design. The input to the amplifier is modeled in the time domain assuming a realistic input x-ray spectrum. Simulations of circuits based on poly-Si thin-film transistors are used to determine the resulting output count rate as a function of input count rate, energy discrimination threshold and operating conditions.

Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

PubMed

Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

2017-12-13

Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

A Photonic 1 × 4 Power Splitter Based on Multimode Interference in Silicon-Gallium-Nitride Slot Waveguide Structures.

PubMed

Malka, Dror; Danan, Yossef; Ramon, Yehonatan; Zalevsky, Zeev

2016-06-25

In this paper, a design for a 1 × 4 optical power splitter based on the multimode interference (MMI) coupler in a silicon (Si)-gallium nitride (GaN) slot waveguide structure is presented-to our knowledge, for the first time. Si and GaN were found as suitable materials for the slot waveguide structure. Numerical optimizations were carried out on the device parameters using the full vectorial-beam propagation method (FV-BPM). Simulation results show that the proposed device can be useful to divide optical signal energy uniformly in the C-band range (1530-1565 nm) into four output ports with low insertion losses (0.07 dB).

Silicon-nanomembrane-based photonic crystal nanostructures for chip-integrated open sensor systems

NASA Astrophysics Data System (ADS)

Chakravarty, Swapnajit; Lai, Wei-Cheng; Zou, Yi; Lin, Cheyun; Wang, Xiaolong; Chen, Ray T.

2011-11-01

We experimentally demonstrate two devices on the photonic crystal platform for chip-integrated optical absorption spectroscopy and chip-integrated biomolecular microarray assays. Infrared optical absorption spectroscopy and biomolecular assays based on conjugate-specific binding principles represent two dominant sensing mechanisms for a wide spectrum of applications in environmental pollution sensing in air and water, chem-bio agents and explosives detection for national security, microbial contamination sensing in food and beverages to name a few. The easy scalability of photonic crystal devices to any wavelength ensures that the sensing principles hold across a wide electromagnetic spectrum. Silicon, the workhorse of the electronics industry, is an ideal platform for the above optical sensing applications.

“Playing around” with Field-Effect Sensors on the Basis of EIS Structures, LAPS and ISFETs

PubMed Central

Schöning, Michael J.

2005-01-01

Microfabricated semiconductor devices are becoming increasingly relevant, also for the detection of biological and chemical quantities. Especially, the “marriage” of biomolecules and silicon technology often yields successful new sensor concepts. The fabrication techniques of such silicon-based chemical sensors and biosensors, respectively, will have a distinct impact in different fields of application such as medicine, food technology, environment, chemistry and biotechnology as well as information processing. Moreover, scientists and engineers are interested in the analytical benefits of miniaturised and microfabricated sensor devices. This paper gives a survey on different types of semiconductor-based field-effect structures that have been recently developed in our laboratory.

Ultrafast and sensitive photodetector based on a PtSe2/silicon nanowire array heterojunction with a multiband spectral response from 200 to 1550 nm

NASA Astrophysics Data System (ADS)

Zeng, Longhui; Lin, Shenghuang; Lou, Zhenhua; Yuan, Huiyu; Long, Hui; Li, Yanyong; Lu, Wei; Lau, Shu Ping; Wu, Di; Tsang, Yuen Hong

2018-04-01

The newly discovered Group-10 transition metal dichalcogenides (TMDs) like PtSe2 have promising applications in high-performance microelectronic and optoelectronic devices due to their high carrier mobilities, widely tunable bandages and ultrastabilities. However, the optoelectronic performance of broadband PtSe2 photodetectors integrated with silicon remains undiscovered. Here, we report the successful preparation of large-scale, uniform and vertically grown PtSe2 films by simple selenization method for the design of a PtSe2/Si nanowire array heterostructure, which exhibited a very good photoresponsivity of 12.65 A/W, a high specific detectivity of 2.5 × 1013 Jones at -5 V and fast rise/fall times of 10.1/19.5 μs at 10 kHz without degradation while being capable of responding to high frequencies of up to 120 kHz. Our work has demonstrated the compatibility of PtSe2 with the existing silicon technology and ultrabroad band detection ranging from deep ultraviolet to optical telecommunication wavelengths, which can largely cover the limitations of silicon detectors. Further investigation of the device revealed pronounced photovoltaic behavior at 0 V, making it capable of operating as a self-powered photodetector. Overall, this representative PtSe2/Si nanowire array-based photodetector offers great potential for applications in next-generation optoelectronic and electronic devices.

Reconfigurable and tunable compact comb filter and (de)interleaver on silicon platform.

PubMed

Zhou, Nan; Zheng, Shuang; Long, Yun; Ruan, Zhengsen; Shen, Li; Wang, Jian

2018-02-19

We propose and demonstrate a reconfigurable and tunable chip-scale comb filter and (de)interleaver on a silicon platform. The silicon-based photonic integrated device is formed by Sagnac loop mirrors (SLMs) with directional couplers replaced by multi-mode interference (MMI) assisted tunable Mach-Zehnder interferometer (MZI) couplers. The device can be regarded as a large SLM incorporating two small SLMs which form a Fabry-Perot (FP) cavity. By appropriately adjusting the micro-heaters in tunable MZI couplers and cavity, switchable operation between comb filter and (de)interleaver and extinction ratio and wavelength tunable operations of comb filter and (de)interleaver are achievable by thermo-optic tuning. Reconfigurable comb filter and (de)interleaver is demonstrated in the experiment. The central wavelength shifts of comb filter and (de)interleaver are demonstrated with wavelength tuning efficiencies of ~0.0224 nm/mW and ~0.0193 nm/mW, respectively. The 3-dB bandwidth of the comb filter is ~0.032 nm. The 3-dB and 20-dB bandwidths of the (de)interleaver passband are ~0.225 nm and ~0.326 nm. The obtained results indicate that the designed and fabricated device provides switchable comb filtering and interleaving functions together with extinction ratio and wavelength tunabilities. Reconfigurable and tunable silicon-based comb filter and (de)interleaver may find potential applications in robust wavelength-division multiplexing (WDM) optical communication systems.

Silicon detectors for combined MR-PET and MR-SPECT imaging

NASA Astrophysics Data System (ADS)

Studen, A.; Brzezinski, K.; Chesi, E.; Cindro, V.; Clinthorne, N. H.; Cochran, E.; Grošičar, B.; Grkovski, M.; Honscheid, K.; Kagan, H.; Lacasta, C.; Llosa, G.; Mikuž, M.; Stankova, V.; Weilhammer, P.; Žontar, D.

2013-02-01

Silicon based devices can extend PET-MR and SPECT-MR imaging to applications, where their advantages in performance outweigh benefits of high statistical counts. Silicon is in many ways an excellent detector material with numerous advantages, among others: excellent energy and spatial resolution, mature processing technology, large signal to noise ratio, relatively low price, availability, versatility and malleability. The signal in silicon is also immune to effects of magnetic field at the level normally used in MR devices. Tests in fields up to 7 T were performed in a study to determine effects of magnetic field on positron range in a silicon PET device. The curvature of positron tracks in direction perpendicular to the field's orientation shortens the distance between emission and annihilation point of the positron. The effect can be fully appreciated for a rotation of the sample for a fixed field direction, compressing range in all dimensions. A popular Ga-68 source was used showing a factor of 2 improvement in image noise compared to zero field operation. There was also a little increase in noise as the reconstructed resolution varied between 2.5 and 1.5 mm. A speculative applications can be recognized in both emission modalities, SPECT and PET. Compton camera is a subspecies of SPECT, where a silicon based scatter as a MR compatible part could inserted into the MR bore and the secondary detector could operate in less constrained environment away from the magnet. Introducing a Compton camera also relaxes requirements of the radiotracers used, extending the range of conceivable photon energies beyond 140.5 keV of the Tc-99m. In PET, one could exploit the compressed sub-millimeter range of positrons in the magnetic field. To exploit the advantage, detectors with spatial resolution commensurate to the effect must be used with silicon being an excellent candidate. Measurements performed outside of the MR achieving spatial resolution below 1 mm are reported.

Delta-Doping at Wafer Level for High Throughput, High Yield Fabrication of Silicon Imaging Arrays

NASA Technical Reports Server (NTRS)

Hoenk, Michael E. (Inventor); Nikzad, Shoulch (Inventor); Jones, Todd J. (Inventor); Greer, Frank (Inventor); Carver, Alexander G. (Inventor)

2014-01-01

Systems and methods for producing high quantum efficiency silicon devices. A silicon MBE has a preparation chamber that provides for cleaning silicon surfaces using an oxygen plasma to remove impurities and a gaseous (dry) NH3 + NF3 room temperature oxide removal process that leaves the silicon surface hydrogen terminated. Silicon wafers up to 8 inches in diameter have devices that can be fabricated using the cleaning procedures and MBE processing, including delta doping.

Evaluation of Silicon-on-Insulator HTOP-01 Operational Amplifier for Wide Temperature Operation

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik

2008-01-01

Electronics capable of operation under extreme temperatures are required in many of NASA space exploration missions. Aerospace and military applications, as well as some terrestrial industries constitute environments where electronic systems are anticipated to be exposed to extreme temperatures and wide-range thermal swings. Electronics that are able to withstand and operate efficiently in such harsh environments would simplify, if not eliminate, traditional thermal control elements and their associated structures for proper ambient operation. As a result, overall system mass would be reduced, design would be simplified, and reliability would be improved. Electronic parts that are built utilizing silicon-on-insulator (SOI) technology are known to offer better radiation-tolerance compared to their conventional silicon counterparts, provide faster switching, and consume less power. They also exhibit reduced leakage current and, thus, they are often tailored for high temperature operation. These attributes make SOI-based devices suitable for use in harsh environments where extreme temperatures and wide thermal swings are anticipated. A new operational amplifier, based on silicon-on-insulator technology and geared for high temperature well-logging applications, was recently introduced by Honeywell Corporation. This HTOP-01 dual precision operational amplifier is a low power device, operates on a single supply, and has an internal oscillator and an external clocking option [1]. It is rated for operation from -55 C to +225 C with a maximum output current capability of 50 mA. The amplifier chip is designed as a 14-pin, hermetically-sealed device in a ceramic package. Table I shows some of the device manufacturer s specifications.

Rapid Prototyping of Nanofluidic Slits in a Silicone Bilayer

PubMed Central

Kole, Thomas P.; Liao, Kuo-Tang; Schiffels, Daniel; Ilic, B. Robert; Strychalski, Elizabeth A.; Kralj, Jason G.; Liddle, J. Alexander; Dritschilo, Anatoly; Stavis, Samuel M.

2015-01-01

This article reports a process for rapidly prototyping nanofluidic devices, particularly those comprising slits with microscale widths and nanoscale depths, in silicone. This process consists of designing a nanofluidic device, fabricating a photomask, fabricating a device mold in epoxy photoresist, molding a device in silicone, cutting and punching a molded silicone device, bonding a silicone device to a glass substrate, and filling the device with aqueous solution. By using a bilayer of hard and soft silicone, we have formed and filled nanofluidic slits with depths of less than 400 nm and aspect ratios of width to depth exceeding 250 without collapse of the slits. An important attribute of this article is that the description of this rapid prototyping process is very comprehensive, presenting context and details which are highly relevant to the rational implementation and reliable repetition of the process. Moreover, this process makes use of equipment commonly found in nanofabrication facilities and research laboratories, facilitating the broad adaptation and application of the process. Therefore, while this article specifically informs users of the Center for Nanoscale Science and Technology (CNST) at the National Institute of Standards and Technology (NIST), we anticipate that this information will be generally useful for the nanofabrication and nanofluidics research communities at large, and particularly useful for neophyte nanofabricators and nanofluidicists. PMID:26958449

Silicon Materials and Devices R&D | Photovoltaic Research | NREL

Science.gov Websites

" and "Si-based Tandem Solar Cells"), Next Generation Photovoltaics (NextGen PV III), and devices, especially for photovoltaic (PV) cell applications. PV Research Other Materials & Devices pages: High-Efficiency Crystalline PV Polycrystalline Thin-Film PV Perovskite and Organic PV Advanced PV

A strained silicon cold electron bolometer using Schottky contacts

NASA Astrophysics Data System (ADS)

Brien, T. L. R.; Ade, P. A. R.; Barry, P. S.; Dunscombe, C.; Leadley, D. R.; Morozov, D. V.; Myronov, M.; Parker, E. H. C.; Prest, M. J.; Prunnila, M.; Sudiwala, R. V.; Whall, T. E.; Mauskopf, P. D.

2014-07-01

We describe optical characterisation of a strained silicon cold electron bolometer (CEB), operating on a 350 mK stage, designed for absorption of millimetre-wave radiation. The silicon cold electron bolometer utilises Schottky contacts between a superconductor and an n++ doped silicon island to detect changes in the temperature of the charge carriers in the silicon, due to variations in absorbed radiation. By using strained silicon as the absorber, we decrease the electron-phonon coupling in the device and increase the responsivity to incoming power. The strained silicon absorber is coupled to a planar aluminium twin-slot antenna designed to couple to 160 GHz and that serves as the superconducting contacts. From the measured optical responsivity and spectral response, we calculate a maximum optical efficiency of 50% for radiation coupled into the device by the planar antenna and an overall noise equivalent power, referred to absorbed optical power, of 1.1×10-16 W Hz-1/2 when the detector is observing a 300 K source through a 4 K throughput limiting aperture. Even though this optical system is not optimized, we measure a system noise equivalent temperature difference of 6 mK Hz-1/2. We measure the noise of the device using a cross-correlation of time stream data, measured simultaneously with two junction field-effect transistor amplifiers, with a base correlated noise level of 300 pV Hz-1/2 and find that the total noise is consistent with a combination of photon noise, current shot noise, and electron-phonon thermal noise.

Device research task (processing and high-efficiency solar cells)

NASA Technical Reports Server (NTRS)

1986-01-01

This task has been expanded since the last 25th Project Integration Meeting (PIM) to include process research in addition to device research. The objective of this task is to assist the Flat-plate Solar Array (FSA) Project in meeting its near- and long-term goals by identifying and implementing research in the areas of device physics, device structures, measurement techniques, material-device interactions, and cell processing. The research efforts of this task are described and reflect the deversity of device research being conducted. All of the contracts being reported are either completed or near completion and culminate the device research efforts of the FSA Project. Optimazation methods and silicon solar cell numerical models, carrier transport and recombination parameters in heavily doped silicon, development and analysis of silicon solar cells of near 20% efficiency, and SiN sub x passivation of silicon surfaces are discussed.

Polarized electroluminescence from edge-emission organic light emitting devices

NASA Astrophysics Data System (ADS)

Ran, G. Z.; Jiang, D. F.

2011-01-01

We report the experimental observation and measurement of the polarized electroluminescence from an edge-emission Si based- organic light emitting device (OLED) with a Sm/Au or Sm/Ag cathode. Light collected from the OLED edge comes from the scattering of the surface plasmon polaritons (SPPs) at the device boundary. This experiment shows that such Si-OLED can be an electrically excited SPP source on a silicon chip for optical interconnect based on SPPs.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Formation of ultra Si/Ti nano thin film for enhancing silicon solar cell efficiency

NASA Astrophysics Data System (ADS)

Adam, T.; Dhahi, T. S.; Mohammed, M.; Al-Hajj, A. M.; Hashim, U.

2017-10-01

An alternative electrical source has l has become the major quest of every researchers due to it numerous advantages and applications of power supply and as electronic devices are becoming more and more portable. A highly efficient power supply is become inevitable. Thus. in this study, present ultrasonic based assisted fabrication of electrochemical silicon-Titanium nano thin film by in-house simple technique, uniformly silicon Nano film was fabricated and etched with HF (40%): C2H5OH (99%):1:1, < 20 nm pore diameter of silicon was fabricated. The surface and morphology reveal that the method produce uniform nano silicon porous layer with smaller silicon pores with high etching efficiency. The silicon-Titanium integrated nano porous exhibited excellent observation properties with low reflection index ~ 1.1 compared to silicon alone thin film.

Back contact to film silicon on metal for photovoltaic cells

DOEpatents

Branz, Howard M.; Teplin, Charles; Stradins, Pauls

2013-06-18

A crystal oriented metal back contact for solar cells is disclosed herein. In one embodiment, a photovoltaic device and methods for making the photovoltaic device are disclosed. The photovoltaic device includes a metal substrate with a crystalline orientation and a heteroepitaxial crystal silicon layer having the same crystal orientation of the metal substrate. A heteroepitaxial buffer layer having the crystal orientation of the metal substrate is positioned between the substrate and the crystal silicon layer to reduce diffusion of metal from the metal foil into the crystal silicon layer and provide chemical compatibility with the heteroepitaxial crystal silicon layer. Additionally, the buffer layer includes one or more electrically conductive pathways to electrically couple the crystal silicon layer and the metal substrate.

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

NASA Technical Reports Server (NTRS)

Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Del Castillo, Linda Y.; Fitzpatrick, Fred; Chen, Yuan

2016-01-01

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Mid-infrared integrated photonics on silicon: a perspective

NASA Astrophysics Data System (ADS)

Lin, Hongtao; Luo, Zhengqian; Gu, Tian; Kimerling, Lionel C.; Wada, Kazumi; Agarwal, Anu; Hu, Juejun

2017-12-01

The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR) telecommunication bands, the mid-infrared (mid-IR, 2-20-μm wavelength) band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

Athermal Photonic Devices and Circuits on a Silicon Platform

NASA Astrophysics Data System (ADS)

Raghunathan, Vivek

In recent years, silicon based optical interconnects has been pursued as an effective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in significant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the effect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiN x to hermetically seal the athermal. Further, we employ visible light for post-fabrication trimming of athermal rings by sandwiching a thin photosensitive layer of As2S3 in between amorphous Si core and polymer top cladding. System design of an add-drop filter requires an optimum combination of channel counts performance and power handling capacity for maximum aggregate bandwidth. We establish the superior performance of athermal add-drop filter compared to a standard filter treating bandwidth as the figure-of-merit. (Copies available exclusively from MIT Libraries, libraries.mit.edu/docs - docs mit.edu)

Step-gate polysilicon nanowires field effect transistor compatible with CMOS technology for label-free DNA biosensor.

PubMed

Wenga, G; Jacques, E; Salaün, A-C; Rogel, R; Pichon, L; Geneste, F

2013-02-15

Currently, detection of DNA hybridization using fluorescence-based detection technique requires expensive optical systems and complex bioinformatics tools. Hence, the development of new low cost devices that enable direct and highly sensitive detection stimulates a lot of research efforts. Particularly, devices based on silicon nanowires are emerging as ultrasensitive electrical sensors for the direct detection of biological species thanks to their high surface to volume ratio. In this study, we propose innovative devices using step-gate polycrystalline silicon nanowire FET (poly-Si NW FETs), achieved with simple and low cost fabrication process, and used as ultrasensitive electronic sensor for DNA hybridization. The poly-SiNWs are synthesized using the sidewall spacer formation technique. The detailed fabrication procedure for a step-gate NWFET sensor is described in this paper. No-complementary and complementary DNA sequences were clearly discriminated and detection limit to 1 fM range is observed. This first result using this nano-device is promising for the development of low cost and ultrasensitive polysilicon nanowires based DNA sensors compatible with the CMOS technology. Copyright © 2012 Elsevier B.V. All rights reserved.

Pseudo-direct bandgap transitions in silicon nanocrystals: effects on optoelectronics and thermoelectrics.

PubMed

Singh, Vivek; Yu, Yixuan; Sun, Qi-C; Korgel, Brian; Nagpal, Prashant

2014-12-21

While silicon nanostructures are extensively used in electronics, the indirect bandgap of silicon poses challenges for optoelectronic applications like photovoltaics and light emitting diodes (LEDs). Here, we show that size-dependent pseudo-direct bandgap transitions in silicon nanocrystals dominate the interactions between (photoexcited) charge carriers and phonons, and hence the optoelectronic properties of silicon nanocrystals. Direct measurements of the electronic density of states (DOS) for different sized silicon nanocrystals reveal that these pseudo-direct transitions, likely arising from the nanocrystal surface, can couple with the quantum-confined silicon states. Moreover, we demonstrate that since these transitions determine the interactions of charge carriers with phonons, they change the light emission, absorption, charge carrier diffusion and phonon drag (Seebeck coefficient) in nanoscaled silicon semiconductors. Therefore, these results can have important implications for the design of optoelectronics and thermoelectric devices based on nanostructured silicon.

Method of fabricating porous silicon carbide (SiC)

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1995-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Charge plasma technique based dopingless accumulation mode junctionless cylindrical surrounding gate MOSFET: analog performance improvement

NASA Astrophysics Data System (ADS)

Trivedi, Nitin; Kumar, Manoj; Haldar, Subhasis; Deswal, S. S.; Gupta, Mridula; Gupta, R. S.

2017-09-01

A charge plasma technique based dopingless (DL) accumulation mode (AM) junctionless (JL) cylindrical surrounding gate (CSG) MOSFET has been proposed and extensively investigated. Proposed device has no physical junction at source to channel and channel to drain interface. The complete silicon pillar has been considered as undoped. The high free electron density or induced N+ region is designed by keeping the work function of source/drain metal contacts lower than the work function of undoped silicon. Thus, its fabrication complexity is drastically reduced by curbing the requirement of high temperature doping techniques. The electrical/analog characteristics for the proposed device has been extensively investigated using the numerical simulation and are compared with conventional junctionless cylindrical surrounding gate (JL-CSG) MOSFET with identical dimensions. For the numerical simulation purpose ATLAS-3D device simulator is used. The results show that the proposed device is more short channel immune to conventional JL-CSG MOSFET and suitable for faster switching applications due to higher I ON/ I OFF ratio.

Superhydrophobic surfaces’ influence on streaming current based energy harvester

NASA Astrophysics Data System (ADS)

Fouché, Florent; Dargent, Thomas; Coffinier, Yannick; Treizebré, Anthony; Vlandas, Alexis; Senez, Vincent

2016-11-01

The purpose of this paper is to report the design, fabrication and characterization of silicon-based microfluidic channels with superhydrophobic walls for energy harvesting. We present the fabrication step of silicon based streaming current energy harvester and the nanostructuration of the microchannel walls. We characterize the superhydrophobic properties of the surface in a closed system. Our preliminary results on the electrical characterization of the device show a 43% increase of power harvested with our superhydrophobic surface compared to a planar hydrophobic surface.

Dopant atoms as quantum components in silicon nanoscale devices

NASA Astrophysics Data System (ADS)

Zhao, Xiaosong; Han, Weihua; Wang, Hao; Ma, Liuhong; Li, Xiaoming; Zhang, Wang; Yan, Wei; Yang, Fuhua

2018-06-01

Recent progress in nanoscale fabrication allows many fundamental studies of the few dopant atoms in various semiconductor nanostructures. Since the size of nanoscale devices has touched the limit of the nature, a single dopant atom may dominate the performance of the device. Besides, the quantum computing considered as a future choice beyond Moore's law also utilizes dopant atoms as functional units. Therefore, the dopant atoms will play a significant role in the future novel nanoscale devices. This review focuses on the study of few dopant atoms as quantum components in silicon nanoscale device. The control of the number of dopant atoms and unique quantum transport characteristics induced by dopant atoms are presented. It can be predicted that the development of nanoelectronics based on dopant atoms will pave the way for new possibilities in quantum electronics. Project supported by National Key R&D Program of China (No. 2016YFA0200503).

A wearable strain sensor based on a carbonized nano-sponge/silicone composite for human motion detection.

PubMed

Yu, Xiao-Guang; Li, Yuan-Qing; Zhu, Wei-Bin; Huang, Pei; Wang, Tong-Tong; Hu, Ning; Fu, Shao-Yun

2017-05-25

Melamine sponge, also known as nano-sponge, is widely used as an abrasive cleaner in our daily life. In this work, the fabrication of a wearable strain sensor for human motion detection is first demonstrated with a commercially available nano-sponge as a starting material. The key resistance sensitive material in the wearable strain sensor is obtained by the encapsulation of a carbonized nano-sponge (CNS) with silicone resin. The as-fabricated CNS/silicone sensor is highly sensitive to strain with a maximum gauge factor of 18.42. In addition, the CNS/silicone sensor exhibits a fast and reliable response to various cyclic loading within a strain range of 0-15% and a loading frequency range of 0.01-1 Hz. Finally, the CNS/silicone sensor as a wearable device for human motion detection including joint motion, eye blinking, blood pulse and breathing is demonstrated by attaching the sensor to the corresponding parts of the human body. In consideration of the simple fabrication technique, low material cost and excellent strain sensing performance, the CNS/silicone sensor is believed to have great potential in the next-generation of wearable devices for human motion detection.

Three-dimensional crossbar arrays of self-rectifying Si/SiO 2/Si memristors

DOE PAGES

Li, Can; Han, Lili; Jiang, Hao; ...

2017-06-05

Memristors are promising building blocks for the next generation memory, unconventional computing systems and beyond. Currently common materials used to build memristors are not necessarily compatible with the silicon dominant complementary metal-oxide-semiconductor (CMOS) technology. Furthermore, external selector devices or circuits are usually required in order for large memristor arrays to function properly, resulting in increased circuit complexity. Here we demonstrate fully CMOS-compatible, all-silicon based and self-rectifying memristors that negate the need for external selectors in large arrays. It consists of p- and n-type doped single crystalline silicon electrodes and a thin chemically produced silicon oxide switching layer. The device exhibitsmore » repeatable resistance switching behavior with high rectifying ratio (10 5), high ON/OFF conductance ratio (10 4) and attractive retention at 300 °C. We further build a 5-layer 3-dimensional (3D) crossbar array of 100 nm memristors by stacking fluid supported silicon membranes. The CMOS compatibility and self-rectifying behavior open up opportunities for mass production of memristor arrays and 3D hybrid circuits on full-wafer scale silicon and flexible substrates without increasing circuit complexity.« less

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

Silicon single mode waveguide modulator based upon switchable Bragg reflector

NASA Astrophysics Data System (ADS)

Azogui, Jonathan; Ramon, Yonathan; Businaro, Luca; Ciasca, Gabriele; Gerardino, Annamaria; Zalevsky, Zeev

2018-02-01

In this paper we present the development of an electro optical "Bragg" modulator for telecommunication, in both design and fabrication. The device consists from a regular single mode silicon waveguide (WG) in which an effective Bragg reflector is "turned on" within the WG by means of external bias, due to the plasma dispersion effect, in which the (complexed) refractive index is affected by carrier concentration within the Silicon. Three different strategies are presented for both design and fabrication.

Reproduction of mouse-pup ultrasonic vocalizations by nanocrystalline silicon thermoacoustic emitter

NASA Astrophysics Data System (ADS)

Kihara, Takashi; Harada, Toshihiro; Kato, Masahiro; Nakano, Kiyoshi; Murakami, Osamu; Kikusui, Takefumi; Koshida, Nobuyoshi

2006-01-01

As one of the functional properties of ultrasound generator based on efficient thermal transfer at the nanocrystalline silicon (nc-Si) layer surface, its potential as an ultrasonic simulator of vocalization signals is demonstrated by using the acoustic data of mouse-pup calls. The device composed of a surface-heating thin-film electrode, an nc-Si layer, and a single-crystalline silicon (c-Si) wafer, exhibits an almost completely flat frequency response over a wide range without any mechanical surface vibration systems. It is shown that the fabricated emitter can reproduce digitally recorded ultrasonic mouse-pups vocalizations very accurately in terms of the call duration, frequency dispersion, and sound pressure level. The thermoacoustic nc-Si device provides a powerful physical means for the understanding of ultrasonic communication mechanisms in various living animals.

Design optimization of beta- and photovoltaic conversion devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wichner, R.; Blum, A.; Fischer-Colbrie, E.

1976-01-08

This report presents the theoretical and experimental results of an LLL Electronics Engineering research program aimed at optimizing the design and electronic-material parameters of beta- and photovoltaic p-n junction conversion devices. To meet this objective, a comprehensive computer code has been developed that can handle a broad range of practical conditions. The physical model upon which the code is based is described first. Then, an example is given of a set of optimization calculations along with the resulting optimized efficiencies for silicon (Si) and gallium-arsenide (GaAs) devices. The model we have developed, however, is not limited to these materials. Itmore » can handle any appropriate material--single or polycrystalline-- provided energy absorption and electron-transport data are available. To check code validity, the performance of experimental silicon p-n junction devices (produced in-house) were measured under various light intensities and spectra as well as under tritium beta irradiation. The results of these tests were then compared with predicted results based on the known or best estimated device parameters. The comparison showed very good agreement between the calculated and the measured results.« less

Recent progress on fabrication of memristor and transistor-based neuromorphic devices for high signal processing speed with low power consumption

NASA Astrophysics Data System (ADS)

Hadiyawarman; Budiman, Faisal; Goldianto Octensi Hernowo, Detiza; Pandey, Reetu Raj; Tanaka, Hirofumi

2018-03-01

The advanced progress of electronic-based devices for artificial neural networks and recent trends in neuromorphic engineering are discussed in this review. Recent studies indicate that the memristor and transistor are two types of devices that can be implemented as neuromorphic devices. The electrical switching characteristics and physical mechanism of neuromorphic devices based on metal oxide, metal sulfide, silicon, and carbon materials are broadly covered in this review. Moreover, the switching performance comparison of several materials mentioned above are well highlighted, which would be useful for the further development of memristive devices. Recent progress in synaptic devices and the application of a switching device in the learning process is also discussed in this paper.

Characterization, Modeling and Design Parameters Identification of Silicon Carbide Junction Field Effect Transistor for Temperature Sensor Applications

PubMed Central

Salah, Tarek Ben; Khachroumi, Sofiane; Morel, Hervé

2010-01-01

Sensor technology is moving towards wide-band-gap semiconductors providing high temperature capable devices. Indeed, the higher thermal conductivity of silicon carbide, (three times more than silicon), permits better heat dissipation and allows better cooling and temperature management. Though many temperature sensors have already been published, little endeavours have been invested in the study of silicon carbide junction field effect devices (SiC-JFET) as a temperature sensor. SiC-JFETs devices are now mature enough and it is close to be commercialized. The use of its specific properties versus temperatures is the major focus of this paper. The SiC-JFETs output current-voltage characteristics are characterized at different temperatures. The saturation current and its on-resistance versus temperature are successfully extracted. It is demonstrated that these parameters are proportional to the absolute temperature. A physics-based model is also presented. Relationships between on-resistance and saturation current versus temperature are introduced. A comparative study between experimental data and simulation results is conducted. Important to note, the proposed model and the experimental results reflect a successful agreement as far as a temperature sensor is concerned. PMID:22315547

Alternative process for thin layer etching: Application to nitride spacer etching stopping on silicon germanium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Posseme, N., E-mail: nicolas.posseme@cea.fr; Pollet, O.; Barnola, S.

2014-08-04

Silicon nitride spacer etching realization is considered today as one of the most challenging of the etch process for the new devices realization. For this step, the atomic etch precision to stop on silicon or silicon germanium with a perfect anisotropy (no foot formation) is required. The situation is that none of the current plasma technologies can meet all these requirements. To overcome these issues and meet the highly complex requirements imposed by device fabrication processes, we recently proposed an alternative etching process to the current plasma etch chemistries. This process is based on thin film modification by light ionsmore » implantation followed by a selective removal of the modified layer with respect to the non-modified material. In this Letter, we demonstrate the benefit of this alternative etch method in term of film damage control (silicon germanium recess obtained is less than 6 A), anisotropy (no foot formation), and its compatibility with other integration steps like epitaxial. The etch mechanisms of this approach are also addressed.« less

Integration of lateral porous silicon membranes into planar microfluidics.

PubMed

Leïchlé, Thierry; Bourrier, David

2015-02-07

In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

Review of - SiC wide-bandgap heterostructure properties as an alternate semiconductor material

NASA Astrophysics Data System (ADS)

Rajput Priti, J.; Patankar, Udayan S.; Koel, Ants; Nitnaware, V. N.

2018-05-01

Silicon substance (is also known as Quartz) is an abundant in nature and the electrical properties it exhibits, plays a vital role in developing its usage in the field of semiconductor. More than decades we can say that Silicon has shown desirable signs but at the later parts it has shown some research potential for development of alternative material as semiconductor devices. This need has come to light as we started scaling down in size of the Silicon material and up in speed. This semiconductor material started exhibiting several fundamental physical limits that include the minimum gate oxide thickness and the maximum saturation velocity of carriers which determines the operation frequency. Though the alternative semiconductors provide some answers (such as III-V's for high speed devices) for a path to skirt these problems, there also may be some ways to extend the life of silicon itself. Two paths are used as for alternative semiconductors i.e alternative gate dielectrics and silicon-based heterostructures. The SiC material has some strength properties under different conditions and find out the defects available in the material.

FDTD modeling of anisotropic nonlinear optical phenomena in silicon waveguides.

PubMed

Dissanayake, Chethiya M; Premaratne, Malin; Rukhlenko, Ivan D; Agrawal, Govind P

2010-09-27

A deep insight into the inherent anisotropic optical properties of silicon is required to improve the performance of silicon-waveguide-based photonic devices. It may also lead to novel device concepts and substantially extend the capabilities of silicon photonics in the future. In this paper, for the first time to the best of our knowledge, we present a three-dimensional finite-difference time-domain (FDTD) method for modeling optical phenomena in silicon waveguides, which takes into account fully the anisotropy of the third-order electronic and Raman susceptibilities. We show that, under certain realistic conditions that prevent generation of the longitudinal optical field inside the waveguide, this model is considerably simplified and can be represented by a computationally efficient algorithm, suitable for numerical analysis of complex polarization effects. To demonstrate the versatility of our model, we study polarization dependence for several nonlinear effects, including self-phase modulation, cross-phase modulation, and stimulated Raman scattering. Our FDTD model provides a basis for a full-blown numerical simulator that is restricted neither by the single-mode assumption nor by the slowly varying envelope approximation.

Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

NASA Astrophysics Data System (ADS)

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

2016-03-01

We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.

Whatever happened to silicon carbide. [semiconductor devices

NASA Technical Reports Server (NTRS)

Campbell, R. B.

1981-01-01

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Hydrogen ion microlithography

DOEpatents

Tsuo, Y. Simon; Deb, Satyen K.

1990-01-01

Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing.

High-performance axicon lenses based on high-contrast, multilayer gratings

NASA Astrophysics Data System (ADS)

Doshay, Sage; Sell, David; Yang, Jianji; Yang, Rui; Fan, Jonathan A.

2018-01-01

Axicon lenses are versatile optical elements that can convert Gaussian beams to Bessel-like beams. In this letter, we demonstrate that axicons operating with high efficiencies and at large angles can be produced using high-contrast, multilayer gratings made from silicon. Efficient beam deflection of incident monochromatic light is enabled by higher-order optical modes in the silicon structure. Compared to diffractive devices made from low-contrast materials such as silicon dioxide, our multilayer devices have a relatively low spatial profile, reducing shadowing effects and enabling high efficiencies at large deflection angles. In addition, the feature sizes of these structures are relatively large, making the fabrication of near-infrared devices accessible with conventional optical lithography. Experimental lenses with deflection angles as large as 40° display field profiles that agree well with theory. Our concept can be used to design optical elements that produce higher-order Bessel-like beams, and the combination of high-contrast materials with multilayer architectures will more generally enable new classes of diffractive photonic structures.

RF performances of inductors integrated on localized p+-type porous silicon regions

PubMed Central

2012-01-01

To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate. PMID:23009746

Betavoltaic device in por-SiC/Si C-Nuclear Energy Converter

NASA Astrophysics Data System (ADS)

Akimchenko, Alina; Chepurnov, Victor; Dolgopolov, Mikhail; Gurskaya, Albina; Kuznetsov, Oleg; Mashnin, Alikhan; Radenko, Vitaliy; Radenko, Alexander; Surnin, Oleg; Zanin, George

2017-10-01

The miniature and low-power devices with long service life in hard operating conditions like the Carbon-14 beta-decay energy converters indeed as eternal resource for integrated MEMS and NEMS are considered. Authors discuss how to create the power supply for MEMS/NEMS devices, based on porous SiC/Si structure, which are tested to be used as the beta-decay energy converters of radioactive C-14 into electrical energy. This is based on the silicon carbide obtaining by self-organizing mono 3C-SiC endotaxy on the Si substrate. The new idea is the C-14 atoms including in molecules in the silicon carbide porous structure by this technology, which will increase the efficiency of the converter due to the greater intensity of electron-hole pairs generation rate in the space charge region. The synthesis of C-14 can be also performed by using the electronically controlled magneto-optic chamber.

Surface-Micromachined Microfluidic Devices

DOEpatents

Galambos, Paul C.; Okandan, Murat; Montague, Stephen; Smith, James H.; Paul, Phillip H.; Krygowski, Thomas W.; Allen, James J.; Nichols, Christopher A.; Jakubczak, II, Jerome F.

2004-09-28

Microfluidic devices are disclosed which can be manufactured using surface-micromachining. These devices utilize an electroosmotic force or an electromagnetic field to generate a flow of a fluid in a microchannel that is lined, at least in part, with silicon nitride. Additional electrodes can be provided within or about the microchannel for separating particular constituents in the fluid during the flow based on charge state or magnetic moment. The fluid can also be pressurized in the channel. The present invention has many different applications including electrokinetic pumping, chemical and biochemical analysis (e.g. based on electrophoresis or chromatography), conducting chemical reactions on a microscopic scale, and forming hydraulic actuators. Microfluidic devices are disclosed which can be manufactured using surface-micromachining. These devices utilize an electroosmotic force or an electromagnetic field to generate a flow of a fluid in a microchannel that is lined, at least in part, with silicon nitride. Additional electrodes can be provided within or about the microchannel for separating particular constituents in the fluid during the flow based on charge state or magnetic moment. The fluid can also be pressurized in the channel. The present invention has many different applications including electrokinetic pumping, chemical and biochemical analysis (e.g. based on electrophoresis or chromatography), conducting chemical reactions on a microscopic scale, and forming hydraulic actuators.

Comparison of Six Different Silicones In Vitro for Application as Glaucoma Drainage Device

PubMed Central

Windhövel, Claudia; Harder, Lisa; Bach, Jan-Peter; Teske, Michael; Grabow, Niels; Eickner, Thomas; Chichkov, Boris; Nolte, Ingo

2018-01-01

Silicones are widely used in medical applications. In ophthalmology, glaucoma drainage devices are utilized if conservative therapies are not applicable or have failed. Long-term success of these devices is limited by failure to control intraocular pressure due to fibrous encapsulation. Therefore, different medical approved silicones were tested in vitro for cell adhesion, cell proliferation and viability of human Sclera (hSF) and human Tenon fibroblasts (hTF). The silicones were analysed also depending on the sample preparation according to the manufacturer’s instructions. The surface quality was characterized with environmental scanning electron microscope (ESEM) and water contact angle measurements. All silicones showed homogeneous smooth and hydrophobic surfaces. Cell adhesion was significantly reduced on all silicones compared to the negative control. Proliferation index and cell viability were not influenced much. For development of a new glaucoma drainage device, the silicones Silbione LSR 4330 and Silbione LSR 4350, in this study, with low cell counts for hTF and low proliferation indices for hSF, and silicone Silastic MDX4-4210, with low cell counts for hSF and low proliferation indices for hTF, have shown the best results in vitro. Due to the high cell adhesion shown on Silicone LSR 40, 40,026, this material is unsuitable. PMID:29495462

Probing the low thermal conductivity of single-crystalline porous Si nanowires

NASA Astrophysics Data System (ADS)

Zhao, Yunshan; Lina Yang Collaboration; Lingyu Kong Collaboration; Baowen Li Collaboration; John T L Thong Collaboration; Kedar Hippalgaonkar Collaboration

Pore-like structures provide a novel way to reduce the thermal conductivity of silicon nanowires, compared to both smooth-surface VLS nanowires and rough EE nanowires. Because of enhanced phonon scattering with interface and decrease in phonon transport path, the porous nanostructures show reduction in thermal conductance by few orders of magnitude. It proves to be extremely challenging to evaluate porosity accurately in an experimental manner and further understand its effect on thermal transport. In this study, we use the newly developed electron-beam based micro-electrothermal device technique to study the porosity dependent thermal conductivity of mesoporous silicon nanowires that have single-crystalline scaffolding. Based on the Casino simulation, the power absorbed by the nanowire, coming from the loss of travelling electron energy, has a linear relationship with it cross section. The relationship has been verified experimentally as well. Monte Carlo simulation is carried out to theoretically predict the thermal conductivity of silicon nanowires with a specific value of porosity. These single-crystalline porous silicon nanowires show extremely low thermal conductivity, even below the amorphous limit. These structures together with our experimental techniques provide a particularly intriguing platform to understand the phonon transport in nanoscale and aid the performance improvement in future nanowires-based devices.

Flexible single-crystal silicon nanomembrane photonic crystal cavity.

PubMed

Xu, Xiaochuan; Subbaraman, Harish; Chakravarty, Swapnajit; Hosseini, Amir; Covey, John; Yu, Yalin; Kwong, David; Zhang, Yang; Lai, Wei-Cheng; Zou, Yi; Lu, Nanshu; Chen, Ray T

2014-12-23

Flexible inorganic electronic devices promise numerous applications, especially in fields that could not be covered satisfactorily by conventional rigid devices. Benefits on a similar scale are also foreseeable for silicon photonic components. However, the difficulty in transferring intricate silicon photonic devices has deterred widespread development. In this paper, we demonstrate a flexible single-crystal silicon nanomembrane photonic crystal microcavity through a bonding and substrate removal approach. The transferred cavity shows a quality factor of 2.2×10(4) and could be bent to a curvature of 5 mm radius without deteriorating the performance compared to its counterparts on rigid substrates. A thorough characterization of the device reveals that the resonant wavelength is a linear function of the bending-induced strain. The device also shows a curvature-independent sensitivity to the ambient index variation.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

OPC for curved designs in application to photonics on silicon

NASA Astrophysics Data System (ADS)

Orlando, Bastien; Farys, Vincent; Schneider, Loïc.; Cremer, Sébastien; Postnikov, Sergei V.; Millequant, Matthieu; Dirrenberger, Mathieu; Tiphine, Charles; Bayle, Sébastian; Tranquillin, Céline; Schiavone, Patrick

2016-03-01

Today's design for photonics devices on silicon relies on non-Manhattan features such as curves and a wide variety of angles with minimum feature size below 100nm. Industrial manufacturing of such devices requires optimized process window with 193nm lithography. Therefore, Resolution Enhancement Techniques (RET) that are commonly used for CMOS manufacturing are required. However, most RET algorithms are based on Manhattan fragmentation (0°, 45° and 90°) which can generate large CD dispersion on masks for photonic designs. Industrial implementation of RET solutions to photonic designs is challenging as most currently available OPC tools are CMOS-oriented. Discrepancy from design to final results induced by RET techniques can lead to lower photonic device performance. We propose a novel sizing algorithm allowing adjustment of design edge fragments while preserving the topology of the original structures. The results of the algorithm implementation in the rule based sizing, SRAF placement and model based correction will be discussed in this paper. Corrections based on this novel algorithm were applied and characterized on real photonics devices. The obtained results demonstrate the validity of the proposed correction method integrated in Inscale software of Aselta Nanographics.

Low-Actuation Voltage MEMS Digital-to-Analog Converter with Parylene Spring Structures.

PubMed

Ma, Cheng-Wen; Lee, Fu-Wei; Liao, Hsin-Hung; Kuo, Wen-Cheng; Yang, Yao-Joe

2015-08-28

We propose an electrostatically-actuated microelectromechanical digital-to-analog converter (M-DAC) device with low actuation voltage. The spring structures of the silicon-based M-DAC device were monolithically fabricated using parylene-C. Because the Young's modulus of parylene-C is considerably lower than that of silicon, the electrostatic microactuators in the proposed device require much lower actuation voltages. The actuation voltage of the proposed M-DAC device is approximately 6 V, which is less than one half of the actuation voltages of a previously reported M-DAC equipped with electrostatic microactuators. The measured total displacement of the proposed three-bit M-DAC is nearly 504 nm, and the motion step is approximately 72 nm. Furthermore, we demonstrated that the M-DAC can be employed as a mirror platform with discrete displacement output for a noncontact surface profiling system.

Large-Scale Fabrication of Silicon Nanowires for Solar Energy Applications.

PubMed

Zhang, Bingchang; Jie, Jiansheng; Zhang, Xiujuan; Ou, Xuemei; Zhang, Xiaohong

2017-10-11

The development of silicon (Si) materials during past decades has boosted up the prosperity of the modern semiconductor industry. In comparison with the bulk-Si materials, Si nanowires (SiNWs) possess superior structural, optical, and electrical properties and have attracted increasing attention in solar energy applications. To achieve the practical applications of SiNWs, both large-scale synthesis of SiNWs at low cost and rational design of energy conversion devices with high efficiency are the prerequisite. This review focuses on the recent progresses in large-scale production of SiNWs, as well as the construction of high-efficiency SiNW-based solar energy conversion devices, including photovoltaic devices and photo-electrochemical cells. Finally, the outlook and challenges in this emerging field are presented.

Comparison of nickel silicide and aluminium ohmic contact metallizations for low-temperature quantum transport measurements

PubMed Central

2011-01-01

We examine nickel silicide as a viable ohmic contact metallization for low-temperature, low-magnetic-field transport measurements of atomic-scale devices in silicon. In particular, we compare a nickel silicide metallization with aluminium, a common ohmic contact for silicon devices. Nickel silicide can be formed at the low temperatures (<400°C) required for maintaining atomic precision placement in donor-based devices, and it avoids the complications found with aluminium contacts which become superconducting at cryogenic measurement temperatures. Importantly, we show that the use of nickel silicide as an ohmic contact at low temperatures does not affect the thermal equilibration of carriers nor contribute to hysteresis in a magnetic field. PMID:21968083

Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate.

PubMed

Jung, Suk Won; Shin, Jong Yoon; Pi, Kilwha; Goo, Yong Sook; Cho, Dong-Il Dan

2016-12-01

This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW)-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 ( rd1 ) mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

Polymer taper bridge for silicon waveguide to single mode waveguide coupling

NASA Astrophysics Data System (ADS)

Kruse, Kevin; Middlebrook, Christopher T.

2016-03-01

Coupling of optical power from high-density silicon waveguides to silica optical fibers for signal routing can incur high losses and often requires complex end-face preparation/processing. Novel coupling device taper structures are proposed for low coupling loss between silicon photonic waveguides and single mode fibers are proposed and devices are fabricated and measured in terms of performance. Theoretical mode conversion models for waveguide tapers are derived for optimal device structure design and performance. Commercially viable vertical and multi-layer taper designs using polymer waveguide materials are proposed as innovative, cost-efficient, and mass-manufacturable optical coupling devices. The coupling efficiency for both designs is determined to evaluate optimal device dimensions and alignment tolerances with both silicon rib waveguides and silicon nanowire waveguides. Propagation loss as a function of waveguide roughness and metallic loss are determined and correlated to waveguide dimensions to obtain total insertion loss for the proposed taper designs. Multi-layer tapers on gold-sputtered substrates are fabricated through photolithography as proof-of-concept devices and evaluated for device loss optimization. Tapered waveguide coupling loss with Si WGs (2.74 dB) was experimentally measured with high correlation to theoretical results.

Phase sensitive amplification in integrated waveguides (Conference Presentation)

NASA Astrophysics Data System (ADS)

Schroeder, Jochen B.; Zhang, Youngbin; Husko, Chad A.; LeFrancois, Simon; Eggleton, Benjamin J.

2017-02-01

Phase sensitive amplification (PSA) is an attractive technology for integrated all-optical signal processing, due to it's potential for noiseless amplification, phase regeneration and generation of squeezed light. In this talk I will review our results on implementing four-wave-mixing based PSA inside integrated photonic devices. In particular I will discuss PSA in chalcogenide ridge waveguides and silicon slow-light photonic crystals. We achieve PSA in both pump- and signal-degenerate schemes with maximum extinction ratios of 11 (silicon) and 18 (chalcogenide) dB. I will further discuss the influence of two-photon absorption and free carrier effects on the performance of silicon-based PSAs.

Organophosphonate-based PNA-functionalization of silicon nanowires for label-free DNA detection.

PubMed

Cattani-Scholz, Anna; Pedone, Daniel; Dubey, Manish; Neppl, Stefan; Nickel, Bert; Feulner, Peter; Schwartz, Jeffrey; Abstreiter, Gerhard; Tornow, Marc

2008-08-01

We investigated hydroxyalkylphosphonate monolayers as a novel platform for the biofunctionalization of silicon-based field effect sensor devices. This included a detailed study of the thin film properties of organophosphonate films on Si substrates using several surface analysis techniques, including AFM, ellipsometry, contact angle, X-ray photoelectron spectroscopy (XPS), X-ray reflectivity, and current-voltage characteristics in electrolyte solution. Our results indicate the formation of a dense monolayer on the native silicon oxide that has excellent passivation properties. The monolayer was biofunctionalized with 12 mer peptide nucleic acid (PNA) receptor molecules in a two-step procedure using the heterobifunctional linker, 3-maleimidopropionic-acid-N-hydroxysuccinimidester. Successful surface modification with the probe PNA was verified by XPS and contact angle measurements, and hybridization with DNA was determined by fluorescence measurements. Finally, the PNA functionalization protocol was translated to 2 microm long, 100 nm wide Si nanowire field effect devices, which were successfully used for label-free DNA/PNA hybridization detection.

30GHz Ge electro-absorption modulator integrated with 3 μm silicon-on-insulator waveguide.

PubMed

Feng, Ning-Ning; Feng, Dazeng; Liao, Shirong; Wang, Xin; Dong, Po; Liang, Hong; Kung, Cheng-Chih; Qian, Wei; Fong, Joan; Shafiiha, Roshanak; Luo, Ying; Cunningham, Jack; Krishnamoorthy, Ashok V; Asghari, Mehdi

2011-04-11

We demonstrate a compact waveguide-based high-speed Ge electro-absorption (EA) modulator integrated with a single mode 3 µm silicon-on-isolator (SOI) waveguide. The Ge EA modulator is based on a horizontally-oriented p-i-n structure butt-coupled with a deep-etched silicon waveguide, which transitions adiabatically to a shallow-etched single mode large core SOI waveguide. The demonstrated device has a compact active region of 1.0 × 45 µm(2), a total insertion loss of 2.5-5 dB and an extinction ratio of 4-7.5 dB over a wavelength range of 1610-1640 nm with -4V(pp) bias. The estimated Δα/α value is in the range of 2-3.3. The 3 dB bandwidth measurements show that the device is capable of operating at more than 30 GHz. Clear eye-diagram openings at 12.5 Gbps demonstrates large signal modulation at high transmission rate. © 2011 Optical Society of America

3D printing for health & wealth: Fabrication of custom-made medical devices through additive manufacturing

NASA Astrophysics Data System (ADS)

Colpani, Alessandro; Fiorentino, Antonio; Ceretti, Elisabetta

2018-05-01

Additive Manufacturing (AM) differs from traditional manufacturing technologies by its ability to handle complex shapes with great design flexibility. These features make the technique suitable to fabricate customized components, particularly answering specific custom needs. Although AM mainly referred to prototyping, nowadays the interest in direct manufacturing of actual parts is growing. This article shows the application of AM within the project 3DP-4H&W (3D Printing for Health & Wealth) which involves engineers and physicians for developing pediatric custom-made medical devices to enhance the fulfilling of the patients specific needs. In the project, two types of devices made of a two-component biocompatible silicone are considered. The first application (dental field) consists in a device for cleft lip and palate. The second one (audiological field) consists in an acoustic prosthesis. The geometries of the devices are based on the anatomy of the patient that is obtained through a 3D body scan process. For both devices, two different approaches were planned, namely direct AM and indirect Rapid Tooling (RT). In particular, direct AM consists in the FDM processing of silicone, while RT consists in molds FDM fabrication followed by silicone casting. This paper presents the results of the RT method that is articulated in different phases: the acquisition of the geometry to be realized, the design of the molds taking into account the casting feasibility (as casting channel, vents, part extraction), the realization of molds produced through AM, molds surface chemical finishing, pouring and curing of the silicone. The fabricated devices were evaluated by the physicians team that confirmed the effectiveness of the proposed procedure in fabricating the desired devices. Moreover, the procedure can be used as a general method to extend the range of applications to any custom-made device for anatomic districts, especially where complex shapes are present (as tracheal or maxillary prostheses).

Fabrication of thermal microphotonic sensors and sensor arrays

DOEpatents

Shaw, Michael J.; Watts, Michael R.; Nielson, Gregory N.

2010-10-26

A thermal microphotonic sensor is fabricated on a silicon substrate by etching an opening and a trench into the substrate, and then filling in the opening and trench with silicon oxide which can be deposited or formed by thermally oxidizing a portion of the silicon substrate surrounding the opening and trench. The silicon oxide forms a support post for an optical resonator which is subsequently formed from a layer of silicon nitride, and also forms a base for an optical waveguide formed from the silicon nitride layer. Part of the silicon substrate can be selectively etched away to elevate the waveguide and resonator. The thermal microphotonic sensor, which is useful to detect infrared radiation via a change in the evanescent coupling of light between the waveguide and resonator, can be formed as a single device or as an array.

Use of Functionalized Carbon Nanotubes for Covalent Attachment of Nanotubes to Silicon

NASA Technical Reports Server (NTRS)

Tour, James M.; Dyke, Christopher A.; Maya, Francisco; Stewart, Michael P.; Chen, Bo; Flatt, Austen K.

2012-01-01

The purpose of the invention is to covalently attach functionalized carbon nanotubes to silicon. This step allows for the introduction of carbon nanotubes onto all manner of silicon surfaces, and thereby introduction of carbon nano - tubes covalently into silicon-based devices, onto silicon particles, and onto silicon surfaces. Single-walled carbon nanotubes (SWNTs) dispersed as individuals in surfactant were functionalized. The nano - tube was first treated with 4-t-butylbenzenediazonium tetrafluoroborate to give increased solubility to the carbon nanotube; the second group attached to the sidewall of the nanotube has a silyl-protected terminal alkyne that is de-protected in situ. This gives a soluble carbon nanotube that has functional groups appended to the sidewall that can be attached covalently to silicon. This reaction was monitored by UV/vis/NJR to assure direct covalent functionalization.

Last Advances in Silicon-Based Optical Biosensors.

PubMed

Fernández Gavela, Adrián; Grajales García, Daniel; Ramirez, Jhonattan C; Lechuga, Laura M

2016-02-24

We review the most important achievements published in the last five years in the field of silicon-based optical biosensors. We focus specially on label-free optical biosensors and their implementation into lab-on-a-chip platforms, with an emphasis on developments demonstrating the capability of the devices for real bioanalytical applications. We report on novel transducers and materials, improvements of existing transducers, new and improved biofunctionalization procedures as well as the prospects for near future commercialization of these technologies.

Performance tradeoff between lateral and interdigitated doping patterns for high speed carrier-depletion based silicon modulators.

PubMed

Yu, Hui; Pantouvaki, Marianna; Van Campenhout, Joris; Korn, Dietmar; Komorowska, Katarzyna; Dumon, Pieter; Li, Yanlu; Verheyen, Peter; Absil, Philippe; Alloatti, Luca; Hillerkuss, David; Leuthold, Juerg; Baets, Roel; Bogaerts, Wim

2012-06-04

Carrier-depletion based silicon modulators with lateral and interdigitated PN junctions are compared systematically on the same fabrication platform. The interdigitated diode is shown to outperform the lateral diode in achieving a low VπLπ of 0.62 V∙cm with comparable propagation loss at the expense of a higher depletion capacitance. The low VπLπ of the interdigitated PN junction is employed to demonstrate 10 Gbit/s modulation with 7.5 dB extinction ration from a 500 µm long device whose static insertion loss is 2.8 dB. In addition, up to 40 Gbit/s modulation is demonstrated for a 3 mm long device comprising a lateral diode and a co-designed traveling wave electrode.

Radiation-tolerant microprocessors in Japanese scientific space vehicles: how to maximize the benefits of commercial SOI technologies

NASA Astrophysics Data System (ADS)

Kobayashi, Daisuke; Hirose, Kazuyuki; Saito, Hirobumi

2013-05-01

Development of semiconductor devices not only for harsh radiation environments such as space but also for ground-based applications now faces a major hurdle of radiation problems. Necessary is protecting chips from malfunctions due to sub-nanosecond transient noises induced by radiation. As a protection technique using the silicon-on-insulator structure is often suggested, but the use in fact requires devices and circuits carefully optimized for maximizing its benefits. Mainly describing theoretical and experimental characterization of the transient effects, this paper presents a comprehensive study on radiation responses of commercial silicon-on- insulator technologies, which study results in a space-use low-power system-on-chip with a 100-MIPS RISC-based core.

Amorphous silicon photovoltaic devices

DOEpatents

Carlson, David E.; Lin, Guang H.; Ganguly, Gautam

2004-08-31

This invention is a photovoltaic device comprising an intrinsic or i-layer of amorphous silicon and where the photovoltaic device is more efficient at converting light energy to electric energy at high operating temperatures than at low operating temperatures. The photovoltaic devices of this invention are suitable for use in high temperature operating environments.

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects.

PubMed

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Oh, Jin Hyuk; Kim, Sun Ae; Park, Jaegyu; Kim, Sanggi

2015-06-10

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.

Confined silicon nanospheres by biomass lignin for stable lithium ion battery.

PubMed

Niu, Xiaoying; Zhou, Jinqiu; Qian, Tao; Wang, Mengfan; Yan, Chenglin

2017-10-06

Biomass lignin, as a significant renewable resource, is one of the most abundant natural polymers in the world. Here, we report a novel silicon-based material, in which lignin-derived functional conformal network crosslinks the silicon nanoparticles via self-assembly. This newly-developed material could greatly solve the problems of large volume change during lithiation/delithiation process and the formation of unstable solid electrolyte interphase layers on the silicon surface. With this anode, the battery demonstrates a high capacity of ∼3000 mA h g -1 , a highly stable cycling retention (∼89% after 100 cycles at 300 mA g -1 ) and an excellent rate capability (∼800 mA h g -1 at 9 A g -1 ). Moreover, the feasibility of full lithium-ion batteries with the novel silicon-based material would provide wide range of applications in the field of flexible energy storage systems for wearable electronic devices.

Confined silicon nanospheres by biomass lignin for stable lithium ion battery

NASA Astrophysics Data System (ADS)

Niu, Xiaoying; Zhou, Jinqiu; Qian, Tao; Wang, Mengfan; Yan, Chenglin

2017-10-01

Biomass lignin, as a significant renewable resource, is one of the most abundant natural polymers in the world. Here, we report a novel silicon-based material, in which lignin-derived functional conformal network crosslinks the silicon nanoparticles via self-assembly. This newly-developed material could greatly solve the problems of large volume change during lithiation/delithiation process and the formation of unstable solid electrolyte interphase layers on the silicon surface. With this anode, the battery demonstrates a high capacity of ˜3000 mA h g-1, a highly stable cycling retention (˜89% after 100 cycles at 300 mA g-1) and an excellent rate capability (˜800 mA h g-1 at 9 A g-1). Moreover, the feasibility of full lithium-ion batteries with the novel silicon-based material would provide wide range of applications in the field of flexible energy storage systems for wearable electronic devices.

High-efficiency power transfer for silicon-based photonic devices

NASA Astrophysics Data System (ADS)

Son, Gyeongho; Yu, Kyoungsik

2018-02-01

We demonstrate an efficient coupling of guided light of 1550 nm from a standard single-mode optical fiber to a silicon waveguide using the finite-difference time-domain method and propose a fabrication method of tapered optical fibers for efficient power transfer to silicon-based photonic integrated circuits. Adiabatically-varying fiber core diameters with a small tapering angle can be obtained using the tube etching method with hydrofluoric acid and standard single-mode fibers covered by plastic jackets. The optical power transmission of the fundamental HE11 and TE-like modes between the fiber tapers and the inversely-tapered silicon waveguides was calculated with the finite-difference time-domain method to be more than 99% at a wavelength of 1550 nm. The proposed method for adiabatic fiber tapering can be applied in quantum optics, silicon-based photonic integrated circuits, and nanophotonics. Furthermore, efficient coupling within the telecommunication C-band is a promising approach for quantum networks in the future.

Epitaxial growth of silicon for layer transfer

DOEpatents

Teplin, Charles; Branz, Howard M

2015-03-24

Methods of preparing a thin crystalline silicon film for transfer and devices utilizing a transferred crystalline silicon film are disclosed. The methods include preparing a silicon growth substrate which has an interface defining substance associated with an exterior surface. The methods further include depositing an epitaxial layer of silicon on the silicon growth substrate at the surface and separating the epitaxial layer from the substrate substantially along the plane or other surface defined by the interface defining substance. The epitaxial layer may be utilized as a thin film of crystalline silicon in any type of semiconductor device which requires a crystalline silicon layer. In use, the epitaxial transfer layer may be associated with a secondary substrate.

Integrated optical sensors for 2D spatial chemical mapping (Conference Presentation)

NASA Astrophysics Data System (ADS)

Flores, Raquel; Janeiro, Ricardo; Viegas, Jaime

2017-02-01

Sensors based on optical waveguides for chemical sensing have attracted increasing interest over the last two decades, fueled by potential applications in commercial lab-on-a-chip devices for medical and food safety industries. Even though the early studies were oriented for single-point detection, progress in device size reduction and device yield afforded by photonics foundries have opened the opportunity for distributed dynamic chemical sensing at the microscale. This will allow researchers to follow the dynamics of chemical species in field of microbiology, and microchemistry, with a complementary method to current technologies based on microfluorescence and hyperspectral imaging. The study of the chemical dynamics at the surface of photoelectrodes in water splitting cells are a good candidate to benefit from such optochemical sensing devices that includes a photonic integrated circuit (PIC) with multiple sensors for real-time detection and spatial mapping of chemical species. In this project, we present experimental results on a prototype integrated optical system for chemical mapping based on the interaction of cascaded resonant optical devices, spatially covered with chemically sensitive polymers and plasmon-enhanced nanostructured metal/metal-oxide claddings offering chemical selectivity in a pixelated surface. In order to achieve a compact footprint, the prototype is based in a silicon photonics platform. A discussion on the relative merits of a photonic platform based on large bandgap metal oxides and nitrides which have higher chemical resistance than silicon is also presented.

Porous silicon structures with high surface area/specific pore size

DOEpatents

Northrup, M.A.; Yu, C.M.; Raley, N.F.

1999-03-16

Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gases in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters. 9 figs.

Porous silicon structures with high surface area/specific pore size

DOEpatents

Northrup, M. Allen; Yu, Conrad M.; Raley, Norman F.

1999-01-01

Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters.

Hydrogen ion microlithography

DOEpatents

Tsuo, Y.S.; Deb, S.K.

1990-10-02

Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing. 6 figs.

Ultrasonic Emission from Nanocrystalline Porous Silicon

NASA Astrophysics Data System (ADS)

Shinoda, Hiroyuki; Koshida, Nobuyoshi

A simple layer structure composed of a metal thin film and a porous silicon layer on a silicon substrate generates intense and wide-band airborne ultrasounds. The large-bandwidth and the fidelity of the sound reproduction are leveraged in applications varying from sound-based measurement to a scientific study of animal ecology. This chapter describes the basic principle of the ultrasound generation. The macroscopic properties of the low thermal conductivity and the small heat capacity of nanocrystalline porous silicon thermally induce ultrasonic emission. The state-of-the-art of the achievable sound pressure and sound signal properties is introduced, with the technological and scientific applications of the devices.

Belle II silicon vertex detector

NASA Astrophysics Data System (ADS)

Adamczyk, K.; Aihara, H.; Angelini, C.; Aziz, T.; Babu, V.; Bacher, S.; Bahinipati, S.; Barberio, E.; Baroncelli, Ti.; Baroncelli, To.; Basith, A. K.; Batignani, G.; Bauer, A.; Behera, P. K.; Bergauer, T.; Bettarini, S.; Bhuyan, B.; Bilka, T.; Bosi, F.; Bosisio, L.; Bozek, A.; Buchsteiner, F.; Casarosa, G.; Ceccanti, M.; Červenkov, D.; Chendvankar, S. R.; Dash, N.; Divekar, S. T.; Doležal, Z.; Dutta, D.; Enami, K.; Forti, F.; Friedl, M.; Hara, K.; Higuchi, T.; Horiguchi, T.; Irmler, C.; Ishikawa, A.; Jeon, H. B.; Joo, C. W.; Kandra, J.; Kang, K. H.; Kato, E.; Kawasaki, T.; Kodyš, P.; Kohriki, T.; Koike, S.; Kolwalkar, M. M.; Kvasnička, P.; Lanceri, L.; Lettenbicher, J.; Maki, M.; Mammini, P.; Mayekar, S. N.; Mohanty, G. B.; Mohanty, S.; Morii, T.; Nakamura, K. R.; Natkaniec, Z.; Negishi, K.; Nisar, N. K.; Onuki, Y.; Ostrowicz, W.; Paladino, A.; Paoloni, E.; Park, H.; Pilo, F.; Profeti, A.; Rashevskaya, I.; Rao, K. K.; Rizzo, G.; Rozanska, M.; Sandilya, S.; Sasaki, J.; Sato, N.; Schultschik, S.; Schwanda, C.; Seino, Y.; Shimizu, N.; Stypula, J.; Suzuki, J.; Tanaka, S.; Tanida, K.; Taylor, G. N.; Thalmeier, R.; Thomas, R.; Tsuboyama, T.; Uozumi, S.; Urquijo, P.; Vitale, L.; Volpi, M.; Watanuki, S.; Watson, I. J.; Webb, J.; Wiechczynski, J.; Williams, S.; Würkner, B.; Yamamoto, H.; Yin, H.; Yoshinobu, T.; Belle II SVD Collaboration

2016-09-01

The Belle II experiment at the SuperKEKB collider in Japan is designed to indirectly probe new physics using approximately 50 times the data recorded by its predecessor. An accurate determination of the decay-point position of subatomic particles such as beauty and charm hadrons as well as a precise measurement of low-momentum charged particles will play a key role in this pursuit. These will be accomplished by an inner tracking device comprising two layers of pixelated silicon detector and four layers of silicon vertex detector based on double-sided microstrip sensors. We describe herein the design, prototyping and construction efforts of the Belle-II silicon vertex detector.

Silicon Carbide Solar Cells Investigated

NASA Technical Reports Server (NTRS)

Bailey, Sheila G.; Raffaelle, Ryne P.

2001-01-01

The semiconductor silicon carbide (SiC) has long been known for its outstanding resistance to harsh environments (e.g., thermal stability, radiation resistance, and dielectric strength). However, the ability to produce device-quality material is severely limited by the inherent crystalline defects associated with this material and their associated electronic effects. Much progress has been made recently in the understanding and control of these defects and in the improved processing of this material. Because of this work, it may be possible to produce SiC-based solar cells for environments with high temperatures, light intensities, and radiation, such as those experienced by solar probes. Electronics and sensors based on SiC can operate in hostile environments where conventional silicon-based electronics (limited to 350 C) cannot function. Development of this material will enable large performance enhancements and size reductions for a wide variety of systems--such as high-frequency devices, high-power devices, microwave switching devices, and high-temperature electronics. These applications would supply more energy-efficient public electric power distribution and electric vehicles, more powerful microwave electronics for radar and communications, and better sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. The 6H-SiC polytype is a promising wide-bandgap (Eg = 3.0 eV) semiconductor for photovoltaic applications in harsh solar environments that involve high-temperature and high-radiation conditions. The advantages of this material for this application lie in its extremely large breakdown field strength, high thermal conductivity, good electron saturation drift velocity, and stable electrical performance at temperatures as high as 600 C. This behavior makes it an attractive photovoltaic solar cell material for devices that can operate within three solar radii of the Sun.

Development of high temperature, high radiation resistant silicon semiconductors

NASA Technical Reports Server (NTRS)

Whorl, C. A.; Evans, A. W.

1972-01-01

The development of a hardened silicon power transistor for operation in severe nuclear radiation environments at high temperature was studied. Device hardness and diffusion techniques are discussed along with the geometries of hardened power transistor chips. Engineering drawings of 100 amp and 5 amp silicon devices are included.

Memory device using movement of protons

DOEpatents

Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.

1998-11-03

An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

1998-01-01

An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

Memory device using movement of protons

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

2000-01-01

An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

Active graphene-silicon hybrid diode for terahertz waves.

PubMed

Li, Quan; Tian, Zhen; Zhang, Xueqian; Singh, Ranjan; Du, Liangliang; Gu, Jianqiang; Han, Jiaguang; Zhang, Weili

2015-05-11

Controlling the propagation properties of the terahertz waves in graphene holds great promise in enabling novel technologies for the convergence of electronics and photonics. A diode is a fundamental electronic device that allows the passage of current in just one direction based on the polarity of the applied voltage. With simultaneous optical and electrical excitations, we experimentally demonstrate an active diode for the terahertz waves consisting of a graphene-silicon hybrid film. The diode transmits terahertz waves when biased with a positive voltage while attenuates the wave under a low negative voltage, which can be seen as an analogue of an electronic semiconductor diode. Here, we obtain a large transmission modulation of 83% in the graphene-silicon hybrid film, which exhibits tremendous potential for applications in designing broadband terahertz modulators and switchable terahertz plasmonic and metamaterial devices.

Active graphene–silicon hybrid diode for terahertz waves

PubMed Central

Li, Quan; Tian, Zhen; Zhang, Xueqian; Singh, Ranjan; Du, Liangliang; Gu, Jianqiang; Han, Jiaguang; Zhang, Weili

2015-01-01

Controlling the propagation properties of the terahertz waves in graphene holds great promise in enabling novel technologies for the convergence of electronics and photonics. A diode is a fundamental electronic device that allows the passage of current in just one direction based on the polarity of the applied voltage. With simultaneous optical and electrical excitations, we experimentally demonstrate an active diode for the terahertz waves consisting of a graphene–silicon hybrid film. The diode transmits terahertz waves when biased with a positive voltage while attenuates the wave under a low negative voltage, which can be seen as an analogue of an electronic semiconductor diode. Here, we obtain a large transmission modulation of 83% in the graphene–silicon hybrid film, which exhibits tremendous potential for applications in designing broadband terahertz modulators and switchable terahertz plasmonic and metamaterial devices. PMID:25959596

Random sized plasmonic nanoantennas on Silicon for low-cost broad-band near-infrared photodetection

PubMed Central

Nazirzadeh, Mohammad Amin; Atar, Fatih Bilge; Turgut, Berk Berkan; Okyay, Ali Kemal

2014-01-01

In this work, we propose Silicon based broad-band near infrared Schottky barrier photodetectors. The devices operate beyond 1200 nm wavelength and exhibit photoresponsivity values as high as 3.5 mA/W with a low dark current density of about 50 pA/µm2. We make use of Au nanoislands on Silicon surface formed by rapid thermal annealing of a thin Au layer. Surface plasmons are excited on Au nanoislands and this field localization results in efficient absorption of sub-bandgap photons. Absorbed photons excite the electrons of the metal to higher energy levels (hot electron generation) and the collection of these hot electrons to the semiconductor results in photocurrent (internal photoemission). Simple and scalable fabrication makes these devices suitable for ultra-low-cost NIR detection applications. PMID:25407509

Photothermally tunable silicon-microring-based optical add-drop filter through integrated light absorber.

PubMed

Chen, Xi; Shi, Yuechun; Lou, Fei; Chen, Yiting; Yan, Min; Wosinski, Lech; Qiu, Min

2014-10-20

An optically pumped thermo-optic (TO) silicon ring add-drop filter with fast thermal response is experimentally demonstrated. We propose that metal-insulator-metal (MIM) light absorber can be integrated into silicon TO devices, acting as a localized heat source which can be activated remotely by a pump beam. The MIM absorber design introduces less thermal capacity to the device, compared to conventional electrically-driven approaches. Experimentally, the absorber-integrated add-drop filter shows an optical response time of 13.7 μs following the 10%-90% rule (equivalent to a exponential time constant of 5 μs) and a wavelength shift over pump power of 60 pm/mW. The photothermally tunable add-drop filter may provide new perspectives for all-optical routing and switching in integrated Si photonic circuits.

Effect of ultraviolet illumination and ambient gases on the photoluminescence and electrical properties of nanoporous silicon layer for organic vapor sensor.

PubMed

Atiwongsangthong, Narin

2012-08-01

The purpose of this research, the nanoporous silicon layer were fabricated and investigated the physical properties such as photoluminescence and the electrical properties in order to develop organic vapor sensor by using nanoporous silicon. The Changes in the photoluminescence intensity of nanoporous silicon samples are studied during ultraviolet illumination in various ambient gases such as nitrogen, oxigen and vacuum. In this paper, the nanoporous silicon layer was used as organic vapor adsorption and sensing element. The advantage of this device are simple process compatible in silicon technology and usable in room temperature. The structure of this device consists of nanoporous silicon layer which is formed by anodization of silicon wafer in hydrofluoric acid solution and aluminum electrode which deposited on the top of nanoporous silicon layer by evaporator. The nanoporous silicon sensors were placed in a gas chamber with various organic vapor such as ethanol, methanol and isopropyl alcohol. From studying on electrical characteristics of this device, it is found that the nanoporous silicon layer can detect the different organic vapor. Therefore, the nanoporous silicon is important material for organic vapor sensor and it can develop to other applications about gas sensors in the future.

Bolometric Array Detectors for Space-Borne Astronomy

NASA Technical Reports Server (NTRS)

Lange, Andrew E.

2000-01-01

Funding from the NASA Innovative Research Grant was used to develop bolometric detectors. As described in the proposal, silicon nitride micromesh ('spider-web') absorbers had been demonstrated at U.C. Berkeley but not developed to be flight-worthy devices. We proceeded to first fabricate bolometers with Neutron Transmutation Doped (NTD) Ge thermistors that demonstrated high optical coupling (Church et al. 1996) and were developed for a ground-based millimeter-wave receiver (Mauskopf et al. 1997). The next generation of devices used In bump-bonded thermistors to achieve devices with performance product NEP*sqrt(tau) = 3e - 18 j at 300 mK, demonstrating a full order of magnitude improvement over pervious devices. These devices achieved an NEP = 1e-18 W/rtHz (Murray et al. 1996) as promised in the proposal. Sensitivities as good as 1e - 19 W/rtHz appear achievable with the silicon nitride architecture (Bock et al. 1997). Finally, arrays of micromesh bolometers were shown to be feasible in the last year of the program by etching a large number of devices on a single silicon wafer (75 mm). Full arrays were subsequently demonstrated for selection on the ESA/NASA Far-Infrared Space Telescope (FIRST) in competition with detectors provided by CEA in France and GSFC in the US Micromesh bolometer arrays are now baselined for both the ESA/NASA Planck and FIRST missions.

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boccard, Mathieu; Holman, Zachary C.

Amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphous silicon carbide beingmore » shown to surpass amorphous silicon for temperatures above 300 °C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boccard, Mathieu; Holman, Zachary C.

With this study, amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphousmore » silicon carbide being shown to surpass amorphous silicon for temperatures above 300°C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE PAGES

Boccard, Mathieu; Holman, Zachary C.

2015-08-14

With this study, amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphousmore » silicon carbide being shown to surpass amorphous silicon for temperatures above 300°C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

Sinusoidal nanotextures for light management in silicon thin-film solar cells.

PubMed

Köppel, G; Rech, B; Becker, C

2016-04-28

Recent progresses in liquid phase crystallization enabled the fabrication of thin wafer quality crystalline silicon layers on low-cost glass substrates enabling conversion efficiencies up to 12.1%. Because of its indirect band gap, a thin silicon absorber layer demands for efficient measures for light management. However, the combination of high quality crystalline silicon and light trapping structures is still a critical issue. Here, we implement hexagonal 750 nm pitched sinusoidal and pillar shaped nanostructures at the sun-facing glass-silicon interface into 10 μm thin liquid phase crystallized silicon thin-film solar cell devices on glass. Both structures are experimentally studied regarding their optical and optoelectronic properties. Reflection losses are reduced over the entire wavelength range outperforming state of the art anti-reflective planar layer systems. In case of the smooth sinusoidal nanostructures these optical achievements are accompanied by an excellent electronic material quality of the silicon absorber layer enabling open circuit voltages above 600 mV and solar cell device performances comparable to the planar reference device. For wavelengths smaller than 400 nm and higher than 700 nm optical achievements are translated into an enhanced quantum efficiency of the solar cell devices. Therefore, sinusoidal nanotextures are a well-balanced compromise between optical enhancement and maintained high electronic silicon material quality which opens a promising route for future optimizations in solar cell designs for silicon thin-film solar cells on glass.

LCoS-SLM technology based on Digital Electro-optics Platform and using in dynamic optics for application development

NASA Astrophysics Data System (ADS)

Tsai, Chun-Wei; Wang, Chen; Lyu, Bo-Han; Chu, Chen-Hsien

2017-08-01

Digital Electro-optics Platform is the main concept of Jasper Display Corp. (JDC) to develop various applications. These applications are based on our X-on-Silicon technologies, for example, X-on-Silicon technologies could be used on Liquid Crystal on Silicon (LCoS), Micro Light-Emitting Diode on Silicon (μLEDoS), Organic Light-Emitting Diode on Silicon (OLEDoS), and Cell on Silicon (CELLoS), etc. LCoS technology is applied to Spatial Light Modulator (SLM), Dynamic Optics, Wavelength Selective Switch (WSS), Holographic Display, Microscopy, Bio-tech, 3D Printing and Adaptive Optics, etc. In addition, μLEDoS technology is applied to Augmented Reality (AR), Head Up Display (HUD), Head-mounted Display (HMD), and Wearable Devices. Liquid Crystal on Silicon - Spatial Light Modulator (LCoSSLM) based on JDC's On-Silicon technology for both amplitude and phase modulation, have an expanding role in several optical areas where light control on a pixel-by-pixel basis is critical for optimum system performance. Combination of the advantage of hardware and software, we can establish a "dynamic optics" for the above applications or more. Moreover, through the software operation, we can control the light more flexible and easily as programmable light processor.

Numerical simulations: Toward the design of 27.6% efficient four-terminal semi-transparent perovskite/SiC passivated rear contact silicon tandem solar cell

NASA Astrophysics Data System (ADS)

Pandey, Rahul; Chaujar, Rishu

2016-12-01

In this work, a novel four-terminal perovskite/SiC-based rear contact silicon tandem solar cell device has been proposed and simulated to achieve 27.6% power conversion efficiency (PCE) under single AM1.5 illumination. 20.9% efficient semitransparent perovskite top subcell has been used for perovskite/silicon tandem architecture. The tandem structure of perovskite-silicon solar cells is a promising method to achieve efficient solar energy conversion at low cost. In the four-terminal tandem configuration, the cells are connected independently and hence avoids the need for current matching between top and bottom subcell, thus giving greater design flexibility. The simulation analysis shows, PCE of 27.6% and 22.4% with 300 μm and 10 μm thick rear contact Si bottom subcell, respectively. This is a substantial improvement comparing to transparent perovskite solar cell and c-Si solar cell operated individually. The impact of perovskite layer thickness, monomolecular, bimolecular, and trimolecular recombination have also been obtained on the performance of perovskite top subcell. Reported PCEs of 27.6% and 22.4% are 1.25 times and 1.42 times higher as compared to experimentally available efficiencies of 22.1% and 15.7% in 300 μm and 10 μm thick stand-alone silicon solar cell devices, respectively. The presence of SiC significantly suppressed the interface recombination in bottom silicon subcell. Detailed realistic technology computer aided design (TCAD) analysis has been performed to predict the behaviour of the device.

Monolithically interconnected silicon-film™ module technology

NASA Astrophysics Data System (ADS)

DelleDonne, E. J.; Ford, D. H.; Hall, R. B.; Ingram, A. E.; Rand, J. A.; Barnett, A. M.

1999-03-01

AstroPower is developing an advanced thin-silicon-based, photovoltaic module product. A low-cost monolithic interconnected device is being integrated into a module that combines the design and process features of advanced light trapped, thin-silicon solar cells. This advanced product incorporates a low-cost substrate, a nominally 50-μm thick grown silicon layer with minority carrier diffusion lengths exceeding the active layer thickness, light trapping due to back-surface reflection, and back-surface passivation. The thin silicon layer enables high solar cell performance and can lead to a module conversion efficiency as high as 19%. These performance design features, combined with low-cost manufacturing using relatively low-cost capital equipment, continuous processing and a low-cost substrate, will lead to high-performance, low-cost photovoltaic panels.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Silicon-Based Quantum MOS Technology Development

DTIC Science & Technology

2000-03-07

resonant interband tunnel diodes were demonstrated with peak current density greater than 104 A/cm2; peak-to-valley current ratio exceeding 2 was...photon emission reduce the peak-to-valley current ratio and device performance. Therefore, interband tunnel devices should be more resilient to...Comparison of bipolar interband tunnel and optical devices: (a) Esaki diode biased into the valley current region and (b) optical light emitter. The Esaki

Reconfigurable silicon thermo-optical device based on spectral tuning of ring resonators.

PubMed

Fegadolli, William S; Almeida, Vilson R; Oliveira, José Edimar Barbosa

2011-06-20

A novel tunable and reconfigurable thermo-optical device is theoretically proposed and analyzed in this paper. The device is designed to be entirely compatible with CMOS process and to work as a thermo-optical filter or modulator. Numerical results, made by means of analytical and Finite-Difference Time-Domain (FDTD) methods, show that a compact device enables a broad bandwidth operation, of up to 830 GHz, which allows the device to work under a large temperature variation, of up to 96 K.

Graphene devices based on laser scribing technology

NASA Astrophysics Data System (ADS)

Qiao, Yan-Cong; Wei, Yu-Hong; Pang, Yu; Li, Yu-Xing; Wang, Dan-Yang; Li, Yu-Tao; Deng, Ning-Qin; Wang, Xue-Feng; Zhang, Hai-Nan; Wang, Qian; Yang, Zhen; Tao, Lu-Qi; Tian, He; Yang, Yi; Ren, Tian-Ling

2018-04-01

Graphene with excellent electronic, thermal, optical, and mechanical properties has great potential applications. The current devices based on graphene grown by micromechanical exfoliation, chemical vapor deposition (CVD), and thermal decomposition of silicon carbide are still expensive and inefficient. Laser scribing technology, a low-cost and time-efficient method of fabricating graphene, is introduced in this review. The patterning of graphene can be directly performed on solid and flexible substrates. Therefore, many novel devices such as strain sensors, acoustic devices, memory devices based on laser scribing graphene are fabricated. The outlook and challenges of laser scribing technology have also been discussed. Laser scribing may be a potential way of fabricating wearable and integrated graphene systems in the future.

Fabrication and testing of freestanding Si nanogratings for UV filtration on space-based particle sensors.

PubMed

Mukherjee, Pran; Zurbuchen, Thomas H; Guo, L Jay

2009-08-12

We demonstrate complete fabrication process integration and device performance of sturdy, self-supported transmission gratings in silicon. Gratings are patterned with nanoimprint lithography and aluminum liftoff on silicon-on-insulator wafers. Double-sided deep reactive ion etching (DRIE) creates freestanding 120 nm half-pitch gratings with 2000 nm depth and built-in 1 mm pitch bulk silicon support structures. Optical characterization demonstrates 10(-4) transmission of UV in the 190-250 nm band while a 25-30% geometric transparency allows particles to pass unimpeded for space plasma measurements.

Last Advances in Silicon-Based Optical Biosensors

PubMed Central

Fernández Gavela, Adrián; Grajales García, Daniel; Ramirez, Jhonattan C.; Lechuga, Laura M.

2016-01-01

We review the most important achievements published in the last five years in the field of silicon-based optical biosensors. We focus specially on label-free optical biosensors and their implementation into lab-on-a-chip platforms, with an emphasis on developments demonstrating the capability of the devices for real bioanalytical applications. We report on novel transducers and materials, improvements of existing transducers, new and improved biofunctionalization procedures as well as the prospects for near future commercialization of these technologies. PMID:26927105

Silicon Carbide Power Devices and Integrated Circuits

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

2017-01-01

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

Silicon nanowire device and method for its manufacture

DOEpatents

Okandan, Murat; Draper, Bruce L.; Resnick, Paul J.

2017-01-03

There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akhter, Perveen; Huang, Mengbing, E-mail: mhuang@albany.edu; Spratt, William

Plasmonic effects associated with metal nanostructures are expected to hold the key to tailoring light emission/propagation and harvesting solar energy in materials including single crystal silicon which remains the backbone in the microelectronics and photovoltaics industries but unfortunately, lacks many functionalities needed for construction of advanced photonic and optoelectronics devices. Currently, silicon plasmonic structures are practically possible only in the configuration with metal nanoparticles or thin film arrays on a silicon surface. This does not enable one to exploit the full potential of plasmonics for optical engineering in silicon, because the plasmonic effects are dominant over a length of ∼50 nm,more » and the active device region typically lies below the surface much beyond this range. Here, we report on a novel method for the formation of silver nanoparticles embedded within a silicon crystal through metal gettering from a silver thin film deposited at the surface to nanocavities within the Si created by hydrogen ion implantation. The refractive index of the Ag-nanostructured layer is found to be 3–10% lower or higher than that of silicon for wavelengths below or beyond ∼815–900 nm, respectively. Around this wavelength range, the optical extinction values increase by a factor of 10–100 as opposed to the pure silicon case. Increasing the amount of gettered silver leads to an increased extinction as well as a redshift in wavelength position for the resonance. This resonance is attributed to the surface plasmon excitation of the resultant silver nanoparticles in silicon. Additionally, we show that the profiles for optical constants in silicon can be tailored by varying the position and number of nanocavity layers. Such silicon crystals with embedded metal nanostructures would offer novel functional base structures for applications in silicon photonics, optoelectronics, photovoltaics, and plasmonics.« less

RFIC's challenges for third-generation wireless systems

NASA Astrophysics Data System (ADS)

Boric-Lubecke, Olga; Lin, Jenshan; Gould, Penny; Kermalli, Munawar

2001-11-01

Third generation (3G) cellular wireless systems are envisioned to offer low cost, high-capacity mobile communications with data rates of up to 2 Mbit/s, with global roaming and advanced data services. Besides adding mobility to the internet, 3G systems will provide location-based services, as well as personalized information and entertainment. Low cost, high dynamic-range radios, both for base stations (BS) and for mobile stations (MS) are required to enable worldwide deployment of such networks. A receiver's reference sensitivity, intermodulation characteristics, and blocking characteristics, set by a wireless standard, define performance requirements of individual components of a receiver front end. Since base station handles multiple signals from various distances simultaneously, its radio specifications are significantly more demanding than those for mobile devices. While high level of integration has already been achieved for second generation hand-sets using low-cost silicon technologies, the cost and size reduction of base stations still remains a challenge and necessity. While silicon RFIC technology is steadily improving, it is still difficult to achieve noise figure (NF), linearity, and phase noise requirements with presently available devices. This paper will discuss base station specification for 2G (GSM) and 3G (UMTS) systems, as well as the feasibility of implementing base station radios in low-cost silicon processes.

Reconfigurable Cellular Photonic Crystal Arrays (RCPA)

DTIC Science & Technology

2013-03-01

signal processing based on reconfigurable integrated optics devices. This technology has the potential to revolutionize the design circle of optical...Accomplishments III.A. Design and fabrication of an accumulation-mode modulator Figure 1(a) shows the schematic of a compact resonator on the double-Si... integration of silicon nitride on silicon-on-insulator platform to enhance the arsenal of photonic circuit designers . The coherent integration of

Enhancement of green electroluminescence from nanocrystalline silicon by wet and dry processes.

PubMed

Sato, Keisuke; Hirakuri, Kenji

2006-01-01

Correlation between defects and luminescence property from electroluminescent (EL) device composed of nanocrystalline silicon (nc-Si) prepared by wet and dry processes such as hydrofluoric (HF) acid solution treatment and annealing have investigated using electron spin resonance and EL measurements. The EL device using HF-treated nc-Si emitted strong red light, because of existence of only P'ce-centers (radiative recombination centers) on the surface vicinity. On the other hand, the EL device using annealed nc-Si above 400 degrees C exhibited green luminescence by the reduction of particle size due to surface oxidation. When the annealing temperature was risen from 400 degrees C up to 600 degrees C, the green luminescence strengthened with increasing the P'ce-centers. These results indicate that the formation of many radiative recombination centers onto the nc-Si surface vicinity lead to the enhancement of green luminescence from the nc-Si based EL device.

Feasibility study for future implantable neural-silicon interface devices.

PubMed

Al-Armaghany, Allann; Yu, Bo; Mak, Terrence; Tong, Kin-Fai; Sun, Yihe

2011-01-01

The emerging neural-silicon interface devices bridge nerve systems with artificial systems and play a key role in neuro-prostheses and neuro-rehabilitation applications. Integrating neural signal collection, processing and transmission on a single device will make clinical applications more practical and feasible. This paper focuses on the wireless antenna part and real-time neural signal analysis part of implantable brain-machine interface (BMI) devices. We propose to use millimeter-wave for wireless connections between different areas of a brain. Various antenna, including microstrip patch, monopole antenna and substrate integrated waveguide antenna are considered for the intra-cortical proximity communication. A Hebbian eigenfilter based method is proposed for multi-channel neuronal spike sorting. Folding and parallel design techniques are employed to explore various structures and make a trade-off between area and power consumption. Field programmable logic arrays (FPGAs) are used to evaluate various structures.

Low-Actuation Voltage MEMS Digital-to-Analog Converter with Parylene Spring Structures

PubMed Central

Ma, Cheng-Wen; Lee, Fu-Wei; Liao, Hsin-Hung; Kuo, Wen-Cheng; Yang, Yao-Joe

2015-01-01

We propose an electrostatically-actuated microelectromechanical digital-to-analog converter (M-DAC) device with low actuation voltage. The spring structures of the silicon-based M-DAC device were monolithically fabricated using parylene-C. Because the Young’s modulus of parylene-C is considerably lower than that of silicon, the electrostatic microactuators in the proposed device require much lower actuation voltages. The actuation voltage of the proposed M-DAC device is approximately 6 V, which is less than one half of the actuation voltages of a previously reported M-DAC equipped with electrostatic microactuators. The measured total displacement of the proposed three-bit M-DAC is nearly 504 nm, and the motion step is approximately 72 nm. Furthermore, we demonstrated that the M-DAC can be employed as a mirror platform with discrete displacement output for a noncontact surface profiling system. PMID:26343682

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

NASA Astrophysics Data System (ADS)

Shiota, Koki; Kai, Kazuho; Nagaoka, Shiro; Tsuji, Takuto; Wakahara, Akihiro; Rusop, Mohamad

2016-07-01

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As the result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.

Method for implementation of back-illuminated CMOS or CCD imagers

NASA Technical Reports Server (NTRS)

Pain, Bedabrata (Inventor)

2008-01-01

A method for implementation of back-illuminated CMOS or CCD imagers. An oxide layer buried between silicon wafer and device silicon is provided. The oxide layer forms a passivation layer in the imaging structure. A device layer and interlayer dielectric are formed, and the silicon wafer is removed to expose the oxide layer.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

Applications of the silicon wafer direct-bonding technique to electron devices

NASA Astrophysics Data System (ADS)

Furukawa, K.; Nakagawa, A.

1990-01-01

A silicon wafer direct-bonding (SDB) technique has been developed. A pair of bare silicon wafers, as well as an oxidized wafer pair, are bonded throughout the wafer surfaces without any bonding material. Conventional semiconductor device processes can be used for the bonded wafers, since the bonded interface is stable thermally, chemically, mechanically and electrically. Therefore, the SDB technique is very attractive, and has been applied to several kinds of electron devices. Bare silicon to bare silicon bonding is an alternative for epitaxial growth. A thick, high quality and high resistivity layer on a low resistivity substrate was obtained without autodoping. 1800 V insulated gate bipolar transistors were developed using these SDB wafers. No electrical resistance was observed at the bonded bare silicon interfaces. If oxidized wafers are bonded, the two wafers are electrically isolated, providing silicon on insulator (SOI) wafers. Dielectrically isolated photodiode arrays were fabricated on the SOI wafers and 500 V power IC's are now being developed.

Transfer of micro and nano-photonic silicon nanomembrane waveguide devices on flexible substrates.

PubMed

Ghaffari, Afshin; Hosseini, Amir; Xu, Xiaochuan; Kwong, David; Subbaraman, Harish; Chen, Ray T

2010-09-13

This paper demonstrates transfer of optical devices without extra un-patterned silicon onto low-cost, flexible plastic substrates using single-crystal silicon nanomembranes. Employing this transfer technique, stacking two layers of silicon nanomembranes with photonic crystal waveguide in the first layer and multi mode interference couplers in the second layer is shown, respectively. This technique is promising to realize high density integration of multilayer hybrid structures on flexible substrates.

Effects of 22 MeV protons on single junction and silicon controlled rectifiers

NASA Technical Reports Server (NTRS)

Beatty, M. E., III

1972-01-01

The effects of 22-MeV protons on various types of silicon single junction and silicon controlled rectifiers were investigated. The results show that low-leakage devices and silicon controlled rectifiers are the most susceptable to radiation damage. There are also differences noted between single junction rectifiers of the same type made by different manufacturers, which emphasizes the need for better selection of devices used in spacecraft.

Vertical waveguides integrated with silicon photodetectors: Towards high efficiency and low cross-talk image sensors

NASA Astrophysics Data System (ADS)

Tut, Turgut; Dan, Yaping; Duane, Peter; Yu, Young; Wober, Munib; Crozier, Kenneth B.

2012-01-01

We describe the experimental realization of vertical silicon nitride waveguides integrated with silicon photodetectors. The waveguides are embedded in a silicon dioxide layer. Scanning photocurrent microscopy is performed on a device containing a waveguide, and on a device containing the silicon dioxide layer, but without the waveguide. The results confirm the waveguide's ability to guide light onto the photodetector with high efficiency. We anticipate that the use of these structures in image sensors, with one waveguide per pixel, would greatly improve efficiency and significantly reduce inter-pixel crosstalk.

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

PubMed

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

NASA Astrophysics Data System (ADS)

Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

2013-08-01

In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

Silicon Nanowire-Based Devices for Gas-Phase Sensing

PubMed Central

Cao, Anping; Sudhölter, Ernst J.R.; de Smet, Louis C.P.M.

2014-01-01

Since their introduction in 2001, SiNW-based sensor devices have attracted considerable interest as a general platform for ultra-sensitive, electrical detection of biological and chemical species. Most studies focus on detecting, sensing and monitoring analytes in aqueous solution, but the number of studies on sensing gases and vapors using SiNW-based devices is increasing. This review gives an overview of selected research papers related to the application of electrical SiNW-based devices in the gas phase that have been reported over the past 10 years. Special attention is given to surface modification strategies and the sensing principles involved. In addition, future steps and technological challenges in this field are addressed. PMID:24368699

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M.; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2015-09-08

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the gap region between the first electrical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2013-11-26

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the the gap region between the first electical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

Nonclassical light sources for silicon photonics

NASA Astrophysics Data System (ADS)

Bajoni, Daniele; Galli, Matteo

2017-09-01

Quantum photonics has recently attracted a lot of attention for its disruptive potential in emerging technologies like quantum cryptography, quantum communication and quantum computing. Driven by the impressive development in nanofabrication technologies and nanoscale engineering, silicon photonics has rapidly become the platform of choice for on-chip integration of high performing photonic devices, now extending their functionalities towards quantum-based applications. Focusing on quantum Information Technology (qIT) as a key application area, we review recent progress in integrated silicon-based sources of nonclassical states of light. We assess the state of the art in this growing field and highlight the challenges that need to be overcome to make quantum photonics a reliable and widespread technology.

Optical bio-chemical sensors on SNOW ring resonators.

PubMed

Khorasaninejad, Mohammadreza; Clarke, Nigel; Anantram, M P; Saini, Simarjeet Singh

2011-08-29

In this paper, we propose and analyze novel ring resonator based bio-chemical sensors on silicon nanowire optical waveguide (SNOW) and show that the sensitivity of the sensors can be increased by an order of magnitude as compared to silicon-on-insulator based ring resonators while maintaining high index contrast and compact devices. The core of the waveguide is hollow and allows for introduction of biomaterial in the center of the mode, thereby increasing the sensitivity of detection. A sensitivity of 243 nm/refractive index unit (RIU) is achieved for a change in bulk refractive index. For surface attachment, the sensor is able to detect monolayer attachments as small as 1 Å on the surface of the silicon nanowires.

Optical bio-chemical sensors on SNOW ring resonators

NASA Astrophysics Data System (ADS)

Khorasaninejad, Mohammadreza; Clarke, Nigel; Anantram, M. P.; Singh Saini, Simarjeet

2011-08-01

In this paper, we propose and analyze novel ring resonator based bio-chemical sensors on silicon nanowire optical waveguide (SNOW) and show that the sensitivity of the sensors can be increased by an order of magnitude as compared to silicon-on-insulator based ring resonators while maintaining high index contrast and compact devices. The core of the waveguide is hollow and allows for introduction of biomaterial in the center of the mode, thereby increasing the sensitivity of detection. A sensitivity of 243 nm/refractive index unit (RIU) is achieved for a change in bulk refractive index. For surface attachment, the sensor is able to detect monolayer attachments as small as 1 Å on the surface of the silicon nanowires.

Silicon MOS inductor

DOEpatents

Balberg, Isaac

1981-01-01

A device made of amorphous silicon which exhibits inductive properties at certain voltage biases and in certain frequency ranges in described. Devices of the type described can be made in integrated circuit form.

All-optical control of light on a graphene-on-silicon nitride chip using thermo-optic effect.

PubMed

Qiu, Ciyuan; Yang, Yuxing; Li, Chao; Wang, Yifang; Wu, Kan; Chen, Jianping

2017-12-06

All-optical signal processing avoids the conversion between optical signals and electronic signals and thus has the potential to achieve a power efficient photonic system. Micro-scale all-optical devices for light manipulation are the key components in the all-optical signal processing and have been built on the semiconductor platforms (e.g., silicon and III-V semiconductors). However, the two-photon absorption (TPA) effect and the free-carrier absorption (FCA) effect in these platforms deteriorate the power handling and limit the capability to realize complex functions. Instead, silicon nitride (Si 3 N 4 ) provides a possibility to realize all-optical large-scale integrated circuits due to its insulator nature without TPA and FCA. In this work, we investigate the physical dynamics of all-optical control on a graphene-on-Si 3 N 4 chip based on thermo-optic effect. In the experimental demonstration, a switching response time constant of 253.0 ns at a switching energy of ~50 nJ is obtained with a device dimension of 60 μm × 60 μm, corresponding to a figure of merit (FOM) of 3.0 nJ mm. Detailed coupled-mode theory based analysis on the thermo-optic effect of the device has been performed.

Polymer-silicon nanosheet composites: bridging the way to optoelectronic applications

NASA Astrophysics Data System (ADS)

Lyuleeva, Alina; Helbich, Tobias; Rieger, Bernhard; Lugli, Paolo

2017-04-01

The fabrication of electronic devices from sensitive, functional, two-dimensional (2D) nanomaterials with anisotropic structural properties has attracted much attention. Many theoretical and experimental studies have been performed; however, such materials have not been used in applications. In this context, the focus has shifted toward the study and synthesis of new materials. Freestanding hydrogen-terminated silicon nanosheets (SiNSs) are a new class of material with outstanding (opto)electronic properties (e.g. photoluminescence at approximately 510 nm) (Nakano 2014 J. Ceram. Soc. Japan 122 748). SiNSs are promising candidates for use in nanoelectronic devices and flexible electronics. Additional reasons for interest in such nanomaterials are their structural anisotropy and the fact that they are made from silicon. Here, we present examples for the application of functionalized SiNS-based composites as active materials for photonic sensors. The implementation of SiNSs in a covalent nanocomposite not only improves their stability but also facilitates subsequent device fabrication. Thus, SiNSs can be used in a straightforward setup preparation procedure. We show that the modification of novel Si-based 2D nanosheets with selected organic components not only opens a new field of photosensitive applications but also improves the processability of these nanosheets (Niu et al 2014 Sci. Rep. 4 4810, Chimene et al 2015 Adv. Mater. 27 7261).

The study of surface acoustic wave charge transfer device

NASA Technical Reports Server (NTRS)

Papanicolaou, N.; Lin, H. C.

1978-01-01

A surface acoustic wave-charge transfer device, consisting of an n-type silicon substrate, a thermally grown silicon dioxide layer, and a sputtered film of piezoelectric zinc oxide is proposed as a means of circumventing problems associated with charge-coupled device (CCD) applications in memory, signal processing, and imaging. The proposed device creates traveling longitudinal electric fields in the silicon and replaces the multiphase clocks in CCD's. The traveling electric fields create potential wells which carry along charges stored there. These charges may be injected into the wells by light or by using a p-n junction as in conventional CCD's.

Enhanced Electroluminescence from Silicon Quantum Dots Embedded in Silicon Nitride Thin Films Coupled with Gold Nanoparticles in Light Emitting Devices

PubMed Central

Muñoz-Rosas, Ana Luz; Alonso-Huitrón, Juan Carlos

2018-01-01

Nowadays, the use of plasmonic metal layers to improve the photonic emission characteristics of several semiconductor quantum dots is a booming tool. In this work, we report the use of silicon quantum dots (SiQDs) embedded in a silicon nitride thin film coupled with an ultra-thin gold film (AuNPs) to fabricate light emitting devices. We used the remote plasma enhanced chemical vapor deposition technique (RPECVD) in order to grow two types of silicon nitride thin films. One with an almost stoichiometric composition, acting as non-radiative spacer; the other one, with a silicon excess in its chemical composition, which causes the formation of silicon quantum dots imbibed in the silicon nitride thin film. The ultra-thin gold film was deposited by the direct current (DC)-sputtering technique, and an aluminum doped zinc oxide thin film (AZO) which was deposited by means of ultrasonic spray pyrolysis, plays the role of the ohmic metal-like electrode. We found that there is a maximum electroluminescence (EL) enhancement when the appropriate AuNPs-spacer-SiQDs configuration is used. This EL is achieved at a moderate turn-on voltage of 11 V, and the EL enhancement is around four times bigger than the photoluminescence (PL) enhancement of the same AuNPs-spacer-SiQDs configuration. From our experimental results, we surmise that EL enhancement may indeed be due to a plasmonic coupling. This kind of silicon-based LEDs has the potential for technology transfer. PMID:29565267

Benzocyclobutene-based electric micromachines supported on microball bearings: Design, fabrication, and characterization

NASA Astrophysics Data System (ADS)

Modafe, Alireza

This dissertation summarizes the research activities that led to the development of the first microball-bearing-supported linear electrostatic micromotor with benzocyclobutene (BCB) low-k polymer insulating layers. The primary application of this device is long-range, high-speed linear micropositioning. The future generations of this device include rotary electrostatic micromotors and microgenerators. The development of the first generation of microball-bearing-supported micromachines, including device theory, design, and modeling, material characterization, process development, device fabrication, and device test and characterization is presented. The first generation of these devices is based on a 6-phase, bottom-drive, linear, variable-capacitance micromotor (B-LVCM). The design of the electrical and mechanical components of the micromotor, lumped-circuit modeling of the device and electromechanical characteristics, including variable capacitance, force, power, and speed are presented. Electrical characterization of BCB polymers, characterization of BCB chemical mechanical planarization (CMP), development of embedded BCB in silicon (EBiS) process, and integration of device components using microfabrication techniques are also presented. The micromotor consists of a silicon stator, a silicon slider, and four stainless-steel microballs. The aligning force profile of the micromotor was extracted from simulated and measured capacitances of all phases. An average total aligning force of 0.27 mN with a maximum of 0.41 mN, assuming a 100 V peak-to-peak square-wave voltage, was measured. The operation of the micromotor was verified by applying square-wave voltages and characterizing the slider motion. An average slider speed of 7.32 mm/s when excited by a 40 Hz, 120 V square-wave voltage was reached without losing the synchronization. This research has a pivotal impact in the field of power microelectromechanical systems (MEMS). It establishes the foundation for the development of more reliable, efficient electrostatic micromachines with variety of applications such as micropropulsion, high-speed micropumping, microfluid delivery, and microsystem power generation.

Microdynamic Devices Fabricated on Silicon-On-Sapphire Substrates.

DTIC Science & Technology

Silicon-on-sapphire substrates are provided for the fabrication of micromechanical devices, such as micromotors . The high voltage stand-off...a consequence, the electrostatically driven devices, micromotors , can be incorporated in the integrated circuits and yet be powered at elevated voltages to increase their work potential.

Micro-opto-mechanical devices and systems using epitaxial lift off

NASA Technical Reports Server (NTRS)

Camperi-Ginestet, C.; Kim, Young W.; Wilkinson, S.; Allen, M.; Jokerst, N. M.

1993-01-01

The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.

Influence of polarized bias and porous silicon morphology on the electrical behavior of Au-porous silicon contacts*

PubMed Central

Zhao, Yue; Li, Dong-sheng; Xing, Shou-xiang; Yang, De-ren; Jiang, Min-hua

2005-01-01

This paper reports the surface morphology and I-V curves of porous silicon (PS) samples and related devices. The observed fabrics on the PS surface were found to affect the electrical property of PS devices. When the devices were operated under different external bias (10 V or 3 V) for 10 min, their observed obvious differences in electrical properties may be due to the different control mechanisms in the Al/PS interface and PS matrix morphology. PMID:16252350

Microstereolithography for polymer-based based MEMS

NASA Astrophysics Data System (ADS)

Varadan, Vijay K.; Xie, Jining

2003-07-01

Microfabrication techniques such as bulk micromachining and surface micromachining currently employed to conceive MEMS are largely derived from the standard IC and microelectronics technology. Even though many MEMS devices with integrated electronics have been achieved by using the traditional micromachining techniques, some limitations have nevertheless to be underlined: 1) these techniques are very expensive and need specific installations as well as a cleanroom environment, 2) the materials that can be used up to now are restricted to silicon and metals, 3) the manufacture of 3D parts having curved surfaces or an important number of layers is not possible. Moreover, for some biological applications, the materials used for sensors must be compatible with human body and the actuators need to have high strain and displacement which the current silicon based MEMS do not provide. It is thus natural for the researchers to 'look' for alternative methods such as Microstereolithography (MSL) to make 3D sensors and actuators using polymeric based materials. For MSL techniques to be successful as their silicon counterparts, one has to come up with multifunctional polymers with electrical properties comparable to silicon. These multifunctional polymers should not only have a high sensing capability but also a high strain and actuation performance. A novel UV-curable polymer uniformly bonded with functionalized nanotubes was synthesized via a modified three-step in-situ polymerization. Purified multi-walled nanotubes, gained from the microwave chemical vapor deposition method, were functionalized by oxidation. The UV curable polymer was prepared from toluene diisocyanate (TDI), functionalized nanotubes, and 2-hydroxyethyl methacrylate (HEMA). The chemical bonds between -NCO groups of TDI and -OH, -COOH groups of functionalized nanotubes help for conceiving polymeric based MEMS devices. A cost effective fabrication techniques was presented using Micro Stereo Lithography and an example of a micropump was also described. The wireless concept of the device has many applications including implanted medical delivery systems, chemical and biological instruments, fluid delivery in engines, pump coolants and refrigerants for local cooling of electronic components.

Simple and inexpensive micromachined aluminum microfluidic devices for acoustic focusing of particles and cells.

PubMed

Gautam, Gayatri P; Burger, Tobias; Wilcox, Andrew; Cumbo, Michael J; Graves, Steven W; Piyasena, Menake E

2018-05-01

We introduce a new method to construct microfluidic devices especially useful for bulk acoustic wave (BAW)-based manipulation of cells and microparticles. To obtain efficient acoustic focusing, BAW devices require materials that have high acoustic impedance mismatch relative to the medium in which the cells/microparticles are suspended and materials with a high-quality factor. To date, silicon and glass have been the materials of choice for BAW-based acoustofluidic channel fabrication. Silicon- and glass-based fabrication is typically performed in clean room facilities, generates hazardous waste, and can take several hours to complete the microfabrication. To address some of the drawbacks in fabricating conventional BAW devices, we explored a new approach by micromachining microfluidic channels in aluminum substrates. Additionally, we demonstrate plasma bonding of poly(dimethylsiloxane) (PDMS) onto micromachined aluminum substrates. Our goal was to achieve an approach that is both low cost and effective in BAW applications. To this end, we micromachined aluminum 6061 plates and enclosed the systems with a thin PDMS cover layer. These aluminum/PDMS hybrid microfluidic devices use inexpensive materials and are simply constructed outside a clean room environment. Moreover, these devices demonstrate effectiveness in BAW applications as demonstrated by efficient acoustic focusing of polystyrene microspheres, bovine red blood cells, and Jurkat cells and the generation of multiple focused streams in flow-through systems. Graphical abstract The aluminum acoustofluidic device and the generation of multinode focusing of particles.

Review Application of Nanostructured Black Silicon

NASA Astrophysics Data System (ADS)

Lv, Jian; Zhang, Ting; Zhang, Peng; Zhao, Yingchun; Li, Shibin

2018-04-01

As a widely used semiconductor material, silicon has been extensively used in many areas, such as photodiode, photodetector, and photovoltaic devices. However, the high surface reflectance and large bandgap of traditional bulk silicon restrict the full use of the spectrum. To solve this problem, many methods have been developed. Among them, the surface nanostructured silicon, namely black silicon, is the most efficient and widely used. Due to its high absorption in the wide range from UV-visible to infrared, black silicon is very attractive for using as sensitive layer of photodiodes, photodetector, solar cells, field emission, luminescence, and other photoelectric devices. Intensive study has been performed to understand the enhanced absorption of black silicon as well as the response extended to infrared spectrum range. In this paper, the application of black silicon is systematically reviewed. The limitations and challenges of black silicon material are also discussed. This article will provide a meaningful introduction to black silicon and its unique properties.

Effect Of Auger Recombination In An Ion Track

NASA Technical Reports Server (NTRS)

Edmonds, Larry D.

1993-01-01

Report presents theoretical calculations of contribution of Auger recombination to depletion of charge carriers from ionization track left by passage of energetic heavy ion through silicon-based electronic device.

Low-temperature plasma-deposited silicon epitaxial films: Growth and properties

DOE Office of Scientific and Technical Information (OSTI.GOV)

Demaurex, Bénédicte, E-mail: benedicte.demaurex@epfl.ch; Bartlome, Richard; Seif, Johannes P.

2014-08-07

Low-temperature (≤200 °C) epitaxial growth yields precise thickness, doping, and thermal-budget control, which enables advanced-design semiconductor devices. In this paper, we use plasma-enhanced chemical vapor deposition to grow homo-epitaxial layers and study the different growth modes on crystalline silicon substrates. In particular, we determine the conditions leading to epitaxial growth in light of a model that depends only on the silane concentration in the plasma and the mean free path length of surface adatoms. For such growth, we show that the presence of a persistent defective interface layer between the crystalline silicon substrate and the epitaxial layer stems not only frommore » the growth conditions but also from unintentional contamination of the reactor. Based on our findings, we determine the plasma conditions to grow high-quality bulk epitaxial films and propose a two-step growth process to obtain device-grade material.« less

Photonic crystal nanocavity assisted rejection ratio tunable notch microwave photonic filter

PubMed Central

Long, Yun; Xia, Jinsong; Zhang, Yong; Dong, Jianji; Wang, Jian

2017-01-01

Driven by the increasing demand on handing microwave signals with compact device, low power consumption, high efficiency and high reliability, it is highly desired to generate, distribute, and process microwave signals using photonic integrated circuits. Silicon photonics offers a promising platform facilitating ultracompact microwave photonic signal processing assisted by silicon nanophotonic devices. In this paper, we propose, theoretically analyze and experimentally demonstrate a simple scheme to realize ultracompact rejection ratio tunable notch microwave photonic filter (MPF) based on a silicon photonic crystal (PhC) nanocavity with fixed extinction ratio. Using a conventional modulation scheme with only a single phase modulator (PM), the rejection ratio of the presented MPF can be tuned from about 10 dB to beyond 60 dB. Moreover, the central frequency tunable operation in the high rejection ratio region is also demonstrated in the experiment. PMID:28067332

Array Technology for Terahertz Imaging

NASA Technical Reports Server (NTRS)

Reck, Theodore; Siles, Jose; Jung, Cecile; Gill, John; Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, Imran; Cooper, Ken

2012-01-01

Heterodyne terahertz (0.3 - 3THz) imaging systems are currently limited to single or a low number of pixels. Drastic improvements in imaging sensitivity and speed can be achieved by replacing single pixel systems with an array of detectors. This paper presents an array topology that is being developed at the Jet Propulsion Laboratory based on the micromachining of silicon. This technique fabricates the array's package and waveguide components by plasma etching of silicon, resulting in devices with precision surpassing that of current metal machining techniques. Using silicon increases the versatility of the packaging, enabling a variety of orientations of circuitry within the device which increases circuit density and design options. The design of a two-pixel transceiver utilizing a stacked architecture is presented that achieves a pixel spacing of 10mm. By only allowing coupling from the top and bottom of the package the design can readily be arrayed in two dimensions with a spacing of 10mm x 18mm.

Photonic crystal nanocavity assisted rejection ratio tunable notch microwave photonic filter

NASA Astrophysics Data System (ADS)

Long, Yun; Xia, Jinsong; Zhang, Yong; Dong, Jianji; Wang, Jian

2017-01-01

Driven by the increasing demand on handing microwave signals with compact device, low power consumption, high efficiency and high reliability, it is highly desired to generate, distribute, and process microwave signals using photonic integrated circuits. Silicon photonics offers a promising platform facilitating ultracompact microwave photonic signal processing assisted by silicon nanophotonic devices. In this paper, we propose, theoretically analyze and experimentally demonstrate a simple scheme to realize ultracompact rejection ratio tunable notch microwave photonic filter (MPF) based on a silicon photonic crystal (PhC) nanocavity with fixed extinction ratio. Using a conventional modulation scheme with only a single phase modulator (PM), the rejection ratio of the presented MPF can be tuned from about 10 dB to beyond 60 dB. Moreover, the central frequency tunable operation in the high rejection ratio region is also demonstrated in the experiment.

Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging.

PubMed

Liao, Shichao; Zong, Xu; Seger, Brian; Pedersen, Thomas; Yao, Tingting; Ding, Chunmei; Shi, Jingying; Chen, Jian; Li, Can

2016-05-04

Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge injection, our device shows an optimal solar-to-chemical conversion efficiency of ∼5.9% and an overall photon-chemical-electricity energy conversion efficiency of ∼3.2%, which, to our knowledge, outperforms previously reported SRFCs. The proposed SRFC can be self-photocharged to 0.8 V and delivers a discharge capacity of 730 mAh l(-1). Our work may guide future designs for highly efficient solar rechargeable devices.

Photonic crystal nanocavity assisted rejection ratio tunable notch microwave photonic filter.

PubMed

Long, Yun; Xia, Jinsong; Zhang, Yong; Dong, Jianji; Wang, Jian

2017-01-09

Driven by the increasing demand on handing microwave signals with compact device, low power consumption, high efficiency and high reliability, it is highly desired to generate, distribute, and process microwave signals using photonic integrated circuits. Silicon photonics offers a promising platform facilitating ultracompact microwave photonic signal processing assisted by silicon nanophotonic devices. In this paper, we propose, theoretically analyze and experimentally demonstrate a simple scheme to realize ultracompact rejection ratio tunable notch microwave photonic filter (MPF) based on a silicon photonic crystal (PhC) nanocavity with fixed extinction ratio. Using a conventional modulation scheme with only a single phase modulator (PM), the rejection ratio of the presented MPF can be tuned from about 10 dB to beyond 60 dB. Moreover, the central frequency tunable operation in the high rejection ratio region is also demonstrated in the experiment.

Atomic Scale Understanding of Poly-Si/SiO2/c-Si Passivated Contacts: Passivation Degradation Due to Metallization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aguiar, Jeffery A.; Young, David; Lee, Benjamin

2016-11-21

The key attributes for achieving high efficiency crystalline silicon solar cells include class leading developments in the ability to approach the theoretical limits of silicon solar technology (29.4% efficiency). The push for high efficiency devices is further compounded with the clear need for passivation to reduce recombination at the metal contacts. At the same time there is stringent requirement to retain the same material device quality, surface passivation, and performance characteristics following subsequent processing. The development of passivated silicon cell structures that retain active front and rear surface passivation and overall material cell quality is therefore a relevant and activemore » area of development. To address the potential outcomes of metallization on passivated silicon stack, we report on some common microstructural features of degradation due to metallization for a series of silicon device stacks. A fundamental materials understanding of the metallization process on retaining high-efficiency passivated Si devices is therefore gained over these series of results.« less

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Spectroscopic Ellipsometry Studies of n-i-p Hydrogenated Amorphous Silicon Based Photovoltaic Devices

PubMed Central

Karki Gautam, Laxmi; Junda, Maxwell M.; Haneef, Hamna F.; Collins, Robert W.; Podraza, Nikolas J.

2016-01-01

Optimization of thin film photovoltaics (PV) relies on characterizing the optoelectronic and structural properties of each layer and correlating these properties with device performance. Growth evolution diagrams have been used to guide production of materials with good optoelectronic properties in the full hydrogenated amorphous silicon (a-Si:H) PV device configuration. The nucleation and evolution of crystallites forming from the amorphous phase were studied using in situ near-infrared to ultraviolet spectroscopic ellipsometry during growth of films prepared as a function of hydrogen to reactive gas flow ratio R = [H2]/[SiH4]. In conjunction with higher photon energy measurements, the presence and relative absorption strength of silicon-hydrogen infrared modes were measured by infrared extended ellipsometry measurements to gain insight into chemical bonding. Structural and optical models have been developed for the back reflector (BR) structure consisting of sputtered undoped zinc oxide (ZnO) on top of silver (Ag) coated glass substrates. Characterization of the free-carrier absorption properties in Ag and the ZnO + Ag interface as well as phonon modes in ZnO were also studied by spectroscopic ellipsometry. Measurements ranging from 0.04 to 5 eV were used to extract layer thicknesses, composition, and optical response in the form of complex dielectric function spectra (ε = ε1 + iε2) for Ag, ZnO, the ZnO + Ag interface, and undoped a-Si:H layer in a substrate n-i-p a-Si:H based PV device structure. PMID:28773255

Method for producing silicon thin-film transistors with enhanced forward current drive

DOEpatents

Weiner, K.H.

1998-06-30

A method is disclosed for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates. 1 fig.

Method for producing silicon thin-film transistors with enhanced forward current drive

DOEpatents

Weiner, Kurt H.

1998-01-01

A method for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates.

Distinct photoresponse in graphene induced by laser irradiation and interfacial gating.

NASA Astrophysics Data System (ADS)

Wang, Wenhui; Guo, Xitao; Nan, Haiyan; Ni, Zhenhua; Spectroscopy; Optoelectronics Group Team

Graphene-based photodetectors have recently received much attention due to its unique optical and electronic properties. The photoresponse modulation plays a crucial role in the study of photocurrent generation mechanism and optoelectronic applications. Here, the tunable p-p +-p junctions of graphene were fabricated through simple laser irradiation process. Distinct photoresponse was observed at the graphene (G)-laser irradiation graphene (LIG) junction. Detailed investigation suggests that the photo-thermoelectric effect, instead of the photovoltaic effect, dominates the photocurrent generation at the G-LIG junction. On the other hand, the localized interface states, existing at the silicon dioxide/lightly doped Si interface, would induce an interfacial gating mechanism, which will enhance the photoresponsivity to 1000 A/W. More important, the photoresponse time of our device has been pushed to 400ns. The current device structure does not need a complicated fabrication process and is fully compatible with silicon technology. This work will open up a route to graphene-based high-performance optoelectronic devices. This work was supported by Southeast University.

Two- and three-dimensional folding of thin film single-crystalline silicon for photovoltaic power applications

PubMed Central

Guo, Xiaoying; Li, Huan; Yeop Ahn, Bok; Duoss, Eric B.; Hsia, K. Jimmy; Lewis, Jennifer A.; Nuzzo, Ralph G.

2009-01-01

Fabrication of 3D electronic structures in the micrometer-to-millimeter range is extremely challenging due to the inherently 2D nature of most conventional wafer-based fabrication methods. Self-assembly, and the related method of self-folding of planar patterned membranes, provide a promising means to solve this problem. Here, we investigate self-assembly processes driven by wetting interactions to shape the contour of a functional, nonplanar photovoltaic (PV) device. A mechanics model based on the theory of thin plates is developed to identify the critical conditions for self-folding of different 2D geometrical shapes. This strategy is demonstrated for specifically designed millimeter-scale silicon objects, which are self-assembled into spherical, and other 3D shapes and integrated into fully functional light-trapping PV devices. The resulting 3D devices offer a promising way to efficiently harvest solar energy in thin cells using concentrator microarrays that function without active light tracking systems. PMID:19934059

Monitoring of Vital Signs with Flexible and Wearable Medical Devices.

PubMed

Khan, Yasser; Ostfeld, Aminy E; Lochner, Claire M; Pierre, Adrien; Arias, Ana C

2016-06-01

Advances in wireless technologies, low-power electronics, the internet of things, and in the domain of connected health are driving innovations in wearable medical devices at a tremendous pace. Wearable sensor systems composed of flexible and stretchable materials have the potential to better interface to the human skin, whereas silicon-based electronics are extremely efficient in sensor data processing and transmission. Therefore, flexible and stretchable sensors combined with low-power silicon-based electronics are a viable and efficient approach for medical monitoring. Flexible medical devices designed for monitoring human vital signs, such as body temperature, heart rate, respiration rate, blood pressure, pulse oxygenation, and blood glucose have applications in both fitness monitoring and medical diagnostics. As a review of the latest development in flexible and wearable human vitals sensors, the essential components required for vitals sensors are outlined and discussed here, including the reported sensor systems, sensing mechanisms, sensor fabrication, power, and data processing requirements. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Compliant displacement-multiplying apparatus for microelectromechanical systems

DOEpatents

Kota, Sridhar; Rodgers, M. Steven; Hetrick, Joel A.

2001-01-01

A pivotless compliant structure is disclosed that can be used to increase the geometric advantage or mechanical advantage of a microelectromechanical (MEM) actuator such as an electrostatic comb actuator, a capacitive-plate electrostatic actuator, or a thermal actuator. The compliant structure, based on a combination of interconnected flexible beams and cross-beams formed of one or more layers of polysilicon or silicon nitride, can provide a geometric advantage of from about 5:1 to about 60:1 to multiply a 0.25-3 .mu.m displacement provided by a short-stroke actuator so that such an actuator can be used to generate a displacement stroke of about 10-34 .mu.m to operate a ratchet-driven MEM device or a microengine. The compliant structure has less play than conventional displacement-multiplying devices based on lever arms and pivoting joints, and is expected to be more reliable than such devices. The compliant structure and an associated electrostatic or thermal actuator can be formed on a common substrate (e.g. silicon) using surface micromachining.

Two- and three-dimensional folding of thin film single-crystalline silicon for photovoltaic power applications.

PubMed

Guo, Xiaoying; Li, Huan; Ahn, Bok Yeop; Duoss, Eric B; Hsia, K Jimmy; Lewis, Jennifer A; Nuzzo, Ralph G

2009-12-01

Fabrication of 3D electronic structures in the micrometer-to-millimeter range is extremely challenging due to the inherently 2D nature of most conventional wafer-based fabrication methods. Self-assembly, and the related method of self-folding of planar patterned membranes, provide a promising means to solve this problem. Here, we investigate self-assembly processes driven by wetting interactions to shape the contour of a functional, nonplanar photovoltaic (PV) device. A mechanics model based on the theory of thin plates is developed to identify the critical conditions for self-folding of different 2D geometrical shapes. This strategy is demonstrated for specifically designed millimeter-scale silicon objects, which are self-assembled into spherical, and other 3D shapes and integrated into fully functional light-trapping PV devices. The resulting 3D devices offer a promising way to efficiently harvest solar energy in thin cells using concentrator microarrays that function without active light tracking systems.

Radio frequency measurements of tunnel couplings and singlet–triplet spin states in Si:P quantum dots

PubMed Central

House, M. G.; Kobayashi, T.; Weber, B.; Hile, S. J.; Watson, T. F.; van der Heijden, J.; Rogge, S.; Simmons, M. Y.

2015-01-01

Spin states of the electrons and nuclei of phosphorus donors in silicon are strong candidates for quantum information processing applications given their excellent coherence times. Designing a scalable donor-based quantum computer will require both knowledge of the relationship between device geometry and electron tunnel couplings, and a spin readout strategy that uses minimal physical space in the device. Here we use radio frequency reflectometry to measure singlet–triplet states of a few-donor Si:P double quantum dot and demonstrate that the exchange energy can be tuned by at least two orders of magnitude, from 20 μeV to 8 meV. We measure dot–lead tunnel rates by analysis of the reflected signal and show that they change from 100 MHz to 22 GHz as the number of electrons on a quantum dot is increased from 1 to 4. These techniques present an approach for characterizing, operating and engineering scalable qubit devices based on donors in silicon. PMID:26548556

Fabrication Process of Silicone-based Dielectric Elastomer Actuators

PubMed Central

Rosset, Samuel; Araromi, Oluwaseun A.; Schlatter, Samuel; Shea, Herbert R.

2016-01-01

This contribution demonstrates the fabrication process of dielectric elastomer transducers (DETs). DETs are stretchable capacitors consisting of an elastomeric dielectric membrane sandwiched between two compliant electrodes. The large actuation strains of these transducers when used as actuators (over 300% area strain) and their soft and compliant nature has been exploited for a wide range of applications, including electrically tunable optics, haptic feedback devices, wave-energy harvesting, deformable cell-culture devices, compliant grippers, and propulsion of a bio-inspired fish-like airship. In most cases, DETs are made with a commercial proprietary acrylic elastomer and with hand-applied electrodes of carbon powder or carbon grease. This combination leads to non-reproducible and slow actuators exhibiting viscoelastic creep and a short lifetime. We present here a complete process flow for the reproducible fabrication of DETs based on thin elastomeric silicone films, including casting of thin silicone membranes, membrane release and prestretching, patterning of robust compliant electrodes, assembly and testing. The membranes are cast on flexible polyethylene terephthalate (PET) substrates coated with a water-soluble sacrificial layer for ease of release. The electrodes consist of carbon black particles dispersed into a silicone matrix and patterned using a stamping technique, which leads to precisely-defined compliant electrodes that present a high adhesion to the dielectric membrane on which they are applied. PMID:26863283

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

PubMed Central

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Gyoo Kim, In; Hyuk Oh, Jin; Ae Kim, Sun; Park, Jaegyu; Kim, Sanggi

2015-01-01

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications. PMID:26061463

Surface chemistry relevant to material processing for semiconductor devices

NASA Astrophysics Data System (ADS)

Okada, Lynne Aiko

Metal-oxide-semiconductor (MOS) structures are the core of many modern integrated circuit (IC) devices. Each material utilized in the different regions of the device has its own unique chemistry. Silicon is the base semiconductor material used in the majority of these devices. With IC device complexity increasing and device dimensions decreasing, understanding material interactions and processing becomes increasingly critical. Hsb2 desorption is the rate-limiting step in silicon growth using silane under low temperature conditions. Activation energies for Hsb2 desorption measured during Si chemical vapor deposition (CVD) versus single-crystal studies are found to be significantly lower. It has been proposed that defect sites on the silicon surface could explain the observed differences. Isothermal Hsb2 desorption studies using laser induced thermal desorption (LITD) techniques have addressed this issue. The growth of low temperature oxides is another relevant issue for fabrication of IC devices. Recent studies using 1,4-disilabutane (DSB) (SiHsb3CHsb2CHsb2SiHsb3) at 100sp°C in ambient Osb2 displayed the successful low temperature growth of silicon dioxide (SiOsb2). However, these studies provided no information about the deposition mechanism. We performed LITD and Fourier transform infrared (FTIR) studies on single-crystal and porous silicon surfaces to examine the adsorption, decomposition, and desorption processes to determine the deposition mechanism. Titanium nitride (TiN) diffusion barriers are necessary in modern metallization structures. Controlled deposition using titanium tetrachloride (TiClsb4) and ammonia (NHsb3) has been demonstrated using atomic layered processing (ALP) techniques. We intended to study the sequential deposition method by monitoring the surface intermediates using LITD techniques. However, formation of a Cl impurity source, ammonium chloride (NHsb4sp+Clsp-), was observed, thereby, limiting our ability for effective studies. Tetrakis(dimethylamino)titanium (Tilbrack N\\{CHsb3\\}sb2rbracksb4) (TDMAT) is another precursor used in the CVD deposition of TiN films in IC devices. Thermal decomposition studies have demonstrated deviations from conformal deposition. Successful conformal deposition may be affected by readsorption of the reaction product, dimethylamine (HNlbrack CHsb3rbracksb2). Detailed studies were performed using LITD techniques in order to understand the adsorption and desorption kinetics of TDMAT and dimethylamine to gain insights about the conformal deposition of TiN.

Lateral power MOSFETs in silicon carbide

NASA Astrophysics Data System (ADS)

Spitz, Jan

2001-07-01

Because of its large bandgap, its high critical electric field, and its high quality native SiO2, silicon carbide is considered to be the material of choice for power switching electronics in the future. Until 1997 the maximum thickness of commercially available epilayers serving as the drift region for power devices has been limited to 10--15 mum, limiting the maximum blocking voltage to 1500 V for vertical power devices in silicon carbide. In this study, we present the first lateral power devices on a semi-insulating vanadium doped substrate of silicon carbide. The first generation of lateral DMOSFETs in 4H-SiC yielded a blocking voltage of 2.6 kV---more than twice what was previously reported for any SiC MOSFETs---but suffered from low MOS channel mobility caused by the high anneal temperatures (≥1600°C) required to activate the p-type ion-implant. Combining the high blocking-voltage of the vanadium-doped substrate with the higher MOS mobility previously achieved by an epitaxially-grown accumulation channel leads us to the LACCUFET device: No p-type implant is necessary. This device shows a blocking voltage of 2.7 kV unmatched by any SiC transistor until February 2000 combined with a much lower specific on-resistance of 3.6 O•cm2. The ability to combine long-channel test MOSFETs with high channel mobility of 27 cm2/(volt·sec) in 4H-SiC with power devices of 13 cm2/(volt·sec) on the same chip has been demonstrated. The Figure of Merit Vblock 2/Ron,sp for this new NON-RESURF LDMOSFET in 4H-SiC is close to the theoretical limit for vertical power devices made of silicon. The specific on-resistance can be reduced by factor 2.5 by forward-biasing the p-base to source junction by 2 to 3 volts. Basic operation in Static Induction Injection Accumulation FET (SIAFET) mode has been demonstrated. Lateral (Non-Punch-Through) Insulated Gate Bipolar Transistors (LIGBT) have been presented for the first time showing similar on-resistance and blocking voltages but significantly higher on-currents for both 4H and 6H-SiC devices compared to their MOSFET counterparts. Test p-i-n diodes show lower on-resistance by carrier injection into the drift region.

Proposal for fabrication-tolerant SOI polarization splitter-rotator based on cascaded MMI couplers and an assisted bi-level taper

PubMed Central

Wang, Jing; Qi, Minghao; Xuan, Yi; Huang, Haiyang; Li, You; Li, Ming; Chen, Xin; Jia, Qi; Sheng, Zhen; Wu, Aimin; Li, Wei; Wang, Xi; Zou, Shichang; Gan, Fuwan

2014-01-01

A novel silicon-on-insulator (SOI) polarization splitter-rotator (PSR) with a large fabrication tolerance is proposed based on cascaded multimode interference (MMI) couplers and an assisted mode-evolution taper. The tapers are designed to adiabatically convert the input TM0 mode into the TE1 mode, which will output as the TE0 mode after processed by the subsequent MMI mode converter, 90-degree phase shifter (PS) and MMI 3 dB coupler. The numerical simulation results show that the proposed device has a < 0.5 dB insertion loss with < −17 dB crosstalk in C optical communication band. Fabrication tolerance analysis is also performed with respect to the deviations of MMI coupler width, PS width, slab height and upper-cladding refractive index, showing that this device could work well even when affected by considerable fabrication errors. With such a robust performance with a large bandwidth, this device offers potential applications for CMOS-compatible polarization diversity, especially in the booming 100 Gb/s coherent optical communications based on silicon photonics technology. PMID:25402029

Proposal for fabrication-tolerant SOI polarization splitter-rotator based on cascaded MMI couplers and an assisted bi-level taper.

PubMed

Wang, Jing; Qi, Minghao; Xuan, Yi; Huang, Haiyang; Li, You; Li, Ming; Chen, Xin; Jia, Qi; Sheng, Zhen; Wu, Aimin; Li, Wei; Wang, Xi; Zou, Shichang; Gan, Fuwan

2014-11-17

A novel silicon-on-insulator (SOI) polarization splitter-rotator (PSR) with a large fabrication tolerance is proposed based on cascaded multimode interference (MMI) couplers and an assisted mode-evolution taper. The tapers are designed to adiabatically convert the input TM(0) mode into the TE(1) mode, which will output as the TE(0) mode after processed by the subsequent MMI mode converter, 90-degree phase shifter (PS) and MMI 3 dB coupler. The numerical simulation results show that the proposed device has a < 0.5 dB insertion loss with < -17 dB crosstalk in C optical communication band. Fabrication tolerance analysis is also performed with respect to the deviations of MMI coupler width, PS width, slab height and upper-cladding refractive index, showing that this device could work well even when affected by considerable fabrication errors. With such a robust performance with a large bandwidth, this device offers potential applications for CMOS-compatible polarization diversity, especially in the booming 100 Gb/s coherent optical communications based on silicon photonics technology.

Deformable devices with integrated functional nanomaterials for wearable electronics.

PubMed

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-01-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

Deformable devices with integrated functional nanomaterials for wearable electronics

NASA Astrophysics Data System (ADS)

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-03-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

High-k dielectric Al2O3 nanowire and nanoplate field effect sensors for improved pH sensing

PubMed Central

Reddy, Bobby; Dorvel, Brian R.; Go, Jonghyun; Nair, Pradeep R.; Elibol, Oguz H.; Credo, Grace M.; Daniels, Jonathan S.; Chow, Edmond K. C.; Su, Xing; Varma, Madoo; Alam, Muhammad A.

2011-01-01

Over the last decade, field-effect transistors (FETs) with nanoscale dimensions have emerged as possible label-free biological and chemical sensors capable of highly sensitive detection of various entities and processes. While significant progress has been made towards improving their sensitivity, much is yet to be explored in the study of various critical parameters, such as the choice of a sensing dielectric, the choice of applied front and back gate biases, the design of the device dimensions, and many others. In this work, we present a process to fabricate nanowire and nanoplate FETs with Al2O3 gate dielectrics and we compare these devices with FETs with SiO2 gate dielectrics. The use of a high-k dielectric such as Al2O3 allows for the physical thickness of the gate dielectric to be thicker without losing sensitivity to charge, which then reduces leakage currents and results in devices that are highly robust in fluid. This optimized process results in devices stable for up to 8 h in fluidic environments. Using pH sensing as a benchmark, we show the importance of optimizing the device bias, particularly the back gate bias which modulates the effective channel thickness. We also demonstrate that devices with Al2O3 gate dielectrics exhibit superior sensitivity to pH when compared to devices with SiO2 gate dielectrics. Finally, we show that when the effective electrical silicon channel thickness is on the order of the Debye length, device response to pH is virtually independent of device width. These silicon FET sensors could become integral components of future silicon based Lab on Chip systems. PMID:21203849

High-responsivity vertical-illumination Si/Ge uni-traveling-carrier photodiodes based on silicon-on-insulator substrate.

PubMed

Li, Chong; Xue, ChunLai; Liu, Zhi; Cong, Hui; Cheng, Buwen; Hu, Zonghai; Guo, Xia; Liu, Wuming

2016-06-09

Si/Ge uni-traveling carrier photodiodes exhibit higher output current when space-charge effect is overcome and the thermal effects is suppressed. High current is beneficial for increasing the dynamic range of various microwave photonic systems and simplifying high-bit-rate digital receivers in many applications. From the point of view of packaging, detectors with vertical-illumination configuration can be easily handled by pick-and-place tools and are a popular choice for making photo-receiver modules. However, vertical-illumination Si/Ge uni-traveling carrier (UTC) devices suffer from inter-constraint between high speed and high responsivity. Here, we report a high responsivity vertical-illumination Si/Ge UTC photodiode based on a silicon-on-insulator substrate. When the transmission of the monolayer anti-reflection coating was maximum, the maximum absorption efficiency of the devices was 1.45 times greater than the silicon substrate owing to constructive interference. The Si/Ge UTC photodiode had a dominant responsivity at 1550 nm of 0.18 A/W, a 50% improvement even with a 25% thinner Ge absorption layer.

Monolithic integration of elliptic-symmetry diffractive optical element on silicon-based 45 degrees micro-reflector.

PubMed

Lan, Hsiao-Chin; Hsiao, Hsu-Liang; Chang, Chia-Chi; Hsu, Chih-Hung; Wang, Chih-Ming; Wu, Mount-Learn

2009-11-09

A monolithically integrated micro-optical element consisting of a diffractive optical element (DOE) and a silicon-based 45 degrees micro-reflector is experimentally demonstrated to facilitate the optical alignment of non-coplanar fiber-to-fiber coupling. The slanted 45 degrees reflector with a depth of 216 microm is fabricated on a (100) silicon wafer by anisotropic wet etching. The DOE with a diameter of 174.2 microm and a focal length of 150 microm is formed by means of dry etching. Such a compact device is suitable for the optical micro-system to deflect the incident light by 90 degrees and to focus it on the image plane simultaneously. The measured light pattern with a spot size of 15 microm has a good agreement with the simulated result of the elliptic-symmetry DOE with an off-axis design for eliminating the strongly astigmatic aberration. The coupling efficiency is enhanced over 10-folds of the case without a DOE on the 45 degrees micro-reflector. This device would facilitate the optical alignment of non-coplanar light coupling and further miniaturize the volume of microsystem.

High-responsivity vertical-illumination Si/Ge uni-traveling-carrier photodiodes based on silicon-on-insulator substrate

PubMed Central

Li, Chong; Xue, ChunLai; Liu, Zhi; Cong, Hui; Cheng, Buwen; Hu, Zonghai; Guo, Xia; Liu, Wuming

2016-01-01

Si/Ge uni-traveling carrier photodiodes exhibit higher output current when space-charge effect is overcome and the thermal effects is suppressed. High current is beneficial for increasing the dynamic range of various microwave photonic systems and simplifying high-bit-rate digital receivers in many applications. From the point of view of packaging, detectors with vertical-illumination configuration can be easily handled by pick-and-place tools and are a popular choice for making photo-receiver modules. However, vertical-illumination Si/Ge uni-traveling carrier (UTC) devices suffer from inter-constraint between high speed and high responsivity. Here, we report a high responsivity vertical-illumination Si/Ge UTC photodiode based on a silicon-on-insulator substrate. When the transmission of the monolayer anti-reflection coating was maximum, the maximum absorption efficiency of the devices was 1.45 times greater than the silicon substrate owing to constructive interference. The Si/Ge UTC photodiode had a dominant responsivity at 1550 nm of 0.18 A/W, a 50% improvement even with a 25% thinner Ge absorption layer. PMID:27279426

Study of silicone-based materials for the packaging of optoelectronic devices

NASA Astrophysics Data System (ADS)

Lin, Yeong-Her

The first part of this work is to evaluate the main materials used for the packaging of high power light-emitting diodes (LEDs), i.e., the die attach materials, the encapsulant materials, and high color rendering index(CRI) sol-gel composite materials. All of these materials had been discussed the performance, reliability, and issues in high power LED packages. High power white LEDs are created either from blue or near-ultraviolet chips encapsulated with a yellow phosphor, or from red-green-blue LED light mixing systems. The phosphor excited by blue LED chip was mostly used in experiment of this dissertation. The die attach materials contains filler particles possessing a maximum particle size less than 1.5 mum in diameter blended with epoxy polymer matrix. Such compositions enable thin bond line thickness, which decreases thermal resistance that exists between thermal interface materials and the corresponding mating surfaces. The thermal conductivity of nano silver die attach materials is relatively low, the thermal resistance from the junction to board is just 1.6 KW-1 in the bond line thickness of 5.3 mum, which is much lower than the thermal resistance using conventional die attach materials. The silicone die attach adhesive made in the lab cures through the free radical reaction of epoxy-functional organopolysiloxane and through the hydrosilylation reaction between alkenyl-functional organopolysiloxane and silicone-boned hydrogen-functional organopolysiloxane. By the combination of the free radical reaction and the hydrosilylation reaction, the low-molecular-weight silicone oil will not be out-migrated and not contaminate wire bondability to the LED chip and lead frame. Hence, the silicone die attach adhesive made in the lab can pass all reliability tests, such as operating life test JEDEC 85°C/85RH and room temperature operating life test. For LED encapsulating materials, most of commercial silicone encapsulants still suffer thermal/radiation induced degradations, and thus cause reliability issues and shorten the lifetime. A new high performance silicone has been developed and its performance has been compared with other commercial silicone products in the packaging of high power white LEDs. The high performance silicone also has better results than commercial high refractive index silicone and optical grade epoxy under JEDEC reliability standard for moisture sensitivity test. In synthesis of red dye-doped particles by sol-gel method, it is a novel method to get high color rendering index (CRI) LEDs. These red dye-doped particles, with average diameter of 5 mum, can be mixed with liquid encapsulants to form a uniform distribution in polymer matrix. The red dye-doped particles can be excited by phosphor-emitted yellow light instead of blue light from LED chip. Therefore, warm white LEDs with high CRI can be gotten at high lumen efficiency. The second part of this work is silicone elastomer for biomedical applications, especially in making urological implantable devices. A cross-linked, heat curable, addition-reaction silicone material is prepared. The material may be molded or formed into one or more medical devices. One such medical device could be a catheter used in urological applications. The material is a long term indwelling material that resists encrustation like a metal stent, but is more comfortable because it is silicone-based. The material can be made relatively cheaply compared to metal stents. Furthermore, the material is biocompatible with bladder epithelial cells.

Nanostructure iron-silicon thin film deposition using plasma focus device

NASA Astrophysics Data System (ADS)

Kotb, M.; Saudy, A. H.; Hassaballa, S.; Eloker, M. M.

2013-03-01

The presented study in this paper reports the deposition of nano-structure iron-silicon thin film on a glass substrate using 3.3 KJ Mather-type plasma focus device. The iron-silicon powder was put on the top of hollow copper anode electrode. The deposition was done under different experimental conditions such as numbers of electric discharge shots and angular position of substrate. The film samples were exposed to energetic argon ions generated by plasma focus device at different distances from the top of the central electrode. The exposed samples were then analyzed for their structure and optical properties using X-ray diffraction (XRD) and UV-visible spectroscopy. The structure of iron-silicon thin films deposited using plasma focus device depends on the distance from the anode, the number of focus deposition shots and the angular position of the sample

In situ arsenic-doped polycrystalline silicon as a low thermal budget emitter contact for Si/Si1 - xGex heterojunction bipolar transistors

NASA Astrophysics Data System (ADS)

King, C. A.; Johnson, R. W.; Pinto, M. R.; Luftman, H. S.; Munanka, J.

1996-01-01

A low thermal budget emitter contact with low specific contact resistivity (ρc) with the absence of transient enhanced diffusion (TED) effects is essential to fabricate integratable high performance Si/SiGe heterojunction bipolar transistors (HBTs). We report the use of in situ As-doped polycrystalline silicon (polysilicon) from a low base pressure rapid thermal episystem for this purpose and find that it meets all the requirements. We used secondary ion mass spectrometry to find that 18 nm, heavily B-doped layers remain intact after implantation into the surface polysilicon and annealing at 800 °C for 40 s. Similar samples without the surface polylayer displayed extreme broadening of B profile. Kelvin crossbridge resistors together with 2D device simulations revealed that ρc is an extremely low value of 1.2×10-8 Ω cm2 in as-deposited material. Fabrication of simple 30×30 μm2 mesa isolated HBT devices showed IC to be more than two decades higher in devices with only an in situ As-doped polyemitter compared with devices that incorporated a surface implant into the single crystal portion of the emitter before polysilicon deposition. These results demonstrate that this doped polycrystalline silicon material is an excellent choice for emitter contacts to HBT devices.

Silicone metalization

DOEpatents

Maghribi, Mariam N [Livermore, CA; Krulevitch, Peter [Pleasanton, CA; Hamilton, Julie [Tracy, CA

2006-12-05

A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

Silicone metalization

DOEpatents

Maghribi, Mariam N.; Krulevitch, Peter; Hamilton, Julie

2008-12-09

A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

Novel method for measurement of transistor gate length using energy-filtered transmission electron microscopy

NASA Astrophysics Data System (ADS)

Lee, Sungho; Kim, Tae-Hoon; Kang, Jonghyuk; Yang, Cheol-Woong

2016-12-01

As the feature size of devices continues to decrease, transmission electron microscopy (TEM) is becoming indispensable for measuring the critical dimension (CD) of structures. Semiconductors consist primarily of silicon-based materials such as silicon, silicon dioxide, and silicon nitride, and the electrons transmitted through a plan-view TEM sample provide diverse information about various overlapped silicon-based materials. This information is exceedingly complex, which makes it difficult to clarify the boundary to be measured. Therefore, we propose a simple measurement method using energy-filtered TEM (EF-TEM). A precise and effective measurement condition was obtained by determining the maximum value of the integrated area ratio of the electron energy loss spectrum at the boundary to be measured. This method employs an adjustable slit allowing only electrons with a certain energy range to pass. EF-TEM imaging showed a sharp transition at the boundary when the energy-filter’s passband centre was set at 90 eV, with a slit width of 40 eV. This was the optimum condition for the CD measurement of silicon-based materials involving silicon nitride. Electron energy loss spectroscopy (EELS) and EF-TEM images were used to verify this method, which makes it possible to measure the transistor gate length in a dynamic random access memory manufactured using 35 nm process technology. This method can be adapted to measure the CD of other non-silicon-based materials using the EELS area ratio of the boundary materials.

Silicon photonics fiber-to-the-home transceiver array based on transfer-printing-based integration of III-V photodetectors.

PubMed

Zhang, Jing; De Groote, Andreas; Abbasi, Amin; Loi, Ruggero; O'Callaghan, James; Corbett, Brian; Trindade, António José; Bower, Christopher A; Roelkens, Gunther

2017-06-26

A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-to-the-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O-band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 - 0.49 A/W in the O-band. The integrated PDs (30 × 40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C-band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

Periodic silicon nanostructures for spectroscopic microsensors

NASA Astrophysics Data System (ADS)

Wehrspohn, Ralf B.; Gesemann, Benjamin; Pergande, Daniel; Geppert, Torsten M.; Schweizer, Stefan L.; Moretton, Susanne; Lambrecht, Armin

2011-09-01

Periodic silicon nanostructures can be used for different kinds of gas sensors depending on the analyte concentration. First we present an optical gas sensor based on the classical non-dispersive infrared technique for ppm-concentration using ultra-compact photonic crystal gas cells. It is conceptually based on low group velocities inside a photonic crystal gas cell and anti-reflection layers coupling light into the device. Experimentally, an enhancement of the CO2 infrared absorption by a factor of 2.6 to 3.5 as compared to an empty cell, due to slow light inside a 2D silicon photonic crystal gas cell, was observed; this is in excellent agreement with numerical simulations. In addition we report on silicon nanotip arrays, suitable for gas ionization in ion mobility microspectrometers (micro-IMS) having detection ranges in principle down to the ppt-range. Such instruments allow the detection of explosives, chemical warfare agents, and illicit drugs, e.g., at airports. We describe the fabrication process of large-scale-ordered nanotips with different tip shapes. Both silicon microstructures have been fabricated by photoelectrochemical etching of silicon.

Economic analysis of crystal growth in space

NASA Technical Reports Server (NTRS)

Ulrich, D. R.; Chung, A. M.; Yan, C. S.; Mccreight, L. R.

1972-01-01

Many advanced electronic technologies and devices for the 1980's are based on sophisticated compound single crystals, i.e. ceramic oxides and compound semiconductors. Space processing of these electronic crystals with maximum perfection, purity, and size is suggested. No ecomonic or technical justification was found for the growth of silicon single crystals for solid state electronic devices in space.

A Silicon-Chip Source of Bright Photon-Pair Comb

DTIC Science & Technology

2012-10-16

A silicon -chip source of bright photon-pair comb Wei C. Jiang,1, ∗ Xiyuan Lu,2, ∗ Jidong Zhang,3 Oskar Painter,4 and Qiang Lin1, 3, † 1Institute of...efficient monolithic photon-pair source for on-chip application. Here we report a device on the silicon -on-insulator platform that utilizes dramatic cavity...enhanced four-wave mixing in a high-Q silicon microdisk resonator. The device is able to produce high-purity photon pairs in a comb fashion, with an

The Impact of GaN/Substrate Thermal Boundary Resistance on a HEMT Device

DTIC Science & Technology

2011-11-01

stack between the GaN and Substrate layers. The University of Bristol recently reported that this TBR in commercial devices on Silicon Carbide ( SiC ...Circuit RF Radio Frequency PA Power Amplifier SiC Silicon Carbide FEA Finite Element Analysis heff Effective Heat transfer Coefficient (W/m 2 K...substrate material switched from sapphire to silicon , and by another factor of two from silicon to SiC . TABLE 1: SAMPLE RESULTS FROM DOUGLAS ET AL. FOR

Thermally tunable silicon racetrack resonators with ultralow tuning power.

PubMed

Dong, Po; Qian, Wei; Liang, Hong; Shafiiha, Roshanak; Feng, Dazeng; Li, Guoliang; Cunningham, John E; Krishnamoorthy, Ashok V; Asghari, Mehdi

2010-09-13

We present thermally tunable silicon racetrack resonators with an ultralow tuning power of 2.4 mW per free spectral range. The use of free-standing silicon racetrack resonators with undercut structures significantly enhances the tuning efficiency, with one order of magnitude improvement of that for previously demonstrated thermo-optic devices without undercuts. The 10%-90% switching time is demonstrated to be ~170 µs. Such low-power tunable micro-resonators are particularly useful as multiplexing devices and wavelength-tunable silicon microcavity modulators.

A polymer-based Fabry-Perot filter integrated with 3-D MEMS structures

NASA Astrophysics Data System (ADS)

Zhang, Ping (Cerina); Le, Kevin; Malalur-Nagaraja-Rao, Smitha; Hsu, Lun-Chen; Chiao, J.-C.

2006-01-01

Polymers have been considered as one of the most versatile materials in making optical devices for communication and sensor applications. They provide good optical transparency to form filters, lenses and many optical components with ease of fabrication. They are scalable and compatible in dimensions with requirements in optics and can be fabricated on inorganic substrates, such as silicon and quartz. Recent polymer synthesis also made great progresses on conductive and nonlinear polymers, opening opportunities for new applications. In this paper, we discussed hybrid-material integration of polymers on silicon-based microelectromechanical system (MEMS) devices. The motivation is to combine the advantages of demonstrated silicon-based MEMS actuators and excellent optical performance of polymers. We demonstrated the idea with a polymer-based out-of-plane Fabry-Perot filter that can be self-assembled by scratch drive actuators. We utilized a fabrication foundry service, MUMPS (Multi-User MEMS Process), to demonstrate the feasibility and flexibility of integration. The polysilicon, used as the structural material for construction of 3-D framework and actuators, has high absorption in the visible and near infrared ranges. Therefore, previous efforts using a polysilicon layer as optical interfaces suffer from high losses. We applied the organic compound materials on the silicon-based framework within the optical signal propagation path to form the optical interfaces. In this paper, we have shown low losses in the optical signal processing and feasibility of building a thin-film Fabry-Perot filter. We discussed the optical filter designs, mechanical design, actuation mechanism, fabrication issues, optical measurements, and results.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Yanhong; Gao, Ping; Bi, Kaifeng

Conducting pathway of percolation network was identified in resistive switching devices (RSDs) with the structure of silver/amorphous silicon/p-type silicon (Ag/a-Si/p-Si) based on its gradual RESET-process and the stochastic complex impedance spectroscopy characteristics (CIS). The formation of the percolation network is attributed to amounts of nanocrystalline Si particles as well as defect sites embedded in a-Si layer, in which the defect sites supply positions for Ag ions to nucleate and grow. The similar percolation network has been only observed in Ag-Ge-Se based RSD before. This report provides a better understanding for electric properties of RSD based on the percolation network.

Silicon photonic transceiver circuit for high-speed polarization-based discrete variable quantum key distribution

DOE PAGES

Cai, Hong; Long, Christopher M.; DeRose, Christopher T.; ...

2017-01-01

We demonstrate a silicon photonic transceiver circuit for high-speed discrete variable quantum key distribution that employs a common structure for transmit and receive functions. The device is intended for use in polarization-based quantum cryptographic protocols, such as BB84. Our characterization indicates that the circuit can generate the four BB84 states (TE/TM/45°/135° linear polarizations) with >30 dB polarization extinction ratios and gigabit per second modulation speed, and is capable of decoding any polarization bases differing by 90° with high extinction ratios.

Silicon photonic transceiver circuit for high-speed polarization-based discrete variable quantum key distribution.

PubMed

Cai, Hong; Long, Christopher M; DeRose, Christopher T; Boynton, Nicholas; Urayama, Junji; Camacho, Ryan; Pomerene, Andrew; Starbuck, Andrew L; Trotter, Douglas C; Davids, Paul S; Lentine, Anthony L

2017-05-29

We demonstrate a silicon photonic transceiver circuit for high-speed discrete variable quantum key distribution that employs a common structure for transmit and receive functions. The device is intended for use in polarization-based quantum cryptographic protocols, such as BB84. Our characterization indicates that the circuit can generate the four BB84 states (TE/TM/45°/135° linear polarizations) with >30 dB polarization extinction ratios and gigabit per second modulation speed, and is capable of decoding any polarization bases differing by 90° with high extinction ratios.

Silicon photonic transceiver circuit for high-speed polarization-based discrete variable quantum key distribution

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cai, Hong; Long, Christopher M.; DeRose, Christopher T.

We demonstrate a silicon photonic transceiver circuit for high-speed discrete variable quantum key distribution that employs a common structure for transmit and receive functions. The device is intended for use in polarization-based quantum cryptographic protocols, such as BB84. Our characterization indicates that the circuit can generate the four BB84 states (TE/TM/45°/135° linear polarizations) with >30 dB polarization extinction ratios and gigabit per second modulation speed, and is capable of decoding any polarization bases differing by 90° with high extinction ratios.

An all-silicon passive optical diode.

PubMed

Fan, Li; Wang, Jian; Varghese, Leo T; Shen, Hao; Niu, Ben; Xuan, Yi; Weiner, Andrew M; Qi, Minghao

2012-01-27

A passive optical diode effect would be useful for on-chip optical information processing but has been difficult to achieve. Using a method based on optical nonlinearity, we demonstrate a forward-backward transmission ratio of up to 28 decibels within telecommunication wavelengths. Our device, which uses two silicon rings 5 micrometers in radius, is passive yet maintains optical nonreciprocity for a broad range of input power levels, and it performs equally well even if the backward input power is higher than the forward input. The silicon optical diode is ultracompact and is compatible with current complementary metal-oxide semiconductor processing.

A phononic crystal strip based on silicon for support tether applications in silicon-based MEMS resonators and effects of temperature and dopant on its band gap characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ha, Thi Dep, E-mail: hathidep@yahoo.com; Faculty of Electronic Technology, Industrial University of Ho Chi Minh City, Hochiminh City; Bao, JingFu, E-mail: baojingfu@uestc.edu.cn

Phononic crystals (PnCs) and n-type doped silicon technique have been widely employed in silicon-based MEMS resonators to obtain high quality factor (Q) as well as temperature-induced frequency stability. For the PnCs, their band gaps play an important role in the acoustic wave propagation. Also, the temperature and dopant doped into silicon can cause the change in its material properties such as elastic constants, Young’s modulus. Therefore, in order to design the simultaneous high Q and frequency stability silicon-based MEMS resonators by two these techniques, a careful design should study effects of temperature and dopant on the band gap characteristics tomore » examine the acoustic wave propagation in the PnC. Based on these, this paper presents (1) a proposed silicon-based PnC strip structure for support tether applications in low frequency silicon-based MEMS resonators, (2) influences of temperature and dopant on band gap characteristics of the PnC strips. The simulation results show that the largest band gap can achieve up to 33.56 at 57.59 MHz and increase 1280.13 % (also increase 131.89 % for ratio of the widest gaps) compared with the counterpart without hole. The band gap properties of the PnC strips is insignificantly effected by temperature and electron doping concentration. Also, the quality factor of two designed length extensional mode MEMS resonators with proposed PnC strip based support tethers is up to 1084.59% and 43846.36% over the same resonators with PnC strip without hole and circled corners, respectively. This theoretical study uses the finite element analysis in COMSOL Multiphysics and MATLAB softwares as simulation tools. This findings provides a background in combination of PnC and dopant techniques for high performance silicon-based MEMS resonators as well as PnC-based MEMS devices.« less

Micromachined ultrasonic droplet generator based on a liquid horn structure

NASA Astrophysics Data System (ADS)

Meacham, J. M.; Ejimofor, C.; Kumar, S.; Degertekin, F. L.; Fedorov, A. G.

2004-05-01

A micromachined ultrasonic droplet generator is developed and demonstrated for drop-on-demand fluid atomization. The droplet generator comprises a bulk ceramic piezoelectric transducer for ultrasound generation, a reservoir for the ejection fluid, and a silicon micromachined liquid horn structure as the nozzle. The nozzles are formed using a simple batch microfabrication process that involves wet etching of (100) silicon in potassium hydroxide solution. Device operation is demonstrated by droplet ejection of water through 30 μm orifices at 1.49 and 2.30 MHz. The finite-element simulations of the acoustic fields in the cavity and electrical impedance of the device are in agreement with the measurements and indicate that the device utilizes cavity resonances in the 1-5 MHz range in conjunction with acoustic wave focusing by the pyramidally shaped nozzles to achieve low power operation.

High-speed detection at two micrometres with monolithic silicon photodiodes

NASA Astrophysics Data System (ADS)

Ackert, Jason J.; Thomson, David J.; Shen, Li; Peacock, Anna C.; Jessop, Paul E.; Reed, Graham T.; Mashanovich, Goran Z.; Knights, Andrew P.

2015-06-01

With continued steep growth in the volume of data transmitted over optical networks there is a widely recognized need for more sophisticated photonics technologies to forestall a ‘capacity crunch’. A promising solution is to open new spectral regions at wavelengths near 2 μm and to exploit the long-wavelength transmission and amplification capabilities of hollow-core photonic-bandgap fibres and the recently available thulium-doped fibre amplifiers. To date, photodetector devices for this window have largely relied on III-V materials or, where the benefits of integration with silicon photonics are sought, GeSn alloys, which have been demonstrated thus far with only limited utility. Here, we describe a silicon photodiode operating at 20 Gbit s-1 in this wavelength region. The detector is compatible with standard silicon processing and is integrated directly with silicon-on-insulator waveguides, which suggests future utility in silicon-based mid-infrared integrated optics for applications in communications.

Study of thickness and uniformity of oxide passivation with DI-O3 on silicon substrate for electronic and photonic applications

NASA Astrophysics Data System (ADS)

Sharma, Mamta; Hazra, Purnima; Singh, Satyendra Kumar

2018-05-01

Since the beginning of semiconductor fabrication technology evolution, clean and passivated substrate surface is one of the prime requirements for fabrication of Electronic and optoelectronic device fabrication. However, as the scale of silicon circuits and device architectures are continuously decreased from micrometer to nanometer (from VLSI to ULSI technology), the cleaning methods to achieve better wafer surface qualities has raised research interests. The development of controlled and uniform silicon dioxide is the most effective and reliable way to achieve better wafer surface quality for fabrication of electronic devices. On the other hand, in order to meet the requirement of high environment safety/regulatory standards, the innovation of cleaning technology is also in demand. The controlled silicon dioxide layer formed by oxidant de-ionized ozonated water has better uniformity. As the uniformity of the controlled silicon dioxide layer is improved on the substrate, it enhances the performance of the devices. We can increase the thickness of oxide layer, by increasing the ozone time treatment. We reported first time to measurement of thickness of controlled silicon dioxide layer and obtained the uniform layer for same ozone time.

Silicon photonics and challenges for fabrication

NASA Astrophysics Data System (ADS)

Feilchenfeld, N. B.; Nummy, K.; Barwicz, T.; Gill, D.; Kiewra, E.; Leidy, R.; Orcutt, J. S.; Rosenberg, J.; Stricker, A. D.; Whiting, C.; Ayala, J.; Cucci, B.; Dang, D.; Doan, T.; Ghosal, M.; Khater, M.; McLean, K.; Porth, B.; Sowinski, Z.; Willets, C.; Xiong, C.; Yu, C.; Yum, S.; Giewont, K.; Green, W. M. J.

2017-03-01

Silicon photonics is rapidly becoming the key enabler for meeting the future data speed and volume required by the Internet of Things. A stable manufacturing process is needed to deliver cost and yield expectations to the technology marketplace. We present the key challenges and technical results from both 200mm and 300mm facilities for a silicon photonics fabrication process which includes monolithic integration with CMOS. This includes waveguide patterning, optical proximity correction for photonic devices, silicon thickness uniformity and thick material patterning for passive fiber to waveguide alignment. The device and process metrics show that the transfer of the silicon photonics process from 200mm to 300mm will provide a stable high volume manufacturing platform for silicon photonics designs.

Flexural plate wave devices fabricated from silicon carbide membrane

NASA Astrophysics Data System (ADS)

Diagne, Ndeye Fama

Flexural Plate Wave (FPW) devices fabricated from Silicon Carbide (SiC) membranes are presented here which exhibit electrical and mechanical characteristics in its transfer functions that makes it very useful as a low voltage probe device capable of functioning in small areas that are commonly inaccessible to ordinary devices. The low input impedance characteristic of this current driven device makes it possible for it to operate at very low voltages, thereby reducing the hazards for flammable or explosive areas to be probed. The Flexural Plate Wave (FPW) devices are of a family of gravimetric type sensors that permit direct measurements of the mass of the vibrating element. The primary objective was to study the suitability of Silicon Carbide (SiC) membranes as a replacement of Silicon Nitride (SiN) membrane in flexural plate wave devices developed by Sandia National Laboratories. Fabrication of the Flexural Plate Wave devices involves the overlaying a silicon wafer with membranes of 3C-SiC thin film upon which conducting meander lines are placed. The input excitation energy is in the form of an input current. The lines of current along the direction of the conducting Meander Lines Transducer (MLTs) and the applied perpendicular external magnetic field set up a mechanical wave perpendicular to both, exciting the membrane by means of a Lorentz force, which in turn sets up flexural waves that propagate along the thin membrane. The physical dimensions, the mass density, the tension in the membrane and the meander spacing are physical characteristics that determine resonance frequency of the Flexural Plate Wave (FPW) device. Of primary interest is the determination of the resonant frequency of the silicon carbide membrane as functions of the device physical characteristic parameters. The appropriate transduction scheme with Meander Line Transducers (IDTs) are used to excite the membrane. Equivalent circuit models characterizing the reflection response S11 (amplitude and phase) for a one-port Flexural PlateWave device and the transmission response S21 of a two-port device are used for the development of the equivalent mechanical characteristics.

High-Content Optical Codes for Protecting Rapid Diagnostic Tests from Counterfeiting.

PubMed

Gökçe, Onur; Mercandetti, Cristina; Delamarche, Emmanuel

2018-06-19

Warnings and reports on counterfeit diagnostic devices are released several times a year by regulators and public health agencies. Unfortunately, mishandling, altering, and counterfeiting point-of-care diagnostics (POCDs) and rapid diagnostic tests (RDTs) is lucrative, relatively simple and can lead to devastating consequences. Here, we demonstrate how to implement optical security codes in silicon- and nitrocellulose-based flow paths for device authentication using a smartphone. The codes are created by inkjet spotting inks directly on nitrocellulose or on micropillars. Codes containing up to 32 elements per mm 2 and 8 colors can encode as many as 10 45 combinations. Codes on silicon micropillars can be erased by setting a continuous flow path across the entire array of code elements or for nitrocellulose by simply wicking a liquid across the code. Static or labile code elements can further be formed on nitrocellulose to create a hidden code using poly(ethylene glycol) (PEG) or glycerol additives to the inks. More advanced codes having a specific deletion sequence can also be created in silicon microfluidic devices using an array of passive routing nodes, which activate in a particular, programmable sequence. Such codes are simple to fabricate, easy to view, and efficient in coding information; they can be ideally used in combination with information on a package to protect diagnostic devices from counterfeiting.

Technological processes of grating light valve as diffractive spatial light modulator in laser phototypesetting system

NASA Astrophysics Data System (ADS)

Zhang, Wei; Geng, Yu; Hou, Changlun; Yang, Guoguang; Bai, Jian

2008-11-01

Grating Light Valve (GLV) is a kind of optics device based on Micro-Opto-Electro-Mechanical System (MOEMS) technology, utilizing diffraction principle to switch, attenuate and modulate light. In this paper, traditional GLV device's structure and its working principle are illuminated, and a kind of modified GLV structure is presented, with details introduction of the fabrication technology. The GLV structure includes single crystal silicon substrate, silicon dioxide isolating layer, aluminum layer of fixed ribbons and silicon nitride of movable ribbons. In the fabrication, lots of techniques are adopted, such as low-pressure chemical vapor deposition (LPCVD), photolithography, etching and evaporation. During the fabrication processes, Photolithography is a fundamental and fatal technology, which determines etching result and GLV quality. Some methods are proposed through repeated experiments, to improve etching result greatly and guide the practical application. This kind of GLV device can be made both small and inexpensively, and has been tested to show proper range of actuation under DC bias, with good performance. The GLV device also has merits such as low cost, simple technology, high fill ratio and low driving voltage. It can properly be well used and match the demands of high light power needed in laser phototypesetting system, as a high-speed, high-resolution light modulator.

Lithographic wavelength control of an external cavity laser with a silicon photonic crystal cavity-based resonant reflector.

PubMed

Liles, Alexandros A; Debnath, Kapil; O'Faolain, Liam

2016-03-01

We report the experimental demonstration of a new design for external cavity hybrid lasers consisting of a III-V semiconductor optical amplifier (SOA) with fiber reflector and a photonic crystal (PhC)-based resonant reflector on SOI. The silicon reflector is composed of an SU8 polymer bus waveguide vertically coupled to a PhC cavity and provides a wavelength-selective optical feedback to the laser cavity. This device exhibits milliwatt-level output power and side-mode suppression ratios of more than 25 dB.

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

NASA Astrophysics Data System (ADS)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

Valley splitting of single-electron Si MOS quantum dots

DOE PAGES

Gamble, John King; Harvey-Collard, Patrick; Jacobson, N. Tobias; ...

2016-12-19

Here, silicon-based metal-oxide-semiconductor quantum dots are prominent candidates for high-fidelity, manufacturable qubits. Due to silicon's band structure, additional low-energy states persist in these devices, presenting both challenges and opportunities. Although the physics governing these valley states has been the subject of intense study, quantitative agreement between experiment and theory remains elusive. Here, we present data from an experiment probing the valley states of quantum dot devices and develop a theory that is in quantitative agreement with both this and a recently reported experiment. Through sampling millions of realistic cases of interface roughness, our method provides evidence that the valley physicsmore » between the two samples is essentially the same.« less

Mechanics of finger-tip electronics

NASA Astrophysics Data System (ADS)

Su, Yewang; Li, Rui; Cheng, Huanyu; Ying, Ming; Bonifas, Andrew P.; Hwang, Keh-Chih; Rogers, John A.; Huang, Yonggang

2013-10-01

Tactile sensors and electrotactile stimulators can provide important links between humans and virtual environments, through the sensation of touch. Soft materials, such as low modulus silicones, are attractive as platforms and support matrices for arrays sensors and actuators that laminate directly onto the fingertips. Analytic models for the mechanics of three dimensional, form-fitting finger cuffs based on such designs are presented here, along with quantitative validation using the finite element method. The results indicate that the maximum strains in the silicone and the embedded devices are inversely proportional to the square root of radius of curvature of the cuff. These and other findings can be useful in formulating designs for these and related classes of body-worn, three dimensional devices.

Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

NASA Astrophysics Data System (ADS)

Buettel, G.; Joppich, J.; Hartmann, U.

2017-12-01

Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

Improved Starting Materials for Back-Illuminated Imagers

NASA Technical Reports Server (NTRS)

Pain, Bedabrata

2009-01-01

An improved type of starting materials for the fabrication of silicon-based imaging integrated circuits that include back-illuminated photodetectors has been conceived, and a process for making these starting materials is undergoing development. These materials are intended to enable reductions in dark currents and increases in quantum efficiencies, relative to those of comparable imagers made from prior silicon-on-insulator (SOI) starting materials. Some background information is prerequisite to a meaningful description of the improved starting materials and process. A prior SOI starting material, depicted in the upper part the figure, includes: a) A device layer on the front side, typically between 2 and 20 m thick, made of p-doped silicon (that is, silicon lightly doped with an electron acceptor, which is typically boron); b) A buried oxide (BOX) layer (that is, a buried layer of oxidized silicon) between 0.2 and 0.5 m thick; and c) A silicon handle layer (also known as a handle wafer) on the back side, between about 600 and 650 m thick. After fabrication of the imager circuitry in and on the device layer, the handle wafer is etched away, the BOX layer acting as an etch stop. In subsequent operation of the imager, light enters from the back, through the BOX layer. The advantages of back illumination over front illumination have been discussed in prior NASA Tech Briefs articles.

Heavily Boron-Doped Silicon Layer for the Fabrication of Nanoscale Thermoelectric Devices

PubMed Central

Liu, Yang; Deng, Lingxiao; Zhang, Mingliang; Zhang, Shuyuan; Ma, Jing; Song, Peishuai; Liu, Qing; Ji, An; Yang, Fuhua; Wang, Xiaodong

2018-01-01

Heavily boron-doped silicon layers and boron etch-stop techniques have been widely used in the fabrication of microelectromechanical systems (MEMS). This paper provides an introduction to the fabrication process of nanoscale silicon thermoelectric devices. Low-dimensional structures such as silicon nanowire (SiNW) have been considered as a promising alternative for thermoelectric applications in order to achieve a higher thermoelectric figure of merit (ZT) than bulk silicon. Here, heavily boron-doped silicon layers and boron etch-stop processes for the fabrication of suspended SiNWs will be discussed in detail, including boron diffusion, electron beam lithography, inductively coupled plasma (ICP) etching and tetramethylammonium hydroxide (TMAH) etch-stop processes. A 7 μm long nanowire structure with a height of 280 nm and a width of 55 nm was achieved, indicating that the proposed technique is useful for nanoscale fabrication. Furthermore, a SiNW thermoelectric device has also been demonstrated, and its performance shows an obvious reduction in thermal conductivity. PMID:29385759

A strong electro-optically active lead-free ferroelectric integrated on silicon

NASA Astrophysics Data System (ADS)

Abel, Stefan; Stöferle, Thilo; Marchiori, Chiara; Rossel, Christophe; Rossell, Marta D.; Erni, Rolf; Caimi, Daniele; Sousa, Marilyne; Chelnokov, Alexei; Offrein, Bert J.; Fompeyrine, Jean

2013-04-01

The development of silicon photonics could greatly benefit from the linear electro-optical properties, absent in bulk silicon, of ferroelectric oxides, as a novel way to seamlessly connect the electrical and optical domain. Of all oxides, barium titanate exhibits one of the largest linear electro-optical coefficients, which has however not yet been explored for thin films on silicon. Here we report on the electro-optical properties of thin barium titanate films epitaxially grown on silicon substrates. We extract a large effective Pockels coefficient of reff=148 pm V-1, which is five times larger than in the current standard material for electro-optical devices, lithium niobate. We also reveal the tensor nature of the electro-optical properties, as necessary for properly designing future devices, and furthermore unambiguously demonstrate the presence of ferroelectricity. The integration of electro-optical active films on silicon could pave the way towards power-efficient, ultra-compact integrated devices, such as modulators, tuning elements and bistable switches.

Assessing the potential roles of silicon and germanium phthalocyanines in planar heterojunction organic photovoltaic devices and how pentafluoro phenoxylation can enhance π-π interactions and device performance.

PubMed

Lessard, Benoît H; White, Robin T; Al-Amar, Mohammad; Plint, Trevor; Castrucci, Jeffrey S; Josey, David S; Lu, Zheng-Hong; Bender, Timothy P

2015-03-11

In this study, we have assessed the potential application of dichloro silicon phthalocyanine (Cl2-SiPc) and dichloro germanium phthalocyanine (Cl2-GePc) in modern planar heterojunction organic photovoltaic (PHJ OPV) devices. We have determined that Cl2-SiPc can act as an electron donating material when paired with C60 and that Cl2-SiPc or Cl2-GePc can also act as an electron acceptor material when paired with pentacene. These two materials enabled the harvesting of triplet energy resulting from the singlet fission process in pentacene. However, contributions to the generation of photocurrent were observed for Cl2-SiPc with no evidence of photocurrent contribution from Cl2-GePc. The result of our initial assessment established the potential for the application of SiPc and GePc in PHJ OPV devices. Thereafter, bis(pentafluoro phenoxy) silicon phthalocyanine (F10-SiPc) and bis(pentafluoro phenoxy) germanium phthalocyanine (F10-GePc) were synthesized and characterized. During thermal processing, it was discovered that F10-SiPc and F10-GePc underwent a reaction forming small amounts of difluoro SiPc (F2-SiPc) and difluoro GePc (F2-GePc). This undesirable reaction could be circumvented for F10-SiPc but not for F10-GePc. Using single crystal X-ray diffraction, it was determined that F10-SiPc has significantly enhanced π-π interactions compared with that of Cl2-SiPc, which had little to none. Unoptimized PHJ OPV devices based on F10-SiPc were fabricated and directly compared to those constructed from Cl2-SiPc, and in all cases, PHJ OPV devices based on F10-SiPc had significantly improved device characteristics compared to Cl2-SiPc.

Packaging of silicon photonic devices: from prototypes to production

NASA Astrophysics Data System (ADS)

Morrissey, Padraic E.; Gradkowski, Kamil; Carroll, Lee; O'Brien, Peter

2018-02-01

The challenges associated with the photonic packaging of silicon devices is often underestimated and remains technically challenging. In this paper, we review some key enabling technologies that will allow us to overcome the current bottleneck in silicon photonic packaging; while also describing the recent developments in standardisation, including the establishment of PIXAPP as the worlds first open-access PIC packaging and assembly Pilot Line. These developments will allow the community to move from low volume prototype photonic packaged devices to large scale volume manufacturing, where the full commercialisation of PIC technology can be realised.

Preparation of composite micro/nano structure on the silicon surface by reactive ion etching: Enhanced anti-reflective and hydrophobic properties

NASA Astrophysics Data System (ADS)

Zeng, Yu; Fan, Xiaoli; Chen, Jiajia; He, Siyu; Yi, Zao; Ye, Xin; Yi, Yougen

2018-05-01

A silicon substrate with micro-pyramid structure (black silicon) is prepared by wet chemical etching and then subjected to reactive ion etching (RIE) in the mixed gas condition of SF6, CHF3 and He. We systematically study the impacts of flow rates of SF6, CHF3 and He, the etching pressure and the etching time on the surface morphology and reflectivity through various characterizations. Meanwhile, we explore and obtain the optimal combination of parameters for the preparation of composite structure that match the RIE process based on the basis of micro-pyramid silicon substrate. The composite sample prepared under the optimum parameters exhibits excellent anti-reflective performance, hydrophobic, self-cleaning and anti-corrosive properties. Based on the above characteristics, the composite micro/nano structure can be applied to solar cells, photodetectors, LEDs, outdoor devices and other important fields.

Reflective lens-free imaging on high-density silicon microelectrode arrays for monitoring and evaluation of in vitro cardiac contractility

PubMed Central

Pauwelyn, Thomas; Stahl, Richard; Mayo, Lakyn; Zheng, Xuan; Lambrechts, Andy; Janssens, Stefan; Lagae, Liesbet; Reumers, Veerle; Braeken, Dries

2018-01-01

The high rate of drug attrition caused by cardiotoxicity is a major challenge for drug development. Here, we developed a reflective lens-free imaging (RLFI) approach to non-invasively record in vitro cell deformation in cardiac monolayers with high temporal (169 fps) and non-reconstructed spatial resolution (352 µm) over a field-of-view of maximally 57 mm2. The method is compatible with opaque surfaces and silicon-based devices. Further, we demonstrated that the system can detect the impairment of both contractility and fast excitation waves in cardiac monolayers. Additionally, the RLFI device was implemented on a CMOS-based microelectrode array to retrieve multi-parametric information of cardiac cells, thereby offering more in-depth analysis of drug-induced (cardiomyopathic) effects for preclinical cardiotoxicity screening applications. PMID:29675322

Silicon Carbide Diodes Performance Characterization and Comparison With Silicon Devices

NASA Technical Reports Server (NTRS)

Lebron-Velilla, Ramon C.; Schwarze, Gene E.; Trapp, Scott

2003-01-01

Commercially available silicon carbide (SiC) Schottky diodes from different manufacturers were electrically tested and characterized at room temperature. Performed electrical tests include steady state forward and reverse I-V curves, as well as switching transient tests performed with the diodes operating in a hard switch dc-to-dc buck converter. The same tests were performed in current state of the art silicon (Si) and gallium arsenide (GaAs) Schottky and pn junction devices for evaluation and comparison purposes. The SiC devices tested have a voltage rating of 200, 300, and 600 V. The comparison parameters are forward voltage drop at rated current, reverse current at rated voltage and peak reverse recovery currents in the dc to dc converter. Test results show that steady state characteristics of the tested SiC devices are not superior to the best available Si Schottky and ultra fast pn junction devices. Transient tests reveal that the tested SiC Schottky devices exhibit superior transient behavior. This is more evident at the 300 and 600 V rating where SiC Schottky devices showed drastically lower reverse recovery currents than Si ultra fast pn diodes of similar rating.

Optically efficient InAsSb nanowires for silicon-based mid-wavelength infrared optoelectronics.

PubMed

Zhuang, Q D; Alradhi, H; Jin, Z M; Chen, X R; Shao, J; Chen, X; Sanchez, Ana M; Cao, Y C; Liu, J Y; Yates, P; Durose, K; Jin, C J

2017-03-10

InAsSb nanowires (NWs) with a high Sb content have potential in the fabrication of advanced silicon-based optoelectronics such as infrared photondetectors/emitters and highly sensitive phototransistors, as well as in the generation of renewable electricity. However, producing optically efficient InAsSb NWs with a high Sb content remains a challenge, and optical emission is limited to 4.0 μm due to the quality of the nanowires. Here, we report, for the first time, the success of high-quality and optically efficient InAsSb NWs enabling silicon-based optoelectronics operating in entirely mid-wavelength infrared. Pure zinc-blende InAsSb NWs were realized with efficient photoluminescence emission. We obtained room-temperature photoluminescence emission in InAs NWs and successfully extended the emission wavelength in InAsSb NWs to 5.1 μm. The realization of this optically efficient InAsSb NW material paves the way to realizing next-generation devices, combining advances in III-V semiconductors and silicon.

A hybrid silicon membrane spatial light modulator for optical information processing

NASA Technical Reports Server (NTRS)

Pape, D. R.; Hornbeck, L. J.

1984-01-01

A new two dimensional, fast, analog, electrically addressable, silicon based membrane spatial light modulator (SLM) was developed for optical information processing applications. Coherent light reflected from the mirror elements is phase modulated producing an optical Fourier transform of an analog signal input to the device. The DMD architecture and operating parameters related to this application are presented. A model is developed that describes the optical Fourier transform properties of the DMD.

Development of a Microelectromechanical System for Small Satellite Thermal Control

DTIC Science & Technology

2004-05-06

polymer frame or post over a silicon substrate. The membrane should be coated with a high emissivity material. This design was based on the principle...allowing heat conduction to the silicon. While the device was off, both the poor thermal conductivity of the polymer and the gap between membrane and...EnergyThermally Isolating Vacuum and Polymer Heat Conduction (a) (b) Figure 4. Heat conduction and radiation in the on and off states

Label-Free Direct Detection of miRNAs with Poly-Silicon Nanowire Biosensors

PubMed Central

Gong, Changguo; Qi, Jiming; Xiao, Han; Jiang, Bin; Zhao, Yulan

2015-01-01

Background The diagnostic and prognostic value of microRNAs (miRNAs) in a variety of diseases is promising. The novel silicon nanowire (SiNW) biosensors have advantages in molecular detection because of their high sensitivity and fast response. In this study, poly-crystalline silicon nanowire field-effect transistor (poly-SiNW FET) device was developed to achieve specific and ultrasensitive detection of miRNAs without labeling and amplification. Methods The poly-SiNW FET was fabricated by a top–down Complementary Metal Oxide Semiconductor (CMOS) wafer fabrication based technique. Single strand DNA (ssDNA) probe was bind to the surface of the poly-SiNW device which was silanated and aldehyde-modified. By comparing the difference of resistance value before and after ssDNA and miRNA hybridization, poly-SiNW device can be used to detect standard and real miRNA samples. Results Poly-SiNW device with different structures (different line width and different pitch) was applied to detect standard Let-7b sample with a detection limitation of 1 fM. One-base mismatched sequence could be distinguished meanwhile. Furthermore, these poly-SiNW arrays can detect snRNA U6 in total RNA samples extracted from HepG2 cells with a detection limitation of 0.2 μg/mL. In general, structures with pitch showed better results than those without pitch in detection of both Let-7b and snRNA U6. Moreover, structures with smaller pitch showed better detection efficacy. Conclusion Our findings suggest that poly-SiNW arrays could detect standard and real miRNA sample without labeling or amplification. Poly-SiNW biosensor device is promising for miRNA detection. PMID:26709827

EDITORIAL: Special issue on silicon photonics

NASA Astrophysics Data System (ADS)

Reed, Graham; Paniccia, Mario; Wada, Kazumi; Mashanovich, Goran

2008-06-01

The technology now known as silicon photonics can be traced back to the pioneering work of Soref in the mid-1980s (see, for example, Soref R A and Lorenzo J P 1985 Electron. Lett. 21 953). However, the nature of the research conducted today, whilst it builds upon that early work, is unrecognizable in terms of technology metrics such as device efficiency, device data rate and device dimensions, and even in targeted applications areas. Today silicon photonics is still evolving, and is enjoying a period of unprecedented attention in terms of research focus. This has resulted in orders-of-magnitude improvement in device performance over the last few years to levels many thought were impossible. However, despite the existence of the research field for more than two decades, silicon is still regarded as a 'new' optical material, one that is being manipulated and modified to satisfy the requirements of a range of applications. This is somewhat ironic since silicon is one of the best known and most thoroughly studied materials, thanks to the electronics industry that has made silicon its material of choice. The principal reasons for the lack of study of this 'late developer' are that (i) silicon is an indirect bandgap material and (ii) it does not exhibit a linear electro-optic (Pockels) effect. The former condition means that it is difficult to make a laser in silicon based on the intrinsic performance of the material, and consequently, in recent years, researchers have attempted to modify the material to artificially engineer the conditions for lasing to be viable (see, for example, the review text, Jalali B et al 2008 Silicon Lasers in Silicon Photonics: The State of the Art ed G T Reed (New York: Wiley)). The latter condition means that optical modulators are intrinsically less efficient in silicon than in some other materials, particularly when targeting the popular telecommunications wavelengths around 1.55 μm. Therefore researchers have sought alternative mechanisms for modulation in silicon that have yielded increasingly impressive results (see, for example, Liao L et al 2007 Electron. Lett. 43 issue 22). The convergence of computing and communications and the resultant demand for increased bandwidth has been one of the factors influencing the upsurge of interest in silicon, together with the requirement for photonic and electronic integration, all to be realized at low cost. Thus emerging applications such as short-reach communications links for optical interconnect and fibre to the home (FTTH) (as well as a multitude of other applications) are frequently offered as examples of where silicon photonics will have a significant, perhaps a revolutionary, impact. One of the major conclusions of the joint MIT-industry Communication Technology Roadmap (http://mph-roadmap.mit.edu/index.php), was that 'Photonics technology will be driven by electronic-photonic synergy and short (<1 km) reach interconnection. This direction will ignite a major shift in leadership of the optical component industry from information transmission (telecom) to information processing (computing imaging).' Thus the case is made for low-cost implementation, making silicon a prime candidate, particularly if true electronic/photonic integration is to be realized. Despite the limitations of silicon as an optical material, the intrinsic advantages of the most popular silicon optical platform, silicon-on-insulator (SOI), should not be overlooked. The very high confinement nature of this technology platform brings a host of advantages, including the possibility to miniaturize devices and circuits, to reduce power consumption, optical loss and cost, to increase yield, and to be compatible with CMOS-based intelligence. Thus the limitations of silicon as an optical material can be offset against the very significant advantages, to both commercial as well as technological success. Of course, there is still much to do, hence the increasing global investment in silicon technology and the massive increase in research activity in silicon photonics since the early work in the 1980s. Only time will tell if silicon can realize its potential to satisfy the ever-increasing array of applications. However, the indications are positive, and the contributors to this cause employ increasingly impressive levels of intellectual and technological capability to realize the desired goals. It is an interesting time to be involved in slicon photonics, and it will be equally fascinating to watch the evolution of the technology in the future. Whatever happens, silicon will make the transition from being regarded as purely an electronic material to recognition as an optoelectronic material. The evidence for this is represented in the collection of papers that form this special issue of Semiconductor Science and Technology. This special issue is, in turn, representative of the rapidly increasing body of literature that represents the field of silicon photonics. In a field of such rapid transition as silicon photonics, the hope is that this special issue takes a snapshot of the technology at the time of publication, to document the progress of the field for future reference, and in turn to stimulate further work. The Guest Editors are grateful for the tireless support of Clare Bedrock at IOP Publishing.

A wafer-level vacuum package using glass-reflowed silicon through-wafer interconnection for nano/micro devices.

PubMed

Jin, Joo-Young; Yoo, Seung-Hyun; Yoo, Byung-Wook; Kim, Yong-Kweon

2012-07-01

We propose a vacuum wafer-level packaging (WLP) process using glass-reflowed silicon via for nano/micro devices (NMDs). A through-wafer interconnection (TWIn) substrate with silicon vias and reflowed glass is introduced to accomplish a vertical feed-through of device. NMDs are fabricated in the single crystal silicon (SCS) layer which is formed on the TWIn substrate by Au eutectic bonding including Cr adhesion layer. The WLPof the devices is achieved with the capping glass wafer anodically bonded to the SCS layer. In order to demonstrate the successful hermetic packaging, we fabricated the micro-Pirani gauge in the SCS layer, and packaged it in the wafer-level. The vacuum level inside the packaging was measured to be 3.1 Torr with +/- 0.12 Torr uncertainty, and the packaging leakage was not detected during 24 hour after the packaging.

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shiota, Koki, E-mail: a14510@sr.kagawa-nct.ac.jp; Kai, Kazuho; Nagaoka, Shiro, E-mail: nagaoka@es.kagawa-nct.ac.jp

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As themore » result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.« less

Electrical and optical characteristics of heterojunction devices composed of silicon nanowires and mercury selenide nanoparticle films on flexible plastics.

PubMed

Yeo, Minje; Yun, Junggwon; Kim, Sangsig

2013-09-01

A pn heterojunction device based on p-type silicon (Si) nanowires (NWs) prepared by top-down method and n-type mercury selenide (HgSe) nanoparticles (NPs) synthesized by the colloidal method have been fabricated on a flexible plastic substrate. The synthesized HgSe NPs were analyzed through the effective mass approximation. The characteristics of the heterojunction device were examined and studied with the energy band diagram. The device showed typical diode characteristics with a turn-on voltage of 1.5 V and exhibited a high rectification ratio of 10(3) under relatively low forward bias. Under illumination of 633-nm-wavelength light, the device presented photocurrent efficiency of 117.5 and 20.1 nA/W under forward bias and reverse bias conditions, respectively. Moreover, the photocurrent characteristics of the device have been determined by bending of the plastic substrate upward and downward with strain of 0.8%. Even though the photocurrent efficiency has fluctuations during the bending cycles, the values are roughly maintained for 10(4) bending cycles. This result indicates that the fabricated heterojunction device has the potential to be applied as fundamental elements of flexible nanoelectronics.

Low temperature perovskite solar cells with an evaporated TiO 2 compact layer for perovskite silicon tandem solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bett, Alexander J.; Schulze, Patricia S. C.; Winkler, Kristina

Silicon-based tandem solar cells can overcome the efficiency limit of single junction silicon solar cells. Perovskite solar cells are particularly promising as a top cell in monolithic tandem devices due to their rapid development towards high efficiencies, a tunable band gap with a sharp optical absorption edge and a simple production process. In monolithic tandem devices, the perovskite solar cell is deposited directly on the silicon cell, requiring low-temperature processes (< 200 °C) to maintain functionality of under-lying layers of the silicon cell in case of highly efficient silicon hetero-junction (SHJ) bottom solar cell. In this work, we present amore » complete low-temperature process for perovskite solar cells including a mesoporous titanium oxide (TiO 2) scaffold - a structure yielding the highest efficiencies for single-junction perovskite solar cells. We show that evaporation of the compact TiO 2 hole blocking layer and ultra-violet (UV) curing for the mesoporous TiO 2 layer allows for good performance, comparable to high-temperature (> 500 °C) processes. With both manufacturing routes, we obtain short-circuit current densities (J SC) of about 20 mA/cm 2, open-circuit voltages (V OC) over 1 V, fill factors (FF) between 0.7 and 0.8 and efficiencies (n) of more than 15%. We further show that the evaporated TiO 2 layer is suitable for the application in tandem devices. The series resistance of the layer itself and the contact resistance to an indium doped tin oxide (ITO) interconnection layer between the two sub-cells are low. Additionally, the low parasitic absorption for wavelengths above the perovskite band gap allow a higher absorption in the silicon bottom solar cell, which is essential to achieve high tandem efficiencies.« less

Low temperature perovskite solar cells with an evaporated TiO 2 compact layer for perovskite silicon tandem solar cells

DOE PAGES

Bett, Alexander J.; Schulze, Patricia S. C.; Winkler, Kristina; ...

2017-09-21

Silicon-based tandem solar cells can overcome the efficiency limit of single junction silicon solar cells. Perovskite solar cells are particularly promising as a top cell in monolithic tandem devices due to their rapid development towards high efficiencies, a tunable band gap with a sharp optical absorption edge and a simple production process. In monolithic tandem devices, the perovskite solar cell is deposited directly on the silicon cell, requiring low-temperature processes (< 200 °C) to maintain functionality of under-lying layers of the silicon cell in case of highly efficient silicon hetero-junction (SHJ) bottom solar cell. In this work, we present amore » complete low-temperature process for perovskite solar cells including a mesoporous titanium oxide (TiO 2) scaffold - a structure yielding the highest efficiencies for single-junction perovskite solar cells. We show that evaporation of the compact TiO 2 hole blocking layer and ultra-violet (UV) curing for the mesoporous TiO 2 layer allows for good performance, comparable to high-temperature (> 500 °C) processes. With both manufacturing routes, we obtain short-circuit current densities (J SC) of about 20 mA/cm 2, open-circuit voltages (V OC) over 1 V, fill factors (FF) between 0.7 and 0.8 and efficiencies (n) of more than 15%. We further show that the evaporated TiO 2 layer is suitable for the application in tandem devices. The series resistance of the layer itself and the contact resistance to an indium doped tin oxide (ITO) interconnection layer between the two sub-cells are low. Additionally, the low parasitic absorption for wavelengths above the perovskite band gap allow a higher absorption in the silicon bottom solar cell, which is essential to achieve high tandem efficiencies.« less

Structural Color Filters Enabled by a Dielectric Metasurface Incorporating Hydrogenated Amorphous Silicon Nanodisks.

PubMed

Park, Chul-Soon; Shrestha, Vivek Raj; Yue, Wenjing; Gao, Song; Lee, Sang-Shin; Kim, Eun-Soo; Choi, Duk-Yong

2017-05-31

It is advantageous to construct a dielectric metasurface in silicon due to its compatibility with cost-effective, mature processes for complementary metal-oxide-semiconductor devices. However, high-quality crystalline-silicon films are difficult to grow on foreign substrates. In this work, we propose and realize highly efficient structural color filters based on a dielectric metasurface exploiting hydrogenated amorphous silicon (a-Si:H), known to be lossy in the visible regime. The metasurface is comprised of an array of a-Si:H nanodisks embedded in a polymer, providing a homogeneously planarized surface that is crucial for practical applications. The a-Si:H nanodisk element is deemed to individually support an electric dipole (ED) and magnetic dipole (MD) resonance via Mie scattering, thereby leading to wavelength-dependent filtering characteristics. The ED and MD can be precisely identified by observing the resonant field profiles with the assistance of finite-difference time-domain simulations. The completed color filters provide a high transmission of around 90% in the off-resonance band longer than their resonant wavelengths, exhibiting vivid subtractive colors. A wide range of colors can be facilitated by tuning the resonance by adjusting the structural parameters like the period and diameter of the a-Si:H nanodisk. The proposed devices will be actively utilized to implement color displays, imaging devices, and photorealistic color printing.

Ultra-short silicon MMI duplexer

NASA Astrophysics Data System (ADS)

Yi, Huaxiang; Huang, Yawen; Wang, Xingjun; Zhou, Zhiping

2012-11-01

The fiber-to-the-home (FTTH) systems are growing fast these days, where two different wavelengths are used for upstream and downstream traffic, typically 1310nm and 1490nm. The duplexers are the key elements to separate these wavelengths into different path in central offices (CO) and optical network unit (ONU) in passive optical network (PON). Multimode interference (MMI) has some benefits to be a duplexer including large fabrication tolerance, low-temperature dependence, and low-polarization dependence, but its size is too large to integrate in conventional case. Based on the silicon photonics platform, ultra-short silicon MMI duplexer was demonstrated to separate the 1310nm and 1490nm lights. By studying the theory of self-image phenomena in MMI, the first order images are adopted in order to keep the device short. A cascaded MMI structure was investigated to implement the wavelength splitting, where both the light of 1310nm and 1490nm was input from the same port, and the 1490nm light was coupling cross the first MMI and output at the cross-port in the device while the 1310nm light was coupling through the first and second MMI and output at the bar-port in the device. The experiment was carried on with the SOI wafer of 340nm top silicon. The cascaded MMI was investigated to fold the length of the duplexer as short as 117μm with the extinct ratio over 10dB.

Wavelength dependent vertical integration of nanoplasmonic circuits utilizing coupled ring resonators

NASA Astrophysics Data System (ADS)

Nielsen, M.; Elezzabi, A. Y.

2013-03-01

To become a competitor to replace CMOS-electronics for next-generation data processing, signal routing, and computing, nanoplasmonic circuits will require an analogue to electrical vias in order to enable vertical connections between device layers. Vertically stacked nanoplasmonic nanoring resonators formed of Ag/Si/Ag gap plasmon waveguides were studied as a novel 3-D coupling scheme that could be monolithically integrated on a silicon platform. The vertically coupled ring resonators were evanescently coupled to 100 nm x 100 nm Ag/Si/Ag input and output waveguides and the whole device was submerged in silicon dioxide. 3-D finite difference time domain simulations were used to examine the transmission spectra of the coupling device with varying device sizes and orientations. By having the signal coupling occur over multiple trips around the resonator, coupling efficiencies as high as 39% at telecommunication wavelengths between adjacent layers were present with planar device areas of only 1.00 μm2. As the vertical signal transfer was based on coupled ring resonators, the signal transfer was inherently wavelength dependent. Changing the device size by varying the radii of the nanorings allowed for tailoring the coupled frequency spectra. The plasmonic resonator based coupling scheme was found to have quality (Q) factors of upwards of 30 at telecommunication wavelengths. By allowing different device layers to operate on different wavelengths, this coupling scheme could to lead to parallel processing in stacked independent device layers.

ASIC or PIC? Implantable stimulators based on semi-custom CMOS technology or low-power microcontroller architecture.

PubMed

Salmons, S; Gunning, G T; Taylor, I; Grainger, S R; Hitchings, D J; Blackhurst, J; Jarvis, J C

2001-01-01

To gain a better understanding of the effects of chronic stimulation on mammalian muscles we needed to generate patterns of greater variety and complexity than simple constant-frequency or burst patterns. We describe here two approaches to the design of implantable neuromuscular stimulators that can satisfy these requirements. Devices of both types were developed and used in long-term experiments. The first device was based on a semi-custom Application Specific Integrated Circuit (ASIC). This approach has the advantage that the circuit can be completely tested at every stage of development and production, assuring a high degree of reliability. It has the drawback of inflexibility: the patterns are produced by state machines implemented in silicon, so each new set of patterns requires a fresh production run, which is costly and time-consuming. The second device was based on a commercial microcontroller (Microchip PIC16C84). The functionality of this type of circuit is specified in software rather than in silicon hardware, allowing a single device to be programmed for different functions. With the use of features designed to improve fault-tolerance we found this approach to be as reliable as that based on ASICs. The encapsulated devices can easily be accommodated subcutaneously on the flank of a rabbit and a recent version is small enough to implant into the peritoneal cavity of rats. The current devices are programmed with a predetermined set of 12 patterns before assembly; the desired pattern is selected after implantation with an electronic flash gun. The operating current drain is less than 40 microA.

Pre-strain effect on frequency-based impact energy dissipation through a silicone foam pad for shock mitigation [Pre-strain effect on the frequency response of shock mitigation through a silicone foam pad

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sanborn, Brett; Song, Bo; Smith, Scott

Silicone foams have been used in a variety of applications from gaskets to cushioning pads over a wide range of environments. Particularly, silicone foams are used as a shock mitigation material for shock and vibration applications. Understanding the shock mitigation response, particularly in the frequency domain, is critical for optimal designs to protect internal devices and components more effectively and efficiently. The silicone foams may be subjected to pre-strains during the assembly process which may consequently influence the frequency response with respect to shock mitigation performance. A Kolsky compression bar was modified with pre-compression capabilities to characterize the shock mitigationmore » response of silicone foam in the frequency domain to determine the effect of pre-strain. Lastly, a silicone sample was also intentionally subjected to repeated pre-strain and dynamic loadings to explore the effect of repeated loading on the frequency response of shock mitigation.« less

Pre-strain effect on frequency-based impact energy dissipation through a silicone foam pad for shock mitigation [Pre-strain effect on the frequency response of shock mitigation through a silicone foam pad

DOE PAGES

Sanborn, Brett; Song, Bo; Smith, Scott

2015-12-29

Silicone foams have been used in a variety of applications from gaskets to cushioning pads over a wide range of environments. Particularly, silicone foams are used as a shock mitigation material for shock and vibration applications. Understanding the shock mitigation response, particularly in the frequency domain, is critical for optimal designs to protect internal devices and components more effectively and efficiently. The silicone foams may be subjected to pre-strains during the assembly process which may consequently influence the frequency response with respect to shock mitigation performance. A Kolsky compression bar was modified with pre-compression capabilities to characterize the shock mitigationmore » response of silicone foam in the frequency domain to determine the effect of pre-strain. Lastly, a silicone sample was also intentionally subjected to repeated pre-strain and dynamic loadings to explore the effect of repeated loading on the frequency response of shock mitigation.« less

Core-shell silicon nanowire solar cells

PubMed Central

Adachi, M. M.; Anantram, M. P.; Karim, K. S.

2013-01-01

Silicon nanowires can enhance broadband optical absorption and reduce radial carrier collection distances in solar cell devices. Arrays of disordered nanowires grown by vapor-liquid-solid method are attractive because they can be grown on low-cost substrates such as glass, and are large area compatible. Here, we experimentally demonstrate that an array of disordered silicon nanowires surrounded by a thin transparent conductive oxide has both low diffuse and specular reflection with total values as low as < 4% over a broad wavelength range of 400 nm < λ < 650 nm. These anti-reflective properties together with enhanced infrared absorption in the core-shell nanowire facilitates enhancement in external quantum efficiency using two different active shell materials: amorphous silicon and nanocrystalline silicon. As a result, the core-shell nanowire device exhibits a short-circuit current enhancement of 15% with an amorphous Si shell and 26% with a nanocrystalline Si shell compared to their corresponding planar devices. PMID:23529071

Near-infrared sub-bandgap all-silicon photodetectors: state of the art and perspectives.

PubMed

Casalino, Maurizio; Coppola, Giuseppe; Iodice, Mario; Rendina, Ivo; Sirleto, Luigi

2010-01-01

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared.

Near-Infrared Sub-Bandgap All-Silicon Photodetectors: State of the Art and Perspectives

PubMed Central

Casalino, Maurizio; Coppola, Giuseppe; Iodice, Mario; Rendina, Ivo; Sirleto, Luigi

2010-01-01

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared. PMID:22163487

Compact and low power operation optical switch using silicon-germanium/silicon hetero-structure waveguide.

PubMed

Sekiguchi, Shigeaki; Kurahashi, Teruo; Zhu, Lei; Kawaguchi, Kenichi; Morito, Ken

2012-04-09

We proposed a silicon-based optical switch with a carrier-plasma-induced phase shifter which employs a silicon-germanium (SiGe) / silicon (Si) hetero-structure in the waveguide core. A type-I hetero-interface formed by SiGe and Si is expected to confine carriers effectively in the SiGe waveguide core. The fabricated Mach-Zehnder optical switch shows a low switching power of only 1.53 mW with a compact phase shifter length of 250 μm. The switching time of the optical switch is less than 4.6 ns for the case of a square waveform driving condition, and 1 ns for the case of a pre-emphasis electric driving condition. These results show that our proposed SiGe/Si waveguide structure holds promise for active devices with compact size and low operation power.

Performance of the THS4302 and the Class V Radiation-Tolerant THS4304-SP Silicon Germanium Wideband Amplifiers at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Elbuluk, Malik; Hammoud, Ahmad; VanKeuls, Frederick W.

2009-01-01

This report discusses the performance of silicon germanium, wideband gain amplifiers under extreme temperatures. The investigated devices include Texas Instruments THS4304-SP and THS4302 amplifiers. Both chips are manufactured using the BiCom3 process based on silicon germanium technology along with silicon-on-insulator (SOI) buried oxide layers. The THS4304-SP device was chosen because it is a Class V radiation-tolerant (150 kRad, TID silicon), voltage-feedback operational amplifier designed for use in high-speed analog signal applications and is very desirable for NASA missions. It operates with a single 5 V power supply [1]. It comes in a 10-pin ceramic flatpack package, and it provides balanced inputs, low offset voltage and offset current, and high common mode rejection ratio. The fixed-gain THS4302 chip, which comes in a 16-pin leadless package, offers high bandwidth, high slew rate, low noise, and low distortion [2]. Such features have made the amplifier useful in a number of applications such as wideband signal processing, wireless transceivers, intermediate frequency (IF) amplifier, analog-to-digital converter (ADC) preamplifier, digital-to-analog converter (DAC) output buffer, measurement instrumentation, and medical and industrial imaging.

Graphene optical modulator

NASA Astrophysics Data System (ADS)

Liu, Ming; Yin, Xiaobo; Wang, Feng; Zhang, Xiang

2011-10-01

Data communications have been growing at a speed even faster than Moore's Law, with a 44-fold increase expected within the next 10 years. Data Transfer on such scale would have to recruit optical communication technology and inspire new designs of light sources, modulators, and photodetectors. An ideal optical modulator will require high modulation speed, small device footprint and large operating bandwidth. Silicon modulators based on free carrier plasma dispersion effect and compound semiconductors utilizing direct bandgap transition have seen rapid improvement over the past decade. One of the key limitations for using silicon as modulator material is its weak refractive index change, which limits the footprint of silicon Mach-Zehnder interferometer modulators to millimeters. Other approaches such as silicon microring modulators reduce the operation wavelength range to around 100 pm and are highly sensitive to typical fabrication tolerances and temperature fluctuations. Growing large, high quality wafers of compound semiconductors, and integrating them on silicon or other substrates is expensive, which also restricts their commercialization. In this work, we demonstrate that graphene can be used as the active media for electroabsorption modulators. By tuning the Fermi energy level of the graphene layer, we induced changes in the absorption coefficient of graphene at communication wavelength and achieve a modulation depth above 3 dB. This integrated device also has the potential of working at high speed.

A new detector concept for silicon photomultipliers

NASA Astrophysics Data System (ADS)

Sadigov, A.; Ahmadov, F.; Ahmadov, G.; Ariffin, A.; Khorev, S.; Sadygov, Z.; Suleymanov, S.; Zerrouk, F.; Madatov, R.

2016-07-01

A new design and principle of operation of silicon photomultipliers are presented. The new design comprises a semiconductor substrate and an array of independent micro-phototransistors formed on the substrate. Each micro-phototransistor comprises a photosensitive base operating in Geiger mode and an individual micro-emitter covering a small part of the base layer, thereby creating, together with this latter, a micro-transistor. Both micro-emitters and photosensitive base layers are connected with two respective independent metal grids via their individual micro-resistors. The total value of signal gain in the proposed silicon photomultiplier is a result of both the avalanche gain in the base layer and the corresponding gain in the micro-transistor. The main goals of the new design are: significantly lower both optical crosstalk and after-pulse effects at high signal amplification, improve speed of single photoelectron pulse formation, and significantly reduce the device capacitance.

Method of making a silicon nanowire device

DOEpatents

None, None

2017-05-23

There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation. The method, in examples, includes thinning the nanowire through iterative oxidation and etching of the oxidized portion.

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

Gold Nanoparticles on Functionalized Silicon Substrate under Coulomb Blockade Regime: An Experimental and Theoretical Investigation.

PubMed

Pluchery, Olivier; Caillard, Louis; Dollfus, Philippe; Chabal, Yves J

2018-01-18

Single charge electronics offer a way for disruptive technology in nanoelectronics. Coulomb blockade is a realistic way for controlling the electric current through a device with the accuracy of one electron. In such devices the current exhibits a step-like increase upon bias which reflects the discrete nature of the fundamental charge. We have assembled a double tunnel junction on an oxide-free silicon substrate that exhibits Coulomb staircase characteristics using gold nanoparticles (AuNPs) as Coulomb islands. The first tunnel junction is an insulating layer made of a grafted organic monolayer (GOM) developed for this purpose. The GOM also serves for attaching AuNPs covalently. The second tunnel junction is made by the tip of an STM. We show that this device exhibits reproducible Coulomb blockade I-V curves at 40 K in vacuum. We also show that depending on the doping of the silicon substrate, the whole Coulomb staircase can be adjusted. We have developed a simulation approach based on the orthodox theory that was completed by calculating the bias dependent tunnel barriers and by including an accurate calculation of the band bending. This model accounts for the experimental data and the doping dependence of Coulomb oscillations. This study opens new perspectives toward designing new kind of single electron transistors (SET) based on this dependence of the Coulomb staircase with the charge carrier concentration.

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

NASA Astrophysics Data System (ADS)

Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

2017-06-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

Highly Sensitive and Practical Detection of Plant Viruses via Electrical Impedance of Droplets on Textured Silicon-Based Devices

PubMed Central

Ambrico, Marianna; Ambrico, Paolo Francesco; Minafra, Angelantonio; De Stradis, Angelo; Vona, Danilo; Cicco, Stefania R.; Palumbo, Fabio; Favia, Pietro; Ligonzo, Teresa

2016-01-01

Early diagnosis of plant virus infections before the disease symptoms appearance may represent a significant benefit in limiting disease spread by a prompt application of appropriate containment steps. We propose a label-free procedure applied on a device structure where the electrical signal transduction is evaluated via impedance spectroscopy techniques. The device consists of a droplet suspension embedding two representative purified plant viruses i.e., Tomato mosaic virus and Turnip yellow mosaic virus, put in contact with a highly hydrophobic plasma textured silicon surface. Results show a high sensitivity of the system towards the virus particles with an interestingly low detection limit, from tens to hundreds of attomolar corresponding to pg/mL of sap, which refers, in the infection time-scale, to a concentration of virus particles in still-symptomless plants. Such a threshold limit, together with an envisaged engineering of an easily manageable device, compared to more sophisticated apparatuses, may contribute in simplifying the in-field plant virus diagnostics. PMID:27869726

Al transmon qubits on silicon-on-insulator for quantum device integration

NASA Astrophysics Data System (ADS)

Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

2017-07-01

We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

Effects of Temperature on the Performance and Stability of Recent COTS Silicon Oscillators

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Ahmad

2010-01-01

Silicon oscillators have lately emerged to serve as potential replacement for crystal and ceramic resonators to provide timing and clock signals in electronic systems. These semiconductor-based devices, including those that are based on MEMS technology, are reported to be resistant to vibration and shock (an important criteria for systems to be deployed in space), immune to EMI, consume very low current, require few or no external components, and cover a wide range of frequency for analog and digital circuits. In this work, the performance of five recently-developed COTS silicon oscillator chips from different manufacturers was determined within a temperature range that extended beyond the individual specified range of operation. In addition, restart capability at extreme temperatures, i.e. power switched on while the device was soaking at extreme (hot or cold) temperature, and the effects of thermal cycling under a wide temperature range on the operation of these silicon oscillators were also investigated. Performance characterization of each oscillator was obtained in terms of its output frequency, duty cycle, rise and fall times, and supply current at specific test temperatures. The five different oscillators tested operated beyond their specified temperature region, with some displaying excellent stability throughout the whole test temperature range. Others experienced some instability at certain temperature test points as evidenced by fluctuation in the output frequency. Recovery from temperature-induced changes took place when excessive temperatures were removed. It should also be pointed out that all oscillators were able to restart at the extreme test temperatures and to withstand the limited thermal cycling without undergoing any significant changes in their characteristics. In addition, no physical damage was observed in the packaging material of any of these silicon oscillators due to extreme temperature exposure and thermal cycling. It is recommended that additional and more comprehensive testing under long term cycling be carried out to fully establish the reliability of these devices and to determine their suitability for use in space exploration missions under extreme temperature conditions.

Silicon device performance measurements to support temperature range enhancement

NASA Technical Reports Server (NTRS)

Bromstead, James; Weir, Bennett; Nelms, R. Mark; Johnson, R. Wayne; Askew, Ray

1994-01-01

Silicon based power devices can be used at 200 C. The device measurements made during this program show a predictable shift in device parameters with increasing temperature. No catastrophic or abrupt changes occurred in the parameters over the temperature range. As expected, the most dramatic change was the increase in leakage currents with increasing temperature. At 200 C the leakage current was in the milliAmp range but was still several orders of magnitude lower than the on-state current capabilities of the devices under test. This increase must be considered in the design of circuits using power transistors at elevated temperature. Three circuit topologies have been prototyped using MOSFET's and IGBT's. The circuits were designed using zero current or zero voltage switching techniques to eliminate or minimize hard switching of the power transistors. These circuits have functioned properly over the temperature range. One thousand hour life data have been collected for two power supplies with no failures and no significant change in operating efficiency. While additional reliability testing should be conducted, the feasibility of designing soft switched circuits for operation at 200 C has been successfully demonstrated.

Low-cost, high-efficiency organic/inorganic hetero-junction hybrid solar cells for next generation photovoltaic device

NASA Astrophysics Data System (ADS)

Pudasaini, P. R.; Ayon, A. A.

2013-12-01

Organic/inorganic hybrid structures are considered innovative alternatives for the next generation of low-cost photovoltaic devices because they combine advantages of the purely organic and inorganic versions. Here, we report an efficient hybrid solar cell based on sub-wavelength silicon nanotexturization in combination with the spin-coating of poly (3,4-ethylene-dioxythiophene):polystyrenesulfonate (PEDOT:PSS). The described devices were analyzed by collecting current-voltage and capacitance-voltage measurements in order to explore the organic/inorganic heterojunction properties. ALD deposited ultrathin aluminium oxide was used as a junction passivation layer between the nanotextured silicon surface and the organic polymer. The measured interface defect density of the device was observed to decrease with the inclusion of an ultrathin Al2O3 passivation layer leading to an improved electrical performance. This effect is thought to be ascribed to the suppression of charge recombination at the organic/inorganic interface. A maximum power conversion efficiency in excess of 10% has been achieved for the optimized geometry of the device, in spite of lacking an antireflection layer or back surface field enhancement schemes.

Nondestructive imaging of atomically thin nanostructures buried in silicon

PubMed Central

Gramse, Georg; Kölker, Alexander; Lim, Tingbin; Stock, Taylor J. Z.; Solanki, Hari; Schofield, Steven R.; Brinciotti, Enrico; Aeppli, Gabriel; Kienberger, Ferry; Curson, Neil J.

2017-01-01

It is now possible to create atomically thin regions of dopant atoms in silicon patterned with lateral dimensions ranging from the atomic scale (angstroms) to micrometers. These structures are building blocks of quantum devices for physics research and they are likely also to serve as key components of devices for next-generation classical and quantum information processing. Until now, the characteristics of buried dopant nanostructures could only be inferred from destructive techniques and/or the performance of the final electronic device; this severely limits engineering and manufacture of real-world devices based on atomic-scale lithography. Here, we use scanning microwave microscopy (SMM) to image and electronically characterize three-dimensional phosphorus nanostructures fabricated via scanning tunneling microscope–based lithography. The SMM measurements, which are completely nondestructive and sensitive to as few as 1900 to 4200 densely packed P atoms 4 to 15 nm below a silicon surface, yield electrical and geometric properties in agreement with those obtained from electrical transport and secondary ion mass spectroscopy for unpatterned phosphorus δ layers containing ~1013 P atoms. The imaging resolution was 37 ± 1 nm in lateral and 4 ± 1 nm in vertical directions, both values depending on SMM tip size and depth of dopant layers. In addition, finite element modeling indicates that resolution can be substantially improved using further optimized tips and microwave gradient detection. Our results on three-dimensional dopant structures reveal reduced carrier mobility for shallow dopant layers and suggest that SMM could aid the development of fabrication processes for surface code quantum computers. PMID:28782006