Oxidation resistant high temperature thermal cycling resistant coatings on silicon-based substrates and process for the production thereof

DOEpatents

Sarin, Vinod K.

1990-01-01

An oxidation resistant, high temperature thermal cycling resistant coated ceramic article for ceramic heat engine applications. The substrate is a silicon-based material, i.e. a silicon nitride- or silicon carbide-based monolithic or composite material. The coating is a graded coating of at least two layers: an intermediate AlN or Al.sub.x N.sub.y O.sub.z layer and an aluminum oxide or zirconium oxide outer layer. The composition of the coating changes gradually from that of the substrate to that of the AlN or Al.sub.x N.sub.y O.sub.z layer and further to the composition of the aluminum oxide or zirconium oxide outer layer. Other layers may be deposited over the aluminum oxide layer. A CVD process for depositing the graded coating on the substrate is also disclosed.

Enhanced Raman scattering in porous silicon grating.

PubMed

Wang, Jiajia; Jia, Zhenhong; Lv, Changwu

2018-03-19

The enhancement of Raman signal on monocrystalline silicon gratings with varying groove depths and on porous silicon grating were studied for a highly sensitive surface enhanced Raman scattering (SERS) response. In the experiment conducted, porous silicon gratings were fabricated. Silver nanoparticles (Ag NPs) were then deposited on the porous silicon grating to enhance the Raman signal of the detective objects. Results show that the enhancement of Raman signal on silicon grating improved when groove depth increased. The enhanced performance of Raman signal on porous silicon grating was also further improved. The Rhodamine SERS response based on Ag NPs/ porous silicon grating substrates was enhanced relative to the SERS response on Ag NPs/ porous silicon substrates. Ag NPs / porous silicon grating SERS substrate system achieved a highly sensitive SERS response due to the coupling of various Raman enhancement factors.

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

PubMed Central

Hazut, Ori; Agarwala, Arunava; Subramani, Thangavel; Waichman, Sharon; Yerushalmi, Roie

2013-01-01

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra shallow and sharp doping profiles at the nanometer scale. In MLCD process the dopant source is a monolayer containing dopant atoms. In this article a detailed procedure for surface doping of silicon substrate as well as silicon nanowires is demonstrated. Phosphorus dopant source was formed using tetraethyl methylenediphosphonate monolayer on a silicon substrate. This monolayer containing substrate was brought to contact with a pristine intrinsic silicon target substrate and annealed while in contact. Sheet resistance of the target substrate was measured using 4 point probe. Intrinsic silicon nanowires were synthesized by chemical vapor deposition (CVD) process using a vapor-liquid-solid (VLS) mechanism; gold nanoparticles were used as catalyst for nanowire growth. The nanowires were suspended in ethanol by mild sonication. This suspension was used to dropcast the nanowires on silicon substrate with a silicon nitride dielectric top layer. These nanowires were doped with phosphorus in similar manner as used for the intrinsic silicon wafer. Standard photolithography process was used to fabricate metal electrodes for the formation of nanowire based field effect transistor (NW-FET). The electrical properties of a representative nanowire device were measured by a semiconductor device analyzer and a probe station. PMID:24326774

Method of Forming Textured Silicon Substrate by Maskless Cryogenic Etching

NASA Technical Reports Server (NTRS)

Yee, Karl Y. (Inventor); Homyk, Andrew P. (Inventor)

2014-01-01

Disclosed herein is a textured substrate comprising a base comprising silicon, the base having a plurality of needle like structures depending away from the base, wherein at least one of the needle like structures has a depth of greater than or equal to about 50 micrometers determined perpendicular to the base, and wherein at least one of the needle like structures has a width of less than or equal to about 50 micrometers determined parallel to the base. An anode and a lithium ion battery comprising the textured substrate, and a method of producing the textured substrate are also disclosed.

Progress in the Development of SERS-Active Substrates Based on Metal-Coated Porous Silicon

PubMed Central

Girel, Kseniya V.; Panarin, Andrei; Terekhov, Sergei N.

2018-01-01

The present work gives an overview of the developments in surface-enhanced Raman scattering (SERS) with metal-coated porous silicon used as an active substrate. We focused this review on the research referenced to SERS-active materials based on porous silicon, beginning from the patent application in 2002 and enclosing the studies of this year. Porous silicon and metal deposition technologies are discussed. Since the earliest studies, a number of fundamentally different plasmonic nanostructures including metallic dendrites, quasi-ordered arrays of metallic nanoparticles (NPs), and metallic nanovoids have been grown on porous silicon, defined by the morphology of this host material. SERS-active substrates based on porous silicon have been found to combine a high and well-reproducible signal level, storage stability, cost-effective technology and handy use. They make it possible to identify and study many compounds including biomolecules with a detection limit varying from milli- to femtomolar concentrations. The progress reviewed here demonstrates the great prospects for the extensive use of the metal-coated porous silicon for bioanalysis by SERS-spectroscopy. PMID:29883382

Progress in the Development of SERS-Active Substrates Based on Metal-Coated Porous Silicon.

PubMed

Bandarenka, Hanna V; Girel, Kseniya V; Zavatski, Sergey A; Panarin, Andrei; Terekhov, Sergei N

2018-05-21

The present work gives an overview of the developments in surface-enhanced Raman scattering (SERS) with metal-coated porous silicon used as an active substrate. We focused this review on the research referenced to SERS-active materials based on porous silicon, beginning from the patent application in 2002 and enclosing the studies of this year. Porous silicon and metal deposition technologies are discussed. Since the earliest studies, a number of fundamentally different plasmonic nanostructures including metallic dendrites, quasi-ordered arrays of metallic nanoparticles (NPs), and metallic nanovoids have been grown on porous silicon, defined by the morphology of this host material. SERS-active substrates based on porous silicon have been found to combine a high and well-reproducible signal level, storage stability, cost-effective technology and handy use. They make it possible to identify and study many compounds including biomolecules with a detection limit varying from milli- to femtomolar concentrations. The progress reviewed here demonstrates the great prospects for the extensive use of the metal-coated porous silicon for bioanalysis by SERS-spectroscopy.

Efficient Surface Enhanced Raman Scattering substrates from femtosecond laser based fabrication

NASA Astrophysics Data System (ADS)

Parmar, Vinod; Kanaujia, Pawan K.; Bommali, Ravi Kumar; Vijaya Prakash, G.

2017-10-01

A fast and simple femtosecond laser based methodology for efficient Surface Enhanced Raman Scattering (SERS) substrate fabrication has been proposed. Both nano scaffold silicon (black silicon) and gold nanoparticles (Au-NP) are fabricated by femtosecond laser based technique for mass production. Nano rough silicon scaffold enables large electromagnetic fields for the localized surface plasmons from decorated metallic nanoparticles. Thus giant enhancement (approximately in the order of 104) of Raman signal arises from the mixed effects of electron-photon-phonon coupling, even at nanomolar concentrations of test organic species (Rhodamine 6G). Proposed process demonstrates the low-cost and label-less application ability from these large-area SERS substrates.

Silica substrate or portion formed from oxidation of monocrystalline silicon

DOEpatents

Matzke, Carolyn M.; Rieger, Dennis J.; Ellis, Robert V.

2003-07-15

A method is disclosed for forming an inclusion-free silica substrate using a monocrystalline silicon substrate as the starting material and oxidizing the silicon substrate to convert it entirely to silica. The oxidation process is performed from both major surfaces of the silicon substrate using a conventional high-pressure oxidation system. The resulting product is an amorphous silica substrate which is expected to have superior etching characteristics for microfabrication than conventional fused silica substrates. The present invention can also be used to convert only a portion of a monocrystalline silicon substrate to silica by masking the silicon substrate and locally thinning a portion the silicon substrate prior to converting the silicon portion entirely to silica. In this case, the silica formed by oxidizing the thinned portion of the silicon substrate can be used, for example, as a window to provide optical access through the silicon substrate.

Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

NASA Astrophysics Data System (ADS)

Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

2017-10-01

Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

Thin film transistors on plastic substrates with reflective coatings for radiation protection

DOEpatents

Wolfe, Jesse D.; Theiss, Steven D.; Carey, Paul G.; Smith, Patrick M.; Wickboldt, Paul

2003-11-04

Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Thin film transistors on plastic substrates with reflective coatings for radiation protection

DOEpatents

Wolfe, Jesse D [Fairfield, CA; Theiss, Steven D [Woodbury, MN; Carey, Paul G [Mountain View, CA; Smith, Patrick M [San Ramon, CA; Wickbold, Paul [Walnut Creek, CA

2006-09-26

Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Methods of repairing a substrate

NASA Technical Reports Server (NTRS)

Riedell, James A. (Inventor); Easler, Timothy E. (Inventor)

2011-01-01

A precursor of a ceramic adhesive suitable for use in a vacuum, thermal, and microgravity environment. The precursor of the ceramic adhesive includes a silicon-based, preceramic polymer and at least one ceramic powder selected from the group consisting of aluminum oxide, aluminum nitride, boron carbide, boron oxide, boron nitride, hafnium boride, hafnium carbide, hafnium oxide, lithium aluminate, molybdenum silicide, niobium carbide, niobium nitride, silicon boride, silicon carbide, silicon oxide, silicon nitride, tin oxide, tantalum boride, tantalum carbide, tantalum oxide, tantalum nitride, titanium boride, titanium carbide, titanium oxide, titanium nitride, yttrium oxide, zirconium boride, zirconium carbide, zirconium oxide, and zirconium silicate. Methods of forming the ceramic adhesive and of repairing a substrate in a vacuum and microgravity environment are also disclosed, as is a substrate repaired with the ceramic adhesive.

Method for enhancing the solubility of dopants in silicon

DOEpatents

Sadigh, Babak; Lenosky, Thomas J.; De La Rubia, Tomas Diaz

2003-09-30

A method for enhancing the equilibrium solid solubility of dopants in silicon, germanium and silicon-germanium alloys. The method involves subjecting silicon-based substrate to biaxial or compression strain. It has been determined that boron solubility was largely enhanced (more than 100%) by a compressive bi-axial strain, based on a size-mismatch theory since the boron atoms are smaller than the silicon atoms. It has been found that the large enhancement or mixing properties of dopants in silicon and germanium substrates is primarily governed by their, and to second order by their size-mismatch with the substrate. Further, it has been determined that the dopant solubility enhancement with strain is most effective when the charge and the size-mismatch of the impurity favor the same type of strain. Thus, the solid solubility of small p-type (e.g., boron) as well as large n-type (e.g., arsenic) dopants can be raised most dramatically by appropriate bi-axial (compressive) strain, and that solubility of a large p-type dopant (e.g, indium) in silicon will be raised due to size-mismatch with silicon, which favors tensile strain, while its negative charge prefers compressive strain, and thus the two effects counteract each other.

Fabrication Methods for Adaptive Deformable Mirrors

NASA Technical Reports Server (NTRS)

Toda, Risaku; White, Victor E.; Manohara, Harish; Patterson, Keith D.; Yamamoto, Namiko; Gdoutos, Eleftherios; Steeves, John B.; Daraio, Chiara; Pellegrino, Sergio

2013-01-01

Previously, it was difficult to fabricate deformable mirrors made by piezoelectric actuators. This is because numerous actuators need to be precisely assembled to control the surface shape of the mirror. Two approaches have been developed. Both approaches begin by depositing a stack of piezoelectric films and electrodes over a silicon wafer substrate. In the first approach, the silicon wafer is removed initially by plasmabased reactive ion etching (RIE), and non-plasma dry etching with xenon difluoride (XeF2). In the second approach, the actuator film stack is immersed in a liquid such as deionized water. The adhesion between the actuator film stack and the substrate is relatively weak. Simply by seeping liquid between the film and the substrate, the actuator film stack is gently released from the substrate. The deformable mirror contains multiple piezoelectric membrane layers as well as multiple electrode layers (some are patterned and some are unpatterned). At the piezolectric layer, polyvinylidene fluoride (PVDF), or its co-polymer, poly(vinylidene fluoride trifluoroethylene P(VDF-TrFE) is used. The surface of the mirror is coated with a reflective coating. The actuator film stack is fabricated on silicon, or silicon on insulator (SOI) substrate, by repeatedly spin-coating the PVDF or P(VDFTrFE) solution and patterned metal (electrode) deposition. In the first approach, the actuator film stack is prepared on SOI substrate. Then, the thick silicon (typically 500-micron thick and called handle silicon) of the SOI wafer is etched by a deep reactive ion etching process tool (SF6-based plasma etching). This deep RIE stops at the middle SiO2 layer. The middle SiO2 layer is etched by either HF-based wet etching or dry plasma etch. The thin silicon layer (generally called a device layer) of SOI is removed by XeF2 dry etch. This XeF2 etch is very gentle and extremely selective, so the released mirror membrane is not damaged. It is possible to replace SOI with silicon substrate, but this will require tighter DRIE process control as well as generally longer and less efficient XeF2 etch. In the second approach, the actuator film stack is first constructed on a silicon wafer. It helps to use a polyimide intermediate layer such as Kapton because the adhesion between the polyimide and silicon is generally weak. A mirror mount ring is attached by using adhesive. Then, the assembly is partially submerged in liquid water. The water tends to seep between the actuator film stack and silicon substrate. As a result, the actuator membrane can be gently released from the silicon substrate. The actuator membrane is very flat because it is fixed to the mirror mount prior to the release. Deformable mirrors require extremely good surface optical quality. In the technology described here, the deformable mirror is fabricated on pristine substrates such as prime-grade silicon wafers. The deformable mirror is released by selectively removing the substrate. Therefore, the released deformable mirror surface replicates the optical quality of the underlying pristine substrate.

Superhydrophobic SERS substrates based on silicon hierarchical nanostructures

NASA Astrophysics Data System (ADS)

Chen, Xuexian; Wen, Jinxiu; Zhou, Jianhua; Zheng, Zebo; An, Di; Wang, Hao; Xie, Weiguang; Zhan, Runze; Xu, Ningsheng; Chen, Jun; She, Juncong; Chen, Huanjun; Deng, Shaozhi

2018-02-01

Silicon nanostructures have been cultivated as promising surface enhanced Raman scattering (SERS) substrates in terms of their low-loss optical resonance modes, facile functionalization, and compatibility with today’s state-of-the-art CMOS techniques. However, unlike their plasmonic counterparts, the electromagnetic field enhancements induced by silicon nanostructures are relatively small, which restrict their SERS sensing limit to around 10-7 M. To tackle this problem, we propose here a strategy for improving the SERS performance of silicon nanostructures by constructing silicon hierarchical nanostructures with a superhydrophobic surface. The hierarchical nanostructures are binary structures consisted of silicon nanowires (NWs) grown on micropyramids (MPs). After being modified with perfluorooctyltriethoxysilane (PFOT), the nanostructure surface shows a stable superhydrophobicity with a high contact angle of ˜160°. The substrate can allow for concentrating diluted analyte solutions into a specific area during the evaporation of the liquid droplet, whereby the analytes are aggregated into a small volume and can be easily detected by the silicon nanostructure SERS substrate. The analyte molecules (methylene blue: MB) enriched from an aqueous solution lower than 10-8 M can be readily detected. Such a detection limit is ˜100-fold lower than the conventional SERS substrates made of silicon nanostructures. Additionally, the detection limit can be further improved by functionalizing gold nanoparticles onto silicon hierarchical nanostructures, whereby the superhydrophobic characteristics and plasmonic field enhancements can be combined synergistically to give a detection limit down to ˜10-11 M. A gold nanoparticle-functionalized superhydrophobic substrate was employed to detect the spiked melamine in liquid milk. The results showed that the detection limit can be as low as 10-5 M, highlighting the potential of the proposed superhydrophobic SERS substrate in practical food safety inspection applications.

Low temperature deposition of polycrystalline silicon thin films on a flexible polymer substrate by hot wire chemical vapor deposition

NASA Astrophysics Data System (ADS)

Lee, Sang-hoon; Jung, Jae-soo; Lee, Sung-soo; Lee, Sung-bo; Hwang, Nong-moon

2016-11-01

For the applications such as flexible displays and solar cells, the direct deposition of crystalline silicon films on a flexible polymer substrate has been a great issue. Here, we investigated the direct deposition of polycrystalline silicon films on a polyimide film at the substrate temperature of 200 °C. The low temperature deposition of crystalline silicon on a flexible substrate has been successfully made based on two ideas. One is that the Si-Cl-H system has a retrograde solubility of silicon in the gas phase near the substrate temperature. The other is the new concept of non-classical crystallization, where films grow by the building block of nanoparticles formed in the gas phase during hot-wire chemical vapor deposition (HWCVD). The total amount of precipitation of silicon nanoparticles decreased with increasing HCl concentration. By adding HCl, the amount and the size of silicon nanoparticles were reduced remarkably, which is related with the low temperature deposition of silicon films of highly crystalline fraction with a very thin amorphous incubation layer. The dark conductivity of the intrinsic film prepared at the flow rate ratio of RHCl=[HCl]/[SiH4]=3.61 was 1.84×10-6 Scm-1 at room temperature. The Hall mobility of the n-type silicon film prepared at RHCl=3.61 was 5.72 cm2 V-1s-1. These electrical properties of silicon films are high enough and could be used in flexible electric devices.

Rough SERS substrate based on gold coated porous silicon layer prepared on the silicon backside surface

NASA Astrophysics Data System (ADS)

Dridi, H.; Haji, L.; Moadhen, A.

2017-04-01

We report in this paper a novel method to elaborate rough Surface Enhanced Raman Scattering (SERS) substrate. A single layer of porous silicon was formed on the silicon backside surface. Morphological characteristics of the porous silicon layer before and after gold deposition were influenced by the rough character (gold size). The reflectance measurements showed a dependence of the gold nano-grains size on the surface nature, through the Localized Surface Plasmon (LSP) band properties. SERS signal of Rhodamine 6G used as a model analyte, adsorbed on the rough porous silicon layer revealed a marked enhancement of its vibrational modes intensities.

Porous Silicon Covered with Silver Nanoparticles as Surface-Enhanced Raman Scattering (SERS) Substrate for Ultra-Low Concentration Detection.

PubMed

Kosović, Marin; Balarin, Maja; Ivanda, Mile; Đerek, Vedran; Marciuš, Marijan; Ristić, Mira; Gamulin, Ozren

2015-12-01

Microporous and macro-mesoporous silicon templates for surface-enhanced Raman scattering (SERS) substrates were produced by anodization of low doped p-type silicon wafers. By immersion plating in AgNO3, the templates were covered with silver metallic film consisting of different silver nanostructures. Scanning electron microscopy (SEM) micrographs of these SERS substrates showed diverse morphology with significant difference in an average size and size distribution of silver nanoparticles. Ultraviolet-visible-near-infrared (UV-Vis-NIR) reflection spectroscopy showed plasmonic absorption at 398 and 469 nm, which is in accordance with the SEM findings. The activity of the SERS substrates was tested using rhodamine 6G (R6G) dye molecules and 514.5 nm laser excitation. Contrary to the microporous silicon template, the SERS substrate prepared from macro-mesoporous silicon template showed significantly broader size distribution of irregular silver nanoparticles as well as localized surface plasmon resonance closer to excitation laser wavelength. Such silver morphology has high SERS sensitivity that enables ultralow concentration detection of R6G dye molecules up to 10(-15) M. To our knowledge, this is the lowest concentration detected of R6G dye molecules on porous silicon-based SERS substrates, which might even indicate possible single molecule detection.

Wetting of silicone oil onto a cell-seeded substrate

NASA Astrophysics Data System (ADS)

Lu, Yongjie; Chan, Yau Kei; Chao, Youchuang; Shum, Ho Cheung

2017-11-01

Wetting behavior of solid substrates in three-phase systems containing two immiscible liquids are widely studied. There exist many three-phase systems in biological environments, such as droplet-based microfluidics or tamponade of silicone oil for eye surgery. However, few studies focus on wetting behavior of biological surfaces with cells. Here we investigate wetting of silicone oil onto cell-seeded PMMA sheet immersed in water. Using a simple parallel-plate cell, we show the effect of cell density, viscosity of silicone oil, morphology of silicone oil drops and interfacial tension on the wetting phenomenon. The dynamics of wetting is also observed by squeezing silicone oil drop using two parallel plates. Experimental results are explained based on disjoining pressure which is dependent on the interaction of biological surfaces and liquid used. These findings are useful for explaining emulsification of silicone oil in ophthalmological applications.

Integrated Microfluidic Gas Sensors for Water Monitoring

NASA Technical Reports Server (NTRS)

Zhu, L.; Sniadecki, N.; DeVoe, D. L.; Beamesderfer, M.; Semancik, S.; DeVoe, D. L.

2003-01-01

A silicon-based microhotplate tin oxide (SnO2) gas sensor integrated into a polymer-based microfluidic system for monitoring of contaminants in water systems is presented. This device is designed to sample a water source, control the sample vapor pressure within a microchannel using integrated resistive heaters, and direct the vapor past the integrated gas sensor for analysis. The sensor platform takes advantage of novel technology allowing direct integration of discrete silicon chips into a larger polymer microfluidic substrate, including seamless fluidic and electrical interconnects between the substrate and silicon chip.

Method of making a ceramic with preferential oxygen reactive layer

NASA Technical Reports Server (NTRS)

Wang, Hongyu (Inventor); Luthra, Krishan Lal (Inventor)

2003-01-01

A method of forming an article. The method comprises forming a silicon-based substrate that is oxidizable by reaction with an oxidant to form at least one gaseous product and applying an intermediate layer/coating onto the substrate, wherein the intermediate layer/coating is oxidizable to a nongaseous product by reaction with the oxidant in preference to reaction of the silicon-containing substrate with the oxidant.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics.

Improving performance of Si/CdS micro-/nanoribbon p-n heterojunction light emitting diodes by trenched structure

NASA Astrophysics Data System (ADS)

Huang, Shiyuan; Wu, Yuanpeng; Ma, Xiangyang; Yang, Zongyin; Liu, Xu; Yang, Qing

2018-05-01

Realizing high performance silicon based light sources has been an unremitting pursuit for researchers. In this letter, we propose a simple structure to enhance electroluminescence emission and reduce the threshold of injected current of silicon/CdS micro-/nanoribbon p-n heterojunction visible light emitting diodes, by fabricating trenched structure on silicon substrate to mount CdS micro-/nanoribbon. A series of experiments and simulation analysis favors the rationality and validity of our mounting design. After mounting the CdS micro-/nanoribbon, the optical field confinement increases, and absorption and losses from high refractive silicon substrate are effectively reduced. Meanwhile the sharp change of silicon substrate near heterojunction also facilitates the balance between electron current and hole current, which substantially conduces to the stable amplification of electroluminescence emission in CdS micro-/nanoribbon.

Silicon-slurry/aluminide coating. [protecting gas turbine engine vanes and blades

NASA Technical Reports Server (NTRS)

Deadmore, D. L.; Young, S. G. (Inventor)

1983-01-01

A low cost coating protects metallic base system substrates from high temperatures, high gas velocity ovidation, thermal fatigue and hot corrosion and is particularly useful fo protecting vanes and blades in aircraft and land based gas turbine engines. A lacquer slurry comprising cellulose nitrate containing high purity silicon powder is sprayed onto the superalloy substrates. The silicon layer is then aluminized to complete the coating. The Si-Al coating is less costly to produce than advanced aluminides and protects the substrates from oxidation and thermal fatigue for a much longer period of time than the conventional aluminide coatings. While more expensive Pt-Al coatings and physical vapor deposited MCrAlY coatings may last longer or provide equal protection on certain substrates, the Si-Al coating exceeded the performance of both types of coatings on certain superalloys in high gas velocity oxidation and thermal fatigue and increased the resistance of certain superalloys to hot corrosion.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1995-03-21

A method is disclosed for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics. 7 figures.

High-Performance Ultrathin Organic-Inorganic Hybrid Silicon Solar Cells via Solution-Processed Interface Modification.

PubMed

Zhang, Jie; Zhang, Yinan; Song, Tao; Shen, Xinlei; Yu, Xuegong; Lee, Shuit-Tong; Sun, Baoquan; Jia, Baohua

2017-07-05

Organic-inorganic hybrid solar cells based on n-type crystalline silicon and poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) exhibited promising efficiency along with a low-cost fabrication process. In this work, ultrathin flexible silicon substrates, with a thickness as low as tens of micrometers, were employed to fabricate hybrid solar cells to reduce the use of silicon materials. To improve the light-trapping ability, nanostructures were built on the thin silicon substrates by a metal-assisted chemical etching method (MACE). However, nanostructured silicon resulted in a large amount of surface-defect states, causing detrimental charge recombination. Here, the surface was smoothed by solution-processed chemical treatment to reduce the surface/volume ratio of nanostructured silicon. Surface-charge recombination was dramatically suppressed after surface modification with a chemical, associated with improved minority charge-carrier lifetime. As a result, a power conversion efficiency of 9.1% was achieved in the flexible hybrid silicon solar cells, with a substrate thickness as low as ∼14 μm, indicating that interface engineering was essential to improve the hybrid junction quality and photovoltaic characteristics of the hybrid devices.

Metallic coatings on silicon substrates, and methods of forming metallic coatings on silicon substrates

DOEpatents

Branagan, Daniel J [Idaho Falls, ID; Hyde, Timothy A [Idaho Falls, ID; Fincke, James R [Los Alamos, NM

2008-03-11

The invention includes methods of forming a metallic coating on a substrate which contains silicon. A metallic glass layer is formed over a silicon surface of the substrate. The invention includes methods of protecting a silicon substrate. The substrate is provided within a deposition chamber along with a deposition target. Material from the deposition target is deposited over at least a portion of the silicon substrate to form a protective layer or structure which contains metallic glass. The metallic glass comprises iron and one or more of B, Si, P and C. The invention includes structures which have a substrate containing silicon and a metallic layer over the substrate. The metallic layer contains less than or equal to about 2 weight % carbon and has a hardness of at least 9.2 GPa. The metallic layer can have an amorphous microstructure or can be devitrified to have a nanocrystalline microstructure.

AIN-Based Packaging for SiC High-Temperature Electronics

NASA Technical Reports Server (NTRS)

Savrun, Ender

2004-01-01

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Study on Silicon Microstructure Processing Technology Based on Porous Silicon

NASA Astrophysics Data System (ADS)

Shang, Yingqi; Zhang, Linchao; Qi, Hong; Wu, Yalin; Zhang, Yan; Chen, Jing

2018-03-01

Aiming at the heterogeneity of micro - sealed cavity in silicon microstructure processing technology, the technique of preparing micro - sealed cavity of porous silicon is proposed. The effects of different solutions, different substrate doping concentrations, different current densities, and different etching times on the rate, porosity, thickness and morphology of the prepared porous silicon were studied. The porous silicon was prepared by different process parameters and the prepared porous silicon was tested and analyzed. For the test results, optimize the process parameters and experiments. The experimental results show that the porous silicon can be controlled by optimizing the parameters of the etching solution and the doping concentration of the substrate, and the preparation of porous silicon with different porosity can be realized by different doping concentration, so as to realize the preparation of silicon micro-sealed cavity, to solve the sensor sensitive micro-sealed cavity structure heterogeneous problem, greatly increasing the application of the sensor.

Quantum-Well Infrared Photodetector (QWIP) Focal Plane Assembly

NASA Technical Reports Server (NTRS)

Jhabvala, Murzy; Jhabvala, Christine A.; Ewin, Audrey J.; Hess, Larry A.; Hartmann, Thomas M.; La, Anh T.

2012-01-01

A paper describes the Thermal Infrared Sensor (TIRS), a QWIP-based instrument intended to supplement the Operational Land Imager (OLI) for the Landsat Data Continuity Mission (LDCM). The TIRS instrument is a far-infrared imager operating in the pushbroom mode with two IR channels: 10.8 and 12 microns. The focal plane will contain three 640x512 QWIP arrays mounted on a silicon substrate. The silicon substrate is a custom-fabricated carrier board with a single layer of aluminum interconnects. The general fabrication process starts with a 4-in. (approx.10-cm) diameter silicon wafer. The wafer is oxidized, a single substrate contact is etched, and aluminum is deposited, patterned, and alloyed. This technology development is aimed at incorporating three large-format infrared detecting arrays based on GaAs QWIP technology onto a common focal plane with precision alignment of all three arrays. This focal plane must survive the rigors of flight qualification and operate at a temperature of 43 K (-230 C) for five years while orbiting the Earth. The challenges presented include ensuring thermal compatibility among all the components, designing and building a compact, somewhat modular system and ensuring alignment to very tight levels. The multi-array focal plane integrated onto a single silicon substrate is a new application of both QWIP array development and silicon wafer scale integration. The Invar-based assembly has been tested to ensure thermal reliability.

Method for fabricating an ultra-low expansion mask blank having a crystalline silicon layer

DOEpatents

Cardinale, Gregory F.

2002-01-01

A method for fabricating masks for extreme ultraviolet lithography (EUVL) using Ultra-Low Expansion (ULE) substrates and crystalline silicon. ULE substrates are required for the necessary thermal management in EUVL mask blanks, and defect detection and classification have been obtained using crystalline silicon substrate materials. Thus, this method provides the advantages for both the ULE substrate and the crystalline silicon in an Extreme Ultra-Violet (EUV) mask blank. The method is carried out by bonding a crystalline silicon wafer or member to a ULE wafer or substrate and thinning the silicon to produce a 5-10 .mu.m thick crystalline silicon layer on the surface of the ULE substrate. The thinning of the crystalline silicon may be carried out, for example, by chemical mechanical polishing and if necessary or desired, oxidizing the silicon followed by etching to the desired thickness of the silicon.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

NASA Astrophysics Data System (ADS)

Hussain, Muhammad M.; Rojas, Jhonathan P.; Torres Sevilla, Galo A.

2013-05-01

Today's information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor - heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon - industry's darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%).

Laser generation in microdisc resonators with InAs/GaAs quantum dots transferred on a silicon substrate

NASA Astrophysics Data System (ADS)

Nadtochiy, A. M.; Kryzhanovskaya, N. V.; Maximov, M. V.; Zhukov, A. E.; Moiseev, E. I.; Kulagina, M. M.; Vashanova, K. A.; Zadiranov, Yu. M.; Mukhin, I. S.; Arakcheeva, E. M.; Livshits, D.; Lipovskii, A. A.

2013-09-01

Microdisc resonators based on InAs/GaAs quantum dots separated from a GaAs substrate by selective etching and fixed to a silicon substrate by epoxy glue are studied using luminescence spectroscopy. A disc resonator 6 μm in diameter exhibits quasi-single-mode laser generation at a temperature of 78 K with a threshold power of 320 μW and λ/Δλ ˜ 27000.

Fast assembling microarrays of superparamagnetic Fe3O4@Au nanoparticle clusters as reproducible substrates for surface-enhanced Raman scattering

NASA Astrophysics Data System (ADS)

Ye, Min; Wei, Zewen; Hu, Fei; Wang, Jianxin; Ge, Guanglu; Hu, Zhiyuan; Shao, Mingwang; Lee, Shuit-Tong; Liu, Jian

2015-08-01

It is currently a very active research area to develop new types of substrates which integrate various nanomaterials for surface-enhanced Raman scattering (SERS) techniques. Here we report a unique approach to prepare SERS substrates with reproducible performance. It features silicon mold-assisted magnetic assembling of superparamagnetic Fe3O4@Au nanoparticle clusters (NCs) into arrayed microstructures on a wafer scale. This approach enables the fabrication of both silicon-based and hydrogel-based substrates in a sequential manner. We have demonstrated that strong SERS signals can be harvested from these substrates due to an efficient coupling effect between Fe3O4@Au NCs, with enhancement factors >106. These substrates have been confirmed to provide reproducible SERS signals, with low variations in different locations or batches of samples. We investigate the spatial distributions of electromagnetic field enhancement around Fe3O4@Au NCs assemblies using finite-difference-time-domain (FDTD) simulations. The procedure to prepare the substrates is straightforward and fast. The silicon mold can be easily cleaned out and refilled with Fe3O4@Au NCs assisted by a magnet, therefore being re-useable for many cycles. Our approach has integrated microarray technologies and provided a platform for thousands of independently addressable SERS detection, in order to meet the requirements of a rapid, robust, and high throughput performance.It is currently a very active research area to develop new types of substrates which integrate various nanomaterials for surface-enhanced Raman scattering (SERS) techniques. Here we report a unique approach to prepare SERS substrates with reproducible performance. It features silicon mold-assisted magnetic assembling of superparamagnetic Fe3O4@Au nanoparticle clusters (NCs) into arrayed microstructures on a wafer scale. This approach enables the fabrication of both silicon-based and hydrogel-based substrates in a sequential manner. We have demonstrated that strong SERS signals can be harvested from these substrates due to an efficient coupling effect between Fe3O4@Au NCs, with enhancement factors >106. These substrates have been confirmed to provide reproducible SERS signals, with low variations in different locations or batches of samples. We investigate the spatial distributions of electromagnetic field enhancement around Fe3O4@Au NCs assemblies using finite-difference-time-domain (FDTD) simulations. The procedure to prepare the substrates is straightforward and fast. The silicon mold can be easily cleaned out and refilled with Fe3O4@Au NCs assisted by a magnet, therefore being re-useable for many cycles. Our approach has integrated microarray technologies and provided a platform for thousands of independently addressable SERS detection, in order to meet the requirements of a rapid, robust, and high throughput performance. Electronic supplementary information (ESI) available: XRD, reflection spectra, zeta potential, TEM images, evaluations of reproducibility, EDS, tables of EF and RSD values of different substrates. See DOI: 10.1039/c5nr02491a

Quantum cascade lasers grown on silicon.

PubMed

Nguyen-Van, Hoang; Baranov, Alexei N; Loghmari, Zeineb; Cerutti, Laurent; Rodriguez, Jean-Baptiste; Tournet, Julie; Narcy, Gregoire; Boissier, Guilhem; Patriarche, Gilles; Bahriz, Michael; Tournié, Eric; Teissier, Roland

2018-05-08

Technological platforms offering efficient integration of III-V semiconductor lasers with silicon electronics are eagerly awaited by industry. The availability of optoelectronic circuits combining III-V light sources with Si-based photonic and electronic components in a single chip will enable, in particular, the development of ultra-compact spectroscopic systems for mass scale applications. The first circuits of such type were fabricated using heterogeneous integration of semiconductor lasers by bonding the III-V chips onto silicon substrates. Direct epitaxial growth of interband III-V laser diodes on silicon substrates has also been reported, whereas intersubband emitters grown on Si have not yet been demonstrated. We report the first quantum cascade lasers (QCLs) directly grown on a silicon substrate. These InAs/AlSb QCLs grown on Si exhibit high performances, comparable with those of the devices fabricated on their native InAs substrate. The lasers emit near 11 µm, the longest emission wavelength of any laser integrated on Si. Given the wavelength range reachable with InAs/AlSb QCLs, these results open the way to the development of a wide variety of integrated sensors.

Silicon on insulator self-aligned transistors

DOEpatents

McCarthy, Anthony M.

2003-11-18

A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

SOI-silicon as structural layer for NEMS applications

NASA Astrophysics Data System (ADS)

Villarroya, Maria; Figueras, Eduard; Perez-Murano, Francesc; Campabadal, Francesca; Esteve, Jaume; Barniol, Nuria

2003-04-01

The objective of this paper is to present the compatibilization between a standard CMOS on bulk silicon process and the fabrication of nanoelectromechanical systems using Silicon On Insulator (SOI) wafers as substrate. This compatibilization is required as first step to fabricate a very high sensitive mass sensor based on a resonant cantilever with nanometer dimensions using the crystal silicon COI layer as the structural layer. The cantilever is driven electrostatically to its resonance frequency by an electrode placed parallel to the cantilever. A capacitive readout is performed. To achieve very high resolution, very small dimensions of the cantilever (nanometer range) are needed. For this reason, the control and excitation circuitry has to be integrated on the same substrate than the cantilever. Prior to the development of this sensor, it is necessary to develop a substrate able to be used first to integrate a standard CMOS circuit and afterwards to fabricate the nano-resonator. Starting from a SOI wafer and using very simple processes, the SOI silicon layer is removed, except from the areas in which nano-structures will be fabricated; obtaining a silicon substrate with islands with a SOI structure. The CMOS circuitry will be integrated on the bulk silicon region, while the remainder SOI region will be used for the nanoresonator. The silicon oxide of this SOI region is used as insulator; and as sacrificial layer, etched to release the cantilever from the substrate. To assure the cover of the different CMOS layers over the step of the islands, it is essential to avoid very sharp steps.

RF performances of inductors integrated on localized p+-type porous silicon regions

PubMed Central

2012-01-01

To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate. PMID:23009746

Lithographically defined few-electron silicon quantum dots based on a silicon-on-insulator substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Horibe, Kosuke; Oda, Shunri; Kodera, Tetsuo, E-mail: kodera.t.ac@m.titech.ac.jp

2015-02-23

Silicon quantum dot (QD) devices with a proximal single-electron transistor (SET) charge sensor have been fabricated in a metal-oxide-semiconductor structure based on a silicon-on-insulator substrate. The charge state of the QDs was clearly read out using the charge sensor via the SET current. The lithographically defined small QDs enabled clear observation of the few-electron regime of a single QD and a double QD by charge sensing. Tunnel coupling on tunnel barriers of the QDs can be controlled by tuning the top-gate voltages, which can be used for manipulation of the spin quantum bit via exchange interaction between tunnel-coupled QDs. Themore » lithographically defined silicon QD device reported here is technologically simple and does not require electrical gates to create QD confinement potentials, which is advantageous for the integration of complicated constructs such as multiple QD structures with SET charge sensors for the purpose of spin-based quantum computing.« less

Method of protecting a surface with a silicon-slurry/aluminide coating. [coatings for gas turbine engine blades and vanes

NASA Technical Reports Server (NTRS)

Deadmore, D. L.; Young, S. G. (Inventor)

1982-01-01

A low cost coating for protecting metallic base system substrates from high temperatures, high gas velocity oxidation, thermal fatigue and hot corrosion is described. The coating is particularly useful for protecting vanes and blades in aircraft and land based gas turbine engines. A lacquer slurry comprising cellulose nitrate containing high purity silicon powder is sprayed onto the superalloy substrates. The silicon layer is then aluminized to complete the coating. The Si-Al coating is less costly to produce than advanced aluminides and protects the substrate from oxidation and thermal fatigue for a much longer period of time than the conventional aluminide coatings. While more expensive Pt-Al coatings and physical vapor deposited MCrAlY coatings may last longer or provide equal protection on certain substrates, the Si-Al coating exceeded the performance of both types of coatings on certain superalloys in high gas velocity oxidation and thermal fatigue. Also, the Si-Al coating increased the resistance of certain superalloys to hot corrosion.

Fabrication and stabilization of silicon-based photonic crystals with tuned morphology for multi-band optical filtering

NASA Astrophysics Data System (ADS)

Salem, Mohamed Shaker; Abdelaleem, Asmaa Mohamed; El-Gamal, Abear Abdullah; Amin, Mohamed

2017-01-01

One-dimensional silicon-based photonic crystals are formed by the electrochemical anodization of silicon substrates in hydrofluoric acid-based solution using an appropriate current density profile. In order to create a multi-band optical filter, two fabrication approaches are compared and discussed. The first approach utilizes a current profile composed of a linear combination of sinusoidal current waveforms having different frequencies. The individual frequency of the waveform maps to a characteristic stop band in the reflectance spectrum. The stopbands of the optical filter created by the second approach, on the other hand, are controlled by stacking multiple porous silicon rugate multilayers having different fabrication conditions. The morphology of the resulting optical filters is tuned by controlling the electrolyte composition and the type of the silicon substrate. The reduction of sidelobes arising from the interference in the multilayers is observed by applying an index matching current profile to the anodizing current waveform. In order to stabilize the resulting optical filters against natural oxidation, atomic layer deposition of silicon dioxide on the pore wall is employed.

Broadly tunable terahertz difference-frequency generation in quantum cascade lasers on silicon

NASA Astrophysics Data System (ADS)

Jung, Seungyong; Kim, Jae Hyun; Jiang, Yifan; Vijayraghavan, Karun; Belkin, Mikhail A.

2018-01-01

We report broadly tunable terahertz (THz) sources based on intracavity Cherenkov difference-frequency generation in quantum cascade lasers transfer-printed on high-resistivity silicon substrates. Spectral tuning from 1.3 to 4.3 THz was obtained from a 2-mm long laser chip using a modified Littrow external cavity setup. The THz power output and the midinfrared-to-THz conversion efficiency of the devices transferred on silicon are dramatically enhanced, compared with the devices on a native semi-insulating InP substrate. Enhancement is particularly significant at higher THz frequencies, where the tail of the Reststrahlen band results in a strong absorption of THz light in the InP substrate.

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors

PubMed Central

Marrs, Michael A.; Raupp, Gregory B.

2016-01-01

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm2 and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate. PMID:27472329

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors.

PubMed

Marrs, Michael A; Raupp, Gregory B

2016-07-26

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm² and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate.

Monolithically interconnected silicon-film™ module technology

NASA Astrophysics Data System (ADS)

DelleDonne, E. J.; Ford, D. H.; Hall, R. B.; Ingram, A. E.; Rand, J. A.; Barnett, A. M.

1999-03-01

AstroPower is developing an advanced thin-silicon-based, photovoltaic module product. A low-cost monolithic interconnected device is being integrated into a module that combines the design and process features of advanced light trapped, thin-silicon solar cells. This advanced product incorporates a low-cost substrate, a nominally 50-μm thick grown silicon layer with minority carrier diffusion lengths exceeding the active layer thickness, light trapping due to back-surface reflection, and back-surface passivation. The thin silicon layer enables high solar cell performance and can lead to a module conversion efficiency as high as 19%. These performance design features, combined with low-cost manufacturing using relatively low-cost capital equipment, continuous processing and a low-cost substrate, will lead to high-performance, low-cost photovoltaic panels.

Towards substrate engineering of graphene-silicon Schottky diode photodetectors.

PubMed

Selvi, Hakan; Unsuree, Nawapong; Whittaker, Eric; Halsall, Matthew P; Hill, Ernie W; Thomas, Andrew; Parkinson, Patrick; Echtermeyer, Tim J

2018-02-15

Graphene-silicon Schottky diode photodetectors possess beneficial properties such as high responsivities and detectivities, broad spectral wavelength operation and high operating speeds. Various routes and architectures have been employed in the past to fabricate devices. Devices are commonly based on the removal of the silicon-oxide layer on the surface of silicon by wet-etching before deposition of graphene on top of silicon to form the graphene-silicon Schottky junction. In this work, we systematically investigate the influence of the interfacial oxide layer, the fabrication technique employed and the silicon substrate on the light detection capabilities of graphene-silicon Schottky diode photodetectors. The properties of devices are investigated over a broad wavelength range from near-UV to short-/mid-infrared radiation, radiation intensities covering over five orders of magnitude as well as the suitability of devices for high speed operation. Results show that the interfacial layer, depending on the required application, is in fact beneficial to enhance the photodetection properties of such devices. Further, we demonstrate the influence of the silicon substrate on the spectral response and operating speed. Fabricated devices operate over a broad spectral wavelength range from the near-UV to the short-/mid-infrared (thermal) wavelength regime, exhibit high photovoltage responses approaching 10 6 V W -1 and short rise- and fall-times of tens of nanoseconds.

Graphene fixed-end beam arrays based on mechanical exfoliation

NASA Astrophysics Data System (ADS)

Li, Peng; You, Zheng; Haugstad, Greg; Cui, Tianhong

2011-06-01

A low-cost mechanical exfoliation method is presented to transfer graphite to graphene for free-standing beam arrays. Nickel film or photoresist is used to peel off and transfer patterned single-layer or multilayer graphene onto substrates with macroscopic continuity. Free-standing graphene beam arrays are fabricated on both silicon and polymer substrates. Their mechanical properties are studied by atomic force microscopy. Finally, a graphene based radio frequency switch is demonstrated, with its pull-in voltage and graphene-silicon junction investigated.

Study of surface reaction during selective epitaxy growth of silicon by thermodynamic analysis and density functional theory calculation

NASA Astrophysics Data System (ADS)

Mayangsari, Tirta R.; Yusup, Luchana L.; Park, Jae-Min; Blanquet, Elisabeth; Pons, Michel; Jung, Jongwan; Lee, Won-Jun

2017-06-01

We modeled and simulated the surface reaction of silicon precursor on different surfaces by thermodynamic analysis and density functional theory calculation. We considered SiH2Cl2 and argon as the silicon precursor and the carrier gas without etchant gas. First, the equilibrium composition of both gaseous and solid species was analyzed as a function of process temperature. SiCl4 is the dominant gaseous species at below 750 °C, and SiCl2 and HCl are dominant at higher temperatures, and the yield of silicon decreases with increasing temperature over 700 °C due to the etching of silicon by HCl. The yield of silicon for SiO2 substrate is lower than that for silicon substrate, especially at 1000 °C or higher. Zero deposition yield and the etching of SiO2 substrate at higher temperatures leads to selective growth on silicon substrate. Next, the adsorption and the reaction of silicon precursor was simulated on H-terminated silicon (100) substrate and on OH-terminated β-cristobalite substrate. The adsorption and reaction of a SiH2Cl2 molecule are spontaneous for both Si and SiO2 substrates. However, the energy barrier for reaction is very small (6×10-4 eV) for Si substrate, whereas the energy barrier is high (0.33 eV) for SiO2 substrate. This makes the differences in growth rate, which also supports the experimental results in literature.

Epitaxial growth of silicon for layer transfer

DOEpatents

Teplin, Charles; Branz, Howard M

2015-03-24

Methods of preparing a thin crystalline silicon film for transfer and devices utilizing a transferred crystalline silicon film are disclosed. The methods include preparing a silicon growth substrate which has an interface defining substance associated with an exterior surface. The methods further include depositing an epitaxial layer of silicon on the silicon growth substrate at the surface and separating the epitaxial layer from the substrate substantially along the plane or other surface defined by the interface defining substance. The epitaxial layer may be utilized as a thin film of crystalline silicon in any type of semiconductor device which requires a crystalline silicon layer. In use, the epitaxial transfer layer may be associated with a secondary substrate.

Anti-reflective device having an anti-reflective surface formed of silicon spikes with nano-tips

NASA Technical Reports Server (NTRS)

Bae, Youngsam (Inventor); Manohara, Harish (Inventor); Mobasser, Sohrab (Inventor); Lee, Choonsup (Inventor)

2011-01-01

Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.

Anti- reflective device having an anti-reflection surface formed of silicon spikes with nano-tips

NASA Technical Reports Server (NTRS)

Bae, Youngsman (Inventor); Mooasser, Sohrab (Inventor); Manohara, Harish (Inventor); Lee, Choonsup (Inventor); Bae, Kungsam (Inventor)

2009-01-01

Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.

Growth of magnesium diboride thin films on boron buffered Si and silicon-on-insulator substrates by hybrid physical chemical vapor deposition

NASA Astrophysics Data System (ADS)

Withanage, Wenura K.; Penmatsa, Sashank V.; Acharya, Narendra; Melbourne, Thomas; Cunnane, D.; Karasik, B. S.; Xi, X. X.

2018-07-01

We report on the growth of high quality MgB2 thin films on silicon and silicon-on-insulator substrates by hybrid physical chemical vapor deposition. A boron buffer layer was deposited on all sides of the Si substrate to prevent the reaction of Mg vapor and Si. Ar ion milling at a low angle of 1° was used to reduce the roughness of the boron buffer layer before the MgB2 growth. An Ar ion milling at low angle of 1° was also applied to the MgB2 surface to reduce its roughness. The resultant MgB2 films showed excellent superconducting properties and a smooth surface. The process produces thin MgB2 films suitable for waveguide-based superconducting hot electron bolometers and other MgB2-based electronic devices.

Biofunctionalization on alkylated silicon substrate surfaces via "click" chemistry.

PubMed

Qin, Guoting; Santos, Catherine; Zhang, Wen; Li, Yan; Kumar, Amit; Erasquin, Uriel J; Liu, Kai; Muradov, Pavel; Trautner, Barbara Wells; Cai, Chengzhi

2010-11-24

Biofunctionalization of silicon substrates is important to the development of silicon-based biosensors and devices. Compared to conventional organosiloxane films on silicon oxide intermediate layers, organic monolayers directly bound to the nonoxidized silicon substrates via Si-C bonds enhance the sensitivity of detection and the stability against hydrolytic cleavage. Such monolayers presenting a high density of terminal alkynyl groups for bioconjugation via copper-catalyzed azide-alkyne 1,3-dipolar cycloaddition (CuAAC, a "click" reaction) were reported. However, yields of the CuAAC reactions on these monolayer platforms were low. Also, the nonspecific adsorption of proteins on the resultant surfaces remained a major obstacle for many potential biological applications. Herein, we report a new type of "clickable" monolayers grown by selective, photoactivated surface hydrosilylation of α,ω-alkenynes, where the alkynyl terminal is protected with a trimethylgermanyl (TMG) group, on hydrogen-terminated silicon substrates. The TMG groups on the film are readily removed in aqueous solutions in the presence of Cu(I). Significantly, the degermanylation and the subsequent CuAAC reaction with various azides could be combined into a single step in good yields. Thus, oligo(ethylene glycol) (OEG) with an azido tag was attached to the TMG-alkyne surfaces, leading to OEG-terminated surfaces that reduced the nonspecific adsorption of protein (fibrinogen) by >98%. The CuAAC reaction could be performed in microarray format to generate arrays of mannose and biotin with varied densities on the protein-resistant OEG background. We also demonstrated that the monolayer platform could be functionalized with mannose for highly specific capturing of living targets (Escherichia coli expressing fimbriae) onto the silicon substrates.

Plasmonic and silicon spherical nanoparticle antireflective coatings

NASA Astrophysics Data System (ADS)

Baryshnikova, K. V.; Petrov, M. I.; Babicheva, V. E.; Belov, P. A.

2016-03-01

Over the last decade, plasmonic antireflecting nanostructures have been extensively studied to be utilized in various optical and optoelectronic systems such as lenses, solar cells, photodetectors, and others. The growing interest to all-dielectric photonics as an alternative optical technology along with plasmonics motivates us to compare antireflective properties of plasmonic and all-dielectric nanoparticle coatings based on silver and crystalline silicon respectively. Our simulation results for spherical nanoparticles array on top of amorphous silicon show that both silicon and silver coatings demonstrate strong antireflective properties in the visible spectral range. For the first time, we show that zero reflectance from the structure with silicon coatings originates from the destructive interference of electric- and magnetic-dipole responses of nanoparticle array with the wave reflected from the substrate, and we refer to this reflection suppression as substrate-mediated Kerker effect. We theoretically compare the silicon and silver coating effectiveness for the thin-film photovoltaic applications. Silver nanoparticles can be more efficient, enabling up to 30% increase of the overall absorbance in semiconductor layer. Nevertheless, silicon coatings allow up to 64% absorbance increase in the narrow band spectral range because of the substrate-mediated Kerker effect, and band position can be effectively tuned by varying the nanoparticles sizes.

Plasmonic and silicon spherical nanoparticle antireflective coatings

PubMed Central

Baryshnikova, K. V.; Petrov, M. I.; Babicheva, V. E.; Belov, P. A.

2016-01-01

Over the last decade, plasmonic antireflecting nanostructures have been extensively studied to be utilized in various optical and optoelectronic systems such as lenses, solar cells, photodetectors, and others. The growing interest to all-dielectric photonics as an alternative optical technology along with plasmonics motivates us to compare antireflective properties of plasmonic and all-dielectric nanoparticle coatings based on silver and crystalline silicon respectively. Our simulation results for spherical nanoparticles array on top of amorphous silicon show that both silicon and silver coatings demonstrate strong antireflective properties in the visible spectral range. For the first time, we show that zero reflectance from the structure with silicon coatings originates from the destructive interference of electric- and magnetic-dipole responses of nanoparticle array with the wave reflected from the substrate, and we refer to this reflection suppression as substrate-mediated Kerker effect. We theoretically compare the silicon and silver coating effectiveness for the thin-film photovoltaic applications. Silver nanoparticles can be more efficient, enabling up to 30% increase of the overall absorbance in semiconductor layer. Nevertheless, silicon coatings allow up to 64% absorbance increase in the narrow band spectral range because of the substrate-mediated Kerker effect, and band position can be effectively tuned by varying the nanoparticles sizes. PMID:26926602

High performance hybrid silicon micropillar solar cell based on light trapping characteristics of Cu nanoparticles

NASA Astrophysics Data System (ADS)

Zhang, Yulong; Fan, Zhiqiang; Zhang, Weijia; Ma, Qiang; Jiang, Zhaoyi; Ma, Denghao

2018-05-01

High performance silicon combined structure (micropillar with Cu nanoparticles) solar cell has been synthesized from N-type silicon substrates based on the micropillar array. The combined structure solar cell exhibited higher short circuit current rather than the silicon miropillar solar cell, which the parameters of micropillar array are the same. Due to the Cu nanoparticles were decorated on the surface of silicon micropillar array, the photovoltaic properties of cells have been improved. In addition, the optimal efficiency of 11.5% was measured for the combined structure solar cell, which is better than the silicon micropillar cell.

Evaluation of the Effect of Silicone Contamination on Various Bond Systems and the Feasibility of Removing the Contamination

NASA Technical Reports Server (NTRS)

Stanley, Stephanie D.

2008-01-01

Silicone is a contaminant that can cause catastrophic failure of a bond system depending on the materials and processes used to fabricate the bond system, Unfortunately, more and more materials are fabricated using silicone. The purpose of this testing was to evaluate which bond systems are sensitive to silicone contamination and whether or not a cleaning process could be utilized to remove the silicone to bring the bond system performance back to baseline. Due to the extensive nature of the testing attempts will be made to generalize the understanding within classes of substrates, bond systems, and surface preparation and cleaning methods. This study was done by contaminating various meta! (steel, inconel, and aluminum), phenolic (carbon cloth phenolic and glass cloth phenolic), and rubber (natural rubber, asbestos-silicone dioxide filled natural butyldiene rubber, silica-filled ethylene propylenediene monomer, and carbon-filled ethylene propylenediene monomer) substrates which were then bonded using various adhesives and coatings (epoxy-based adhesives, paints, ablative compounds, and Chemlok adhesives) to determine the effect silicone contamination has on a given bond system's performance. The test configurations depended on the bond system being evaluated. The study also evaluated the feasibility of removing the silicone contamination by cleaning the contaminated substrate prior to bonding. The cleaning processes also varied depending on bond system.

Surface modification of high temperature iron alloys

DOEpatents

Park, Jong-Hee

1995-01-01

A method and article of manufacture of a coated iron based alloy. The method includes providing an iron based alloy substrate, depositing a silicon containing layer on the alloy surface while maintaining the alloy at a temperature of about 700.degree. C.-1200.degree. C. to diffuse silicon into the alloy surface and exposing the alloy surface to an ammonia atmosphere to form a silicon/oxygen/nitrogen containing protective layer on the iron based alloy.

Surface modification of high temperature iron alloys

DOEpatents

Park, J.H.

1995-06-06

A method and article of manufacture of a coated iron based alloy are disclosed. The method includes providing an iron based alloy substrate, depositing a silicon containing layer on the alloy surface while maintaining the alloy at a temperature of about 700--1200 C to diffuse silicon into the alloy surface and exposing the alloy surface to an ammonia atmosphere to form a silicon/oxygen/nitrogen containing protective layer on the iron based alloy. 13 figs.

Back contact to film silicon on metal for photovoltaic cells

DOEpatents

Branz, Howard M.; Teplin, Charles; Stradins, Pauls

2013-06-18

A crystal oriented metal back contact for solar cells is disclosed herein. In one embodiment, a photovoltaic device and methods for making the photovoltaic device are disclosed. The photovoltaic device includes a metal substrate with a crystalline orientation and a heteroepitaxial crystal silicon layer having the same crystal orientation of the metal substrate. A heteroepitaxial buffer layer having the crystal orientation of the metal substrate is positioned between the substrate and the crystal silicon layer to reduce diffusion of metal from the metal foil into the crystal silicon layer and provide chemical compatibility with the heteroepitaxial crystal silicon layer. Additionally, the buffer layer includes one or more electrically conductive pathways to electrically couple the crystal silicon layer and the metal substrate.

Surface treatment effect on Si (111) substrate for carbon deposition using DC unbalanced magnetron sputtering

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aji, A. S., E-mail: aji.ravazes70@gmail.com; Sahdan, M. F.; Hendra, I. B.

In this work, we studied the effect of HF treatment in silicon (111) substrate surface for depositing thin layer carbon. We performed the deposition of carbon by using DC Unbalanced Magnetron Sputtering with carbon pallet (5% Fe) as target. From SEM characterization results it can be concluded that the carbon layer on HF treated substrate is more uniform than on substrate without treated. Carbon deposition rate is higher as confirmed by AFM results if the silicon substrate is treated by HF solution. EDAX characterization results tell that silicon (111) substrate with HF treatment have more carbon fraction than substrate withoutmore » treatment. These results confirmed that HF treatment on silicon Si (111) substrates could enhance the carbon deposition by using DC sputtering. Afterward, the carbon atomic arrangement on silicon (111) surface is studied by performing thermal annealing process to 900 °C. From Raman spectroscopy results, thin film carbon is not changing until 600 °C thermal budged. But, when temperature increase to 900 °C, thin film carbon is starting to diffuse to silicon (111) substrates.« less

The Optical Emission and Absorption Properties of Silicon-Germanium Superlattice Structures Grown on Non-Conventional Silicon Substrate Orientation

DTIC Science & Technology

1994-08-01

evidence needed to someday design and build a silicon- based infrared detector that can efficiently detect light at normal incidence. I chose to...detector a. spectral response b. dark current c. qutiantuam efficiency MAKE DEVICE Figure 1. A simple schematic diagram describing a basic materials... based . If we can extend the capabilities of silicon into the near infrared (iR), the nation would be well- positioned to exploit our advantage in this

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

Low cost silicon-on-ceramic photovoltaic solar cells

NASA Technical Reports Server (NTRS)

Koepke, B. G.; Heaps, J. D.; Grung, B. L.; Zook, J. D.; Sibold, J. D.; Leipold, M. H.

1980-01-01

A technique has been developed for coating low-cost mullite-based refractory substrates with thin layers of solar cell quality silicon. The technique involves first carbonizing one surface of the ceramic and then contacting it with molten silicon. The silicon wets the carbonized surface and, under the proper thermal conditions, solidifies as a large-grained sheet. Solar cells produced from this composite silicon-on-ceramic material have exhibited total area conversion efficiencies of ten percent.

Substrate for thin silicon solar cells

DOEpatents

Ciszek, Theodore F.

1998-01-01

A substrate for a photovoltaic device wherein the substrate is the base upon which photosensitive material is to be grown and the substrate comprises an alloy having boron in a range from 0.1 atomic % of the alloy to 1.3 atomic % of the alloy and the substrate has a resistivity less than 3.times.10.sup.-3 ohm-cm.

Collapsed adhesion of carbon nanotubes on silicon substrates: continuum mechanics and atomistic simulations

NASA Astrophysics Data System (ADS)

Yuan, Xuebo; Wang, Youshan

2018-02-01

Carbon nanotubes (CNTs) can undergo collapse from the ordinary cylindrical configurations to bilayer ribbons when adhered on substrates. In this study, the collapsed adhesion of CNTs on the silicon substrates is investigated using both classical molecular dynamics (MD) simulations and continuum analysis. The governing equations and transversality conditions are derived based on the minimum potential energy principle and the energy-variational method, considering both the van der Waals interactions between CNTs and substrates and those inside CNTs. Closed-form solutions for the collapsed configuration are obtained which show good agreement with the results of MD simulations. The stability of adhesive configurations is investigated by analyzing the energy states. It is found that the adhesive states of single-walled CNTs (SWCNTs) (n, n) on the silicon substrates can be categorized by two critical radii, 0.716 and 0.892 nm. For SWCNTs with radius larger than 0.892 nm, they would fully collapse on the silicon substrates. For SWCNTs with radius less than 0.716 nm, the initial cylindrical configuration is energetically favorable. For SWCNTs with radius between two critical radii, the radially deformed state is metastable. The non-contact ends of all collapsed SWCNTs are identical with the same arc length of 2.38 nm. Finally, the role of number of walls on the adhesive configuration is investigated quantitatively. For multi-walled CNTs with the number of walls exceeding a certain value, the cylindrical configuration is stable due to the increasing bending stiffness. The present study can be useful for the design of CNT-based nanodevices.

Deposition method for producing silicon carbide high-temperature semiconductors

DOEpatents

Hsu, George C.; Rohatgi, Naresh K.

1987-01-01

An improved deposition method for producing silicon carbide high-temperature semiconductor material comprising placing a semiconductor substrate composed of silicon carbide in a fluidized bed silicon carbide deposition reactor, fluidizing the bed particles by hydrogen gas in a mildly bubbling mode through a gas distributor and heating the substrate at temperatures around 1200.degree.-1500.degree. C. thereby depositing a layer of silicon carbide on the semiconductor substrate.

Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

NASA Astrophysics Data System (ADS)

Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

2003-06-01

We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

Preparation of composite micro/nano structure on the silicon surface by reactive ion etching: Enhanced anti-reflective and hydrophobic properties

NASA Astrophysics Data System (ADS)

Zeng, Yu; Fan, Xiaoli; Chen, Jiajia; He, Siyu; Yi, Zao; Ye, Xin; Yi, Yougen

2018-05-01

A silicon substrate with micro-pyramid structure (black silicon) is prepared by wet chemical etching and then subjected to reactive ion etching (RIE) in the mixed gas condition of SF6, CHF3 and He. We systematically study the impacts of flow rates of SF6, CHF3 and He, the etching pressure and the etching time on the surface morphology and reflectivity through various characterizations. Meanwhile, we explore and obtain the optimal combination of parameters for the preparation of composite structure that match the RIE process based on the basis of micro-pyramid silicon substrate. The composite sample prepared under the optimum parameters exhibits excellent anti-reflective performance, hydrophobic, self-cleaning and anti-corrosive properties. Based on the above characteristics, the composite micro/nano structure can be applied to solar cells, photodetectors, LEDs, outdoor devices and other important fields.

Method for formation of thin film transistors on plastic substrates

DOEpatents

Carey, Paul G.; Smith, Patrick M.; Sigmon, Thomas W.; Aceves, Randy C.

1998-10-06

A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics.

Silicon-based hot electron emitting substrate with double tunneling

NASA Astrophysics Data System (ADS)

Chen, Fei; Zhan, Xinghua; Salcic, Zoran; Wong, Chee Cheong; Gao, Wei

2017-07-01

We propose a novel silicon structure, Hot Electron Emitting Substrate (HEES), which exhibits important effect of repeated tunneling at two different voltage ranges, which we refer to as double tunneling. In ambient atmosphere and room temperature, the I-V characteristic of HEES shows two current peaks during voltage sweep from 2 to 15 V. These two peaks are formed by the Fowler-Nordheim (FN) tunneling effect and tunneling diode mechanism, respectively.

Analysis of signals propagating in a phononic crystal PZT layer deposited on a silicon substrate.

PubMed

Hladky-Hennion, Anne-Christine; Vasseur, Jérôme; Dubus, Bertrand; Morvan, Bruno; Wilkie-Chancellier, Nicolas; Martinez, Loïc

2013-12-01

The design of a stop-band filter constituted by a periodically patterned lead zirconate titanate (PZT) layer, polarized along its thickness, deposited on a silicon substrate and sandwiched between interdigitated electrodes for emission/reception of guided elastic waves, is investigated. The filter characteristics are theoretically evaluated by using finite element simulations: dispersion curves of a patterned PZT layer with a specific pattern geometry deposited on a silicon substrate present an absolute stop band. The whole structure is modeled with realistic conditions, including appropriate interdigitated electrodes to propagate a guided mode in the piezoelectric layer. A robust method for signal analysis based on the Gabor transform is applied to treat transmitted signals; extract attenuation, group delays, and wave number variations versus frequency; and identify stop-band filter characteristics.

Manufacture of silicon-based devices having disordered sulfur-doped surface layers

DOEpatents

Carey, III; Edward, James [Newton, MA; Mazur, Eric [Concord, MA

2008-04-08

The present invention provides methods of fabricating a radiation-absorbing semiconductor wafer by irradiating at least one surface location of a silicon substrate, e.g., an n-doped crystalline silicon, by a plurality of temporally short laser pulses, e.g., femtosecond pulses, while exposing that location to a substance, e.g., SF.sub.6, having an electron-donating constituent so as to generate a substantially disordered surface layer (i.e., a microstructured layer) that incorporates a concentration of that electron-donating constituent, e.g., sulfur. The substrate is also annealed at an elevated temperature and for a duration selected to enhance the charge carrier density in the surface layer. For example, the substrate can be annealed at a temperature in a range of about 700 K to about 900 K.

Application Of Optical Processing For Growth Of Silicon Dioxide

DOEpatents

Sopori, Bhushan L.

1997-06-17

A process for producing a silicon dioxide film on a surface of a silicon substrate. The process comprises illuminating a silicon substrate in a substantially pure oxygen atmosphere with a broad spectrum of visible and infrared light at an optical power density of from about 3 watts/cm.sup.2 to about 6 watts/cm.sup.2 for a time period sufficient to produce a silicon dioxide film on the surface of the silicon substrate. An optimum optical power density is about 4 watts/cm.sup.2 for growth of a 100.ANG.-300.ANG. film at a resultant temperature of about 400.degree. C. Deep level transient spectroscopy analysis detects no measurable impurities introduced into the silicon substrate during silicon oxide production and shows the interface state density at the SiO.sub.2 /Si interface to be very low.

Fabricating amorphous silicon solar cells by varying the temperature _of the substrate during deposition of the amorphous silicon layer

DOEpatents

Carlson, David E.

1982-01-01

An improved process for fabricating amorphous silicon solar cells in which the temperature of the substrate is varied during the deposition of the amorphous silicon layer is described. Solar cells manufactured in accordance with this process are shown to have increased efficiencies and fill factors when compared to solar cells manufactured with a constant substrate temperature during deposition of the amorphous silicon layer.

Performance study of double SOI image sensors

NASA Astrophysics Data System (ADS)

Miyoshi, T.; Arai, Y.; Fujita, Y.; Hamasaki, R.; Hara, K.; Ikegami, Y.; Kurachi, I.; Nishimura, R.; Ono, S.; Tauchi, K.; Tsuboyama, T.; Yamada, M.

2018-02-01

Double silicon-on-insulator (DSOI) sensors composed of two thin silicon layers and one thick silicon layer have been developed since 2011. The thick substrate consists of high resistivity silicon with p-n junctions while the thin layers are used as SOI-CMOS circuitry and as shielding to reduce the back-gate effect and crosstalk between the sensor and the circuitry. In 2014, a high-resolution integration-type pixel sensor, INTPIX8, was developed based on the DSOI concept. This device is fabricated using a Czochralski p-type (Cz-p) substrate in contrast to a single SOI (SSOI) device having a single thin silicon layer and a Float Zone p-type (FZ-p) substrate. In the present work, X-ray spectra of both DSOI and SSOI sensors were obtained using an Am-241 radiation source at four gain settings. The gain of the DSOI sensor was found to be approximately three times that of the SSOI device because the coupling capacitance is reduced by the DSOI structure. An X-ray imaging demonstration was also performed and high spatial resolution X-ray images were obtained.

Directed dewetting of amorphous silicon film by a donut-shaped laser pulse.

PubMed

Yoo, Jae-Hyuck; In, Jung Bin; Zheng, Cheng; Sakellari, Ioanna; Raman, Rajesh N; Matthews, Manyalibo J; Elhadj, Selim; Grigoropoulos, Costas P

2015-04-24

Irradiation of a thin film with a beam-shaped laser is proposed to achieve site-selectively controlled dewetting of the film into nanoscale structures. As a proof of concept, the laser-directed dewetting of an amorphous silicon thin film on a glass substrate is demonstrated using a donut-shaped laser beam. Upon irradiation of a single laser pulse, the silicon film melts and dewets on the substrate surface. The irradiation with the donut beam induces an unconventional lateral temperature profile in the film, leading to thermocapillary-induced transport of the molten silicon to the center of the beam spot. Upon solidification, the ultrathin amorphous silicon film is transformed to a crystalline silicon nanodome of increased height. This morphological change enables further dimensional reduction of the nanodome as well as removal of the surrounding film material by isotropic silicon etching. These results suggest that laser-based dewetting of thin films can be an effective way for scalable manufacturing of patterned nanostructures.

Silicon Satellites: Picosats, Nanosats, and Microsats

NASA Technical Reports Server (NTRS)

Janson, Siegfried W.

1995-01-01

Silicon, the most abundant solid element in the Earth's lithosphere, is a useful material for spacecraft construction. Silicon is stronger than stainless steel, has a thermal conductivity about half that of aluminum, is transparent to much of the infrared radiation spectrum, and can form a stable oxide. These unique properties enable silicon to become most of the mass of a satellite, it can simultaneously function as structure, heat transfer system, radiation shield, optics, and semiconductor substrate. Semiconductor batch-fabrication techniques can produce low-power digital circuits, low-power analog circuits, silicon-based radio frequency circuits, and micro-electromechanical systems (MEMS) such as thrusters and acceleration sensors on silicon substrates. By exploiting these fabrication techniques, it is possible to produce highly-integrated satellites for a number of applications. This paper analyzes the limitations of silicon satellites due to size. Picosatellites (approximately 1 gram mass), nanosatellites (about 1 kg mass), and highly capable microsatellites (about 10 kg mass) can perform various missions with lifetimes of a few days to greater than a decade.

Porous silicon-copper phthalocyanine heterostructure based photoelectrochemical cell

NASA Astrophysics Data System (ADS)

A. Betty, C.; N, Padma; Arora, Shalav; Survaiya, Parth; Bhattacharya, Debarati; Choudhury, Sipra; Roy, Mainak

2018-01-01

A hybrid solar cell consisting of nanostructured p-type porous silicon (PS) deposited with visible light absorbing dye, Copper Phthalocyanine (CuPc) has been prepared in the photoelectrochemical cell configuration. P-type PS with (100) and (111) orientations which have different porous structures were used for studying the effects of the substrate morphology on the cell efficiency. Heterostructures were prepared by depositing three different thicknesses of CuPc for optimizing the cell efficiency. Structural and surface characterizations were studied using XRD, Raman, SEM and AFM on the PS-CuPc heterostructure. XRD spectrum on both plane silicon and porous silicon indicates the π-π stacking of CuPc with increased disorder for CuPc film on porous silicon. Electrochemical characterizations under sun light type radiation have been carried out to evaluate the photosensitivity of the heterostructure. Between the two different substrates, (100) PS gives better photocurrent, possibly due to the higher surface area and lower series resistance of the structure. Among the (100) PS substrates, (100) PS with 15 nm CuPc film gives Voc more than 1 V resulting in higher efficiency for the cell. The study suggests the scope for optimization of solar cell efficiency using various combinations of the substrate structure and thickness of the sensitizing layer.

A new detector concept for silicon photomultipliers

NASA Astrophysics Data System (ADS)

Sadigov, A.; Ahmadov, F.; Ahmadov, G.; Ariffin, A.; Khorev, S.; Sadygov, Z.; Suleymanov, S.; Zerrouk, F.; Madatov, R.

2016-07-01

A new design and principle of operation of silicon photomultipliers are presented. The new design comprises a semiconductor substrate and an array of independent micro-phototransistors formed on the substrate. Each micro-phototransistor comprises a photosensitive base operating in Geiger mode and an individual micro-emitter covering a small part of the base layer, thereby creating, together with this latter, a micro-transistor. Both micro-emitters and photosensitive base layers are connected with two respective independent metal grids via their individual micro-resistors. The total value of signal gain in the proposed silicon photomultiplier is a result of both the avalanche gain in the base layer and the corresponding gain in the micro-transistor. The main goals of the new design are: significantly lower both optical crosstalk and after-pulse effects at high signal amplification, improve speed of single photoelectron pulse formation, and significantly reduce the device capacitance.

Fabrication of flexible and vertical silicon nanowire electronics.

PubMed

Weisse, Jeffrey M; Lee, Chi Hwan; Kim, Dong Rip; Zheng, Xiaolin

2012-06-13

Vertical silicon nanowire (SiNW) array devices directly connected on both sides to metallic contacts were fabricated on various non-Si-based substrates (e.g., glass, plastics, and metal foils) in order to fully exploit the nanomaterial properties for final applications. The devices were realized with uniform length Ag-assisted electroless etched SiNW arrays that were detached from their fabrication substrate, typically Si wafers, reattached to arbitrary substrates, and formed with metallic contacts on both sides of the NW array. Electrical characterization of the SiNW array devices exhibits good current-voltage characteristics consistent with the SiNW morphology.

Evaluation of the Effect of Silicone Contamination on Various Bond Systems and the Feasibility of Removing the Contamination

NASA Technical Reports Server (NTRS)

Stanley, Stephanie D.

2008-01-01

Silicone is a contaminant that can cause catastrophic failure of a bond system depending on the materials and processes used to fabricate the bond system. Unfortunately, more and more materials are fabricated using silicone. The purpose of this testing was to evaluate which bond systems are sensitive to silicone contamination and whether or not a cleaning process could be utilized to remove the silicone to bring the bond system performance back to baseline. Due to the extensive nature of the testing, attempts will be made to generalize the understanding within classes of substrates, bond systems, and surface preparation and cleaning methods. This study was done by contaminating various metal (steel, Inconel, and aluminum), phenolic (carbon-cloth phenolic [CCP] and glass-cloth phenolic [GCP]), and rubber (natural rubber, asbestos-silicone dioxide filled natural butyldiene rubber [ASNBR]; silica-filled ethylene propylenediene monomer [SFEPDM], and carbon-filled ethylene propylenediene monomer [CFEPDM]) substrates which were then bonded using various adhesives and coatings (epoxy-based adhesives, paints, ablative compounds, and Chemlok adhesives) to determine the effect silicone contamination has on a given bond system's performance. The test configurations depended on the bond system being evaluated. The study also evaluated the feasibility of removing the silicone contamination by cleaning the contaminated substrate prior to bonding. The cleaning processes also varied depending on bond system.

Chemical Interaction-Guided, Metal-Free Growth of Large-Area Hexagonal Boron Nitride on Silicon-Based Substrates.

PubMed

Behura, Sanjay; Nguyen, Phong; Debbarma, Rousan; Che, Songwei; Seacrist, Michael R; Berry, Vikas

2017-05-23

Hexagonal boron nitride (h-BN) is an ideal platform for interfacing with two-dimensional (2D) nanomaterials to reduce carrier scattering for high-quality 2D electronics. However, scalable, transfer-free growth of hexagonal boron nitride (h-BN) remains a challenge. Currently, h-BN-based 2D heterostructures require exfoliation or chemical transfer of h-BN grown on metals resulting in small areas or significant interfacial impurities. Here, we demonstrate a surface-chemistry-influenced transfer-free growth of large-area, uniform, and smooth h-BN directly on silicon (Si)-based substrates, including Si, silicon nitride (Si 3 N 4 ), and silicon dioxide (SiO 2 ), via low-pressure chemical vapor deposition. The growth rates increase with substrate electronegativity, Si < Si 3 N 4 < SiO 2 , consistent with the adsorption rates calculated for the precursor molecules via atomistic molecular dynamics simulations. Under graphene with high grain density, this h-BN film acts as a polymer-free, planar-dielectric interface increasing carrier mobility by 3.5-fold attributed to reduced surface roughness and charged impurities. This single-step, chemical interaction guided, metal-free growth mechanism of h-BN for graphene heterostructures establishes a potential pathway for the design of complex and integrated 2D-heterostructured circuitry.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

PubMed

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Electroless epitaxial etching for semiconductor applications

DOEpatents

McCarthy, Anthony M.

2002-01-01

A method for fabricating thin-film single-crystal silicon on insulator substrates using electroless etching for achieving efficient etch stopping on epitaxial silicon substrates. Microelectric circuits and devices are prepared on epitaxial silicon wafers in a standard fabrication facility. The wafers are bonded to a holding substrate. The silicon bulk is removed using electroless etching leaving the circuit contained within the epitaxial layer remaining on the holding substrate. A photolithographic operation is then performed to define streets and wire bond pad areas for electrical access to the circuit.

Method for forming metallic silicide films on silicon substrates by ion beam deposition

DOEpatents

Zuhr, Raymond A.; Holland, Orin W.

1990-01-01

Metallic silicide films are formed on silicon substrates by contacting the substrates with a low-energy ion beam of metal ions while moderately heating the substrate. The heating of the substrate provides for the diffusion of silicon atoms through the film as it is being formed to the surface of the film for interaction with the metal ions as they contact the diffused silicon. The metallic silicide films provided by the present invention are contaminant free, of uniform stoichiometry, large grain size, and exhibit low resistivity values which are of particular usefulness for integrated circuit production.

Multi-junction solar cell device

DOEpatents

Friedman, Daniel J.; Geisz, John F.

2007-12-18

A multi-junction solar cell device (10) is provided. The multi-junction solar cell device (10) comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device (10) comprises a bottom active cell (20) having a single-crystal silicon substrate base and an emitter layer (23). The multi-junction device (10) further comprises one or two subsequent active cells each having a base layer (32) and an emitter layer (23) with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal III-V semiconductor alloy that is substantially lattice-matched to the silicon substrate (22). The polarity of the active p-n junction cells is either p-on-n or n-on-p. The present invention further includes a method for substantially lattice matching single-crystal III-V semiconductor layers with the silicon substrate (22) by including boron and/or nitrogen in the chemical structure of these layers.

Back-side hydrogenation technique for defect passivation in silicon solar cells

DOEpatents

Sopori, Bhushan L.

1994-01-01

A two-step back-side hydrogenation process includes the steps of first bombarding the back side of the silicon substrate with hydrogen ions with intensities and for a time sufficient to implant enough hydrogen atoms into the silicon substrate to potentially passivate substantially all of the defects and impurities in the silicon substrate, and then illuminating the silicon substrate with electromagnetic radiation to activate the implanted hydrogen, so that it can passivate the defects and impurities in the substrate. The illumination step also annihilates the hydrogen-induced defects. The illumination step is carried out according to a two-stage illumination schedule, the first or low-power stage of which subjects the substrate to electromagnetic radiation that has sufficient intensity to activate the implanted hydrogen, yet not drive the hydrogen from the substrate. The second or high-power illumination stage subjects the substrate to higher intensity electromagnetic radiation, which is sufficient to annihilate the hydrogen-induced defects and sinter/alloy the metal contacts.

Back-side hydrogenation technique for defect passivation in silicon solar cells

DOEpatents

Sopori, B.L.

1994-04-19

A two-step back-side hydrogenation process includes the steps of first bombarding the back side of the silicon substrate with hydrogen ions with intensities and for a time sufficient to implant enough hydrogen atoms into the silicon substrate to potentially passivate substantially all of the defects and impurities in the silicon substrate, and then illuminating the silicon substrate with electromagnetic radiation to activate the implanted hydrogen, so that it can passivate the defects and impurities in the substrate. The illumination step also annihilates the hydrogen-induced defects. The illumination step is carried out according to a two-stage illumination schedule, the first or low-power stage of which subjects the substrate to electromagnetic radiation that has sufficient intensity to activate the implanted hydrogen, yet not drive the hydrogen from the substrate. The second or high-power illumination stage subjects the substrate to higher intensity electromagnetic radiation, which is sufficient to annihilate the hydrogen-induced defects and sinter/alloy the metal contacts. 3 figures.

Hot-Electron Bolometer Mixers on Silicon-on-Insulator Substrates for Terahertz Frequencies

NASA Technical Reports Server (NTRS)

Skalare, Anders; Stern, Jeffrey; Bumble, Bruce; Maiwald, Frank

2005-01-01

A terahertz Hot-Electron Bolometer (HEB) mixer design using device substrates based on Silicon-On-Insulator (SOI) technology is described. This substrate technology allows very thin chips (6 pm) with almost arbitrary shape to be manufactured, so that they can be tightly fitted into a waveguide structure and operated at very high frequencies with only low risk for power leakages and resonance modes. The NbTiN-based bolometers are contacted by gold beam-leads, while other beamleads are used to hold the chip in place in the waveguide test fixture. The initial tests yielded an equivalent receiver noise temperature of 3460 K double-sideband at a local oscillator frequency of 1.462 THz and an intermediate frequency of 1.4 GHz.

Application of optical processing for growth of silicon dioxide

DOEpatents

Sopori, B.L.

1997-06-17

A process for producing a silicon dioxide film on a surface of a silicon substrate is disclosed. The process comprises illuminating a silicon substrate in a substantially pure oxygen atmosphere with a broad spectrum of visible and infrared light at an optical power density of from about 3 watts/cm{sup 2} to about 6 watts/cm{sup 2} for a time period sufficient to produce a silicon dioxide film on the surface of the silicon substrate. An optimum optical power density is about 4 watts/cm{sup 2} for growth of a 100{angstrom}-300{angstrom} film at a resultant temperature of about 400 C. Deep level transient spectroscopy analysis detects no measurable impurities introduced into the silicon substrate during silicon oxide production and shows the interface state density at the SiO{sub 2}/Si interface to be very low. 1 fig.

Gold@silver bimetal nanoparticles/pyramidal silicon 3D substrate with high reproducibility for high-performance SERS

NASA Astrophysics Data System (ADS)

Zhang, Chao; Jiang, Shou Zhen; Yang, Cheng; Li, Chong Hui; Huo, Yan Yan; Liu, Xiao Yun; Liu, Ai Hua; Wei, Qin; Gao, Sai Sai; Gao, Xing Guo; Man, Bao Yuan

2016-05-01

A novel and efficient surface enhanced Raman scattering (SERS) substrate has been presented based on Gold@silver/pyramidal silicon 3D substrate (Au@Ag/3D-Si). By combining the SERS activity of Ag, the chemical stability of Au and the large field enhancement of 3D-Si, the Au@Ag/3D-Si substrate possesses perfect sensitivity, homogeneity, reproducibility and chemical stability. Using R6G as probe molecule, the SERS results imply that the Au@Ag/3D-Si substrate is superior to the 3D-Si, Ag/3D-Si and Au/3D-Si substrate. We also confirmed these excellent behaviors in theory via a commercial COMSOL software. The corresponding experimental and theoretical results indicate that our proposed Au@Ag/3D-Si substrate is expected to develop new opportunities for label-free SERS detections in biological sensors, biomedical diagnostics and food safety.

Solar cell circuit and method for manufacturing solar cells

NASA Technical Reports Server (NTRS)

Mardesich, Nick (Inventor)

2010-01-01

The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.

Influence of a silicon (Si14)-based coating substrate for biomaterials on fibroblast growth and human C5a.

PubMed

Hiebl, B; Hopperdietzel, C; Hünigen, H; Jung, F; Scharnagl, N

2013-01-01

Despite considerable efforts in biomaterial development there is still a lack on substrates for cardiovascular tissue engineering approaches which allow the establishment of a tight a functional endothelial layer on their surface to provide hemocompatibility. The study aimed to test the biocompatibility of a silicon (Si14)-based coating substrate (Supershine Medicare, Permanon) which was designed to resist temperatures from -40°C up to 300°C and which allows the use of established heat-inducing sterilization techniques respectively. By X-ray photoelectron spectroscopy it could be validated that this substrate is able to establish a 40-50 nm thick layer of silica, oxygen and carbon without including any further elements from the substrate on an exemplary selection of materials (silicone, soda-lime-silica glass, stainless steel). Analysis of the LDH-release, the cell activity/proliferation (MTS assay) and the cell phenotype after growing 3T3 cells with extracts of the coated materials did not indicate any signs of cytotoxicity. Additionally by measuring the C5a release after exposure of the coated materials with human serum it could be demonstrated, that the coating had no impact on the activation of the complement system. These results generally suggest the tested substrate as a promising candidate for the coating of materials which are aimed to be used in cardiovascular tissue engineering approaches.

Method for rapid, controllable growth and thickness, of epitaxial silicon films

DOEpatents

Wang, Qi [Littleton, CO; Stradins, Paul [Golden, CO; Teplin, Charles [Boulder, CO; Branz, Howard M [Boulder, CO

2009-10-13

A method of producing epitaxial silicon films on a c-Si wafer substrate using hot wire chemical vapor deposition by controlling the rate of silicon deposition in a temperature range that spans the transition from a monohydride to a hydrogen free silicon surface in a vacuum, to obtain phase-pure epitaxial silicon film of increased thickness is disclosed. The method includes placing a c-Si substrate in a HWCVD reactor chamber. The method also includes supplying a gas containing silicon at a sufficient rate into the reaction chamber to interact with the substrate to deposit a layer containing silicon thereon at a predefined growth rate to obtain phase-pure epitaxial silicon film of increased thickness.

Electrochemical Fabrication of Nanostructures on Porous Silicon for Biochemical Sensing Platforms.

PubMed

Ko, Euna; Hwang, Joonki; Kim, Ji Hye; Lee, Joo Heon; Lee, Sung Hwan; Tran, Van-Khue; Chung, Woo Sung; Park, Chan Ho; Choo, Jaebum; Seong, Gi Hun

2016-01-01

We present a method for the electrochemical patterning of gold nanoparticles (AuNPs) or silver nanoparticles (AgNPs) on porous silicon, and explore their applications in: (1) the quantitative analysis of hydroxylamine as a chemical sensing electrode and (2) as a highly sensitive surface-enhanced Raman spectroscopy (SERS) substrate for Rhodamine 6G. For hydroxylamine detection, AuNPs-porous silicon can enhance the electrochemical oxidation of hydroxylamine. The current changed linearly for concentrations ranging from 100 μM to 1.32 mM (R(2) = 0.995), and the detection limit was determined to be as low as 55 μM. When used as SERS substrates, these materials also showed that nanoparticles decorated on porous silicon substrates have more SERS hot spots than those decorated on crystalline silicon substrates, resulting in a larger SERS signal. Moreover, AgNPs-porous silicon provided five-times higher signal compared to AuNPs-porous silicon. From these results, we expect that nanoparticles decorated on porous silicon substrates can be used in various types of biochemical sensing platforms.

Method of Forming Three-Dimensional Semiconductors Structures

NASA Technical Reports Server (NTRS)

Fathauer, Robert W. (Inventor)

2002-01-01

Silicon and metal are coevaporated onto a silicon substrate in a molecular beam epitaxy system with a larger than stoichiometric amount of silicon so as to epitaxially grow columns of metal silicide embedded in a matrix of single crystal, epitaxially grown silicon. Higher substrate temperatures and lower deposition rates yield larger columns that are farther apart while more silicon produces smaller columns. Column shapes and locations are selected by seeding the substrate with metal silicide starting regions. A variety of 3-dimensional, exemplary electronic devices are disclosed.

Method for formation of thin film transistors on plastic substrates

DOEpatents

Carey, P.G.; Smith, P.M.; Sigmon, T.W.; Aceves, R.C.

1998-10-06

A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics. 5 figs.

Method of bonding silver to glass and mirrors produced according to this method

DOEpatents

Pitts, J.R.; Thomas, T.M.; Czanderna, A.W.

1984-07-31

A method for adhering silver to a glass substrate for producing mirrors includes attaining a silicon enriched substrate surface by reducing the oxygen therein in a vacuum and then vacuum depositing a silver layer onto the silicon enriched surface. The silicon enrichment can be attained by electron beam bombardment, ion beam bombardment, or neutral beam bombardment. It can also be attained by depositing a metal, such as aluminum, on the substrate surface, allowing the metal to oxidize by pulling oxygen from the substrate surface, thereby leaving a silicon enriched surface, and then etching or eroding the metal oxide layer away to expose the silicon enriched surface. Ultraviolet rays can be used to maintain dangling silicon bonds on the enriched surface until covalent bonding with the silver can occur. This disclosure also includes encapsulated mirrors with diffusion layers built therein. One of these mirrors is assembled on a polymer substrate.

Method of bonding silver to glass and mirrors produced according to this method

DOEpatents

Pitts, John R.; Thomas, Terence M.; Czanderna, Alvin W.

1985-01-01

A method for adhering silver to a glass substrate for producing mirrors includes attaining a silicon enriched substrate surface by reducing the oxygen therein in a vacuum and then vacuum depositing a silver layer onto the silicon enriched surface. The silicon enrichment can be attained by electron beam bombardment, ion beam bombardment, or neutral beam bombardment. It can also be attained by depositing a metal, such as aluminum, on the substrate surface, allowing the metal to oxidize by pulling oxygen from the substrate surface, thereby leaving a silicon enriched surface, and then etching or eroding the metal oxide layer away to expose the silicon enriched surface. Ultraviolet rays can be used to maintain dangling silicon bonds on the enriched surface until covalent bonding with the silver can occur. This disclosure also includes encapsulated mirrors with diffusion layers built therein. One of these mirrors is assembled on a polymer substrate.

Investigations of different doping concentration of phosphorus and boron into silicon substrate on the variable temperature Raman characteristics

NASA Astrophysics Data System (ADS)

Li, Xiaoli; Ding, Kai; Liu, Jian; Gao, Junxuan; Zhang, Weifeng

2018-01-01

Different doped silicon substrates have different device applications and have been used to fabricate solar panels and large scale integrated circuits. The thermal transport in silicon substrates are dominated by lattice vibrations, doping type, and doping concentration. In this paper, a variable-temperature Raman spectroscopic system is applied to record the frequency and linewidth changes of the silicon peak at 520 cm-1 in five chips of silicon substrate with different doping concentration of phosphorus and boron at the 83K to 1473K temperature range. The doping has better heat sensitive to temperature on the frequency shift over the low temperature range from 83K to 300K but on FWHM in high temperature range from 300K to 1473K. The results will be helpful for fundamental study and practical applications of silicon substrates.

Effects of patterning induced stress relaxation in strained SOI/SiGe layers and substrate

NASA Astrophysics Data System (ADS)

Hermann, P.; Hecker, M.; Renn, F.; Rölke, M.; Kolanek, K.; Rinderknecht, J.; Eng, L. M.

2011-06-01

Local stress fields in strained silicon structures important for CMOS technology are essentially related to size effects and properties of involved materials. In the present investigation, Raman spectroscopy was utilized to analyze the stress distribution within strained silicon (sSi) and silicon-germanium (SiGe) island structures. As a result of the structuring of initially unpatterned strained films, a size-dependent relaxation of the intrinsic film stresses was obtained in agreement with model calculations. This changed stress state in the features also results in the appearance of opposing stresses in the substrate underneath the islands. Even for strained island structures on top of silicon-on-insulator (SOI) wafers, corresponding stresses in the silicon substrate underneath the oxide were detected. Within structures, the stress relaxation is more pronounced for islands on SOI substrates as compared to those on bulk silicon substrates.

Mo-Si-B-Based Coatings for Ceramic Base Substrates

NASA Technical Reports Server (NTRS)

Perepezko, John Harry (Inventor); Sakidja, Ridwan (Inventor); Ritt, Patrick (Inventor)

2015-01-01

Alumina-containing coatings based on molybdenum (Mo), silicon (Si), and boron (B) ("MoSiB coatings") that form protective, oxidation-resistant scales on ceramic substrate at high temperatures are provided. The protective scales comprise an aluminoborosilicate glass, and may additionally contain molybdenum. Two-stage deposition methods for forming the coatings are also provided.

Nanobonding: A key technology for emerging applications in health and environmental sciences

NASA Astrophysics Data System (ADS)

Howlader, Matiar M. R.; Deen, M. Jamal; Suga, Tadatomo

2015-03-01

In this paper, surface-activation-based nanobonding technology and its applications are described. This bonding technology allows for the integration of electronic, photonic, fluidic and mechanical components into small form-factor systems for emerging sensing and imaging applications in health and environmental sciences. Here, we describe four different nanobonding techniques that have been used for the integration of various substrates — silicon, gallium arsenide, glass, and gold. We use these substrates to create electronic (silicon), photonic (silicon and gallium arsenide), microelectromechanical (glass and silicon), and fluidic (silicon and glass) components for biosensing and bioimaging systems being developed. Our nanobonding technologies provide void-free, strong, and nanometer scale bonding at room temperature or at low temperatures (<200 °C), and do not require chemicals, adhesives, or high external pressure. The interfaces of the nanobonded materials in ultra-high vacuum and in air correspond to covalent bonds, and hydrogen or hydroxyl bonds, respectively.

Ceramic material suitable for repair of a space vehicle component in a microgravity and vacuum environment, method of making same, and method of repairing a space vehicle component

NASA Technical Reports Server (NTRS)

Riedell, James A. (Inventor); Easler, Timothy E. (Inventor)

2009-01-01

A precursor of a ceramic adhesive suitable for use in a vacuum, thermal, and microgravity environment. The precursor of the ceramic adhesive includes a silicon-based, preceramic polymer and at least one ceramic powder selected from the group consisting of aluminum oxide, aluminum nitride, boron carbide, boron oxide, boron nitride, hafnium boride, hafnium carbide, hafnium oxide, lithium aluminate, molybdenum silicide, niobium carbide, niobium nitride, silicon boride, silicon carbide, silicon oxide, silicon nitride, tin oxide, tantalum boride, tantalum carbide, tantalum oxide, tantalum nitride, titanium boride, titanium carbide, titanium oxide, titanium nitride, yttrium oxide, zirconium diboride, zirconium carbide, zirconium oxide, and zirconium silicate. Methods of forming the ceramic adhesive and of repairing a substrate in a vacuum and microgravity environment are also disclosed, as is a substrate repaired with the ceramic adhesive.

Silicon insulator-based dielectrophoresis devices for minimized heating effects.

PubMed

Zellner, Phillip; Agah, Masoud

2012-08-01

Concentration of biological specimens that are extremely dilute in a solution is of paramount importance for their detection. Microfluidic chips based on insulator-based DEP (iDEP) have been used to selectively concentrate bacteria and viruses. iDEP biochips are currently fabricated with glass or polymer substrates to allow for high electric fields within the channels. Joule heating is a well-known problem in these substrates and can lead to decreased throughput and even device failure. In this work, we present, for the first time, highly efficient trapping and separation of particles in DC iDEP devices that are fabricated on silicon using a single-etch-step three-dimensional microfabrication process with greatly improved heat dissipation properties. Fabrication in silicon allows for greater heat dissipation for identical geometries and operating conditions. The 3D fabrication allows for higher performance at lower applied potentials. Thermal measurements were performed on both the presented silicon chips and previously published PDMS devices comprised of microposts. Trapping and separation of 1 and 2 μm polystyrene particles was demonstrated. These results demonstrate the feasibility of high-performance silicon iDEP devices for the next generation of sorting and concentration microsystems. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

SERS detection of R6G based on a novel graphene oxide/silver nanoparticles/silicon pyramid arrays structure.

PubMed

Zhang, C; Jiang, S Z; Huo, Y Y; Liu, A H; Xu, S C; Liu, X Y; Sun, Z C; Xu, Y Y; Li, Z; Man, B Y

2015-09-21

We present a novel surface-enhanced Raman scattering (SERS) substrate based on graphene oxide/silver nanoparticles/silicon pyramid arrays structure (GO/Ag/PSi). The SERS behaviors are discussed and compared by the detection of R6G. Based on the contrast experiments with PSi, GO/PSi, Ag/PSi and GO/AgA/PSi as SERS substrate, the perfect bio-compatibility, good homogeneity and chemical stability were confirmed. We also calculated the electric field distributions using Finite-difference time-domain (FDTD) analysis to further understand the GO/Ag/PSi structure as a perfect SERS platform. These experimental and theoretical results imply that the GO/Ag/PSi with regular pyramids array is expected to be an effective substrate for label-free sensitive SERS detections in areas of medicine, food safety and biotechnology.

Durable crystalline Si photovoltaic modules based on silicone-sheet encapsulants

NASA Astrophysics Data System (ADS)

Hara, Kohjiro; Ohwada, Hiroto; Furihata, Tomoyoshi; Masuda, Atsushi

2018-02-01

Crystalline Si photovoltaic (PV) modules were fabricated with sheets of poly(dimethylsiloxane) (silicone) as an encapsulant. The long-term durability of the silicone-encapsulated PV modules was experimentally investigated. The silicone-based modules enhanced the long-term durability against potential-induced degradation (PID) and a damp-heat (DH) condition at 85 °C with 85% relative humidity (RH). In addition, we designed and fabricated substrate-type Si PV modules based on the silicone encapsulant and an Al-alloy plate as the substratum, which demonstrated high impact resistance and high incombustible performance. The high chemical stability, high volume resistivity, rubber-like elasticity, and incombustibility of the silicone encapsulant resulted in the high durability of the modules. Our results indicate that silicone is an attractive encapsulation material, as it improves the long-term durability of crystalline Si PV modules.

Improved process for epitaxial deposition of silicon on prediffused substrates

NASA Technical Reports Server (NTRS)

Clarke, M. G.; Halsor, J. L.; Word, J. C.

1968-01-01

Process for fabricating integrated circuits uniformly deposits silicon epitaxially on prediffused substrates without affecting the sublayer diffusion pattern. Two silicon deposits from different sources, and deposited at different temperatures, protect the sublayer pattern from the silicon tetrachloride reaction.

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

NASA Astrophysics Data System (ADS)

Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

2018-06-01

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

Gauge Factor and Stretchability of Silicon-on-Polymer Strain Gauges

PubMed Central

Yang, Shixuan; Lu, Nanshu

2013-01-01

Strain gauges are widely applied to measure mechanical deformation of structures and specimens. While metallic foil gauges usually have a gauge factor slightly over 2, single crystalline silicon demonstrates intrinsic gauge factors as high as 200. Although silicon is an intrinsically stiff and brittle material, flexible and even stretchable strain gauges have been achieved by integrating thin silicon strips on soft and deformable polymer substrates. To achieve a fundamental understanding of the large variance in gauge factor and stretchability of reported flexible/stretchable silicon-on-polymer strain gauges, finite element and analytically models are established to reveal the effects of the length of the silicon strip, and the thickness and modulus of the polymer substrate. Analytical results for two limiting cases, i.e., infinitely thick substrate and infinitely long strip, have found good agreement with FEM results. We have discovered that strains in silicon resistor can vary by orders of magnitude with different substrate materials whereas strip length or substrate thickness only affects the strain level mildly. While the average strain in silicon reflects the gauge factor, the maximum strain in silicon governs the stretchability of the system. The tradeoff between gauge factor and stretchability of silicon-on-polymer strain gauges has been proposed and discussed. PMID:23881128

GaN-on-Silicon - Present capabilities and future directions

NASA Astrophysics Data System (ADS)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

Oxygen-aided synthesis of polycrystalline graphene on silicon dioxide substrates.

PubMed

Chen, Jianyi; Wen, Yugeng; Guo, Yunlong; Wu, Bin; Huang, Liping; Xue, Yunzhou; Geng, Dechao; Wang, Dong; Yu, Gui; Liu, Yunqi

2011-11-09

We report the metal-catalyst-free synthesis of high-quality polycrystalline graphene on dielectric substrates [silicon dioxide (SiO(2)) or quartz] using an oxygen-aided chemical vapor deposition (CVD) process. The growth was carried out using a CVD system at atmospheric pressure. After high-temperature activation of the growth substrates in air, high-quality polycrystalline graphene is subsequently grown on SiO(2) by utilizing the oxygen-based nucleation sites. The growth mechanism is analogous to that of growth for single-walled carbon nanotubes. Graphene-modified SiO(2) substrates can be directly used in transparent conducting films and field-effect devices. The carrier mobilities are about 531 cm(2) V(-1) s(-1) in air and 472 cm(2) V(-1) s(-1) in N(2), which are close to that of metal-catalyzed polycrystalline graphene. The method avoids the need for either a metal catalyst or a complicated and skilled postgrowth transfer process and is compatible with current silicon processing techniques.

Dip-Coating Fabrication of Solar Cells

NASA Technical Reports Server (NTRS)

Koepke, B.; Suave, D.

1982-01-01

Inexpensive silicon solar cells made by simple dip technique. Cooling shoes direct flow of helium on graphite-coated ceramic substrate to solidify film of liquid silicon on graphite surface as substrate is withdrawn from molten silicon. After heaters control cooling of film and substrate to prevent cracking. Gas jets exit at points about 10 mm from substrate surfaces and 6 to 10 mm above melt surface.

Influence of deposition rate on the structural properties of plasma-enhanced CVD epitaxial silicon.

PubMed

Chen, Wanghua; Cariou, Romain; Hamon, Gwenaëlle; Léal, Ronan; Maurice, Jean-Luc; Cabarrocas, Pere Roca I

2017-03-06

Solar cells based on epitaxial silicon layers as the absorber attract increasing attention because of the potential cost reduction. In this work, we studied the influence of the deposition rate on the structural properties of epitaxial silicon layers produced by plasma-enhanced chemical vapor deposition (epi-PECVD) using silane as a precursor and hydrogen as a carrier gas. We found that the crystalline quality of epi-PECVD layers depends on their thickness and deposition rate. Moreover, increasing the deposition rate may lead to epitaxy breakdown. In that case, we observe the formation of embedded amorphous silicon cones in the epi-PECVD layer. To explain this phenomenon, we develop a model based on the coupling of hydrogen and built-in strain. By optimizing the deposition conditions to avoid epitaxy breakdown, including substrate temperatures and plasma potential, we have been able to synthesize epi-PECVD layers up to a deposition rate of 8.3 Å/s. In such case, we found that the incorporation of hydrogen in the hydrogenated crystalline silicon can reach 4 at. % at a substrate temperature of 350 °C.

Influence of deposition rate on the structural properties of plasma-enhanced CVD epitaxial silicon

PubMed Central

Chen, Wanghua; Cariou, Romain; Hamon, Gwenaëlle; Léal, Ronan; Maurice, Jean-Luc; Cabarrocas, Pere Roca i

2017-01-01

Solar cells based on epitaxial silicon layers as the absorber attract increasing attention because of the potential cost reduction. In this work, we studied the influence of the deposition rate on the structural properties of epitaxial silicon layers produced by plasma-enhanced chemical vapor deposition (epi-PECVD) using silane as a precursor and hydrogen as a carrier gas. We found that the crystalline quality of epi-PECVD layers depends on their thickness and deposition rate. Moreover, increasing the deposition rate may lead to epitaxy breakdown. In that case, we observe the formation of embedded amorphous silicon cones in the epi-PECVD layer. To explain this phenomenon, we develop a model based on the coupling of hydrogen and built-in strain. By optimizing the deposition conditions to avoid epitaxy breakdown, including substrate temperatures and plasma potential, we have been able to synthesize epi-PECVD layers up to a deposition rate of 8.3 Å/s. In such case, we found that the incorporation of hydrogen in the hydrogenated crystalline silicon can reach 4 at. % at a substrate temperature of 350 °C. PMID:28262840

Continuous coating of silicon-on-ceramic

NASA Technical Reports Server (NTRS)

Heaps, J. D.; Schuldt, S. B.; Grung, B. L.; Zook, J. D.; Butter, C. D.

1980-01-01

Growth of sheet silicon on low-cost substrates has been demonstrated by the silicon coating with inverted meniscus (SCIM) technique. A mullite-based ceramic substrate is coated with carbon and then passed over a trough of molten silicon with a raised meniscus. Solidification occurs at the trailing edge of the downstream meniscus, producing a silicon-on-ceramic (SOC) layer. Meniscus shape and stability are controlled by varying the level of molten silicon in a reservoir connected to the trough. The thermal conditions for growth and the crystallographic texture of the SOC layers are similar to those produced by dip-coating, the original technique of meniscus-controlled growth. The thermal conditions for growth have been analyzed in some detail. The analysis correctly predicts the velocity-thickness relationship and the liquid-solid interface shape for dip-coating, and appears to be equally applicable to SCIM-coating. Solar cells made from dip-coated SOC material have demonstrated efficiencies of 10% on 4-sq cm cells and 9.9% on 10-sq cm cells.

Synthesis of Poly-Silicon Thin Films on Glass Substrate Using Laser Initiated Metal Induced Crystallization of Amorphous Silicon for Space Power Application

NASA Technical Reports Server (NTRS)

Abu-Safe, Husam H.; Naseem, Hameed A.; Brown, William D.

2007-01-01

Poly-silicon thin films on glass substrates are synthesized using laser initiated metal induced crystallization of hydrogenated amorphous silicon films. These films can be used to fabricate solar cells on low cost glass and flexible substrates. The process starts by depositing 200 nm amorphous silicon films on the glass substrates. Following this, 200 nm of sputtered aluminum films were deposited on top of the silicon layers. The samples are irradiated with an argon ion cw laser beam for annealing. Laser power densities ranging from 4 to 9 W/cm2 were used in the annealing process. Each area on the sample is irradiated for a different exposure time. Optical microscopy was used to examine any cracks in the films and loss of adhesion to the substrates. X-Ray diffraction patterns from the initial results indicated the crystallization in the films. Scanning electron microscopy shows dendritic growth. The composition analysis of the crystallized films was conducted using Energy Dispersive x-ray Spectroscopy. The results of poly-silicon films synthesis on space qualified flexible substrates such as Kapton are also presented.

Process for Smoothing an Si Substrate after Etching of SiO2

NASA Technical Reports Server (NTRS)

Turner, Tasha; Wu, Chi

2003-01-01

A reactive-ion etching (RIE) process for smoothing a silicon substrate has been devised. The process is especially useful for smoothing those silicon areas that have been exposed by etching a pattern of holes in a layer of silicon dioxide that covers the substrate. Applications in which one could utilize smooth silicon surfaces like those produced by this process include fabrication of optical waveguides, epitaxial deposition of silicon on selected areas of silicon substrates, and preparation of silicon substrates for deposition of adherent metal layers. During etching away of a layer of SiO2 that covers an Si substrate, a polymer becomes deposited on the substrate, and the substrate surface becomes rough (roughness height approximately equal to 50 nm) as a result of over-etching or of deposition of the polymer. While it is possible to smooth a silicon substrate by wet chemical etching, the undesired consequences of wet chemical etching can include compromising the integrity of the SiO2 sidewalls and undercutting of the adjacent areas of the silicon dioxide that are meant to be left intact. The present RIE process results in anisotropic etching that removes the polymer and reduces height of roughness of the silicon substrate to less than 10 nm while leaving the SiO2 sidewalls intact and vertical. Control over substrate versus sidewall etching (in particular, preferential etching of the substrate) is achieved through selection of process parameters, including gas flow, power, and pressure. Such control is not uniformly and repeatably achievable in wet chemical etching. The recipe for the present RIE process is the following: Etch 1 - A mixture of CF4 and O2 gases flowing at rates of 25 to 75 and 75 to 125 standard cubic centimeters per minute (stdcm3/min), respectively; power between 44 and 55 W; and pressure between 45 and 55 mtorr (between 6.0 and 7.3 Pa). The etch rate lies between approximately equal to 3 and approximately equal to 6 nm/minute. Etch 2 - O2 gas flowing at 75 to 125 stdcm3/min, power between 44 and 55 W, and pressure between 50 and 100 mtorr (between 6.7 and 13.3 Pa).

Nanofabrication on unconventional substrates using transferred hard masks

DOE PAGES

Li, Luozhou; Bayn, Igal; Lu, Ming; ...

2015-01-15

Here, a major challenge in nanofabrication is to pattern unconventional substrates that cannot be processed for a variety of reasons, such as incompatibility with spin coating, electron beam lithography, optical lithography, or wet chemical steps. Here, we present a versatile nanofabrication method based on re-usable silicon membrane hard masks, patterned using standard lithography and mature silicon processing technology. These masks, transferred precisely onto targeted regions, can be in the millimetre scale. They allow for fabrication on a wide range of substrates, including rough, soft, and non-conductive materials, enabling feature linewidths down to 10 nm. Plasma etching, lift-off, and ion implantationmore » are realized without the need for scanning electron/ion beam processing, UV exposure, or wet etching on target substrates.« less

High-Temperature Annealing as a Method for the Silicon Nanoclusters Growth in Stoichiometric Silicon Dioxide

NASA Astrophysics Data System (ADS)

Ivanova, E. V.; Dementev, P. A.; Sitnikova, A. A.; Aleksandrov, O. V.; Zamoryanskaya, M. V.

2018-07-01

A method for the growth of nanocomposite layers in stoichiometric amorphous silicon dioxide is proposed. It is shown that, after annealing at a temperature of 1150°C in nitrogen atmosphere, a layer containing silicon nanoclusters is formed. Silicon nanoclusters have a crystal structure and a size of 3-6 nm. In a film grown on a n-type substrate, a layer of silicon nanoclusters with a thickness of about 10 nm is observed. In the case of a film grown on a p-type substrate, a nanocomposite layer with a thickness of about 100 nm is observed. The difference in the formation of a nanocomposite layer in films on various substrates is associated with the doping of silicon dioxide with impurities from the substrate during the growth of the film. The formation of the nanocomposite layer was confirmed by transmission electron microscopy, XPS and local cathodoluminescence studies.

Molecular dynamics study about the effect of substrate temperature on a-Si:H structure

NASA Astrophysics Data System (ADS)

Luo, Yaorong; Gong, Hongyong; Zhou, Naigen; Huang, Haibin; Zhou, Lang

2018-01-01

Molecular dynamics simulation of the microstructure of hydrogenated amorphous silicon (a-Si:H) thin film with different substrate temperatures has been performed based on the Tersoff potential. The results showed that: the silicon thin film maintained amorphous structure in the substrate temperature range from 200 to 1000 K; high substrate temperature could smooth the surface. The first neighbour Voronoi polyhedron was dominated by the tetrahedron. When the substrate temperature increased, the content of tetrahedrons increased due to the transition from pentahedrons and hexahedrons to tetrahedrons. The change of the second neighbour Voronoi polyhedron could be classified into two cases: one case with low medium coordination number decreased as temperature increased, while the other one with high medium coordination number showed an opposite change tendency. It indicated that the local paracrystalline structure arrangement of the second neighbour atoms had been enhanced as substrate temperature rose.

Protecting the properties of monolayer MoS 2 on silicon based substrates with an atomically thin buffer

DOE PAGES

Man, Michael K. L.; Deckoff-Jones, Skylar; Winchester, Andrew; ...

2016-02-12

Semiconducting 2D materials, like transition metal dichalcogenides (TMDs), have gained much attention for their potential in opto-electronic devices, valleytronic schemes, and semi-conducting to metallic phase engineering. However, like graphene and other atomically thin materials, they lose key properties when placed on a substrate like silicon, including quenching of photoluminescence, distorted crystalline structure, and rough surface morphology. The ability to protect these properties of monolayer TMDs, such as molybdenum disulfide (MoS 2), on standard Si-based substrates, will enable their use in opto-electronic devices and scientific investigations. Here we show that an atomically thin buffer layer of hexagonal-boron nitride (hBN) protects themore » range of key opto-electronic, structural, and morphological properties of monolayer MoS 2 on Si-based substrates. The hBN buffer restores sharp diffraction patterns, improves monolayer flatness by nearly two-orders of magnitude, and causes over an order of magnitude enhancement in photoluminescence, compared to bare Si and SiO 2 substrates. Lastly, our demonstration provides a way of integrating MoS 2 and other 2D monolayers onto standard Si-substrates, thus furthering their technological applications and scientific investigations.« less

Selective etching of silicon carbide films

DOEpatents

Gao, Di; Howe, Roger T.; Maboudian, Roya

2006-12-19

A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer to expose underlying areas of the substrate; and etching the underlying areas of the substrate with a plasma at a first rate, while etching the mask layer at a rate lower than the first rate.

Transfer of micro and nano-photonic silicon nanomembrane waveguide devices on flexible substrates.

PubMed

Ghaffari, Afshin; Hosseini, Amir; Xu, Xiaochuan; Kwong, David; Subbaraman, Harish; Chen, Ray T

2010-09-13

This paper demonstrates transfer of optical devices without extra un-patterned silicon onto low-cost, flexible plastic substrates using single-crystal silicon nanomembranes. Employing this transfer technique, stacking two layers of silicon nanomembranes with photonic crystal waveguide in the first layer and multi mode interference couplers in the second layer is shown, respectively. This technique is promising to realize high density integration of multilayer hybrid structures on flexible substrates.

Subband Structure and Effective Mass in the Inversion Layer of a Strain Si-Based Alloy P-Type MOSFET.

PubMed

Chen, Kuan-Ting; Fan, Jun Wei; Chang, Shu-Tong; Lin, Chung-Yi

2015-03-01

In this paper, the subband structure and effective mass of an Si-based alloy inversion layer in a PMOSFET are studied theoretically. The strain condition considered in our calculations is the intrinsic strain resulting from growth of the silicon-carbon alloy on a (001) Si substrate and mechanical uniaxial stress. The quantum confinement effect resulting from the vertically effective electric field was incorporated into the k · p calculation. The distinct effective mass, such as the quantization effective mass and the density-of-states (DOS) effective mass, as well as the subband structure of the silicon-carbon alloy inversion layer for a PMOSFET under substrate strain and various effective electric field strengths, were all investigated. Ore results show that subband structure of relaxed silicon-carbon alloys with low carbon content are almost the same as silicon. We find that an external stress applied parallel to the channel direction can efficiently reduce the effective mass along the channel direction, thus producing hole mobility enhancement.

Gallium nitride heterostructures on 3D structured silicon.

PubMed

Fündling, Sönke; Sökmen, Unsal; Peiner, Erwin; Weimann, Thomas; Hinze, Peter; Jahn, Uwe; Trampert, Achim; Riechert, Henning; Bakin, Andrey; Wehmann, Hergo-Heinrich; Waag, Andreas

2008-10-08

We investigated GaN-based heterostructures grown on three-dimensionally patterned Si(111) substrates by metal organic vapour phase epitaxy, with the goal of fabricating well controlled high quality, defect reduced GaN-based nanoLEDs. The high aspect ratios of such pillars minimize the influence of the lattice mismatched substrate and improve the material quality. In contrast to other approaches, we employed deep etched silicon substrates to achieve a controlled pillar growth. For that a special low temperature inductively coupled plasma etching process has been developed. InGaN/GaN multi-quantum-well structures have been incorporated into the pillars. We found a pronounced dependence of the morphology of the GaN structures on the size and pitch of the pillars. Spatially resolved optical properties of the structures are analysed by cathodoluminescence.

Magnetic Dirac Fermions and Chern Insulator Supported on Pristine Silicon Surface

NASA Astrophysics Data System (ADS)

Fu, Huixia; Liu, Zheng; Sun, Jia-Tao; Meng, Sheng

Emergence of ferromagnetism in non-magnetic semiconductors is strongly desirable, especially in topological materials thanks to the possibility to achieve quantum anomalous Hall effect. Based on first principles calculations, we propose that for Si thin film grown on metal substrate, the pristine Si(111)-r3xr3 surface with a spontaneous weak reconstruction has a strong tendency of ferromagnetism and nontrivial topological properties, characterized by spin polarized Dirac-fermion surface states. In contrast to conventional routes relying on introduction of alien charge carriers or specially patterned substrates, the spontaneous magnetic order and spin-orbit coupling on the pristine silicon surface together gives rise to quantized anomalous Hall effect with a finite Chern number C = -1. This work suggests exciting opportunities in silicon-based spintronics and quantum computing free from alien dopants or proximity effects.

Hybrid Integrated Platforms for Silicon Photonics

PubMed Central

Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

2010-01-01

A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

Buried oxide layer in silicon

DOEpatents

Sadana, Devendra Kumar; Holland, Orin Wayne

2001-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Chemical resistivity of self-assembled monolayer covalently attached to silicon substrate to hydrofluoric acid and ammonium fluoride

NASA Astrophysics Data System (ADS)

Saito, N.; Youda, S.; Hayashi, K.; Sugimura, H.; Takai, O.

2003-06-01

Self-assembled monolayers (SAMs) were prepared on hydrogen-terminated silicon substrates through chemical vapor deposition using 1-hexadecene (HD) as a precursor. The HD-SAMs prepared in an atmosphere under a reduced pressure (≈50 Pa) showed better chemical resistivities to hydrofluoric acid and ammonium fluoride (NH 4F) solutions than that of an organosilane SAM formed on oxide-covered silicon substrates. The surface covered with the HD-SAM was micro-patterned by vacuum ultraviolet photolithography and consequently divided into two areas terminated with HD-SAM or silicon dioxide. This micro-patterned sample was immersed in a 40 vol.% NH 4F aqueous solution. Surface images obtained by an optical microscopy clearly show that the micro-patterns of HD-SAM/silicon dioxide were successfully transferred into the silicon substrate.

Wet-chemical systems and methods for producing black silicon substrates

DOEpatents

Yost, Vernon; Yuan, Hao-Chih; Page, Matthew

2015-05-19

A wet-chemical method of producing a black silicon substrate. The method comprising soaking single crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution. The substrate is combined with an etchant solution that forms a uniform noble metal nanoparticle induced Black Etch of the silicon wafer, resulting in a nanoparticle that is kinetically stabilized. The method comprising combining with an etchant solution having equal volumes acetonitrile/acetic acid:hydrofluoric acid:hydrogen peroxide.

Continuous-flow mass production of silicon nanowires via substrate-enhanced metal-catalyzed electroless etching of silicon with dissolved oxygen as an oxidant.

PubMed

Hu, Ya; Peng, Kui-Qing; Liu, Lin; Qiao, Zhen; Huang, Xing; Wu, Xiao-Ling; Meng, Xiang-Min; Lee, Shuit-Tong

2014-01-13

Silicon nanowires (SiNWs) are attracting growing interest due to their unique properties and promising applications in photovoltaic devices, thermoelectric devices, lithium-ion batteries, and biotechnology. Low-cost mass production of SiNWs is essential for SiNWs-based nanotechnology commercialization. However, economic, controlled large-scale production of SiNWs remains challenging and rarely attainable. Here, we demonstrate a facile strategy capable of low-cost, continuous-flow mass production of SiNWs on an industrial scale. The strategy relies on substrate-enhanced metal-catalyzed electroless etching (MCEE) of silicon using dissolved oxygen in aqueous hydrofluoric acid (HF) solution as an oxidant. The distinct advantages of this novel MCEE approach, such as simplicity, scalability and flexibility, make it an attractive alternative to conventional MCEE methods.

Photovoltaic device using single wall carbon nanotubes and method of fabricating the same

DOEpatents

Biris, Alexandru S.; Li, Zhongrui

2012-11-06

A photovoltaic device and methods for forming the same. In one embodiment, the photovoltaic device has a silicon substrate, and a film comprising a plurality of single wall carbon nanotubes disposed on the silicon substrate, wherein the plurality of single wall carbon nanotubes forms a plurality of heterojunctions with the silicon in the substrate.

Surface thiolation of silicon for antifouling application.

PubMed

Zhang, Xiaoning; Gao, Pei; Hollimon, Valerie; Brodus, DaShan; Johnson, Arion; Hu, Hongmei

2018-02-07

Thiol groups grafted silicon surface was prepared as previously described. 1H,1H,2H,2H-perfluorodecanethiol (PFDT) molecules were then immobilized on such a surface through disulfide bonds formation. To investigate the contribution of PFDT coating to antifouling, the adhesion behaviors of Botryococcus braunii (B. braunii) and Escherichia coli (E. coli) were studied through biofouling assays in the laboratory. The representative microscope images suggest reduced B. braunii and E. coli accumulation densities on PFDT integrated silicon substrate. However, the antifouling performance of PFDT integrated silicon substrate decreased over time. By incubating the aged substrate in 10 mM TCEP·HCl solution for 1 h, the fouled PFDT coating could be removed as the disulfide bonds were cleaved, resulting in reduced absorption of algal cells and exposure of non-fouled silicon substrate surface. Our results indicate that the thiol-terminated substrate can be potentially useful for restoring the fouled surface, as well as maximizing the effective usage of the substrate.

On the transmission of terahertz radiation through silicon-based structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Persano, Anna, E-mail: anna.persano@le.imm.cnr.it; Francioso, Luca; Cola, Adriano

2014-07-28

We report on the transmission of a terahertz (THz) radiation through prototype structures based on a p-type silicon substrate. In particular, the bare substrate and progressively more complicated multilayer structures were investigated, allowing to address the effect on the transmission of different factors, such as the orientation of interdigitated contacts with respect to the polarized beam, the temperature, and the current flowing through a conductive SnO{sub 2} nanorods layer. A suitable experimental set-up was developed for the direct spectral measurement of transmission in the range of 0.75–1.1 THz at room and low temperatures. A simple Drude-Lorentz model was formulated, findingmore » a quantitative agreement with the experimental transmission spectrum of the bare substrate at room temperature. For the multilayer structures, the spectra variations observed with temperature are well accounted by the corresponding change of the mobility of holes in the silicon p-type substrate. The influence of the contact orientation is consistent with that of a polarizing metallic grating. Finally, Joule heating effects are observed in the spectra performed as a function of the current flowing through the SnO{sub 2} nanorods layer. The experimental results shown here, together with their theoretical interpretation, provide insights for the development of devices fabricated on conductive substrates aimed to absorb/modulate radiation in the THz range.« less

Optimization and characterization of biomolecule immobilization on silicon substrates using (3-aminopropyl)triethoxysilane (APTES) and glutaraldehyde linker

NASA Astrophysics Data System (ADS)

Gunda, Naga Siva Kumar; Singh, Minashree; Norman, Lana; Kaur, Kamaljit; Mitra, Sushanta K.

2014-06-01

In the present work, we developed and optimized a technique to produce a thin, stable silane layer on silicon substrate in a controlled environment using (3-aminopropyl)triethoxysilane (APTES). The effect of APTES concentration and silanization time on the formation of silane layer is studied using spectroscopic ellipsometry and Fourier transform infrared spectroscopy (FTIR). Biomolecules of interest are immobilized on optimized silane layer formed silicon substrates using glutaraldehyde linker. Surface analytical techniques such as ellipsometry, FTIR, contact angle measurement system, and atomic force microscopy are employed to characterize the bio-chemically modified silicon surfaces at each step of the biomolecule immobilization process. It is observed that a uniform, homogenous and highly dense layer of biomolecules are immobilized with optimized silane layer on the silicon substrate. The developed immobilization method is successfully implemented on different silicon substrates (flat and pillar). Also, different types of biomolecules such as anti-human IgG (rabbit monoclonal to human IgG), Listeria monocytogenes, myoglobin and dengue capture antibodies were successfully immobilized. Further, standard sandwich immunoassay (antibody-antigen-antibody) is employed on respective capture antibody coated silicon substrates. Fluorescence microscopy is used to detect the respective FITC tagged detection antibodies bound to the surface after immunoassay.

Ceramic with zircon coating

NASA Technical Reports Server (NTRS)

Wang, Hongyu (Inventor)

2003-01-01

An article comprises a silicon-containing substrate and a zircon coating. The article can comprise a silicon carbide/silicon (SiC/Si) substrate, a zircon (ZrSiO.sub.4) intermediate coating and an external environmental/thermal barrier coating.

High-responsivity vertical-illumination Si/Ge uni-traveling-carrier photodiodes based on silicon-on-insulator substrate.

PubMed

Li, Chong; Xue, ChunLai; Liu, Zhi; Cong, Hui; Cheng, Buwen; Hu, Zonghai; Guo, Xia; Liu, Wuming

2016-06-09

Si/Ge uni-traveling carrier photodiodes exhibit higher output current when space-charge effect is overcome and the thermal effects is suppressed. High current is beneficial for increasing the dynamic range of various microwave photonic systems and simplifying high-bit-rate digital receivers in many applications. From the point of view of packaging, detectors with vertical-illumination configuration can be easily handled by pick-and-place tools and are a popular choice for making photo-receiver modules. However, vertical-illumination Si/Ge uni-traveling carrier (UTC) devices suffer from inter-constraint between high speed and high responsivity. Here, we report a high responsivity vertical-illumination Si/Ge UTC photodiode based on a silicon-on-insulator substrate. When the transmission of the monolayer anti-reflection coating was maximum, the maximum absorption efficiency of the devices was 1.45 times greater than the silicon substrate owing to constructive interference. The Si/Ge UTC photodiode had a dominant responsivity at 1550 nm of 0.18 A/W, a 50% improvement even with a 25% thinner Ge absorption layer.

Questing and the application for silicon based ternary compound within ultra-thin layer of SIS intermediate region

NASA Astrophysics Data System (ADS)

Chen, Shumin; Gao, Ming; Wan, Yazhou; Du, Huiwei; Li, Yong; Ma, Zhongquan

2016-12-01

A silicon based ternary compound was supposed to be solid synthesized with In, Si and O elements by magnetron sputtering of indium tin oxide target (ITO) onto crystal silicon substrate at 250 °C. To make clear the configuration of the intermediate region, a potential method to obtain the chemical bonding of Si with other existing elements was exploited by X-ray photoelectron spectroscopy (XPS) instrument combined with other assisted techniques. The phase composition and solid structure of the interfacial region between ITO and Si substrate were investigated by X-ray diffraction (XRD) and high resolution cross sectional transmission electron microscope (HR-TEM). A photovoltaic device with structure of Al/Ag/ITO/SiOx/p-Si/Al was assembled by depositing ITO films onto the p-Si substrate by using magnetron sputtering. The new matter has been assumed to be a buffer layer for semiconductor-insulator-semiconductor (SIS) photovoltaic device and plays critical role for the promotion of optoelectronic conversion performance from the view point of device physics.

High-responsivity vertical-illumination Si/Ge uni-traveling-carrier photodiodes based on silicon-on-insulator substrate

PubMed Central

Li, Chong; Xue, ChunLai; Liu, Zhi; Cong, Hui; Cheng, Buwen; Hu, Zonghai; Guo, Xia; Liu, Wuming

2016-01-01

Si/Ge uni-traveling carrier photodiodes exhibit higher output current when space-charge effect is overcome and the thermal effects is suppressed. High current is beneficial for increasing the dynamic range of various microwave photonic systems and simplifying high-bit-rate digital receivers in many applications. From the point of view of packaging, detectors with vertical-illumination configuration can be easily handled by pick-and-place tools and are a popular choice for making photo-receiver modules. However, vertical-illumination Si/Ge uni-traveling carrier (UTC) devices suffer from inter-constraint between high speed and high responsivity. Here, we report a high responsivity vertical-illumination Si/Ge UTC photodiode based on a silicon-on-insulator substrate. When the transmission of the monolayer anti-reflection coating was maximum, the maximum absorption efficiency of the devices was 1.45 times greater than the silicon substrate owing to constructive interference. The Si/Ge UTC photodiode had a dominant responsivity at 1550 nm of 0.18 A/W, a 50% improvement even with a 25% thinner Ge absorption layer. PMID:27279426

Structural and elastoplastic properties of β -Ga2O3 films grown on hybrid SiC/Si substrates

NASA Astrophysics Data System (ADS)

Osipov, A. V.; Grashchenko, A. S.; Kukushkin, S. A.; Nikolaev, V. I.; Osipova, E. V.; Pechnikov, A. I.; Soshnikov, I. P.

2018-04-01

Structural and mechanical properties of gallium oxide films grown on (001), (011) and (111) silicon substrates with a buffer layer of silicon carbide are studied. The buffer layer was fabricated by the atom substitution method, i.e., one silicon atom per unit cell in the substrate was substituted by a carbon atom by chemical reaction with carbon monoxide. The surface and bulk structure properties of gallium oxide films have been studied by atomic-force microscopy and scanning electron microscopy. The nanoindentation method was used to investigate the elastoplastic characteristics of gallium oxide, and also to determine the elastic recovery parameter of the films under study. The ultimate tensile strength, hardness, elastic stiffness constants, elastic compliance constants, Young's modulus, linear compressibility, shear modulus, Poisson's ratio and other characteristics of gallium oxide have been calculated by quantum chemistry methods based on the PBESOL functional. It is shown that all these properties of gallium oxide are essentially anisotropic. The calculated values are compared with experimental data. We conclude that a change in the silicon orientation leads to a significant reorientation of gallium oxide.

The Impact of GaN/Substrate Thermal Boundary Resistance on a HEMT Device

DTIC Science & Technology

2011-11-01

stack between the GaN and Substrate layers. The University of Bristol recently reported that this TBR in commercial devices on Silicon Carbide ( SiC ...Circuit RF Radio Frequency PA Power Amplifier SiC Silicon Carbide FEA Finite Element Analysis heff Effective Heat transfer Coefficient (W/m 2 K...substrate material switched from sapphire to silicon , and by another factor of two from silicon to SiC . TABLE 1: SAMPLE RESULTS FROM DOUGLAS ET AL. FOR

Cryogenic High Pressure Sensor Module

NASA Technical Reports Server (NTRS)

Chapman, John J. (Inventor); Shams, Qamar A. (Inventor); Powers, William T. (Inventor)

1999-01-01

A pressure sensor is provided for cryogenic, high pressure applications. A highly doped silicon piezoresistive pressure sensor is bonded to a silicon substrate in an absolute pressure sensing configuration. The absolute pressure sensor is bonded to an aluminum nitride substrate. Aluminum nitride has appropriate coefficient of thermal expansion for use with highly doped silicon at cryogenic temperatures. A group of sensors, either two sensors on two substrates or four sensors on a single substrate are packaged in a pressure vessel.

Cryogenic, Absolute, High Pressure Sensor

NASA Technical Reports Server (NTRS)

Chapman, John J. (Inventor); Shams. Qamar A. (Inventor); Powers, William T. (Inventor)

2001-01-01

A pressure sensor is provided for cryogenic, high pressure applications. A highly doped silicon piezoresistive pressure sensor is bonded to a silicon substrate in an absolute pressure sensing configuration. The absolute pressure sensor is bonded to an aluminum nitride substrate. Aluminum nitride has appropriate coefficient of thermal expansion for use with highly doped silicon at cryogenic temperatures. A group of sensors, either two sensors on two substrates or four sensors on a single substrate are packaged in a pressure vessel.

Compensated amorphous silicon solar cell

DOEpatents

Devaud, Genevieve

1983-01-01

An amorphous silicon solar cell including an electrically conductive substrate, a layer of glow discharge deposited hydrogenated amorphous silicon over said substrate and having regions of differing conductivity with at least one region of intrinsic hydrogenated amorphous silicon. The layer of hydrogenated amorphous silicon has opposed first and second major surfaces where the first major surface contacts the electrically conductive substrate and an electrode for electrically contacting the second major surface. The intrinsic hydrogenated amorphous silicon region is deposited in a glow discharge with an atmosphere which includes not less than about 0.02 atom percent mono-atomic boron. An improved N.I.P. solar cell is disclosed using a BF.sub.3 doped intrinsic layer.

Silicon accumulation and distribution in petunia and sunflower grown in a rice hull-amended substrate

USDA-ARS?s Scientific Manuscript database

Silicon (Si) is a plant beneficial element associated with mitigation of abiotic and biotic stresses. Most greenhouse-grown ornamentals are considered low Si accumulators based on foliar Si concentration. However, Si accumulates in all tissues, and there is little published data on the distributio...

RF Sputtering for preparing substantially pure amorphous silicon monohydride

DOEpatents

Jeffrey, Frank R.; Shanks, Howard R.

1982-10-12

A process for controlling the dihydride and monohydride bond densities in hydrogenated amorphous silicon produced by reactive rf sputtering of an amorphous silicon target. There is provided a chamber with an amorphous silicon target and a substrate therein with the substrate and the target positioned such that when rf power is applied to the target the substrate is in contact with the sputtering plasma produced thereby. Hydrogen and argon are fed to the chamber and the pressure is reduced in the chamber to a value sufficient to maintain a sputtering plasma therein, and then rf power is applied to the silicon target to provide a power density in the range of from about 7 watts per square inch to about 22 watts per square inch to sputter an amorphous silicon hydride onto the substrate, the dihydride bond density decreasing with an increase in the rf power density. Substantially pure monohydride films may be produced.

Method of forming buried oxide layers in silicon

DOEpatents

Sadana, Devendra Kumar; Holland, Orin Wayne

2000-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Molecular dynamics study of interfacial thermal transport between silicene and substrates.

PubMed

Zhang, Jingchao; Hong, Yang; Tong, Zhen; Xiao, Zhihuai; Bao, Hua; Yue, Yanan

2015-10-07

In this work, the interfacial thermal transport across silicene and various substrates, i.e., crystalline silicon (c-Si), amorphous silicon (a-Si), crystalline silica (c-SiO2) and amorphous silica (a-SiO2) are explored by classical molecular dynamics (MD) simulations. A transient pulsed heating technique is applied in this work to characterize the interfacial thermal resistance in all hybrid systems. It is reported that the interfacial thermal resistances between silicene and all substrates decrease nearly 40% with temperature from 100 K to 400 K, which is due to the enhanced phonon couplings from the anharmonicity effect. Analysis of phonon power spectra of all systems is performed to interpret simulation results. Contradictory to the traditional thought that amorphous structures tend to have poor thermal transport capabilities due to the disordered atomic configurations, it is calculated that amorphous silicon and silica substrates facilitate the interfacial thermal transport compared with their crystalline structures. Besides, the coupling effect from substrates can improve the interface thermal transport up to 43.5% for coupling strengths χ from 1.0 to 2.0. Our results provide fundamental knowledge and rational guidelines for the design and development of the next-generation silicene-based nanoelectronics and thermal interface materials.

Plasmonic properties of gold nanoparticles on silicon substrates: Understanding Fano-like spectra observed in reflection

NASA Astrophysics Data System (ADS)

Bossard-Giannesini, Léo; Cruguel, Hervé; Lacaze, Emmanuelle; Pluchery, Olivier

2016-09-01

Gold nanoparticles (AuNPs) are known for their localized surface plasmon resonance (LSPR) that can be measured with UV-visible spectroscopy. AuNPs are often deposited on silicon substrates for various applications, and the LSPR is measured in reflection. In this case, optical spectra are measured by surface differential reflectance spectroscopy (SDRS) and the absorbance exhibits a negative peak. This article studies both experimentally and theoretically on the single layers of 16 nm diameter spherical gold nanoparticles (AuNPs) grafted on silicon. The morphology and surface density of AuNPs were investigated by atomic force microscopy (AFM). The plasmon response in transmission on the glass substrate and in reflection on the silicon substrate is described by an analytical model based on the Fresnel equations and the Maxwell-Garnett effective medium theory (FMG). The FMG model shows a strong dependence to the incidence angle of the light. At low incident angles, the peak appears negatively with a shallow intensity, and at angles above 30°, the usual positive shape of the plasmon is retrieved. The relevance of the FMG model is compared to the Mie theory within the dipolar approximation. We conclude that no Fano effect is responsible for this derivative shape. An easy-to-use formula is derived that agrees with our experimental data.

Silicon cross-connect filters using microring resonator coupled multimode-interference-based waveguide crossings.

PubMed

Xu, Fang; Poon, Andrew W

2008-06-09

We report silicon cross-connect filters using microring resonator coupled multimode-interference (MMI) based waveguide crossings. Our experiments reveal that the MMI-based cross-connect filters impose lower crosstalk at the crossing than the conventional cross-connect filters using plain crossings, while offering a nearly symmetric resonance line shape in the drop-port transmission. As a proof-of-concept for cross-connection applications, we demonstrate on a silicon-on-insulator substrate (i) a 4-channel 1 x 4 linear-cascaded MMI-based cross-connect filter, and (ii) a 2-channel 2 x 2 array-cascaded MMI-based cross-connect filter.

Rotational actuator of motor based on carbon nanotubes

DOEpatents

Zettl, Alexander K.; Fennimore, Adam M.; Yuzvinsky, Thomas D.

2008-11-18

A rotational actuator/motor based on rotation of a carbon nanotube is disclosed. The carbon nanotube is provided with a rotor plate attached to an outer wall, which moves relative to an inner wall of the nanotube. After deposit of a nanotube on a silicon chip substrate, the entire structure may be fabricated by lithography using selected techniques adapted from silicon manufacturing technology. The structures to be fabricated may comprise a multiwall carbon nanotube (MWNT), two in plane stators S1, S2 and a gate stator S3 buried beneath the substrate surface. The MWNT is suspended between two anchor pads and comprises a rotator attached to an outer wall and arranged to move in response to electromagnetic inputs. The substrate is etched away to allow the rotor to freely rotate. Rotation may be either in a reciprocal or fully rotatable manner.

Oxidation resistant slurry coating for carbon-based materials

NASA Technical Reports Server (NTRS)

Smialek, J. L.; Rybicki, G. C. (Inventor)

1985-01-01

An oxidation resistant coating is produced on carbon-base materials, and the same processing step effects an infiltration of the substrate with silicon containing material. The process comprises making a slurry of nickel and silicon powders in a nitrocellulose lacquer, spraying onto the graphite or carbon-carbon substrate, and sintering in vacuum to form a fused coating that wets and covers the surface as well as penetrates into the pores of the substrate. Optimum wetting and infiltration occurs in the range of Ni-60 w/o Si to Ni-90 w/o Si with deposited thicknesses of 25-100 mg/sq. cm. Sintering temperatures of about 1200 C to about 1400 C are used, depending on the melting point of the specific coating composition. The sintered coating results in Ni-Si intermetallic phases and SiC, both of which are highly oxidation resistant.

Rotational actuator or motor based on carbon nanotubes

DOEpatents

Zetti, Alexander K.; Fennimore, Adam M.; Yuzvinsky, Thomas D.

2006-05-30

A rotational actuator/motor based on rotation of a carbon nanotube is disclosed. The carbon nanotube is provided with a rotor plate attached to an outer wall, which moves relative to an inner wall of the nanotube. After deposit of a nanotube on a silicon chip substrate, the entire structure may be fabricated by lithography using selected techniques adapted from silicon manufacturing technology. The structures to be fabricated may comprise a multiwall carbon nanotube (MWNT), two in plane stators S1, S2 and a gate stator S3 buried beneath the substrate surface. The MWNT is suspended between two anchor pads and comprises a rotator attached to an outer wall and arranged to move in response to electromagnetic inputs. The substrate is etched away to allow the rotor to freely rotate. Rotation may be either in a reciprocal or fully rotatable manner.

Photoluminescence of Ta2O5 films formed by the molecular layer deposition method

NASA Astrophysics Data System (ADS)

Baraban, A. P.; Dmitriev, V. A.; Prokof'ev, V. A.; Drozd, V. E.; Filatova, E. O.

2016-04-01

Ta2O5 films of different thicknesses (20-100 nm) synthesized by the molecular layer deposition method on p-type silicon substrates and thermally oxidized silicon substrates have been studied by the methods of high-frequency capacitance-voltage characteristics and photoluminescence. A hole-conduction channel is found to form in the Si-Ta2O5-field electrode system. A model of the electronic structure of Ta2O5 films is proposed based on an analysis of the measured PL spectra and performed electrical investigations.

Room-temperature bonding of epitaxial layer to carbon-cluster ion-implanted silicon wafers for CMOS image sensors

NASA Astrophysics Data System (ADS)

Koga, Yoshihiro; Kadono, Takeshi; Shigematsu, Satoshi; Hirose, Ryo; Onaka-Masada, Ayumi; Okuyama, Ryousuke; Okuda, Hidehiko; Kurita, Kazunari

2018-06-01

We propose a fabrication process for silicon wafers by combining carbon-cluster ion implantation and room-temperature bonding for advanced CMOS image sensors. These carbon-cluster ions are made of carbon and hydrogen, which can passivate process-induced defects. We demonstrated that this combination process can be used to form an epitaxial layer on a carbon-cluster ion-implanted Czochralski (CZ)-grown silicon substrate with a high dose of 1 × 1016 atoms/cm2. This implantation condition transforms the top-surface region of the CZ-grown silicon substrate into a thin amorphous layer. Thus, an epitaxial layer cannot be grown on this implanted CZ-grown silicon substrate. However, this combination process can be used to form an epitaxial layer on the amorphous layer of this implanted CZ-grown silicon substrate surface. This bonding wafer has strong gettering capability in both the wafer-bonding region and the carbon-cluster ion-implanted projection range. Furthermore, this wafer inhibits oxygen out-diffusion to the epitaxial layer from the CZ-grown silicon substrate after device fabrication. Therefore, we believe that this bonding wafer is effective in decreasing the dark current and white-spot defect density for advanced CMOS image sensors.

Characterization of nanostructured CuO-porous silicon matrix formed on copper-coated silicon substrate via electrochemical etching

NASA Astrophysics Data System (ADS)

Naddaf, M.; Mrad, O.; Al-zier, A.

2014-06-01

A pulsed anodic etching method has been utilized for nanostructuring of a copper-coated p-type (100) silicon substrate, using HF-based solution as electrolyte. Scanning electron microscopy reveals the formation of a nanostructured matrix that consists of island-like textures with nanosize grains grown onto fiber-like columnar structures separated with etch pits of grooved porous structures. Spatial micro-Raman scattering analysis indicates that the island-like texture is composed of single-phase cupric oxide (CuO) nanocrystals, while the grooved porous structure is barely related to formation of porous silicon (PS). X-ray diffraction shows that both the grown CuO nanostructures and the etched silicon layer have the same preferred (220) orientation. Chemical composition obtained by means of X-ray photoelectron spectroscopic (XPS) analysis confirms the presence of the single-phase CuO on the surface of the patterned CuO-PS matrix. As compared to PS formed on the bare silicon substrate, the room-temperature photoluminescence (PL) from the CuO-PS matrix exhibits an additional weak `blue' PL band as well as a blue shift in the PL band of PS (S-band). This has been revealed from XPS analysis to be associated with the enhancement in the SiO2 content as well as formation of the carbonyl group on the surface in the case of the CuO-PS matrix.

Fabrication of silicon-based template-assisted nanoelectrode arrays and ohmic contact properties investigation.

PubMed

Bai, Anqi; Cheng, Buwen; Wang, Xiaofeng; Xue, Chunlai; Zuo, Yuhua; Wang, Qiming

2010-11-01

A convenient fabrication technology for large-area, highly-ordered nanoelectrode arrays on silicon substrate has been described here, using porous anodic alumina (PAA) as a template. The ultrathin PAA membranes were anodic oxidized utilizing a two-step anodization method, from Al film evaporated on substrate. The purposes for the use of two-step anodization were, first, improving the regularity of the porous structures, and second reducing the thickness of the membranes to 100-200 nm we desired. Then the nanoelectrode arrays were obtained by electroless depositing Ni-W alloy into the through pores of PAA membranes, making the alloy isolated by the insulating pore walls and contacting with the silicon substrates at the bottoms of pores. The Ni-W alloy was also electroless deposited at the back surface of silicon to form back electrode. Then ohmic contact properties between silicon and Ni-W alloy were investigated after rapid thermal annealing. Scanning electron microscopy (SEM) observations showed the structure characteristics, and the influence factors of fabrication effect were discussed. The current-voltage (I-V) curves revealed the contact properties. After annealing in N2 at 700 degrees C, good linear property was shown with contact resistance of 33 omega, which confirmed ohmic contacts between silicon and electrodes. These results presented significant application potential of this technology in nanosize current-injection devices in optoelectronics, microelectronics and bio-medical fields.

Controlling the optical properties of monocrystalline 3C-SiC heteroepitaxially grown on silicon at low temperatures

NASA Astrophysics Data System (ADS)

Colston, Gerard; Myronov, Maksym

2017-11-01

Cubic silicon carbide (3C-SiC) offers an alternative wide bandgap semiconductor to conventional materials such as hexagonal silicon carbide (4H-SiC) or gallium nitride (GaN) for the detection of UV light and can offer a closely lattice matched virtual substrate for subsequent GaN heteroepitaxy. As 3C-SiC can be heteroepitaxially grown on silicon (Si) substrates its optical properties can be manipulated by controlling the thickness and doping concentrations. The optical properties of 3C-SiC epilayers have been characterized by measuring the transmission of light through suspended membranes. Decreasing the thickness of the 3C-SiC epilayers is shown to shift the absorbance edge to lower wavelengths, a result of the indirect bandgap nature of silicon carbide. This property, among others, can be exploited to fabricate very low-cost, tuneable 3C-SiC based UV photodetectors. This study investigates the effect of thickness and doping concentration on the optical properties of 3C-SiC epilayers grown at low temperatures by a standard Si based growth process. The results demonstrate the potential photonic applications of 3C-SiC and its heterogeneous integration into the Si industry.

Advanced Silicon-on-Insulator: Crystalline Silicon on Atomic Layer Deposited Beryllium Oxide.

PubMed

Min Lee, Seung; Hwan Yum, Jung; Larsen, Eric S; Chul Lee, Woo; Keun Kim, Seong; Bielawski, Christopher W; Oh, Jungwoo

2017-10-16

Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance. Devices based on SOI or silicon-on-sapphire technology are primarily used in high-performance radio frequency (RF) and radiation sensitive applications as well as for reducing the short channel effects in microelectronic devices. Despite their advantages, the high substrate cost and overheating problems associated with complexities in substrate fabrication as well as the low thermal conductivity of silicon oxide prevent broad applications of this technology. To overcome these challenges, we describe a new approach of using beryllium oxide (BeO). The use of atomic layer deposition (ALD) for producing this material results in lowering the SOI wafer production cost. Furthermore, the use of BeO exhibiting a high thermal conductivity might minimize the self-heating issues. We show that crystalline Si can be grown on ALD BeO and the resultant devices exhibit potential for use in advanced SOI technology applications.

Basic research challenges in crystalline silicon photovoltaics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Werner, J.H.

1995-08-01

Silicon is abundant, non-toxic and has an ideal band gap for photovoltaic energy conversion. Experimental world record cells of 24 % conversion efficiency with around 300 {mu}m thickness are only 4 % (absolute) efficiency points below the theoretical Auger recombination-limit of around 28 %. Compared with other photovoltaic materials, crystalline silicon has only very few disadvantages. The handicap of weak light absorbance may be mastered by clever optical designs. Single crystalline cells of only 48 {mu}m thickness showed 17.3 % efficiency even without backside reflectors. A technology of solar cells from polycrystalline Si films on foreign substrates arises at themore » horizon. However, the disadvantageous, strong activity of grain boundaries in Si could be an insurmountable hurdle for a cost-effective, terrestrial photovoltaics based on polycrystalline Si on foreign substrates. This talk discusses some basic research challenges related to a Si based photovoltaics.« less

Human aortic endothelial cell morphology influenced by topography of porous silicon substrates.

PubMed

Formentín, Pilar; Catalán, Úrsula; Fernández-Castillejo, Sara; Alba, Maria; Baranowska, Malgorzata; Solà, Rosa; Pallarès, Josep; Marsal, Lluís F

2015-10-01

Porous silicon has received much attention because of its optical properties and for its usefulness in cell-based biosensing, drug delivery, and tissue engineering applications. Surface properties of the biomaterial are associated with cell adhesion and with proliferation, migration, and differentiation. The present article analyzes the behavior of human aortic endothelial cells in macro- and nanoporous collagen-modified porous silicon samples. On both substrates, cells are well adhered and numerous. Confocal microscopy and scanning electron microscopy were employed to study the effects of porosity on the morphology of the cells. On macroporous silicon, filopodia is not observed but the cell spreads on the surface, increasing the lamellipodia surface which penetrates the macropore. On nanoporous silicon, multiple filopodia were found to branch out from the cell body. These results demonstrate that the pore size plays a key role in controlling the morphology and growth rate of human aortic endothelial cells, and that these forms of silicon can be used to control cell development in tissue engineering as well as in basic cell biology research. © The Author(s) 2015.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

NASA Astrophysics Data System (ADS)

Balpande, Suresh S.; Pande, Rajesh S.

2016-04-01

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and schottky diodes based voltage multiplier.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Balpande, Suresh S., E-mail: balpandes@rknec.edu; Pande, Rajesh S.

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition tomore » this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and schottky diodes based voltage multiplier.« less

Effect of surface chemical composition on the surface potential and iso-electric point of silicon substrates modified with self-assembled monolayers.

PubMed

Kuo, Che-Hung; Chang, Hsun-Yun; Liu, Chi-Ping; Lee, Szu-Hsian; You, Yun-Wen; Shyue, Jing-Jong

2011-03-07

Self-assembled monolayer (SAM)-modified nano-materials are a new technology to deliver drug molecules. While the majority of these depend on covalently immobilizing molecules on the surface, it is proposed that electrostatic interactions may be used to deliver drugs. By tuning the surface potential of solid substrates with SAMs, drug molecules could be either absorbed on or desorbed from substrates through the difference in electrostatic interactions around the selected iso-electric point (IEP). In this work, the surface of silicon substrates was tailored with various ratios of 3-aminopropyltrimethoxysilane (APTMS) and 3-mercaptopropyltrimethoxysilane (MPTMS), which form amine- and thiol-bearing SAMs, respectively. The ratio of the functional groups on the silicon surface was quantified by X-ray photoelectron spectrometry (XPS); in general, the deposition kinetics of APTMS were found to be faster than those of MPTMS. Furthermore, for solutions with high MPTMS concentrations, the relative deposition rate of APTMS increased dramatically due to the acid-base reaction in the solution and subsequent electrostatic interactions between the molecules and the substrate. The zeta potential in aqueous electrolytes was determined with an electro-kinetic analyzer. By depositing SAMs of binary functional groups in varied ratios, the surface potential and IEP of silicon substrates could be fine-tuned. For <50% amine concentration in SAMs, the IEP changed linearly with the chemical composition from <2 to 7.18. For higher amine concentrations, the IEP slowly increased with concentration to 7.94 because the formation of hydrogen-bonding suppressed the subsequent protonation of amines.

Visible-blind ultraviolet photodetectors on porous silicon carbide substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Naderi, N.; Hashim, M.R., E-mail: roslan@usm.my

2013-06-01

Highlights: • Highly reliable UV detectors are fabricated on porous silicon carbide substrates. • The optical properties of samples are enhanced by increasing the current density. • The optimized sample exhibits enhanced sensitivity to the incident UV radiation. - Abstract: Highly reliable visible-blind ultraviolet (UV) photodetectors were successfully fabricated on porous silicon carbide (PSC) substrates. High responsivity and high photoconductive gain were observed in a metal–semiconductor–metal ultraviolet photodetector that was fabricated on an optimized PSC substrate. The PSC samples were prepared via the UV-assisted photo-electrochemical etching of an n-type hexagonal silicon carbide (6H-SiC) substrate using different etching current densities. Themore » optical results showed that the current density is an outstanding etching parameter that controls the porosity and uniformity of PSC substrates. A highly porous substrate was synthesized using a suitable etching current density to enhance its light absorption, thereby improving the sensitivity of UV detector with this substrate. The electrical characteristics of fabricated devices on optimized PSC substrates exhibited enhanced sensitivity and responsivity to the incident radiation.« less

Laboratory studies of silicon vapor deposition, phase A. [feasibility of producing thin films for photovoltaic applications

NASA Technical Reports Server (NTRS)

Frost, R. T.; Racette, G. W.; Stockhoff, E. H.

1977-01-01

A system is described capable of carrying out silicon vapor deposition experiments in the low 10 to the minus 10th power torr vacuum range. The system was assembled and tested for use in a program aimed at exploration of vacuum heteroepitaxy of silicon on several substrates of potential interest for photovoltaic applications. An experiment is described in which a silicon layer 2.5 microns thick was deposited on a pyrolytically cleaned tungsten substrate held at a temperature of 400 C. Using a resistance heated silicon source, thicker layers can be deposited in periods of hours by utilizing closer source to substrate distances.

Highly stable, protein resistant thin films on SiC-modified silicon substrates.

PubMed

Qin, Guoting; Zhang, Rui; Makarenko, Boris; Kumar, Amit; Rabalais, Wayne; López Romero, J Manuel; Rico, Rodrigo; Cai, Chengzhi

2010-05-21

Thin films terminated with oligo(ethylene glycol) (OEG) could be photochemically grafted onto ultrathin silicon carbide layers that were generated on silicon substrates via carbonization with acetylene at 820 degrees C. The OEG coating reduced the non-specific adsorption of fibrinogen on the substrates by 99.5% and remained resistant after storage in PBS for 4 weeks at 37 degrees C.

Spalling of a Thin Si Layer by Electrodeposit-Assisted Stripping

NASA Astrophysics Data System (ADS)

Kwon, Youngim; Yang, Changyol; Yoon, Sang-Hwa; Um, Han-Don; Lee, Jung-Ho; Yoo, Bongyoung

2013-11-01

A major goal in solar cell research is to reduce the cost of the final module. Reducing the thickness of the crystalline silicon substrate to several tens of micrometers can reduce material costs. In this work, we describe the electrodeposition of a Ni-P alloy, which induces high stress in the silicon substrate at room temperature. The induced stress enables lift-off of the thin-film silicon substrate. After lift-off of the thin Si film, the mother substrate can be reused, reducing material costs. Moreover, the low-temperature process expected to be improved Si substrate quality.

Forming high efficiency silicon solar cells using density-graded anti-reflection surfaces

DOEpatents

Yuan, Hao-Chih; Branz, Howard M.; Page, Matthew R.

2014-09-09

A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Forming high-efficiency silicon solar cells using density-graded anti-reflection surfaces

DOEpatents

Yuan, Hao-Chih; Branz, Howard M.; Page, Matthew R.

2015-07-07

A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Control of biaxial strain in single-layer molybdenite using local thermal expansion of the substrate

NASA Astrophysics Data System (ADS)

Plechinger, Gerd; Castellanos-Gomez, Andres; Buscema, Michele; van der Zant, Herre S. J.; Steele, Gary A.; Kuc, Agnieszka; Heine, Thomas; Schüller, Christian; Korn, Tobias

2015-03-01

Single-layer MoS2 is a direct-gap semiconductor whose electronic band structure strongly depends on the strain applied to its crystal lattice. While uniaxial strain can be easily applied in a controlled way, e.g., by bending of a flexible substrate with the atomically thin MoS2 layer on top, experimental realization of biaxial strain is more challenging. Here, we exploit the large mismatch between the thermal expansion coefficients of MoS2 and a silicone-based substrate to apply a controllable biaxial tensile strain by heating the substrate with a focused laser. The effect of this biaxial strain is directly observable in optical spectroscopy as a redshift of the MoS2 photoluminescence. We also demonstrate the potential of this method to engineer more complex strain patterns by employing highly absorptive features on the substrate to achieve non-uniform heat profiles. By comparison of the observed redshift to strain-dependent band structure calculations, we estimate the biaxial strain applied by the silicone-based substrate to be up to 0.2%, corresponding to a band gap modulation of 105 meV per percentage of biaxial tensile strain.

Composite Reflective Absorptive IR-Blocking Filters Embedded in Metamaterial Antireflection Coated Silicon

NASA Technical Reports Server (NTRS)

Munson, C. D.; Choi, S. K.; Coughlin, K. P.; McMahon, J. J.; Miller, K. H.; Page, L. A.; Wollack, E. J.

2017-01-01

Infrared (IR)-blocking filters are crucial for controlling the radiative loading on cryogenic systems and for optimizing the sensitivity of bolometric detectors in the far-IR. We present a new IR filter approach based on a combination of patterned frequency-selective structures on silicon and a thin (2575 micron thick) absorptive composite based on powdered reststrahlen absorbing materials. For a 300 K blackbody, this combination reflects approximately 50% of the incoming light and blocks greater than.99.8% of the total power with negligible thermal gradients and excellent low-frequency transmission. This allows a reduction in the IR thermal loading to negligible levels in a single cold filter. These composite filters are fabricated on silicon substrates, which provide excellent thermal transport laterally through the filter and ensure that the entire area of the absorptive filter stays near the bath temperature. A metamaterial antireflection coating cut into these substrates reduces in-band reflections to below 1%, and the in-band absorption of the powder mix is below 1% for signal bands below 750 GHz. This type of filter can be directly incorporated into silicon refractive optical elements.

Control of the interaction strength of photonic molecules by nanometer precise 3D fabrication.

PubMed

Rawlings, Colin D; Zientek, Michal; Spieser, Martin; Urbonas, Darius; Stöferle, Thilo; Mahrt, Rainer F; Lisunova, Yuliya; Brugger, Juergen; Duerig, Urs; Knoll, Armin W

2017-11-28

Applications for high resolution 3D profiles, so-called grayscale lithography, exist in diverse fields such as optics, nanofluidics and tribology. All of them require the fabrication of patterns with reliable absolute patterning depth independent of the substrate location and target materials. Here we present a complete patterning and pattern-transfer solution based on thermal scanning probe lithography (t-SPL) and dry etching. We demonstrate the fabrication of 3D profiles in silicon and silicon oxide with nanometer scale accuracy of absolute depth levels. An accuracy of less than 1nm standard deviation in t-SPL is achieved by providing an accurate physical model of the writing process to a model-based implementation of a closed-loop lithography process. For transfering the pattern to a target substrate we optimized the etch process and demonstrate linear amplification of grayscale patterns into silicon and silicon oxide with amplification ratios of ∼6 and ∼1, respectively. The performance of the entire process is demonstrated by manufacturing photonic molecules of desired interaction strength. Excellent agreement of fabricated and simulated structures has been achieved.

Adhesion of single- and multi-walled carbon nanotubes to silicon substrate: atomistic simulations and continuum analysis

NASA Astrophysics Data System (ADS)

Yuan, Xuebo; Wang, Youshan

2017-10-01

The radial deformation of carbon nanotubes (CNTs) adhering to a substrate may prominently affect their mechanical and physical properties. In this study, both classical atomistic simulations and continuum analysis are carried out, to investigate the lateral adhesion of single-walled CNTs (SWCNTs) and multi-walled CNTs (MWCNTs) to a silicon substrate. A linear elastic model for analyzing the adhesion of 2D shells to a rigid semi-infinite substrate is constructed in the framework of continuum mechanics. Good agreement is achieved between the cross-section profiles of adhesive CNTs obtained by the continuum model and by the atomistic simulation approach. It is found that the adhesion of a CNT to the silicon substrate is significantly influenced by its initial diameter and the number of walls. CNTs with radius larger than a certain critical radius are deformed radially on the silicon substrate with flat contact regions. With increasing number of walls, the extent of radial deformation of a MWCNT on the substrate decreases dramatically, and the flat contact area reduces—and eventually vanishes—due to increasing equivalent bending stiffness. It is analytically predicted that large-diameter MWCNTs with a large number of walls are likely to ‘stand’ on the silicon substrate. The present work can be useful for understanding the radial deformation of CNTs adhering to a solid planar substrate.

Fabrication of polycrystalline solar cells on low-cost substrates

NASA Technical Reports Server (NTRS)

Chu, T. L. (Inventor)

1976-01-01

A new method of producing p-n junction semiconductors for solar cells was described; the principal objective of this investigation is to reduce production costs significantly by depositing polycrystalline silicon on a relatively cheap substrate such as metallurgical-grade silicon, graphite, or steel. The silicon layer contains appropriate dopants, and the substrates are coated with a diffusion barrier of silica, borosilicate, phosphosilicate, or mixtures of these compounds.

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

NASA Technical Reports Server (NTRS)

Pain, Bedabrata (Inventor); Zheng, Xinyu (Inventor)

2002-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

Increased voltage photovoltaic cell

NASA Technical Reports Server (NTRS)

Ross, B.; Bickler, D. B.; Gallagher, B. D. (Inventor)

1985-01-01

A photovoltaic cell, such as a solar cell, is provided which has a higher output voltage than prior cells. The improved cell includes a substrate of doped silicon, a first layer of silicon disposed on the substrate and having opposite doping, and a second layer of silicon carbide disposed on the first layer. The silicon carbide preferably has the same type of doping as the first layer.

Molybdenum enhanced low-temperature deposition of crystalline silicon nitride

DOEpatents

Lowden, Richard A.

1994-01-01

A process for chemical vapor deposition of crystalline silicon nitride which comprises the steps of: introducing a mixture of a silicon source, a molybdenum source, a nitrogen source, and a hydrogen source into a vessel containing a suitable substrate; and thermally decomposing the mixture to deposit onto the substrate a coating comprising crystalline silicon nitride containing a dispersion of molybdenum silicide.

Condensing Heat Exchanger with Hydrophilic Antimicrobial Coating

NASA Technical Reports Server (NTRS)

Thomas, Christopher M. (Inventor); Ma, Yonghui (Inventor)

2014-01-01

A multi-layer antimicrobial hydrophilic coating is applied to a substrate of anodized aluminum, although other materials may form the substrate. A silver layer is sputtered onto a thoroughly clean anodized surface of the aluminum to about 400 nm thickness. A layer of crosslinked, silicon-based macromolecular structure about 10 nm thickness overlies the silver layer, and the outermost surface of the layer of crosslinked, silicon-based macromolecular structure is hydroxide terminated to produce a hydrophilic surface with a water drop contact angle of less than 10.degree.. The coated substrate may be one of multiple fins in a condensing heat exchanger for use in the microgravity of space, which has narrow channels defined between angled fins such that the surface tension of condensed water moves water by capillary flow to a central location where it is pumped to storage. The antimicrobial coating prevents obstruction of the capillary passages.

Thermal strain-induced dielectric anisotropy in Ba0.7Sr0.3TiO3 thin films grown on silicon-based substrates

NASA Astrophysics Data System (ADS)

Zhu, X. H.; Guigues, B.; Defaÿ, E.; Dubarry, C.; Aïd, M.

2009-07-01

Dielectric properties of Ba0.7Sr0.3TiO3 (BST) thin films, which were prepared on silicon-based substrates by ion beam sputtering and postdeposition annealing method, were systematically investigated in different electrode configurations of metal-insulator-metal and coplanar interdigital capacitors. It was found that a large dielectric anisotropy exists in the films with better in-plane dielectric properties (higher dielectric permittivity and tunability) than those along the out-of-plane direction. The observed anisotropic dielectric responses are explained qualitatively in terms of a thermal strain effect that is related to dissimilar film strains along the in-plane and out-of-plane directions. Another reason for the dielectric anisotropy is due to different influences of the interfacial low-dielectric layer between the BST film and the substrate (metal electrode).

Preparation of rich handles soft cellulosic fabric using amino silicone based softener. Part-I: Surface smoothness and softness properties.

PubMed

Zia, Khalid Mahmood; Tabassum, Shazia; Barkaat-ul-Hasin, Syed; Zuber, Mohammad; Jamil, Tahir; Jamal, Muhammad Asghar

2011-04-01

A series of amino silicone based softeners with different emulsifiers were prepared and adsorbed onto the surfaces of cotton and blends of cotton/polyester fabrics. Factors affecting the performance properties of the finished substrate such as post-treatment with amino functional silicone based softener varying different emulsifiers in their formulations and its concentration on different processed fabrics were studied. Fixation of the amino-functional silicone softener onto/or within the cellulose structure is accompanied by the formation of semi-inter-penetrated network structure thereby enhancing both the extent of crosslinking and networking as well as providing very high softness. The results of the experiments indicate that the amino silicone can form a hydrophobic film on both cotton and blends of cotton/polyester fabrics and its coating reduces the surface roughness significantly. Furthermore, the roughness becomes lesser with an increase in the applied strength of amino silicone based softener. Copyright © 2011 Elsevier B.V. All rights reserved.

Texturization of as-cut p-type monocrystalline silicon wafer using different wet chemical solutions

NASA Astrophysics Data System (ADS)

Hashmi, Galib; Hasanuzzaman, Muhammad; Basher, Mohammad Khairul; Hoq, Mahbubul; Rahman, Md. Habibur

2018-06-01

Implementing texturization process on the monocrystalline silicon substrate reduces reflection and enhances light absorption of the substrate. Thus texturization is one of the key elements to increase the efficiency of solar cell. Considering as-cut monocrystalline silicon wafer as base substrate, in this work different concentrations of Na2CO3 and NaHCO3 solution, KOH-IPA (isopropyl alcohol) solution and tetramethylammonium hydroxide solution with different time intervals have been investigated for texturization process. Furthermore, saw damage removal process was conducted with 10% NaOH solution, 20 wt% KOH-13.33 wt% IPA solution and HF/nitric/acetic acid solution. The surface morphology of saw damage, saw damage removed surface and textured wafer were observed using optical microscope and field emission scanning electron microscopy. Texturization causes pyramidal micro structures on the surface of (100) oriented monocrystalline silicon wafer. The height of the pyramid on the silicon surface varies from 1.5 to 3.2 µm and the inclined planes of the pyramids are acute angle. Contact angle value indicates that the textured wafer's surface fall in between near-hydrophobic to hydrophobic range. With respect to base material absolute reflectance 1.049-0.75% within 250-800 nm wavelength region, 0.1-0.026% has been achieved within the same wavelength region when textured with 0.76 wt% KOH-4 wt% IPA solution for 20 min. Furthermore, an alternative route of using 1 wt% Na2CO3-0.2 wt% NaHCO3 solution for 50 min has been exploited in the texturization process.

Interband π -like plasmon in silicene grown on silver

NASA Astrophysics Data System (ADS)

Sindona, A.; Cupolillo, A.; Alessandro, F.; Pisarra, M.; Coello Fiallos, D. C.; Osman, S. M.; Caputi, L. S.

2018-01-01

Silicene, the two-dimensional allotrope of silicon, is predicted to exist in a low-buckled honeycomb lattice, characterized by semimetallic electronic bands with graphenelike energy-momentum dispersions around the Fermi level (represented by touching Dirac cones). Single layers of silicene are mostly synthesized by depositing silicon on top of silver, where, however, the different phases observed to date are so strongly hybridized with the substrate that not only the Dirac cones, but also the whole valence and conduction states of ideal silicene appear to be lost. Here, we provide evidence that at least part of this semimetallic behavior is preserved by the coexistence of more silicene phases, epitaxially grown on Ag(111). In particular, we combine electron energy loss spectroscopy and time-dependent density functional theory to characterize the low-energy plasmon of a multiphase-silicene/Ag(111) sample, prepared at controlled silicon coverage and growth temperature. We find that this mode survives the interaction with the substrate, being perfectly matched with the π -like plasmon of ideal silicene. We therefore suggest that the weakened interaction of multiphase silicene with the substrate may provide a unique platform with the potential to develop different applications based on two-dimensional silicon systems.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Dislocation-free strained silicon-on-silicon by in-place bonding

NASA Astrophysics Data System (ADS)

Cohen, G. M.; Mooney, P. M.; Paruchuri, V. K.; Hovel, H. J.

2005-06-01

In-place bonding is a technique where silicon-on-insulator (SOI) slabs are bonded by hydrophobic attraction to the underlying silicon substrate when the buried oxide is undercut in dilute HF. The bonding between the exposed surfaces of the SOI slab and the substrate propagates simultaneously with the buried oxide etching. As a result, the slabs maintain their registration and are referred to as "bonded in-place". We report the fabrication of dislocation-free strained silicon slabs from pseudomorphic trilayer Si/SiGe/SOI by in-place bonding. Removal of the buried oxide allows the compressively strained SiGe film to relax elastically and induce tensile strain in the top and bottom silicon films. The slabs remain bonded to the substrate by van der Waals forces when the wafer is dried. Subsequent annealing forms a covalent bond such that when the upper Si and the SiGe layer are removed, the bonded silicon slab remains strained.

Optical and Interface-Based Methods of Defect Engineering in Silicon

ERIC Educational Resources Information Center

Kondratenko, Yevgeniy Vladimirovich

2009-01-01

Ion implantation is widely used in the microelectronics industry for fabrication of source and drain transistor regions. Unfortunately, implantation causes considerable damage to the substrate lattice rendering most of the implanted dopant electrically inactive. Rapid thermal annealing (RTA) heals the damage by rapidly heating the substrate with a…

Silicon/III-V laser with super-compact diffraction grating for WDM applications in electronic-photonic integrated circuits.

PubMed

Wang, Yadong; Wei, Yongqiang; Huang, Yingyan; Tu, Yongming; Ng, Doris; Lee, Cheewei; Zheng, Yunan; Liu, Boyang; Ho, Seng-Tiong

2011-01-31

We have demonstrated a heterogeneously integrated III-V-on-Silicon laser based on an ultra-large-angle super-compact grating (SCG). The SCG enables single-wavelength operation due to its high-spectral-resolution aberration-free design, enabling wavelength division multiplexing (WDM) applications in Electronic-Photonic Integrated Circuits (EPICs). The SCG based Si/III-V laser is realized by fabricating the SCG on silicon-on-insulator (SOI) substrate. Optical gain is provided by electrically pumped heterogeneous integrated III-V material on silicon. Single-wavelength lasing at 1550 nm with an output power of over 2 mW and a lasing threshold of around 150 mA were achieved.

Method of deposition of silicon carbide layers on substrates

DOEpatents

Angelini, P.; DeVore, C.E.; Lackey, W.J.; Blanco, R.E.; Stinton, D.P.

1982-03-19

A method for direct chemical vapor deposition of silicon carbide to substrates, especially nuclear waste particles, is provided by the thermal decomposition of methylsilane at 800 to 1050/sup 0/C when the substrates have been confined within a suitable coating environment.

Evaluation of substrate noise suppression method to mitigate crosstalk among trough-silicon vias

NASA Astrophysics Data System (ADS)

Araga, Yuuki; Kikuchi, Katsuya; Aoyagi, Masahiro

2018-04-01

Substrate noise from a single through-silicon via (TSV) and the noise attenuation by a substrate tap and a guard ring are clarified. A CMOS test vehicle is designed, and 6-µm-diameter TSVs are manufactured on a 20-µm-thick silicon substrate by the via-last method. An on-chip waveform-capturing circuitry is embedded in the test vehicle to capture transient waveforms of substrate noise. The embedded waveform-capturing circuitry demonstrates small and local noise propagation. Experimental results show increased substrate noise level induced by TSVs and the effectiveness of the substrate tap and guard ring for mitigating the crosstalk among TSVs. An analytical model to explain substrate noise propagation is developed to validate experimental results. Results obtained using the substrate model with a multilayer mesh shows good consistency with experimental results, indicating that the model can be used for examination of noise suppression methods.

Annealing pressure induced ions transfer in Cobalt-Ferrite thin films on amorphous SiO2/Si substrates

NASA Astrophysics Data System (ADS)

Huang, Shun-Yu; Chong, Cheong-Wei; Chen, Pin-Hui; Li, Hong-Lin; Li, Min-Kai; Huang, J. C. Andrew

2017-11-01

In this work, Cobalt-Ferrite (CFO) films were grown on silicon substrates with 300 nm amorphous silicon dioxide by Pulsed Laser Deposition (PLD) with different annealing conditions. The results of structural analysis prove that the CFO films have high crystalline quality with (1 1 1) preferred orientation. The Raman spectra and X-ray absorption spectra (XAS) indicate that the Co ions can transfer from tetrahedral sites to octahedral sites with increasing the annealing pressure. The site exchange of Co and Fe ions leads to the change of saturation magnetization in the CFO films. Our experiments provide not only a way to control the magnetism of CFO films, but also a suitable magnetic layer to develop silicon and semiconductor based spintronic devices.

New method for MBE growth of GaAs nanowires on silicon using colloidal Au nanoparticles

NASA Astrophysics Data System (ADS)

Bouravleuv, A.; Ilkiv, I.; Reznik, R.; Kotlyar, K.; Soshnikov, I.; Cirlin, G.; Brunkov, P.; Kirilenko, D.; Bondarenko, L.; Nepomnyaschiy, A.; Gruznev, D.; Zotov, A.; Saranin, A.; Dhaka, V.; Lipsanen, H.

2018-01-01

We present a new method for the deposition of colloidal Au nanoparticles on the surface of silicon substrates based on short-time Ar plasma treatment without the use of any polymeric layers. The elaborated method is compatible with molecular beam epitaxy, which allowed us to carry out the detailed study of GaAs nanowire synthesis on Si(111) substrates using colloidal Au nanoparticles as seeds for their growth. The results obtained elucidated the causes of the difference between the initial nanoparticle sizes and the diameters of the grown nanowires.

Molybdenum enhanced low-temperature deposition of crystalline silicon nitride

DOEpatents

Lowden, R.A.

1994-04-05

A process for chemical vapor deposition of crystalline silicon nitride is described which comprises the steps of: introducing a mixture of a silicon source, a molybdenum source, a nitrogen source, and a hydrogen source into a vessel containing a suitable substrate; and thermally decomposing the mixture to deposit onto the substrate a coating comprising crystalline silicon nitride containing a dispersion of molybdenum silicide. 5 figures.

Electron Beam "Writes" Silicon On Sapphire

NASA Technical Reports Server (NTRS)

Heinemann, Klaus

1988-01-01

Method of growing silicon on sapphire substrate uses beam of electrons to aid growth of semiconductor material. Silicon forms as epitaxial film in precisely localized areas in micron-wide lines. Promising fabrication method for fast, densely-packed integrated circuits. Silicon deposited preferentially in contaminated substrate zones and in clean zone irradiated by electron beam. Electron beam, like surface contamination, appears to stimulate decomposition of silane atmosphere.

Spectroellipsometric detection of silicon substrate damage caused by radiofrequency sputtering of niobium oxide

NASA Astrophysics Data System (ADS)

Lohner, Tivadar; Serényi, Miklós; Szilágyi, Edit; Zolnai, Zsolt; Czigány, Zsolt; Khánh, Nguyen Quoc; Petrik, Péter; Fried, Miklós

2017-11-01

Substrate surface damage induced by deposition of metal atoms by radiofrequency (rf) sputtering or ion beam sputtering onto single-crystalline silicon (c-Si) surface has been characterized earlier by electrical measurements. The question arises whether it is possible to characterize surface damage using spectroscopic ellipsometry (SE). In our experiments niobium oxide layers were deposited by rf sputtering on c-Si substrates in gas mixture of oxygen and argon. Multiple angle of incidence spectroscopic ellipsometry measurements were performed, a four-layer optical model (surface roughness layer, niobium oxide layer, native silicon oxide layer and ion implantation-amorphized silicon [i-a-Si] layer on a c-Si substrate) was created in order to evaluate the spectra. The evaluations yielded thicknesses of several nm for the i-a-Si layer. Better agreement could be achieved between the measured and the generated spectra by inserting a mixed layer (with components of c-Si and i-a-Si applying the effective medium approximation) between the silicon oxide layer and the c-Si substrate. High depth resolution Rutherford backscattering (RBS) measurements were performed to investigate the interface disorder between the deposited niobium oxide layer and the c-Si substrate. Atomic resolution cross-sectional transmission electron microscopy investigation was applied to visualize the details of the damaged subsurface region of the substrate.

Impact of the silicon substrate resistivity and growth condition on the deep levels in Ni-Au/AlN/Si MIS Capacitors

NASA Astrophysics Data System (ADS)

Wang, Chong; Simoen, Eddy; Zhao, Ming; Li, Wei

2017-10-01

Deep levels formed under different growth conditions of a 200 nm AlN buffer layer on B-doped Czochralski Si(111) substrates with different resistivity were investigated by deep-level transient spectroscopy (DLTS) on metal-insulator-semiconductor capacitors. Growth-temperature-dependent Al diffusion in the Si substrate was derived from the free carrier density obtained by capacitance-voltage measurement on samples grown on p- substrates. The DLTS spectra revealed a high concentration of point and extended defects in the p- and p+ silicon substrates, respectively. This indicated a difference in the electrically active defects in the silicon substrate close to the AlN/Si interface, depending on the B doping concentration.

Process for the deposition of high temperature stress and oxidation resistant coatings on silicon-based substrates

DOEpatents

Sarin, V.K.

1991-07-30

A process is disclosed for depositing a high temperature stress and oxidation resistant coating on a silicon nitride- or silicon carbide-based substrate body. A gas mixture is passed over the substrate at about 900--1500 C and about 1 torr to about ambient pressure. The gas mixture includes one or more halide vapors with other suitable reactant gases. The partial pressure ratios, flow rates, and process times are sufficient to deposit a continuous, fully dense, adherent coating. The halide and other reactant gases are gradually varied during deposition so that the coating is a graded coating of at least two layers. Each layer is a graded layer changing in composition from the material over which it is deposited to the material of the layer and further to the material, if any, deposited thereon, so that no clearly defined compositional interfaces exist. The gases and their partial pressures are varied according to a predetermined time schedule and the halide and other reactant gases are selected so that the layers include (a) an adherent, continuous intermediate layer about 0.5-20 microns thick of an aluminum nitride or an aluminum oxynitride material, over and chemically bonded to the substrate body, and (b) an adherent, continuous first outer layer about 0.5-900 microns thick including an oxide of aluminum or zirconium over and chemically bonded to the intermediate layer.

Process for the deposition of high temperature stress and oxidation resistant coatings on silicon-based substrates

DOEpatents

Sarin, Vinod K.

1991-01-01

A process for depositing a high temperature stress and oxidation resistant coating on a silicon nitride- or silicon carbide-based substrate body. A gas mixture is passed over the substrate at about 900.degree.-1500.degree. C. and about 1 torr to about ambient pressure. The gas mixture includes one or more halide vapors with other suitable reactant gases. The partial pressure ratios, flow rates, and process times are sufficient to deposit a continuous, fully dense, adherent coating. The halide and other reactant gases are gradually varied during deposition so that the coating is a graded coating of at least two layers. Each layer is a graded layer changing in composition from the material over which it is deposited to the material of the layer and further to the material, if any, deposited thereon, so that no clearly defined compositional interfaces exist. The gases and their partial pressures are varied according to a predetermined time schedule and the halide and other reactant gases are selected so that the layers include (a) an adherent, continuous intermediate layer about 0.5-20 microns thick of an aluminum nitride or an aluminum oxynitride material, over and chemically bonded to the substrate body, and (b) an adherent, continuous first outer layer about 0.5-900 microns thick including an oxide of aluminum or zirconium over and chemically bonded to the intermediate layer.

Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

DOEpatents

Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

1991-01-01

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

Purified silicon production system

DOEpatents

Wang, Tihu; Ciszek, Theodore F.

2004-03-30

Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.

Dip coating process: Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Heaps, J. D.; Maciolek, R. B.; Harrison, W. B.; Wolner, H. A.; Hendrickson, G.; Nelson, L. D.

1976-01-01

To date, an experimental dip-coating facility was constructed. Using this facility, relatively thin (1 mm) mullite and alumina substrates were successfully dip-coated with 2.5 - 3.0 ohm-cm, p-type silicon with areas of approximately 20 sq cm. The thickness and grain size of these coatings are influenced by the temperature of the melt and the rate at which the substrate is pulled from the melt. One mullite substrate had dendrite-like crystallites of the order of 1 mm wide and 1 to 2 cm long. Their axes were aligned along the direction of pulling. A large variety of substrate materials were purchased or developed enabling the program to commence a substrate definition evaluation. Due to the insulating nature of the substrate, the bottom layer of the p-n junction may have to be made via the top surface. The feasibility of accomplishing this was demonstrated using single crystal wafers.

Silicon carbide thyristor

NASA Technical Reports Server (NTRS)

Edmond, John A. (Inventor); Palmour, John W. (Inventor)

1996-01-01

The SiC thyristor has a substrate, an anode, a drift region, a gate, and a cathode. The substrate, the anode, the drift region, the gate, and the cathode are each preferably formed of silicon carbide. The substrate is formed of silicon carbide having one conductivity type and the anode or the cathode, depending on the embodiment, is formed adjacent the substrate and has the same conductivity type as the substrate. A drift region of silicon carbide is formed adjacent the anode or cathode and has an opposite conductivity type as the anode or cathode. A gate is formed adjacent the drift region or the cathode, also depending on the embodiment, and has an opposite conductivity type as the drift region or the cathode. An anode or cathode, again depending on the embodiment, is formed adjacent the gate or drift region and has an opposite conductivity type than the gate.

Bidisperse silica nanoparticles close-packed monolayer on silicon substrate by three step spin method

NASA Astrophysics Data System (ADS)

Khanna, Sakshum; Marathey, Priyanka; Utsav, Chaliawala, Harsh; Mukhopadhyay, Indrajit

2018-05-01

We present the studies on the structural properties of monolayer Bidisperse silica (SiO2) nanoparticles (BDS) on Silicon (Si-100) substrate using spin coating technique. The Bidisperse silica nanoparticle was synthesised by the modified sol-gel process. Nanoparticles on the substrate are generally assembled in non-close/close-packed monolayer (CPM) form. The CPM form is obtained by depositing the colloidal suspension onto the silicon substrate using complex techniques. Here we report an effective method for forming a monolayer of bidisperse silica nanoparticle by three step spin coating technique. The samples were prepared by mixing the monodisperse solutions of different particles size 40 and 100 nm diameters. The bidisperse silica nanoparticles were self-assembled on the silicon substrate forming a close-packed monolayer film. The scanning electron microscope images of bidisperse films provided in-depth film structure of the film. The maximum surface coverage obtained was around 70-80%.

Fabrication of novel plasmonics-active substrates

NASA Astrophysics Data System (ADS)

Dhawan, Anuj; Gerhold, Michael; Du, Yan; Misra, Veena; Vo-Dinh, Tuan

2009-02-01

This paper describes methodologies for fabricating of highly efficient plasmonics-active SERS substrates - having metallic nanowire structures with pointed geometries and sub-5 nm gap between the metallic nanowires enabling concentration of high EM fields in these regions - on a wafer-scale by a reproducible process that is compatible with large-scale development of these substrates. Excitation of surface plasmons in these nanowire structures leads to substantial enhancement in the Raman scattering signal obtained from molecules lying in the vicinity of the nanostructure surface. The methodologies employed included metallic coating of silicon nanowires fabricated by employing deep UV lithography as well as controlled growth of silicon germanium on silicon nanostructures to form diamond-shaped nanowire structures followed by metallic coating. These SERS substrates were employed for detecting chemical and biological molecules of interest. In order to characterize the SERS substrates developed in this work, we obtained SERS signals from molecules such as p-mercaptobenzoic acid (pMBA) and cresyl fast violet (CFV) attached to or adsorbed on the metal-coated SERS substrates. It was observed that both gold-coated triangular shaped nanowire substrates as well as gold-coated diamond shaped nanowire substrates provided very high SERS signals for the nanowires having sub-15 nm gaps and that the SERS signal depends on the closest spacing between the metal-coated silicon and silicon germanium nanowires. SERS substrates developed by the different processes were also employed for detection of biological molecules such as DPA (Dipicolinic Acid), an excellent marker for spores of bacteria such as Anthrax.

Crystalline silicon growth in nickel/a-silicon bilayer

NASA Astrophysics Data System (ADS)

Mohiddon, Md Ahamad; Naidu, K. Lakshun; Dalba, G.; Rocca, F.; Krishna, M. Ghanashyam

2013-02-01

The effect of substrate temperature on amorphous Silicon crystallization, mediated by metal impurity is reported. Bilayers of Ni(200nm)/Si(400nm) are deposited on fused silica substrate by electron beam evaporator at 200 and 500 °C. Raman mapping shows that, 2 to 5 micron size crystalline silicon clusters are distributed over the entire surface of the sample. X-ray diffraction and X-ray absorption spectroscopy studies demonstrate silicon crystallizes over the metal silicide seeds and grow with the annealing temperature.

Solar cell with silicon oxynitride dielectric layer

DOEpatents

Shepherd, Michael; Smith, David D

2015-04-28

Solar cells with silicon oxynitride dielectric layers and methods of forming silicon oxynitride dielectric layers for solar cell fabrication are described. For example, an emitter region of a solar cell includes a portion of a substrate having a back surface opposite a light receiving surface. A silicon oxynitride (SiO.sub.xN.sub.y, 0

Fabrication of heterojunction solar cells by improved tin oxide deposition on insulating layer

DOEpatents

Feng, Tom; Ghosh, Amal K.

1980-01-01

Highly efficient tin oxide-silicon heterojunction solar cells are prepared by heating a silicon substrate, having an insulating layer thereon, to provide a substrate temperature in the range of about 300.degree. C. to about 400.degree. C. and thereafter spraying the so-heated substrate with a solution of tin tetrachloride in a organic ester boiling below about 250.degree. C. Preferably the insulating layer is naturally grown silicon oxide layer.

Porous silicon carbide (SIC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1996-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Rapid fabrication of a silicon modification layer on silicon carbide substrate.

PubMed

Bai, Yang; Li, Longxiang; Xue, Donglin; Zhang, Xuejun

2016-08-01

We develop a kind of magnetorheological (MR) polishing fluid for the fabrication of a silicon modification layer on a silicon carbide substrate based on chemical theory and actual polishing requirements. The effect of abrasive concentration in MR polishing fluid on material removal rate and removal function shape is investigated. We conclude that material removal rate will increase and tends to peak value as the abrasive concentration increases to 0.3 vol. %, and the removal function profile will become steep, which is a disadvantage to surface frequency error removal at the same time. The removal function stability is also studied and the results show that the prepared MR polishing fluid can satisfy actual fabrication requirements. An aspheric reflective mirror of silicon carbide modified by silicon is well polished by combining magnetorheological finishing (MRF) using two types of MR polishing fluid and computer controlled optical surfacing (CCOS) processes. The surface accuracy root mean square (RMS) is improved from 0.087λ(λ=632.8  nm) initially to 0.020λ(λ=632.8  nm) in 5.5 h total and the tool marks resulting from MRF are negligible. The PSD analysis results also shows that the final surface is uniformly polished.

Direct Growth of Graphene on Silicon by Metal-Free Chemical Vapor Deposition

NASA Astrophysics Data System (ADS)

Tai, Lixuan; Zhu, Daming; Liu, Xing; Yang, Tieying; Wang, Lei; Wang, Rui; Jiang, Sheng; Chen, Zhenhua; Xu, Zhongmin; Li, Xiaolong

2018-06-01

The metal-free synthesis of graphene on single-crystal silicon substrates, the most common commercial semiconductor, is of paramount significance for many technological applications. In this work, we report the growth of graphene directly on an upside-down placed, single-crystal silicon substrate using metal-free, ambient-pressure chemical vapor deposition. By controlling the growth temperature, in-plane propagation, edge-propagation, and core-propagation, the process of graphene growth on silicon can be identified. This process produces atomically flat monolayer or bilayer graphene domains, concave bilayer graphene domains, and bulging few-layer graphene domains. This work would be a significant step toward the synthesis of large-area and layer-controlled, high-quality graphene on single-crystal silicon substrates. [Figure not available: see fulltext.

Method for deposition of a conductor in integrated circuits

DOEpatents

Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

1997-01-01

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

Method of deposition of silicon carbide layers on substrates and product

DOEpatents

Angelini, Peter; DeVore, Charles E.; Lackey, Walter J.; Blanco, Raymond E.; Stinton, David P.

1984-01-01

A method for direct chemical vapor deposition of silicon carbide to substrates, especially nuclear waste particles, is provided by the thermal decomposition of methylsilane at about 800.degree. C. to 1050.degree. C. when the substrates have been confined within a suitable coating environment.

Metalorganic chemical vapor deposition of gallium nitride on sacrificial substrates

NASA Astrophysics Data System (ADS)

Fenwick, William Edward

GaN-based light emitting diodes (LEDs) face several challenges if the technology is to continue to make a significant impact in general illumination, and on technology that has become known as solid state lighting (SSL). Two of the most pressing challenges for the continued penetration of SSL into traditional lighting applications are efficacy and total lumens from the device, and their related cost. The development of alternative substrate technologies is a promising avenue toward addressing both of these challenges, as both GaN-based device technology and the associated metalorganic chemical vapor deposition (MOCVD) technology are already relatively mature technologies with a well-understood cost base. Zinc oxide (ZnO) and silicon (Si) are among the most promising alternative substrates for GaN epitaxy. These substrates offer the ability to access both higher efficacy and lumen devices (ZnO) at a much reduced cost. This work focuses on the development of MOCVD growth processes to yield high quality GaN-based materials and devices on both ZnO and Si. ZnO is a promising substrate for growth of low defect-density GaN because of its similar lattice constant and thermal expansion coefficient. The major hurdles for GaN growth on ZnO are the instability of the substrate in a hydrogen atmosphere, which is typical of nitride growth conditions, and the inter-diffusion of zinc and oxygen from the substrate into the GaN-based epitaxial layer. A process was developed for the MOCVD growth of GaN and InxGa 1-xN on ZnO that attempted to address these issues. The structural and optical properties of these films were studied using various techniques. X-ray diffraction (XRD) showed the growth of wurtzite GaN on ZnO, and room-temperature photoluminescence (RT-PL) showed near band-edge luminescence from the GaN and InxGa1-xN layers. However, high zinc and oxygen concentrations due to interdiffusion near the ZnO substrate remained an issue; therefore, the diffusion of zinc and oxygen into the subsequent GaN layer was studied in more detail. Several approaches were investigated---for example, transition layers such as Al2O3 and Al xGa1-xN/GaN---to minimize diffusion of these impurities into the GaN layer. Silicon, due to its prevalence, is the most promising material for the development of an inexpensive, large-area substrate technology. The challenge in MOCVD growth of GaN on Si is the tensile strain induced by the lattice and thermal mismatch between GaN and Si and the formation of anti-phase boundaries. Typical approaches to solve these problems involve complicated and multiple buffer layer structures, which lead to relatively slow growth rates. In this work, a thin atomic layer deposition (ALD)-grown Al2O3 interlayer was employed to relieve strain and increase material quality while also simplifying the growth process. While some residual strain was still observed in the GaN material by XRD and PL, the use of this oxide interlayer leads to an improvement in thin film quality as seen by a reduction in both crack density (<1 mm-2) on ALD-Al2O3/Si) and screw dislocation density (from 3x109cm-2 on bare Si to 2x108cm-2 on ALD-Al 2O3/Si) in the GaN films. A side-by-side comparison of GaN-based multiple quantum well LEDs grown on sapphire and on Al2O3/Si shows similar performance characteristic for both device structures. A redshift in peak emission wavelength was also observed on silicon compared to sapphire, and this is attributed to higher indium content due to the slight tensile strain in the layers on silicon. IQE of the devices on silicon is ˜32% as measured by LT-PL, compared to ˜37% on sapphire, but this difference can be assigned to the difference in indium compositions. These results show a great promise toward an inexpensive, large-area, silicon-based substrate technology for MOCVD growth of the next generation of GaN-based optoelectronic devices for SSL and other applications.

Improved toughness of silicon carbide

NASA Technical Reports Server (NTRS)

Palm, J. A.

1976-01-01

Impact energy absorbing layers (EALs) comprised of partially densified silicon carbide were formed in situ on fully sinterable silicon carbide substrates. After final sintering, duplex silicon carbide structures resulted which were comprised of a fully sintered, high density silicon carbide substrate or core, overlayed with an EAL of partially sintered silicon carbide integrally bonded to its core member. Thermal cycling tests proved such structures to be moderately resistant to oxidation and highly resistant to thermal shock stresses. The strength of the developed structures in some cases exceeded but essentially it remained the same as the fully sintered silicon carbide without the EAL. Ballistic impact tests indicated that substantial improvements in the toughness of sintered silicon carbide were achieved by the use of the partially densified silicon carbide EALs.

Dip coating process: Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Heaps, J. D.; Maciolek, R. B.; Zook, J. D.; Harrison, W. B.; Scott, M. W.; Hendrickson, G.; Wolner, H. A.; Nelson, L. D.; Schuller, T. L.; Peterson, A. A.

1976-01-01

The technical and economic feasibility of producing solar cell quality sheet silicon by dip-coating one surface of carbonized ceramic substrates with a thin layer of large grain polycrystalline silicon was investigated. The dip-coating methods studied were directed toward a minimum cost process with the ultimate objective of producing solar cells with a conversion efficiency of 10% or greater. The technique shows excellent promise for low cost, labor-saving, scale-up potentialities and would provide an end product of sheet silicon with a rigid and strong supportive backing. An experimental dip-coating facility was designed and constructed, several substrates were successfully dip-coated with areas as large as 25 sq cm and thicknesses of 12 micron to 250 micron. There appears to be no serious limitation on the area of a substrate that could be coated. Of the various substrate materials dip-coated, mullite appears to best satisfy the requirement of the program. An inexpensive process was developed for producing mullite in the desired geometry.

Interaction of a single acetophenone molecule with group III-IV elements mediated by Si(001)

NASA Astrophysics Data System (ADS)

Racis, A.; Jurczyszyn, L.; Radny, M. W.

2018-03-01

A theoretical study of an influence of the acetophenone molecule adsorbed on the Si(001) on the local chemical reactivity of silicon surface is presented. The obtained results indicate that the interaction of the molecule with silicon substrate breaks the intra-dimer π bonds in four surface silicon dimers interacting directly with adsorbed molecule. This leads to the formation of two pairs of unpaired dangling bonds at two opposite sides of the molecule. It is demonstrated that these dangling bonds increase considerably the local chemical reactivity of the silicon substrate in the vicinity of the adsorbed molecule. Consequently, it is shown that such molecule bonded with Si(001) can stabilize the position of In and Pb adatoms diffusing on silicon substrate at two sides and initiate the one-dimensional aggregation of the metallic adatoms on the Si(001) substrate anchored at both sides of the adsorbed molecule. This type of aggregation leads to the growth of chain-like atomic structures in opposite directions, pinned to adsorbed molecule and oriented perpendicular to the rows of surface silicon dimers.

Low-Power RIE of SiO2 in CHF3 To Obtain Steep Sidewalls

NASA Technical Reports Server (NTRS)

Turner, Tasha; Wu, Chi

2003-01-01

A reactive-ion etching (RIE) process has been developed to enable the formation of holes with steep sidewalls in a layer of silicon dioxide that covers a silicon substrate. The holes in question are through the thickness of the SiO2 and are used to define silicon substrate areas to be etched or to be built upon through epitaxial deposition of silicon. The sidewalls of these holes are required to be vertical in order to ensure that the sidewalls of the holes to be etched in the substrate or the sidewalls of the epitaxial deposits, respectively, also turn out to be vertical.

Transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Purification and deposition of silicon by an iodide disproportionation reaction

DOEpatents

Wang, Tihu; Ciszek, Theodore F.

2002-01-01

Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.

COMPARISON OF TRICHLOROETHYLENE REDUCTIVE DEHALOGENATION BY MICROBIAL COMMUNITIES STIMULATED ON SILICON-BASED ORGANIC COMPOUNDS AS SLOW-RELEASE ANAEROBIC SUBSTRATES. (R828772C001)

EPA Science Inventory

Microcosm studies were conducted to demonstrate the effectiveness of tetrabutoxysilane (TBOS) as a slow-release anaerobic substrate to promote reductive dehalogenation of trichloroethylene (TCE). The abiotic hydrolysis of TBOS and tetrakis(2-ethylbutoxy)silane (TKEBS), and the...

Composition Comprising Silicon Carbide

NASA Technical Reports Server (NTRS)

Mehregany, Mehran (Inventor); Zorman, Christian A. (Inventor); Fu, Xiao-An (Inventor); Dunning, Jeremy L. (Inventor)

2012-01-01

A method of depositing a ceramic film, particularly a silicon carbide film, on a substrate is disclosed in which the residual stress, residual stress gradient, and resistivity are controlled. Also disclosed are substrates having a deposited film with these controlled properties and devices, particularly MEMS and NEMS devices, having substrates with films having these properties.

Method and apparatus for forming conformal SiN.sub.x films

DOEpatents

Wang, Qi

2007-11-27

A silicon nitride film formation method includes: Heating a substrate to be subjected to film formation to a substrate temperature; heating a wire to a wire temperature; supplying silane, ammonia, and hydrogen gases to the heating member; and forming a silicon nitride film on the substrate.

Status of AlGaN based focal plane array for near UV imaging and strategy to extend this technology to far-UV by substrate removal

NASA Astrophysics Data System (ADS)

Reverchon, Jean-Luc; Gourdel, Yves; Robo, Jean-Alexandre; Truffer, Jean-Patrick; Costard, Eric; Brault, Julien; Duboz, Jean-Yves

2017-11-01

The fast development of nitrides has given the opportunity to investigate AlGaN as a material for ultraviolet detection. Such AlGaN based camera presents an intrinsic spectral selectivity and an extremely low dark current at room temperature. Firstly, we will present results on focal plane array of 320x256 pixels with a pitch of 30μm. The peak responsivity is around 280nm (solar-blind), 310nm and 360nm. These results are obtained in a standard SWIR supply chain (readout circuit, electronics). With the existing near-UV camera grown on sapphire, the short wavelength cutoff is due to a window layer improving the material quality of the active layer. The ultimate shortest wavelength would be 200nm due to sapphire substrate. We present here the ways to transfer the standard design of Schottky photodiodes from sapphire to silicon substrate. We will show the capability to remove the silicon substrate, and etch the window layer in order to extend the band width to lower wavelengths.

Sensing based on surface-enhanced Raman scattering using self-forming ZnO nanoarrays coated with gold as substrates

NASA Astrophysics Data System (ADS)

Tang, Feng; Adam, Pierre-Michel; Rogers, David J.; Sandana, Vinod E.; Bove, Philippe; Teherani, Ferechteh H.

2018-03-01

Surface-Enhanced Raman spectroscopy (SERS) is a widely used technique adopted in both academia and industry for the detection of trace quantities of Raman active molecules. This is usually accomplished by functionalizing distributions of plasmonic metal nanoparticles with the analyte molecules. Recently metal-coated nanostructures have been investigated as alternatives to dispersions of metal nanoparticles in order to avoid clustering and homogeneity/reproducibility issues. In this paper, several samples of Au-coated ZnO nanoarrays are adopted as SERS substrates in order to investigate the molecular sensing capacity for methylene blue (MB) molecules. Self-forming ZnO nanoarrays were grown on both c-sapphire and silicon substrates by pulsed laser deposition. The nanoarrays were then coated with 30 nm of gold using thermal evaporation and the SERS signals of MB functionalized samples were obtained with a Raman microspectrometer. The ratio of SERS intensity to that of an MB functionalized glass substrate (ISERS/IRaman) was calculated based on the averaged SERS signals. A relatively good within-wafer homogeneity of the enhancement effect was found with ISERS/IRaman values as high as 64.2 for Au-coated nano ZnO grown on silicon substrates. The experimental results show that the Au-coated ZnO nanoarrays can be excellent SERS substrates for molecular/chemical analyte sensing.

Porous silicon-VO{sub 2} based hybrids as possible optical temperature sensor: Wavelength-dependent optical switching from visible to near-infrared range

DOE Office of Scientific and Technical Information (OSTI.GOV)

Antunez, E. E.; Salazar-Kuri, U.; Estevez, J. O.

Morphological properties of thermochromic VO{sub 2}—porous silicon based hybrids reveal the growth of well-crystalized nanometer-scale features of VO{sub 2} as compared with typical submicron granular structure obtained in thin films deposited on flat substrates. Structural characterization performed as a function of temperature via grazing incidence X-ray diffraction and micro-Raman demonstrate reversible semiconductor-metal transition of the hybrid, changing from a low-temperature monoclinic VO{sub 2}(M) to a high-temperature tetragonal rutile VO{sub 2}(R) crystalline structure, coupled with a decrease in phase transition temperature. Effective optical response studied in terms of red/blue shift of the reflectance spectra results in a wavelength-dependent optical switching withmore » temperature. As compared to VO{sub 2} film over crystalline silicon substrate, the hybrid structure is found to demonstrate up to 3-fold increase in the change of reflectivity with temperature, an enlarged hysteresis loop and a wider operational window for its potential application as an optical temperature sensor. Such silicon based hybrids represent an exciting class of functional materials to display thermally triggered optical switching culminated by the characteristics of each of the constituent blocks as well as device compatibility with standard integrated circuit technology.« less

Stability of Polymer Ultrathin Films (<7 nm) Made by a Top-Down Approach.

PubMed

Bal, Jayanta Kumar; Beuvier, Thomas; Unni, Aparna Beena; Chavez Panduro, Elvia Anabela; Vignaud, Guillaume; Delorme, Nicolas; Chebil, Mohamed Souheib; Grohens, Yves; Gibaud, Alain

2015-08-25

In polymer physics, the dewetting of spin-coated polystyrene ultrathin films on silicon remains mysterious. By adopting a simple top-down method based on good solvent rinsing, we are able to prepare flat polystyrene films with a controlled thickness ranging from 1.3 to 7.0 nm. Their stability was scrutinized after a classical annealing procedure above the glass transition temperature. Films were found to be stable on oxide-free silicon irrespective of film thickness, while they were unstable (<2.9 nm) and metastable (>2.9 nm) on 2 nm oxide-covered silicon substrates. The Lifshitz-van der Waals intermolecular theory that predicts the domains of stability as a function of the film thickness and of the substrate nature is now fully reconciled with our experimental observations. We surmise that this reconciliation is due to the good solvent rinsing procedure that removes the residual stress and/or the density variation of the polystyrene films inhibiting thermodynamically the dewetting on oxide-free silicon.

N-type compensated silicon: resistivity, crystal growth, carrier lifetime, and relevant application for HIT solar cells

NASA Astrophysics Data System (ADS)

Li, Shuai; Gao, Wenxiu; Li, Zhen; Cheng, Haoran; Lin, Jinxia; Cheng, Qijin

2017-05-01

N-type compensated silicon shows unusual distribution of resistivity as crystal grows compared to the n-type uncompensated silicon. In this paper, evolutions of resistivities with varied concentrations of boron and varied starting resistivities of the n-type silicon are intensively calculated. Moreover, reduction of carrier mobility is taken into account by Schindler’s modified model of carrier mobility for the calculation of resistivity of the compensated silicon. As for substrates of solar cells, optimized starting resistivity and corresponding concentration of boron are suggested for better uniformity of resistivity and higher yield (fraction with ρ >0.5 ~ Ω \\centerdot \\text{cm} ) of the n-type compensated Cz crystal rod. A two-step growth method is investigated to obtain better uniformity of resistivity of crystal rod, and this method is very practical especially for the n-type compensated silicon. Regarding the carrier lifetime, the recombination by shallow energy-level dopants is taken into account for the compensated silicon, and evolution of carrier lifetime is simulated by considering all main recombination centers which agrees well with our measured carrier lifetimes as crystal grows. The n-type compensated silicon shows a larger reduction of carrier lifetime compared to the uncompensated silicon at the beginning of crystal growth, and recombination with a oxygen-related deep defect is sufficient to describe the reduction of degraded lifetime. Finally, standard heterojunction with intrinsic thin-layer (HIT) solar cells are made with substrates from the n-type compensated silicon rod, and a high efficiency of 22.1% is obtained with a high concentration (0.8× {{10}16}~\\text{c}{{\\text{m}}-3} ) of boron in the n-type compensated silicon feedstock. However, experimental efficiencies of HIT solar cells based on the n-type compensated silicon show an average reduction of 4% along with the crystal length compared to the uncompensated silicon. The obtained results enrich our knowledge on the n-type compensated silicon and contribute to the development of n-type compensated silicon-based solar cells for commercial application.

Silicon on Ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

NASA Technical Reports Server (NTRS)

Chapman, P. W.; Zook, J. D.; Heaps, J. D.; Pickering, C.; Grung, B. L.; Koepke, B.; Schuldt, S. B.

1979-01-01

The technical and economic feasibility of producing solar cell quality sheet silicon was investigated. It was hoped this could be done by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Work was directed towards the solution of unique cell processing/design problems encountered with the silicon-ceramic (SOC) material due to its intimate contact with the ceramic substrate. Significant progress was demonstrated in the following areas; (1) the continuous coater succeeded in producing small-area coatings exhibiting unidirectional solidification and substatial grain size; (2) dip coater succeeded in producing thick (more than 500 micron) dendritic layers at coating speeds of 0.2-0.3 cm/sec; and (3) a standard for producing total area SOC solar cells using slotted ceramic substrates was developed.

Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer

DOEpatents

Manginell, Ronald P.; Schubert, W. Kent; Shul, Randy J.

2005-08-16

New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.

Method for forming silicon on a glass substrate

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method by which single-crystal silicon microelectronics may be fabricated on glass substrates at unconventionally low temperatures. This is achieved by fabricating a thin film of silicon on glass and subsequently forming the doped components by a short wavelength (excimer) laser doping procedure and conventional patterning techniques. This method may include introducing a heavily boron doped etch stop layer on a silicon wafer using an excimer laser, which permits good control of the etch stop layer removal process. This method additionally includes dramatically reducing the remaining surface roughness of the silicon thin films after etching in the fabrication of silicon on insulator wafers by scanning an excimer laser across the surface of the silicon thin film causing surface melting, whereby the surface tension of the melt causes smoothing of the surface during recrystallization. Applications for this method include those requiring a transparent or insulating substrate, such as display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard and high temperature electronics.

Method for forming silicon on a glass substrate

DOEpatents

McCarthy, A.M.

1995-03-07

A method by which single-crystal silicon microelectronics may be fabricated on glass substrates at unconventionally low temperatures. This is achieved by fabricating a thin film of silicon on glass and subsequently forming the doped components by a short wavelength (excimer) laser doping procedure and conventional patterning techniques. This method may include introducing a heavily boron doped etch stop layer on a silicon wafer using an excimer laser, which permits good control of the etch stop layer removal process. This method additionally includes dramatically reducing the remaining surface roughness of the silicon thin films after etching in the fabrication of silicon on insulator wafers by scanning an excimer laser across the surface of the silicon thin film causing surface melting, whereby the surface tension of the melt causes smoothing of the surface during recrystallization. Applications for this method include those requiring a transparent or insulating substrate, such as display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard and high temperature electronics. 15 figs.

Polycrystalline silicon on tungsten substrates

NASA Technical Reports Server (NTRS)

Bevolo, A. J.; Schmidt, F. A.; Shanks, H. R.; Campisi, G. J.

1979-01-01

Thin films of electron-beam-vaporized silicon were deposited on fine-grained tungsten substrates under a pressure of about 1 x 10 to the -10th torr. Mass spectra from a quadrupole residual-gas analyzer were used to determine the partial pressure of 13 residual gases during each processing step. During separate silicon depositions, the atomically clean substrates were maintained at various temperatures between 400 and 780 C, and deposition rates were between 20 and 630 A min. Surface contamination and interdiffusion were monitored by in situ Auger electron spectrometry before and after cleaning, deposition, and annealing. Auger depth profiling, X-ray analysis, and SEM in the topographic and channeling modes were utilized to characterize the samples with respect to silicon-metal interface, interdiffusion, silicide formation, and grain size of silicon. The onset of silicide formation was found to occur at approximately 625 C. Above this temperature tungsten silicides were formed at a rate faster than the silicon deposition. Fine-grain silicon films were obtained at lower temperatures.

Mid-infrared integrated photonics on silicon: a perspective

NASA Astrophysics Data System (ADS)

Lin, Hongtao; Luo, Zhengqian; Gu, Tian; Kimerling, Lionel C.; Wada, Kazumi; Agarwal, Anu; Hu, Juejun

2017-12-01

The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR) telecommunication bands, the mid-infrared (mid-IR, 2-20-μm wavelength) band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

Surface Attachment of Gold Nanoparticles Guided by Block Copolymer Micellar Films and Its Application in Silicon Etching

PubMed Central

Wei, Mingjie; Wang, Yong

2015-01-01

Patterning metallic nanoparticles on substrate surfaces is important in a number of applications. However, it remains challenging to fabricate such patterned nanoparticles with easily controlled structural parameters, including particle sizes and densities, from simple methods. We report on a new route to directly pattern pre-formed gold nanoparticles with different diameters on block copolymer micellar monolayers coated on silicon substrates. Due to the synergetic effect of complexation and electrostatic interactions between the micellar cores and the gold particles, incubating the copolymer-coated silicon in a gold nanoparticles suspension leads to a monolayer of gold particles attached on the coated silicon. The intermediate micellar film was then removed using oxygen plasma treatment, allowing the direct contact of the gold particles with the Si substrate. We further demonstrate that the gold nanoparticles can serve as catalysts for the localized etching of the silicon substrate, resulting in nanoporous Si with a top layer of straight pores. PMID:28793407

RF sputtering for controlling dihydride and monohydride bond densities in amorphous silicon hydride

DOEpatents

Jeffery, F.R.; Shanks, H.R.

1980-08-26

A process is described for controlling the dihydride and monohydride bond densities in hydrogenated amorphous silicone produced by reactive rf sputtering of an amorphous silicon target. There is provided a chamber with an amorphous silicon target and a substrate therein with the substrate and the target positioned such that when rf power is applied to the target the substrate is in contact with the sputtering plasma produced thereby. Hydrogen and argon are fed to the chamber and the pressure is reduced in the chamber to a value sufficient to maintain a sputtering plasma therein, and then rf power is applied to the silicon target to provide a power density in the range of from about 7 watts per square inch to about 22 watts per square inch to sputter an amorphous solicone hydride onto the substrate, the dihydride bond density decreasing with an increase in the rf power density. Substantially pure monohydride films may be produced.

Method of forming contacts for a back-contact solar cell

DOEpatents

Manning, Jane

2015-10-20

Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions.

Method of forming contacts for a back-contact solar cell

DOEpatents

Manning, Jane

2014-07-15

Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions.

Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

NASA Astrophysics Data System (ADS)

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

2016-03-01

We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.

Method for deposition of a conductor in integrated circuits

DOEpatents

Creighton, J.R.; Dominguez, F.; Johnson, A.W.; Omstead, T.R.

1997-09-02

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten. 2 figs.

Method of fabricating porous silicon carbide (SiC)

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1995-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Circularly polarized Raman study on diamond structure crystals

NASA Astrophysics Data System (ADS)

Lee, Je-Ho; Kim, Sera; Seong, Maeng-Je

2018-01-01

Circularly polarized Raman and/or photoluminescence (PL) analyses have recently been very important in studying physical properties of many layered materials that were either mechanically exfoliated or grown by chemical-vapor-deposition (CVD) on silicon substrates. Since silicon Raman signal is always accompanied by the circularly polarized Raman and/or PL signal from the layered materials, observation of proper circularly polarized Raman selection rules on silicon substrates would be extremely good indicator that the circularly polarized Raman and/or PL measurements on the layered materials were done properly. We have performed circularly polarized Raman measurements on silicon substrates and compared the results with the Raman intensities calculated by using Raman tensors of the diamond crystal structure. Our experimental results were in excellent agreement with the calculation. Similar circularly polarized Raman analysis done on germanium substrate also showed good agreement.

Passivation coating for flexible substrate mirrors

DOEpatents

Tracy, C. Edwin; Benson, David K.

1990-01-01

A protective diffusion barrier for metalized mirror structures is provided by a layer or coating of silicon nitride which is a very dense, transparent, dielectric material that is impervious to water, alkali, and other impurities and corrosive substances that typically attack the metal layers of mirrors and cause degradation of the mirrors' reflectivity. The silicon nitride layer can be deposited on the substrate before metal deposition thereon to stabilize the metal/substrate interface, and it can be deposited over the metal to encapsulate it and protect the metal from corrosion or other degradation. Mirrors coated with silicon nitride according to this invention can also be used as front surface mirrors. Also, the silver or other reflective metal layer on mirrors comprising thin, lightweight, flexible substrates of metal or polymer sheets coated with glassy layers can be protected with silicon nitride according to this invention.

High-speed thin-film transistors on single-crystalline, unstrained- and strained-silicon-based nanomembranes

NASA Astrophysics Data System (ADS)

Yuan, Hao-Chih

This research focuses on developing high-performance single-crystal Si-based nanomembranes and high-frequency thin-film transistors (TFTs) using these nanomembranes on flexible plastic substrates. Unstrained Si or SiGe nanomembranes with thickness of several tens to a couple of hundred nanometers are derived from silicon-on-insulator (SOI) or silicon-germanium-on-insulator (SGOI) and are subsequently transferred and integrated with flexible plastic host substrates via a one-step dry printing technique. Biaxial tensile-strained Si membranes that utilize elastic strain-sharing between Si and additionally grown SiGe thin films are also successfully integrated with plastic host substrates and exhibit predicted strain status and negligible density of dislocations. Biaxial tensile strain enhances electron mobility and lowers Schottky contact resistance. As a result, flexible TFTs built on the strained Si-membranes demonstrate much higher electron effective mobility and higher drive current than the unstrained counterpart. The dependence of drive current and transconductance on uniaxial tensile strain introducing by mechanical bending is also discussed. A novel combined "hot-and-cold" TFT fabrication process is developed specifically for realizing a wide spectrum of micro-electronics that can exhibit RF performance and can be integrated on low-temperature plastic substrate. The "hot" process that consists of ion implant and high-temperature annealing for desired doping type, profile, and concentration is realized on the bulk SOI/SGOI substrates followed by the "cold" process that includes room-temperature silicon-monoxide (SiO) deposition as gate dielectric layer to ensure the process compatibility with low-temperature, low-cost plastics. With these developments flexible Si-membrane n-type RF TFTs for analog applications and complementary TFTs for digital applications are demonstrated for the first time. RF TFTs with 1.5-mum channel length have demonstrated record-high f T and fmax values of 2.04 and 7.8 GHz, respectively. A small-signal equivalent circuit model study on the RF TFTs reveals the physics of how device layout affects fT and f max, which paves the way for further performance optimization and realization of integrated circuit on flexible substrate in the future.

Decal transfer microfabrication

DOEpatents

Nuzzo, Ralph G.; Childs, William Robert

2004-10-19

A method of making a microstructure includes forming a pattern in a surface of a silicon-containing elastomer, oxidizing the pattern, contacting the pattern with a substrate; and bonding the oxidized pattern and the substrate such that the pattern and the substrate are irreversibly attached. The silicon-containing elastomer may be removably attached to a transfer pad.

Modification of surface properties of cellulosic substrates by quaternized silicone emulsions.

PubMed

Purohit, Parag S; Somasundaran, P

2014-07-15

The present work describes the effect of quaternization of silicones as well as the relevant treatment parameter pH on the frictional, morphological and relaxation properties of fabric substrates. Due to their unique surface properties, silicone polymers are extensively used to modify surface properties of various materials, although the effects of functionalization of silicones and relevant process conditions on modification of substrates are not well understood. Specifically we show a considerable reduction in fabric friction, roughness and waviness upon treatment with quaternized silicones. The treatment at acidic pH results in better deposition of silicone polymers onto the fabric as confirmed through streaming potential measurements which show charge reversal of the fabric. Interestingly, Raman spectroscopy studies show the band of C-O ring stretching mode at ∼1095 cm(-1) shift towards higher wavenumber indicating lowering of stress in fibers upon appropriate silicone treatment. Thus along with the morphological and frictional properties being altered, silicone treatment can lead to a reduction in fabric strain. It is concluded that the electrostatic interactions play an initial role in modification of the fiber substrate followed by multilayer deposition of polymer. This multi-technique approach to study fiber properties upon treatment by combining macro to molecular level methods has helped in understanding of new functional coating materials. Copyright © 2014 Elsevier Inc. All rights reserved.

Thermal Residual Stress in Environmental Barrier Coated Silicon Nitride - Modeled

NASA Technical Reports Server (NTRS)

Ali, Abdul-Aziz; Bhatt, Ramakrishna T.

2009-01-01

When exposed to combustion environments containing moisture both un-reinforced and fiber reinforced silicon based ceramic materials tend to undergo surface recession. To avoid surface recession environmental barrier coating systems are required. However, due to differences in the elastic and thermal properties of the substrate and the environmental barrier coating, thermal residual stresses can be generated in the coated substrate. Depending on their magnitude and nature thermal residual stresses can have significant influence on the strength and fracture behavior of coated substrates. To determine the maximum residual stresses developed during deposition of the coatings, a finite element model (FEM) was developed. Using this model, the thermal residual stresses were predicted in silicon nitride substrates coated with three environmental coating systems namely barium strontium aluminum silicate (BSAS), rare earth mono silicate (REMS) and earth mono di-silicate (REDS). A parametric study was also conducted to determine the influence of coating layer thickness and material parameters on thermal residual stress. Results indicate that z-direction stresses in all three systems are small and negligible, but maximum in-plane stresses can be significant depending on the composition of the constituent layer and the distance from the substrate. The BSAS and REDS systems show much lower thermal residual stresses than REMS system. Parametric analysis indicates that in each system, the thermal residual stresses can be decreased with decreasing the modulus and thickness of the coating.

Modifying Surface Fluctuations of Polymer Melt Films with Substrate Modification

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhou, Yang; He, Qiming; Zhang, Fan

Deposition of a plasma polymerized film on a silicon substrate substantially changes the fluctuations on the surface of a sufficiently thin, melt polystyrene (PS) film atop the substrate. Surface fluctuation relaxation times measured with X-ray photon correlation spectroscopy (XPCS) for ca. 4R g thick melt films of 131 kg/mol linear PS on silicon and on a plasma polymer modified silicon wafer can both be described using a hydrodynamic continuum theory (HCT) that assumes the film is characterized throughout its depth by the bulk viscosity. However, when the film thickness is reduced to ~3R g, confinement effects are evident. The surfacemore » fluctuations are slower than predicted using the HCT, and the confinement effect for the PS on silicon is larger than that for the PS on the plasma polymerized film. This deviation is thus due to a difference in the thicknesses of the strongly adsorbed layers at the substrate which are impacted by the substrate surface energy.« less

Modifying Surface Fluctuations of Polymer Melt Films with Substrate Modification

DOE PAGES

Zhou, Yang; He, Qiming; Zhang, Fan; ...

2017-08-14

Deposition of a plasma polymerized film on a silicon substrate substantially changes the fluctuations on the surface of a sufficiently thin, melt polystyrene (PS) film atop the substrate. Surface fluctuation relaxation times measured with X-ray photon correlation spectroscopy (XPCS) for ca. 4R g thick melt films of 131 kg/mol linear PS on silicon and on a plasma polymer modified silicon wafer can both be described using a hydrodynamic continuum theory (HCT) that assumes the film is characterized throughout its depth by the bulk viscosity. However, when the film thickness is reduced to ~3R g, confinement effects are evident. The surfacemore » fluctuations are slower than predicted using the HCT, and the confinement effect for the PS on silicon is larger than that for the PS on the plasma polymerized film. This deviation is thus due to a difference in the thicknesses of the strongly adsorbed layers at the substrate which are impacted by the substrate surface energy.« less

Diamond Composite Films for Protective Coatings on Metals and Method of Formation

NASA Technical Reports Server (NTRS)

Ong, Tiong P. (Inventor); Shing, Yuh-Han (Inventor)

1997-01-01

Composite films consisting of diamond crystallites and hard amorphous films such as diamond-like carbon, titanium nitride, and titanium oxide are provided as protective coatings for metal substrates against extremely harsh environments. A composite layer having diamond crystallites and a hard amorphous film is affixed to a metal substrate via an interlayer including a bottom metal silicide film and a top silicon carbide film. The interlayer is formed either by depositing metal silicide and silicon carbide directly onto the metal substrate, or by first depositing an amorphous silicon film, then allowing top and bottom portions of the amorphous silicon to react during deposition of the diamond crystallites, to yield the desired interlayer structure.

Silicon nitride films deposited with an electron beam created plasma

NASA Technical Reports Server (NTRS)

Bishop, D. C.; Emery, K. A.; Rocca, J. J.; Thompson, L. R.; Zamani, H.; Collins, G. J.

1984-01-01

The electron beam assisted chemical vapor deposition (EBCVD) of silicon nitride films using NH3, N2, and SiH4 as the reactant gases is reported. The films have been deposited on aluminum, SiO2, and polysilicon film substrates as well as on crystalline silicon substrates. The range of experimental conditions under which silicon nitrides have been deposited includes substrate temperatures from 50 to 400 C, electron beam currents of 2-40 mA, electron beam energies of 1-5 keV, total ambient pressures of 0.1-0.4 Torr, and NH3/SiH4 mass flow ratios of 1-80. The physical, electrical, and chemical properties of the EBCVD films are discussed.

Transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1995-05-09

A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

Method for fabricating transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1997-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Method for fabricating transistors using crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1997-09-02

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

Silicon Nanowire Growth at Chosen Positions and Orientations

NASA Technical Reports Server (NTRS)

Getty, Stephanie A.

2009-01-01

It is now possible to grow silicon nanowires at chosen positions and orientations by a method that involves a combination of standard microfabrication processes. Because their positions and orientations can be chosen with unprecedented precision, the nanowires can be utilized as integral parts of individually electronically addressable devices in dense arrays. Nanowires made from silicon and perhaps other semiconductors hold substantial promise for integration into highly miniaturized sensors, field-effect transistors, optoelectronic devices, and other electronic devices. Like bulk semiconductors, inorganic semiconducting nanowires are characterized by electronic energy bandgaps that render them suitable as means of modulating or controlling electronic signals through electrostatic gating, in response to incident light, or in response to molecules of interest close to their surfaces. There is now potential for fabricating arrays of uniform, individually electronically addressable nanowires tailored to specific applications. The method involves formation of metal catalytic particles at the desired positions on a substrate, followed by heating the substrate in the presence of silane gas. The figure illustrates an example in which a substrate includes a silicon dioxide surface layer that has been etched into an array of pillars and the catalytic (in this case, gold) particles have been placed on the right-facing sides of the pillars. The catalytic thermal decomposition of the silane to silicon and hydrogen causes silicon columns (the desired nanowires) to grow outward from the originally catalyzed spots on the substrate, carrying the catalytic particles at their tips. Thus, the position and orientation of each silicon nanowire is determined by the position of its originally catalyzed spot on the substrate surface, and the orientation of the nanowire is perpendicular to the substrate surface at the originally catalyzed spot.

Formation of porous silicon oxide from substrate-bound silicon rich silicon oxide layers by continuous-wave laser irradiation

NASA Astrophysics Data System (ADS)

Wang, Nan; Fricke-Begemann, Th.; Peretzki, P.; Ihlemann, J.; Seibt, M.

2018-03-01

Silicon nanocrystals embedded in silicon oxide that show room temperature photoluminescence (PL) have great potential in silicon light emission applications. Nanocrystalline silicon particle formation by laser irradiation has the unique advantage of spatially controlled heating, which is compatible with modern silicon micro-fabrication technology. In this paper, we employ continuous wave laser irradiation to decompose substrate-bound silicon-rich silicon oxide films into crystalline silicon particles and silicon dioxide. The resulting microstructure is studied using transmission electron microscopy techniques with considerable emphasis on the formation and properties of laser damaged regions which typically quench room temperature PL from the nanoparticles. It is shown that such regions consist of an amorphous matrix with a composition similar to silicon dioxide which contains some nanometric silicon particles in addition to pores. A mechanism referred to as "selective silicon ablation" is proposed which consistently explains the experimental observations. Implications for the damage-free laser decomposition of silicon-rich silicon oxides and also for controlled production of porous silicon dioxide films are discussed.

Epitaxial growth of CZT(S,Se) on silicon

DOEpatents

Bojarczuk, Nestor A.; Gershon, Talia S.; Guha, Supratik; Shin, Byungha; Zhu, Yu

2016-03-15

Techniques for epitaxial growth of CZT(S,Se) materials on Si are provided. In one aspect, a method of forming an epitaxial kesterite material is provided which includes the steps of: selecting a Si substrate based on a crystallographic orientation of the Si substrate; forming an epitaxial oxide interlayer on the Si substrate to enhance wettability of the epitaxial kesterite material on the Si substrate, wherein the epitaxial oxide interlayer is formed from a material that is lattice-matched to Si; and forming the epitaxial kesterite material on a side of the epitaxial oxide interlayer opposite the Si substrate, wherein the epitaxial kesterite material includes Cu, Zn, Sn, and at least one of S and Se, and wherein a crystallographic orientation of the epitaxial kesterite material is based on the crystallographic orientation of the Si substrate. A method of forming an epitaxial kesterite-based photovoltaic device and an epitaxial kesterite-based device are also provided.

Galvanic displacement reaction and rapid thermal annealing in size/shape controlling silver nanoparticles on silicon substrate

NASA Astrophysics Data System (ADS)

Ghosh, Tapas; Satpati, Biswarup

2017-05-01

The effect of the thermal annealing on silver nanoparticles deposited on silicon surface has been studied. The silver nanoparticles have been deposited by the galvanic displacement reaction. Rapid thermal annealing (RTA) has been performed on the Si substrate, containing the silver nanoparticles. The scanning transmission electron microscopy (STEM), energy dispersive X-ray (EDX) spectroscopy and scanning electron microscopy (SEM) study show that the galvanic displacement reaction and subsequent rapid thermal annealing could lead to well separated and spherical shaped larger silver nanoparticles on silicon substrate.

Development of refractory armored silicon carbide by infrared transient liquid phase processing

NASA Astrophysics Data System (ADS)

Hinoki, Tatsuya; Snead, Lance L.; Blue, Craig A.

2005-12-01

Tungsten (W) and molybdenum (Mo) were coated on silicon carbide (SiC) for use as a refractory armor using a high power plasma arc lamp at powers up to 23.5 MW/m 2 in an argon flow environment. Both tungsten powder and molybdenum powder melted and formed coating layers on silicon carbide within a few seconds. The effect of substrate pre-treatment (vapor deposition of titanium (Ti) and tungsten, and annealing) and sample heating conditions on microstructure of the coating and coating/substrate interface were investigated. The microstructure was observed by scanning electron microscopy (SEM) and optical microscopy (OM). The mechanical properties of the coated materials were evaluated by four-point flexural tests. A strong tungsten coating was successfully applied to the silicon carbide substrate. Tungsten vapor deposition and pre-heating at 5.2 MW/m 2 made for a refractory layer containing no cracks propagating into the silicon carbide substrate. The tungsten coating was formed without the thick reaction layer. For this study, small tungsten carbide grains were observed adjacent to the interface in all conditions. In addition, relatively large, widely scattered tungsten carbide grains and a eutectic structure of tungsten and silicon were observed through the thickness in the coatings formed at lower powers and longer heating times. The strength of the silicon carbide substrate was somewhat decreased as a result of the processing. Vapor deposition of tungsten prior to powder coating helped prevent this degradation. In contrast, molybdenum coating was more challenging than tungsten coating due to the larger coefficient of thermal expansion (CTE) mismatch as compared to tungsten and silicon carbide. From this work it is concluded that refractory armoring of silicon carbide by Infrared Transient Liquid Phase Processing is possible. The tungsten armored silicon carbide samples proved uniform, strong, and capable of withstanding thermal fatigue testing.

Hole injection and dielectric breakdown in 6H-SiC and 4H-SiC metal-oxide-semiconductor structures during substrate electron injection via Fowler-Nordheim tunneling

NASA Astrophysics Data System (ADS)

Samanta, Piyas; Mandal, Krishna C.

2015-12-01

Hole injection into silicon dioxide (SiO2) films (8-40 nm thick) is investigated for the first time during substrate electron injection via Fowler-Nordheim (FN) tunneling in n-type 4H- and 6H-SiC (silicon carbide) based metal-oxide-semiconductor (MOS) structures at a wide range of temperatures (T) between 298 and 598 K and oxide electric fields Eox from 6 to 10 MV/cm. Holes are generated in heavily doped n-type polycrystalline silicon (n+ -polySi) gate serving as the anode as well as in the bulk silicon dioxide (SiO2) film via hot-electron initiated band-to-band ionization (BTBI). In absence of oxide trapped charges, it is shown that at a given temperature, the hole injection rates from either of the above two mechanisms are higher in n-4H-SiC MOS devices than those in n-6H-SiC MOS structures when compared at a given Eox and SiO2 thickness (tox). On the other hand, relative to n-4H-SiC devices, n-6H-SiC structures exhibit higher hole injection rates for a given tox during substrate electron injection at a given FN current density je,FN throughout the temperature range studied here. These two observations clearly reveal that the substrate material (n-6H-SiC and n-4H-SiC) dependencies on time-to-breakdown (tBD) or injected charge (electron) to breakdown (QBD) of the SiO2 film depend on the mode of FN injections (constant field/voltage and current) from the substrate which is further verified from the rigorous device simulation as well.

High-Quality Solution-Processed Silicon Oxide Gate Dielectric Applied on Indium Oxide Based Thin-Film Transistors.

PubMed

Jaehnike, Felix; Pham, Duy Vu; Anselmann, Ralf; Bock, Claudia; Kunze, Ulrich

2015-07-01

A silicon oxide gate dielectric was synthesized by a facile sol-gel reaction and applied to solution-processed indium oxide based thin-film transistors (TFTs). The SiOx sol-gel was spin-coated on highly doped silicon substrates and converted to a dense dielectric film with a smooth surface at a maximum processing temperature of T = 350 °C. The synthesis was systematically improved, so that the solution-processed silicon oxide finally achieved comparable break downfield strength (7 MV/cm) and leakage current densities (<10 nA/cm(2) at 1 MV/cm) to thermally grown silicon dioxide (SiO2). The good quality of the dielectric layer was successfully proven in bottom-gate, bottom-contact metal oxide TFTs and compared to reference TFTs with thermally grown SiO2. Both transistor types have field-effect mobility values as high as 28 cm(2)/(Vs) with an on/off current ratio of 10(8), subthreshold swings of 0.30 and 0.37 V/dec, respectively, and a threshold voltage close to zero. The good device performance could be attributed to the smooth dielectric/semiconductor interface and low interface trap density. Thus, the sol-gel-derived SiO2 is a promising candidate for a high-quality dielectric layer on many substrates and high-performance large-area applications.

Horizontal silicon nanowires for surface-enhanced Raman spectroscopy

NASA Astrophysics Data System (ADS)

Gebavi, Hrvoje; Ristić, Davor; Baran, Nikola; Mikac, Lara; Mohaček-Grošev, Vlasta; Gotić, Marijan; Šikić, Mile; Ivanda, Mile

2018-01-01

The main purpose of this paper is to focus on details of the fabrication process of horizontally and vertically oriented silicon nanowires (SiNWs) substrates for the application of surface-enhanced Raman spectroscopy (SERS). The fabrication process is based on the vapor-liquid-solid method and electroless-assisted chemical etching, which, as the major benefit, resulting in the development of economical, easy-to-prepare SERS substrates. Furthermore, we examined the fabrication of Au coated Ag nanoparticles (NPs) on the SiNWs substrates in such a way as to diminish the influence of silver NPs corrosion, which, in turn, enhanced the SERS time stability, thus allowing for wider commercial applications. The substances on which high SERS sensitivity was proved are rhodamine (R6G) and 4-mercaptobenzoic acid (MBA), with the detection limits of 10-8 M and 10-6 M, respectively.

PVD Silicon Carbide as a Thin Film Packaging Technology for Antennas on LCP Substrates for Harsh Environments

NASA Technical Reports Server (NTRS)

Scardelletti, Maximilian C.; Stanton, John W.; Ponchak, George E.; Jordan, Jennifer L.; Zorman, Christian A.

2010-01-01

This paper describes an effort to develop a thin film packaging technology for microfabricated planar antennas on polymeric substrates based on silicon carbide (SiC) films deposited by physical vapor deposition (PVD). The antennas are coplanar waveguide fed dual frequency folded slot antennas fabricated on liquid crystal polymer (LCP) substrates. The PVD SiC thin films were deposited directly onto the antennas by RF sputtering at room temperature at a chamber pressure of 30 mTorr and a power level of 300 W. The SiC film thickness is 450 nm. The return loss and radiation patterns were measured before and after the SiC-coated antennas were submerged into perchloric acid for 1 hour. No degradation in RF performance or physical integrity of the antenna was observed.

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

NASA Astrophysics Data System (ADS)

Cunning, Benjamin V.; Ahmed, Mohsin; Mishra, Neeraj; Ranjbar Kermany, Atieh; Wood, Barry; Iacopi, Francesca

2014-08-01

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices.

Hybrid emitter all back contact solar cell

DOEpatents

Loscutoff, Paul; Rim, Seung

2016-04-12

An all back contact solar cell has a hybrid emitter design. The solar cell has a thin dielectric layer formed on a backside surface of a single crystalline silicon substrate. One emitter of the solar cell is made of doped polycrystalline silicon that is formed on the thin dielectric layer. The other emitter of the solar cell is formed in the single crystalline silicon substrate and is made of doped single crystalline silicon. The solar cell includes contact holes that allow metal contacts to connect to corresponding emitters.

Silicon carbide and other films and method of deposition

NASA Technical Reports Server (NTRS)

Mehregany, Mehran (Inventor); Zorman, Christian A. (Inventor); Fu, Xiao-An (Inventor); Dunning, Jeremy L. (Inventor)

2007-01-01

A method of depositing a ceramic film, particularly a silicon carbide film, on a substrate is disclosed in which the residual stress, residual stress gradient, and resistivity are controlled. Also disclosed are substrates having a deposited film with these controlled properties and devices, particularly MEMS and NEMS devices, having substrates with films having these properties.

Coated silicon comprising material for protection against environmental corrosion

NASA Technical Reports Server (NTRS)

Hazel, Brian Thomas (Inventor)

2009-01-01

In accordance with an embodiment of the invention, an article is disclosed. The article comprises a gas turbine engine component substrate comprising a silicon material; and an environmental barrier coating overlying the substrate, wherein the environmental barrier coating comprises cerium oxide, and the cerium oxide reduces formation of silicate glass on the substrate upon exposure to corrodant sulfates.

Silicon carbide and other films and method of deposition

NASA Technical Reports Server (NTRS)

Mehregany, Mehran (Inventor); Zorman, Christian A. (Inventor); Fu, Xiao-An (Inventor); Dunning, Jeremy (Inventor)

2011-01-01

A method of depositing a ceramic film, particularly a silicon carbide film, on a substrate is disclosed in which the residual stress, residual stress gradient, and resistivity are controlled. Also disclosed are substrates having a deposited film with these controlled properties and devices, particularly MEMS and NEMS devices, having substrates with films having these properties.

Ultrasonic Emission from Nanocrystalline Porous Silicon

NASA Astrophysics Data System (ADS)

Shinoda, Hiroyuki; Koshida, Nobuyoshi

A simple layer structure composed of a metal thin film and a porous silicon layer on a silicon substrate generates intense and wide-band airborne ultrasounds. The large-bandwidth and the fidelity of the sound reproduction are leveraged in applications varying from sound-based measurement to a scientific study of animal ecology. This chapter describes the basic principle of the ultrasound generation. The macroscopic properties of the low thermal conductivity and the small heat capacity of nanocrystalline porous silicon thermally induce ultrasonic emission. The state-of-the-art of the achievable sound pressure and sound signal properties is introduced, with the technological and scientific applications of the devices.

Semiconductor meta-surface based perfect light absorber

NASA Astrophysics Data System (ADS)

Liu, Guiqiang; Nie, Yiyou; Fu, Guolan; Liu, Xiaoshan; Liu, Yi; Tang, Li; Liu, Zhengqi

2017-04-01

We numerically proposed and demonstrated a semiconductor meta-surface light absorber, which consists of a silicon patches array on a silicon thin-film and an opaque silver substrate. The Mie resonances of the silicon patches and the fundamental cavity mode of the ultra-thin silicon film couple strongly to the incident optical field, leading to a multi-band perfect absorption. The maximal absorption is above 99.5% and the absorption is polarization-independent. Moreover, the absorption behavior is scalable in the frequency region via tuning the structural parameters. These features hold the absorber platform with wide applications in optoelectronics such as hot-electron excitation and photo-detection.

Template-free fabrication of silicon micropillar/nanowire composite structure by one-step etching

PubMed Central

2012-01-01

A template-free fabrication method for silicon nanostructures, such as silicon micropillar (MP)/nanowire (NW) composite structure is presented. Utilizing an improved metal-assisted electroless etching (MAEE) of silicon in KMnO4/AgNO3/HF solution and silicon composite nanostructure of the long MPs erected in the short NWs arrays were generated on the silicon substrate. The morphology evolution of the MP/NW composite nanostructure and the role of self-growing K2SiF6 particles as the templates during the MAEE process were investigated in detail. Meanwhile, a fabrication mechanism based on the etching of silver nanoparticles (catalyzed) and the masking of K2SiF6 particles is proposed, which gives guidance for fabricating different silicon nanostructures, such as NW and MP arrays. This one-step method provides a simple and cost-effective way to fabricate silicon nanostructures. PMID:23043719

The tensile effect on crack formation in single crystal silicon irradiated by intense pulsed ion beam

NASA Astrophysics Data System (ADS)

Liang, Guoying; Shen, Jie; Zhang, Jie; Zhong, Haowen; Cui, Xiaojun; Yan, Sha; Zhang, Xiaofu; Yu, Xiao; Le, Xiaoyun

2017-10-01

Improving antifatigue performance of silicon substrate is very important for the development of semiconductor industry. The cracking behavior of silicon under intense pulsed ion beam irradiation was studied by numerical simulation in order to understand the mechanism of induced surface peeling observed by experimental means. Using molecular dynamics simulation based on Stillinger Weber potential, tensile effect on crack growth and propagation in single crystal silicon was investigated. Simulation results reveal that stress-strain curves of single crystal silicon at a constant strain rate can be divided into three stages, which are not similar to metal stress-strain curves; different tensile load velocities induce difference of single silicon crack formation speed; the layered stress results in crack formation in single crystal silicon. It is concluded that the crack growth and propagation is more sensitive to strain rate, tensile load velocity, stress distribution in single crystal silicon.

Enhanced optical output power of InGaN/GaN light-emitting diodes grown on a silicon (111) substrate with a nanoporous GaN layer.

PubMed

Lee, Kwang Jae; Chun, Jaeyi; Kim, Sang-Jo; Oh, Semi; Ha, Chang-Soo; Park, Jung-Won; Lee, Seung-Jae; Song, Jae-Chul; Baek, Jong Hyeob; Park, Seong-Ju

2016-03-07

We report the growth of InGaN/GaN multiple quantum wells blue light-emitting diodes (LEDs) on a silicon (111) substrate with an embedded nanoporous (NP) GaN layer. The NP GaN layer is fabricated by electrochemical etching of n-type GaN on the silicon substrate. The crystalline quality of crack-free GaN grown on the NP GaN layer is remarkably improved and the residual tensile stress is also decreased. The optical output power is increased by 120% at an injection current of 20 mA compared with that of conventional LEDs without a NP GaN layer. The large enhancement of optical output power is attributed to the reduction of threading dislocation, effective scattering of light in the LED, and the suppression of light propagation into the silicon substrate by the NP GaN layer.

Method for forming suspended micromechanical structures

DOEpatents

Fleming, James G.

2000-01-01

A micromachining method is disclosed for forming a suspended micromechanical structure from {111} crystalline silicon. The micromachining method is based on the use of anisotropic dry etching to define lateral features of the structure which are etched down into a {111}-silicon substrate to a first etch depth, thereby forming sidewalls of the structure. The sidewalls are then coated with a protection layer, and the substrate is dry etched to a second etch depth to define a spacing of the structure from the substrate. A selective anisotropic wet etchant (e.g. KOH, EDP, TMAH, NaOH or CsOH) is used to laterally undercut the structure between the first and second etch depths, thereby forming a substantially planar lower surface of the structure along a {111} crystal plane that is parallel to an upper surface of the structure. The lateral extent of undercutting by the wet etchant is controlled and effectively terminated by either timing the etching, by the location of angled {111}-silicon planes or by the locations of preformed etch-stops. This present method allows the formation of suspended micromechanical structures having large vertical dimensions and large masses while allowing for detailed lateral features which can be provided by dry etch definition. Additionally, the method of the present invention is compatible with the formation of electronic circuitry on the substrate.

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

NASA Technical Reports Server (NTRS)

Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

2016-01-01

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Crystallization of amorphous silicon thin films deposited by PECVD on nickel-metalized porous silicon.

PubMed

Ben Slama, Sonia; Hajji, Messaoud; Ezzaouia, Hatem

2012-08-17

Porous silicon layers were elaborated by electrochemical etching of heavily doped p-type silicon substrates. Metallization of porous silicon was carried out by immersion of substrates in diluted aqueous solution of nickel. Amorphous silicon thin films were deposited by plasma-enhanced chemical vapor deposition on metalized porous layers. Deposited amorphous thin films were crystallized under vacuum at 750°C. Obtained results from structural, optical, and electrical characterizations show that thermal annealing of amorphous silicon deposited on Ni-metalized porous silicon leads to an enhancement in the crystalline quality and physical properties of the silicon thin films. The improvement in the quality of the film is due to the crystallization of the amorphous film during annealing. This simple and easy method can be used to produce silicon thin films with high quality suitable for thin film solar cell applications.

Crystallization of amorphous silicon thin films deposited by PECVD on nickel-metalized porous silicon

PubMed Central

2012-01-01

Porous silicon layers were elaborated by electrochemical etching of heavily doped p-type silicon substrates. Metallization of porous silicon was carried out by immersion of substrates in diluted aqueous solution of nickel. Amorphous silicon thin films were deposited by plasma-enhanced chemical vapor deposition on metalized porous layers. Deposited amorphous thin films were crystallized under vacuum at 750°C. Obtained results from structural, optical, and electrical characterizations show that thermal annealing of amorphous silicon deposited on Ni-metalized porous silicon leads to an enhancement in the crystalline quality and physical properties of the silicon thin films. The improvement in the quality of the film is due to the crystallization of the amorphous film during annealing. This simple and easy method can be used to produce silicon thin films with high quality suitable for thin film solar cell applications. PMID:22901341

Low-temperature plasma-deposited silicon epitaxial films: Growth and properties

DOE Office of Scientific and Technical Information (OSTI.GOV)

Demaurex, Bénédicte, E-mail: benedicte.demaurex@epfl.ch; Bartlome, Richard; Seif, Johannes P.

2014-08-07

Low-temperature (≤200 °C) epitaxial growth yields precise thickness, doping, and thermal-budget control, which enables advanced-design semiconductor devices. In this paper, we use plasma-enhanced chemical vapor deposition to grow homo-epitaxial layers and study the different growth modes on crystalline silicon substrates. In particular, we determine the conditions leading to epitaxial growth in light of a model that depends only on the silane concentration in the plasma and the mean free path length of surface adatoms. For such growth, we show that the presence of a persistent defective interface layer between the crystalline silicon substrate and the epitaxial layer stems not only frommore » the growth conditions but also from unintentional contamination of the reactor. Based on our findings, we determine the plasma conditions to grow high-quality bulk epitaxial films and propose a two-step growth process to obtain device-grade material.« less

Near single-crystalline, high-carrier-mobility silicon thin film on a polycrystalline/amorphous substrate

DOEpatents

Findikoglu, Alp T [Los Alamos, NM; Jia, Quanxi [Los Alamos, NM; Arendt, Paul N [Los Alamos, NM; Matias, Vladimir [Santa Fe, NM; Choi, Woong [Los Alamos, NM

2009-10-27

A template article including a base substrate including: (i) a base material selected from the group consisting of polycrystalline substrates and amorphous substrates, and (ii) at least one layer of a differing material upon the surface of the base material; and, a buffer material layer upon the base substrate, the buffer material layer characterized by: (a) low chemical reactivity with the base substrate, (b) stability at temperatures up to at least about 800.degree. C. under low vacuum conditions, and (c) a lattice crystal structure adapted for subsequent deposition of a semiconductor material; is provided, together with a semiconductor article including a base substrate including: (i) a base material selected from the group consisting of polycrystalline substrates and amorphous substrates, and (ii) at least one layer of a differing material upon the surface of the base material; and, a buffer material layer upon the base substrate, the buffer material layer characterized by: (a) low chemical reactivity with the base substrate, (b) stability at temperatures up to at least about 800.degree. C. under low vacuum conditions, and (c) a lattice crystal structure adapted for subsequent deposition of a semiconductor material, and, a top-layer of semiconductor material upon the buffer material layer.

Substrate for thin silicon solar cells

DOEpatents

Ciszek, Theodore F.

1995-01-01

A photovoltaic device for converting solar energy into electrical signals comprises a substrate, a layer of photoconductive semiconductor material grown on said substrate, wherein the substrate comprises an alloy of boron and silicon, the boron being present in a range of from 0.1 to 1.3 atomic percent, the alloy having a lattice constant substantially matched to that of the photoconductive semiconductor material and a resistivity of less than 1.times.10.sup.-3 ohm-cm.

Effect of the substrate on the insulator-metal transition of vanadium dioxide films

NASA Astrophysics Data System (ADS)

Kovács, György J.; Bürger, Danilo; Skorupa, Ilona; Reuther, Helfried; Heller, René; Schmidt, Heidemarie

2011-03-01

Single-phase vanadium dioxide films grown on (0001) sapphire and (001) silicon substrates show a very different insulator-metal electronic transition. A detailed description of the growth mechanisms and the substrate-film interaction is given, and the characteristics of the electronic transition are described by the morphology and grain boundary structure. (Tri-)epitaxy-stabilized columnar growth of VO2 takes place on the sapphire substrate, whereas on silicon the expected Zone II growth is identified. We have found that in the case of the Si substrate the reasons for the broader hysteresis and the lower switching amplitude are the formation of an amorphous insulating VOx (x > 2.6) phase coexisting with VO2 and the high vanadium vacancy concentration of the VO2. These phenomena are the result of the excess oxygen during the growth and the interaction between the silicon substrate and the growing film.

Die singulation method

DOEpatents

Swiler, Thomas P.; Garcia, Ernest J.; Francis, Kathryn M.

2013-06-11

A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with an HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

Die singulation method

DOEpatents

Swiler, Thomas P [Albuquerque, NM; Garcia, Ernest J [Albuquerque, NM; Francis, Kathryn M [Rio Rancho, NM

2014-01-07

A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with a HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

Study of the photovoltaic effect in thin film barium titanate

NASA Technical Reports Server (NTRS)

Grannemann, W. W.; Dharmadhikari, V. S.

1982-01-01

Ferroelectric films of barium titanate were synthesized on silicon and quartz substrates, and the photoelectric effect in the structure consisting of metal deposited ferroelectric barium titanate film silicon was studied. A photovoltage with polarity that depends on the direction of the remanent polarization was observed. The deposition of BaTiO3 on silicon and fused quartz substrates was accomplished by an rf sputtering technique. A series of experiments to study the growth of ferroelectric BaTiO3 films on single crystal silicon and fused quartz substrates were conducted. The ferroelectric character in these films was found on the basis of evidence from the polarization electric field hysteresis loops, capacitance voltage and capacitance temperature techniques and from X-ray diffraction studies.

Method for providing an arbitrary three-dimensional microstructure in silicon using an anisotropic deep etch

DOEpatents

Morales, Alfredo M.; Gonzales, Marcela

2004-06-15

The present invention describes a method for fabricating an embossing tool or an x-ray mask tool, providing microstructures that smoothly vary in height from point-to-point in etched substrates, i.e., structure which can vary in all three dimensions. The process uses a lithographic technique to transfer an image pattern in the surface of a silicon wafer by exposing and developing the resist and then etching the silicon substrate. Importantly, the photoresist is variably exposed so that when developed some of the resist layer remains. The remaining undeveloped resist acts as an etchant barrier to the reactive plasma used to etch the silicon substrate and therefore provides the ability etch structures of variable depths.

Voltage-Controlled Spray Deposition of Multiwalled Carbon Nanotubes on Semiconducting and Insulating Substrates

NASA Astrophysics Data System (ADS)

Maulik, Subhodip; Sarkar, Anirban; Basu, Srismrita; Daniels-Race, Theda

2018-05-01

A facile, cost-effective, voltage-controlled, "single-step" method for spray deposition of surfactant-assisted dispersed carbon nanotube (CNT) thin films on semiconducting and insulating substrates has been developed. The fabrication strategy enables direct deposition and adhesion of CNT films on target samples, eliminating the need for substrate surface functionalization with organosilane binder agents or metal layer coatings. Spray coating experiments on four types of sample [bare silicon (Si), microscopy-grade glass samples, silicon dioxide (SiO2), and polymethyl methacrylate (PMMA)] under optimized control parameters produced films with thickness ranging from 40 nm to 6 μm with substantial surface coverage and packing density. These unique deposition results on both semiconducting and insulator target samples suggest potential applications of this technique in CNT thin-film transistors with different gate dielectrics, bendable electronics, and novel CNT-based sensing devices, and bodes well for further investigation into thin-film coatings of various inorganic, organic, and hybrid nanomaterials on different types of substrate.

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects.

PubMed

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Oh, Jin Hyuk; Kim, Sun Ae; Park, Jaegyu; Kim, Sanggi

2015-06-10

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.

In situ electric properties of Ag films deposited on rough substrates

NASA Astrophysics Data System (ADS)

Zhou, Hong; Yu, Sen-Jiang; Zhang, Yong-Ju; Chen, Miao-Gen; Jiao, Zhi-Wei; Si, Ping-Zhan

2013-01-01

Silver (Ag) films have been deposited on rough substrates (including frosted glass and silicone grease), and for comparison on flat glass, by DC-magnetron sputtering, and their sheet resistances measured in situ during deposition. It is found that the growth of Ag films proceeds through three distinct stages: discontinuous, semi-continuous, and continuous regimes. The sheet resistance on rough substrates jumps in the vicinity of the percolation threshold, whereas the resistance on flat substrates decreases monotonically during deposition. The abnormal in situ electric properties on rough substrates are well explained based on the differences of the growth mechanism and microstructure of Ag films on different substrates.

Development and Characterization of the Bonding and Integration Technologies Needed for Fabricating Silicon Carbide Based Injector Components

NASA Technical Reports Server (NTRS)

Halbig,Michael C.; Singh, Mrityunjay

2008-01-01

Advanced ceramic bonding and integration technologies play a critical role in the fabrication and application of silicon carbide based components for a number of aerospace and ground based applications. One such application is a lean direct injector for a turbine engine to achieve low NOx emissions. Ceramic to ceramic diffusion bonding and ceramic to metal brazing technologies are being developed for this injector application. For the diffusion bonding technology, titanium interlayers (coatings and foils) were used to aid in the joining of silicon carbide (SiC) substrates. The influence of such variables as surface finish, interlayer thickness, and processing time were investigated. Electron microprobe analysis was used to identify the reaction formed phases. In the diffusion bonds, an intermediate phase, Ti5Si3Cx, formed that is thermally incompatible in its thermal expansion and caused thermal stresses and cracking during the processing cool-down. Thinner interlayers of pure titanium and/or longer processing times resulted in an optimized microstructure. Tensile tests on the joined materials resulted in strengths of 13-28 MPa depending on the SiC substrate material. Nondestructive evaluation using ultrasonic immersion showed well formed bonds. For the joining technology of brazing Kovar fuel tubes to silicon carbide, preliminary development of the joining approach has begun. Various technical issues and requirements for the injector application are addressed.

Fabrication and characterization of physically defined quantum dots on a boron-doped silicon-on-insulator substrate

NASA Astrophysics Data System (ADS)

Mizoguchi, Seiya; Shimatani, Naoki; Kobayashi, Mizuki; Makino, Takaomi; Yamaoka, Yu; Kodera, Tetsuo

2018-04-01

We study hole transport properties in physically defined p-type silicon quantum dots (QDs) on a heavily doped silicon-on-insulator (SOI) substrate. We observe Coulomb diamonds using single QDs and estimate the charging energy as ∼1.6 meV. We obtain the charge stability diagram of double QDs using single QDs as a charge sensor. This is the first demonstration of charge sensing in p-type heavily doped silicon QDs. For future time-resolved measurements, we apply radio-frequency reflectometry using impedance matching of LC circuits to the device. We observe the resonance and estimate the capacitance as ∼0.12 pF from the resonant frequency. This value is smaller than that of the devices with top gates on nondoped SOI substrate. This indicates that high-frequency signals can be applied efficiently to p-type silicon QDs without top gates.

Microelectromechanical pump utilizing porous silicon

DOEpatents

Lantz, Jeffrey W [Albuquerque, NM; Stalford, Harold L [Norman, OK

2011-07-19

A microelectromechanical (MEM) pump is disclosed which includes a porous silicon region sandwiched between an inlet chamber and an outlet chamber. The porous silicon region is formed in a silicon substrate and contains a number of pores extending between the inlet and outlet chambers, with each pore having a cross-section dimension about equal to or smaller than a mean free path of a gas being pumped. A thermal gradient is provided along the length of each pore by a heat source which can be an electrical resistance heater or an integrated circuit (IC). A channel can be formed through the silicon substrate so that inlet and outlet ports can be formed on the same side of the substrate, or so that multiple MEM pumps can be connected in series to form a multi-stage MEM pump. The MEM pump has applications for use in gas-phase MEM chemical analysis systems, and can also be used for passive cooling of ICs.

Silicon nanomembranes as a means to evaluate stress evolution in deposited thin films

Treesearch

Anna M. Clausen; Deborah M. Paskiewicz; Alireza Sadeghirad; Joseph Jakes; Donald E. Savage; Donald S. Stone; Feng Liu; Max G. Lagally

2014-01-01

Thin-film deposition on ultra-thin substrates poses unique challenges because of the potential for a dynamic response to the film stress during deposition. While theoretical studies have investigated film stress related changes in bulk substrates, little has been done to learn how stress might evolve in a film growing on a compliant substrate. We use silicon...

Indium-bump-free antimonide superlattice membrane detectors on silicon substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zamiri, M., E-mail: mzamiri@chtm.unm.edu, E-mail: skrishna@chtm.unm.edu; Klein, B.; Schuler-Sandy, T.

2016-02-29

We present an approach to realize antimonide superlattices on silicon substrates without using conventional Indium-bump hybridization. In this approach, PIN superlattices are grown on top of a 60 nm Al{sub 0.6}Ga{sub 0.4}Sb sacrificial layer on a GaSb host substrate. Following the growth, the individual pixels are transferred using our epitaxial-lift off technique, which consists of a wet-etch to undercut the pixels followed by a dry-stamp process to transfer the pixels to a silicon substrate prepared with a gold layer. Structural and optical characterization of the transferred pixels was done using an optical microscope, scanning electron microscopy, and photoluminescence. The interface betweenmore » the transferred pixels and the new substrate was abrupt, and no significant degradation in the optical quality was observed. An Indium-bump-free membrane detector was then fabricated using this approach. Spectral response measurements provided a 100% cut-off wavelength of 4.3 μm at 77 K. The performance of the membrane detector was compared to a control detector on the as-grown substrate. The membrane detector was limited by surface leakage current. The proposed approach could pave the way for wafer-level integration of photonic detectors on silicon substrates, which could dramatically reduce the cost of these detectors.« less

Solution and interfacial behavior of modified silicone polymers and their interactions with solid substrates

NASA Astrophysics Data System (ADS)

Purohit, Parag

Surface treatment is very important step in many applications such as fabric finishing, coatings, cosmetics and personal care. Silicone polymers are a class of organic/inorganic materials that show unique properties such as weak intermolecular forces and high flexibility enabling even a very high molecular weight chain to achieve optimal orientation on surfaces. Material properties such as softness, repellency, bounciness and friction can therefore be tailored by using appropriately modified silicone polymers. Despite wide applications, the underlying mechanisms of material modification are unknown and tailoring silicones for applications remains mostly empirical. Thus the objective of this research is to understand the solution and interfacial behavior of functionalized silicone polymers, which govern their performance in material modification. Modified silicones are simultaneously hydrophobic and oleophobic in nature and due to this nearly universal non-compatibility, the studies of these polymers present unusual challenges. Due to this incompatible nature, the functionalized silicone polymers were emulsified into O/W emulsions to study their solution and interfacial properties. The colloidal properties such as electrokinetic and droplet distribution of these emulsions are assumed to play an important role in the observed surface and physical properties of solid substrates (in present study, cellulosic substrates) as well the stability of emulsions itself. To understand the effects of modified silicones on cellulosic substrates a variety of techniques such as frictional analysis, scanning electron microscopy and atomic force microscopy that can probe from macro to nano level were used. It is hypothesized that the size distribution and charge of silicone emulsions as well as the physiochemical conditions such as pH, control silicone conformation which in turn affect the modification of the substrate properties. With bimodal droplet distribution of silicone emulsions, the nano-sized droplets can penetrate deeper into the substrate to provide bounciness, whereas macro-sized droplets can coat the top layer leading to friction reduction. It was observed that at pH 5.5 the silicone treatment resulted in charge reversal of fibers as opposed to treatment at pH 9.5. On a macroscopic scale 20% reduction in frictional coefficient of the fabric was observed after treatment with quaternized (cationically modified) silicones as compared to untreated fibers. It was also observed using AFM that the fibrils treated with quaternized silicones are uniform, well stacked and smoother than the untreated fibers. Spectroscopic analysis of treated fibers using Raman spectroscopy indicated a decrease in fiber stress as a function of modification of silicone polymer and the interaction pH. It is concluded that the protonated amine functional silicone (below pH 7) as well as the quaternized silicone interacts with the negatively charged cellulose fibers primarily through electrostatic interactions. It is proposed that this initial surface coating is a uniform thin film which allows further deposition of polymer from the emulsion. It was observed that at high pH the zetapotential of silicone emulsions decreases drastically and the nano emulsions turn turbid. It is proposed that the observed electrophoretic and nephelometric behavior at high pH is due to flocculation of nanosized droplets to micron size, which eventually leads to droplets coalescing and emulsion destabilization. It is also postulated that the nano emulsion possess a critical dilution concentration (CDC), above which dilution leads to rapid coalescence. This critical dilution phase was further confirmed through polarity parameter and excimer formation studies which show significantly different polymer and surfactant microstructures near the CDC. Hence it is concluded that the observed surface properties of the substrate obtained above the CDC are significantly different than those below the CDC. The results reveal the vital role of physiochemical parameters such as pH, droplet size, and concentration on the emulsion stability as well as the observed physical/chemical properties of the substrates.

Substrate for thin silicon solar cells

DOEpatents

Ciszek, T.F.

1995-03-28

A photovoltaic device for converting solar energy into electrical signals comprises a substrate, a layer of photoconductive semiconductor material grown on said substrate, wherein the substrate comprises an alloy of boron and silicon, the boron being present in a range of from 0.1 to 1.3 atomic percent, the alloy having a lattice constant substantially matched to that of the photoconductive semiconductor material and a resistivity of less than 1{times}10{sup {minus}3} ohm-cm. 4 figures.

Electromagnetic wave propagation along T and Y-splitters composed of silicon nanorods, gold slots, and silica substrate

NASA Astrophysics Data System (ADS)

Ahmadivand, Arash; Pala, Nezih; Golmohammadi, Saeed

2015-05-01

Silicon nanorods in arrays on a glass substrate that are situated through a gap between two gold slots have been utilized to design efficient long-range optical nanostructures as splitters to function at near infrared spectrum. Designing silicon arrays in T and Y-shape regimes, we examined the optical responses of the proposed devices during guiding of transverse and longitudinal electric modes (TE and LE-modes). Transmission loss factors, group velocity of guided waves, the ratio of transmitted power, and the decay length for both of the devices have been reported using numerical methods. We showed that the proposed structures have strong potentials to employ in designing photonic structures with lower ratio of energy extinction and low radiation losses. The overall length of the structures is 2.2 μm which verifies its compaction in comparison to analogous splitters that are designed based on DLSPPWs and nanoparticle-based waveguides devices. Proposed subwavelength optical power transportation mechanisms are highly compatible to employ in photonic integration circuit (PIC) systems.

Measured Propagation Characteristics of Finite Ground Coplanar Waveguide on Silicon with a Thick Polyimide Interface Layer

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Papapolymerou, John; Tentzeris, Emmanouil M.; Williams, W. O. (Technical Monitor)

2002-01-01

Measured propagation characteristics of Finite Ground Coplanar (FGC) waveguide on silicon substrates with resistivities spanning 3 orders of magnitude (0.1 to 15.5 Ohm cm) and a 20 micron thick polyimide interface layer is presented as a function of the FGC geometry. Results show that there is an optimum FGC geometry for minimum loss, and silicon with a resistivity of 0.1 Ohm cm has greater loss than substrates with higher and lower resistivity. Lastly, substrates with a resistivity of 10 Ohm cm or greater have acceptable loss.

Silicon-integrated thin-film structure for electro-optic applications

DOEpatents

McKee, Rodney A.; Walker, Frederick Joseph

2000-01-01

A crystalline thin-film structure suited for use in any of an number of electro-optic applications, such as a phase modulator or a component of an interferometer, includes a semiconductor substrate of silicon and a ferroelectric, optically-clear thin film of the perovskite BaTiO.sub.3 overlying the surface of the silicon substrate. The BaTiO.sub.3 thin film is characterized in that substantially all of the dipole moments associated with the ferroelectric film are arranged substantially parallel to the surface of the substrate to enhance the electro-optic qualities of the film.

Coated article and method of making

NASA Technical Reports Server (NTRS)

Wang, Hongyu (Inventor); Lee, Kang Neung (Inventor)

2003-01-01

An article includes a silicon-containing substrate and a modified mullite coating. The modified mullite coating comprises mullite and a modifier component that reduces cracks in the modified mullite coating. The article can further comprise a thermal barrier coating applied to the modified mullite coating. The modified mullite coating functions as a bond coating between the external environmental/thermal barrier coating and the silicon-containing substrate. In a method of forming an article, a silicon-containing substrate is formed and a modified mullite coating is applied. The modified mullite coating comprises mullite and a modifier component that reduces cracks in the modified mullite coating.

Coated article and method of making

NASA Technical Reports Server (NTRS)

Wang, Hongyu (Inventor); Lee, Kang Neung (Inventor)

2002-01-01

An article includes a silicon-containing substrate and a modified mullite coating. The modified mullite coating comprises mullite and a modifier component that reduces cracks in the modified mullite coating. The article can further comprise a thermal barrier coating applied to the modified mullite coating. The modified mullite coating functions as a bond coating between the external environmental/thermal barrier coating and the silicon-containing substrate. In a method of forming an article, a silicon-containing substrate is formed and a modified mullite coating is applied. The modified mullite coating comprises mullite and a modifier component that reduces cracks in the modified mullite coating.

RF Transmission Lines on Silicon Substrates

NASA Technical Reports Server (NTRS)

Ponchak, George E.

1999-01-01

A review of RF transmission lines on silicon substrates is presented. Through measurements and calculated results, it is shown that attenuation is dominated by conductor loss if silicon substrates with a resistivity greater than 2500 Ohm-cm are used. Si passivation layers affect the transmission line attenuation; however, measured results demonstrate that passivation layers do not necessarily increase attenuation. If standard, low resistivity Si wafers must be used, alternative transmission lines such as thin film microstrip and Co-Planar Waveguide (CPW) on thick polyimide layers must be used. Measured results presented here show that low loss per unit length is achievable with these transmission lines.

Charge-coupled device for low background observations

NASA Technical Reports Server (NTRS)

Loh, Edwin D. (Inventor); Cheng, Edward S. (Inventor)

2002-01-01

A charge-coupled device with a low-emissivity metal layer located between a sensing layer and a substrate provides reduction in ghost images. In a typical charge-coupled device of a silicon sensing layer, a silicon dioxide insulating layer, with a glass substrate and a metal carrier layer, a near-infrared photon, not absorbed in the first pass, enters the glass substrate, reflects from the metal carrier, thereby returning far from the original pixel in its entry path. The placement of a low-emissivity metal layer between the glass substrate and the sensing layer reflects near infrared photons before they reach the substrate so that they may be absorbed in the silicon nearer the pixel of their points of entry so that the reflected ghost image is coincident with the primary image for a sharper, brighter image.

Direct Synthesis of Silicon Nanowires, Silica Nanospheres, Wire-Like Nanosphere Agglomerates, and Silica-Based Nanotubes and Nanofiber Arrays

DTIC Science & Technology

2001-01-01

decades, the vapor-liquid-solid (VLS) process, ’ 2 where gold particles act as a mediating solvent on a silicon substrate, forming a molten alloy, has...34Nanocatalysis: Selective Conversion of Ethanol to Acetaldehyde Using Monoatomically Dispersed Copper on Silica Nanospheres", Journal of Catalysis, submitted. 7.Sales literature, Cabot Corporation. C5.9.8 Nanoparticles in Biology

Spreading of Emulsions on Glass Substrates

NASA Astrophysics Data System (ADS)

Mohammad Karim, Alireza; Kavehpour, Pirouz

2012-11-01

The wettability of emulsions is an important factor with explicit influence in an extensive variety of industrial applications ranging from the petroleum to food industries. Surprisingly, there is no comprehensive study of emulsion spreading to date; this is due to the complexity of the structure of the emulsions and non-homogeneity of the dispersed phase bubbles in size as well as distribution through the emulsion. The spreading of water/silicone oil emulsions on glass substrates was investigated. The emulsions were prepared with varying volume fractions of water dispersed in silicone oil, with addition of small amounts of surfactant to stabilize the emulsion structure. The time dependent variation of dynamic contact angle, base diameter, and the spreading rate of the droplets of an emulsion are different from a pure substance. The effect of water/silicone oil weight percentage as well as the droplet size and dispersed phase bubble size were also investigated. The weight percentage of water/silicone oil emulsion and droplet size did not have significant influence on the spreading dynamics; however the dispersed phase drop size affected the spreading dynamics substantially.

Observations of Ball-Lightning-Like Plasmoids Ejected from Silicon by Localized Microwaves.

PubMed

Meir, Yehuda; Jerby, Eli; Barkay, Zahava; Ashkenazi, Dana; Mitchell, James Brian; Narayanan, Theyencheri; Eliaz, Noam; LeGarrec, Jean-Luc; Sztucki, Michael; Meshcheryakov, Oleg

2013-09-11

This paper presents experimental characterization of plasmoids (fireballs) obtained by directing localized microwave power (<1 kW at 2.45 GHz) onto a silicon-based substrate in a microwave cavity. The plasmoid emerges up from the hotspot created in the solid substrate into the air within the microwave cavity. The experimental diagnostics employed for the fireball characterization in this study include measurements of microwave scattering, optical spectroscopy, small-angle X-ray scattering (SAXS), scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDS). Various characteristics of these plasmoids as dusty plasma are drawn by a theoretical analysis of the experimental observations. Aggregations of dust particles within the plasmoid are detected at nanometer and micrometer scales by both in - situ SAXS and ex-situ SEM measurements. The resemblance of these plasmoids to the natural ball-lightning (BL) phenomenon is discussed with regard to silicon nano-particle clustering and formation of slowly-oxidized silicon micro-spheres within the BL. Potential applications and practical derivatives of this study (e.g., direct conversion of solids to powders, material identification by breakdown spectroscopy (MIBS), thermite ignition, and combustion) are discussed.

[The project and simulation of a compositive miniature spectrum instrument based on the array of Fabry-Perot cavity].

PubMed

Wen, Zhi-yu; Chen, Gang; Wang, Jian-guo

2006-10-01

This paper advances a kind of micro-spectrometer based on Fabry-Perot cavity's character of filtering the waves. The basic structure of the micro-spectrometer is the array of Fabry-Perot cavity which contains many different lengths of cavity on the substrate of silicon, consequently the authors can achieve the detection at several wavelengths simultaneously. The unit of probing is a Fabry-Perot cavity made up of the substrate of silicon-metal film-silicon dioxide layer-metal film. The authors carried out the corresponding simulation. In the basic structure of aluminum film(14 nm)-silicon dioxide layer-silver film(39 nm), the resolution can reach 15 nm. When the area of a unit of probing is 0.14 mm x 0.14 mm only, it can reach the luminous flux of miniature grating spectrum instrument (the minimum volume in the order of cm), but the volume of the part of spectrum detection is only of the order of mm. The design size of the micro-spectrometer is a few millimeters. Furthermore it has no movable parts and could detect several wavelengths at the same time. It is possible to fabricate such micro-spectrometer through existing processing methods of IC technology.

Method of producing catalytic material for fabricating nanostructures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seals, Roland D.; Menchhofer, Paul A.; Howe, Jane Y.

Methods of fabricating nano-catalysts are described. In some embodiments the nano-catalyst is formed from a powder-based substrate material and is some embodiments the nano-catalyst is formed from a solid-based substrate material. In some embodiments the substrate material may include metal, ceramic, or silicon or another metalloid. The nano-catalysts typically have metal nanoparticles disposed adjacent the surface of the substrate material. The methods typically include functionalizing the surface of the substrate material with a chelating agent, such as a chemical having dissociated carboxyl functional groups (--COO), that provides an enhanced affinity for metal ions. The functionalized substrate surface may then bemore » exposed to a chemical solution that contains metal ions. The metal ions are then bound to the substrate material and may then be reduced, such as by a stream of gas that includes hydrogen, to form metal nanoparticles adjacent the surface of the substrate.« less

Method of producing catalytic materials for fabricating nanostructures

DOEpatents

Seals, Roland D; Menchhofer, Paul A; Howe, Jane Y; Wang, Wei

2013-02-19

Methods of fabricating nano-catalysts are described. In some embodiments the nano-catalyst is formed from a powder-based substrate material and is some embodiments the nano-catalyst is formed from a solid-based substrate material. In some embodiments the substrate material may include metal, ceramic, or silicon or another metalloid. The nano-catalysts typically have metal nanoparticles disposed adjacent the surface of the substrate material. The methods typically include functionalizing the surface of the substrate material with a chelating agent, such as a chemical having dissociated carboxyl functional groups (--COO), that provides an enhanced affinity for metal ions. The functionalized substrate surface may then be exposed to a chemical solution that contains metal ions. The metal ions are then bound to the substrate material and may then be reduced, such as by a stream of gas that includes hydrogen, to form metal nanoparticles adjacent the surface of the substrate.

High-alignment-accuracy transfer printing of passive silicon waveguide structures.

PubMed

Ye, Nan; Muliuk, Grigorij; Trindade, Antonio Jose; Bower, Chris; Zhang, Jing; Uvin, Sarah; Van Thourhout, Dries; Roelkens, Gunther

2018-01-22

We demonstrate the transfer printing of passive silicon devices on a silicon-on-insulator target waveguide wafer. Adiabatic taper structures and directional coupler structures were designed for 1310 nm and 1600 nm wavelength coupling tolerant for ± 1 µm misalignment. The release of silicon devices from the silicon substrate was realized by underetching the buried oxide layer while protecting the back-end stack. Devices were successfully picked by a PDMS stamp, by breaking the tethers that kept the silicon coupons in place on the source substrate, and printed with high alignment accuracy on a silicon photonic target wafer. Coupling losses of -1.5 +/- 0.5 dB for the adiabatic taper at 1310 nm wavelength and -0.5 +/- 0.5 dB for the directional coupler at 1600 nm wavelength are obtained.

Comparative study of initial stages of copper immersion deposition on bulk and porous silicon

NASA Astrophysics Data System (ADS)

Bandarenka, Hanna; Prischepa, Sergey L.; Fittipaldi, Rosalba; Vecchione, Antonio; Nenzi, Paolo; Balucani, Marco; Bondarenko, Vitaly

2013-02-01

Initial stages of Cu immersion deposition in the presence of hydrofluoric acid on bulk and porous silicon were studied. Cu was found to deposit both on bulk and porous silicon as a layer of nanoparticles which grew according to the Volmer-Weber mechanism. It was revealed that at the initial stages of immersion deposition, Cu nanoparticles consisted of crystals with a maximum size of 10 nm and inherited the orientation of the original silicon substrate. Deposited Cu nanoparticles were found to be partially oxidized to Cu2O while CuO was not detected for all samples. In contrast to porous silicon, the crystal orientation of the original silicon substrate significantly affected the sizes, density, and oxidation level of Cu nanoparticles deposited on bulk silicon.

Simple approach for high-contrast optical imaging and characterization of graphene-based sheets.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jung, I.; Pelton, M.; Piner, R.

2007-12-01

A simple optical method is presented for identifying and measuring the effective optical properties of nanometer-thick, graphene-based materials, based on the use of substrates consisting of a thin dielectric layer on silicon. High contrast between the graphene-based materials and the substrate is obtained by choosing appropriate optical properties and thickness of the dielectric layer. The effective refractive index and optical absorption coefficient of graphene oxide, thermally reduced graphene oxide, and graphene are obtained by comparing the predicted and measured contrasts.

Process for Polycrystalline film silicon growth

DOEpatents

Wang, Tihu; Ciszek, Theodore F.

2001-01-01

A process for depositing polycrystalline silicon on substrates, including foreign substrates, occurs in a chamber at about atmospheric pressure, wherein a temperature gradient is formed, and both the atmospheric pressure and the temperature gradient are maintained throughout the process. Formation of a vapor barrier within the chamber that precludes exit of the constituent chemicals, which include silicon, iodine, silicon diiodide, and silicon tetraiodide. The deposition occurs beneath the vapor barrier. One embodiment of the process also includes the use of a blanketing gas that precludes the entrance of oxygen or other impurities. The process is capable of repetition without the need to reset the deposition zone conditions.

Laser desorption ionization and peptide sequencing on laser induced silicon microcolumn arrays

DOEpatents

Vertes, Akos [Reston, VA; Chen, Yong [San Diego, CA

2011-12-27

The present invention provides a method of producing a laser-patterned silicon surface, especially silicon wafers for use in laser desorption ionization (LDI-MS) (including MALDI-MS and SELDI-MS), devices containing the same, and methods of testing samples employing the same. The surface is prepared by subjecting a silicon substrate to multiple laser shots from a high-power picosecond or femtosecond laser while in a processing environment, e.g., underwater, and generates a remarkable homogenous microcolumn array capable of providing an improved substrate for LDI-MS.

Semiconductor to Metal Transition Characteristics of VO2/NiO Epitaxial Heterostructures Integrated with Si(100)

NASA Astrophysics Data System (ADS)

Molaei, Roya

The novel functionalities of Vanadium dioxide (VO2), such as, several orders of magnitude transition in resistivity and IR transmittance, provide the exciting opportunity for the development of next generation memory, sensor, and field-effect based devices. A critical issue in the development of practical devices based on metal oxides is the integration of high quality epitaxial oxide thin films with the existing silicon technology which is based on silicon (100) substrates. However, silicon is not suitable for epitaxial growth of oxides owing to its tendency to readily form an amorphous oxide layer or silicide at the film-substrate interface. The oxide films deposited directly on silicon exhibit poor crystallinity and are not suitable for device applications. To overcome this challenge, appropriate substrate templates must be developed for the growth of oxide thin films on silicon substrates. The primary objective of this dissertation was to develop an integration methodology of VO2 with Si (100) substrates so they could be used in "smart" sensor type of devices along with other multifunctional devices on the same silicon chip. This was achieved by using a NiO/c- YSZ template layer deposited in situ. It will be shown that if the deposition conditions are controlled properly. This approach was used to integrate VO 2 thin films with Si (100) substrates using pulsed laser deposition (PLD) technique. The deposition methodology of integrating VO2 thin films on silicon using various other template layers will also be discussed. Detailed epitaxial relationship of NiO/c-YSZ/Si(100) heterostructures as a template to growth of VO2 as well as were studied. We also were able to create a p-n junction within a single NiO epilayer through subsequent nanosecond laser annealing, as well as established a structure-property correlation in NiO/c-YSZ/Si(100) thin film epitaxial heterostructures with especial emphasis on the stoichiometry and crystallographic characteristics. NiO/c-YSZ/Si(100) heterostructures were used as template to grow fully relaxed VO2 thin films. The detailed x-ray diffraction, transmission electron microscopy (TEM), electrical characterization results for the deposited films will be presented. In the framework on domain matching epitaxy, epitaxial growth of VO2 (tetragonal crystal structure at growth temperature) on NiO has been explained. Our detailed phi-scan X-ray diffraction measurements corroborate our understanding of the epitaxial growth and in-plane atomic arrangements at the interface. It was observed that the transition characteristics (sharpness, over which electrical property changes are completed, amplitude, transition temperature, and hysteresis) are a strong function of microstructure, strain, and stoichiometry. We have shown that by the choosing the right template layer, strain in the VO2 thin films can be fully relaxed and near-bulk VO2 transition temperatures can be achieved. Finally, I will present my research work on modification of semiconductor-to-metal transition characteristics and effect on room temperature magnetic properties of VO2 thin films upon laser annealing. While the microstructure (epitaxy, crystalline quality etc.) and phase were preserved, we envisage these changes to occur as a result of introduction of oxygen vacancies upon laser treatment.

Tellurium nano-structure based NO gas sensor.

PubMed

Kumar, Vivek; Sen, Shashwati; Sharma, M; Muthe, K P; Jagannath; Gaur, N K; Gupta, S K

2009-09-01

Tellurium nanotubes were grown on bare and silver/gold nanoparticle (nucleation centers) deposited silicon substrates by vacuum deposition technique at a substrate temperature of 100 degrees C under high vacuum conditions. Silver and gold nanoparticles prepared on (111) oriented silicon substrates were found to act as nucleation centers for growth of Tellurium nanostructures. Density of nanotubes was found to increase while their diameter reduced when grown using metallic nanoparticle template. These Te nanostructures were investigated for their gas sensitivity. Tellurium nanotubes on Ag templates showed better response to NO in comparison to H2S and NH3 gases. Selectivity in response to NO was improved in comparison to Te thin film sensors reported earlier. The gas sensing mechanism was investigated using Raman and X-ray photoelectron spectroscopy techniques. The interaction of NO is seen to yield increased adsorption of oxygen that in turn increases hole density and conductivity in the material.

Broadband omnidirectional antireflection coating based on subwavelength surface Mie resonators

PubMed Central

Spinelli, P.; Verschuuren, M.A.; Polman, A.

2012-01-01

Reflection is a natural phenomenon that occurs when light passes the interface between materials with different refractive index. In many applications, such as solar cells or photodetectors, reflection is an unwanted loss process. Many ways to reduce reflection from a substrate have been investigated so far, including dielectric interference coatings, surface texturing, adiabatic index matching and scattering from plasmonic nanoparticles. Here we present an entirely new concept that suppresses the reflection of light from a silicon surface over a broad spectral range. A two-dimensional periodic array of subwavelength silicon nanocylinders designed to possess strongly substrate-coupled Mie resonances yields almost zero total reflectance over the entire spectral range from the ultraviolet to the near-infrared. This new antireflection concept relies on the strong forward scattering that occurs when a scattering structure is placed in close proximity to a high-index substrate with a high optical density of states. PMID:22353722

Silicon micromachined accelerometer/seismometer and method of making the same

NASA Technical Reports Server (NTRS)

Martin, Richard D. (Inventor); Pike, W. Thomas (Inventor)

2001-01-01

A silicon-based microaccelerometer for seismic application is provided using a low-resonant frequency (10 Hz), large proof mass (1 gram), and high Q suspension to achieve high sensitivity of less than 1 ng with a bandwidth a 0.05 to 50 Hz. The proof mass is cut away from a planar substrate in the form of a disk using abrasive cutting, which disk closely fits but does not touch a surrounding angular frame. The spring of the microaccelerometer between the angular frame and the proof mass is provided from two continuous, 3 microns thick membranes. The fixed capacitive electrodes are provided on separate, subsequently bonded substrates, and movable capacitive plates are provided on the membranes. By fabricating capacitive plates on the separate substrates, the gap between the fixed and movable capacitive plates in the differential capacitive sensor is closely controlled. The use of continuous membranes for the spring produces a shock resistant, robust sensor.

High-T(sub c) Edge-geometry SNS Weak Links on Silicon-on-sapphire Substrates

NASA Technical Reports Server (NTRS)

Hunt, B.; Foote, M.; Pike, W.; Barner, J.; Vasquez, R.

1994-01-01

High-quality superconductor/normal-metal/superconductor(SNS) edge-geometry weak links have been produced on silicon-on-sapphire (SOS) substrates using a new SrTiO(sub 3)/'seed layer'/cubic-zirconia (YS2) buffer system.

Electron beam recrystallization of amorphous semiconductor materials

NASA Technical Reports Server (NTRS)

Evans, J. C., Jr.

1968-01-01

Nucleation and growth of crystalline films of silicon, germanium, and cadmium sulfide on substrates of plastic and glass were investigated. Amorphous films of germanium, silicon, and cadmium sulfide on amorphous substrates of glass and plastic were converted to the crystalline condition by electron bombardment.

Influence of design variables on radiation hardness of silicon MINP solar cells

NASA Technical Reports Server (NTRS)

Anderson, W. A.; Solaun, S.; Rao, B. B.; Banerjee, S.

1985-01-01

Metal-insulator-N/P silicon (MINP) solar cells were fabricated using different substrate resistivity values, different N-layer designs, and different I-layer designs. A shallow junction into an 0.3 ohm-cm substrate gave best efficiency whereas a deeper junction into a 1 to 4 ohm-cm substrate gave improved radiation hardness. I-layer design variation did little to influence radiation hardness.

Environmental barrier coating

DOEpatents

Pujari, Vimal K.; Vartabedian, Ara; Collins, William T.; Woolley, David; Bateman, Charles

2012-12-18

The present invention relates generally to a multi-layered article suitable for service in severe environments. The article may be formed of a substrate, such as silicon carbide and/or silicon nitride. The substrate may have a first layer of a mixture of a rare earth silicate and Cordierite. The substrate may also have a second layer of a rare earth silicate or a mixture of a rare earth silicate and cordierite.

Development of Mullite Substrates and Containers

NASA Technical Reports Server (NTRS)

Sibold, J. D.

1979-01-01

The mullite-molten silicon interaction was evaluated through fabrication of a series of bodies made with variations in density, alumina-silica ratio, and glass-crystalline ratio. The materials were tested in a sessile drop technique. None of the variations stood up to extended exposure to molten silicon sufficiently to be recommended as a container material. However, directional solidification experiments suggest that, under proper conditions, contamination of the silicon by mullite containers can be minimized. To improve an already good thermal expansion match between mullite and silicon, compositional variations were studied. Altering of the alumina-silica ratio was determined to give a continuously varying thermal expansion. A standard mullite composition was selected and substrates 40 x 4 x .040 inches were fabricated. Slotted substrates of various configurations and various compositions were also fabricated.

Characterization of Adhesives for Attaching Reusable Surface Insulation on Space Shuttle Vehicles

NASA Technical Reports Server (NTRS)

Owen, H. P.; Carroll, M. T.

1973-01-01

An extensive development and testing program on adhesive systems shows that: (1) A closed cell silicone rubber sponge bonded to substrates with thin bond lines of glass filled adhesive exhibits density and modulus values approximately one third that of solid silicone adhesives; (2) utilization of glass or phenolic microballoons as fillers in silicone adhesives reduces density but increases moduli of the vulcanized materials; (3) the silicone elastomer based adhesives appear to be complex systems rather than homogeneous, isotropic materials. Tensile, shear, and compression properties plotted versus temperature verify this conjecture; and (4) constant strain-stress relaxation tests on glass-filled adhesive show that stress relaxation is most pronounced near the glass transition temperature.

Gold Nanoparticles on Functionalized Silicon Substrate under Coulomb Blockade Regime: An Experimental and Theoretical Investigation.

PubMed

Pluchery, Olivier; Caillard, Louis; Dollfus, Philippe; Chabal, Yves J

2018-01-18

Single charge electronics offer a way for disruptive technology in nanoelectronics. Coulomb blockade is a realistic way for controlling the electric current through a device with the accuracy of one electron. In such devices the current exhibits a step-like increase upon bias which reflects the discrete nature of the fundamental charge. We have assembled a double tunnel junction on an oxide-free silicon substrate that exhibits Coulomb staircase characteristics using gold nanoparticles (AuNPs) as Coulomb islands. The first tunnel junction is an insulating layer made of a grafted organic monolayer (GOM) developed for this purpose. The GOM also serves for attaching AuNPs covalently. The second tunnel junction is made by the tip of an STM. We show that this device exhibits reproducible Coulomb blockade I-V curves at 40 K in vacuum. We also show that depending on the doping of the silicon substrate, the whole Coulomb staircase can be adjusted. We have developed a simulation approach based on the orthodox theory that was completed by calculating the bias dependent tunnel barriers and by including an accurate calculation of the band bending. This model accounts for the experimental data and the doping dependence of Coulomb oscillations. This study opens new perspectives toward designing new kind of single electron transistors (SET) based on this dependence of the Coulomb staircase with the charge carrier concentration.

Vertical group III-V nanowires on si, heterostructures, flexible arrays and fabrication

DOEpatents

Wang, Deli; Soci, Cesare; Bao, Xinyu; Wei, Wei; Jing, Yi; Sun, Ke

2015-01-13

Embodiments of the invention provide a method for direct heteroepitaxial growth of vertical III-V semiconductor nanowires on a silicon substrate. The silicon substrate is etched to substantially completely remove native oxide. It is promptly placed in a reaction chamber. The substrate is heated and maintained at a growth temperature. Group III-V precursors are flowed for a growth time. Preferred embodiment vertical Group III-V nanowires on silicon have a core-shell structure, which provides a radial homojunction or heterojunction. A doped nanowire core is surrounded by a shell with complementary doping. Such can provide high optical absorption due to the long optical path in the axial direction of the vertical nanowires, while reducing considerably the distance over which carriers must diffuse before being collected in the radial direction. Alloy composition can also be varied. Radial and axial homojunctions and heterojunctions can be realized. Embodiments provide for flexible Group III-V nanowire structures. An array of Group III-V nanowire structures is embedded in polymer. A fabrication method forms the vertical nanowires on a substrate, e.g., a silicon substrate. Preferably, the nanowires are formed by the preferred methods for fabrication of Group III-V nanowires on silicon. Devices can be formed with core/shell and core/multi-shell nanowires and the devices are released from the substrate upon which the nanowires were formed to create a flexible structure that includes an array of vertical nanowires embedded in polymer.

Characterization of Silicon Moth-Eye Antireflection Coatings for Astronomical Applications in the Infrared

NASA Astrophysics Data System (ADS)

Jeram, Sarik; Ge, Jian; Jiang, Peng; Phillips, Blayne

2016-01-01

Silicon moth-eye antireflective structures have emerged to be an excellent approachfor reducing the amount of light that is lost upon incidence on a given surface of optics made of silicon. This property has been exploited for a wide variety of products ranging from eyeglasses and flat-panel displays to solar panels. These materials typically come in the form of coatings that are applied to an optical substrate such as glass. Moth-eye coatings, made of a periodic array of subwavelength pillars on silicon substrates or other substrates, can produce the desired antireflection (AR) performance for a broad wavelength range and over a wide range of incident angles. In the field of astronomy, every photon striking a detector is significant - and thus, losses from reflectivity at the various optical interfaces before a detector can have significant implications to the science at hand. Moth-eye AR coatings on these optical interfaces may minimize their reflection losses while maximizing light throughput for a multitude of different astronomical instruments. In addition, moth-eye AR coatings, which are patterned directly on silicon surfaces, can significantly enhance the coating durability. At the University of Florida, we tested two moth-eye filters designed for use in the near-infrared regime at 1-8 microns by examining their optical properties, such as transmission, the scattered light, and wavefront quality, and testing the coatings at cryogenic temperatures to characterize their viability for use in both ground- and space-based infrared instruments. This presentation will report our lab evaluation results.

Investigation of ZnSe-coated silicon substrates for GaAs solar cells

NASA Technical Reports Server (NTRS)

Huber, Daniel A.; Olsen, Larry C.; Dunham, Glen; Addis, F. William

1993-01-01

Studies are being carried out to determine the feasibility of using ZnSe as a buffer layer for GaAs solar cells grown on silicon. This study was motivated by reports in the literature indicating ZnSe films had been grown by metallorganic chemical vapor deposition (MOCVD) onto silicon with EPD values of 2 x 10(exp 5) cm(sup -2), even though the lattice mismatch between silicon and ZnSe is 4.16 percent. These results combined with the fact that ZnSe and GaAs are lattice matched to within 0.24 percent suggest that the prospects for growing high efficiency GaAs solar cells onto ZnSe-coated silicon are very good. Work to date has emphasized development of procedures for MOCVD growth of (100) ZnSe onto (100) silicon wafers, and subsequent growth of GaAs films on ZnSe/Si substrates. In order to grow high quality single crystal GaAs with a (100) orientation, which is desirable for solar cells, one must grow single crystal (100) ZnSe onto silicon substrates. A process for growth of (100) ZnSe was developed involving a two-step growth procedure at 450 C. Single crystal, (100) GaAs films were grown onto the (100) ZnSe/Si substrates at 610 C that are adherent and specular. Minority carrier diffusion lengths for the GaAs films grown on ZnSe/Si substrates were determined from photoresponse properties of Al/GaAs Schottky barriers. Diffusion lengths for n-type GaAs films are currently on the order of 0.3 microns compared to 2.0 microns for films grown simultaneously by homoepitaxy.

Ion irradiation of the native oxide/silicon surface increases the thermal boundary conductance across aluminum/silicon interfaces

NASA Astrophysics Data System (ADS)

Gorham, Caroline S.; Hattar, Khalid; Cheaito, Ramez; Duda, John C.; Gaskins, John T.; Beechem, Thomas E.; Ihlefeld, Jon F.; Biedermann, Laura B.; Piekos, Edward S.; Medlin, Douglas L.; Hopkins, Patrick E.

2014-07-01

The thermal boundary conductance across solid-solid interfaces can be affected by the physical properties of the solid boundary. Atomic composition, disorder, and bonding between materials can result in large deviations in the phonon scattering mechanisms contributing to thermal boundary conductance. Theoretical and computational studies have suggested that the mixing of atoms around an interface can lead to an increase in thermal boundary conductance by creating a region with an average vibrational spectra of the two materials forming the interface. In this paper, we experimentally demonstrate that ion irradiation and subsequent modification of atoms at solid surfaces can increase the thermal boundary conductance across solid interfaces due to a change in the acoustic impedance of the surface. We measure the thermal boundary conductance between thin aluminum films and silicon substrates with native silicon dioxide layers that have been subjected to proton irradiation and post-irradiation surface cleaning procedures. The thermal boundary conductance across the Al/native oxide/Si interfacial region increases with an increase in proton dose. Supported with statistical simulations, we hypothesize that ion beam mixing of the native oxide and silicon substrate within ˜2.2nm of the silicon surface results in the observed increase in thermal boundary conductance. This ion mixing leads to the spatial gradation of the silicon native oxide into the silicon substrate, which alters the acoustic impedance and vibrational characteristics at the interface of the aluminum film and native oxide/silicon substrate. We confirm this assertion with picosecond acoustic analyses. Our results demonstrate that under specific conditions, a "more disordered and defected" interfacial region can have a lower resistance than a more "perfect" interface.

MEMS based Low Cost Piezoresistive Microcantilever Force Sensor and Sensor Module

PubMed Central

Pandya, H. J.; Kim, Hyun Tae; Roy, Rajarshi; Desai, Jaydev P.

2014-01-01

In the present work, we report fabrication and characterization of a low-cost MEMS based piezoresistive micro-force sensor with SU-8 tip using laboratory made silicon-on-insulator (SOI) substrate. To prepare SOI wafer, silicon film (0.8 µm thick) was deposited on an oxidized silicon wafer using RF magnetron sputtering technique. The films were deposited in Argon (Ar) ambient without external substrate heating. The material characteristics of the sputtered deposited silicon film and silicon film annealed at different temperatures (400–1050°C) were studied using atomic force microscopy (AFM) and X-ray diffraction (XRD) techniques. The residual stress of the films was measured as a function of annealing temperature. The stress of the as-deposited films was observed to be compressive and annealing the film above 1050°C resulted in a tensile stress. The stress of the film decreased gradually with increase in annealing temperature. The fabricated cantilevers were 130 µm in length, 40 µm wide and 1.0 µm thick. A series of force-displacement curves were obtained using fabricated microcantilever with commercial AFM setup and the data were analyzed to get the spring constant and the sensitivity of the fabricated microcantilever. The measured spring constant and sensitivity of the sensor was 0.1488N/m and 2.7mV/N. The microcantilever force sensor was integrated with an electronic module that detects the change in resistance of the sensor with respect to the applied force and displays it on the computer screen. PMID:24855449

MEMS based Low Cost Piezoresistive Microcantilever Force Sensor and Sensor Module.

PubMed

Pandya, H J; Kim, Hyun Tae; Roy, Rajarshi; Desai, Jaydev P

2014-03-01

In the present work, we report fabrication and characterization of a low-cost MEMS based piezoresistive micro-force sensor with SU-8 tip using laboratory made silicon-on-insulator (SOI) substrate. To prepare SOI wafer, silicon film (0.8 µm thick) was deposited on an oxidized silicon wafer using RF magnetron sputtering technique. The films were deposited in Argon (Ar) ambient without external substrate heating. The material characteristics of the sputtered deposited silicon film and silicon film annealed at different temperatures (400-1050°C) were studied using atomic force microscopy (AFM) and X-ray diffraction (XRD) techniques. The residual stress of the films was measured as a function of annealing temperature. The stress of the as-deposited films was observed to be compressive and annealing the film above 1050°C resulted in a tensile stress. The stress of the film decreased gradually with increase in annealing temperature. The fabricated cantilevers were 130 µm in length, 40 µm wide and 1.0 µm thick. A series of force-displacement curves were obtained using fabricated microcantilever with commercial AFM setup and the data were analyzed to get the spring constant and the sensitivity of the fabricated microcantilever. The measured spring constant and sensitivity of the sensor was 0.1488N/m and 2.7mV/N. The microcantilever force sensor was integrated with an electronic module that detects the change in resistance of the sensor with respect to the applied force and displays it on the computer screen.

Deposition of hydrogenated silicon clusters for efficient epitaxial growth.

PubMed

Le, Ha-Linh Thi; Jardali, Fatme; Vach, Holger

2018-06-13

Epitaxial silicon thin films grown from the deposition of plasma-born hydrogenated silicon nanoparticles using plasma-enhanced chemical vapor deposition have widely been investigated due to their potential applications in photovoltaic and nanoelectronic device technologies. However, the optimal experimental conditions and the underlying growth mechanisms leading to the high-speed epitaxial growth of thin silicon films from hydrogenated silicon nanoparticles remain far from being understood. In the present work, extensive molecular dynamics simulations were performed to study the epitaxial growth of silicon thin films resulting from the deposition of plasma-born hydrogenated silicon clusters at low substrate temperatures under realistic reactor conditions. There is strong evidence that a temporary phase transition of the substrate area around the cluster impact site to the liquid state is necessary for the epitaxial growth to take place. We predict further that a non-normal incidence angle for the cluster impact significantly facilitates the epitaxial growth of thin crystalline silicon films.

Study on Buckling of Stiff Thin Films on Soft Substrates as Functional Materials

NASA Astrophysics Data System (ADS)

Ma, Teng

In engineering, buckling is mechanical instability of walls or columns under compression and usually is a problem that engineers try to prevent. In everyday life buckles (wrinkles) on different substrates are ubiquitous -- from human skin to a rotten apple they are a commonly observed phenomenon. It seems that buckles with macroscopic wavelengths are not technologically useful; over the past decade or so, however, thanks to the widespread availability of soft polymers and silicone materials micro-buckles with wavelengths in submicron to micron scale have received increasing attention because it is useful for generating well-ordered periodic microstructures spontaneously without conventional lithographic techniques. This thesis investigates the buckling behavior of thin stiff films on soft polymeric substrates and explores a variety of applications, ranging from optical gratings, optical masks, energy harvest to energy storage. A laser scanning technique is proposed to detect micro-strain induced by thermomechanical loads and a periodic buckling microstructure is employed as a diffraction grating with broad wavelength tunability, which is spontaneously generated from a metallic thin film on polymer substrates. A mechanical strategy is also presented for quantitatively buckling nanoribbons of piezoelectric material on polymer substrates involving the combined use of lithographically patterning surface adhesion sites and transfer printing technique. The precisely engineered buckling configurations provide a route to energy harvesters with extremely high levels of stretchability. This stiff-thin-film/polymer hybrid structure is further employed into electrochemical field to circumvent the electrochemically-driven stress issue in silicon-anode-based lithium ion batteries. It shows that the initial flat silicon-nanoribbon-anode on a polymer substrate tends to buckle to mitigate the lithiation-induced stress so as to avoid the pulverization of silicon anode. Spontaneously generated submicron buckles of film/polymer are also used as an optical mask to produce submicron periodic patterns with large filling ratio in contrast to generating only ˜100 nm edge submicron patterns in conventional near-field soft contact photolithography. This thesis aims to deepen understanding of buckling behavior of thin films on compliant substrates and, in turn, to harness the fundamental properties of such instability for diverse applications.

Formation of microchannels from low-temperature plasma-deposited silicon oxynitride

DOEpatents

Matzke, Carolyn M.; Ashby, Carol I. H.; Bridges, Monica M.; Manginell, Ronald P.

2000-01-01

A process for forming one or more fluid microchannels on a substrate is disclosed that is compatible with the formation of integrated circuitry on the substrate. The microchannels can be formed below an upper surface of the substrate, above the upper surface, or both. The microchannels are formed by depositing a covering layer of silicon oxynitride over a mold formed of a sacrificial material such as photoresist which can later be removed. The silicon oxynitride is deposited at a low temperature (.ltoreq.100.degree. C.) and preferably near room temperature using a high-density plasma (e.g. an electron-cyclotron resonance plasma or an inductively-coupled plasma). In some embodiments of the present invention, the microchannels can be completely lined with silicon oxynitride to present a uniform material composition to a fluid therein. The present invention has applications for forming microchannels for use in chromatography and electrophoresis. Additionally, the microchannels can be used for electrokinetic pumping, or for localized or global substrate cooling.

Ablative performance of uncoated silicone-modified and shuttle baseline reinforced carbon composites

NASA Technical Reports Server (NTRS)

Dicus, D. L.; Hopko, R. N.; Brown, R. D.

1976-01-01

The relative ablative performance of uncoated silicone-modified reinforced carbon composite (RCC) and uncoated shuttle baseline RCC substrates was investigated. The test specimens were 13 plies (5.3 to 5.8 millimeters) thick and had a 25-millimeter-diameter test face. Prior to arc tunnel testing, all specimens were subjected to a heat treatment simulating the RCC coating process. During arc tunnel testing, the specimens were exposed to cold wall heating rates of 178 to 529 kilowatts/sq m and stagnation pressures ranging from 0.015 to 0.046 atmosphere at Mach 4.6 in air, with and without preheating in nitrogen. The results show that the ablative performance of uncoated silicone-modified RCC substrates is significantly superior to that of uncoated shuttle baseline RCC substrates over the range of heating conditions used. These results indicate that the silicone-modified RCC substrate would yield a substantially greater safety margin in the event of complete coating loss on the shuttle orbiter.

Profilometry of thin films on rough substrates by Raman spectroscopy

PubMed Central

Ledinský, Martin; Paviet-Salomon, Bertrand; Vetushka, Aliaksei; Geissbühler, Jonas; Tomasi, Andrea; Despeisse, Matthieu; De Wolf , Stefaan; Ballif , Christophe; Fejfar, Antonín

2016-01-01

Thin, light-absorbing films attenuate the Raman signal of underlying substrates. In this article, we exploit this phenomenon to develop a contactless thickness profiling method for thin films deposited on rough substrates. We demonstrate this technique by probing profiles of thin amorphous silicon stripes deposited on rough crystalline silicon surfaces, which is a structure exploited in high-efficiency silicon heterojunction solar cells. Our spatially-resolved Raman measurements enable the thickness mapping of amorphous silicon over the whole active area of test solar cells with very high precision; the thickness detection limit is well below 1 nm and the spatial resolution is down to 500 nm, limited only by the optical resolution. We also discuss the wider applicability of this technique for the characterization of thin layers prepared on Raman/photoluminescence-active substrates, as well as its use for single-layer counting in multilayer 2D materials such as graphene, MoS2 and WS2. PMID:27922033

RF sputtered silicon and hafnium nitrides as applied to 440C steel

NASA Technical Reports Server (NTRS)

Grill, A.; Aron, P. R.

1984-01-01

Silicon nitride and hafnium nitride coatings were deposited on oxidized and unoxidized 440C stainless steel substrates. Sputtering was done in mixtures of argon and nitrogen gases from pressed powder silicon nitride and from hafnium metal targets. The coatings and the interface between the coating and substrate were investigated by X-ray diffractometry, scanning electron microscopy, energy dispersive X-ray analysis and Auger electron spectroscopy. Oxide was found at all interfaces with an interface width of at least 600 A for the oxidized substrates and at least 300 A for the unoxidized substrates. Scratch test results demonstrate that the adhesion of hafnium nitride to both oxidized and unoxidized 440C is superior to that of silicon nitride. Oxidized 440C is found to have increased adhesion, to both nitrides, over that of unoxidized 440C. Coatings of both nitrides deposited at 8 mtorr were found to have increased adhesion to both oxidized and unoxidized 440C over those deposited at 20 mtorr.

Printable nanostructured silicon solar cells for high-performance, large-area flexible photovoltaics.

PubMed

Lee, Sung-Min; Biswas, Roshni; Li, Weigu; Kang, Dongseok; Chan, Lesley; Yoon, Jongseung

2014-10-28

Nanostructured forms of crystalline silicon represent an attractive materials building block for photovoltaics due to their potential benefits to significantly reduce the consumption of active materials, relax the requirement of materials purity for high performance, and hence achieve greatly improved levelized cost of energy. Despite successful demonstrations for their concepts over the past decade, however, the practical application of nanostructured silicon solar cells for large-scale implementation has been hampered by many existing challenges associated with the consumption of the entire wafer or expensive source materials, difficulties to precisely control materials properties and doping characteristics, or restrictions on substrate materials and scalability. Here we present a highly integrable materials platform of nanostructured silicon solar cells that can overcome these limitations. Ultrathin silicon solar microcells integrated with engineered photonic nanostructures are fabricated directly from wafer-based source materials in configurations that can lower the materials cost and can be compatible with deterministic assembly procedures to allow programmable, large-scale distribution, unlimited choices of module substrates, as well as lightweight, mechanically compliant constructions. Systematic studies on optical and electrical properties, photovoltaic performance in experiments, as well as numerical modeling elucidate important design rules for nanoscale photon management with ultrathin, nanostructured silicon solar cells and their interconnected, mechanically flexible modules, where we demonstrate 12.4% solar-to-electric energy conversion efficiency for printed ultrathin (∼ 8 μm) nanostructured silicon solar cells when configured with near-optimal designs of rear-surface nanoposts, antireflection coating, and back-surface reflector.

High-sensitivity silicon nanowire phototransistors

NASA Astrophysics Data System (ADS)

Tan, Siew Li; Zhao, Xingyan; Dan, Yaping

2014-08-01

Silicon nanowires (SiNWs) have emerged as a promising material for high-sensitivity photodetection in the UV, visible and near-infrared spectral ranges. In this work, we demonstrate novel planar SiNW phototransistors on silicon-oninsulator (SOI) substrate using CMOS-compatible processes. The device consists of a bipolar transistor structure with an optically-injected base region. The electronic and optical properties of the SiNW phototransistors are investigated. Preliminary simulation and experimental results show that nanowire geometry, doping densities and surface states have considerable effects on the device performance, and that a device with optimized parameters can potentially outperform conventional Si photodetectors.

Development of Plastic Substrate Technology for Active Matrix Liquid Crystal Displays Final Report CRADA No. TC-761-93

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carey, P.; Kamath, H.

Raychem Corporation (RYC) and the Lawrence Livermore National Laboratory (LLNL) conducted a development program with the goal to make rugged, low-cost., high-resolution flat panel displays based on RYC's proprietary Nematic Curvilinear Aligned Phase (NCAP) liquid crystal and LLNL's patented processes for the formation and doping of polycrystalline silicon on low-temperature, flexible, plastic substrates.

In situ micro-Raman analysis and X-ray diffraction of nickel silicide thin films on silicon.

PubMed

Bhaskaran, M; Sriram, S; Perova, T S; Ermakov, V; Thorogood, G J; Short, K T; Holland, A S

2009-01-01

This article reports on the in situ analysis of nickel silicide (NiSi) thin films formed by thermal processing of nickel thin films deposited on silicon substrates. The in situ techniques employed for this study include micro-Raman spectroscopy (microRS) and X-ray diffraction (XRD); in both cases the variations for temperatures up to 350 degrees C has been studied. Nickel silicide thin films formed by vacuum annealing of nickel on silicon were used as a reference for these measurements. In situ analysis was carried out on nickel thin films on silicon, while the samples were heated from room temperature to 350 degrees C. Data was gathered at regular temperature intervals and other specific points of interest (such as 250 degrees C, where the reaction between nickel and silicon to form Ni(2)Si is expected). The transformations from the metallic state, through the intermediate reaction states, until the desired metal-silicon reaction product is attained, are discussed. The evolution of nickel silicide from the nickel film can be observed from both the microRS and XRD in situ studies. Variations in the evolution of silicide from metal for different silicon substrates are discussed, and these include (100) n-type, (100) p-type, and (110) p-type silicon substrates.

Organization of the Integrated Photonics Topical Meeting Held in Victoria, British Columbia on 30 March-1 April 1998. Technical Digest Series. Volume 4. Postconference Edition

DTIC Science & Technology

1999-03-22

amplifiers fabricated on Si substrates by co- sputtering, (p. 27) 11:30am IMC3 ■ Birefrlngent oxidized porous silicon-based optical waveguides, Yu. N...that integrated optical waveguides based on oxidized porous silicon have a relatively large birefringence. As a result, the modes of both... Membrane microresonator lasers with 2-D photonic bandgap crystal mirrors for compact in- plane optics, B. D’Urso, O. Painter, A. Yariv, A. Scherer

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

NASA Astrophysics Data System (ADS)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

Development of a Microelectromechanical System for Small Satellite Thermal Control

DTIC Science & Technology

2004-05-06

polymer frame or post over a silicon substrate. The membrane should be coated with a high emissivity material. This design was based on the principle...allowing heat conduction to the silicon. While the device was off, both the poor thermal conductivity of the polymer and the gap between membrane and...EnergyThermally Isolating Vacuum and Polymer Heat Conduction (a) (b) Figure 4. Heat conduction and radiation in the on and off states

Rapid Covalent Modification of Silicon Oxide Surfaces through Microwave-Assisted Reactions with Alcohols.

PubMed

Lee, Austin W H; Gates, Byron D

2016-07-26

We demonstrate the method of a rapid covalent modification of silicon oxide surfaces with alcohol-containing compounds with assistance by microwave reactions. Alcohol-containing compounds are prevalent reagents in the laboratory, which are also relatively easy to handle because of their stability against exposure to atmospheric moisture. The condensation of these alcohols with the surfaces of silicon oxides is often hindered by slow reaction kinetics. Microwave radiation effectively accelerates this condensation reaction by heating the substrates and/or solvents. A variety of substrates were modified in this demonstration, such as silicon oxide films of various thicknesses, glass substrates such as microscope slides (soda lime), and quartz. The monolayers prepared through this strategy demonstrated the successful formation of covalent surface modifications of silicon oxides with water contact angles of up to 110° and typical hysteresis values of 2° or less. An evaluation of the hydrolytic stability of these monolayers demonstrated their excellent stability under acidic conditions. The techniques introduced in this article were successfully applied to tune the surface chemistry of silicon oxides to achieve hydrophobic, oleophobic, and/or charged surfaces.

Some material structural properties of SOI substrates produced by SDB technology

NASA Astrophysics Data System (ADS)

Hui, Li; Guo-Liang, Sun; Juan, Zhan; Qin-Yi, Tong

1987-10-01

SOI substrates have been produced by silicon direct bonding (SDB) technology. Thermal oxides ranging in thickness from native oxide to 1 μm or even more, on either or both wafers have been bonded successfully. The fracture strength of the SOI layer is 130-200 kg/cm 2 which is similar to the value of intrinsic bulk silicon. Dislocations have been shown to be concentrated on the backsides of the substrate and no additional defects have been developed within 80 μm of the Si-SiO 2 bonding area. Mobility and minority carrier lifetime similar to that of the original bulk silicon have been obtained after annealing.

Paper-based SERS swab for rapid trace detection on real-world surfaces.

PubMed

Lee, Chang H; Tian, Limei; Singamaneni, Srikanth

2010-12-01

One of the important but often overlooked considerations in the design of surface-enhanced Raman scattering (SERS) substrates for trace detection is the efficiency of sample collection. Conventional designs based on rigid substrates such as silicon, alumina, and glass resist conformal contact with the surface under investigation, making the sample collection inefficient. We demonstrate a novel SERS substrate based on common filter paper adsorbed with gold nanorods, which allows conformal contact with real-world surfaces, thus dramatically enhancing the sample collection efficiency compared to conventional rigid substrates. We demonstrate the detection of trace amounts of analyte (140 pg spread over 4 cm2) by simply swabbing the surface under investigation with the novel SERS substrate. The hierarchical fibrous structure of paper serves as a 3D vasculature for easy uptake and transport of the analytes to the electromagnetic hot spots in the paper. Simple yet highly efficient and cost-effective SERS substrate demonstrated here brings SERS-based trace detection closer to real-world applications.

Deposition of device quality, low hydrogen content, hydrogenated amorphous silicon at high deposition rates with increased stability using the hot wire filament technique

DOEpatents

Molenbroek, Edith C.; Mahan, Archie Harvin; Gallagher, Alan C.

2000-09-26

A method or producing hydrogenated amorphous silicon on a substrate, comprising the steps of: positioning the substrate in a deposition chamber at a distance of about 0.5 to 3.0 cm from a heatable filament in the deposition chamber; maintaining a pressure in said deposition chamber in the range of about 10 to 100 millitorr and pressure times substrate-filament spacing in the range of about 10 to 100 millitorr-cm, heating the filament to a temperature in the range of about 1,500 to 2,000.degree. C., and heating the substrate to a surface temperature in the range of about 280 to 475.degree. C.; and flowing silicohydride gas into the deposition chamber with said heated filament, decomposing said silicohydride gas into silicon and hydrogen atomic species and allowing products of gas reactions between said atomic species and the silicohydride gas to migrate to and deposit on said substrate while adjusting and maintaining said pressure times substrate-filament spacing in said deposition chamber at a value in said 10 to 100 millitorr range to produce statistically about 3 to 50 atomic collisions between the silicon and hydrogen atomic species migrating to said substrate and undecomposed molecules of the silane or other silicohydride gas in the deposition chamber.

Flexible Nonstick Replica Mold for Transfer Printing of Ag Ink.

PubMed

Lee, Bong Kuk; Yu, Han Young; Kim, Yarkyeon; Yoon, Yong Sun; Jang, Won Ik; Do, Lee-Mi; Park, Ji-Ho; Park, Jaehoon

2016-03-01

We report the fabrication of flexible replica molds for transfer printing of Ag ink on a rigid glass substrate. As mold precursors, acrylic mixtures were prepared from silsesquioxane-based materials, silicone acrylate, poly(propylene glycol) diacrylate, 3,3,4,4,5,5,6,6,7,7,8,8, 9,9,10,10,10-heptadecafluorodecyl methacrylate, and photoinitiator. By using these materials, the replica molds were fabricated from a silicon master onto a flexible substrate by means of UV-assisted molding process at room temperature. The wettability of Ag ink decreased with increase in the water contact angle of replica molds. On the other hand, the transfer rate of Ag ink onto adhesive-modified substrates increased with increase in the water contact angle of replica molds. Transferred patterns were found to be thermally stable on the photocurable adhesive layer, whereas Ag-ink patterns transferred on non-photocurable adhesives were distorted by thermal treatment. We believe that these characteristics of replica molds and adhesives offer a new strategy for the development of the transfer printing of solution-based ink materials.

A Colloidal Route to Detection of Organic Molecules Based on Surface-Enhanced Raman Spectroscopy Using Nanostructured Substrate Derived from Aerosols

NASA Astrophysics Data System (ADS)

Gen, Masao; Kakuta, Hideo; Kamimoto, Yoshihito; Wuled Lenggoro, I.

2011-06-01

A detection method based on the surface-enhanced Raman spectroscopy (SERS)-active substrate derived from aerosol nanoparticles and a colloidal suspension for detecting organic molecules of a model analyte (a pesticide) is proposed. This approach can detect the molecules of the derived from its solution with the concentration levels of ppb. For substrate fabrication, a gas-phase method is used to directly deposit Ag nanoparticles on to a silicon substrate having pyramidal structures. By mixing the target analyte with a suspension of Ag colloids purchased in advance, clotianidin analyte on Ag colloid can exist in junctions of co-aggregated Ag colloids. Using (i) a nanostructured substrate made from aerosol nanoparticles and (ii) colloidal suspension can increase the number of activity spots.

Vacuum die attach for integrated circuits

DOEpatents

Schmitt, E.H.; Tuckerman, D.B.

1991-09-10

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required. 1 figure.

Vacuum die attach for integrated circuits

DOEpatents

Schmitt, Edward H.; Tuckerman, David B.

1991-01-01

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required.

Formation of thin-film resistors on silicon substrates

DOEpatents

Schnable, George L.; Wu, Chung P.

1988-11-01

The formation of thin-film resistors by the ion implantation of a metallic conductive layer in the surface of a layer of phosphosilicate glass or borophosphosilicate glass which is deposited on a silicon substrate. The metallic conductive layer materials comprise one of the group consisting of tantalum, ruthenium, rhodium, platinum and chromium silicide. The resistor is formed and annealed prior to deposition of metal, e.g. aluminum, on the substrate.

NT-SiC (new-technology silicon carbide) : Φ 650mm optical space mirror substrate of high-strength reaction-sintered silicon carbide

NASA Astrophysics Data System (ADS)

Suyama, Shoko; Itoh, Yoshiyasu; Tsuno, Katsuhiko; Ohno, Kazuhiko

2005-08-01

Silicon carbide (SiC) is the most advantageous as the material of various telescope mirrors, because of high stiffness, low density, low coefficient of thermal expansion, high thermal conductivity and thermal stability. Newly developed high-strength reaction-sintered silicon carbide (NTSIC), which has two times higher strength than sintered SiC, is one of the most promising candidates for lightweight optical mirror substrate, because of fully dense, lightweight, small sintering shrinkage (+/-1 %), good shape capability and low processing temperature. In this study, 650mm in diameter mirror substrate of NTSIC was developed for space telescope applications. Three developed points describe below. The first point was to realize the lightweight to thin the thickness of green bodies. Ribs down to 3mm thickness can be obtained by strengthen the green body. The second point was to enlarge the mirror size. 650mm in diameter of mirror substrate can be fabricated with enlarging the diameter in order. The final point was to realize the homogeneity of mirror substrate. Some properties, such as density, bending strength, coefficient of thermal expansion, Young's modulus, Poisson's ratio, fracture toughness, were measured by the test pieces cutting from the fabricated mirror substrates.

Silicon accumulation and distribution in petunia and sunflower

USDA-ARS?s Scientific Manuscript database

Silicon (Si) is a beneficial element that has been shown to protect plants during periods of abiotic and biotic stress. Plant-available Si can be supplied through substrate components, substrate amendments, liquid fertilization, or foliar sprays. The objective of this study was to compare Si accum...

Microdynamic Devices Fabricated on Silicon-On-Sapphire Substrates.

DTIC Science & Technology

Silicon-on-sapphire substrates are provided for the fabrication of micromechanical devices, such as micromotors . The high voltage stand-off...a consequence, the electrostatically driven devices, micromotors , can be incorporated in the integrated circuits and yet be powered at elevated voltages to increase their work potential.

Method of forming silicon structures with selectable optical characteristics

NASA Technical Reports Server (NTRS)

Fathauer, Robert W. (Inventor); Schowalter, Leo (Inventor)

1993-01-01

Silicon and metal are coevaporated onto a silicon substrate in a molecular beam epitaxy system with a larger than stoichiometric amount of silicon so as to epitaxially grow particles of metal silicide embedded in a matrix of single crystal epitaxially grown silicon. The particles interact with incident photons by resonant optical absorption at the surface plasmon resonance frequency. Controlling the substrate temperature and deposition rate and time allows the aspect ratio of the particles to be tailored to desired wavelength photons and polarizations. The plasmon energy may decay as excited charge carriers or phonons, either of which can be monitored to indicate the amount of incident radiation at the selected frequency and polarization.

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Mcwright, G.

1981-01-01

The properties of semiconductor-clad optical waveguides based on glass substrates were investigated. Computer modeling studies on four-layer silicon-clad planar dielectric waveguides indicated that the attenuation and mode index should behave as exponentially damped sinusoids as the silicon thickness is decreased below one micrometer. This effect can be explained as a periodic coupling between the guided modes of the lossless structure and the lossy modes supported by the high refractive index silicon. The computer studies also show that both the attenuation and mode index of the propagating mode are significantly altered by conductivity charges in the silicon. Silicon claddings were RF sputtered onto AgNO3-NaNO3 ion exchanged waveguides and preliminary measurements of attenuation were made. An expression was developed which predicts the attenuation of the silicon clad waveguide from the attenuation and phase characteristics of a silicon waveguide. Several applications of these clad waveguides are suggested and methods for increasing the photo response of the RF sputtered silicon films are described.

Tribology study of reduced graphene oxide sheets on silicon substrate synthesized via covalent assembly.

PubMed

Ou, Junfei; Wang, Jinqing; Liu, Sheng; Mu, Bo; Ren, Junfang; Wang, Honggang; Yang, Shengrong

2010-10-19

Reduced graphene oxide (RGO) sheets were covalently assembled onto silicon wafers via a multistep route based on the chemical adsorption and thermal reduction of graphene oxide (GO). The formation and microstructure of RGO were analyzed by X-ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR-FTIR) spectroscopy, Raman spectroscopy, and water contact angle (WCA) measurements. Characterization by atomic force microscopy (AFM) was performed to evaluate the morphology and microtribological behaviors of the samples. Macrotribological performance was tested on a ball-on-plate tribometer. Results show that the assembled RGO possesses good friction reduction and antiwear ability, properties ascribed to its intrinsic structure, that is, the covalent bonding to the substrate and self-lubricating property of RGO.

Black silicon solar cell: analysis optimization and evolution towards a thinner and flexible future.

PubMed

Roy, Arijit Bardhan; Dhar, Arup; Choudhuri, Mrinmoyee; Das, Sonali; Hossain, S Minhaz; Kundu, Avra

2016-07-29

Analysis and optimization of silicon nano-structured geometry (black silicon) for photovoltaic applications has been reported. It is seen that a unique class of geometry: micro-nanostructure has the potential to find a balance between the conflicting interests of reduced reflection for wide angles of incidence, reduced surface area enhancement due to the nano-structuring of the substrate and reduced material wastage due to the etching of the silicon substrate to realize the geometry itself. It is established that even optimally designed micro-nanostructures would not be useful for conventional wafer based approaches. The work presents computational studies on how such micro-nanostructures are more potent for future ultra-thin monocrystalline silicon absorbers. For such ultra-thin absorbers, the optimally designed micro-nanostructures provide additional advantages of advanced light management capabilities as it behaves as a lossy 2D photonic crystal making the physically thin absorber optically thick along with the ability to collect photo-generated carriers orthogonal to the direction of light (radial junction) for unified photon-electron harvesting. Most significantly, the work answers the key question on how thin the monocrystalline solar absorber should be so that optimum micro-nanostructure would be able to harness the incident photons ensuring proper collection so as to reach the well-known Shockley-Queisser limit of solar cells. Flexible ultra-thin monocrystalline silicon solar cells have been fabricated using nanosphere lithography and MacEtch technique along with a synergistic association of crystalline and amorphous silicon technologies to demonstrate its physical and technological flexibilities. The outcomes are relevant so that nanotechnology may be seamlessly integrated into the technology roadmap of monocrystalline silicon solar cells as the silicon thickness should be significantly reduced without compromising the efficiency within the next decade.

Method of manufacturing a hybrid emitter all back contact solar cell

DOEpatents

Loscutoff, Paul; Rim, Seung

2017-02-07

A method of manufacturing an all back contact solar cell which has a hybrid emitter design. The solar cell has a thin dielectric layer formed on a backside surface of a single crystalline silicon substrate. One emitter of the solar cell is made of doped polycrystalline silicon that is formed on the thin dielectric layer. A second emitter of the solar cell is formed in the single crystalline silicon substrate and is made of doped single crystalline silicon. The method further includes forming contact holes that allow metal contacts to connect to corresponding emitters.

Method of fabricating germanium and gallium arsenide devices

NASA Technical Reports Server (NTRS)

Jhabvala, Murzban (Inventor)

1990-01-01

A method of semiconductor diode fabrication is disclosed which relies on the epitaxial growth of a precisely doped thickness layer of gallium arsenide or germanium on a semi-insulating or intrinsic substrate, respectively, of gallium arsenide or germanium by either molecular beam epitaxy (MBE) or by metal-organic chemical vapor deposition (MOCVD). The method involves: depositing a layer of doped or undoped silicon dioxide on a germanium or gallium arsenide wafer or substrate, selectively removing the silicon dioxide layer to define one or more surface regions for a device to be fabricated thereon, growing a matched epitaxial layer of doped germanium or gallium arsenide of an appropriate thickness using MBE or MOCVD techniques on both the silicon dioxide layer and the defined one or more regions; and etching the silicon dioxide and the epitaxial material on top of the silicon dioxide to leave a matched epitaxial layer of germanium or gallium arsenide on the germanium or gallium arsenide substrate, respectively, and upon which a field effect device can thereafter be formed.

Deep level transient spectroscopic investigation of phosphorus-doped silicon by self-assembled molecular monolayers.

PubMed

Gao, Xuejiao; Guan, Bin; Mesli, Abdelmadjid; Chen, Kaixiang; Dan, Yaping

2018-01-09

It is known that self-assembled molecular monolayer doping technique has the advantages of forming ultra-shallow junctions and introducing minimal defects in semiconductors. In this paper, we report however the formation of carbon-related defects in the molecular monolayer-doped silicon as detected by deep-level transient spectroscopy and low-temperature Hall measurements. The molecular monolayer doping process is performed by modifying silicon substrate with phosphorus-containing molecules and annealing at high temperature. The subsequent rapid thermal annealing drives phosphorus dopants along with carbon contaminants into the silicon substrate, resulting in a dramatic decrease of sheet resistance for the intrinsic silicon substrate. Low-temperature Hall measurements and secondary ion mass spectrometry indicate that phosphorus is the only electrically active dopant after the molecular monolayer doping. However, during this process, at least 20% of the phosphorus dopants are electrically deactivated. The deep-level transient spectroscopy shows that carbon-related defects are responsible for such deactivation.

Microfabricated instrument for tissue biopsy and analysis

DOEpatents

Krulevitch, Peter A.; Lee, Abraham P.; Northrup, M. Allen; Benett, William J.

2001-01-01

A microfabricated biopsy/histology instrument which has several advantages over the conventional procedures, including minimal specimen handling, smooth cutting edges with atomic sharpness capable of slicing very thin specimens (approximately 2 .mu.m or greater), micro-liter volumes of chemicals for treating the specimens, low cost, disposable, fabrication process which renders sterile parts, and ease of use. The cutter is a "cheese-grater" style design comprising a block or substrate of silicon and which uses anisotropic etching of the silicon to form extremely sharp and precise cutting edges. As a specimen is cut, it passes through the silicon cutter and lies flat on a piece of glass which is bonded to the cutter. Microchannels are etched into the glass or silicon substrates for delivering small volumes of chemicals for treating the specimen. After treatment, the specimens can be examined through the glass substrate.

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

PubMed Central

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Gyoo Kim, In; Hyuk Oh, Jin; Ae Kim, Sun; Park, Jaegyu; Kim, Sanggi

2015-01-01

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications. PMID:26061463

Bonding and Integration Technologies for Silicon Carbide Based Injector Components

NASA Technical Reports Server (NTRS)

Halbig, Michael C.; Singh, Mrityunjay

2008-01-01

Advanced ceramic bonding and integration technologies play a critical role in the fabrication and application of silicon carbide based components for a number of aerospace and ground based applications. One such application is a lean direct injector for a turbine engine to achieve low NOx emissions. Ceramic to ceramic diffusion bonding and ceramic to metal brazing technologies are being developed for this injector application. For the diffusion bonding, titanium interlayers (PVD and foils) were used to aid in the joining of silicon carbide (SiC) substrates. The influence of such variables as surface finish, interlayer thickness (10, 20, and 50 microns), processing time and temperature, and cooling rates were investigated. Microprobe analysis was used to identify the phases in the bonded region. For bonds that were not fully reacted an intermediate phase, Ti5Si3Cx, formed that is thermally incompatible in its thermal expansion and caused thermal stresses and cracking during the processing cool-down. Thinner titanium interlayers and/or longer processing times resulted in stable and compatible phases that did not contribute to microcracking and resulted in an optimized microstructure. Tensile tests on the joined materials resulted in strengths of 13-28 MPa depending on the SiC substrate material. Non-destructive evaluation using ultrasonic immersion showed well formed bonds. For the joining technology of brazing Kovar fuel tubes to silicon carbide, preliminary development of the joining approach has begun. Various technical issues and requirements for the injector application are addressed.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1988-04-20

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissipative layer of silicon nitride between a silicon substrate and the active device. Free carriers generated in the substrate are dissipated by the layer before they can build up charge on the active device. 1 fig.

Multifunctional epitaxial systems on silicon substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singamaneni, Srinivasa Rao, E-mail: ssingam@ncsu.edu; Materials Science Division, Army Research Office, Research Triangle Park, North Carolina 27709; Department of Physics, The University of Texas at El Paso, El Paso, Texas 79968

2016-09-15

Multifunctional heterostructures can exhibit a wide range of functional properties, including colossal magneto-resistance, magnetocaloric, and multiferroic behavior, and can display interesting physical phenomena including spin and charge ordering and strong spin-orbit coupling. However, putting this functionality to work remains a challenge. To date, most of the work reported in the literature has dealt with heterostructures deposited onto closely lattice matched insulating substrates such as DyScO{sub 3}, SrTiO{sub 3} (STO), or STO buffered Si(100) using concepts of lattice matching epitaxy (LME). However, strain in heterostructures grown by LME is typically not fully relaxed and the layers contain detrimental defects such asmore » threading dislocations that can significantly degrade the physical properties of the films and adversely affect the device characteristics. In addition, most of the substrates are incompatible with existing CMOS-based technology, where Si (100) substrates dominate. This review discusses recent advances in the integration of multifunctional oxide and non-oxide materials onto silicon substrates. An alternative thin film growth approach, called “domain matching epitaxy,” is presented which identifies approaches for minimizing lattice strain and unwanted defects in large misfit systems (7%–25% and higher). This approach broadly allows for the integration of multifunctional materials onto silicon substrates, such that sensing, computation, and response functions can be combined to produce next generation “smart” devices. In general, pulsed laser deposition has been used to epitaxially grow these materials, although the concepts developed here can be extended to other deposition techniques, as well. It will be shown that TiN and yttria-stabilized zirconia template layers provide promising platforms for the integration of new functionality into silicon-based computer chips. This review paper reports on a number of thin-film heterostructure systems that span a variety of ferroelectric, multiferroic, magnetic, photocatalytic, and smart materials. Their properties have been extensively investigated and their functionality found to be comparable to films grown on single-crystal oxide substrates previously reported by researchers in this field. In addition, this review explores the utility of using laser processing to introduce stable defects in a controlled way and induce magnetism and engineer the optical and electrical properties of nonmagnetic oxides such as BaTiO{sub 3}, VO{sub 2}, NiO, and TiO{sub 2} as an alternative for incorporating additional magnetic and conducting layers into the structure. These significant materials advancements herald a flurry of exciting new advances in CMOS-compatible multifunctional devices.« less

Crystallization and growth of Ni-Si alloy thin films on inert and on silicon substrates

NASA Astrophysics Data System (ADS)

Grimberg, I.; Weiss, B. Z.

1995-04-01

The crystallization kinetics and thermal stability of NiSi2±0.2 alloy thin films coevaporated on two different substrates were studied. The substrates were: silicon single crystal [Si(100)] and thermally oxidized silicon single crystal. In situ resistance measurements, transmission electron microscopy, x-ray diffraction, Auger electron spectroscopy, and Rutherford backscattering spectroscopy were used. The postdeposition microstructure consisted of a mixture of amorphous and crystalline phases. The amorphous phase, independent of the composition, crystallizes homogeneously to NiSi2 at temperatures lower than 200 °C. The activation energy, determined in the range of 1.4-2.54 eV, depends on the type of the substrate and on the composition of the alloyed films. The activation energy for the alloys deposited on the inert substrate was found to be lower than for the alloys deposited on silicon single crystal. The lowest activation energy was obtained for nonstoichiometric NiSi2.2, the highest for NiSi2—on both substrates. The crystallization mode depends on the structure of the as-deposited films, especially the density of the existing crystalline nuclei. Substantial differences were observed in the thermal stability of the NiSi2 compound on both substrates. With the alloy films deposited on the Si substrate, only the NiSi2 phase was identified after annealing to temperatures up to 800 °C. In the films deposited on the inert substrate, NiSi and NiSi2 phases were identified when the Ni content in the alloy exceeded 33 at. %. The effects of composition and the type of substrate on the crystallization kinetics and thermal stability are discussed.

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Schwank, James R.; Fleetwood, Daniel M.; Shaneyfelt, Marty R.; Winokur, Peter S.; Devine, Roderick A. B.

1998-01-01

A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.

The Growth of Expitaxial GaAs and GaAlAs on Silicon Substrates by OMVPE

DTIC Science & Technology

1988-08-01

structures have been grown on semi-insulating gallium arsenide substrates, and on high-resistivity silicon substrates using a two stage growth technique...fully in Quarter 9. 2. MATERIALS GROWTH 2.1 DOPING OF GALLIUM ARSENIDE FOR FETs As reported in quarter 7, doping levels for GaAs/SI 4ere found to be a...FET structures on both GaAs and Si substrates. A number of FET layers have been grown to the GAT4 specification on semi-insulating gallium arsenide

Meniscus-force-mediated layer transfer technique using single-crystalline silicon films with midair cavity: Application to fabrication of CMOS transistors on plastic substrates

NASA Astrophysics Data System (ADS)

Sakaike, Kohei; Akazawa, Muneki; Nakagawa, Akitoshi; Higashi, Seiichiro

2015-04-01

A novel low-temperature technique for transferring a silicon-on-insulator (SOI) layer with a midair cavity (supported by narrow SiO2 columns) by meniscus force has been proposed, and a single-crystalline Si (c-Si) film with a midair cavity formed in dog-bone shape was successfully transferred to a poly(ethylene terephthalate) (PET) substrate at its heatproof temperature or lower. By applying this proposed transfer technique, high-performance c-Si-based complementary metal-oxide-semiconductor (CMOS) transistors were successfully fabricated on the PET substrate. The key processes are the thermal oxidation and subsequent hydrogen annealing of the SOI layer on the midair cavity. These processes ensure a good MOS interface, and the SiO2 layer works as a “blocking” layer that blocks contamination from PET. The fabricated n- and p-channel c-Si thin-film transistors (TFTs) on the PET substrate showed field-effect mobilities of 568 and 103 cm2 V-1 s-1, respectively.

X-ray characterization of Ge dots epitaxially grown on nanostructured Si islands on silicon-on-insulator substrates.

PubMed

Zaumseil, Peter; Kozlowski, Grzegorz; Yamamoto, Yuji; Schubert, Markus Andreas; Schroeder, Thomas

2013-08-01

On the way to integrate lattice mismatched semiconductors on Si(001), the Ge/Si heterosystem was used as a case study for the concept of compliant substrate effects that offer the vision to be able to integrate defect-free alternative semiconductor structures on Si. Ge nanoclusters were selectively grown by chemical vapour deposition on Si nano-islands on silicon-on-insulator (SOI) substrates. The strain states of Ge clusters and Si islands were measured by grazing-incidence diffraction using a laboratory-based X-ray diffraction technique. A tensile strain of up to 0.5% was detected in the Si islands after direct Ge deposition. Using a thin (∼10 nm) SiGe buffer layer between Si and Ge the tensile strain increases to 1.8%. Transmission electron microscopy studies confirm the absence of a regular grid of misfit dislocations in such structures. This clear experimental evidence for the compliance of Si nano-islands on SOI substrates opens a new integration concept that is not only limited to Ge but also extendable to semiconductors like III-V and II-VI materials.

Paper based Flexible and Conformal SERS Substrate for Rapid Trace Detection on Real-world Surfaces

NASA Astrophysics Data System (ADS)

Singamaneni, Srikanth; Lee, Chang; Tian, Limei

2011-03-01

One of the important but often overlooked considerations in the design of surface enhanced Raman scattering (SERS) substrates for trace detection is the efficiency of sample collection. Conventional designs based on rigid substrates such as silicon, alumina, and glass resist conformal contact with the surface under investigation, making the sample collection inefficient. We demonstrate a novel SERS substrate based on common filter paper adsorbed with gold nanorods, which allows conformal contact with real-world surfaces, thus dramatically enhancing the sample collection efficiency compared to conventional rigid substrates. We demonstrate the detection of trace amounts of analyte (140 pg spread over 4 cm2) by simply swabbing the surface under investigation with the novel SERS substrate. The hierarchical fibrous structure of paper serves as a 3D vasculature for easy uptake and transport of the analytes to the electromagnetic hot spots in the paper. Simple yet highly efficient and cost effective SERS substrate demonstrated here brings SERS based trace detection closer to real-world applications. We acknowledge the financial support from Center for Materials Innovation at Washington University.

Hybrid Quantum Cascade Lasers on Silicon-on-Sapphire

DTIC Science & Technology

2016-11-23

on-SOS devices mounted on a copper heat sink. The liquid crystal thermal absorber is attached to block mid-IR emission from any sections of the laser...directions. 2. Statement of the problem studied Short-wavelength infrared (SWIR, ~1-3 m) photonics systems based on silicon-on- insulator (SOI...Table 1. Layer type Layer thickness and doping Thickness (nm) Doping (cm-3) InP substrate 350000 Semi- insulating InP buffer layer 2000 2.00E

Metal organic chemical vapor deposition of 111-v compounds on silicon

DOEpatents

Vernon, Stanley M.

1986-01-01

Expitaxial composite comprising thin films of a Group III-V compound semiconductor such as gallium arsenide (GaAs) or gallium aluminum arsenide (GaAlAs) on single crystal silicon substrates are disclosed. Also disclosed is a process for manufacturing, by chemical deposition from the vapor phase, epitaxial composites as above described, and to semiconductor devices based on such epitaxial composites. The composites have particular utility for use in making light sensitive solid state solar cells.

Droop-free Al_xGa_1-xN/Al_yGa_1-yN quantum-disks-in-nanowires ultraviolet LED emitting at 337 nm on metal/silicon substrates.

PubMed

Janjua, Bilal; Sun, Haiding; Zhao, Chao; Anjum, Dalaver H; Priante, Davide; Alhamoud, Abdullah A; Wu, Feng; Li, Xiaohang; Albadri, Abdulrahman M; Alyamani, Ahmed Y; El-Desouki, Munir M; Ng, Tien Khee; Ooi, Boon S

2017-01-23

Currently the AlGaN-based ultraviolet (UV) solid-state lighting research suffers from numerous challenges. In particular, low internal quantum efficiency, low extraction efficiency, inefficient doping, large polarization fields, and high dislocation density epitaxy constitute bottlenecks in realizing high power devices. Despite the clear advantage of quantum-confinement nanostructure, it has not been widely utilized in AlGaN-based nanowires. Here we utilize the self-assembled nanowires (NWs) with embedding quantum-disks (Qdisks) to mitigate these issues, and achieve UV emission of 337 nm at 32 A/cm² (80 mA in 0.5 × 0.5 mm² device), a turn-on voltage of ~5.5 V and droop-free behavior up to 120 A/cm² of injection current. The device was grown on a titanium-coated n-type silicon substrate, to improve current injection and heat dissipation. A narrow linewidth of 11.7 nm in the electroluminescence spectrum and a strong wavefunctions overlap factor of 42% confirm strong quantum confinement within uniformly formed AlGaN/AlGaN Qdisks, verified using transmission electron microscopy (TEM). The nitride-based UV nanowires light-emitting diodes (NWs-LEDs) grown on low cost and scalable metal/silicon template substrate, offers a scalable, environment friendly and low cost solution for numerous applications, such as solid-state lighting, spectroscopy, medical science and security.

A continuous silicon-coating facility

NASA Technical Reports Server (NTRS)

Butter, C.; Heaps, J. D.

1979-01-01

Automatic continuous silicon-coating facility is used to process 100 by 10 cm graphite-coated ceramic substrates for silicon solar cells. Process reduces contamination associated with conventional dip-coating processes, improving material service life.

Gray scale x-ray mask

DOEpatents

Morales, Alfredo M [Livermore, CA; Gonzales, Marcela [Seattle, WA

2006-03-07

The present invention describes a method for fabricating an embossing tool or an x-ray mask tool, providing microstructures that smoothly vary in height from point-to-point in etched substrates, i.e., structure which can vary in all three dimensions. The process uses a lithographic technique to transfer an image pattern in the surface of a silicon wafer by exposing and developing the resist and then etching the silicon substrate. Importantly, the photoresist is variably exposed so that when developed some of the resist layer remains. The remaining undeveloped resist acts as an etchant barrier to the reactive plasma used to etch the silicon substrate and therefore provides the ability etch structures of variable depths.

Designed porosity materials in nuclear reactor components

DOEpatents

Yacout, A. M.; Pellin, Michael J.; Stan, Marius

2016-09-06

A nuclear fuel pellet with a porous substrate, such as a carbon or tungsten aerogel, on which at least one layer of a fuel containing material is deposited via atomic layer deposition, and wherein the layer deposition is controlled to prevent agglomeration of defects. Further, a method of fabricating a nuclear fuel pellet, wherein the method features the steps of selecting a porous substrate, depositing at least one layer of a fuel containing material, and terminating the deposition when the desired porosity is achieved. Also provided is a nuclear reactor fuel cladding made of a porous substrate, such as silicon carbide aerogel or silicon carbide cloth, upon which layers of silicon carbide are deposited.

VLED for Si wafer-level packaging

NASA Astrophysics Data System (ADS)

Chu, Chen-Fu; Chen, Chiming; Yen, Jui-Kang; Chen, Yung-Wei; Tsou, Chingfu; Chang, Chunming; Doan, Trung; Tran, Chuong Anh

2012-03-01

In this paper, we introduced the advantages of Vertical Light emitting diode (VLED) on copper alloy with Si-wafer level packaging technologies. The silicon-based packaging substrate starts with a <100> dou-ble-side polished p-type silicon wafer, then anisotropic wet etching technology is done to construct the re-flector depression and micro through-holes on the silicon substrate. The operating voltage, at a typical cur-rent of 350 milli-ampere (mA), is 3.2V. The operation voltage is less than 3.7V under higher current driving conditions of 1A. The VLED chip on Si package has excellent heat dissipation and can be operated at high currents up to 1A without efficiency degradation. The typical spatial radiation pattern emits a uniform light lambertian distribution from -65° to 65° which can be easily fit for secondary optics. The correlated color temperature (CCT) has only 5% variation for daylight and less than 2% variation for warm white, when the junction temperature is increased from 25°C to 110°C, suggesting a stable CCT during operation for general lighting application. Coupled with aspheric lens and micro lens array in a wafer level process, it has almost the same light distribution intensity for special secondary optics lighting applications. In addition, the ul-tra-violet (UV) VLED, featuring a silicon substrate and hard glass cover, manufactured by wafer level pack-aging emits high power UV wavelengths appropriate for curing, currency, document verification, tanning, medical, and sterilization applications.

Measurements of Elastic Moduli of Silicone Gel Substrates with a Microfluidic Device

PubMed Central

Gutierrez, Edgar; Groisman, Alex

2011-01-01

Thin layers of gels with mechanical properties mimicking animal tissues are widely used to study the rigidity sensing of adherent animal cells and to measure forces applied by cells to their substrate with traction force microscopy. The gels are usually based on polyacrylamide and their elastic modulus is measured with an atomic force microscope (AFM). Here we present a simple microfluidic device that generates high shear stresses in a laminar flow above a gel-coated substrate and apply the device to gels with elastic moduli in a range from 0.4 to 300 kPa that are all prepared by mixing two components of a transparent commercial silicone Sylgard 184. The elastic modulus is measured by tracking beads on the gel surface under a wide-field fluorescence microscope without any other specialized equipment. The measurements have small and simple to estimate errors and their results are confirmed by conventional tensile tests. A master curve is obtained relating the mixing ratios of the two components of Sylgard 184 with the resulting elastic moduli of the gels. The rigidity of the silicone gels is less susceptible to effects from drying, swelling, and aging than polyacrylamide gels and can be easily coated with fluorescent tracer particles and with molecules promoting cellular adhesion. This work can lead to broader use of silicone gels in the cell biology laboratory and to improved repeatability and accuracy of cell traction force microscopy and rigidity sensing experiments. PMID:21980487

Self-catalyzed GaAs nanowires on silicon by hydride vapor phase epitaxy.

PubMed

Dong, Zhenning; André, Yamina; Dubrovskii, Vladimir G; Bougerol, Catherine; Leroux, Christine; Ramdani, Mohammed R; Monier, Guillaume; Trassoudaine, Agnès; Castelluci, Dominique; Gil, Evelyne

2017-03-24

Gold-free GaAs nanowires on silicon substrates can pave the way for monolithic integration of photonic nanodevices with silicon electronic platforms. It is extensively documented that the self-catalyzed approach works well in molecular beam epitaxy but is much more difficult to implement in vapor phase epitaxies. Here, we report the first gallium-catalyzed hydride vapor phase epitaxy growth of long (more than 10 μm) GaAs nanowires on Si(111) substrates with a high integrated growth rate up to 60 μm h -1 and pure zincblende crystal structure. The growth is achieved by combining a low temperature of 600 °C with high gaseous GaCl/As flow ratios to enable dechlorination and formation of gallium droplets. GaAs nanowires exhibit an interesting bottle-like shape with strongly tapered bases, followed by straight tops with radii as small as 5 nm. We present a model that explains the peculiar growth mechanism in which the gallium droplets nucleate and rapidly swell on the silicon surface but then are gradually consumed to reach a stationary size. Our results unravel the necessary conditions for obtaining gallium-catalyzed GaAs nanowires by vapor phase epitaxy techniques.

Observations of Ball-Lightning-Like Plasmoids Ejected from Silicon by Localized Microwaves

PubMed Central

Meir, Yehuda; Jerby, Eli; Barkay, Zahava; Ashkenazi, Dana; Mitchell, James Brian; Narayanan, Theyencheri; Eliaz, Noam; LeGarrec, Jean-Luc; Sztucki, Michael; Meshcheryakov, Oleg

2013-01-01

This paper presents experimental characterization of plasmoids (fireballs) obtained by directing localized microwave power (<1 kW at 2.45 GHz) onto a silicon-based substrate in a microwave cavity. The plasmoid emerges up from the hotspot created in the solid substrate into the air within the microwave cavity. The experimental diagnostics employed for the fireball characterization in this study include measurements of microwave scattering, optical spectroscopy, small-angle X-ray scattering (SAXS), scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDS). Various characteristics of these plasmoids as dusty plasma are drawn by a theoretical analysis of the experimental observations. Aggregations of dust particles within the plasmoid are detected at nanometer and micrometer scales by both in-situ SAXS and ex-situ SEM measurements. The resemblance of these plasmoids to the natural ball-lightning (BL) phenomenon is discussed with regard to silicon nano-particle clustering and formation of slowly-oxidized silicon micro-spheres within the BL. Potential applications and practical derivatives of this study (e.g., direct conversion of solids to powders, material identification by breakdown spectroscopy (MIBS), thermite ignition, and combustion) are discussed. PMID:28788315

Hybrid metasurface for ultra-broadband terahertz modulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Heyes, Jane E.; Withayachumnankul, Withawat; Grady, Nathaniel K.

2014-11-05

We demonstrate an ultra-broadband free-space terahertz modulator based on a semiconductor-integrated metasurface. The modulator is made of a planar array of metal cut-wires on a silicon-on-sapphire substrate, where the silicon layer functions as photoconductive switches. Without external excitation, the cut-wire array exhibits a Lorentzian resonant response with a transmission passband spanning dc up to the fundamental dipole resonance above 2 THz. Under photoexcitation with 1.55 eV near-infrared light, the silicon regions in the cut-wire gaps become highly conductive, causing a transition of the resonant metasurface to a wire grating with a Drude response. In effect, the low-frequency passband below 2more » THz evolves into a stopband for the incident terahertz waves. Experimental validations confirm a bandwidth of at least 100%, spanning 0.5 to 1.5 THz with -10 dB modulation depth. This modulation depth is far superior to -5 dB achievable from a plain silicon-on-sapphire substrate with effectively 25 times higher pumping energy. The proposed concept of ultra-broadband metasurface modulator can be readily extended to electrically controlled terahertz wave modulation.« less

Single and multijunction silicon based thin film solar cells on a flexible substrate with absorber layers made by hot-wire CVD

NASA Astrophysics Data System (ADS)

Li, Hongbo

2007-09-01

With the worldwide growing concern about reliable energy supply and the environmental problems of fossil and nuclear energy production, the need for clean and sustainable energy sources is evident. Solar energy conversion, such as in photovoltaic systems, can play a major role in the urgently needed energy transition in electricity production. Solar cells based on thin film silicon and its alloys are a promising candidate that is capable of fulfilling the fast increasing demand of a reliable solar cell supply. The conventional method to deposit silicon thin films is based on plasma enhanced chemical vapour deposition (PECVD) techniques, which have the disadvantage of increasing film inhomogeneity at a high deposition rate when scaling up for the industrial production. In this thesis, we study the possibility of making high efficiency single and multijunction thin film silicon solar cells with the so-called hot-wire CVD technique, in which no strong electromagnetic field is involved in the deposition. Therefore, the up-scaling for industrial production is straightforward. We report and discuss our findings on the correlation of substrate surface rms roughness and the main output parameter of a solar cell, the open circuit voltage Voc of c-Si:H n i p cells. By considering all the possible reasons that could influence the Voc of such cells, we conclude that the near linear correlation of Voc and substrate surface rms roughness is the result the two most probable reasons: the unintentional doping through the cracks originated near the valleys of the substrate surface due to the in-diffusion of impurities, and the high density electrical defects formed by the collision of columnar silicon structures. Both of them relate to the morphology of substrate surface. Therefore, to have the best cell performance on a rough substrate surface, a good control on the substrate surface morphology is necessary. Another issue influencing the performance of c-Si:H solar cells is the change in layer crystallinity during the growth of the c-Si:H i-layer. For PECVD deposited cells, it is often found that the layer crystallinity is enhanced with increasing film thickness. We found for Hot-wire deposited cells, however, the opposite development in material structure: the material becomes amorphous near the end of the deposition. This results in a deterioration of cell performance. We therefore introduce a so-called H2 reverse profiling technique, in which H2 is increased during the c-Si:H i-layer deposition. With this technique, a cell with an efficiency of 8.5% has been reached, which is in line with the best reported PECVD cells deposited on the same type of substrate. In the literature, carrier transport in c-Si:H cells has been a topic for debate. In this thesis, we present our finding of photogating effect on the spectral response of c-Si:H solar cells. When measured under coloured bias light, the apparent quantum efficiency value of a c-Si:H cell can be largely enhanced. This phenomenon is a typical result of trapping induced field modification in the bulk of a drift type solar cell. The discovery of this phenomenon has experimentally proved that field-driven transport to a large extend exist in a c-Si:H solar cell.

Evanescent Microwave Probes on High-Resistivity Silicon and its Application in Characterization of Semiconductors

NASA Technical Reports Server (NTRS)

Tabib-Azar, M.; Akinwande, D.; Ponchak, George E.; LeClair, S. R.

1999-01-01

In this article we report the design, fabrication, and characterization of very high quality factor 10 GHz microstrip resonators on high-resistivity (high-rho) silicon substrates. Our experiments show that an external quality factor of over 13 000 can be achieved on microstripline resonators on high-rho silicon substrates. Such a high Q factor enables integration of arrays of previously reported evanescent microwave probe (EMP) on silicon cantilever beams. We also demonstrate that electron-hole pair recombination and generation lifetimes of silicon can be conveniently measured by illuminating the resonator using a pulsed light. Alternatively, the EMP was also used to nondestructively monitor excess carrier generation and recombination process in a semiconductor placed near the two-dimensional resonator.

Preparation of Macroporous Epitaxial Quartz Films on Silicon by Chemical Solution Deposition.

PubMed

Carretero-Genevrier, Adrián; Gich, Martí

2015-12-21

This work describes the detailed protocol for preparing piezoelectric macroporous epitaxial quartz films on silicon(100) substrates. This is a three-step process based on the preparation of a sol in a one-pot synthesis which is followed by the deposition of a gel film on Si(100) substrates by evaporation induced self-assembly using the dip-coating technique and ends with a thermal treatment of the material to induce the gel crystallization and the growth of the quartz film. The formation of a silica gel is based on the reaction of a tetraethyl orthosilicate and water, catalyzed by HCl, in ethanol. However, the solution contains two additional components that are essential for preparing mesoporous epitaxial quartz films from these silica gels dip-coated on Si. Alkaline earth ions, like Sr(2+) act as glass melting agents that facilitate the crystallization of silica and in combination with cetyl trimethylammonium bromide (CTAB) amphiphilic template form a phase separation responsible of the macroporosity of the films. The good matching between the quartz and silicon cell parameters is also essential in the stabilization of quartz over other SiO2 polymorphs and is at the origin of the epitaxial growth.

Thin film GaP for solar cell application

NASA Astrophysics Data System (ADS)

Morozov, I. A.; Gudovskikh, A. S.; Kudryashov, D. A.; Nikitina, E. V.; Kleider, J.-P.; Myasoedov, A. V.; Levitskiy, V.

2016-08-01

A new approach to the silicon based heterostructures technology consisting of the growth of III-V compounds (GaP) on a silicon substrate by low-temperature plasma enhanced atomic layer deposition (PE-ALD) is proposed. The basic idea of the method is to use a time modulation of the growth process, i.e. time separated stages of atoms or precursors transport to the growing surface, migration over the surface, and crystal lattice relaxation for each monolayer. The GaP layers were grown on Si substrates by PE-ALD at 350°C with phosphine (PH3) and trimethylgallium (TMG) as sources of III and V atoms. Scanning and transmission electron microscopy demonstrate that the grown GaP films have homogeneous amorphous structure, smooth surface and a sharp GaP/Si interface. The GaP/Si heterostructures obtained by PE-ALD compare favourably to that conventionally grown by molecular beam epitaxy (MBE). Indeed, spectroscopic ellipsometry measurements indicate similar interband optical absorption while photoluminescence measurements indicate higher charge carrier effective lifetime. The better passivation properties of GaP layers grown by PE-ALD demonstrate a potential of this technology for new silicon based photovoltaic heterostructure

Preparation of Macroporous Epitaxial Quartz Films on Silicon by Chemical Solution Deposition

PubMed Central

Carretero-Genevrier, Adrián; Gich, Martí

2015-01-01

This work describes the detailed protocol for preparing piezoelectric macroporous epitaxial quartz films on silicon(100) substrates. This is a three-step process based on the preparation of a sol in a one-pot synthesis which is followed by the deposition of a gel film on Si(100) substrates by evaporation induced self-assembly using the dip-coating technique and ends with a thermal treatment of the material to induce the gel crystallization and the growth of the quartz film. The formation of a silica gel is based on the reaction of a tetraethyl orthosilicate and water, catalyzed by HCl, in ethanol. However, the solution contains two additional components that are essential for preparing mesoporous epitaxial quartz films from these silica gels dip-coated on Si. Alkaline earth ions, like Sr2+ act as glass melting agents that facilitate the crystallization of silica and in combination with cetyl trimethylammonium bromide (CTAB) amphiphilic template form a phase separation responsible of the macroporosity of the films. The good matching between the quartz and silicon cell parameters is also essential in the stabilization of quartz over other SiO2 polymorphs and is at the origin of the epitaxial growth. PMID:26710210

Silicon on ceramic process. Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Zook, J. D.; Heaps, J. D.; Maciolek, R. B.; Koepke, B. G.; Butter, C. D.; Schuldt, S. B.

1977-01-01

The technical and economic feasibility of producing solar-cell-quality sheet silicon was investigated. The sheets were made by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Significant progress was made in all areas of the program.

Effects of varying oxygen partial pressure on molten silicon-ceramic substrate interactions

NASA Technical Reports Server (NTRS)

Ownby, D. P.; Barsoum, M. W.

1980-01-01

The silicon sessile drop contact angle was measured on hot pressed silicon nitride, silicon nitride coated on hot pressed silicon nitride, silicon carbon coated on graphite, and on Sialon to determine the degree to which silicon wets these substances. The post-sessile drop experiment samples were sectioned and photomicrographs were taken of the silicon-substrate interface to observe the degree of surface dissolution and degradation. Of these materials, silicon did not form a true sessile drop on the SiC on graphite due to infiltration of the silicon through the SiC coating, nor on the Sialon due to the formation of a more-or-less rigid coating on the liquid silicon. The most wetting was obtained on the coated Si3N4 with a value of 42 deg. The oxygen concentrations in a silicon ribbon furnace and in a sessile drop furnace were measured using the protable thoria-yttria solid solution electrolyte oxygen sensor. Oxygen partial pressures of 10 to the minus 7 power atm and 10 to the minus 8 power atm were obtained at the two facilities. These measurements are believed to represent nonequilibrium conditions.

Detailed characterisation of focused ion beam induced lateral damage on silicon carbide samples by electrical scanning probe microscopy and transmission electron microscopy

NASA Astrophysics Data System (ADS)

Stumpf, F.; Abu Quba, A. A.; Singer, P.; Rumler, M.; Cherkashin, N.; Schamm-Chardon, S.; Cours, R.; Rommel, M.

2018-03-01

The lateral damage induced by focused ion beam on silicon carbide was characterized using electrical scanning probe microscopy (SPM), namely, scanning spreading resistance microscopy and conductive atomic force microscopy (c-AFM). It is shown that the damage exceeds the purposely irradiated circles with a radius of 0.5 μm by several micrometres, up to 8 μm for the maximum applied ion dose of 1018 cm-2. Obtained SPM results are critically compared with earlier findings on silicon. For doses above the amorphization threshold, in both cases, three different areas can be distinguished. The purposely irradiated area exhibits resistances smaller than the non-affected substrate. A second region with strongly increasing resistance and a maximum saturation value surrounds it. The third region shows the transition from maximum resistance to the base resistance of the unaffected substrate. It correlates to the transition from amorphized to defect-rich to pristine crystalline substrate. Additionally, conventional transmission electron microscopy (TEM) and annular dark-field STEM were used to complement and explain the SPM results and get a further understanding of the defect spreading underneath the surface. Those measurements also show three different regions that correlate well with the regions observed from electrical SPM. TEM results further allow to explain observed differences in the electrical results for silicon and silicon carbide which are most prominent for ion doses above 3 × 1016 cm-2. Furthermore, the conventional approach to perform current-voltage measurements by c-AFM was critically reviewed and several improvements for measurement and analysis process were suggested that result in more reliable and impactful c-AFM data.

Fabrication of a 20.5-inch-diameter segmented silicon annular optic prototype for the ROMA program

NASA Astrophysics Data System (ADS)

Hassell, Frank R.; Groark, Frank M.

1995-10-01

Recent advancements in single crystal silicon material science and fabrication capabilities and very low absorption (VLA) multi-layer dielectric coating technology have led to the development of uncooled, large aperture, high power mirrors for high energy laser (HEL) systems. Based on this success, a segmented single-crystal silicon substrate concept has been selected as the baseline fabrication approach for uncooled 1.2 meter diameter resonator annular optics for the Alpha space based high energy laser. The objective of this Resonator Optics Materials Assessment (ROMA) task was to demonstrate all of the key fabrication processes required to fabricate the full sized annular optics for the Alpha space based high energy laser. This paper documents the fabrication of a half-scale annular optic prototype (AOP) of the Alpha laser rear cone.

Patterned microstructures formed with MeV Au implantation in Si(1 0 0)

NASA Astrophysics Data System (ADS)

Rout, Bibhudutta; Greco, Richard R.; Zachry, Daniel P.; Dymnikov, Alexander D.; Glass, Gary A.

2006-09-01

Energetic (MeV) Au implantation in Si(1 0 0) (n-type) through masked micropatterns has been used to create layers resistant to KOH wet etching. Microscale patterns were produced in PMMA and SU(8) resist coatings on the silicon substrates using P-beam writing and developed. The silicon substrates were subsequently exposed using 1.5 MeV Au 3+ ions with fluences as high as 1 × 10 16 ions/cm 2 and additional patterns were exposed using copper scanning electron microscope calibration grids as masks on the silicon substrates. When wet etched with KOH microstructures were created in the silicon due to the resistance to KOH etching cause by the Au implantation. The process of combining the fabrication of masked patterns with P-beam writing with broad beam Au implantation through the masks can be a promising, cost-effective process for nanostructure engineering with Si.

AES study on the chemical composition of ferroelectric BaTiO3 thin films RF sputter-deposited on silicon

NASA Technical Reports Server (NTRS)

Dharmadhikari, V. S.; Grannemann, W. W.

1983-01-01

AES depth profiling data are presented for thin films of BaTiO3 deposited on silicon by RF sputtering. By profiling the sputtered BaTiO3/silicon structures, it was possible to study the chemical composition and the interface characteristics of thin films deposited on silicon at different substrate temperatures. All the films showed that external surface layers were present, up to a few tens of angstroms thick, the chemical composition of which differed from that of the main layer. The main layer had stable composition, whereas the intermediate film-substrate interface consisted of reduced TiO(2-x) oxides. The thickness of this intermediate layer was a function of substrate temperature. All the films showed an excess of barium at the interface. These results are important in the context of ferroelectric phenomena observed in BaTiO3 thin films.

Optical substrate materials for synchrotron radiation beamlines

DOE Office of Scientific and Technical Information (OSTI.GOV)

Howells, M.R.; Paquin, R.A.

1997-06-01

The authors consider the materials choices available for making optical substrates for synchrotron radiation beam lines. They find that currently the optical surfaces can only be polished to the required finish in fused silica and other glasses, silicon, CVD silicon carbide, electroless nickel and 17-4 PH stainless steel. Substrates must therefore be made of one of these materials or of a metal that can be coated with electroless nickel. In the context of material choices for mirrors they explore the issues of dimensional stability, polishing, bending, cooling, and manufacturing strategy. They conclude that metals are best from an engineering andmore » cost standpoint while the ceramics are best from a polishing standpoint. They then give discussions of specific materials as follows: silicon carbide, silicon, electroless nickel, Glidcop{trademark}, aluminum, precipitation-hardening stainless steel, mild steel, invar and superinvar. Finally they summarize conclusions and propose ideas for further research.« less

Stoichiometry of Silicon Dioxide Films Obtained by Ion-Beam Sputtering

NASA Astrophysics Data System (ADS)

Telesh, E. V.; Dostanko, A. P.; Gurevich, O. V.

2018-03-01

The composition of SiOx films produced by ion-beam sputtering (IBS) of silicon and quartz targets were studied by infrared spectrometry. Films with thicknesses of 150-390 nm were formed on silicon substrates. It was found that increase in the partial pressure of oxygen in the working gas, increase in the temperature of the substrate, and the presence of a positive potential on the target during reactive IBS of silicon shifted the main absorption band νas into the high-frequency region and increased the composition index from 1.41 to 1.85. During IBS of a quartz target the stoichiometry of the films deteriorates with increase of the energy of the sputtering argon ions. This may be due to increase of the deposition rate. Increase in the current of the thermionic compensator, increase of the substrate temperature, and addition of oxygen led to the formation of SiOx films with improved stoichiometry.

Method to fabricate silicon chromatographic column comprising fluid ports

DOEpatents

Manginell, Ronald P.; Frye-Mason, Gregory C.; Heller, Edwin J.; Adkins, Douglas R.

2004-03-02

A new method for fabricating a silicon chromatographic column comprising through-substrate fluid ports has been developed. This new method enables the fabrication of multi-layer interconnected stacks of silicon chromatographic columns.

Curvature Control of Silicon Microlens for THz Dielectric Antenna

NASA Technical Reports Server (NTRS)

Lee, Choonsup; Chattopadhyay, Goutam; Cooper, Ken; Mehdi, Imran

2012-01-01

We have controlled the curvature of silicon microlens by changing the amount of photoresist in order to microfabricate hemispherical silicon microlens which can improve the directivity and reduce substrate mode losses.

Micromachined cutting blade formed from {211}-oriented silicon

DOEpatents

Fleming, James G.; Sniegowski, Jeffry J.; Montague, Stephen

2003-09-09

A cutting blade is disclosed fabricated of micromachined silicon. The cutting blade utilizes a monocrystalline silicon substrate having a {211} crystalline orientation to form one or more cutting edges that are defined by the intersection of {211} crystalline planes of silicon with {111} crystalline planes of silicon. This results in a cutting blade which has a shallow cutting-edge angle .theta. of 19.5.degree.. The micromachined cutting blade can be formed using an anisotropic wet etching process which substantially terminates etching upon reaching the {111} crystalline planes of silicon. This allows multiple blades to be batch fabricated on a common substrate and separated for packaging and use. The micromachined cutting blade, which can be mounted to a handle in tension and optionally coated for increased wear resistance and biocompatibility, has multiple applications including eye surgery (LASIK procedure).

Micromachined cutting blade formed from {211}-oriented silicon

DOEpatents

Fleming, James G [Albuquerque, NM; Fleming, legal representative, Carol; Sniegowski, Jeffry J [Tijeras, NM; Montague, Stephen [Albuquerque, NM

2011-08-09

A cutting blade is disclosed fabricated of micromachined silicon. The cutting blade utilizes a monocrystalline silicon substrate having a {211} crystalline orientation to form one or more cutting edges that are defined by the intersection of {211} crystalline planes of silicon with {111} crystalline planes of silicon. This results in a cutting blade which has a shallow cutting-edge angle .theta. of 19.5.degree.. The micromachined cutting blade can be formed using an anisotropic wet etching process which substantially terminates etching upon reaching the {111} crystalline planes of silicon. This allows multiple blades to be batch fabricated on a common substrate and separated for packaging and use. The micromachined cutting blade, which can be mounted to a handle in tension and optionally coated for increased wear resistance and biocompatibility, has multiple applications including eye surgery (LASIK procedure).

MBE growth and optical properties of GaN layers on SiC/Si(111) hybrid substrate

NASA Astrophysics Data System (ADS)

Reznik, R. R.; Kotlyar, K. P.; Soshnikov, I. P.; Kukushkin, S. A.; Osipov, A. V.; Nikitina, E. V.; Cirlin, G. E.

2017-11-01

The fundamental possibility of the growth of GaN layers by molecular-beam epitaxy on a silicon substrate with nanoscale buffer layer of silicon carbide without any AlN layers has been demonstrated for the first time. Morphological properties of the resulting system have been studied.

Wafer scale formation of monocrystalline silicon-based Mie resonators via silicon-on-insulator dewetting.

PubMed

Abbarchi, Marco; Naffouti, Meher; Vial, Benjamin; Benkouider, Abdelmalek; Lermusiaux, Laurent; Favre, Luc; Ronda, Antoine; Bidault, Sébastien; Berbezier, Isabelle; Bonod, Nicolas

2014-11-25

Subwavelength-sized dielectric Mie resonators have recently emerged as a promising photonic platform, as they combine the advantages of dielectric microstructures and metallic nanoparticles supporting surface plasmon polaritons. Here, we report the capabilities of a dewetting-based process, independent of the sample size, to fabricate Si-based resonators over large scales starting from commercial silicon-on-insulator (SOI) substrates. Spontaneous dewetting is shown to allow the production of monocrystalline Mie-resonators that feature two resonant modes in the visible spectrum, as observed in confocal scattering spectroscopy. Homogeneous scattering responses and improved spatial ordering of the Si-based resonators are observed when dewetting is assisted by electron beam lithography. Finally, exploiting different thermal agglomeration regimes, we highlight the versatility of this technique, which, when assisted by focused ion beam nanopatterning, produces monocrystalline nanocrystals with ad hoc size, position, and organization in complex multimers.

Substrate-Influenced Thermo-Mechanical Fatigue of Copper Metallizations: Limits of Stoney’s Equation

PubMed Central

Bigl, Stephan; Wurster, Stefan; Cordill, Megan J.

2017-01-01

Rapid progress in the reduction of substrate thickness for silicon-based microelectronics leads to a significant reduction of the device bending stiffness and the need to address its implication for the thermo-mechanical fatigue behavior of metallization layers. Results on 5 µm thick Cu films reveal a strong substrate thickness-dependent microstructural evolution. Substrates with hs = 323 and 220 µm showed that the Cu microstructure exhibits accelerated grain growth and surface roughening. Moreover, curvature-strain data indicates that Stoney’s simplified curvature-stress relation is not valid for thin substrates with regard to the expected strains, but can be addressed using more sophisticated plate bending theories. PMID:29120407

Identifying suitable substrates for high-quality graphene-based heterostructures

NASA Astrophysics Data System (ADS)

Banszerus, L.; Janssen, H.; Otto, M.; Epping, A.; Taniguchi, T.; Watanabe, K.; Beschoten, B.; Neumaier, D.; Stampfer, C.

2017-06-01

We report on a scanning confocal Raman spectroscopy study investigating the strain-uniformity and the overall strain and doping of high-quality chemical vapour deposited (CVD) graphene-based heterostuctures on a large number of different substrate materials, including hexagonal boron nitride (hBN), transition metal dichalcogenides, silicon, different oxides and nitrides, as well as polymers. By applying a hBN-assisted, contamination free, dry transfer process for CVD graphene, high-quality heterostructures with low doping densities and low strain variations are assembled. The Raman spectra of these pristine heterostructures are sensitive to substrate-induced doping and strain variations and are thus used to probe the suitability of the substrate material for potential high-quality graphene devices. We find that the flatness of the substrate material is a key figure for gaining, or preserving high-quality graphene.

Influence of calcium and silicon supplementation into Pleurotus ostreatus substrates on quality of fresh and canned mushrooms.

PubMed

Thongsook, T; Kongbangkerd, T

2011-08-01

Supplements of gypsum (calcium source), pumice (silicon source) and pumice sulfate (silicon and calcium source) into substrates for oyster mushrooms (Pleurotus ostreatus) were searched for their effects on production as well as qualities of fresh and canned mushrooms. The addition of pumice up to 30% had no effect on total yield, size distribution and cap diameters. The supplementation of gypsum at 10% decreased the total yield; and although gypsum at 5% did not affect total yield, the treatment increased the proportion of large-sized caps. High content (>10%) of pumice sulfate resulted in the lower yield. Calcium and silicon contents in the fruit bodies were not influenced by supplementations. The centrifugal drip loss values and solid content of fresh mushrooms, and the percentage of weight gained and firmness of canned mushrooms, cultivated in substrates supplemented with gypsum, pumice and pumice sulfate were significantly (p≤0.05) higher than those of the control. Scanning electron micrographs revealed the more compacted hyphae of mushroom stalks supplemented with silicon and/or calcium after heat treatment, compared to the control. Supplementation of P. ostreatus substrates with 20% pumice was the most practical treatment because it showed no effect on yield and the most cost-effective.

Oxygen ion-beam microlithography

DOEpatents

Tsuo, Y.S.

1991-08-20

A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used. 5 figures.

Oxygen ion-beam microlithography

DOEpatents

Tsuo, Y. Simon

1991-01-01

A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used.

Silicon nitride protective coatings for silvered glass mirrors

DOEpatents

Tracy, C. Edwin; Benson, David K.

1988-01-01

A protective diffusion barrier for metalized mirror structures is provided by a layer or coating of silicon nitride which is a very dense, transparent, dielectric material that is impervious to water, alkali, and other impurities and corrosive substances that typically attack the metal layers of mirrors and cause degradation of the mirrors' reflectivity. The silicon nitride layer can be deposited on the substrate before metal deposition to stabilize the metal/substrate interface, and it can be deposited over the metal to encapsulate it and protect the metal from corrosion or other degradation. Mirrors coated with silicon nitride according to this invention can also be used as front surface mirrors.

Silicon nitride protective coatings for silvered glass mirrors

DOEpatents

Tracy, C.E.; Benson, D.K.

1984-07-20

A protective diffusion barrier for metalized mirror structures is provided by a layer or coating of silicon nitride which is a very dense, transparent, dielectric material that is impervious to water, alkali, and other impurities and corrosive substances that typically attack the metal layers of mirrors and cause degradation of the mirrors' reflectivity. The silicon nitride layer can be deposited on the substrate prior to metal deposition thereon to stabilize the metal/substrate interface, and it can be deposited over the metal to encapsulate it and protect the metal from corrosion or other degradation. Mirrors coated with silicon nitride according to this invention can also be used as front surface mirrors.

Study of thickness and uniformity of oxide passivation with DI-O3 on silicon substrate for electronic and photonic applications

NASA Astrophysics Data System (ADS)

Sharma, Mamta; Hazra, Purnima; Singh, Satyendra Kumar

2018-05-01

Since the beginning of semiconductor fabrication technology evolution, clean and passivated substrate surface is one of the prime requirements for fabrication of Electronic and optoelectronic device fabrication. However, as the scale of silicon circuits and device architectures are continuously decreased from micrometer to nanometer (from VLSI to ULSI technology), the cleaning methods to achieve better wafer surface qualities has raised research interests. The development of controlled and uniform silicon dioxide is the most effective and reliable way to achieve better wafer surface quality for fabrication of electronic devices. On the other hand, in order to meet the requirement of high environment safety/regulatory standards, the innovation of cleaning technology is also in demand. The controlled silicon dioxide layer formed by oxidant de-ionized ozonated water has better uniformity. As the uniformity of the controlled silicon dioxide layer is improved on the substrate, it enhances the performance of the devices. We can increase the thickness of oxide layer, by increasing the ozone time treatment. We reported first time to measurement of thickness of controlled silicon dioxide layer and obtained the uniform layer for same ozone time.

Micro-chip initiator realized by integrating Al/CuO multilayer nanothermite on polymeric membrane

NASA Astrophysics Data System (ADS)

Taton, G.; Lagrange, D.; Conedera, V.; Renaud, L.; Rossi, C.

2013-10-01

We have developed a new nanothermite based polymeric electro-thermal initiator for non-contact ignition of a propellant. A reactive Al/CuO multilayer nanothermite resides on a 100 µm thick SU-8/PET (polyethyleneterephtalate) membrane to insulate the reactive layer from the silicon bulk substrate. When current is supplied to the initiator, the chemical reaction Al+CuO occurs and sparkles are spread to a distance of several millimeters. A micro-manufacturing process for fabricating the initiator is presented and the electrical behaviors of the ignition elements are also investigated. The characteristics of the initiator made on a 100 µm thick SU-8/PET membrane were compared to two bulk electro-thermal initiators: one on a silicon and one on a Pyrex substrate. The PET devices give 100% of Al/CuO ignition success for an electrical current >250 mA. Glass based reactive initiators give 100% of Al/CuO ignition success for an electrical current >500 mA. Reactive initiators directly on silicon cannot initiate even with a 4 A current. At low currents (<1 A), the initiation time is two orders of magnitude longer for Pyrex initiator compared to those obtained for PET initiator technology. We also observed that, the Al/CuO thermite film on PET membrane reacts within 1 ms (sparkles duration) whereas it reacts within 4 ms on Pyrex. The thermite reaction is 40 times greater in intensity using the PET substrate in comparison to Pyrex.

Silicon-on-ceramic process: Silicon sheet growth and device development for the large-area silicon sheet task of the low-cost solar array project

NASA Technical Reports Server (NTRS)

Whitehead, A. B.; Zook, J. D.; Grung, B. L.; Heaps, J. D.; Schmit, F.; Schuldt, S. B.; Chapman, P. W.

1981-01-01

The technical feasibility of producing solar cell quality sheet silicon to meet the DOE 1986 cost goal of 70 cents/watt was investigated. The silicon on ceramic approach is to coat a low cost ceramic substrate with large grain polycrystalline silicon by unidirectional solidification of molten silicon. Results and accomplishments are summarized.

Fabrication of terahertz metamaterials using electrohydrodynamic jet printing for sensitive detection of yeast

NASA Astrophysics Data System (ADS)

Pradhipta Tenggara, Ayodya; Park, S. J.; Teguh Yudistira, Hadi; Ahn, Y. H.; Byun, Doyoung

2017-03-01

We demonstrated the fabrication of terahertz metamaterial sensor for the accurate and on-site detection of yeast using electrohydrodynamic jet printing, which is inexpensive, simple, and environmentally friendly. The very small sized pattern up to 5 µm-width of electrical split ring resonator unit structures could be printed on a large area on both a rigid substrate and flexible substrate, i.e. silicon wafer and polyimide film using the drop on demand technique to eject liquid ink containing silver nanoparticles. Experimental characterization and simulation were performed to study their performances in detecting yeast of different weights. It was shown that the metamaterial sensor fabricated on a flexible polyimide film had higher sensitivity by more than six times than the metamaterial sensor fabricated on a silicon wafer, due to the low refractive index of the PI substrate and due to the extremely thin substrate thickness which lowers the effective index further. The resonance frequency shift saturated when the yeast weights were 145 µg and 215 µg for metamaterial structures with gap size 6.5 µm fabricated on the silicon substrate and on the polyimide substrate, respectively.

Preparation of Mica and Silicon Substrates for DNA Origami Analysis and Experimentation

PubMed Central

Pillers, Michelle A.; Shute, Rebecca; Farchone, Adam; Linder, Keenan P.; Doerfler, Rose; Gavin, Corey; Goss, Valerie; Lieberman, Marya

2015-01-01

The designed nature and controlled, one-pot synthesis of DNA origami provides exciting opportunities in many fields, particularly nanoelectronics. Many of these applications require interaction with and adhesion of DNA nanostructures to a substrate. Due to its atomically flat and easily cleaned nature, mica has been the substrate of choice for DNA origami experiments. However, the practical applications of mica are relatively limited compared to those of semiconductor substrates. For this reason, a straightforward, stable, and repeatable process for DNA origami adhesion on derivatized silicon oxide is presented here. To promote the adhesion of DNA nanostructures to silicon oxide surface, a self-assembled monolayer of 3-aminopropyltriethoxysilane (APTES) is deposited from an aqueous solution that is compatible with many photoresists. The substrate must be cleaned of all organic and metal contaminants using Radio Corporation of America (RCA) cleaning processes and the native oxide layer must be etched to ensure a flat, functionalizable surface. Cleanrooms are equipped with facilities for silicon cleaning, however many components of DNA origami buffers and solutions are often not allowed in them due to contamination concerns. This manuscript describes the set-up and protocol for in-lab, small-scale silicon cleaning for researchers who do not have access to a cleanroom or would like to incorporate processes that could cause contamination of a cleanroom CMOS clean bench. Additionally, variables for regulating coverage are discussed and how to recognize and avoid common sample preparation problems is described. PMID:26274888

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Yu; School of Mechanical and Electrical Engineering, Wuhan Institute of Technology, Wuhan 430073; Guo, Zhiguang, E-mail: zguo@licp.cas.cn

Graphical abstract: A double-metal-assisted chemical etching method is employed to fabricate superhydrophobic surfaces, showing a good superhydrophobicity with the contact angle of about 170°, and the sliding angle of about 0°. Meanwhile, the potential formation mechanism about it is also presented. Highlights: ► A double-metal-assisted chemical etching method is employed to fabricate superhydrophobic surfaces. ► The obtained surfaces show good superhydrophobicity with a high contact angle and low sliding angle. ► The color of the etched substrate dark brown or black and it is so-called black silicon. -- Abstract: Silicon substrates treated by metal-assisted chemical etching have been studied formore » many years since they could be employed in a variety of electronic and optical devices such as integrated circuits, photovoltaics, sensors and detectors. However, to the best of our knowledge, the chemical etching treatment on the same silicon substrate with the assistance of two or more kinds of metals has not been reported. In this paper, we mainly focus on the etching time and finally obtain a series of superhydrophobic silicon surfaces with novel etching structures through two successive etching processes of Cu-assisted and Ag-assisted chemical etching. It is shown that large-scale homogeneous but locally irregular wire-like structures are obtained, and the superhydrophobic surfaces with low hysteresis are prepared after the modifications with low surface energy materials. It is worth noting that the final silicon substrates not only possess high static contact angle and low hysteresis angle, but also show a black color, indicating that the superhydrophobic silicon substrate has an extremely low reflectance in a certain range of wavelengths. In our future work, we will go a step further to discuss the effect of temperature, the size of Cu nanoparticles and solution concentration on the final topography and superhydrophobicity.« less

High performance and reusable SERS substrates using Ag/ZnO heterostructure on periodic silicon nanotube substrate

NASA Astrophysics Data System (ADS)

Lai, Yi-Chen; Ho, Hsin-Chia; Shih, Bo-Wei; Tsai, Feng-Yu; Hsueh, Chun-Hway

2018-05-01

Surface-enhanced Raman scattering (SERS) substrate with a higher surface area, enhanced light harvesting, multiple hot spots and strong electromagnetic field enhancements would exhibit enhanced Raman signals. Herein, the Ag nanoparticle/ZnO nanowire heterostructure decorated periodic silicon nanotube (Ag@ZnO@SiNT) substrate was proposed and fabricated. The proposed structure employed as SERS-active substrate was examined, and the results showed both the high performance in terms of high sensitivity and good reproducibility. Furthermore, the Ag@ZnO@SiNT substrate demonstrated the self-cleaning performance through the photocatalytic degradation of probed molecules upon UV-irradiation. The results showed that the proposed nanostructure had high performance, good reproducibility and reusability, and it is a promising SERS-active substrate for molecular sensing and cleaning.

Hexagonal AlN Layers Grown on Sulfided Si(100) Substrate

NASA Astrophysics Data System (ADS)

Bessolov, V. N.; Gushchina, E. V.; Konenkova, E. V.; L'vova, T. V.; Panteleev, V. N.; Shcheglov, M. P.

2018-01-01

We have studied the influence of sulfide passivation on the initial stages of aluminum nitride (AlN)-layer nucleation and growth by hydride vapor-phase epitaxy (HVPE) on (100)-oriented single-crystalline silicon substrates. It is established that the substrate pretreatment in (NH4)2S aqueous solution leads to the columnar nucleation of hexagonal AlN crystals of two modifications rotated by 30° relative to each other. Based on the sulfide treatment, a simple method of oxide removal from and preparation of Si(100) substrate surface is developed that can be used for the epitaxial growth of group-III nitride layers.

Polyacrylic acid polymer brushes as substrates for the incorporation of anthraquinone derivatives. Unprecedented application of decorated polymer brushes on organocatalysis

NASA Astrophysics Data System (ADS)

Ruiz-Muelle, Ana Belén; Contreras-Cáceres, Rafael; Oña-Burgos, Pascual; Rodríguez-Dieguez, Antonio; López-Romero, Juan Manuel; Fernández, Ignacio

2018-01-01

The synthesis of amino-terminated anthraquinone derivatives and their incorporation onto polymer brushes for the fabrication of silicon-based nanometric functional coatings are described for the first time. The general process involves the covalent grafting of anthraquinone 1 onto two different polymer-brushes by amidation reactions. They are composed by amino- and carboxy-terminated poly(acrylic acid) chains (PAA-NH2- and PAA-COOH, respectively) tethered by one end to an underlying silicon oxide (SiO2) substrate in a polymer brush configuration. A third substrate is fabricated by UV induced hydrosilylation reaction using undecenoic acid as adsorbate on hydrogen-terminated Si(111) surfaces. One- and two-dimensional nuclear magnetic resonance (NMR), FT-IR, MS and X-ray diffraction (XRD) were used to characterize anthraquinone 1. Ellipsometric and X-ray photoelectron spectroscopy (XPS) measurements demonstrated the presence of the polymer brushes on the silicon wafers, and atomic force microscopy (AFM) was used to study its surface morphology. The covalent linkage between anthraquinone and polymer brushes was proven by XPS and confocal fluorescence microscopy. The resulting surfaces were assayed in the heterogenous organocatalytic transformation of (1H)-indole into 3-benzyl indole with moderate yields but with high recyclability.

Toward three-dimensional microelectronic systems: directed self-assembly of silicon microcubes via DNA surface functionalization.

PubMed

Lämmerhardt, Nico; Merzsch, Stephan; Ledig, Johannes; Bora, Achyut; Waag, Andreas; Tornow, Marc; Mischnick, Petra

2013-07-02

The huge and intelligent processing power of three-dimensional (3D) biological "processors" like the human brain with clock speeds of only 0.1 kHz is an extremely fascinating property, which is based on a massively parallel interconnect strategy. Artificial silicon microprocessors are 7 orders of magnitude faster. Nevertheless, they do not show any indication of intelligent processing power, mostly due to their very limited interconnectivity. Massively parallel interconnectivity can only be realized in three dimensions. Three-dimensional artificial processors would therefore be at the root of fabricating artificially intelligent systems. A first step in this direction would be the self-assembly of silicon based building blocks into 3D structures. We report on the self-assembly of such building blocks by molecular recognition, and on the electrical characterization of the formed assemblies. First, planar silicon substrates were functionalized with self-assembling monolayers of 3-aminopropyltrimethoxysilane for coupling of oligonucleotides (single stranded DNA) with glutaric aldehyde. The oligonucleotide immobilization was confirmed and quantified by hybridization with fluorescence-labeled complementary oligonucleotides. After the individual processing steps, the samples were analyzed by contact angle measurements, ellipsometry, atomic force microscopy, and fluorescence microscopy. Patterned DNA-functionalized layers were fabricated by microcontact printing (μCP) and photolithography. Silicon microcubes of 3 μm edge length as model objects for first 3D self-assembly experiments were fabricated out of silicon-on-insulator (SOI) wafers by a combination of reactive ion etching (RIE) and selective wet etching. The microcubes were then surface-functionalized using the same protocol as on planar substrates, and their self-assembly was demonstrated both on patterned silicon surfaces (88% correctly placed cubes), and to cube aggregates by complementary DNA functionalization and hybridization. The yield of formed aggregates was found to be about 44%, with a relative fraction of dimers of some 30%. Finally, the electrical properties of the formed dimers were characterized using probe tips inside a scanning electron microscope.

Physical and biological evaluations of sintered hydroxyapatite/silicone composite with covalent bonding for a percutaneous implant material.

PubMed

Furuzono, Tsutomu; Wang, Pao-Li; Korematsu, Arata; Miyazaki, Kozo; Oido-Mori, Mari; Kowashi, Yusuke; Ohura, Kiyoshi; Tanaka, Junzo; Kishida, Akio

2003-05-15

A composite (HA/silicone) of hydroxyapatite (HA) microparticles with an average diameter of 2.0 micro m covalently linked to a silicone substrate has been developed, and its physical and biological properties as a percutaneous soft-tissue-compatible material have been evaluated. In tensile property measurement, samples of HA/silicone and the original silicone were similar in tensile strength, ca. 7.8 MPa, and elongation at break, ca. 570%. It was found that chemical surface modification with HA particles presented no mechanical disadvantage. In an adhesive-tape peeling test, scanning electron microscopic (SEM) observation showed that HA particles coupled directly to the substrate were not removed. HA particles may bond strongly with the substrate. In human periodontal ligament fibroblast attachment and proliferation experiments, the number of cells attached to HA/silicone was 14 times greater than that attached to the original silicone after 24 h of incubation. The value on HA/silicone was ca. 80% versus that on a tissue-culture plastic used as a positive control. After 72 h of incubation, the number of cells grown on HA/silicone increased to the level of the positive control. In observation of fluorescence microscopy stained by Hoechst 33342, cells appeared to tightly adhere to HA particles coupled to the silicone sheet due to intact nuclear morphology. Observation of cells by fluorescence dye with rhodamin phalloidin showed an extensive F-actin cytoskeleton on HA/silicone. In a 4-week animal implant test, force required to pull out the HA/silicone sheet was 15 times that of the original silicone. HA-particle coating on silicone with covalent linkage gave the inert surface bioactivity. The HA composite thus effectively prevents germ infection percutaneously. Copyright 2003 Wiley Periodicals, Inc. J Biomed Mater Res Part B: Appl Biomater 65B: 217-226, 2003

A sub-atmospheric chemical vapor deposition process for deposition of oxide liner in high aspect ratio through silicon vias.

PubMed

Lisker, Marco; Marschmeyer, Steffen; Kaynak, Mehmet; Tekin, Ibrahim

2011-09-01

The formation of a Through Silicon Via (TSV) includes a deep Si trench etching and the formation of an insulating layer along the high-aspect-ratio trench and the filling of a conductive material into the via hole. The isolation of the filling conductor from the silicon substrate becomes more important for higher frequencies due to the high coupling of the signal to the silicon. The importance of the oxide thickness on the via wall isolation can be verified using electromagnetic field simulators. To satisfy the needs on the Silicon dioxide deposition, a sub-atmospheric chemical vapor deposition (SA-CVD) process has been developed to deposit an isolation oxide to the walls of deep silicon trenches. The technique provides excellent step coverage of the 100 microm depth silicon trenches with the high aspect ratio of 20 and more. The developed technique allows covering the deep silicon trenches by oxide and makes the high isolation of TSVs from silicon substrate feasible which is the key factor for the performance of TSVs for mm-wave 3D packaging.

Wire-bonder-assisted integration of non-bondable SMA wires into MEMS substrates

NASA Astrophysics Data System (ADS)

Fischer, A. C.; Gradin, H.; Schröder, S.; Braun, S.; Stemme, G.; van der Wijngaart, W.; Niklaus, F.

2012-05-01

This paper reports on a novel technique for the integration of NiTi shape memory alloy wires and other non-bondable wire materials into silicon-based microelectromechanical system structures using a standard wire-bonding tool. The efficient placement and alignment functions of the wire-bonding tool are used to mechanically attach the wire to deep-etched silicon anchoring and clamping structures. This approach enables a reliable and accurate integration of wire materials that cannot be wire bonded by traditional means.

Space optics with silicon wafers and slumped glass

NASA Astrophysics Data System (ADS)

Hudec, R.; Semencova, V.; Inneman, A.; Skulinova, M.; Sveda, L.; Míka, M.; Sik, J.; Lorenc, M.

2017-11-01

The future space X-ray astronomy imaging missions require very large collecting areas at still fine angular resolution and reasonable weight. The novel substrates for X-ray mirrors such as Silicon wafers and thin thermally formed glass enable wide applications of precise and very light weight (volume densities 2.3 to 2.5 gcm-3) optics. The recent status of novel technologies as well as developed test samples with emphasis on precise optical surfaces based on novel materials and their space applications is presented and discussed.

Light-induced V{sub oc} increase and decrease in high-efficiency amorphous silicon solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stuckelberger, M., E-mail: michael.stuckelberger@epfl.ch; Riesen, Y.; Despeisse, M.

High-efficiency amorphous silicon (a-Si:H) solar cells were deposited with different thicknesses of the p-type amorphous silicon carbide layer on substrates of varying roughness. We observed a light-induced open-circuit voltage (V{sub oc}) increase upon light soaking for thin p-layers, but a decrease for thick p-layers. Further, the V{sub oc} increase is enhanced with increasing substrate roughness. After correction of the p-layer thickness for the increased surface area of rough substrates, we can exclude varying the effective p-layer thickness as the cause of the substrate roughness dependence. Instead, we explain the observations by an increase of the dangling-bond density in both themore » p-layer—causing a V{sub oc} increase—and in the intrinsic absorber layer, causing a V{sub oc} decrease. We present a mechanism for the light-induced increase and decrease, justified by the investigation of light-induced changes of the p-layer and supported by Advanced Semiconductor Analysis simulation. We conclude that a shift of the electron quasi-Fermi level towards the conduction band is the reason for the observed V{sub oc} enhancements, and poor amorphous silicon quality on rough substrates enhances this effect.« less

Experimental study of optical and electrical properties of ZnO nano composites electrodeposited on n-porous silicon substrate for photovoltaic applications

NASA Astrophysics Data System (ADS)

Selmane, Naceur; Cheknane, Ali; Gabouze, Nourddine; Maloufi, Nabila; Aillerie, Michel

2017-11-01

ZnO films deposited on silicon porous substrates (PS) were prepared by electro-deposition anodization on n type (100) silicon wafer. This ZnO/PS structure combines substrates having specific structural and optical properties (IR emission), with nano-composites of ZnO potentially interesting due to their functional properties (UV emission) to be integrated as constitutive elements of devices in various optoelectronic applications mainly in blue light emitters. With this combined structure, the blue shift in the PL peak is possible and easy to obtain (467nm). The vibration modes of PS and ZnO films on PS substrates (ZnO /PS) were investigated by infrared (FTIR) measurements and their behaviors were analyzed and discussed by considering the structural properties characterized by X-ray diffraction (DRX) and scanning electronic microscopy (MEB).

Effects of macro- versus nanoporous silicon substrates on human aortic endothelial cell behavior

PubMed Central

2014-01-01

Human aortic endothelial cells play a key role in the pathogenesis of atherosclerosis, which is a common, progressive, and multifactorial disease that is the clinical endpoint of an inflammatory process and endothelial dysfunction. Study and development of new therapies against cardiovascular disease must be tested in vitro cell models, prior to be evaluated in vivo. To this aim, new cell culture platforms are developed that allow cells to grow and respond to their environment in a realistic manner. In this work, the cell adhesion and morphology of endothelial cells are investigated on functionalized porous silicon substrates with two different pore size configurations: macroporous and nanoporous silicon. Herein, we modified the surfaces of porous silicon substrates by aminopropyl triethoxysilane, and we studied how different pore geometries induced different cellular response in the cell morphology and adhesion. The cell growth over the surface of porous silicon becomes an attractive field, especially for medical applications. Surface properties of the biomaterial are associated with cell adhesion and as well as, with proliferation, migration and differentiation. PMID:25246859

Light Trapping in Thin Film Silicon Solar Cells on Plastic Substrates

NASA Astrophysics Data System (ADS)

de Jong, M. M.

2013-01-01

In the search for sustainable energy sources, solar energy can fulfil a large part of the growing demand. The biggest threshold for large-scale solar energy harvesting is the solar panel price. For drastic cost reductions, roll-to-roll fabrication of thin film silicon solar cells using plastic substrates can be a solution. In this thesis, we investigate the possibilities of depositing thin film solar cells directly onto cheap plastic substrates. Micro-textured glass and sheets, which have a wide range of applications, such as in green house, lighting etc, are applied in these solar cells for light trapping. Thin silicon films can be produced by decomposing silane gas, using a plasma process. In these types of processes, the temperature of the growing surface has a large influence on the quality of the grown films. Because plastic substrates limit the maximum tolerable substrate temperature, new methods have to be developed to produce device-grade silicon layers. At low temperature, polysilanes can form in the plasma, eventually forming dust particles, which can deteriorate device performance. By studying the spatially resolved optical emission from the plasma between the electrodes, we can identify whether we have a dusty plasma. Furthermore, we found an explanation for the temperature dependence of dust formation; Monitoring the formation of polysilanes as a function of temperature using a mass-spectrometer, we observed that the polymerization rate is indeed influenced by the substrate temperature. For solar cell substrate material, our choice was polycarbonate (PC), because of its low cost, its excellent transparency and its relatively high glass transition temperature of 130-140°C. At 130°C we searched for deposition recipes for device quality silicon, using a very high frequency plasma enhanced chemical deposition process. By diluting the feedstock silane with hydrogen gas, the silicon quality can be improved for amorphous silicon (a-Si), until we reach the nanocrystalline silicon (nc-Si) regime. In the nc-Si regime, the crystalline fraction can be further controlled by changing the power input into the plasma. With these layers, a-Si thin film solar cells were fabricated, on glass and PC substrates. The adverse effect of the low temperature growth on the photoactive material is further mitigated by using thinner silicon layers, which can deliver a good current only with an adequate light trapping technique. We have simulated and experimentally tested three light trapping techniques, using embossed structures in PC substrates and random structures on glass: regular pyramid structures larger than the wavelength of light (micropyramids), regular pyramid structures comparable to the wavelength of light (nanopyramids) and random nano-textures (Asahi U-type). The use of nanostructured polycarbonate substrates results in initial conversion efficiencies of 7.4%, compared to 7.6% for cells deposited under identical conditions on Asahi U-type glass. The potential of manufacturing thin film solar cells at processing temperatures lower than 130oC is further illustrated by obtained results on texture-etched aluminium doped zinc-oxide (ZnO:Al) on glass: we achieved 6.9% for nc-Si cells using a very thin absorber layer of only 750 nm, and by combining a-Si and nc-Si cells in tandem solar cells we reached an initial conversion efficiency of 9.5%.

Micropatterning of mammalian cells on inorganic-based nanosponges.

PubMed

Yang, Chung-Yao; Liao, Tzu-Chun; Shuai, Hung-Hsun; Shen, Tang-Long; Yeh, J Andrew; Cheng, Chao-Min

2012-07-01

Developing artificial scaffolding structures in vitro in order to mimic physiological-relevant situations in vivo is critical in many biological and medical arenas including bone and cartilage generation, biomaterials, small-scale biomedical devices, tissue engineering, as well as the development of nanofabrication methods. We focus on using simple physical principles (photolithography) and chemical techniques (liquid vapor deposition) to build non-cytotoxic scaffolds with a nanometer resolution through using silicon substrates as the backbone. This method merges an optics-based approach with chemical restructuring to modify the surface properties of an IC-compatible material, switching from hydrophilicity to hydrophobicity. Through this nanofabrication-based approach that we developed, hydrophobic oxidized silicon nanosponges were obtained. We then probed cellular responses-examining cytoskeletal and morphological changes in living cells through a combination of fluorescence microscopy and scanning electron microscopy-via culturing Chinese hamster ovary cells, HIG-82 fibroblasts and Madin-Darby canine kidney cells on these silicon nanosponges. This study has demonstrated the potential applications of using these silicon-based nanopatterns such as influencing cellular behaviors at desired locations with a micro-/nanometer level. Copyright © 2012 Elsevier Ltd. All rights reserved.

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, W.L.; Vanheusden, K.J.R.; Schwank, J.R.; Fleetwood, D.M.; Shaneyfelt, M.R.; Winokur, P.S.; Devine, R.A.B.

1998-07-28

A method is disclosed for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer. 5 figs.

EPITAXIAL GROWTH OF SILICON

DTIC Science & Technology

Epitaxial growth of silicon on a silicon substrate by hydrogen reduction of SiCl4 was investigated. The chemical and physical processes involved in...silicon layers were produced at temperatures between 1100 and 1300 C. The effects of the concentration of SiCl4 in H2, the flow rate of the gas, the

A novel approach for osteocalcin detection by competitive ELISA using porous silicon as a substrate.

PubMed

Rahimi, Fereshteh; Mohammadnejad Arough, Javad; Yaghoobi, Mona; Davoodi, Hadi; Sepehri, Fatemeh; Amirabadizadeh, Masood

2017-11-01

In this study, porous silicon (PSi) was utilized instead of prevalent polystyrene platforms, and its capability in biomolecule screening was examined. Here, two types of porous structure, macroporous silicon (Macro-PSi) and mesoporous silicon (Meso-PSi), were produced on silicon wafers by electrochemical etching using different electrolytes. Moreover, both kinds of fresh and oxidized PSi samples were investigated. Next, osteocalcin as a biomarker of the bone formation process was used as a model biomarker, and the colorimetric detection was performed by competitive enzyme-linked immunosorbent assay (ELISA). Both Macro-PSi and Meso-PSi substrates in the oxidized state, specifically the Meso-porous structure, were reported to have higher surface area to volume ratio, more capacitance of surface-antigen interaction, and more ability to capture antigen in comparison with the prevalent platforms. Moreover, the optical density signal of osteocalcin detected by the ELISA technique was notably higher than the common platforms. Based on the findings of this study, PSi can potentially be used in the ELISA to achieve better results and consequently more sensitivity. A further asset of incorporating such a nanometer structure in the ELISA technique is that the system response to analyte concentration could be maintained by consuming lower monoclonal antibody (or antigen) and consequently reduces the cost of the experiment. © 2016 International Union of Biochemistry and Molecular Biology, Inc.

Wetting Behavior and Reactivity of Molten Silicon with h-BN Substrate at Ultrahigh Temperatures up to 1750 °C

NASA Astrophysics Data System (ADS)

Polkowski, Wojciech; Sobczak, Natalia; Nowak, Rafał; Kudyba, Artur; Bruzda, Grzegorz; Polkowska, Adelajda; Homa, Marta; Turalska, Patrycja; Tangstad, Merete; Safarian, Jafar; Moosavi-Khoonsari, Elmira; Datas, Alejandro

2017-12-01

For a successful implementation of newly proposed silicon-based latent heat thermal energy storage systems, proper ceramic materials that could withstand a contact heating with molten silicon at temperatures much higher than its melting point need to be developed. In this regard, a non-wetting behavior and low reactivity are the main criteria determining the applicability of ceramic as a potential crucible material for long-term ultrahigh temperature contact with molten silicon. In this work, the wetting of hexagonal boron nitride (h-BN) by molten silicon was examined for the first time at temperatures up to 1750 °C. For this purpose, the sessile drop technique combined with contact heating procedure under static argon was used. The reactivity in Si/h-BN system under proposed conditions was evaluated by SEM/EDS examinations of the solidified couple. It was demonstrated that increase in temperature improves wetting, and consequently, non-wetting-to-wetting transition takes place at around 1650 °C. The contact angle of 90° ± 5° is maintained at temperatures up to 1750 °C. The results of structural characterization supported by a thermodynamic modeling indicate that the wetting behavior of the Si/h-BN couple during heating to and cooling from ultrahigh temperature of 1750 °C is mainly controlled by the substrate dissolution/reprecipitation mechanism.

Titanium disilicide formation by sputtering of titanium on heated silicon substrate

NASA Astrophysics Data System (ADS)

Tanielian, M.; Blackstone, S.

1984-09-01

We have sputter deposited titanium on bare silicon substrates at elevated temperatures. We find that at a substrate temperature of about 515 °C titanium silicide is formed due to the reaction of the titanium with the Si. The resistivity of the silicide is about 15 μΩ cm and it is not etchable in a selective titanium etch. This process can have applications in low-temperature, metal-oxide-semiconductor self-aligned silicide formation for very large scale integrated

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Imaging antenna array at 119 microns. [for plasma diagnostics

NASA Technical Reports Server (NTRS)

Neikirk, N. P.; Tong, P. P.; Putledge, D. B.; Park, H.; Young, P. E.

1982-01-01

A focal-plane imaging antenna array has been demonstrated at 119 microns. The array is a line of evaporated silver bow-tie antennas with bismuth microbolometer detectors on a silicon substrate. Radiation is coupled into the array by a lens placed on the back of the substrate. The bolometers are thermally isolated from the silicon substrate with a half-micron layer of polyimide. The array performance is demonstrated by coherent imaging of a series of holes at half the diffraction-limited cut-off frequency.

Surface Control of Actuated Hybrid Space Mirrors

DTIC Science & Technology

2010-10-01

precision Nanolaminate foil facesheet and Silicon Carbide ( SiC ) substrate embedded with electroactive ceramic actuators. Wavefront sensors are used to...integrate precision Nanolaminate foil facesheet with Silicon Carbide ( SiC ) substrate equipped with embedded electroactive ceramic actuators...IAC-10.C2.5.8 SURFACE CONTROL OF ACTUATED HYBRID SPACE MIRRORS Brij. N. Agrawal Naval Postgraduate School, Monterey, CA, 93943, agrawal

Sputtered silicon nitride coatings for wear protection

NASA Technical Reports Server (NTRS)

Grill, A.; Aron, P. R.

1982-01-01

Silicon nitride films were deposited by RF sputtering on 304 stainless steel substrates in a planar RF sputtering apparatus. The sputtering was performed from a Si3N4 target in a sputtering atmosphere of argon and nitrogen. The rate of deposition, the composition of the coatings, the surface microhardness and the adhesion of the coatings to the substrates were investigated as a function of the process parameters, such as: substrate target distance, fraction nitrogen in the sputtering atmosphere and sputtering pressure. Silicon rich coating was obtained for fraction nitrogen below 0.2. The rate of deposition decreases continuously with increasing fraction nitrogen and decreasing sputtering pressure. It was found that the adherence of the coatings improves with decreasing sputtering pressure, almost independently of their composition.

Sensors for ceramic components in advanced propulsion systems

NASA Technical Reports Server (NTRS)

Koller, A. C.; Bennethum, W. H.; Burkholder, S. D.; Brackett, R. R.; Harris, J. P.

1995-01-01

This report includes: (1) a survey of the current methods for the measurement of surface temperature of ceramic materials suitable for use as hot section flowpath components in aircraft gas turbine engines; (2) analysis and selection of three sensing techniques with potential to extend surface temperature measurement capability beyond current limits; and (3) design, manufacture, and evaluation of the three selected techniques which include the following: platinum rhodium thin film thermocouple on alumina and mullite substrates; doped silicon carbide thin film thermocouple on silicon carbide, silicon nitride, and aluminum nitride substrates; and long and short wavelength radiation pyrometry on the substrates listed above plus yttria stabilized zirconia. Measurement of surface emittance of these materials at elevated temperature was included as part of this effort.

Triple-junction thin-film silicon solar cell fabricated on periodically textured substrate with a stabilized efficiency of 13.6%

NASA Astrophysics Data System (ADS)

Sai, Hitoshi; Matsui, Takuya; Koida, Takashi; Matsubara, Koji; Kondo, Michio; Sugiyama, Shuichiro; Katayama, Hirotaka; Takeuchi, Yoshiaki; Yoshida, Isao

2015-05-01

We report a high-efficiency triple-junction thin-film silicon solar cell fabricated with the so-called substrate configuration. It was verified whether the design criteria for developing single-junction microcrystalline silicon (μc-Si:H) solar cells are applicable to multijunction solar cells. Furthermore, a notably high short-circuit current density of 32.9 mA/cm2 was achieved in a single-junction μc-Si:H cell fabricated on a periodically textured substrate with a high-mobility front transparent contacting layer. These technologies were also combined into a-Si:H/μc-Si:H/μc-Si:H triple-junction cells, and a world record stabilized efficiency of 13.6% was achieved.

Hard carbon nitride and method for preparing same

DOEpatents

Haller, Eugene E.; Cohen, Marvin L.; Hansen, William L.

1992-01-01

Novel crystalline .alpha. (silicon nitride-like)-carbon nitride and .beta. (silicon nitride-like)-carbon nitride are formed by sputtering carbon in the presence of a nitrogen atmosphere onto a single crystal germanium or silicon, respectively, substrate.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2004-12-07

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process For Direct Integration Of A Thin-Film Silicon P-N Junction Diode With A Magnetic Tunnel Junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2005-08-23

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2003-01-01

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Integrated TiN coated porous silicon supercapacitor with large capacitance per foot print

NASA Astrophysics Data System (ADS)

Grigoras, Kestutis; Grönberg, Leif; Ahopelto, Jouni; Prunnila, Mika

2017-05-01

We have fabricated a micro-supercapacitor with porous silicon electrodes coated with TiN by atomic layer deposition technique. The coating provides an efficient surface passivation and high electrical conductivity of the electrodes, resulting in stable and almost ideal electrochemical double layer capacitor behavior with characteristics comparable to the best carbon based micro-supercapacitors. Stability of the supercapacitor is verified by performing 50 000 voltammetry cycles with high capacitance retention obtained. Silicon microfabrication techniques facilitate integration of both supercapacitor electrodes inside the silicon substrate and, in this work, such in-chip supercapacitor is demonstrated. This approach allows realization of very high capacitance per foot print area. The in-chip micro-supercapacitor can be integrated with energy harvesting elements and can be used in wearable and implantable microdevices.

Hexagonal Ag nanoarrays induced enhancement of blue light emission from amorphous oxidized silicon nitride via localized surface plasmon coupling.

PubMed

Ma, Zhongyuan; Ni, Xiaodong; Zhang, Wenping; Jiang, Xiaofan; Yang, Huafeng; Yu, Jie; Wang, Wen; Xu, Ling; Xu, Jun; Chen, Kunji; Feng, Duan

2014-11-17

A significant enhancement of blue light emission from amorphous oxidized silicon nitride (a-SiNx:O) films is achieved by introduction of ordered and size-controllable arrays of Ag nanoparticles between the silicon substrate and a-SiNx:O films. Using hexagonal arrays of Ag nanoparticles fabricated by nanosphere lithography, the localized surface plasmons (LSPs) resonance can effectively increase the internal quantum efficiency from 3.9% to 13.3%. Theoretical calculation confirms that the electromagnetic field-intensity enhancement is through the dipole surface plasma coupling with the excitons of a-SiNx:O films, which demonstrates a-SiNx:O films with enhanced blue emission are promising for silicon-based light-emitting applications by patterned Ag arrays.

In-depth porosity control of mesoporous silicon layers by an anodization current adjustment

NASA Astrophysics Data System (ADS)

Lascaud, J.; Defforge, T.; Certon, D.; Valente, D.; Gautier, G.

2017-12-01

The formation of thick mesoporous silicon layers in P+-type substrates leads to an increase in the porosity from the surface to the interface with silicon. The adjustment of the current density during the electrochemical etching of porous silicon is an intuitive way to control the layer in-depth porosity. The duration and the current density during the anodization were varied to empirically model porosity variations with layer thickness and build a database. Current density profiles were extracted from the model in order to etch layer with in-depth control porosity. As a proof of principle, an 80 μm-thick porous silicon multilayer was synthetized with decreasing porosities from 55% to 35%. The results show that the assessment of the in-depth porosity could be significantly enhanced by taking into account the pure chemical etching of the layer in the hydrofluoric acid-based electrolyte.

Growing Cobalt Silicide Columns In Silicon

NASA Technical Reports Server (NTRS)

Fathauer, Obert W.

1991-01-01

Codeposition by molecular-beam epitaxy yields variety of structures. Proposed fabrication process produces three-dimensional nanometer-sized structures on silicon wafers. Enables control of dimensions of metal and semiconductor epitaxial layers in three dimensions instead of usual single dimension (perpendicular to the plane of the substrate). Process used to make arrays of highly efficient infrared sensors, high-speed transistors, and quantum wires. For fabrication of electronic devices, both shapes and locations of columns controlled. One possible technique for doing this electron-beam lithography, see "Making Submicron CoSi2 Structures on Silicon Substrates" (NPO-17736).

Passivation of InGaAs(001)-(2 × 4) by Self-Limiting Chemical Vapor Deposition of a Silicon Hydride Control Layer.

PubMed

Edmonds, Mary; Kent, Tyler; Chagarov, Evgueni; Sardashti, Kasra; Droopad, Ravi; Chang, Mei; Kachian, Jessica; Park, Jun Hong; Kummel, Andrew

2015-07-08

A saturated Si-Hx seed layer for gate oxide or contact conductor ALD has been deposited via two separate self-limiting and saturating CVD processes on InGaAs(001)-(2 × 4) at substrate temperatures of 250 and 350 °C. For the first self-limiting process, a single silicon precursor, Si3H8, was dosed at a substrate temperature of 250 °C, and XPS results show the deposited silicon hydride layer saturated at about 4 monolayers of silicon coverage with hydrogen termination. STS results show the surface Fermi level remains unpinned following the deposition of the saturated silicon hydride layer, indicating the InGaAs surface dangling bonds are electrically passivated by Si-Hx. For the second self-limiting process, Si2Cl6 was dosed at a substrate temperature of 350 °C, and XPS results show the deposited silicon chloride layer saturated at about 2.5 monolayers of silicon coverage with chlorine termination. Atomic hydrogen produced by a thermal gas cracker was subsequently dosed at 350 °C to remove the Si-Cl termination by replacing with Si-H termination as confirmed by XPS, and STS results confirm the saturated Si-Hx bilayer leaves the InGaAs(001)-(2 × 4) surface Fermi level unpinned. Density function theory modeling of silicon hydride surface passivation shows an Si-Hx monolayer can remove all the dangling bonds and leave a charge balanced surface on InGaAs.

Ultra-Thin Monocrystalline Silicon Solar Cell with 12.2% Efficiency Using Silicon-On-Insulator Substrate.

PubMed

Bian, Jian-Tao; Yu, Jian; Duan, Wei-Yuan; Qiu, Yu

2015-04-01

Single side heterojunction silicon solar cells were designed and fabricated using Silicon-On-Insulator (SOI) substrate. The TCAD software was used to simulate the effect of silicon layer thickness, doping concentration and the series resistance. A 10.5 µm thick monocrystalline silicon layer was epitaxially grown on the SOI with boron doping concentration of 2 x 10(16) cm(-3) by thermal CVD. Very high Voc of 678 mV was achieved by applying amorphous silicon heterojunction emitter on the front surface. The single cell efficiency of 12.2% was achieved without any light trapping structures. The rear surface recombination and the series resistance are the main limiting factors for the cell efficiency in addition to the c-Si thickness. By integrating an efficient light trapping scheme and further optimizing fabrication process, higher efficiency of 14.0% is expected for this type of cells. It can be applied to integrated circuits on a monolithic chip to meet the requirements of energy autonomous systems.

Low-Temperature Growth of Amorphous Silicon Films and Direct Fabrication of Solar Cells on Flexible Polyimide and Photo-Paper Substrates

NASA Astrophysics Data System (ADS)

Madaka, Ramakrishna; Kanneboina, Venkanna; Agarwal, Pratima

2018-05-01

Direct deposition of hydrogenated amorphous silicon (a-Si:H) thin films and fabrication of solar cells on polyimide (PI) and photo-paper (PP) substrates using a rf-plasma-enhanced chemical vapor deposition technique is reported. Intrinsic amorphous silicon films were deposited on PI and PP substrates by varying the substrate temperature (T s) over 70-150°C to optimize the deposition parameters for best quality films. The films deposited on both PI and PP substrates at a temperature as low as 70°C showed a photosensitivity (σ ph/σ d) of nearly 4 orders of magnitude which increased to 5-6 orders of magnitude when the substrate temperature was increased to 130-150°C. The increase in σ ph/σ d is due to the presence of a few nanometer-sized crystallites embedded in the film. Solar cells (n-i-p) were fabricated directly on PI, PP and Corning 1737 glass (Corning) at 150°C for different thicknesses of an intrinsic amorphous silicon layer (i-layer). With the increase in i-layer thickness from 330 nm to 700 nm, the solar cell efficiency was found to increase from 3.81% to 5.02% on the Corning substrate whereas on the flexible PI substrate an increase from 3.38% to 4.38% was observed. On the other hand, in the case of cells on PP, the i-layer thickness was varied from 200 nm to 700 nm and the best cell efficiency 1.54% was obtained for the 200-nm-thick i-layer. The fabrication of a-Si (n-i-p) solar cells on photo-paper is presented for the first time.

Fabrication of Robust, Flat, Thinned, UV-Imaging CCDs

NASA Technical Reports Server (NTRS)

Grunthaner, Paula; Elliott, Stythe; Jones, Todd; Nikzad, Shouleh

2004-01-01

An improved process that includes a high-temperature bonding subprocess has been developed to enable the fabrication of robust, flat, silicon-based charge-coupled devices (CCDs) for imaging in ultraviolet (UV) light and/or for detecting low-energy charged particles. The CCDs in question are devices on which CCD circuitry has already been formed and have been thinned for backsurface illumination. These CCDs may be delta doped, and aspects of this type of CCD have been described in several prior articles in NASA Tech Briefs. Unlike prior low-temperature bonding subprocesses based on the use of epoxies or waxes, the high-temperature bonding subprocess is compatible with the deltadoping process as well as with other CCD-fabrication processes. The present improved process and its bonding, thinning, and delta-doping subprocesses, are characterized as postfabrication processes because they are undertaken after the fabrication of CCD circuitry on the front side of a full-thickness silicon substrate. In a typical case, it is necessary to reduce the thickness of the CCD to between 10 and 20 m in order to take advantage of back-side illumination and in order to perform delta doping and/or other back-side treatment to enhance the quantum efficiency. In the prior approach to the fabrication of back-side-illuminated CCDs, the thinning subprocess turned each CCD into a free-standing membrane that was fragile and tended to become wrinkled. In the present improved process, prior to thinning and delta doping, a CCD is bonded on its front side to a silicon substrate that has been prefabricated to include cutouts to accommodate subsequent electrical connections to bonding pads on the CCD circuitry. The substrate provides structural support to increase ruggedness and maintain flatness. At the beginning of this process, the back side of a CCD as fabricated on a full-thickness substrate is polished. Silicon nitride is deposited on the back side, opposite the bonding pads on the front side, in order to define a relatively thick frame. The portion of the CCD not covered by the frame is the portion to be thinned by etching.

Fabrication and characterization of low temperature polycrystalline silicon thin film transistors

NASA Astrophysics Data System (ADS)

Krishnan, Anand Thiruvengadathan

2000-10-01

The proliferation of devices with built-in displays, such as personal digital assistants and cellular phones has created a demand for rugged light-weight displays. Polymeric substrates could be suited for these applications, and they offer the possibility of flexible displays also. However, driver circuitry needs to be integrated in the display if the cost is to be reduced. Low temperature (<350°C) polycrystalline silicon (poly-Si) thin film transistors, if developed, offer driver circuitry integration during pixel transistor fabrication on top of flexible substrates. This thesis addresses several issues related to the fabrication of thin film transistors at low temperatures on glass substrates. A high-density plasma (electron cyclotron resonance (ECR)) based approach was adopted for deposition of thin films. A process for deposition of n-type doped silicon (n-type doped Si) at T < 350°C and having resistivity <1 ohm/cm has been developed. Intrinsic poly-Si was deposited under different conditions of microwave power, RF bias and deposition times. The properties of n-type doped Si and intrinsic poly-Si were correlated with the structure and the deposition conditions. A novel TFT structure has been proposed and implemented in this work. This top gate TFT structure uses n-type doped Si and utilizes only two masks and one alignment step. There are no critical etch steps and good interface quality could be obtained even without post-processing hydrogenation as the poly-Si surface was not exposed to air before deposition of the gate dielectric. TFTs using this top gate structure were fabricated with no process step exceeding 340°C electrode temperature (surface temperature <300°C). These TFTs show ON/OFF ratios in excess of 105. Their sub-threshold swing is ˜0.5 V/decade and mobility is 1--10 cm2/V-s. Several TFTs were also fabricated using alternative dielectrics such as oxide deposited from tetramethyl silane in an RFPECVD chamber and silicon nitride deposited in the ECR and these TFTs also show reasonable device characteristics. TFTs processed using this high-density plasma based approach show great potential for use in applications such as driver circuitry integration on low temperature substrates.

Investigation of the silicon ion density during molecular beam epitaxy growth

NASA Astrophysics Data System (ADS)

Eifler, G.; Kasper, E.; Ashurov, Kh.; Morozov, S.

2002-05-01

Ions impinging on a surface during molecular beam epitaxy influence the growth and the properties of the growing layer, for example, suppression of dopant segregation and the generation of crystal defects. The silicon electron gun in the molecular beam epitaxy (MBE) equipment is used as a source for silicon ions. To use the effect of ion bombardment the mechanism of generation and distribution of ions was investigated. A monitoring system was developed and attached at the substrate position in the MBE growth chamber to measure the ion and electron densities towards the substrate. A negative voltage was applied to the substrate to modify the ion energy and density. Furthermore the current caused by charge carriers impinging on the substrate was measured and compared with the results of the monitoring system. The electron and ion densities were measured by varying the emission current of the e-gun achieving silicon growth rates between 0.07 and 0.45 nm/s and by changing the voltage applied to the substrate between 0 to -1000 V. The dependencies of ion and electron densities were shown and discussed within the framework of a simple model. The charged carrier densities measured with the monitoring system enable to separate the ion part of the substrate current and show its correlation to the generation rate. Comparing the ion density on the whole substrate and in the center gives a hint to the ion beam focusing effect. The maximum ion and electron current densities obtained were 0.40 and 0.61 μA/cm2, respectively.

Optical detector having a plurality of matrix layers with cobalt disilicide particles embedded therein

NASA Technical Reports Server (NTRS)

Fathauer, Robert W. (Inventor); Schowalter, Leo (Inventor)

1994-01-01

Silicon and metal are coevaporated onto a silicon substrate in a molecular beam epitaxy system with a larger than stoichiometric amount of silicon so as to epitaxially grow particles of metal silicide embedded in a matrix of single crystal epitaxially grown silicon. The particles interact with incident photons by resonant optical absorption at the surface plasmon resonance frequency. Controlling the substrate temperature and deposition rate and time allows the aspect ratio of the particles to be tailored to desired wavelength photons and polarizations. The plasmon energy may decay as excited charge carriers of phonons, either of which can be monitored to indicate the amount of incident radiation at the selected frequency and polarization.

Deposition of device quality low H content, amorphous silicon films

DOEpatents

Mahan, A.H.; Carapella, J.C.; Gallagher, A.C.

1995-03-14

A high quality, low hydrogen content, hydrogenated amorphous silicon (a-Si:H) film is deposited by passing a stream of silane gas (SiH{sub 4}) over a high temperature, 2,000 C, tungsten (W) filament in the proximity of a high temperature, 400 C, substrate within a low pressure, 8 mTorr, deposition chamber. The silane gas is decomposed into atomic hydrogen and silicon, which in turn collides preferably not more than 20--30 times before being deposited on the hot substrate. The hydrogenated amorphous silicon films thus produced have only about one atomic percent hydrogen, yet have device quality electrical, chemical, and structural properties, despite this lowered hydrogen content. 7 figs.

Deposition of device quality low H content, amorphous silicon films

DOEpatents

Mahan, Archie H.; Carapella, Jeffrey C.; Gallagher, Alan C.

1995-01-01

A high quality, low hydrogen content, hydrogenated amorphous silicon (a-Si:H) film is deposited by passing a stream of silane gas (SiH.sub.4) over a high temperature, 2000.degree. C., tungsten (W) filament in the proximity of a high temperature, 400.degree. C., substrate within a low pressure, 8 mTorr, deposition chamber. The silane gas is decomposed into atomic hydrogen and silicon, which in turn collides preferably not more than 20-30 times before being deposited on the hot substrate. The hydrogenated amorphous silicon films thus produced have only about one atomic percent hydrogen, yet have device quality electrical, chemical, and structural properties, despite this lowered hydrogen content.

Nano-Welding of Multi-Walled Carbon Nanotubes on Silicon and Silica Surface by Laser Irradiation.

PubMed

Yuan, Yanping; Chen, Jimin

2016-02-24

In this study, a continuous fiber laser (1064 nm wavelength, 30 W/cm²) is used to irradiate multi-walled carbon nanotubes (MWCNTs) on different substrate surfaces. Effects of substrates on nano-welding of MWCNTs are investigated by scanning electron microscope (SEM). For MWCNTs on silica, after 3 s irradiation, nanoscale welding with good quality can be achieved due to breaking C-C bonds and formation of new graphene layers. While welding junctions can be formed until 10 s for the MWCNTs on silicon, the difference of irradiation time to achieve welding is attributed to the difference of thermal conductivity for silica and silicon. As the irradiation time is prolonged up to 12.5 s, most of the MWCNTs are welded to a silicon substrate, which leads to their frameworks of tube walls on the silicon surface. This is because the accumulation of absorbed energy makes the temperature rise. Then chemical reactions among silicon, carbon and nitrogen occur. New chemical bonds of Si-N and Si-C achieve the welding between the MWCNTs and silicon. Vibration modes of Si₃N₄ appear at peaks of 363 cm -1 and 663 cm -1 . There are vibration modes of SiC at peaks of 618 cm -1 , 779 cm -1 and 973 cm -1 . The experimental observation proves chemical reactions and the formation of Si₃N₄ and SiC by laser irradiation.

Emissivity properties of silicon wafers and their application to radiation thermometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Iuchi, T.; Seo, T.

We studied the spectral and directional emissivities of silicon wafers using an optical polarization technique. Based on the simulation and experimental results, we developed two different radiation thermometry methods for silicon wafers, the first based on a polarized emissivity-invariant condition, and the second based on the relationship between the ratio of the p-to s-polarized radiance and the polarized emissivity. These methods can be performed at temperatures above 600 °C and over a wide wavelength range (0.9∼5 μm), irrespective of dielectric film thickness and substrate resistivity due to the dopant concentrations. Temperature measurements were estimated to have expanded uncertainties (k=2) ofmore » less than 5 °C. A radiometer system with wavelengths above 4.5 μm was successfully developed because the system was not influenced by background noise caused by a high-intensity heating lamp.« less

Hard carbon nitride and method for preparing same

DOEpatents

Haller, E.E.; Cohen, M.L.; Hansen, W.L.

1992-05-05

Novel crystalline [alpha](silicon nitride-like)-carbon nitride and [beta](silicon nitride-like)-carbon nitride are formed by sputtering carbon in the presence of a nitrogen atmosphere onto a single crystal germanium or silicon, respectively, substrate. 1 figure.

Force measurements of a magnetic micro actuator proposed for a microvalve array

NASA Astrophysics Data System (ADS)

Chang, Pauline J.; Chang, Frank W.; Yuen, Michelle C.; Otillar, Robert; Horsley, David A.

2014-03-01

Low-cost, easily-fabricated and power-efficient microvalves are necessary for many microfluidic lab-on-a-chip applications. In this study, we present a simple, low-power, scalable, CMOS-compatible magnetic actuator for microvalve applications composed of a paramagnetic bead as the ball valve over a picoliter reaction well etched into a silicon substrate. The paramagnetic bead, composed of either pure FeSi or magnetite in a SiO2 matrix, is actuated by the local magnetic field gradient generated by a microcoil in an aqueous environment, and the reaction well is situated at the microcoil center. A permanent magnet beneath the microvalve device provides an external magnetic biasing field that magnetizes the bead, enabling bidirectional actuation and reducing the current required to actuate the bead to a level below 10 mA. The vertical and radial magnetic forces exerted on the bead by the microcoil were measured for both pure FeSi and composite beads and agree well with the predictions of 2D axisymmetric finite element method models. Vertical forces were within a range of 13-80 nN, and radial forces were 11-60 nN depending on the bead type. The threshold current required to initiate bead actuation was measured as a function of bead diameter and is found to scale inversely with volume for small beads, as expected based on the magnetic force model. To provide an estimate of the stiction force acting between the bead and the passivation layer on the substrate, repeated actuation trials were used to study the bead throw distance for substrates coated with silicon dioxide, Parylene-C, and photoresist. The stiction observed was lowest for a photoresist-coated substrate, while silicon dioxide and Parylene-C coated substrates exhibited similar levels of stiction.

Synthesis and characterization of silicon nanowire arrays for photovoltaic applications

NASA Astrophysics Data System (ADS)

Eichfeld, Sarah M.

The overall objective of this thesis was the development of processes for the fabrication of radial p-n silicon nanowires (SiNWs) using bottom-up nanowire growth techniques on silicon and glass substrates. Vapor-liquid-solid (VLS) growth was carried out on Si(111) substrates using SiCl4 as the silicon precursor. Growth conditions including temperature, PSiCl4, PH2, and position were investigated to determine the optimum growth conditions for epitaxially oriented silicon nanowire arrays. The experiments revealed that the growth rate of the silicon nanowires exhibits a maximum as a function of PSiCl4 and P H2. Gas phase equilibrium calculations were used in conjunction with a mass transport model to explain the experimental data. The modeling results demonstrate a similar maximum in the mass of solid silicon predicted to form as a function of PSiCl4 and PH2, which results from a change in the gas phase concentration of SiHxCly and SiClx species. This results in a shift in the process from growth to etching with increasing PSiCl4. In general, for the atmospheric pressure conditions employed in this study, growth at higher temperatures >1000°C and higher SiCl4 concentrations gave the best results. The growth of silicon nanowire arrays on anodized alumina (AAO)-coated glass substrates was also investigated. Glass will not hold up to the high temperatures required for Si nanowire growth with SiCl4 so SiH 4 was used as the Si precursor instead. Initial studies were carried out to measure the resistivity of p-type and n-type silicon nanowires grown in freestanding AAO membranes. A series of nanowire samples were grown in which the doping and the nanowire length inside the membrane were varied. Circular metal contacts were deposited on the top surface of the membranes and the resistance of the nanowire arrays was measured. The measured resistance versus nanowire length was plotted and the nanowire resistivity was extracted from the slope. The resistivity of the silicon nanowires grown in the AAO membranes was then compared to the resistivity of silicon nanowires grown on Si and measured using single wire four-point measurements. It was determined that the undoped silicon nanowires grown in AAO have a lower resistivity compared to nanowires grown on Si substrates. This indicates the presence of an unintentional acceptor. The resistivity of the silicon nanowires was found to change as the dopant/SiH4 ratio was varied during growth. The growth and doping conditions developed from this study were then used to fabricate p-type SiNW arrays on the AAO coated glass substrates. The final investigation in this thesis focused on the development of a process for radial coating of an n-type Si layer on the p-type Si nanowires. While prior studies demonstrated the fabrication of polycrystalline n-type Si shell layers on Si nanowires, an epitaxial n-type Si shell layer is ultimately of interest to obtain a high quality p-n interface. Initial n-type Si thin film deposition studies were carried out on sapphire substrates using SiH 4 as the silicon precursor to investigate the effect of growth conditions on thickness uniformity, growth rate and doping level. High growth temperatures (>900°C) are generally desired for achieving epitaxial growth; however, gas phase depletion of the SiH4 source along the length of the reactor resulted in poor thickness uniformity. To improve the uniformity, the substrate was shifted closer to the gas inlet at higher temperatures (950°C) and the total flow of gas through the reactor was increased to 200 sccm. A series of n-type doping experiments were also carried out. Hall measurements indicated n-type behavior and four-point measurements yielded a change in resistivity based on the PH3/SiH4 ratio. Pre-coating sample preparation was determined to be important for achieving a high quality Si shell layer. Since Au can diffuse down the sides of the nanowire during sample cooldown after growth, the Au tips were etched away prior to shell layer deposition. The effect of deposition temperature on the structural properties of the shell layer deposited on the VLS grown SiNWs was investigated. TEM revealed that the n-type Si shells were polycrystalline at low temperatures (650°C) but were single crystal at 950°C. SiNW samples grown on glass were also coated; however, due to the temperature constraints, the maximum temperature used was 650°C and therefore the n-type Si shells were polycrystalline. (Abstract shortened by UMI.)

Hybrid solar cell based on a-Si/polymer flat heterojunction on flexible substrates

NASA Astrophysics Data System (ADS)

Olivares Vargas, A. J.; Mansurova, S.; Cosme, I.; Kosarev, A.; Ospina Ocampo, C. A.; Martinez Mateo, H. E.

2017-08-01

In this work, we present the results of investigation of thin film hybrid organic-inorganic photovoltaic structures based on flat heterojunction hydrogenated silicon (a-Si:H) and poly(3,4 ethylene dioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) fabricated on polyethylene naphthalate (PEN). Different thicknesses of transparent AL doped Zn:O (AZO) electrodes have been tested on PEN substrate and studied by atomic force microscopy (AFM). The AZO films on PEN substrate were statistically processed to obtain surface morphological characteristics, such as root mean square roughness RQ, skewness SK and kurtosis KU. Performance characteristics of fabricated photovoltaic structures have been measured and analyzed for different thicknesses of the transparent electrodes under standard illumination (AM 1.5 I0= 100mW/cm2). Structures on flexible substrates show reproducible performance characteristic as their glass substrate counterpart with values of JSC= 6 mA/cm2, VOC= 0.535 V, FF= 43 % and PCE= 1.41%.

Silicon Carbide High Temperature Anemometer and Method for Assembling the Same

NASA Technical Reports Server (NTRS)

Okojie, Robert S. (Inventor); Fralick, Gustave C. (Inventor); Saad, George J. (Inventor)

2003-01-01

A high temperature anemometer includes a pair of substrates. One of the substrates has a plurality of electrodes on a facing surface, while the other of the substrates has a sensor cavity on a facing surface. A sensor is received in the sensor cavity, wherein the sensor has a plurality of bondpads, and wherein the bond pads contact the plurality of electrodes when the facing surfaces are mated with one another. The anemometer further includes a plurality of plug-in pins, wherein the substrate with the cavity has a plurality of trenches with each one receiving a plurality of plug-in pins. The plurality of plug-in pins contact the plurality of electrodes when the substrates are mated with one another. The sensor cavity is at an end of one of the substrates such that the sensor partially extends from the substrate. The sensor and the substrates are preferably made of silicon carbide.

Photoluminescence enhancement of silicon quantum dot monolayer by plasmonic substrate fabricated by nano-imprint lithography

NASA Astrophysics Data System (ADS)

Yanagawa, Hiroto; Inoue, Asuka; Sugimoto, Hiroshi; Shioi, Masahiko; Fujii, Minoru

2017-12-01

Near-field coupling between a silicon quantum dot (Si-QD) monolayer and a plasmonic substrate fabricated by nano-imprint lithography and having broad multiple resonances in the near-infrared (NIR) window of biological substances was studied by precisely controlling the QDs-substrate distance. A strong enhancement of the NIR photoluminescence (PL) of Si-QDs was observed. Detailed analyses of the PL and PL excitation spectra, the PL decay dynamics, and the reflectance spectra revealed that both the excitation cross-sections and the emission rates are enhanced by the surface plasmon resonances, thanks to the broad multiple resonances of the plasmonic substrate, and that the relative contribution of the two enhancement processes depends strongly on the excitation wavelength. Under excitation by short wavelength photons (405 nm), where enhancement of the excitation cross-section is not expected, the maximum enhancement was obtained when the QDs-substrate distance was around 30 nm. On the other hand, under long wavelength excitation (641 nm), where strong excitation cross-section enhancement is expected, the largest enhancement was obtained when the distance was minimum (around 1 nm). The achievement of efficient excitation of NIR luminescence of Si-QDs by long wavelength photons paves the way for the development of Si-QD-based fluorescence bio-sensing devices with a high bound-to-free ratio.

Hybrid heterojunction solar cell based on organic-inorganic silicon nanowire array architecture.

PubMed

Shen, Xiaojuan; Sun, Baoquan; Liu, Dong; Lee, Shuit-Tong

2011-12-07

Silicon nanowire arrays (SiNWs) on a planar silicon wafer can be fabricated by a simple metal-assisted wet chemical etching method. They can offer an excellent light harvesting capability through light scattering and trapping. In this work, we demonstrated that the organic-inorganic solar cell based on hybrid composites of conjugated molecules and SiNWs on a planar substrate yielded an excellent power conversion efficiency (PCE) of 9.70%. The high efficiency was ascribed to two aspects: one was the improvement of the light absorption by SiNWs structure on the planar components; the other was the enhancement of charge extraction efficiency, resulting from the novel top contact by forming a thin organic layer shell around the individual silicon nanowire. On the contrary, the sole planar junction solar cell only exhibited a PCE of 6.01%, due to the lower light trapping capability and the less hole extraction efficiency. It indicated that both the SiNWs structure and the thin organic layer top contact were critical to achieve a high performance organic/silicon solar cell. © 2011 American Chemical Society

Lithography-free fabrication of silicon nanowire and nanohole arrays by metal-assisted chemical etching

PubMed Central

2013-01-01

We demonstrated a novel, simple, and low-cost method to fabricate silicon nanowire (SiNW) arrays and silicon nanohole (SiNH) arrays based on thin silver (Ag) film dewetting process combined with metal-assisted chemical etching. Ag mesh with holes and semispherical Ag nanoparticles can be prepared by simple thermal annealing of Ag thin film on a silicon substrate. Both the diameter and the distribution of mesh holes as well as the nanoparticles can be manipulated by the film thickness and the annealing temperature. The silicon underneath Ag coverage was etched off with the catalysis of metal in an aqueous solution containing HF and an oxidant, which form silicon nanostructures (either SiNW or SiNH arrays). The morphologies of the corresponding etched SiNW and SiNH arrays matched well with that of Ag holes and nanoparticles. This novel method allows lithography-free fabrication of the SiNW and SiNH arrays with control of the size and distribution. PMID:23557325

All-solid-state supercapacitors on silicon using graphene from silicon carbide

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Bei; Ahmed, Mohsin; Iacopi, Francesca, E-mail: f.iacopi@griffith.edu.au

2016-05-02

Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitancemore » behavior with a specific area capacitance of up to 174 μF cm{sup −2} with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.« less

Energy Levels of Defects Created in Silicon Supersaturated with Transition Metals

NASA Astrophysics Data System (ADS)

García, H.; Castán, H.; Dueñas, S.; García-Hemme, E.; García-Hernansaz, R.; Montero, D.; González-Díaz, G.

2018-03-01

Intermediate-band semiconductors have attracted much attention for use in silicon-based solar cells and infrared detectors. In this work, n-Si substrates have been implanted with very high doses (1013 cm-2 and 1014 cm-2) of vanadium, which gives rise to a supersaturated layer inside the semiconductor. However, the Mott limit was not exceeded. The energy levels created in the supersaturated silicon were studied in detail by means of thermal admittance spectroscopy. We found a single deep center at energy near E C - 200 meV. This value agrees with one of the levels found for vanadium in silicon. The capture cross-section values of the deep levels were also calculated, and we found a relationship between the capture cross-section and the energy position of the deep levels which follows the Meyer-Neldel rule. This process usually appears in processes involving multiple excitations. The Meyer-Neldel energy values agree with those previously obtained for silicon supersaturated with titanium and for silicon contaminated with iron.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Rose, Klint A [Mt. View, CA; Davidson, James Courtney [Livermore, CA; Strauch, Mark S [Livermore, CA

2008-03-11

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Rose, Klint A [Mt. View, CA; Davidson, James Courtney [Livermore, CA; Strauch, Mark S [Livermore, CA

2006-04-18

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic unit integrated into a flexible polymer body

DOEpatents

Krulevitch, Peter A.; Maghribi, Mariam N.; Benett, William J.; Hamilton, Julie K.; Rose, Klint A.; Davidson, James Courtney; Strauch, Mark S.

2005-04-12

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Electronic Unit Integrated Into A Flexible Polymer Body

DOEpatents

Krulevitch, Peter A.; Maghribi, Mariam N.; Benett, William J.; Hamilton, Julie K.; Rose, Klint A.; Davidson, James Courtney; Strauch, Mark S.

2006-01-31

A peel and stick electronic system comprises a silicone body, and at least one electronic unit operatively connected to the silicone body. The electronic system is produce by providing a silicone layer on a substrate, providing a metal layer on the silicone layer, and providing at least one electronic unit connected to the metal layer.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

Electrolytic etch for preventing electrical shorts in solar cells on polymer surfaces

DOEpatents

Weber, Michael F.

1991-10-08

A method for preventing shorts and shunts in solar cells having in order, an insulating substrate, a conductive metal layer on the substrate, an amorphous silicon layer and a transparent conductive layer. The method includes anodic etching of exposed portions of the metal layer after deposition of the amorphous silicon and prior to depositing the transparent conductive layer.

Studies of silicon p-n junction solar cells. [open circuit photovoltage

NASA Technical Reports Server (NTRS)

Lindholm, F. A.

1976-01-01

Single crystal silicon p-n junction solar cells made with low resistivity substrates show poorer solar energy conversion efficiency than traditional theory predicts. The physical mechanisms responsible for this discrepancy are identified and characterized. The open circuit voltage in shallow junction cells of about 0.1 ohm/cm substrate resistivity is investigated under AMO (one sun) conditions.

Development of silicon grisms and immersion gratings for high-resolution infrared spectroscopy

NASA Astrophysics Data System (ADS)

Ge, Jian; McDavitt, Daniel L.; Bernecker, John L.; Miller, Shane; Ciarlo, Dino R.; Kuzmenko, Paul J.

2002-01-01

We report new results on silicon grism and immersion grating development using photolithography and anisotropic chemical etching techniques, which include process recipe finding, prototype grism fabrication, lab performance evaluation and initial scientific observations. The very high refractive index of silicon (n=3.4) enables much higher dispersion power for silicon-based gratings than conventional gratings, e.g. a silicon immersion grating can offer a factor of 3.4 times the dispersion of a conventional immersion grating. Good transmission in the infrared (IR) allows silicon-based gratings to operate in the broad IR wavelength regions (~1- 10 micrometers and far-IR), which make them attractive for both ground and space-based spectroscopic observations. Coarser gratings can be fabricated with these new techniques rather than conventional techniques, allowing observations at very high dispersion orders for larger simultaneous wavelength coverage. We have found new etching techniques for fabricating high quality silicon grisms with low wavefront distortion, low scattered light and high efficiency. Particularly, a new etching process using tetramethyl ammonium hydroxide (TMAH) is significantly simplifying the fabrication process on large, thick silicon substrates, while providing comparable grating quality to our traditional potassium hydroxide (KOH) process. This technique is being used for fabricating inch size silicon grisms for several IR instruments and is planned to be used for fabricating ~ 4 inch size silicon immersion gratings later. We have obtained complete K band spectra of a total of 6 T Tauri and Ae/Be stars and their close companions at a spectral resolution of R ~ 5000 using a silicon echelle grism with a 5 mm pupil diameter at the Lick 3m telescope. These results represent the first scientific observations conducted by the high-resolution silicon grisms, and demonstrate the extremely high dispersing power of silicon- based gratings. The future of silicon-based grating applications in ground and space-based IR instruments is promising. Silicon immersion gratings will make very high-resolution spectroscopy (R>100,000) feasible with compact instruments for implementation on large telescopes. Silicon grisms will offer an efficient way to implement low-cost medium to high resolution IR spectroscopy (R~ 1000-50000) through the conversion of existing cameras into spectrometers by locating a grism in the instrument's pupil location.

Refractory Oxidative-Resistant Ceramic Carbon Insulation

NASA Technical Reports Server (NTRS)

Leiser, Daniel B. (Inventor); Hsu, Ming-Ta S. (Inventor); Chen, Timothy S. (Inventor)

2001-01-01

High-temperature, lightweight, ceramic carbon insulation is prepared by coating or impregnating a porous carbon substrate with a siloxane gel derived from the reaction of an organodialkoxy silane and an organotrialkoxy silane in an acid or base medium in the presence of the carbon substrate. The siloxane gel is subsequently dried on the carbon substrate to form a ceramic carbon precursor. The carbon precursor is pyrolyzed, in an inert atmosphere, to form the ceramic insulation containing carbon, silicon, and oxygen. The carbon insulation is characterized as a porous, fibrous, carbon ceramic tile which is particularly useful as lightweight tiles for spacecraft.