Sample records for silicon selective etching

  1. Temperature-Dependent Nanofabrication on Silicon by Friction-Induced Selective Etching.

    PubMed

    Jin, Chenning; Yu, Bingjun; Xiao, Chen; Chen, Lei; Qian, Linmao

    2016-12-01

    Friction-induced selective etching provides a convenient and practical way for fabricating protrusive nanostructures. A further understanding of this method is very important for establishing a controllable nanofabrication process. In this study, the effect of etching temperature on the formation of protrusive hillocks and surface properties of the etched silicon surface was investigated. It is found that the height of the hillock produced by selective etching increases with the etching temperature before the collapse of the hillock. The temperature-dependent selective etching rate can be fitted well by the Arrhenius equation. The etching at higher temperature can cause rougher silicon surface with a little lower elastic modulus and hardness. The contact angle of the etched silicon surface decreases with the etching temperature. It is also noted that no obvious contamination can be detected on silicon surface after etching at different temperatures. As a result, the optimized condition for the selective etching was addressed. The present study provides a new insight into the control and application of friction-induced selective nanofabrication.

  2. ScAlN etch mask for highly selective silicon etching

    DOE PAGES

    Henry, Michael David; Young, Travis R.; Griffin, Ben

    2017-09-08

    Here, this work reports the utilization of a recently developed film, ScAlN, as a silicon etch mask offering significant improvements in high etch selectivity to silicon. Utilization of ScAlN as a fluorine chemistry based deep reactive ion etch mask demonstrated etch selectivity at 23 550:1, four times better than AlN, 11 times better than Al 2O 3, and 148 times better than silicon dioxide with significantly less resputtering at high bias voltage than either Al 2O 3 or AlN. Ellipsometry film thickness measurements show less than 0.3 nm/min mask erosion rates for ScAlN. Micromasking of resputtered Al for Al 2Omore » 3, AlN, and ScAlN etch masks is also reported here, utilizing cross-sectional scanning electron microscope and confocal microscope roughness measurements. With lower etch bias, the reduced etch rate can be optimized to achieve a trench bottom surface roughness that is comparable to SiO 2 etch masks. Etch mask selectivity enabled by ScAlN is likely to make significant improvements in microelectromechanical systems, wafer level packaging, and plasma dicing of silicon.« less

  3. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Henry, Michael David; Young, Travis R.; Griffin, Ben

    Here, this work reports the utilization of a recently developed film, ScAlN, as a silicon etch mask offering significant improvements in high etch selectivity to silicon. Utilization of ScAlN as a fluorine chemistry based deep reactive ion etch mask demonstrated etch selectivity at 23 550:1, four times better than AlN, 11 times better than Al 2O 3, and 148 times better than silicon dioxide with significantly less resputtering at high bias voltage than either Al 2O 3 or AlN. Ellipsometry film thickness measurements show less than 0.3 nm/min mask erosion rates for ScAlN. Micromasking of resputtered Al for Al 2Omore » 3, AlN, and ScAlN etch masks is also reported here, utilizing cross-sectional scanning electron microscope and confocal microscope roughness measurements. With lower etch bias, the reduced etch rate can be optimized to achieve a trench bottom surface roughness that is comparable to SiO 2 etch masks. Etch mask selectivity enabled by ScAlN is likely to make significant improvements in microelectromechanical systems, wafer level packaging, and plasma dicing of silicon.« less

  4. New frontiers of atomic layer etching

    NASA Astrophysics Data System (ADS)

    Sherpa, Sonam D.; Ranjan, Alok

    2018-03-01

    Interest in atomic layer etching (ALE) has surged recently because it offers several advantages over continuous or quasicontinuous plasma etching. These benefits include (1) independent control of ion energy, ion flux, and radical flux, (2) flux-independent etch rate that mitigates the iso-dense loading effects, and (3) ability to control the etch rate with atomic or nanoscale precision. In addition to these benefits, we demonstrate an area-selective etching for maskless lithography as a new frontier of ALE. In this paper, area-selective etching refers to the confinement of etching into the specific areas of the substrate. The concept of area-selective etching originated during our studies on quasi-ALE of silicon nitride which consists of sequential exposure of silicon nitride to hydrogen and fluorinated plasma. The findings of our studies reported in this paper suggest that it may be possible to confine the etching into specific areas of silicon nitride without using any mask by replacing conventional hydrogen plasma with a localized source of hydrogen ions.

  5. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Donnelly, Vincent M.; Kornblit, Avinoam

    The field of plasma etching is reviewed. Plasma etching, a revolutionary extension of the technique of physical sputtering, was introduced to integrated circuit manufacturing as early as the mid 1960s and more widely in the early 1970s, in an effort to reduce liquid waste disposal in manufacturing and achieve selectivities that were difficult to obtain with wet chemistry. Quickly, the ability to anisotropically etch silicon, aluminum, and silicon dioxide in plasmas became the breakthrough that allowed the features in integrated circuits to continue to shrink over the next 40 years. Some of this early history is reviewed, and a discussionmore » of the evolution in plasma reactor design is included. Some basic principles related to plasma etching such as evaporation rates and Langmuir–Hinshelwood adsorption are introduced. Etching mechanisms of selected materials, silicon, silicon dioxide, and low dielectric-constant materials are discussed in detail. A detailed treatment is presented of applications in current silicon integrated circuit fabrication. Finally, some predictions are offered for future needs and advances in plasma etching for silicon and nonsilicon-based devices.« less

  6. Nanofabrication on monocrystalline silicon through friction-induced selective etching of Si3N4 mask

    PubMed Central

    2014-01-01

    A new fabrication method is proposed to produce nanostructures on monocrystalline silicon based on the friction-induced selective etching of its Si3N4 mask. With low-pressure chemical vapor deposition (LPCVD) Si3N4 film as etching mask on Si(100) surface, the fabrication can be realized by nanoscratching on the Si3N4 mask and post-etching in hydrofluoric acid (HF) and potassium hydroxide (KOH) solution in sequence. Scanning Auger nanoprobe analysis indicated that the HF solution could selectively etch the scratched Si3N4 mask and then provide the gap for post-etching of silicon substrate in KOH solution. Experimental results suggested that the fabrication depth increased with the increase of the scratching load or KOH etching period. Because of the excellent masking ability of the Si3N4 film, the maximum fabrication depth of nanostructure on silicon can reach several microns. Compared to the traditional friction-induced selective etching technique, the present method can fabricate structures with lesser damage and deeper depths. Since the proposed method has been demonstrated to be a less destructive and flexible way to fabricate a large-area texture structure, it will provide new opportunities for Si-based nanofabrication. PMID:24940174

  7. Selective etching of silicon carbide films

    DOEpatents

    Gao, Di; Howe, Roger T.; Maboudian, Roya

    2006-12-19

    A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer to expose underlying areas of the substrate; and etching the underlying areas of the substrate with a plasma at a first rate, while etching the mask layer at a rate lower than the first rate.

  8. Cryogenic Etching of High Aspect Ratio 400 nm Pitch Silicon Gratings.

    PubMed

    Miao, Houxun; Chen, Lei; Mirzaeimoghri, Mona; Kasica, Richard; Wen, Han

    2016-10-01

    The cryogenic process and Bosch process are two widely used processes for reactive ion etching of high aspect ratio silicon structures. This paper focuses on the cryogenic deep etching of 400 nm pitch silicon gratings with various etching mask materials including polymer, Cr, SiO 2 and Cr-on-polymer. The undercut is found to be the key factor limiting the achievable aspect ratio for the direct hard masks of Cr and SiO 2 , while the etch selectivity responds to the limitation of the polymer mask. The Cr-on-polymer mask provides the same high selectivity as Cr and reduces the excessive undercut introduced by direct hard masks. By optimizing the etching parameters, we etched a 400 nm pitch grating to ≈ 10.6 μ m depth, corresponding to an aspect ratio of ≈ 53.

  9. Resistless lithography - selective etching of silicon with gallium doping regions

    NASA Astrophysics Data System (ADS)

    Abdullaev, D.; Milovanov, R.; Zubov, D.

    2016-12-01

    This paper presents the results for used of resistless lithography with a further reactive-ion etching (RIE) in various chemistry after local (Ga+) implantation of silicon with different doping dose and different size doped regions. We describe the different etching regimes for pattern transfer of FIB implanted Ga masks in silicon. The paper studied the influence of the implantation dose on the silicon surface, the masking effect and the mask resistance to erosion at dry etching. Based on these results we conclude about the possibility of using this method to create micro-and nanoscale silicon structures.

  10. Process for Smoothing an Si Substrate after Etching of SiO2

    NASA Technical Reports Server (NTRS)

    Turner, Tasha; Wu, Chi

    2003-01-01

    A reactive-ion etching (RIE) process for smoothing a silicon substrate has been devised. The process is especially useful for smoothing those silicon areas that have been exposed by etching a pattern of holes in a layer of silicon dioxide that covers the substrate. Applications in which one could utilize smooth silicon surfaces like those produced by this process include fabrication of optical waveguides, epitaxial deposition of silicon on selected areas of silicon substrates, and preparation of silicon substrates for deposition of adherent metal layers. During etching away of a layer of SiO2 that covers an Si substrate, a polymer becomes deposited on the substrate, and the substrate surface becomes rough (roughness height approximately equal to 50 nm) as a result of over-etching or of deposition of the polymer. While it is possible to smooth a silicon substrate by wet chemical etching, the undesired consequences of wet chemical etching can include compromising the integrity of the SiO2 sidewalls and undercutting of the adjacent areas of the silicon dioxide that are meant to be left intact. The present RIE process results in anisotropic etching that removes the polymer and reduces height of roughness of the silicon substrate to less than 10 nm while leaving the SiO2 sidewalls intact and vertical. Control over substrate versus sidewall etching (in particular, preferential etching of the substrate) is achieved through selection of process parameters, including gas flow, power, and pressure. Such control is not uniformly and repeatably achievable in wet chemical etching. The recipe for the present RIE process is the following: Etch 1 - A mixture of CF4 and O2 gases flowing at rates of 25 to 75 and 75 to 125 standard cubic centimeters per minute (stdcm3/min), respectively; power between 44 and 55 W; and pressure between 45 and 55 mtorr (between 6.0 and 7.3 Pa). The etch rate lies between approximately equal to 3 and approximately equal to 6 nm/minute. Etch 2 - O2 gas flowing at 75 to 125 stdcm3/min, power between 44 and 55 W, and pressure between 50 and 100 mtorr (between 6.7 and 13.3 Pa).

  11. Nanoparticle-based etching of silicon surfaces

    DOEpatents

    Branz, Howard [Boulder, CO; Duda, Anna [Denver, CO; Ginley, David S [Evergreen, CO; Yost, Vernon [Littleton, CO; Meier, Daniel [Atlanta, GA; Ward, James S [Golden, CO

    2011-12-13

    A method (300) of texturing silicon surfaces (116) such to reduce reflectivity of a silicon wafer (110) for use in solar cells. The method (300) includes filling (330, 340) a vessel (122) with a volume of an etching solution (124) so as to cover the silicon surface 116) of a wafer or substrate (112). The etching solution (124) is made up of a catalytic nanomaterial (140) and an oxidant-etchant solution (146). The catalytic nanomaterial (140) may include gold or silver nanoparticles or noble metal nanoparticles, each of which may be a colloidal solution. The oxidant-etchant solution (146) includes an etching agent (142), such as hydrofluoric acid, and an oxidizing agent (144), such as hydrogen peroxide. Etching (350) is performed for a period of time including agitating or stirring the etching solution (124). The etch time may be selected such that the etched silicon surface (116) has a reflectivity of less than about 15 percent such as 1 to 10 percent in a 350 to 1000 nanometer wavelength range.

  12. Dopant Selective Reactive Ion Etching of Silicon Carbide

    NASA Technical Reports Server (NTRS)

    Okojie, Robert (Inventor)

    2016-01-01

    A method for selectively etching a substrate is provided. In one embodiment, an epilayer is grown on top of the substrate. A resistive element may be defined and etched into the epilayer. On the other side of the substrate, the substrate is selectively etched up to the resistive element, leaving a suspended resistive element.

  13. Alternative process for thin layer etching: Application to nitride spacer etching stopping on silicon germanium

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Posseme, N., E-mail: nicolas.posseme@cea.fr; Pollet, O.; Barnola, S.

    2014-08-04

    Silicon nitride spacer etching realization is considered today as one of the most challenging of the etch process for the new devices realization. For this step, the atomic etch precision to stop on silicon or silicon germanium with a perfect anisotropy (no foot formation) is required. The situation is that none of the current plasma technologies can meet all these requirements. To overcome these issues and meet the highly complex requirements imposed by device fabrication processes, we recently proposed an alternative etching process to the current plasma etch chemistries. This process is based on thin film modification by light ionsmore » implantation followed by a selective removal of the modified layer with respect to the non-modified material. In this Letter, we demonstrate the benefit of this alternative etch method in term of film damage control (silicon germanium recess obtained is less than 6 A), anisotropy (no foot formation), and its compatibility with other integration steps like epitaxial. The etch mechanisms of this approach are also addressed.« less

  14. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Vazehrad, S., E-mail: vazehrad@kth.se; Elfsberg, J., E-mail: jessica.elfsberg@scania.com; Diószegi, A., E-mail: attila.dioszegi@jth.hj.se

    An investigation on silicon segregation of lamellar, compacted and nodular graphite iron was carried out by applying a selective, immersion color etching and a modified electron microprobe to study the microstructure. The color etched micrographs of the investigated cast irons by revealing the austenite phase have provided data about the chronology and mechanism of microstructure formation. Moreover, electron microprobe has provided two dimensional segregation maps of silicon. A good agreement was found between the segregation profile of silicon in the color etched microstructure and the silicon maps achieved by electron microprobe analysis. However, quantitative silicon investigation was found to bemore » more accurate than color etching results to study the size of the eutectic colonies. - Highlights: • Sensitivity of a color etchant to silicon segregation is quantitatively demonstrated. • Si segregation measurement by EMPA approved the results achieved by color etching. • Color etched micrographs provided data about solidification mechanism in cast irons. • Austenite grain boundaries were identified by measuring the local Si concentration.« less

  15. Metal-assisted chemical etch porous silicon formation method

    DOEpatents

    Li, Xiuling; Bohn, Paul W.; Sweedler, Jonathan V.

    2004-09-14

    A thin discontinuous layer of metal such as Au, Pt, or Au/Pd is deposited on a silicon surface. The surface is then etched in a solution including HF and an oxidant for a brief period, as little as a couple seconds to one hour. A preferred oxidant is H.sub.2 O.sub.2. Morphology and light emitting properties of porous silicon can be selectively controlled as a function of the type of metal deposited, Si doping type, silicon doping level, and/or etch time. Electrical assistance is unnecessary during the chemical etching of the invention, which may be conducted in the presence or absence of illumination.

  16. Direct comparison of the performance of commonly used e-beam resists during nano-scale plasma etching of Si, SiO2, and Cr

    NASA Astrophysics Data System (ADS)

    Goodyear, Andy; Boettcher, Monika; Stolberg, Ines; Cooke, Mike

    2015-03-01

    Electron beam writing remains one of the reference pattern generation techniques, and plasma etching continues to underpin pattern transfer. We report a systematic study of the plasma etch resistance of several e-beam resists, both negative and positive as well as classical and Chemically Amplified Resists: HSQ[1,2] (Dow Corning), PMMA[3] (Allresist GmbH), AR-P6200 (Allresist GmbH), ZEP520 (Zeon Corporation), CAN028 (TOK), CAP164 (TOK), and an additional pCAR (non-disclosed provider). Their behaviour under plasma exposure to various nano-scale plasma etch chemistries was examined (SF6/C4F8 ICP silicon etch, CHF3/Ar RIE SiO2 etch, Cl2/O2 RIE and ICP chrome etch, and HBr ICP silicon etch). Samples of each resist type were etched simultaneously to provide a direct comparison of their etch resistance. Resist thicknesses (and hence resist erosion rates) were measured by spectroscopic ellipsometer in order to provide the highest accuracy for the resist comparison. Etch selectivities (substrate:mask etch rate ratio) are given, with recommendations for the optimum resist choice for each type of etch chemistry. Silicon etch profiles are also presented, along with the exposure and etch conditions to obtain the most vertical nano-scale pattern transfer. We identify one resist that gave an unusually high selectivity for chlorinated and brominated etches which could enable pattern transfer below 10nm without an additional hard mask. In this case the resist itself acts as a hard mask. We also highlight the differing effects of fluorine and bromine-based Silicon etch chemistries on resist profile evolution and hence etch fidelity.

  17. Silicon etching using only Oxygen at high temperature: An alternative approach to Si micro-machining on 150 mm Si wafers

    NASA Astrophysics Data System (ADS)

    Chai, Jessica; Walker, Glenn; Wang, Li; Massoubre, David; Tan, Say Hwa; Chaik, Kien; Hold, Leonie; Iacopi, Alan

    2015-12-01

    Using a combination of low-pressure oxygen and high temperatures, isotropic and anisotropic silicon (Si) etch rates can be controlled up to ten micron per minute. By varying the process conditions, we show that the vertical-to-lateral etch rate ratio can be controlled from 1:1 isotropic etch to 1.8:1 anisotropic. This simple Si etching technique combines the main respective advantages of both wet and dry Si etching techniques such as fast Si etch rate, stiction-free, and high etch rate uniformity across a wafer. In addition, this alternative O2-based Si etching technique has additional advantages not commonly associated with dry etchants such as avoiding the use of halogens and has no toxic by-products, which improves safety and simplifies waste disposal. Furthermore, this process also exhibits very high selectivity (>1000:1) with conventional hard masks such as silicon carbide, silicon dioxide and silicon nitride, enabling deep Si etching. In these initial studies, etch rates as high as 9.2 μm/min could be achieved at 1150 °C. Empirical estimation for the calculation of the etch rate as a function of the feature size and oxygen flow rate are presented and used as proof of concepts.

  18. Selective dry etching of silicon containing anti-reflective coating

    NASA Astrophysics Data System (ADS)

    Sridhar, Shyam; Nolan, Andrew; Wang, Li; Karakas, Erdinc; Voronin, Sergey; Biolsi, Peter; Ranjan, Alok

    2018-03-01

    Multi-layer patterning schemes involve the use of Silicon containing Anti-Reflective Coating (SiARC) films for their anti-reflective properties. Patterning transfer completion requires complete and selective removal of SiARC which is very difficult due to its high silicon content (>40%). Typically, SiARC removal is accomplished through a non-selective etch during the pattern transfer process using fluorine containing plasmas, or an ex-situ wet etch process using hydrofluoric acid is employed to remove the residual SiARC, post pattern transfer. Using a non-selective etch may result in profile distortion or wiggling, due to distortion of the underlying organic layer. The drawbacks of using wet etch process for SiARC removal are increased overall processing time and the need for additional equipment. Many applications may involve patterning of active structures in a poly-Si layer with an underlying oxide stopping layer. In such applications, SiARC removal selective to oxide using a wet process may prove futile. Removing SiARC selectively to SiO2 using a dry etch process is also challenging, due to similarity in the nature of chemical bonds (Si - O) in the two materials. In this work, we present highly selective etching of SiARC, in a plasma driven by a surface wave radial line slot antenna. The first step in the process involves an in-situ modification of the SiARC layer in O2 plasma followed by selective etching in a NF3/H2 plasma. Surface treatment in O2 plasma resulted in enhanced etching of the SiARC layer. For the right processing conditions, in-situ NF3/H2 dry etch process demonstrated selectivity values greater than 15:1 with respect to SiO2. The etching chemistry, however, was sensitive to NF3:H2 gas ratio. For dilute NF3 in H2, no SiARC etching was observed. Presumably, this is due to the deposition of ammonium fluorosilicate layer that occurs for dilute NF3/H2 plasmas. Additionally, challenges involved in selective SiARC removal (selective to SiO2, organic and Si layers) post pattern transfer, in a multi-layer structure will be discussed.

  19. Silicon solar cells made by a self-aligned, selective-emitter, plasma-etchback process

    DOEpatents

    Ruby, Douglas S.; Schubert, William K.; Gee, James M.

    1999-01-01

    A potentially low-cost process for forming and passivating a selective emitter. The process uses a plasma etch of the heavily doped emitter to improve its performance. The grids of the solar cell are used to mask the plasma etch so that only the emitter in the region between the grids is etched, while the region beneath the grids remains heavily doped for low contact resistance. This process is potentially low-cost because it requires no alignment. After the emitter etch, a silicon nitride layer is deposited by plasma-enhanced, chemical vapor deposition, and the solar cell is annealed in a forming gas.

  20. Silicon solar cells made by a self-aligned, selective-emitter, plasma-etchback process

    DOEpatents

    Ruby, D.S.; Schubert, W.K.; Gee, J.M.

    1999-02-16

    A potentially low-cost process for forming and passivating a selective emitter. The process uses a plasma etch of the heavily doped emitter to improve its performance. The grids of the solar cell are used to mask the plasma etch so that only the emitter in the region between the grids is etched, while the region beneath the grids remains heavily doped for low contact resistance. This process is potentially low-cost because it requires no alignment. After the emitter etch, a silicon nitride layer is deposited by plasma-enhanced, chemical vapor deposition, and the solar cell is annealed in a forming gas. 5 figs.

  1. High-aspect ratio micro- and nanostructures enabled by photo-electrochemical etching for sensing and energy harvesting applications

    NASA Astrophysics Data System (ADS)

    Alhalaili, Badriyah; Dryden, Daniel M.; Vidu, Ruxandra; Ghandiparsi, Soroush; Cansizoglu, Hilal; Gao, Yang; Saif Islam, M.

    2018-03-01

    Photo-electrochemical (PEC) etching can produce high-aspect ratio features, such as pillars and holes, with high anisotropy and selectivity, while avoiding the surface and sidewall damage caused by traditional deep reactive ion etching (DRIE) or inductively coupled plasma (ICP) RIE. Plasma-based techniques lead to the formation of dangling bonds, surface traps, carrier leakage paths, and recombination centers. In pursuit of effective PEC etching, we demonstrate an optical system using long wavelength (λ = 975 nm) infra-red (IR) illumination from a high-power laser (1-10 W) to control the PEC etching process in n-type silicon. The silicon wafer surface was patterned with notches through a lithography process and KOH etching. Then, PEC etching was introduced by illuminating the backside of the silicon wafer to enhance depth, resulting in high-aspect ratio structures. The effect of the PEC etching process was optimized by varying light intensities and electrolyte concentrations. This work was focused on determining and optimizing this PEC etching technique on silicon, with the goal of expanding the method to a variety of materials including GaN and SiC that are used in designing optoelectronic and electronic devices, sensors and energy harvesting devices.

  2. Low-damage direct patterning of silicon oxide mask by mechanical processing

    PubMed Central

    2014-01-01

    To realize the nanofabrication of silicon surfaces using atomic force microscopy (AFM), we investigated the etching of mechanically processed oxide masks using potassium hydroxide (KOH) solution. The dependence of the KOH solution etching rate on the load and scanning density of the mechanical pre-processing was evaluated. Particular load ranges were found to increase the etching rate, and the silicon etching rate also increased with removal of the natural oxide layer by diamond tip sliding. In contrast, the local oxide pattern formed (due to mechanochemical reaction of the silicon) by tip sliding at higher load was found to have higher etching resistance than that of unprocessed areas. The profile changes caused by the etching of the mechanically pre-processed areas with the KOH solution were also investigated. First, protuberances were processed by diamond tip sliding at lower and higher stresses than that of the shearing strength. Mechanical processing at low load and scanning density to remove the natural oxide layer was then performed. The KOH solution selectively etched the low load and scanning density processed area first and then etched the unprocessed silicon area. In contrast, the protuberances pre-processed at higher load were hardly etched. The etching resistance of plastic deformed layers was decreased, and their etching rate was increased because of surface damage induced by the pre-processing. These results show that etching depth can be controlled by controlling the etching time through natural oxide layer removal and mechanochemical oxide layer formation. These oxide layer removal and formation processes can be exploited to realize low-damage mask patterns. PMID:24948891

  3. Alternating SiCl4/O2 passivation steps with SF6 etch steps for silicon deep etching

    NASA Astrophysics Data System (ADS)

    Duluard, C. Y.; Ranson, P.; Pichon, L. E.; Pereira, J.; Oubensaid, E. H.; Lefaucheux, P.; Puech, M.; Dussart, R.

    2011-06-01

    Deep etching of silicon has been investigated in an inductively coupled plasma etch reactor using short SiCl4/O2 plasma steps to passivate the sidewalls of the etched structures. A study was first carried out to define the appropriate parameters to create, at a substrate temperature of -20 °C, a passivation layer by SiCl4/O2 plasma that resists lateral chemical etching in SF6 plasma. The most efficient passivation layer was obtained for a SiCl4/O2 gas flow ratio of 2:1, a pressure of 1 Pa and a source power of 1000 W. Ex situ analyses on a film deposited with these parameters show that it is very rich in oxygen. Silicon etching processes that alternate SF6 plasma etch steps with SiCl4/O2 plasma passivation steps were then developed. Preliminary tests in pulsed-mode conditions have enabled etch rates greater than 2 µm min-1 with selectivities higher than 220. These results show that it is possible to develop a silicon deep etching process at substrate temperatures around -20 °C that uses low SiCl4 and O2 gas flows instead of conventional fluorocarbon gases for sidewall protection.

  4. Response of murine bone marrow-derived mesenchymal stromal cells to dry-etched porous silicon scaffolds.

    PubMed

    Hajj-Hassan, Mohamad; Khayyat-Kholghi, Maedeh; Wang, Huifen; Chodavarapu, Vamsy; Henderson, Janet E

    2011-11-01

    Porous silicon shows great promise as a bio-interface material due to its large surface to volume ratio, its stability in aqueous solutions and to the ability to precisely regulate its pore characteristics. In the current study, porous silicon scaffolds were fabricated from single crystalline silicon wafers by a novel xenon difluoride dry etching technique. This simplified dry etch fabrication process allows selective formation of porous silicon using a standard photoresist as mask material and eliminates the post-formation drying step typically required for the wet etching techniques, thereby reducing the risk of damaging the newly formed porous silicon. The porous silicon scaffolds supported the growth of primary cultures of bone marrow derived mesenchymal stromal cells (MSC) plated at high density for up to 21 days in culture with no significant loss of viability, assessed using Alamar Blue. Scanning electron micrographs confirmed a dense lawn of cells at 9 days of culture and the presence of MSC within the pores of the porous silicon scaffolds. Copyright © 2011 Wiley Periodicals, Inc.

  5. Etching Selectivity of Cr, Fe and Ni Masks on Si & SiO2 Wafers

    NASA Astrophysics Data System (ADS)

    Garcia, Jorge; Lowndes, Douglas H.

    2000-10-01

    During this Summer 2000 I joined the Semiconductors and Thin Films group led by Dr. Douglas H. Lowndes at Oak Ridge National Laboratory’s Solid State Division. Our objective was to evaluate the selectivity that Trifluoromethane (CHF3), and Sulfur Hexafluoride (SF6) plasmas have for Si, SiO2 wafers and the Ni, Cr, and Fe masks; being this etching selectivity the ratio of the etching rates of the plasmas for each of the materials. We made use of Silicon and Silicon Dioxide-coated wafers that have Fe, Cr or Ni masks. In the semiconductor field, metal layers are often used as masks to protect layers underneath during processing steps; when these wafers are taken to the dry etching process, both the wafer and the mask layers’ thickness are reduced.

  6. Fabrication Methods for Adaptive Deformable Mirrors

    NASA Technical Reports Server (NTRS)

    Toda, Risaku; White, Victor E.; Manohara, Harish; Patterson, Keith D.; Yamamoto, Namiko; Gdoutos, Eleftherios; Steeves, John B.; Daraio, Chiara; Pellegrino, Sergio

    2013-01-01

    Previously, it was difficult to fabricate deformable mirrors made by piezoelectric actuators. This is because numerous actuators need to be precisely assembled to control the surface shape of the mirror. Two approaches have been developed. Both approaches begin by depositing a stack of piezoelectric films and electrodes over a silicon wafer substrate. In the first approach, the silicon wafer is removed initially by plasmabased reactive ion etching (RIE), and non-plasma dry etching with xenon difluoride (XeF2). In the second approach, the actuator film stack is immersed in a liquid such as deionized water. The adhesion between the actuator film stack and the substrate is relatively weak. Simply by seeping liquid between the film and the substrate, the actuator film stack is gently released from the substrate. The deformable mirror contains multiple piezoelectric membrane layers as well as multiple electrode layers (some are patterned and some are unpatterned). At the piezolectric layer, polyvinylidene fluoride (PVDF), or its co-polymer, poly(vinylidene fluoride trifluoroethylene P(VDF-TrFE) is used. The surface of the mirror is coated with a reflective coating. The actuator film stack is fabricated on silicon, or silicon on insulator (SOI) substrate, by repeatedly spin-coating the PVDF or P(VDFTrFE) solution and patterned metal (electrode) deposition. In the first approach, the actuator film stack is prepared on SOI substrate. Then, the thick silicon (typically 500-micron thick and called handle silicon) of the SOI wafer is etched by a deep reactive ion etching process tool (SF6-based plasma etching). This deep RIE stops at the middle SiO2 layer. The middle SiO2 layer is etched by either HF-based wet etching or dry plasma etch. The thin silicon layer (generally called a device layer) of SOI is removed by XeF2 dry etch. This XeF2 etch is very gentle and extremely selective, so the released mirror membrane is not damaged. It is possible to replace SOI with silicon substrate, but this will require tighter DRIE process control as well as generally longer and less efficient XeF2 etch. In the second approach, the actuator film stack is first constructed on a silicon wafer. It helps to use a polyimide intermediate layer such as Kapton because the adhesion between the polyimide and silicon is generally weak. A mirror mount ring is attached by using adhesive. Then, the assembly is partially submerged in liquid water. The water tends to seep between the actuator film stack and silicon substrate. As a result, the actuator membrane can be gently released from the silicon substrate. The actuator membrane is very flat because it is fixed to the mirror mount prior to the release. Deformable mirrors require extremely good surface optical quality. In the technology described here, the deformable mirror is fabricated on pristine substrates such as prime-grade silicon wafers. The deformable mirror is released by selectively removing the substrate. Therefore, the released deformable mirror surface replicates the optical quality of the underlying pristine substrate.

  7. Sub-100-nm ordered silicon hole arrays by metal-assisted chemical etching

    PubMed Central

    2013-01-01

    Sub-100-nm silicon nanohole arrays were fabricated by a combination of the site-selective electroless deposition of noble metals through anodic porous alumina and the subsequent metal-assisted chemical etching. Under optimum conditions, the formation of deep straight holes with an ordered periodicity (e.g., 100 nm interval, 40 nm diameter, and high aspect ratio of 50) was successfully achieved. By using the present method, the fabrication of silicon nanohole arrays with 60-nm periodicity was also achieved. PMID:24090268

  8. Silicon Micromachined Microlens Array for THz Antennas

    NASA Technical Reports Server (NTRS)

    Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, IImran; Gill, John J.; Jung-Kubiak, Cecile D.; Llombart, Nuria

    2013-01-01

    5 5 silicon microlens array was developed using a silicon micromachining technique for a silicon-based THz antenna array. The feature of the silicon micromachining technique enables one to microfabricate an unlimited number of microlens arrays at one time with good uniformity on a silicon wafer. This technique will resolve one of the key issues in building a THz camera, which is to integrate antennas in a detector array. The conventional approach of building single-pixel receivers and stacking them to form a multi-pixel receiver is not suited at THz because a single-pixel receiver already has difficulty fitting into mass, volume, and power budgets, especially in space applications. In this proposed technique, one has controllability on both diameter and curvature of a silicon microlens. First of all, the diameter of microlens depends on how thick photoresist one could coat and pattern. So far, the diameter of a 6- mm photoresist microlens with 400 m in height has been successfully microfabricated. Based on current researchers experiences, a diameter larger than 1-cm photoresist microlens array would be feasible. In order to control the curvature of the microlens, the following process variables could be used: 1. Amount of photoresist: It determines the curvature of the photoresist microlens. Since the photoresist lens is transferred onto the silicon substrate, it will directly control the curvature of the silicon microlens. 2. Etching selectivity between photoresist and silicon: The photoresist microlens is formed by thermal reflow. In order to transfer the exact photoresist curvature onto silicon, there needs to be etching selectivity of 1:1 between silicon and photoresist. However, by varying the etching selectivity, one could control the curvature of the silicon microlens. The figure shows the microfabricated silicon microlens 5 x5 array. The diameter of the microlens located in the center is about 2.5 mm. The measured 3-D profile of the microlens surface has a smooth curvature. The measured height of the silicon microlens is about 280 microns. In this case, the original height of the photoresist was 210 microns. The change was due to the etching selectivity of 1.33 between photoresist and silicon. The measured surface roughness of the silicon microlens shows the peak-to-peak surface roughness of less than 0.5 microns, which is adequate in THz frequency. For example, the surface roughness should be less than 7 microns at 600 GHz range. The SEM (scanning electron microscope) image of the microlens confirms the smooth surface. The beam pattern at 550 GHz shows good directivity.

  9. Method for forming suspended micromechanical structures

    DOEpatents

    Fleming, James G.

    2000-01-01

    A micromachining method is disclosed for forming a suspended micromechanical structure from {111} crystalline silicon. The micromachining method is based on the use of anisotropic dry etching to define lateral features of the structure which are etched down into a {111}-silicon substrate to a first etch depth, thereby forming sidewalls of the structure. The sidewalls are then coated with a protection layer, and the substrate is dry etched to a second etch depth to define a spacing of the structure from the substrate. A selective anisotropic wet etchant (e.g. KOH, EDP, TMAH, NaOH or CsOH) is used to laterally undercut the structure between the first and second etch depths, thereby forming a substantially planar lower surface of the structure along a {111} crystal plane that is parallel to an upper surface of the structure. The lateral extent of undercutting by the wet etchant is controlled and effectively terminated by either timing the etching, by the location of angled {111}-silicon planes or by the locations of preformed etch-stops. This present method allows the formation of suspended micromechanical structures having large vertical dimensions and large masses while allowing for detailed lateral features which can be provided by dry etch definition. Additionally, the method of the present invention is compatible with the formation of electronic circuitry on the substrate.

  10. Copper-assisted, anti-reflection etching of silicon surfaces

    DOEpatents

    Toor, Fatima; Branz, Howard

    2014-08-26

    A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

  11. Fabrication of Cantilever-Bump Type Si Probe Card

    NASA Astrophysics Data System (ADS)

    Park, Jeong-Yong; Lee, Dong-Seok; Kim, Dong-Kwon; Lee, Jong-Hyun

    2000-12-01

    Probe card is most important part in the test system which selects the good or bad chip of integrated circuit (IC) chips. Silicon vertical probe card is able to test multiple semiconductor chips simultaneously. We presented cantilever-bump type vertical probe card. It was fabricated by dry etching using RIE(reactive ion etching) technique and porous silicon micromachining using silicon direct bonded (SDB) wafer. Cantilevers and bumps were fabricated by isotropic etching using RIE@. 3-dimensional structures were formed by porous silicon micromachining technique using SDB wafer. Contact resistance of fabricated probe card was less than 2 Ω and its life time was more than 200,000 turns. The process used in this work is very simple and reproducible, which has good controllability in the tip dimension and spacing. It is expected that the fabricated probe card can reduce testing time, can promote productivity and enables burn-in test.

  12. Fluorocarbon assisted atomic layer etching of SiO 2 and Si using cyclic Ar/C 4F 8 and Ar/CHF 3 plasma

    DOE PAGES

    Metzler, Dominik; Li, Chen; Engelmann, Sebastian; ...

    2015-11-11

    The need for atomic layer etching (ALE) is steadily increasing as smaller critical dimensions and pitches are required in device patterning. A flux-control based cyclic Ar/C 4F 8 ALE based on steady-state Ar plasma in conjunction with periodic, precise C 4F 8 injection and synchronized plasma-based low energy Ar + ion bombardment has been established for SiO 2. 1 In this work, the cyclic process is further characterized and extended to ALE of silicon under similar process conditions. The use of CHF 3 as a precursor is examined and compared to C 4F 8. CHF 3 is shown to enablemore » selective SiO 2/Si etching using a fluorocarbon (FC) film build up. Other critical process parameters investigated are the FC film thickness deposited per cycle, the ion energy, and the etch step length. Etching behavior and mechanisms are studied using in situ real time ellipsometry and X-ray photoelectron spectroscopy. Silicon ALE shows less self-limitation than silicon oxide due to higher physical sputtering rates for the maximum ion energies used in this work, ranged from 20 to 30 eV. The surface chemistry is found to contain fluorinated silicon oxide during the etching of silicon. As a result, plasma parameters during ALE are studied using a Langmuir probe and establish the impact of precursor addition on plasma properties.« less

  13. Porosity and thickness effect of porous silicon layer on photoluminescence spectra

    NASA Astrophysics Data System (ADS)

    Husairi, F. S.; Eswar, K. A.; Guliling, Muliyadi; Khusaimi, Z.; Rusop, M.; Abdullah, S.

    2018-05-01

    The porous silicon nanostructures was prepared by electrochemical etching of p-type silicon wafer. Porous silicon prepared by using different current density and fix etching time with assistance of halogen lamp. The physical structure of porous silicon measured by the parameters used which know as experimental factor. In this work, we select one of those factors to correlate which optical properties of porous silicon. We investigated the surface morphology by using Surface Profiler (SP) and photoluminescence using Photoluminescence (PL) spectrometer. Different physical characteristics of porous silicon produced when current density varied. Surface profiler used to measure the thickness of porous and the porosity calculated using mass different of silicon. Photoluminescence characteristics of porous silicon depend on their morphology because the size and distribution of pore its self will effect to their exciton energy level. At J=30 mA/cm2 the shorter wavelength produced and it followed the trend of porosity with current density applied.

  14. Silicon-based photonic crystals fabricated using proton beam writing combined with electrochemical etching method

    PubMed Central

    2012-01-01

    A method for fabrication of three-dimensional (3D) silicon nanostructures based on selective formation of porous silicon using ion beam irradiation of bulk p-type silicon followed by electrochemical etching is shown. It opens a route towards the fabrication of two-dimensional (2D) and 3D silicon-based photonic crystals with high flexibility and industrial compatibility. In this work, we present the fabrication of 2D photonic lattice and photonic slab structures and propose a process for the fabrication of 3D woodpile photonic crystals based on this approach. Simulated results of photonic band structures for the fabricated 2D photonic crystals show the presence of TE or TM gap in mid-infrared range. PMID:22824206

  15. Fabrication of thermal microphotonic sensors and sensor arrays

    DOEpatents

    Shaw, Michael J.; Watts, Michael R.; Nielson, Gregory N.

    2010-10-26

    A thermal microphotonic sensor is fabricated on a silicon substrate by etching an opening and a trench into the substrate, and then filling in the opening and trench with silicon oxide which can be deposited or formed by thermally oxidizing a portion of the silicon substrate surrounding the opening and trench. The silicon oxide forms a support post for an optical resonator which is subsequently formed from a layer of silicon nitride, and also forms a base for an optical waveguide formed from the silicon nitride layer. Part of the silicon substrate can be selectively etched away to elevate the waveguide and resonator. The thermal microphotonic sensor, which is useful to detect infrared radiation via a change in the evanescent coupling of light between the waveguide and resonator, can be formed as a single device or as an array.

  16. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Metzler, Dominik; Li, Chen; Engelmann, Sebastian

    The need for atomic layer etching (ALE) is steadily increasing as smaller critical dimensions and pitches are required in device patterning. A flux-control based cyclic Ar/C 4F 8 ALE based on steady-state Ar plasma in conjunction with periodic, precise C 4F 8 injection and synchronized plasma-based low energy Ar + ion bombardment has been established for SiO 2. 1 In this work, the cyclic process is further characterized and extended to ALE of silicon under similar process conditions. The use of CHF 3 as a precursor is examined and compared to C 4F 8. CHF 3 is shown to enablemore » selective SiO 2/Si etching using a fluorocarbon (FC) film build up. Other critical process parameters investigated are the FC film thickness deposited per cycle, the ion energy, and the etch step length. Etching behavior and mechanisms are studied using in situ real time ellipsometry and X-ray photoelectron spectroscopy. Silicon ALE shows less self-limitation than silicon oxide due to higher physical sputtering rates for the maximum ion energies used in this work, ranged from 20 to 30 eV. The surface chemistry is found to contain fluorinated silicon oxide during the etching of silicon. As a result, plasma parameters during ALE are studied using a Langmuir probe and establish the impact of precursor addition on plasma properties.« less

  17. Fabrication mechanism of friction-induced selective etching on Si(100) surface

    PubMed Central

    2012-01-01

    As a maskless nanofabrication technique, friction-induced selective etching can easily produce nanopatterns on a Si(100) surface. Experimental results indicated that the height of the nanopatterns increased with the KOH etching time, while their width increased with the scratching load. It has also found that a contact pressure of 6.3 GPa is enough to fabricate a mask layer on the Si(100) surface. To understand the mechanism involved, the cross-sectional microstructure of a scratched area was examined, and the mask ability of the tip-disturbed silicon layer was studied. Transmission electron microscope observation and scanning Auger nanoprobe analysis suggested that the scratched area was covered by a thin superficial oxidation layer followed by a thick distorted (amorphous and deformed) layer in the subsurface. After the surface oxidation layer was removed by HF etching, the residual amorphous and deformed silicon layer on the scratched area can still serve as an etching mask in KOH solution. The results may help to develop a low-destructive, low-cost, and flexible nanofabrication technique suitable for machining of micro-mold and prototype fabrication in micro-systems. PMID:22356699

  18. Fabrication mechanism of friction-induced selective etching on Si(100) surface.

    PubMed

    Guo, Jian; Song, Chenfei; Li, Xiaoying; Yu, Bingjun; Dong, Hanshan; Qian, Linmao; Zhou, Zhongrong

    2012-02-23

    As a maskless nanofabrication technique, friction-induced selective etching can easily produce nanopatterns on a Si(100) surface. Experimental results indicated that the height of the nanopatterns increased with the KOH etching time, while their width increased with the scratching load. It has also found that a contact pressure of 6.3 GPa is enough to fabricate a mask layer on the Si(100) surface. To understand the mechanism involved, the cross-sectional microstructure of a scratched area was examined, and the mask ability of the tip-disturbed silicon layer was studied. Transmission electron microscope observation and scanning Auger nanoprobe analysis suggested that the scratched area was covered by a thin superficial oxidation layer followed by a thick distorted (amorphous and deformed) layer in the subsurface. After the surface oxidation layer was removed by HF etching, the residual amorphous and deformed silicon layer on the scratched area can still serve as an etching mask in KOH solution. The results may help to develop a low-destructive, low-cost, and flexible nanofabrication technique suitable for machining of micro-mold and prototype fabrication in micro-systems.

  19. Design and grayscale fabrication of beamfanners in a silicon substrate

    NASA Astrophysics Data System (ADS)

    Ellis, Arthur Cecil

    2001-11-01

    This dissertation addresses important first steps in the development of a grayscale fabrication process for multiple phase diffractive optical elements (DOS's) in silicon. Specifically, this process was developed through the design, fabrication, and testing of 1-2 and 1-4 beamfanner arrays for 5-micron illumination. The 1-2 beamfanner arrays serve as a test-of- concept and basic developmental step toward the construction of the 1-4 beamfanners. The beamfanners are 50 microns wide, and have features with dimensions of between 2 and 10 microns. The Iterative Annular Spectrum Approach (IASA) method, developed by Steve Mellin of UAH, and the Boundary Element Method (BEM) are the design and testing tools used to create the beamfanner profiles and predict their performance. Fabrication of the beamfanners required the techniques of grayscale photolithography and reactive ion etching (RIE). A 2-3micron feature size 1-4 silicon beamfanner array was fabricated, but the small features and contact photolithographic techniques available prevented its construction to specifications. A second and more successful attempt was made in which both 1-4 and 1-2 beamfanner arrays were fabricated with a 5-micron minimum feature size. Photolithography for the UAH array was contracted to MEMS-Optical of Huntsville, Alabama. A repeatability study was performed, using statistical techniques, of 14 photoresist arrays and the subsequent RIE process used to etch the arrays in silicon. The variance in selectivity between the 14 processes was far greater than the variance between the individual etched features within each process. Specifically, the ratio of the variance of the selectivities averaged over each of the 14 etch processes to the variance of individual feature selectivities within the processes yielded a significance level below 0.1% by F-test, indicating that good etch-to-etch process repeatability was not attained. One of the 14 arrays had feature etch-depths close enough to design specifications for optical testing, but 5- micron IR illumination of the 1-4 and 1-2 beamfanners yielded no convincing results of beam splitting in the detector plane 340 microns from the surface of the beamfanner array.

  20. Method of inducing differential etch rates in glow discharge produced amorphous silicon

    DOEpatents

    Staebler, David L.; Zanzucchi, Peter J.

    1980-01-01

    A method of inducing differential etch rates in glow discharge produced amorphous silicon by heating a portion of the glow discharge produced amorphous silicon to a temperature of about 365.degree. C. higher than the deposition temperature prior to etching. The etch rate of the exposed amorphous silicon is less than the unheated amorphous silicon.

  1. Selective doping of silicon nanowires by means of electron beam stimulated oxide etching.

    PubMed

    Pennelli, G; Totaro, M; Piotto, M

    2012-02-08

    Direct patterning of silicon dioxide by means of electron beam stimulated etching is shown, and a full characterization of exposure dose is presented. For its high dose, this technique is unsuitable for large areas but can be usefully employed like a precision scalpel for removing silicon dioxide by well-localized points. In this work, this technique is applied to the definition of windows through the oxide surrounding top down fabricated n-doped silicon nanowires. These windows will be employed for a selective doping of the nanowire by boron diffusion. In this way, pn junctions can be fabricated in well-localized points in the longitudinal direction of the nanowire, and an electrical contact to the different junctions can be provided. Electrical I-V characteristics of a nanowire with pn longitudinal junctions are reported and discussed. © 2012 American Chemical Society

  2. Selective Etching of Silicon in Preference to Germanium and Si0.5Ge0.5.

    PubMed

    Ahles, Christopher F; Choi, Jong Youn; Wolf, Steven; Kummel, Andrew C

    2017-06-21

    The selective etching characteristics of silicon, germanium, and Si 0.5 Ge 0.5 subjected to a downstream H 2 /CF 4 /Ar plasma have been studied using a pair of in situ quartz crystal microbalances (QCMs) and X-ray photoelectron spectroscopy (XPS). At 50 °C and 760 mTorr, Si can be etched in preference to Ge and Si 0.5 Ge 0.5 , with an essentially infinite Si/Ge etch-rate ratio (ERR), whereas for Si/Si 0.5 Ge 0.5 , the ERR is infinite at 22 °C and 760 mTorr. XPS data showed that the selectivity is due to the differential suppression of etching by a ∼2 ML thick C x H y F z layer formed by the H 2 /CF 4 /Ar plasma on Si, Ge, and Si 0.5 Ge 0.5 . The data are consistent with the less exothermic reaction of fluorine radicals with Ge or Si 0.5 Ge 0.5 being strongly suppressed by the C x H y F z layer, whereas, on Si, the C x H y F z layer is not sufficient to completely suppress etching. Replacing H 2 with D 2 in the feed gas resulted in an inverse kinetic isotope effect (IKIE) where the Si and Si 0.5 Ge 0.5 etch rates were increased by ∼30 times with retention of significant etch selectivity. The use of D 2 /CF 4 /Ar instead of H 2 /CF 4 /Ar resulted in less total carbon deposition on Si and Si 0.5 Ge 0.5 and gave less Ge enrichment of Si 0.5 Ge 0.5 . These results are consistent with the selectivity being due to the differential suppression of etching by an angstrom-scale carbon layer.

  3. Fabrication of 3D surface structures using grayscale lithography

    NASA Astrophysics Data System (ADS)

    Stilson, Christopher; Pal, Rajan; Coutu, Ronald A.

    2014-03-01

    The ability to design and develop 3D microstructures is important for microelectromechanical systems (MEMS) fabrication. Previous techniques used to create 3D devices included tedious steps in direct writing and aligning patterns onto a substrate followed by multiple photolithography steps using expensive, customized equipment. Additionally, these techniques restricted batch processing and placed limits on achievable shapes. Gray-scale lithography enables the fabrication of a variety of shapes using a single photolithography step followed by reactive ion etching (RIE). Micromachining 3D silicon structures for MEMS can be accomplished using gray-scale lithography along with dry anisotropic etching. In this study, we investigated: using MATLAB for mask designs; feasibility of using 1 μm Heidelberg mask maker to direct write patterns onto photoresist; using RIE processing to etch patterns into a silicon substrate; and the ability to tailor etch selectivity for precise fabrication. To determine etch rates and to obtain desired etch selectivity, parameters such as gas mixture, gas flow, and electrode power were studied. This process successfully demonstrates the ability to use gray-scale lithography and RIE for use in the study of micro-contacts. These results were used to produce a known engineered non-planer surface for testing micro-contacts. Surface structures are between 5 μm and 20 μm wide with varying depths and slopes based on mask design and etch rate selectivity. The engineered surfaces will provide more insight into contact geometries and failure modes of fixed-fixed micro-contacts.

  4. Integration of Electrodeposited Ni-Fe in MEMS with Low-Temperature Deposition and Etch Processes

    PubMed Central

    Schiavone, Giuseppe; Murray, Jeremy; Perry, Richard; Mount, Andrew R.; Desmulliez, Marc P. Y.; Walton, Anthony J.

    2017-01-01

    This article presents a set of low-temperature deposition and etching processes for the integration of electrochemically deposited Ni-Fe alloys in complex magnetic microelectromechanical systems, as Ni-Fe is known to suffer from detrimental stress development when subjected to excessive thermal loads. A selective etch process is reported which enables the copper seed layer used for electrodeposition to be removed while preserving the integrity of Ni-Fe. In addition, a low temperature deposition and surface micromachining process is presented in which silicon dioxide and silicon nitride are used, respectively, as sacrificial material and structural dielectric. The sacrificial layer can be patterned and removed by wet buffered oxide etch or vapour HF etching. The reported methods limit the thermal budget and minimise the stress development in Ni-Fe. This combination of techniques represents an advance towards the reliable integration of Ni-Fe components in complex surface micromachined magnetic MEMS. PMID:28772683

  5. Nanofabrication of insulated scanning probes for electromechanical imaging in liquid solutions

    PubMed Central

    Noh, Joo Hyon; Nikiforov, Maxim; Kalinin, Sergei V.; Vertegel, Alexey A.; Rack, Philip D.

    2011-01-01

    In this paper, the fabrication and electrical and electromechanical characterization of insulated scanning probes have been demonstrated in liquid solutions. The silicon cantilevers were sequentially coated with chromium and silicon dioxide, and the silicon dioxide was selectively etched at tip apex using focused electron beam induced etching (FEBIE) with XeF2 The chromium layer acted not only as the conductive path from the tip, but also as an etch resistant layer. This insulated scanning probe fabrication process is compatible with any commercial AFM tip and can be used to easily tailor the scanning probe tip properties because FEBIE does not require lithography. The suitability of the fabricated probes is demonstrated by imaging of standard topographical calibration grid as well as piezoresponse force microscopy (PFM) and electrical measurements in ambient and liquid environments. PMID:20702930

  6. Selective hierarchical patterning of silicon nanostructures via soft nanostencil lithography

    NASA Astrophysics Data System (ADS)

    Du, Ke; Ding, Junjun; Wathuthanthri, Ishan; Choi, Chang-Hwan

    2017-11-01

    It is challenging to hierarchically pattern high-aspect-ratio nanostructures on microstructures using conventional lithographic techniques, where photoresist (PR) film is not able to uniformly cover on the microstructures as the aspect ratio increases. Such non-uniformity causes poor definition of nanopatterns over the microstructures. Nanostencil lithography can provide an alternative means to hierarchically construct nanostructures on microstructures via direct deposition or plasma etching through a free-standing nanoporous membrane. In this work, we demonstrate the multiscale hierarchical fabrication of high-aspect-ratio nanostructures on microstructures of silicon using a free-standing nanostencil, which is a nanoporous membrane consisting of metal (Cr), PR, and anti-reflective coating. The nanostencil membrane is used as a deposition mask to define Cr nanodot patterns on the predefined silicon microstructures. Then, deep reactive ion etching is used to hierarchically create nanostructures on the microstructures using the Cr nanodots as an etch mask. With simple modification of the main fabrication processes, high-aspect-ratio nanopillars are selectively defined only on top of the microstructures, on bottom, or on both top and bottom.

  7. Selective hierarchical patterning of silicon nanostructures via soft nanostencil lithography.

    PubMed

    Du, Ke; Ding, Junjun; Wathuthanthri, Ishan; Choi, Chang-Hwan

    2017-11-17

    It is challenging to hierarchically pattern high-aspect-ratio nanostructures on microstructures using conventional lithographic techniques, where photoresist (PR) film is not able to uniformly cover on the microstructures as the aspect ratio increases. Such non-uniformity causes poor definition of nanopatterns over the microstructures. Nanostencil lithography can provide an alternative means to hierarchically construct nanostructures on microstructures via direct deposition or plasma etching through a free-standing nanoporous membrane. In this work, we demonstrate the multiscale hierarchical fabrication of high-aspect-ratio nanostructures on microstructures of silicon using a free-standing nanostencil, which is a nanoporous membrane consisting of metal (Cr), PR, and anti-reflective coating. The nanostencil membrane is used as a deposition mask to define Cr nanodot patterns on the predefined silicon microstructures. Then, deep reactive ion etching is used to hierarchically create nanostructures on the microstructures using the Cr nanodots as an etch mask. With simple modification of the main fabrication processes, high-aspect-ratio nanopillars are selectively defined only on top of the microstructures, on bottom, or on both top and bottom.

  8. Silicon etching of difluoromethane atmospheric pressure plasma jet combined with its spectroscopic analysis

    NASA Astrophysics Data System (ADS)

    Sung, Yu-Ching; Wei, Ta-Chin; Liu, You-Chia; Huang, Chun

    2018-06-01

    A capacitivly coupled radio-frequency double-pipe atmospheric-pressure plasma jet is used for etching. An argon carrier gas is supplied to the plasma discharge jet; and CH2F2 etch gas is inserted into the plasma discharge jet, near the silicon substrate. Silicon etchings rate can be efficiently-controlled by adjusting the feeding etching gas composition and plasma jet operating parameters. The features of silicon etched by the plasma discharge jet are discussed in order to spatially spreading plasma species. Electronic excitation temperature and electron density are detected by increasing plasma power. The etched silicon profile exhibited an anisotropic shape and the etching rate was maximum at the total gas flow rate of 4500 sccm and CH2F2 concentration of 11.1%. An etching rate of 17 µm/min was obtained at a plasma power of 100 W.

  9. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Metzler, Dominik; Oehrlein, Gottlieb S., E-mail: oehrlein@umd.edu; Li, Chen

    The need for atomic layer etching (ALE) is steadily increasing as smaller critical dimensions and pitches are required in device patterning. A flux-control based cyclic Ar/C{sub 4}F{sub 8} ALE based on steady-state Ar plasma in conjunction with periodic, precise C{sub 4}F{sub 8} injection and synchronized plasma-based low energy Ar{sup +} ion bombardment has been established for SiO{sub 2} [Metzler et al., J. Vac. Sci. Technol. A 32, 020603 (2014)]. In this work, the cyclic process is further characterized and extended to ALE of silicon under similar process conditions. The use of CHF{sub 3} as a precursor is examined and comparedmore » to C{sub 4}F{sub 8}. CHF{sub 3} is shown to enable selective SiO{sub 2}/Si etching using a fluorocarbon (FC) film build up. Other critical process parameters investigated are the FC film thickness deposited per cycle, the ion energy, and the etch step length. Etching behavior and mechanisms are studied using in situ real time ellipsometry and x-ray photoelectron spectroscopy. Silicon ALE shows less self-limitation than silicon oxide due to higher physical sputtering rates for the maximum ion energies used in this work, ranged from 20 to 30 eV. The surface chemistry is found to contain fluorinated silicon oxide during the etching of silicon. Plasma parameters during ALE are studied using a Langmuir probe and establish the impact of precursor addition on plasma properties.« less

  10. The Selective Epitaxy of Silicon at Low Temperatures.

    NASA Astrophysics Data System (ADS)

    Lou, Jen-Chung

    1991-01-01

    This dissertation has developed a process for the selective epitaxial growth (SEG) of silicon at low temperatures using a dichlorosilane-hydrogen mixture in a hot-wall low pressure chemical vapor deposition (LPCVD) reactor. Some basic issues concerning the quality of epilayers --substrate preparation, ex-situ and in-situ cleaning, and deposition cycle, have been studied. We find it necessary to use a plasma etch to open epitaxial windows for the SEG of Si. A cycled plasma etch, a thin sacrificial oxide growth, and an oxide etching step can completely remove plasma-etch-induced surface damage and contaminants, which result in high quality epilayers. A practical wafer cleaning step is developed for low temperature Si epitaxial growth. An ex-situ HF vapor treatment can completely remove chemical oxide from the silicon surface and retard the reoxidation of the silicon surface. An in-situ low-concentration DCS cycle can aid in decomposition of surface oxide during a 900 ^circC H_2 prebake step. An HF vapor treatment combined with a low-concentration of DCS cycle consistently achieves defect-free epilayers at 850^circC and lower temperatures. We also show that a BF_sp{2}{+ } or F^+ ion implantation is a potential ex-situ wafer cleaning process for SEG of Si at low temperatures. The mechanism for the formation of surface features on Si epilayers is also discussed. Based on O ^+ ion implantation, we showed that the oxygen incorporation in silicon epilayers suppresses the Si growth rate. Therefore, we attribute the formation of surface features to the local reduction of the Si growth rate due to the dissolution of oxide islands at the epi/substrate interface. Finally, with this developed process for the SEG of silicon, defect-free overgrown epilayers are also obtained. This achievement demonstrates the feasibility for the future silicon-on-oxide (SOI) manufacturing technology.

  11. Sidewall patterning—a new wafer-scale method for accurate patterning of vertical silicon structures

    NASA Astrophysics Data System (ADS)

    Westerik, P. J.; Vijselaar, W. J. C.; Berenschot, J. W.; Tas, N. R.; Huskens, J.; Gardeniers, J. G. E.

    2018-01-01

    For the definition of wafer scale micro- and nanostructures, in-plane geometry is usually controlled by optical lithography. However, options for precisely patterning structures in the out-of-plane direction are much more limited. In this paper we present a versatile self-aligned technique that allows for reproducible sub-micrometer resolution local modification along vertical silicon sidewalls. Instead of optical lithography, this method makes smart use of inclined ion beam etching to selectively etch the top parts of structures, and controlled retraction of a conformal layer to define a hard mask in the vertical direction. The top, bottom or middle part of a structure could be selectively exposed, and it was shown that these exposed regions can, for example, be selectively covered with a catalyst, doped, or structured further.

  12. Etching characteristics of Si{110} in 20 wt% KOH with addition of hydroxylamine for the fabrication of bulk micromachined MEMS

    NASA Astrophysics Data System (ADS)

    Rao, A. V. Narasimha; Swarnalatha, V.; Pal, P.

    2017-12-01

    Anisotropic wet etching is a most widely employed for the fabrication of MEMS/NEMS structures using silicon bulk micromachining. The use of Si{110} in MEMS is inevitable when a microstructure with vertical sidewall is to be fabricated using wet anisotropic etching. In most commonly employed etchants (i.e. TMAH and KOH), potassium hydroxide (KOH) exhibits higher etch rate and provides improved anisotropy between Si{111} and Si{110} planes. In the manufacturing company, high etch rate is demanded to increase the productivity that eventually reduces the cost of end product. In order to modify the etching characteristics of KOH for the micromachining of Si{110}, we have investigated the effect of hydroxylamine (NH2OH) in 20 wt% KOH solution. The concentration of NH2OH is varied from 0 to 20% and the etching is carried out at 75 °C. The etching characteristics which are studied in this work includes the etch rates of Si{110} and silicon dioxide, etched surface morphology, and undercutting at convex corners. The etch rate of Si{110} in 20 wt% KOH + 15% NH2OH solution is measured to be four times more than that of pure 20 wt% KOH. Moreover, the addition of NH2OH increases the undercutting at convex corners and enhances the etch selectivity between Si and SiO2.

  13. Selective formation of porous silicon

    NASA Technical Reports Server (NTRS)

    Fathauer, Jones (Inventor)

    1993-01-01

    A pattern of porous silicon is produced in the surface of a silicon substrate by forming a pattern of crystal defects in said surface, preferably by applying an ion milling beam through openings in a photoresist layer to the surface, and then exposing said surface to a stain etchant, such as HF:HNO3:H20. The defected crystal will preferentially etch to form a pattern of porous silicon. When the amorphous content of the porous silicon exceeds 70 percent, the porous silicon pattern emits visible light at room temperature.

  14. Arrays of quasi-hexagonally ordered silica nanopillars with independently controlled areal density, diameter and height gradients

    NASA Astrophysics Data System (ADS)

    Özdemir, Burcin; Huang, Wenting; Plettl, Alfred; Ziemann, Paul

    2015-03-01

    A consecutive fabrication approach of independently tailored gradients of the topographical parameters distance, diameter and height in arrays of well-ordered nanopillars on smooth SiO2-Si-wafers is presented. For this purpose, previously reported preparation techniques are further developed and combined. First, self-assembly of Au-salt loaded micelles by dip-coating with computer-controlled pulling-out velocities and subsequent hydrogen plasma treatment produce quasi-hexagonally ordered, 2-dimensional arrays of Au nanoparticles (NPs) with unidirectional variations of the interparticle distances along the pulling direction between 50-120 nm. Second, the distance (or areal density) gradient profile received in this way is superimposed with a diameter-controlled gradient profile of the NPs applying a selective photochemical growth technique. For demonstration, a 1D shutter is used for locally defined UV exposure times to prepare Au NP size gradients varying between 12 and 30 nm. Third, these double-gradient NP arrangements serve as etching masks in a following reactive ion etching step delivering arrays of nanopillars. For height gradient generation, the etching time is locally controlled by applying a shutter made from Si wafer piece. Due to the high flexibility of the etching process, the preparation route works on various materials such as cover slips, silicon, silicon oxide, silicon nitride and silicon carbide.

  15. Effect of tetramethylammonium hydroxide/isopropyl alcohol wet etching on geometry and surface roughness of silicon nanowires fabricated by AFM lithography

    PubMed Central

    Yusoh, Siti Noorhaniah

    2016-01-01

    Summary The optimization of etchant parameters in wet etching plays an important role in the fabrication of semiconductor devices. Wet etching of tetramethylammonium hydroxide (TMAH)/isopropyl alcohol (IPA) on silicon nanowires fabricated by AFM lithography is studied herein. TMAH (25 wt %) with different IPA concentrations (0, 10, 20, and 30 vol %) and etching time durations (30, 40, and 50 s) were investigated. The relationships between etching depth and width, and etching rate and surface roughness of silicon nanowires were characterized in detail using atomic force microscopy (AFM). The obtained results indicate that increased IPA concentration in TMAH produced greater width of the silicon nanowires with a smooth surface. It was also observed that the use of a longer etching time causes more unmasked silicon layers to be removed. Importantly, throughout this study, wet etching with optimized parameters can be applied in the design of the devices with excellent performance for many applications. PMID:27826521

  16. Chemical method for producing smooth surfaces on silicon wafers

    DOEpatents

    Yu, Conrad

    2003-01-01

    An improved method for producing optically smooth surfaces in silicon wafers during wet chemical etching involves a pre-treatment rinse of the wafers before etching and a post-etching rinse. The pre-treatment with an organic solvent provides a well-wetted surface that ensures uniform mass transfer during etching, which results in optically smooth surfaces. The post-etching treatment with an acetic acid solution stops the etching instantly, preventing any uneven etching that leads to surface roughness. This method can be used to etch silicon surfaces to a depth of 200 .mu.m or more, while the finished surfaces have a surface roughness of only 15-50 .ANG. (RMS).

  17. Fabrication of frequency selective surface for band stop IR-filter

    NASA Astrophysics Data System (ADS)

    Mishra, Akshita; Sudheer, Tiwari, P.; Mondal, P.; Bhatt, H.; Rai, V. N.; Srivastava, A. K.

    2016-05-01

    Fabrication and characterization of frequency selective surfaces (FSS) on silicon dioxide/ silicon is reported. Electron beam lithography based techniques are used for the fabrication of periodic slot structure in tungsten layer on silicon dioxide/silicon. The fabrication process consists of growth of SiO2 on silicon, tungsten deposition, electron beam lithography, and wet etching of tungsten. The optical characterization of the structural pattern was carried out using fourier transform infrared spectroscopy (FTIR). The reflectance spectra clearly show a resonance peak at 9.09 µm in the mid infrared region. This indicates that the patterned surface acts as band stop filter in the mid-infrared region.

  18. TOPICAL REVIEW: Black silicon method X: a review on high speed and selective plasma etching of silicon with profile control: an in-depth comparison between Bosch and cryostat DRIE processes as a roadmap to next generation equipment

    NASA Astrophysics Data System (ADS)

    Jansen, H V; de Boer, M J; Unnikrishnan, S; Louwerse, M C; Elwenspoek, M C

    2009-03-01

    An intensive study has been performed to understand and tune deep reactive ion etch (DRIE) processes for optimum results with respect to the silicon etch rate, etch profile and mask etch selectivity (in order of priority) using state-of-the-art dual power source DRIE equipment. The research compares pulsed-mode DRIE processes (e.g. Bosch technique) and mixed-mode DRIE processes (e.g. cryostat technique). In both techniques, an inhibitor is added to fluorine-based plasma to achieve directional etching, which is formed out of an oxide-forming (O2) or a fluorocarbon (FC) gas (C4F8 or CHF3). The inhibitor can be introduced together with the etch gas, which is named a mixed-mode DRIE process, or the inhibitor can be added in a time-multiplexed manner, which will be termed a pulsed-mode DRIE process. Next, the most convenient mode of operation found in this study is highlighted including some remarks to ensure proper etching (i.e. step synchronization in pulsed-mode operation and heat control of the wafer). First of all, for the fabrication of directional profiles, pulsed-mode DRIE is far easier to handle, is more robust with respect to the pattern layout and has the potential of achieving much higher mask etch selectivity, whereas in a mixed-mode the etch rate is higher and sidewall scalloping is prohibited. It is found that both pulsed-mode CHF3 and C4F8 are perfectly suited to perform high speed directional etching, although they have the drawback of leaving the FC residue at the sidewalls of etched structures. They show an identical result when the flow of CHF3 is roughly 30 times the flow of C4F8, and the amount of gas needed for a comparable result decreases rapidly while lowering the temperature from room down to cryogenic (and increasing the etch rate). Moreover, lowering the temperature lowers the mask erosion rate substantially (and so the mask selectivity improves). The pulsed-mode O2 is FC-free but shows only tolerable anisotropic results at -120 °C. The downside of needing liquid nitrogen to perform cryogenic etching can be improved by using a new approach in which both the pulsed and mixed modes are combined into the so-called puffed mode. Alternatively, the use of tetra-ethyl-ortho-silicate (TEOS) as a silicon oxide precursor is proposed to enable sufficient inhibiting strength and improved profile control up to room temperature. Pulsed-mode processing, the second important aspect, is commonly performed in a cycle using two separate steps: etch and deposition. Sometimes, a three-step cycle is adopted using a separate step to clean the bottom of etching features. This study highlights an issue, known by the authors but not discussed before in the literature: the need for proper synchronization between gas and bias pulses to explore the benefit of three steps. The transport of gas from the mass flow controller towards the wafer takes time, whereas the application of bias to the wafer is relatively instantaneous. This delay causes a problem with respect to synchronization when decreasing the step time towards a value close to the gas residence time. It is proposed to upgrade the software with a delay time module for the bias pulses to be in pace with the gas pulses. If properly designed, the delay module makes it possible to switch on the bias exactly during the arrival of the gas for the bottom removal step and so it will minimize the ionic impact because now etch and deposition steps can be performed virtually without bias. This will increase the mask etch selectivity and lower the heat impact significantly. Moreover, the extra bottom removal step can be performed at (also synchronized!) low pressure and therefore opens a window for improved aspect ratios. The temperature control of the wafer, a third aspect of this study, at a higher etch rate and longer etch time, needs critical attention, because it drastically limits the DRIE performance. It is stressed that the exothermic reaction (high silicon loading) and ionic impact (due to metallic masks and/or exposed silicon) are the main sources of heat that might raise the wafer temperature uncontrollably, and they show the weakness of the helium backside technique using mechanical clamping. Electrostatic clamping, an alternative technique, should minimize this problem because it is less susceptible to heat transfer when its thermal resistance and the gap of the helium backside cavity are minimized; however, it is not a subject of the current study. Because oxygen-growth-based etch processes (due to their ultra thin inhibiting layer) rely more heavily on a constant wafer temperature than fluorocarbon-based processes, oxygen etches are more affected by temperature fluctuations and drifts during the etching. The fourth outcome of this review is a phenomenological model, which explains and predicts many features with respect to loading, flow and pressure behaviour in DRIE equipment including a diffusion zone. The model is a reshape of the flow model constructed by Mogab, who studied the loading effect in plasma etching. Despite the downside of needing a cryostat, it is shown that—when selecting proper conditions—a cryogenic two-step pulsed mode can be used as a successful technique to achieve high speed and selective plasma etching with an etch rate around 25 µm min-1 (<1% silicon load) with nearly vertical walls and resist etch selectivity beyond 1000. With the model in hand, it can be predicted that the etch rate can be doubled (50 µm min-1 at an efficiency of 33% for the fluorine generation from the SF6 feed gas) by minimizing the time the free radicals need to pass the diffusion zone. It is anticipated that this residence time can be reduced sufficiently by a proper inductive coupled plasma (ICP) source design (e.g. plasma shower head and concentrator). In order to preserve the correct profile at such high etch rates, the pressure during the bottom removal step should be minimized and, therefore, the synchronized three-step pulsed mode is believed to be essential to reach such high etch rates with sufficient profile control. In order to improve the etch rate even further, the ICP power should be enhanced; the upgrading of the turbopump seems not yet to be relevant because the throttle valve in the current study had to be used to restrict the turbo efficiency. In order to have a versatile list of state-of-the-art references, it has been decided to arrange it in subjects. The categories concerning plasma physics and applications are, for example, books, reviews, general topics, fluorine-based plasmas, plasma mixtures with oxygen at room temperature, wafer heat transfer and high aspect ratio trench (HART) etching. For readers 'new' to this field, it is advisable to study at least one (but rather more than one) of the reviews concerning plasma as found in the first 30 references. In many cases, a paper can be classified into more than one category. In such cases, the paper is directed to the subject most suited for the discussion of the current review. For example, many papers on heat transfer also treat cryogenic conditions and all the references dealing with highly anisotropic behaviour have been directed to the category HARTs. Additional pointers could get around this problem but have the disadvantage of creating a kind of written spaghetti. I hope that the adapted organization structure will help to have a quick look at and understanding of current developments in high aspect ratio plasma etching. Enjoy reading... Henri Jansen 18 June 2008

  19. Implementation of atomic layer etching of silicon: Scaling parameters, feasibility, and profile control

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ranjan, Alok, E-mail: alok.ranjan@us.tel.com; Wang, Mingmei; Sherpa, Sonam D.

    2016-05-15

    Atomic or layer by layer etching of silicon exploits temporally segregated self-limiting adsorption and material removal steps to mitigate the problems associated with continuous or quasicontinuous (pulsed) plasma processes: selectivity loss, damage, and profile control. Successful implementation of atomic layer etching requires careful choice of the plasma parameters for adsorption and desorption steps. This paper illustrates how process parameters can be arrived at through basic scaling exercises, modeling and simulation, and fundamental experimental tests of their predictions. Using chlorine and argon plasma in a radial line slot antenna plasma source as a platform, the authors illustrate how cycle time, ionmore » energy, and radical to ion ratio can be manipulated to manage the deviation from ideality when cycle times are shortened or purges are incomplete. Cell based Monte Carlo feature scale modeling is used to illustrate profile outcomes. Experimental results of atomic layer etching processes are illustrated on silicon line and space structures such that iso-dense bias and aspect ratio dependent free profiles are produced. Experimental results also illustrate the profile control margin as processes move from atomic layer to multilayer by layer etching. The consequence of not controlling contamination (e.g., oxygen) is shown to result in deposition and roughness generation.« less

  20. Highly selective dry etching of GaP in the presence of AlxGa1–xP with a SiCl4/SF6 plasma

    NASA Astrophysics Data System (ADS)

    Hönl, Simon; Hahn, Herwig; Baumgartner, Yannick; Czornomaz, Lukas; Seidler, Paul

    2018-05-01

    We present an inductively coupled-plasma reactive-ion etching process that simultaneously provides both a high etch rate and unprecedented selectivity for gallium phosphide (GaP) in the presence of aluminum gallium phosphide (AlxGa1–xP). Utilizing mixtures of silicon tetrachloride (SiCl4) and sulfur hexafluoride (SF6), selectivities exceeding 2700:1 are achieved at GaP etch rates above 3000 nm min‑1. A design of experiments has been employed to investigate the influence of the inductively coupled-plasma power, the chamber pressure, the DC bias and the ratio of SiCl4 to SF6. The process enables the use of thin AlxGa1–xP stop layers even at aluminum contents of a few percent.

  1. Sputtered gold mask for deep chemical etching of silicon

    NASA Technical Reports Server (NTRS)

    Pisciotta, B. P.; Gross, C.; Olive, R. S.

    1975-01-01

    Sputtered mask resists chemical attack from acid and has adherence to withstand prolonged submergence in etch solution without lifting from silicon surface. Even under prolonged etch conditions with significant undercutting, gold mask maintained excellent adhesion to silicon surface and imperviousness to acid.

  2. Electroless epitaxial etching for semiconductor applications

    DOEpatents

    McCarthy, Anthony M.

    2002-01-01

    A method for fabricating thin-film single-crystal silicon on insulator substrates using electroless etching for achieving efficient etch stopping on epitaxial silicon substrates. Microelectric circuits and devices are prepared on epitaxial silicon wafers in a standard fabrication facility. The wafers are bonded to a holding substrate. The silicon bulk is removed using electroless etching leaving the circuit contained within the epitaxial layer remaining on the holding substrate. A photolithographic operation is then performed to define streets and wire bond pad areas for electrical access to the circuit.

  3. Method for deposition of a conductor in integrated circuits

    DOEpatents

    Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

    1997-01-01

    A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

  4. Effect of helium ion beam treatment on wet etching of silicon dioxide

    NASA Astrophysics Data System (ADS)

    Petrov, Yu. V.; Grigoryev, E. A.; Sharov, T. V.; Baraban, A. P.

    2018-03-01

    We investigated the effect of helium ion beam treatment on the etching rate of silicon dioxide in a water based solution of hydrofluoric acid. A 460-nm-thick silicon dioxide film on silicon was irradiated with helium ions having energies of 20 keV and 30 keV with ion fluences ranging from 1014 cm-2 to 1017 cm-2. The dependence of the etching rate on depth was obtained and compared with the depth distribution of ion-induced defects, which was obtained from numerical simulation. Irradiation with helium ions results in an increase of the etching rate of silicon dioxide. The dependence of the etching rate on the calculated concentration of ion-induced defects is described.

  5. Self-aligned nanoforest in silicon nanowire for sensitive conductance modulation.

    PubMed

    Seol, Myeong-Lok; Ahn, Jae-Hyuk; Choi, Ji-Min; Choi, Sung-Jin; Choi, Yang-Kyu

    2012-11-14

    A self-aligned and localized nanoforest structure is constructed in a top-down fabricated silicon nanowire (SiNW). The surface-to-volume ratio (SVR) of the SiNW is enhanced due to the local nanoforest formation. The conductance modulation property of the SiNWs, which is an important characteristic in sensor and charge transfer based applications, can be largely enhanced. For the selective modification of the channel region, localized Joule-heating and subsequent metal-assisted chemical etching (mac-etch) are employed. The nanoforest is formed only in the channel region without misalignment due to the self-aligned process of Joule-heating. The modified SiNW is applied to a porphyrin-silicon hybrid device to verify the enhanced conductance modulation. The charge transfer efficiency between the porphyrin and the SiNW, which is caused by external optical excitation, is clearly increased compared to the initial SiNW. The effect of the local nanoforest formation is enhanced when longer etching times and larger widths are used.

  6. Selective formation of porous silicon

    NASA Technical Reports Server (NTRS)

    Fathauer, Robert W. (Inventor); Jones, Eric W. (Inventor)

    1993-01-01

    A pattern of porous silicon is produced in the surface of a silicon substrate by forming a pattern of crystal defects in said surface, preferably by applying an ion milling beam through openings in a photoresist layer to the surface, and then exposing said surface to a stain etchant, such as HF:HNO3:H2O. The defected crystal will preferentially etch to form a pattern of porous silicon. When the amorphous content of the porous silicon exceeds 70 percent, the porous silicon pattern emits visible light at room temperature.

  7. Formation of nanostructured silicon surfaces by stain etching

    PubMed Central

    2014-01-01

    In this work, we report the fabrication of ordered silicon structures by chemical etching of silicon in vanadium oxide (V2O5)/hydrofluoric acid (HF) solution. The effects of the different etching parameters including the solution concentration, temperature, and the presence of metal catalyst film deposition (Pd) on the morphologies and reflective properties of the etched Si surfaces were studied. Scanning electron microscopy (SEM) was carried out to explore the morphologies of the etched surfaces with and without the presence of catalyst. In this case, the attack on the surfaces with a palladium deposit begins by creating uniform circular pores on silicon in which we distinguish the formation of pyramidal structures of silicon. Fourier transform infrared spectroscopy (FTIR) demonstrates that the surfaces are H-terminated. A UV-Vis-NIR spectrophotometer was used to study the reflectance of the structures obtained. A reflectance of 2.21% from the etched Si surfaces in the wavelength range of 400 to 1,000 nm was obtained after 120 min of etching while it is of 4.33% from the Pd/Si surfaces etched for 15 min. PMID:25435830

  8. Heterogeneous processes in CF4/O2 plasmas probed using laser-induced fluorescence of CF2

    NASA Astrophysics Data System (ADS)

    Hansen, S. G.; Luckman, G.; Nieman, George C.; Colson, Steven D.

    1990-09-01

    Laser-induced fluorescence of CF2 is used to monitor heterogeneous processes in ≊300 mTorr CF4/O2 plasmas. CF2 is rapidly removed at fluorinated copper and silver surfaces in 13.56-MHz rf discharges as judged by a distinct dip in its spatial distribution. These metals, when employed as etch masks, are known to accelerate plasma etching of silicon, and the present results suggest catalytic dehalogenation of CF2 is involved in this process. In contrast, aluminum and silicon dioxide exhibit negligible reactivity with CF2, which suggests that aluminum masks will not appreciably accelerate silicon etching and that ground state CF2 does not efficiently etch silicon dioxide. Measurement of CF2 decay in a pulsed discharge coupled with direct laser sputtering of metal into the gas phase indicates the interaction between CF2 and the active metals is purely heterogeneous. Aluminum does, however, exhibit homogeneous reactivity with CF2. Redistribution of active metal by plasma sputtering readily occurs; silicon etch rates may also be enhanced by the metal's presence on the silicon surface. Polymers contribute CF2 to the plasma as they etch. The observation of an induction period suggests fluorination of the polymer surface is the first step in its degradation. Polymeric etch masks can therefore depress the silicon etch rate by removal of F atoms, the primary etchants.

  9. Molecular transport through nanoporous silicon nitride membranes produced from self-assembling block copolymers.

    PubMed

    Montagne, Franck; Blondiaux, Nicolas; Bojko, Alexandre; Pugin, Raphaël

    2012-09-28

    To achieve fast and selective molecular filtration, membrane materials must ideally exhibit a thin porous skin and a high density of pores with a narrow size distribution. Here, we report the fabrication of nanoporous silicon nitride membranes (NSiMs) at the full wafer scale using a versatile process combining block copolymer (BCP) self-assembly and conventional photolithography/etching techniques. In our method, self-assembled BCP micelles are used as templates for creating sub-100 nm nanopores in a thin low-stress silicon nitride layer, which is then released from the underlying silicon wafer by etching. The process yields 100 nm thick free-standing NSiMs of various lateral dimensions (up to a few mm(2)). We show that the membranes exhibit a high pore density, while still retaining excellent mechanical strength. Permeation experiments reveal that the molecular transport rate across NSiMs is up to 16-fold faster than that of commercial polymeric membranes. Moreover, using dextran molecules of various molecular weights, we also demonstrate that size-based separation can be achieved with a very good selectivity. These new silicon nanosieves offer a relevant technological alternative to commercially available ultra- and microfiltration membranes for conducting high resolution biomolecular separations at small scales.

  10. Study of surface reaction during selective epitaxy growth of silicon by thermodynamic analysis and density functional theory calculation

    NASA Astrophysics Data System (ADS)

    Mayangsari, Tirta R.; Yusup, Luchana L.; Park, Jae-Min; Blanquet, Elisabeth; Pons, Michel; Jung, Jongwan; Lee, Won-Jun

    2017-06-01

    We modeled and simulated the surface reaction of silicon precursor on different surfaces by thermodynamic analysis and density functional theory calculation. We considered SiH2Cl2 and argon as the silicon precursor and the carrier gas without etchant gas. First, the equilibrium composition of both gaseous and solid species was analyzed as a function of process temperature. SiCl4 is the dominant gaseous species at below 750 °C, and SiCl2 and HCl are dominant at higher temperatures, and the yield of silicon decreases with increasing temperature over 700 °C due to the etching of silicon by HCl. The yield of silicon for SiO2 substrate is lower than that for silicon substrate, especially at 1000 °C or higher. Zero deposition yield and the etching of SiO2 substrate at higher temperatures leads to selective growth on silicon substrate. Next, the adsorption and the reaction of silicon precursor was simulated on H-terminated silicon (100) substrate and on OH-terminated β-cristobalite substrate. The adsorption and reaction of a SiH2Cl2 molecule are spontaneous for both Si and SiO2 substrates. However, the energy barrier for reaction is very small (6×10-4 eV) for Si substrate, whereas the energy barrier is high (0.33 eV) for SiO2 substrate. This makes the differences in growth rate, which also supports the experimental results in literature.

  11. Fabrication of ultra-high aspect ratio (>160:1) silicon nanostructures by using Au metal assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Li, Hailiang; Ye, Tianchun; Shi, Lina; Xie, Changqing

    2017-12-01

    We present a facile and effective approach for fabricating high aspect ratio, dense and vertical silicon nanopillar arrays, using a combination of metal etching following electron-beam lithography and Au metal assisted chemical etching (MacEtch). Ti/Au nanostructures used as catalysts in MacEtch are formed by single layer resist-based electron-beam exposure followed by ion beam etching. The effects of MacEtch process parameters, including half period, etching time, the concentrations of H2O2 and HF, etching temperature and drying method are systematically investigated. Especially, we demonstrate an enhancement of etching quality by employing cold MacEtch process, and an enhancement in preventing the collapse of high aspect ratio nanostructures by employing low surface tension rinse liquid and natural evaporation in the drying stage. Using an optimized MacEtch process, vertical silicon nanopillar arrays with a period of 250 nm and aspect ratio up to 160:1 are realized. Our results should be instructive for exploring the achievable aspect ratio limit in silicon nanostructures and may find potential applications in photovoltaic devices, thermoelectric devices and x-ray diffractive optics.

  12. Tuning of structural, light emission and wetting properties of nanostructured copper oxide-porous silicon matrix formed on electrochemically etched copper-coated silicon substrates

    NASA Astrophysics Data System (ADS)

    Naddaf, M.

    2017-01-01

    Matrices of copper oxide-porous silicon nanostructures have been formed by electrochemical etching of copper-coated silicon surfaces in HF-based solution at different etching times (5-15 min). Micro-Raman, X-ray diffraction and X-ray photoelectron spectroscopy results show that the nature of copper oxide in the matrix changes from single-phase copper (I) oxide (Cu2O) to single-phase copper (II) oxide (CuO) on increasing the etching time. This is accompanied with important variation in the content of carbon, carbon hydrides, carbonyl compounds and silicon oxide in the matrix. The matrix formed at the low etching time (5 min) exhibits a single broad "blue" room-temperature photoluminescence (PL) band. On increasing the etching time, the intensity of this band decreases and a much stronger "red" PL band emerges in the PL spectra. The relative intensity of this band with respect to the "blue" band significantly increases on increasing the etching time. The "blue" and "red" PL bands are attributed to Cu2O and porous silicon of the matrix, respectively. In addition, the water contact angle measurements reveal that the hydrophobicity of the matrix surface can be tuned from hydrophobic to superhydrophobic state by controlling the etching time.

  13. Single-crystal silicon trench etching for fabrication of highly integrated circuits

    NASA Astrophysics Data System (ADS)

    Engelhardt, Manfred

    1991-03-01

    The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

  14. Fabrication of frequency selective surface for band stop IR-filter

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mishra, Akshita, E-mail: akshitamishra27@gmail.com; Sudheer,; Tiwari, P.

    2016-05-23

    Fabrication and characterization of frequency selective surfaces (FSS) on silicon dioxide/ silicon is reported. Electron beam lithography based techniques are used for the fabrication of periodic slot structure in tungsten layer on silicon dioxide/silicon. The fabrication process consists of growth of SiO{sub 2} on silicon, tungsten deposition, electron beam lithography, and wet etching of tungsten. The optical characterization of the structural pattern was carried out using fourier transform infrared spectroscopy (FTIR). The reflectance spectra clearly show a resonance peak at 9.09 µm in the mid infrared region. This indicates that the patterned surface acts as band stop filter in the mid-infraredmore » region.« less

  15. High Aspect Ratio Sub-15 nm Silicon Trenches From Block Copolymer Templates

    NASA Astrophysics Data System (ADS)

    Gu, Xiaodan; Liu, Zuwei; Gunkel, Ilja; Olynick, Deirdre; Russell, Thomas; University of Massachusetts Amherst Collaboration; Oxford Instrument Collaboration; Lawrence Berkeley National Lab Collaboration

    2013-03-01

    High-aspect-ratio sub-15 nm silicon trenches are fabricated directly from plasma etching of a block copolymer (BCP) mask. Polystyrene-b-poly(2-vinyl pyridine) (PS-b-P2VP) 40k-b-18k was spin coated and solvent annealed to form cylindrical structures parallel to the silicon substrate. The BCP thin film was reconstructed by immersion in ethanol and then subjected to an oxygen and argon reactive ion etching to fabricate the polymer mask. A low temperature ion coupled plasma with sulfur hexafluoride and oxygen was used to pattern transfer block copolymer structure to silicon with high selectivity (8:1) and fidelity. The silicon pattern was characterized by scanning electron microscopy and grazing incidence x-ray scattering. We also demonstrated fabrication of silicon nano-holes using polystyrene-b-polyethylene oxide (PS-b-PEO) using same methodology described above for PS-b-P2VP. Finally, we show such silicon nano-strucutre serves as excellent nano-imprint master template to pattern various functional materials like poly 3-hexylthiophene (P3HT).

  16. Comparison of fabrication methods for microstructured deep UV multimode waveguides based on fused silica

    NASA Astrophysics Data System (ADS)

    Elmlinger, Philipp; Schreivogel, Martin; Schmid, Marc; Kaiser, Myriam; Priester, Roman; Sonström, Patrick; Kneissl, Michael

    2016-04-01

    The suitability of materials for deep ultraviolet (DUV) waveguides concerning transmittance, fabrication, and coupling properties is investigated and a fused silica core/ambient air cladding waveguide system is presented. This high refractive index contrast system has far better coupling efficiency especially for divergent light sources like LEDs and also a significantly smaller critical bending radius compared to conventional waveguide systems, as simulated by ray-tracing simulations. For the fabrication of 300-ffm-thick multimode waveguides a hydrouoric (HF) acid based wet etch process is compared to selective laser etching (SLE). In order to fabricate thick waveguides out of 300-ffm-thick silica wafers by HF etching, two masking materials, LPCVD silicon nitride and LPCVD poly silicon, are investigated. Due to thermal stress, the silicon nitride deposited wafers show cracks and even break. Using poly silicon as a masking material, no cracks are observed and deep etching in 50 wt% HF acid up to 180 min is performed. While the masked and unmasked silica surface is almost unchanged in terms of roughness, notching defects occur at the remaining polysilicon edge leading to jagged sidewalls. Using SLE, waveguides with high contour accuracy are fabricated and the DUV guiding properties are successfully demonstrated with propagation losses between 0.6 and 0:8 dB=mm. These values are currently limited by sidewall scattering losses.

  17. Plasma etching a ceramic composite. [evaluating microstructure

    NASA Technical Reports Server (NTRS)

    Hull, David R.; Leonhardt, Todd A.; Sanders, William A.

    1992-01-01

    Plasma etching is found to be a superior metallographic technique for evaluating the microstructure of a ceramic matrix composite. The ceramic composite studied is composed of silicon carbide whiskers (SiC(sub W)) in a matrix of silicon nitride (Si3N4), glass, and pores. All four constituents are important in evaluating the microstructure of the composite. Conventionally prepared samples, both as-polished or polished and etched with molten salt, do not allow all four constituents to be observed in one specimen. As-polished specimens allow examination of the glass phase and porosity, while molten salt etching reveals the Si3N4 grain size by removing the glass phase. However, the latter obscures the porosity. Neither technique allows the SiC(sub W) to be distinguished from the Si3N4. Plasma etching with CF4 + 4 percent O2 selectively attacks the Si3N4 grains, leaving SiC(sub W) and glass in relief, while not disturbing the pores. An artifact of the plasma etching reaction is the deposition of a thin layer of carbon on Si3N4, allowing Si3N4 grains to be distinguished from SiC(sub W) by back scattered electron imaging.

  18. Micro benchtop optics by bulk silicon micromachining

    DOEpatents

    Lee, Abraham P.; Pocha, Michael D.; McConaghy, Charles F.; Deri, Robert J.

    2000-01-01

    Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.

  19. Selective Growth of Metallic and Semiconducting Single Walled Carbon Nanotubes on Textured Silicon.

    PubMed

    Jang, Mira; Lee, Jongtaek; Park, Teahee; Lee, Junyoung; Yang, Jonghee; Yi, Whikun

    2016-03-01

    We fabricated the etched Si substrate having the pyramidal pattern size from 0.5 to 4.2 μm by changing the texturing process parameters, i.e., KOH concentration, etching time, and temperature. Single walled carbon nanotubes (SWNTs) were then synthesized on the etched Si substrates with different pyramidal pattern by chemical vapor deposition. We investigated the optical and electronic properties of SWNT film grown on the etched Si substrates of different morphology by using scanning electron microscopy, Raman spectroscopy and conducting probe atomic force microscopy. We confirmed that the morphology of substrate strongly affected the selective growth of the SWNT film. Semiconducting SWNTs were formed on larger pyramidal sized Si wafer with higher ratio compared with SWNTs on smaller pyramidal sized Si.

  20. Porous silicon carbide (SIC) semiconductor device

    NASA Technical Reports Server (NTRS)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1996-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  1. Stain-etched porous silicon nanostructures for multicrystalline silicon-based solar cells

    NASA Astrophysics Data System (ADS)

    Ben Rabha, M.; Hajji, M.; Belhadj Mohamed, S.; Hajjaji, A.; Gaidi, M.; Ezzaouia, H.; Bessais, B.

    2012-02-01

    In this paper, we study the optical, optoelectronic and photoluminescence properties of stain-etched porous silicon nanostructures obtained with different etching times. Special attention is given to the use of the stain-etched PS as an antireflection coating as well as for surface passivating capabilities. The surface morphology has been analyzed by scanning electron microscopy. The evolution of the Si-O and Si-H absorption bands was analyzed by Fourier transform infrared spectrometry before and after PS treatment. Results show that stain etching of the silicon surface drops the total reflectivity to about 7% in the 400-1100 nm wavelength range and the minority carrier lifetime enhances to about 48 μs.

  2. Capabilities of ICP-RIE cryogenic dry etching of silicon: review of exemplary microstructures

    NASA Astrophysics Data System (ADS)

    Sökmen, Ü.; Stranz, A.; Fündling, S.; Wehmann, H.-H.; Bandalo, V.; Bora, A.; Tornow, M.; Waag, A.; Peiner, E.

    2009-10-01

    Inductively coupled plasma (ICP) cryogenic dry etching was used to etch submicron pores, nano contact lines, submicron diameter pillars, thin and thick cantilevers, membrane structures and anisotropic deep structures with high aspect ratios in silicon for bio-nanoelectronics, optoelectronics and nano-micro electromechanical systems (NMEMS). The ICP cryogenic dry etching gives us the advantage of switching plasmas between etch rates of 13 nm min-1 and 4 µm min-1 for submicron pores and for membrane structures, respectively. A very thin photoresist mask can endure at -75 °C even during etching 70 µm deep for cantilevers and 300 µm deep for membrane structures. Coating the backsides of silicon membrane substrates with a thin photoresist film inhibited the lateral etching of cantilevers during their front release. Between -95 °C and -140 °C, we realized crystallographic-plane-dependent etching that creates facets only at the etch profile bottom. By varying the oxygen content and the process temperature, we achieved good control over the shape of the etched structures. The formation of black silicon during membrane etching down to 300 µm was delayed by reducing the oxygen content.

  3. Eliminating dependence of hole depth on aspect ratio by forming ammonium bromide during plasma etching of deep holes in silicon nitride and silicon dioxide

    NASA Astrophysics Data System (ADS)

    Iwase, Taku; Yokogawa, Kenetsu; Mori, Masahito

    2018-06-01

    The reaction mechanism during etching to fabricate deep holes in SiN/SiO2 stacks by using a HBr/N2/fluorocarbon-based gas plasma was investigated. To etch SiN and SiO2 films simultaneously, HBr/fluorocarbon gas mixture ratio was controlled to achieve etching selectivity closest to one. Deep holes were formed in the SiN/SiO2 stacks by one-step etching at several temperatures. The surface composition of the cross section of the holes was analyzed by time-of-flight secondary-ion mass spectrometry. It was found that bromine ions (considered to be derived from NH4Br) were detected throughout the holes in the case of low-temperature etching. It was also found that the dependence of hole depth on aspect ratio decreases as temperature decreases, and it becomes significantly weaker at a substrate temperature of 20 °C. It is therefore concluded that the formation of NH4Br supplies the SiN/SiO2 etchant to the bottom of the holes. Such a finding will make it possible to alleviate the decrease in etching rate due to a high aspect ratio.

  4. Method for deposition of a conductor in integrated circuits

    DOEpatents

    Creighton, J.R.; Dominguez, F.; Johnson, A.W.; Omstead, T.R.

    1997-09-02

    A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten. 2 figs.

  5. Triangle pore arrays fabricated on Si (111) substrate by sphere lithography combined with metal-assisted chemical etching and anisotropic chemical etching

    NASA Astrophysics Data System (ADS)

    Asoh, Hidetaka; Fujihara, Kosuke; Ono, Sachiko

    2012-07-01

    The morphological change of silicon macropore arrays formed by metal-assisted chemical etching using shape-controlled Au thin film arrays was investigated during anisotropic chemical etching in tetramethylammonium hydroxide (TMAH) aqueous solution. After the deposition of Au as the etching catalyst on (111) silicon through a honeycomb mask prepared by sphere lithography, the specimens were etched in a mixed solution of HF and H2O2 at room temperature, resulting in the formation of ordered macropores in silicon along the [111] direction, which is not achievable by conventional chemical etching without a catalyst. In the anisotropic etching in TMAH, the macropores changed from being circular to being hexagonal and finally to being triangular, owing to the difference in etching rate between the crystal planes.

  6. Making Porous Luminescent Regions In Silicon Wafers

    NASA Technical Reports Server (NTRS)

    Fathauer, Robert W.; Jones, Eric W.

    1994-01-01

    Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

  7. Method for providing an arbitrary three-dimensional microstructure in silicon using an anisotropic deep etch

    DOEpatents

    Morales, Alfredo M.; Gonzales, Marcela

    2004-06-15

    The present invention describes a method for fabricating an embossing tool or an x-ray mask tool, providing microstructures that smoothly vary in height from point-to-point in etched substrates, i.e., structure which can vary in all three dimensions. The process uses a lithographic technique to transfer an image pattern in the surface of a silicon wafer by exposing and developing the resist and then etching the silicon substrate. Importantly, the photoresist is variably exposed so that when developed some of the resist layer remains. The remaining undeveloped resist acts as an etchant barrier to the reactive plasma used to etch the silicon substrate and therefore provides the ability etch structures of variable depths.

  8. Ultra-Sensitive Magnetoresistive Displacement Sensing Device

    NASA Technical Reports Server (NTRS)

    Olivas, John D. (Inventor); Lairson, Bruce M. (Inventor); Ramesham, Rajeshuni (Inventor)

    2003-01-01

    An ultrasensitive displacement sensing device for use in accelerometers, pressure gauges, temperature transducers, and the like, comprises a sputter deposited, multilayer, magnetoresistive field sensor with a variable electrical resistance based on an imposed magnetic field. The device detects displacement by sensing changes in the local magnetic field about the magnetoresistive field sensor caused by the displacement of a hard magnetic film on a movable microstructure. The microstructure, which may be a cantilever, membrane, bridge, or other microelement, moves under the influence of an acceleration a known displacement predicted by the configuration and materials selected, and the resulting change in the electrical resistance of the MR sensor can be used to calculate the displacement. Using a micromachining approach, very thin silicon and silicon nitride membranes are fabricated in one preferred embodiment by means of anisotropic etching of silicon wafers. Other approaches include reactive ion etching of silicon on insulator (SOI), or Low Pressure Chemical Vapor Deposition of silicon nitride films over silicon substrates. The device is found to be improved with the use of giant magnetoresistive elements to detect changes in the local magnetic field.

  9. Method of fabricating porous silicon carbide (SiC)

    NASA Technical Reports Server (NTRS)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1995-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  10. Silicon Carbide Etching Using Chlorine Trifluoride Gas

    NASA Astrophysics Data System (ADS)

    Habuka, Hitoshi; Oda, Satoko; Fukai, Yasushi; Fukae, Katsuya; Takeuchi, Takashi; Aihara, Masahiko

    2005-03-01

    The etch rate, chemical reactions and etched surface of β-silicon carbide are studied in detail using chlorine trifluoride gas. The etch rate is greater than 10 μm min-1 at 723 K with a flow rate of 0.1 \\ell min-1 at atmospheric pressure in a horizontal reactor. The maximum etch rate at a substrate temperature of 773 K is 40 μm min-1 with a flow rate of 0.25 \\ell min-1. The step-like pattern that initially exists on the β-silicon carbide surface tends to be smoothed; the root-mean-square surface roughness decreases from its initial value of 5 μm to 1 μm within 15 min; this minimum value is maintained for more than 15 min. Therefore, chlorine trifluoride gas is considered to have a large etch rate for β-silicon carbide associated with making a rough surface smooth.

  11. Silicon nanowire photodetectors made by metal-assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Xu, Ying; Ni, Chuan; Sarangan, Andrew

    2016-09-01

    Silicon nanowires have unique optical effects, and have potential applications in photodetectors. They can exhibit simple optical effects such as anti-reflection, but can also produce quantum confined effects. In this work, we have fabricated silicon photodetectors, and then post-processed them by etching nanowires on the incident surface. These nanowires were produced by a wet-chemical etching process known as the metal-assisted-chemical etching, abbreviated as MACE. N-type silicon substrates were doped by thermal diffusion from a solid ceramic source, followed by etching, patterning and contact metallization. The detectors were first tested for functionality and optical performance. The nanowires were then made by depositing an ultra-thin film of gold below its percolation thickness to produce an interconnected porous film. This was then used as a template to etch high aspect ratio nanowires into the face of the detectors with a HF:H2O2 mixture.

  12. Enhanced performance of solar cells with optimized surface recombination and efficient photon capturing via anisotropic-etching of black silicon

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chen, H. Y.; Peng, Y., E-mail: gdyuan@semi.ac.cn, E-mail: py@usst.edu.cn; Hong, M.

    2014-05-12

    We report an enhanced conversion efficiency of femtosecond-laser treated silicon solar cells by surface modification of anisotropic-etching. The etching improves minority carrier lifetime inside modified black silicon area substantially; moreover, after the etching, an inverted pyramids/upright pyramids mixed texture surface is obtained, which shows better photon capturing capability than that of conventional pyramid texture. Combing of these two merits, the reformed solar cells show higher conversion efficiency than that of conventional pyramid textured cells. This work presents a way for fabricating high performance silicon solar cells, which can be easily applied to mass-production.

  13. New 3D structuring process for non-integrated circuit related technologies (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Nouri, Lamia; Possémé, Nicolas; Landis, Stéfan; Milesi, Frédéric; Gaillard, Frédéric-Xavier

    2017-04-01

    Fabrication processes that microelectronic developed for Integrated circuit (IC) technologies for decades, do not meet the new emerging structuration's requirements, in particular non-IC related technologies one, such as MEMS/NEMS, Micro-Fluidics, photovoltaics, lenses. Actually complex 3D structuration requires complex lithography patterning approaches such as gray-scale electron beam lithography, laser ablation, focused ion beam lithography, two photon polymerization. It is now challenging to find cheaper and easiest technique to achieve 3D structures. In this work, we propose a straightforward process to realize 3D structuration, intended for silicon based materials (Si, SiN, SiOCH). This structuration technique is based on nano-imprint lithography (NIL), ion implantation and selective wet etching. In a first step a pattern is performed by lithography on a substrate, then ion implantation is realized through a resist mask in order to create localized modifications in the material, thus the pattern is transferred into the subjacent layer. Finally, after the resist stripping, a selective wet etching is carried out to remove selectively the modified material regarding the non-modified one. In this paper, we will first present results achieved with simple 2D line array pattern processed either on Silicon or SiOCH samples. This step have been carried out to demonstrate the feasibility of this new structuration process. SEM pictures reveals that "infinite" selectivity between the implanted areas versus the non-implanted one could be achieved. We will show that a key combination between the type of implanted ion species and wet etching chemistries is required to obtain such results. The mechanisms understanding involved during both implantation and wet etching processes will also be presented through fine characterizations with Photoluminescence, Raman and Secondary Ion Mass Spectrometry (SIMS) for silicon samples, and ellipso-porosimetry and Fourier Transform InfraRed spectroscopy (FTIR) for SiOCH samples. Finally the benefit of this new patterning approach will be presented on 3D patterns structures.

  14. Multi-Step Deep Reactive Ion Etching Fabrication Process for Silicon-Based Terahertz Components

    NASA Technical Reports Server (NTRS)

    Reck, Theodore (Inventor); Perez, Jose Vicente Siles (Inventor); Lee, Choonsup (Inventor); Cooper, Ken B. (Inventor); Jung-Kubiak, Cecile (Inventor); Mehdi, Imran (Inventor); Chattopadhyay, Goutam (Inventor); Lin, Robert H. (Inventor); Peralta, Alejandro (Inventor)

    2016-01-01

    A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

  15. Chemical Etching of Zinc Oxide for Thin-Film Silicon Solar Cells

    PubMed Central

    Hüpkes, Jürgen; Owen, Jorj I; Pust, Sascha E; Bunte, Eerke

    2012-01-01

    Abstract Chemical etching is widely applied to texture the surface of sputter-deposited zinc oxide for light scattering in thin-film silicon solar cells. Based on experimental findings from the literature and our own results we propose a model that explains the etching behavior of ZnO depending on the structural material properties and etching agent. All grain boundaries are prone to be etched to a certain threshold, that is defined by the deposition conditions and etching solution. Additionally, several approaches to modify the etching behavior through special preparation and etching steps are provided. PMID:22162035

  16. Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

    NASA Technical Reports Server (NTRS)

    Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

    2016-01-01

    The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

  17. 3D-fabrication of tunable and high-density arrays of crystalline silicon nanostructures

    NASA Astrophysics Data System (ADS)

    Wilbers, J. G. E.; Berenschot, J. W.; Tiggelaar, R. M.; Dogan, T.; Sugimura, K.; van der Wiel, W. G.; Gardeniers, J. G. E.; Tas, N. R.

    2018-04-01

    In this report, a procedure for the 3D-nanofabrication of ordered, high-density arrays of crystalline silicon nanostructures is described. Two nanolithography methods were utilized for the fabrication of the nanostructure array, viz. displacement Talbot lithography (DTL) and edge lithography (EL). DTL is employed to perform two (orthogonal) resist-patterning steps to pattern a thin Si3N4 layer. The resulting patterned double layer serves as an etch mask for all further etching steps for the fabrication of ordered arrays of silicon nanostructures. The arrays are made by means of anisotropic wet etching of silicon in combination with an isotropic retraction etch step of the etch mask, i.e. EL. The procedure enables fabrication of nanostructures with dimensions below 15 nm and a potential density of 1010 crystals cm-2.

  18. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chen, Yu; School of Mechanical and Electrical Engineering, Wuhan Institute of Technology, Wuhan 430073; Guo, Zhiguang, E-mail: zguo@licp.cas.cn

    Graphical abstract: A double-metal-assisted chemical etching method is employed to fabricate superhydrophobic surfaces, showing a good superhydrophobicity with the contact angle of about 170°, and the sliding angle of about 0°. Meanwhile, the potential formation mechanism about it is also presented. Highlights: ► A double-metal-assisted chemical etching method is employed to fabricate superhydrophobic surfaces. ► The obtained surfaces show good superhydrophobicity with a high contact angle and low sliding angle. ► The color of the etched substrate dark brown or black and it is so-called black silicon. -- Abstract: Silicon substrates treated by metal-assisted chemical etching have been studied formore » many years since they could be employed in a variety of electronic and optical devices such as integrated circuits, photovoltaics, sensors and detectors. However, to the best of our knowledge, the chemical etching treatment on the same silicon substrate with the assistance of two or more kinds of metals has not been reported. In this paper, we mainly focus on the etching time and finally obtain a series of superhydrophobic silicon surfaces with novel etching structures through two successive etching processes of Cu-assisted and Ag-assisted chemical etching. It is shown that large-scale homogeneous but locally irregular wire-like structures are obtained, and the superhydrophobic surfaces with low hysteresis are prepared after the modifications with low surface energy materials. It is worth noting that the final silicon substrates not only possess high static contact angle and low hysteresis angle, but also show a black color, indicating that the superhydrophobic silicon substrate has an extremely low reflectance in a certain range of wavelengths. In our future work, we will go a step further to discuss the effect of temperature, the size of Cu nanoparticles and solution concentration on the final topography and superhydrophobicity.« less

  19. The influence of H{sub 2}O{sub 2} concentration to the structure of silicon nanowire growth by metal-assisted chemical etching

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Omar, Hafsa, E-mail: mrshafsaomar@gmail.com; Jani, Abdul Mutalib Md., E-mail: abdmutalib@perlis.uitm.edu.my; Abdullah, Saifollah, E-mail: saifollah@salam.utm.edu.my

    2016-07-06

    A simple and low cost method to produce well aligned silicon nanowires at large areas using Ag-assisted chemical etching at room temperature were presented. The structure of silicon nanowires growth by metal-assisted chemical etching was observed. Prior to the etching, the silicon nanowires were prepared by electroless metal deposited (EMD) in solution containing hydrofluoric acid and hydrogen peroxide in Teflon vessel. The silver particle was deposited on substrate by immersion in hydrofluoric acid and silver nitrate solution for sixty second. The silicon nanowires were growth in different hydrogen peroxide concentration which are 0.3M, 0.4M, 0.5M and 0.6M and 0.7M.The influencemore » of hydrogen peroxide concentration to the formation of silicon nanowires was studied. The morphological properties of silicon nanowires were investigated using field emission scanning electron microscopy (FESEM) and Energy Dispersive X-Ray Spectroscopy (EDS).« less

  20. Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer

    DOEpatents

    Manginell, Ronald P.; Schubert, W. Kent; Shul, Randy J.

    2005-08-16

    New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.

  1. Scalloping minimization in deep Si etching on Unaxis DSE tools

    NASA Astrophysics Data System (ADS)

    Lai, Shouliang; Johnson, Dave J.; Westerman, Russ J.; Nolan, John J.; Purser, David; Devre, Mike

    2003-01-01

    Sidewall smoothness is often a critical requirement for many MEMS devices, such as microfludic devices, chemical, biological and optical transducers, while fast silicon etch rate is another. For such applications, the time division multiplex (TDM) etch processes, so-called "Bosch" processes are widely employed. However, in the conventional TDM processes, rough sidewalls result due to scallop formation. To date, the amplitude of the scalloping has been directly linked to the silicon etch rate. At Unaxis USA Inc., we have developed a proprietary fast gas switching technique that is effective for scalloping minimization in deep silicon etching processes. In this technique, process cycle times can be reduced from several seconds to as little as a fraction of second. Scallop amplitudes can be reduced with shorter process cycles. More importantly, as the scallop amplitude is progressively reduced, the silicon etch rate can be maintained relatively constant at high values. An optimized experiment has shown that at etch rate in excess of 7 μm/min, scallops with length of 116 nm and depth of 35 nm were obtained. The fast gas switching approach offers an ideal manufacturing solution for MEMS applications where extremely smooth sidewall and fast etch rate are crucial.

  2. Impact of Parameter Variation in Fabrication of Nanostructure by Atomic Force Microscopy Nanolithography

    PubMed Central

    Dehzangi, Arash; Larki, Farhad; Hutagalung, Sabar D.; Goodarz Naseri, Mahmood; Majlis, Burhanuddin Y.; Navasery, Manizheh; Hamid, Norihan Abdul; Noor, Mimiwaty Mohd

    2013-01-01

    In this letter, we investigate the fabrication of Silicon nanostructure patterned on lightly doped (1015 cm−3) p-type silicon-on-insulator by atomic force microscope nanolithography technique. The local anodic oxidation followed by two wet etching steps, potassium hydroxide etching for silicon removal and hydrofluoric etching for oxide removal, are implemented to reach the structures. The impact of contributing parameters in oxidation such as tip materials, applying voltage on the tip, relative humidity and exposure time are studied. The effect of the etchant concentration (10% to 30% wt) of potassium hydroxide and its mixture with isopropyl alcohol (10%vol. IPA ) at different temperatures on silicon surface are expressed. For different KOH concentrations, the effect of etching with the IPA admixture and the effect of the immersing time in the etching process on the structure are investigated. The etching processes are accurately optimized by 30%wt. KOH +10%vol. IPA in appropriate time, temperature, and humidity. PMID:23776479

  3. Application of cyclic fluorocarbon/argon discharges to device patterning

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Metzler, Dominik, E-mail: dmetzler@umd.edu; Uppireddi, Kishore; Bruce, Robert L.

    2016-01-15

    With increasing demands on device patterning to achieve smaller critical dimensions and pitches for the 5 nm node and beyond, the need for atomic layer etching (ALE) is steadily increasing. In this work, a cyclic fluorocarbon/Ar plasma is successfully used for ALE patterning in a manufacturing scale reactor. Self-limited etching of silicon oxide is observed. The impact of various process parameters on the etch performance is established. The substrate temperature has been shown to play an especially significant role, with lower temperatures leading to higher selectivity and lower etch rates, but worse pattern fidelity. The cyclic ALE approach established with thismore » work is shown to have great potential for small scale device patterning, showing self-limited etching, improved uniformity and resist mask performance.« less

  4. Application of cyclic fluorocarbon/argon discharges to device patterning

    DOE PAGES

    Metzler, Dominik; Uppiredi, Kishore; Bruce, Robert L.; ...

    2015-11-13

    With increasing demands on device patterning to achieve smaller critical dimensions and pitches for the 5nm node and beyond, the need for atomic layer etching (ALE) is steadily increasing. In this study, a cyclic fluorocarbon/Ar plasma is successfully used for ALE patterning in a manufacturing scale reactor. Self-limited etching of silicon oxide is observed. The impact of various process parameters on the etch performance is established. The substrate temperature has been shown to play an especially significant role, with lower temperatures leading to higher selectivity and lower etch rates, but worse pattern fidelity. The cyclic ALE approach established with thismore » work is shown to have great potential for small scale device patterning, showing self-limited etching, improved uniformity and resist mask performance.« less

  5. Anisotropic etching of silicon in solutions containing tensioactive compounds

    NASA Astrophysics Data System (ADS)

    Zubel, Irena

    2016-12-01

    The results of investigations concerning anisotropic etching in 3M KOH and 25% TMAH solutions modified by tensioactive compounds such as alcohols, diols and a typical surfactant Triton X100 have been compared. Etching anisotropy was assessed on the basis of etch rates ratio V(110)/V(100). It was stated that the relation between surface tension of the solutions and etch rates of particular planes depend not only on the kind of surfactant but also on the kind of etching solution (KOH, TMAH). It points out an important role of TMA+ ions in the etching process, probably in the process of forming an adsorption layer, consisting of the molecules of tensioactive compounds on Si surface, which decides about etch rate. We have observed that this phenomenon occurs only at high concentration of TMA+ ions (25% TMAH). Reduction of TMAH concentration changes the properties of surfactant containing TMAH solutions. From all investigated solutions, the solutions that assured developing of (110) plane inclined at the angle of 45° to (100) substrate were selected. Such planes can be used as micromirrors in MOEMS structures. The solutions provide the etch rate ratio V(110)/V(100)<0.7, thus they were selected from hydroxide solutions containing surfactants. A simple way for etch rate anisotropy V(110)/V(100) assessment based on microscopic images etched structures has been proposed.

  6. Formation and metrology of dual scale nano-morphology on SF(6) plasma etched silicon surfaces.

    PubMed

    Boulousis, G; Constantoudis, V; Kokkoris, G; Gogolides, E

    2008-06-25

    Surface roughness and nano-morphology in SF(6) plasma etched silicon substrates are investigated in a helicon type plasma reactor as a function of etching time and process parameters. The plasma etched surfaces are analyzed by atomic force microscopy. It is found that dual scale nano-roughness is formatted on the silicon surface comprising an underlying nano-roughness and superimposed nano-mounds. Detailed metrological quantification is proposed for the characterization of dual scale surface morphology. As etching proceeds, the mounds become higher, fewer and wider, and the underlying nano-roughness also increases. Increase in wafer temperature leads to smoother surfaces with lower, fewer and wider nano-mounds. A mechanism based on the deposition of etch inhibiting particles during the etching process is proposed for the explanation of the experimental behavior. In addition, appropriately designed experiments are conducted, and they confirm the presence of this mechanism.

  7. Cryogenic Etching of Silicon: An Alternative Method For Fabrication of Vertical Microcantilever Master Molds

    PubMed Central

    Addae-Mensah, Kweku A.; Retterer, Scott; Opalenik, Susan R.; Thomas, Darrell; Lavrik, Nickolay V.; Wikswo, John P.

    2013-01-01

    This paper examines the use of deep reactive ion etching (DRIE) of silicon with fluorine high-density plasmas at cryogenic temperatures to produce silicon master molds for vertical microcantilever arrays used for controlling substrate stiffness for culturing living cells. The resultant profiles achieved depend on the rate of deposition and etching of a SiOxFy polymer, which serves as a passivation layer on the sidewalls of the etched structures in relation to areas that have not been passivated with the polymer. We look at how optimal tuning of two parameters, the O2 flow rate and the capacitively coupled plasma (CCP) power, determine the etch profile. All other pertinent parameters are kept constant. We examine the etch profiles produced using e-beam resist as the main etch mask, with holes having diameters of 750 nm, 1 µm, and 2 µm. PMID:24223478

  8. SEMICONDUCTOR TECHNOLOGY Texturization of mono-crystalline silicon solar cells in TMAH without the addition of surfactant

    NASA Astrophysics Data System (ADS)

    Weiying, Ou; Yao, Zhang; Hailing, Li; Lei, Zhao; Chunlan, Zhou; Hongwei, Diao; Min, Liu; Weiming, Lu; Jun, Zhang; Wenjing, Wang

    2010-10-01

    Etching was performed on (100) silicon wafers using silicon-dissolved tetramethylammonium hydroxide (TMAH) solutions without the addition of surfactant. Experiments were carried out in different TMAH concentrations at different temperatures for different etching times. The surface phenomena, etching rates, surface morphology and surface reflectance were analyzed. Experimental results show that the resulting surface covered with uniform pyramids can be realized with a small change in etching rates during the etching process. The etching mechanism is explained based on the experimental results and the theoretical considerations. It is suggested that all the components in the TMAH solutions play important roles in the etching process. Moreover, TMA+ ions may increase the wettability of the textured surface. A good textured surface can be obtained in conditions where the absorption of OH-/H2O is in equilibrium with that of TMA+/SiO2 (OH)22-.

  9. Effects of Bias Pulsing on Etching of SiO2 Pattern in Capacitively-Coupled Plasmas for Nano-Scale Patterning of Multi-Level Hard Masks.

    PubMed

    Kim, Sechan; Choi, Gyuhyun; Chae, Heeyeop; Lee, Nae-Eung

    2016-05-01

    In order to study the effects of bias pulsing on the etching characteristics of a silicon dioxide (SiO2) layer using multi-level hard mask (MLHM) structures of ArF photoresist/bottom anti-reflected coating/SiO2/amorphous carbon layer (ACL)/SiO2, the effects of bias pulsing conditions on the etch characteristics of a SiO2 layer with an ACL mask pattern in C4F8/CH2F2/O2/Ar etch chemistries were investigated in a dual-frequency capacitively-coupled plasma (CCP) etcher. The effects of the pulse frequency, duty ratio, and pulse-bias power in the 2 MHz low-frequency (LF) power source were investigated in plasmas generated by a 27.12 MHz high-frequency (HF) power source. The etch rates of ACL and SiO2 decreased, but the etch selectivity of SiO2/ACL increased with decreasing duty ratio. When the ACL and SiO2 layers were etched with increasing pulse frequency, no significant change was observed in the etch rates and etch selectivity. With increasing LF pulse-bias power, the etch rate of ACL and SiO2 slightly increased, but the etch selectivity of SiO2/ACL decreased. Also, the precise control of the critical dimension (CD) values with decreasing duty ratio can be explained by the protection of sidewall etching of SiO2 by increased passivation. Pulse-biased etching was successfully applied to the patterning of the nano-scale line and space of SiO2 using an ACL pattern.

  10. Formation of silicon nanowire packed films from metallurgical-grade silicon powder using a two-step metal-assisted chemical etching method.

    PubMed

    Ouertani, Rachid; Hamdi, Abderrahmen; Amri, Chohdi; Khalifa, Marouan; Ezzaouia, Hatem

    2014-01-01

    In this work, we use a two-step metal-assisted chemical etching method to produce films of silicon nanowires shaped in micrograins from metallurgical-grade polycrystalline silicon powder. The first step is an electroless plating process where the powder was dipped for few minutes in an aqueous solution of silver nitrite and hydrofluoric acid to permit Ag plating of the Si micrograins. During the second step, corresponding to silicon dissolution, we add a small quantity of hydrogen peroxide to the plating solution and we leave the samples to be etched for three various duration (30, 60, and 90 min). We try elucidating the mechanisms leading to the formation of silver clusters and silicon nanowires obtained at the end of the silver plating step and the silver-assisted silicon dissolution step, respectively. Scanning electron microscopy (SEM) micrographs revealed that the processed Si micrograins were covered with densely packed films of self-organized silicon nanowires. Some of these nanowires stand vertically, and some others tilt to the silicon micrograin facets. The thickness of the nanowire films increases from 0.2 to 10 μm with increasing etching time. Based on SEM characterizations, laser scattering estimations, X-ray diffraction (XRD) patterns, and Raman spectroscopy, we present a correlative study dealing with the effect of the silver-assisted etching process on the morphological and structural properties of the processed silicon nanowire films.

  11. Formation of silicon nanowire packed films from metallurgical-grade silicon powder using a two-step metal-assisted chemical etching method

    PubMed Central

    2014-01-01

    In this work, we use a two-step metal-assisted chemical etching method to produce films of silicon nanowires shaped in micrograins from metallurgical-grade polycrystalline silicon powder. The first step is an electroless plating process where the powder was dipped for few minutes in an aqueous solution of silver nitrite and hydrofluoric acid to permit Ag plating of the Si micrograins. During the second step, corresponding to silicon dissolution, we add a small quantity of hydrogen peroxide to the plating solution and we leave the samples to be etched for three various duration (30, 60, and 90 min). We try elucidating the mechanisms leading to the formation of silver clusters and silicon nanowires obtained at the end of the silver plating step and the silver-assisted silicon dissolution step, respectively. Scanning electron microscopy (SEM) micrographs revealed that the processed Si micrograins were covered with densely packed films of self-organized silicon nanowires. Some of these nanowires stand vertically, and some others tilt to the silicon micrograin facets. The thickness of the nanowire films increases from 0.2 to 10 μm with increasing etching time. Based on SEM characterizations, laser scattering estimations, X-ray diffraction (XRD) patterns, and Raman spectroscopy, we present a correlative study dealing with the effect of the silver-assisted etching process on the morphological and structural properties of the processed silicon nanowire films. PMID:25349554

  12. Preparation of composite micro/nano structure on the silicon surface by reactive ion etching: Enhanced anti-reflective and hydrophobic properties

    NASA Astrophysics Data System (ADS)

    Zeng, Yu; Fan, Xiaoli; Chen, Jiajia; He, Siyu; Yi, Zao; Ye, Xin; Yi, Yougen

    2018-05-01

    A silicon substrate with micro-pyramid structure (black silicon) is prepared by wet chemical etching and then subjected to reactive ion etching (RIE) in the mixed gas condition of SF6, CHF3 and He. We systematically study the impacts of flow rates of SF6, CHF3 and He, the etching pressure and the etching time on the surface morphology and reflectivity through various characterizations. Meanwhile, we explore and obtain the optimal combination of parameters for the preparation of composite structure that match the RIE process based on the basis of micro-pyramid silicon substrate. The composite sample prepared under the optimum parameters exhibits excellent anti-reflective performance, hydrophobic, self-cleaning and anti-corrosive properties. Based on the above characteristics, the composite micro/nano structure can be applied to solar cells, photodetectors, LEDs, outdoor devices and other important fields.

  13. Metal-assisted chemical etching using sputtered gold: a simple route to black silicon

    NASA Astrophysics Data System (ADS)

    Kurek, Agnieszka; Barry, Seán T.

    2011-08-01

    We report an accessible and simple method of producing 'black silicon' with aspect ratios as high as 8 using common laboratory equipment. Gold was sputtered to a thickness of 8 nm using a low-vacuum sputter coater. The structures were etched into silicon substrates using an aqueous H2O2/HF solution, and the gold was then removed using aqua regia. Ultrasonication was necessary to produce columnar structures, and an etch time of 24 min gave a velvety, non-reflective surface. The surface features after 24 min etching were uniformly microstructured over an area of square centimetres.

  14. Selective Epitaxial Graphene Growth on SiC via AlN Capping

    NASA Astrophysics Data System (ADS)

    Zaman, Farhana; Rubio-Roy, Miguel; Moseley, Michael; Lowder, Jonathan; Doolittle, William; Berger, Claire; Dong, Rui; Meindl, James; de Heer, Walt; Georgia Institute of Technology Team

    2011-03-01

    Electronic-quality graphene is epitaxially grown by graphitization of carbon-face silicon carbide (SiC) by the sublimation of silicon atoms from selected regions uncapped by aluminum nitride (AlN). AlN (deposited by molecular beam epitaxy) withstands high graphitization temperatures of 1420o C, hence acting as an effective capping layer preventing the growth of graphene under it. The AlN is patterned and etched to open up windows onto the SiC surface for subsequent graphitization. Such selective epitaxial growth leads to the formation of high-quality graphene in desired patterns without the need for etching and lithographic patterning of graphene itself. No detrimental contact of the graphene with external chemicals occurs throughout the fabrication-process. The impact of process-conditions on the mobility of graphene is investigated. Graphene hall-bars were fabricated and characterized by scanning Raman spectroscopy, ellipsometry, and transport measurements. This controlled growth of graphene in selected regions represents a viable approach to fabrication of high-mobility graphene as the channel material for fast-switching field-effect transistors.

  15. Etch pit investigation of free electron concentration controlled 4H-SiC

    NASA Astrophysics Data System (ADS)

    Kim, Hong-Yeol; Shin, Yun Ji; Kim, Jung Gon; Harima, Hiroshi; Kim, Jihyun; Bahng, Wook

    2013-04-01

    Etch pits were investigated using the molten KOH selective etching method to examine dependence of etch pit shape and size on free electron concentration. The free electron concentrations of highly doped 4H-silicon carbide (SiC) were controlled by proton irradiation and thermal annealing, which was confirmed by a frequency shift in the LO-phonon-plasmon-coupled (LOPC) mode on micro-Raman spectroscopy. The proton irradiated sample with 5×1015 cm-2 fluence and an intrinsic semi-insulating sample showed clearly classified etch pits but different ratios of threading screw dislocation (TSD) and threading edge dislocation (TED) sizes. Easily classified TEDs and TSDs on proton irradiated 4H-SiC were restored as highly doped 4H-SiC after thermal annealing due to the recovered carrier concentrations. The etched surface of proton irradiated 4H-SiC and boron implanted SiC showed different surface conditions after activation.

  16. Etching of semiconductors and metals by the photonic jet with shaped optical fiber tips

    NASA Astrophysics Data System (ADS)

    Pierron, Robin; Lecler, Sylvain; Zelgowski, Julien; Pfeiffer, Pierre; Mermet, Frédéric; Fontaine, Joël

    2017-10-01

    The etching of semiconductors and metals by a photonic jet (PJ) generated with a shaped optical fiber tip is studied. Etched marks with a diameter of 1 μm have been realized on silicon, stainless steel and titanium with a 35 kHz pulsed laser, emitting 100 ns pulses at 1064 nm. The selection criteria of the fiber and its tip are discussed. We show that a 100/140 silica fiber is a good compromise which takes into account the injection, the working distance and the energy coupled in the higher-order modes. The energy balance is performed on the basis of the known ablation threshold of the material. Finally, the dependence between the etching depth and the number of pulses is studied. Saturation is observed probably due to a redeposition of the etched material, showing that a higher pulse energy is required for deeper etchings.

  17. Heavily Boron-Doped Silicon Layer for the Fabrication of Nanoscale Thermoelectric Devices

    PubMed Central

    Liu, Yang; Deng, Lingxiao; Zhang, Mingliang; Zhang, Shuyuan; Ma, Jing; Song, Peishuai; Liu, Qing; Ji, An; Yang, Fuhua; Wang, Xiaodong

    2018-01-01

    Heavily boron-doped silicon layers and boron etch-stop techniques have been widely used in the fabrication of microelectromechanical systems (MEMS). This paper provides an introduction to the fabrication process of nanoscale silicon thermoelectric devices. Low-dimensional structures such as silicon nanowire (SiNW) have been considered as a promising alternative for thermoelectric applications in order to achieve a higher thermoelectric figure of merit (ZT) than bulk silicon. Here, heavily boron-doped silicon layers and boron etch-stop processes for the fabrication of suspended SiNWs will be discussed in detail, including boron diffusion, electron beam lithography, inductively coupled plasma (ICP) etching and tetramethylammonium hydroxide (TMAH) etch-stop processes. A 7 μm long nanowire structure with a height of 280 nm and a width of 55 nm was achieved, indicating that the proposed technique is useful for nanoscale fabrication. Furthermore, a SiNW thermoelectric device has also been demonstrated, and its performance shows an obvious reduction in thermal conductivity. PMID:29385759

  18. Lithography-free fabrication of silicon nanowire and nanohole arrays by metal-assisted chemical etching

    PubMed Central

    2013-01-01

    We demonstrated a novel, simple, and low-cost method to fabricate silicon nanowire (SiNW) arrays and silicon nanohole (SiNH) arrays based on thin silver (Ag) film dewetting process combined with metal-assisted chemical etching. Ag mesh with holes and semispherical Ag nanoparticles can be prepared by simple thermal annealing of Ag thin film on a silicon substrate. Both the diameter and the distribution of mesh holes as well as the nanoparticles can be manipulated by the film thickness and the annealing temperature. The silicon underneath Ag coverage was etched off with the catalysis of metal in an aqueous solution containing HF and an oxidant, which form silicon nanostructures (either SiNW or SiNH arrays). The morphologies of the corresponding etched SiNW and SiNH arrays matched well with that of Ag holes and nanoparticles. This novel method allows lithography-free fabrication of the SiNW and SiNH arrays with control of the size and distribution. PMID:23557325

  19. Iodine enhanced focused-ion-beam etching of silicon for photonic applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Schrauwen, Jonathan; Thourhout, Dries van; Baets, Roel

    Focused-ion-beam etching of silicon enables fast and versatile fabrication of micro- and nanophotonic devices. However, large optical losses due to crystal damage and ion implantation make the devices impractical when the optical mode is confined near the etched region. These losses are shown to be reduced by the local implantation and etching of silicon waveguides with iodine gas enhancement, followed by baking at 300 deg. C. The excess optical loss in the silicon waveguides drops from 3500 to 1700 dB/cm when iodine gas is used, and is further reduced to 200 dB/cm after baking at 300 deg. C. We presentmore » elemental and chemical surface analyses supporting that this is caused by the desorption of iodine from the silicon surface. Finally we present a model to extract the absorption coefficient from the measurements.« less

  20. Measurement of the Electron Density and the Attachment Rate Coefficient in Silane/Helium Discharges.

    DTIC Science & Technology

    1986-09-01

    materials -- in this case hydrogenated amorphous silicon . One of the biggest problems in such a task is the fact that the discharge creates complex radicals...electron density is enhanced -- even on a time-averaged basis, and the silicon deposition rate is also increased. The physical process for the density...etching and deposition of semiconductor materials. Plasma etching (also known as dry etching) Of silicon using flourine bearing gases has made it possible

  1. Plasmaless cleaning process of silicon surface using chlorine trifluoride

    NASA Astrophysics Data System (ADS)

    Saito, Yoji; Yamaoka, Osamu; Yoshida, Akira

    1990-03-01

    Plasmaless etching using ClF3 gas around room temperature has been investigated for the silicon substrates with the various thicknesses of native oxide. The native oxide can be removed with ClF3 gas. A specular surface is obtained by ultraviolet light irradiation which remarkably accelerates the removal of the native oxide without changing the etch rate of silicon. The etched surface is analyzed with Auger electron measurement, indicating the existence of Cl atoms on it.

  2. Low-loss slot waveguides with silicon (111) surfaces realized using anisotropic wet etching

    NASA Astrophysics Data System (ADS)

    Debnath, Kapil; Khokhar, Ali; Boden, Stuart; Arimoto, Hideo; Oo, Swe; Chong, Harold; Reed, Graham; Saito, Shinichi

    2016-11-01

    We demonstrate low-loss slot waveguides on silicon-on-insulator (SOI) platform. Waveguides oriented along the (11-2) direction on the Si (110) plane were first fabricated by a standard e-beam lithography and dry etching process. A TMAH based anisotropic wet etching technique was then used to remove any residual side wall roughness. Using this fabrication technique propagation loss as low as 3.7dB/cm was realized in silicon slot waveguide for wavelengths near 1550nm. We also realized low propagation loss of 1dB/cm for silicon strip waveguides.

  3. Bio-inspired silicon nanospikes fabricated by metal-assisted chemical etching for antibacterial surfaces

    NASA Astrophysics Data System (ADS)

    Hu, Huan; Siu, Vince S.; Gifford, Stacey M.; Kim, Sungcheol; Lu, Minhua; Meyer, Pablo; Stolovitzky, Gustavo A.

    2017-12-01

    The recently discovered bactericidal properties of nanostructures on wings of insects such as cicadas and dragonflies have inspired the development of similar nanostructured surfaces for antibacterial applications. Since most antibacterial applications require nanostructures covering a considerable amount of area, a practical fabrication method needs to be cost-effective and scalable. However, most reported nanofabrication methods require either expensive equipment or a high temperature process, limiting cost efficiency and scalability. Here, we report a simple, fast, low-cost, and scalable antibacterial surface nanofabrication methodology. Our method is based on metal-assisted chemical etching that only requires etching a single crystal silicon substrate in a mixture of silver nitrate and hydrofluoric acid for several minutes. We experimentally studied the effects of etching time on the morphology of the silicon nanospikes and the bactericidal properties of the resulting surface. We discovered that 6 minutes of etching results in a surface containing silicon nanospikes with optimal geometry. The bactericidal properties of the silicon nanospikes were supported by bacterial plating results, fluorescence images, and scanning electron microscopy images.

  4. Correlation between oxidant concentrations, morphological aspects and etching kinetics of silicon nanowires during silver-assist electroless etching

    NASA Astrophysics Data System (ADS)

    Moumni, Besma; Jaballah, Abdelkader Ben

    2017-12-01

    Silicon porosification by silver assisted chemical etching (Ag-ACE) for a short range of H2O2 concentration is reported. We experimentally show that porous silicon (PSi) is obtained for 1% H2O2, whereas silicon nanowires (SiNWs) appeared by simply tuning the concentration of H2O2 to relatively high concentrations up to 8%. The morphological aspects are claimed by scanning electron microscopy proving that the kinetics of SiNWs formation display nonlinear relationships versus H2O2 concentration and etching time. A semi-qualitative electrochemical etching model based on local anodic, Ic, and cathodic, Ia, currents is proposed to explain the different morphological changes, and to unveil the formation pathways of both PS and SiNWs. More importantly, an efficient antireflective character for silicon solar cell (reflectance close to 2%) is realized at 8% H2O2. In addition, the luminescence of the prepared Si-nanostructures is claimed by photoluminescence which exhibit a large enhancement of the intensity and a blue shift for narrow and deep SiNWs.

  5. Template-free fabrication of silicon micropillar/nanowire composite structure by one-step etching

    PubMed Central

    2012-01-01

    A template-free fabrication method for silicon nanostructures, such as silicon micropillar (MP)/nanowire (NW) composite structure is presented. Utilizing an improved metal-assisted electroless etching (MAEE) of silicon in KMnO4/AgNO3/HF solution and silicon composite nanostructure of the long MPs erected in the short NWs arrays were generated on the silicon substrate. The morphology evolution of the MP/NW composite nanostructure and the role of self-growing K2SiF6 particles as the templates during the MAEE process were investigated in detail. Meanwhile, a fabrication mechanism based on the etching of silver nanoparticles (catalyzed) and the masking of K2SiF6 particles is proposed, which gives guidance for fabricating different silicon nanostructures, such as NW and MP arrays. This one-step method provides a simple and cost-effective way to fabricate silicon nanostructures. PMID:23043719

  6. Method for making circular tubular channels with two silicon wafers

    DOEpatents

    Yu, Conrad M.; Hui, Wing C.

    1996-01-01

    A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si.sub.3 N.sub.4) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO.sub.3 /CH.sub.3 COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary.

  7. Selective Plasma Deposition of Fluorocarbon Films on SAMs

    NASA Technical Reports Server (NTRS)

    Crain, Mark M., III; Walsh, Kevin M.; Cohn, Robert W.

    2006-01-01

    A dry plasma process has been demonstrated to be useful for the selective modification of self-assembled monolayers (SAMs) of alkanethiolates. These SAMs are used, during the fabrication of semiconductor electronic devices, as etch masks on gold layers that are destined to be patterned and incorporated into the devices. The selective modification involves the formation of fluorocarbon films that render the SAMs more effective in protecting the masked areas of the gold against etching by a potassium iodide (KI) solution. This modification can be utilized, not only in the fabrication of single electronic devices but also in the fabrication of integrated circuits, microelectromechanical systems, and circuit boards. In the steps that precede the dry plasma process, a silicon mold in the desired pattern is fabricated by standard photolithographic techniques. A stamp is then made by casting polydimethylsiloxane (commonly known as silicone rubber) in the mold. The stamp is coated with an alkanethiol solution, then the stamp is pressed on the gold layer of a device to be fabricated in order to deposit the alkanethiol to form an alkanethiolate SAM in the desired pattern (see figure). Next, the workpiece is exposed to a radio-frequency plasma generated from a mixture of CF4 and H2 gases. After this plasma treatment, the SAM is found to be modified, while the exposed areas of gold remain unchanged. This dry plasma process offers the potential for forming masks superior to those formed in a prior wet etching process. Among the advantages over the wet etching process are greater selectivity, fewer pin holes in the masks, and less nonuniformity of the masks. The fluorocarbon films formed in this way may also be useful as intermediate layers for subsequent fabrication steps and as dielectric layers to be incorporated into finished products.

  8. Silicon micro-mold and method for fabrication

    DOEpatents

    Morales, Alfredo M.

    2005-01-11

    The present invention describes a method for rapidly fabricating a robust 3-dimensional silicon micro-mold for use in preparing complex metal micro-components. The process begins by depositing a conductive metal layer onto one surface of a silicon wafer. A thin photoresist and a standard lithographic mask are then used to transfer a trace image pattern onto the opposite surface of the wafer by exposing and developing the resist. The exposed portion of the silicon substrate is anisotropically etched through the wafer thickness down to conductive metal layer to provide an etched pattern consisting of a series of rectilinear channels and recesses in the silicon which serve as the silicon micro-mold. Microcomponents are prepared with this mold by first filling the mold channels and recesses with a metal deposit, typically by electroplating, and then removing the silicon micro-mold by chemical etching.

  9. Silicon micro-mold

    DOEpatents

    Morales, Alfredo M [Livermore, CA

    2006-10-24

    The present invention describes a method for rapidly fabricating a robust 3-dimensional silicon-mold for use in preparing complex metal micro-components. The process begins by depositing a conductive metal layer onto one surface of a silicon wafer. A thin photoresist and a standard lithographic mask are then used to transfer a trace image pattern onto the opposite surface of the wafer by exposing and developing the resist. The exposed portion of the silicon substrate is anisotropically etched through the wafer thickness down to conductive metal layer to provide an etched pattern consisting of a series of rectilinear channels and recesses in the silicon which serve as the silicon micro-mold. Microcomponents are prepared with this mold by first filling the mold channels and recesses with a metal deposit, typically by electroplating, and then removing the silicon micro-mold by chemical etching.

  10. Silicon nanostructure arrays prepared by single step metal assisted chemical etching from single crystal wafer

    NASA Astrophysics Data System (ADS)

    Sarkar, Kalyan; Das, Debajyoti

    2018-04-01

    Arrays of silicon nanostructures have been produced by single step Metal Assisted Chemical Etching (MACE) of single crystal Si-wafers at room temp and normal atmospheric condition. By studying optical and structural properties of the silicon nanowire like structures synthesized by Ag catalyst assisted chemical etching, a significant change in the reflectance spectra has been obtained leading to a gross reduction in reflectance from ˜31% to less than 1%. In comparison with bulk c-Si, the surface areas of the nanostructured samples have been increased significantly with the etching time, leading to an efficient absorption of light, favorable for photovoltaic applications.

  11. New silicon architectures by gold-assisted chemical etching.

    PubMed

    Mikhael, Bechelany; Elise, Berodier; Xavier, Maeder; Sebastian, Schmitt; Johann, Michler; Laetitia, Philippe

    2011-10-01

    Silicon nanowires (SiNWs) were produced by nanosphere lithography and metal assisted chemical etching. The combination of these methods allows the morphology and organization control of Si NWs on a large area. From the investigation of major parameters affecting the etching such as doping type, doping concentration of the substrate, we demonstrate the formation of new Si architectures consisting of organized Si NW arrays formed on a micro/mesoporous silicon layer with different thickness. These investigations will allow us to better understand the mechanism of Si etching to enable a wide range of applications such as molecular sensing, and for thermoelectric and photovoltaic devices. © 2011 American Chemical Society

  12. Controlling Kink Geometry in Nanowires Fabricated by Alternating Metal-Assisted Chemical Etching.

    PubMed

    Chen, Yun; Li, Liyi; Zhang, Cheng; Tuan, Chia-Chi; Chen, Xin; Gao, Jian; Wong, Ching-Ping

    2017-02-08

    Kinked silicon (Si) nanowires (NWs) have many special properties that make them attractive for a number of applications, such as microfluidics devices, microelectronic devices, and biosensors. However, fabricating NWs with controlled three-dimensional (3D) geometry has been challenging. In this work, a novel method called alternating metal-assisted chemical etching is reported for the fabrication of kinked Si NWs with controlled 3D geometry. By the use of multiple etchants with carefully selected composition, one can control the number of kinks, their locations, and their angles by controlling the number of etchant alternations and the time in each etchant. The resulting number of kinks equals the number times the etchant is alternated, the length of each segment separated by kinks has a linear relationship with the etching time, and the kinking angle is related to the surface tension and viscosity of the etchants. This facile method may provide a feasible and economical way to fabricate novel silicon nanowires, nanostructures, and devices for broad applications.

  13. Silicon macroporous arrays with high aspect ratio prepared by ICP etching

    NASA Astrophysics Data System (ADS)

    Wang, Guozheng; Yang, Bingchen; Wang, Ji; Yang, Jikai; Duanmu, Qingduo

    2018-02-01

    This paper reports on a macroporous silicon arrays with high aspect ratio, the pores of which are of 162, 205, 252, 276μm depths with 6, 10, 15 and 20 μm diameters respectively, prepared by Multiplex Inductively Coupled Plasma (ICP) etching. It was shown that there are very differences in process of high aspect ratio microstructures between the deep pores, a closed structure, and deep trenches, a open structure. The morphology and the aspect ratio dependent etching were analyzed and discussed. The macroporous silicon etched by ICP process yield an uneven, re-entrant, notched and ripples surface within the pores. The main factors effecting on the RIE lag of HARP etching are the passivation cycle time, the pressure of reactive chamber, and the platen power of ICP system.

  14. Metal-assisted etch combined with regularizing etch

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yim, Joanne; Miller, Jeff; Jura, Michael

    In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performingmore » a chemical etch which results in regularized openings in the silicon substrate.« less

  15. Silicon cells made by self-aligned selective-emitter plasma-etchback process

    DOEpatents

    Ruby, Douglas S.; Schubert, William K.; Gee, James M.; Zaidi, Saleem H.

    2000-01-01

    Photovoltaic cells and methods for making them are disclosed wherein the metallized grids of the cells are used to mask portions of cell emitter regions to allow selective etching of phosphorus-doped emitter regions. The preferred etchant is SF.sub.6 or a combination of SF.sub.6 and O.sub.2. This self-aligned selective etching allows for enhanced blue response (versus cells with uniform heavy doping of the emitter) while preserving heavier doping in the region beneath the gridlines needed for low contact resistance. Embodiments are disclosed for making cells with or without textured surfaces. Optional steps include plasma hydrogenation and PECVD nitride deposition, each of which are suited to customized applications for requirements of given cells to be manufactured. The techniques disclosed could replace expensive and difficult alignment methodologies used to obtain selectively etched emitters, and they may be easily integrated with existing plasma processing methods and techniques of the invention may be accomplished in a single plasma-processing chamber.

  16. Low-Power RIE of SiO2 in CHF3 To Obtain Steep Sidewalls

    NASA Technical Reports Server (NTRS)

    Turner, Tasha; Wu, Chi

    2003-01-01

    A reactive-ion etching (RIE) process has been developed to enable the formation of holes with steep sidewalls in a layer of silicon dioxide that covers a silicon substrate. The holes in question are through the thickness of the SiO2 and are used to define silicon substrate areas to be etched or to be built upon through epitaxial deposition of silicon. The sidewalls of these holes are required to be vertical in order to ensure that the sidewalls of the holes to be etched in the substrate or the sidewalls of the epitaxial deposits, respectively, also turn out to be vertical.

  17. Porous Silicon Gradient Refractive Index Micro-Optics.

    PubMed

    Krueger, Neil A; Holsteen, Aaron L; Kang, Seung-Kyun; Ocier, Christian R; Zhou, Weijun; Mensing, Glennys; Rogers, John A; Brongersma, Mark L; Braun, Paul V

    2016-12-14

    The emergence and growth of transformation optics over the past decade has revitalized interest in how a gradient refractive index (GRIN) can be used to control light propagation. Two-dimensional demonstrations with lithographically defined silicon (Si) have displayed the power of GRIN optics and also represent a promising opportunity for integrating compact optical elements within Si photonic integrated circuits. Here, we demonstrate the fabrication of three-dimensional Si-based GRIN micro-optics through the shape-defined formation of porous Si (PSi). Conventional microfabrication creates Si square microcolumns (SMCs) that can be electrochemically etched into PSi elements with nanoscale porosity along the shape-defined etching pathway, which imparts the geometry with structural birefringence. Free-space characterization of the transmitted intensity distribution through a homogeneously etched PSi SMC exhibits polarization splitting behavior resembling that of dielectric metasurfaces that require considerably more laborious fabrication. Coupled birefringence/GRIN effects are studied by way of PSi SMCs etched with a linear (increasing from edge to center) GRIN profile. The transmitted intensity distribution shows polarization-selective focusing behavior with one polarization focused to a diffraction-limited spot and the orthogonal polarization focused into two laterally displaced foci. Optical thickness-based analysis readily predicts the experimentally observed phenomena, which strongly match finite-element electromagnetic simulations.

  18. Characterization of Ag-porous silicon nanostructured layer formed by an electrochemical etching of p-type silicon surface for bio-application

    NASA Astrophysics Data System (ADS)

    Naddaf, M.; Al-Mariri, A.; Haj-Mhmoud, N.

    2017-06-01

    Nanostructured layers composed of silver-porous silicon (Ag-PS) have been formed by an electrochemical etching of p-type (1 1 1) silicon substrate in a AgNO3:HF:C2H5OH solution at different etching times (10 min-30 min). Scanning electron microscopy (SEM) and energy-dispersive x-ray spectroscopy (EDS) results reveal that the produced layers consist of Ag dendrites and a silicon-rich porous structure. The nanostructuring nature of the layer has been confirmed by spatial micro-Raman scattering and x-ray diffraction techniques. The Ag dendrites exhibit a surface-enhanced Raman scattering (SERS) spectrum, while the porous structure shows a typical PS Raman spectrum. Upon increasing the etching time, the average size of silicon nanocrystallite in the PS network decreases, while the average size of Ag nanocrystals is slightly affected. In addition, the immobilization of prokaryote Salmonella typhimurium DNA via physical adsorption onto the Ag-PS layer has been performed to demonstrate its efficiency as a platform for detection of biological molecules using SERS.

  19. Bio-inspired Fabrication of Complex Hierarchical Structure in Silicon.

    PubMed

    Gao, Yang; Peng, Zhengchun; Shi, Tielin; Tan, Xianhua; Zhang, Deqin; Huang, Qiang; Zou, Chuanping; Liao, Guanglan

    2015-08-01

    In this paper, we developed a top-down method to fabricate complex three dimensional silicon structure, which was inspired by the hierarchical micro/nanostructure of the Morpho butterfly scales. The fabrication procedure includes photolithography, metal masking, and both dry and wet etching techniques. First, microscale photoresist grating pattern was formed on the silicon (111) wafer. Trenches with controllable rippled structures on the sidewalls were etched by inductively coupled plasma reactive ion etching Bosch process. Then, Cr film was angled deposited on the bottom of the ripples by electron beam evaporation, followed by anisotropic wet etching of the silicon. The simple fabrication method results in large scale hierarchical structure on a silicon wafer. The fabricated Si structure has multiple layers with uniform thickness of hundreds nanometers. We conducted both light reflection and heat transfer experiments on this structure. They exhibited excellent antireflection performance for polarized ultraviolet, visible and near infrared wavelengths. And the heat flux of the structure was significantly enhanced. As such, we believe that these bio-inspired hierarchical silicon structure will have promising applications in photovoltaics, sensor technology and photonic crystal devices.

  20. Chemically Etched Silicon Nanowires as Anodes for Lithium-Ion Batteries

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    West, Hannah Elise

    2015-08-01

    This study focused on silicon as a high capacity replacement anode for Lithium-ion batteries. The challenge of silicon is that it expands ~270% upon lithium insertion which causes particles of silicon to fracture, causing the capacity to fade rapidly. To account for this expansion chemically etched silicon nanowires from the University of Maine were studied as anodes. They were built into electrochemical half-cells and cycled continuously to measure the capacity and capacity fade.

  1. Selective etchant for oxide sacrificial material in semiconductor device fabrication

    DOEpatents

    Clews, Peggy J.; Mani, Seethambal S.

    2005-05-17

    An etching composition and method is disclosed for removing an oxide sacrificial material during manufacture of semiconductor devices including micromechanical, microelectromechanical or microfluidic devices. The etching composition and method are based on the combination of hydrofluoric acid (HF) and sulfuric acid (H.sub.2 SO.sub.4). These acids can be used in the ratio of 1:3 to 3:1 HF:H.sub.2 SO.sub.4 to remove all or part of the oxide sacrificial material while providing a high etch selectivity for non-oxide materials including polysilicon, silicon nitride and metals comprising aluminum. Both the HF and H.sub.2 SO.sub.4 can be provided as "semiconductor grade" acids in concentrations of generally 40-50% by weight HF, and at least 90% by weight H.sub.2 SO.sub.4.

  2. Gray scale x-ray mask

    DOEpatents

    Morales, Alfredo M [Livermore, CA; Gonzales, Marcela [Seattle, WA

    2006-03-07

    The present invention describes a method for fabricating an embossing tool or an x-ray mask tool, providing microstructures that smoothly vary in height from point-to-point in etched substrates, i.e., structure which can vary in all three dimensions. The process uses a lithographic technique to transfer an image pattern in the surface of a silicon wafer by exposing and developing the resist and then etching the silicon substrate. Importantly, the photoresist is variably exposed so that when developed some of the resist layer remains. The remaining undeveloped resist acts as an etchant barrier to the reactive plasma used to etch the silicon substrate and therefore provides the ability etch structures of variable depths.

  3. Composite silicon nanostructure arrays fabricated on optical fibre by chemical etching of multicrystal silicon film.

    PubMed

    Zuo, Zewen; Zhu, Kai; Ning, Lixin; Cui, Guanglei; Qu, Jun; Huang, Wanxia; Shi, Yi; Liu, Hong

    2015-04-17

    Integrating nanostructures onto optical fibers presents a promising strategy for developing new-fashioned devices and extending the scope of nanodevices' applications. Here we report the first fabrication of a composite silicon nanostructure on an optical fiber. Through direct chemical etching using an H2O2/HF solution, multicrystal silicon films with columnar microstructures are etched into a vertically aligned, inverted-cone-like nanorod array embedded in a nanocone array. A faster dissolution rate of the silicon at the void-rich boundary regions between the columns is found to be responsible for the separation of the columns, and thus the formation of the nanostructure array. The morphology of the nanorods primarily depends on the microstructure of the columns in the film. Through controlling the microstructure of the as-grown film and the etching parameters, the structural control of the nanostructure is promising. This fabrication method can be extended to a larger length scale, and it even allows roll-to-roll processing.

  4. Ultra-Shallow Depth Profiling of Arsenic Implants in Silicon by Hydride Generation-Inductively Coupled Plasma Atomic Emission Spectrometry

    NASA Astrophysics Data System (ADS)

    Matsubara, Atsuko; Kojima, Hisao; Itoga, Toshihiko; Kanehori, Keiichi

    1995-08-01

    High resolution depth profiling of arsenic (As) implanted into silicon wafers by a chemical technique is described. Silicon wafers are precisely etched through repeated oxidation by hydrogen peroxide solution and dissolution of the oxide by hydrofluoric acid solution. The etched silicon thickness is determined by inductively-coupled plasma atomic emission spectrometry (ICP-AES). Arsenic concentration is determined by hydride generation ICP-AES (HG-ICP-AES) with prereduction using potassium iodide. The detection limit of As in a 4-inch silicon wafer is 2.4×1018 atoms/cm3. The etched silicon thickness is controlled to less than 4±2 atomic layers. Depth profiling of an ultra-shallow As diffusion layer with the proposed method shows good agreement with profiling using the four-probe method or secondary ion mass spectrometry.

  5. Oxygen ion-beam microlithography

    DOEpatents

    Tsuo, Y.S.

    1991-08-20

    A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used. 5 figures.

  6. Oxygen ion-beam microlithography

    DOEpatents

    Tsuo, Y. Simon

    1991-01-01

    A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used.

  7. Towards nanometer-spaced silicon contacts to proteins

    NASA Astrophysics Data System (ADS)

    Schukfeh, Muhammed I.; Sepunaru, Lior; Behr, Pascal; Li, Wenjie; Pecht, Israel; Sheves, Mordechai; Cahen, David; Tornow, Marc

    2016-03-01

    A vertical nanogap device (VND) structure comprising all-silicon contacts as electrodes for the investigation of electronic transport processes in bioelectronic systems is reported. Devices were fabricated from silicon-on-insulator substrates whose buried oxide (SiO2) layer of a few nanometers in thickness is embedded within two highly doped single crystalline silicon layers. Individual VNDs were fabricated by standard photolithography and a combination of anisotropic and selective wet etching techniques, resulting in p+ silicon contacts, vertically separated by 4 or 8 nm, depending on the chosen buried oxide thickness. The buried oxide was selectively recess-etched with buffered hydrofluoric acid, exposing a nanogap. For verification of the devices’ electrical functionality, gold nanoparticles were successfully trapped onto the nanogap electrodes’ edges using AC dielectrophoresis. Subsequently, the suitability of the VND structures for transport measurements on proteins was investigated by functionalizing the devices with cytochrome c protein from solution, thereby providing non-destructive, permanent semiconducting contacts to the proteins. Current-voltage measurements performed after protein deposition exhibited an increase in the junctions’ conductance of up to several orders of magnitude relative to that measured prior to cytochrome c immobilization. This increase in conductance was lost upon heating the functionalized device to above the protein’s denaturation temperature (80 °C). Thus, the VND junctions allow conductance measurements which reflect the averaged electronic transport through a large number of protein molecules, contacted in parallel with permanent contacts and, for the first time, in a symmetrical Si-protein-Si configuration.

  8. Towards nanometer-spaced silicon contacts to proteins.

    PubMed

    Schukfeh, Muhammed I; Sepunaru, Lior; Behr, Pascal; Li, Wenjie; Pecht, Israel; Sheves, Mordechai; Cahen, David; Tornow, Marc

    2016-03-18

    A vertical nanogap device (VND) structure comprising all-silicon contacts as electrodes for the investigation of electronic transport processes in bioelectronic systems is reported. Devices were fabricated from silicon-on-insulator substrates whose buried oxide (SiO2) layer of a few nanometers in thickness is embedded within two highly doped single crystalline silicon layers. Individual VNDs were fabricated by standard photolithography and a combination of anisotropic and selective wet etching techniques, resulting in p(+) silicon contacts, vertically separated by 4 or 8 nm, depending on the chosen buried oxide thickness. The buried oxide was selectively recess-etched with buffered hydrofluoric acid, exposing a nanogap. For verification of the devices' electrical functionality, gold nanoparticles were successfully trapped onto the nanogap electrodes' edges using AC dielectrophoresis. Subsequently, the suitability of the VND structures for transport measurements on proteins was investigated by functionalizing the devices with cytochrome c protein from solution, thereby providing non-destructive, permanent semiconducting contacts to the proteins. Current-voltage measurements performed after protein deposition exhibited an increase in the junctions' conductance of up to several orders of magnitude relative to that measured prior to cytochrome c immobilization. This increase in conductance was lost upon heating the functionalized device to above the protein's denaturation temperature (80 °C). Thus, the VND junctions allow conductance measurements which reflect the averaged electronic transport through a large number of protein molecules, contacted in parallel with permanent contacts and, for the first time, in a symmetrical Si-protein-Si configuration.

  9. Silicon vertical microstructure fabrication by catalytic etching

    NASA Astrophysics Data System (ADS)

    Huang, Mao-Jung; Yang, Chii-Rong; Chang, Chun-Ming; Chu, Nien-Nan; Shiao, Ming-Hua

    2012-08-01

    This study presents an effective, simple and inexpensive process for forming micro-scale vertical structures on a (1 0 0) silicon wafer. Several modified etchants and micro-patterns including rectangular, snake-like, circular and comb patterns were employed to determine the optimum etching process. We found that an etchant solution consisting of 4.6 M hydrofluoric acid, 0.44 M hydrogen peroxide and isopropyl alcohol produces microstructures at an etching rate of 0.47 µm min-1 and surface roughness of 17.4 nm. All the patterns were transferred faithfully to the silicon substrate.

  10. Method for making circular tubular channels with two silicon wafers

    DOEpatents

    Yu, C.M.; Hui, W.C.

    1996-11-19

    A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si{sub 3}N{sub 4}) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO{sub 3}/CH{sub 3}COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary. 11 figs.

  11. Evaluation of effect of laser etching on shear bond strength between maxillofacial silicone and acrylic resin subjected to accelerated aging process.

    PubMed

    Rhea, Antonette; Ahila, S C; Kumar, B Muthu

    2017-01-01

    Maxillofacial prosthesis are supported by implants, require a retentive matrix to retain the suprastructure. The retentive matrix is made up of acrylic resin to which the silicone prostheses are anchored by micro-mechanical bond. The delamination of silicone away from the retentive matrix is a persisting problem in implant-supported maxillofacial prosthesis. This study aimed to evaluate the effect of laser etching on the shear bond strength (BS) between acrylic resin and maxillofacial silicone, after 24 h of fabrication and after 200 h of accelerated aging. The samples were prepared according to ISO/TR 11405:1994 in maxillofacial silicone and polymethyl methacrylate resin. The untreated samples were Group A (control), Group B (silicon carbide [SiC] paper abrasion 80 grit size), and Group C (erbium-doped yttrium aluminum garnet laser etching). Then, the samples were coated with primer and bonded to maxillofacial silicone. The samples were subjected to shear BS test in an universal testing machine after 24 h of fabrication and after 200 h of accelerated aging. The results were statistically analyzed using one-way ANOVA and Tukey's HSD post hoc test. The shear BS test after 24 h of fabrication showed better BS in SiC paper abrasion. The shear BS test after 200 h of accelerated aging showed better BS in laser etching compared to SiC abrasion. Laser etching produced better shear BS compared to conventional SiC paper abrasion after 200 h of accelerated aging process.

  12. Laser generation in microdisc resonators with InAs/GaAs quantum dots transferred on a silicon substrate

    NASA Astrophysics Data System (ADS)

    Nadtochiy, A. M.; Kryzhanovskaya, N. V.; Maximov, M. V.; Zhukov, A. E.; Moiseev, E. I.; Kulagina, M. M.; Vashanova, K. A.; Zadiranov, Yu. M.; Mukhin, I. S.; Arakcheeva, E. M.; Livshits, D.; Lipovskii, A. A.

    2013-09-01

    Microdisc resonators based on InAs/GaAs quantum dots separated from a GaAs substrate by selective etching and fixed to a silicon substrate by epoxy glue are studied using luminescence spectroscopy. A disc resonator 6 μm in diameter exhibits quasi-single-mode laser generation at a temperature of 78 K with a threshold power of 320 μW and λ/Δλ ˜ 27000.

  13. Wafer-Level Membrane-Transfer Process for Fabricating MEMS

    NASA Technical Reports Server (NTRS)

    Yang, Eui-Hyeok; Wiberg, Dean

    2003-01-01

    A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

  14. Die singulation method

    DOEpatents

    Swiler, Thomas P.; Garcia, Ernest J.; Francis, Kathryn M.

    2013-06-11

    A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with an HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

  15. Die singulation method

    DOEpatents

    Swiler, Thomas P [Albuquerque, NM; Garcia, Ernest J [Albuquerque, NM; Francis, Kathryn M [Rio Rancho, NM

    2014-01-07

    A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with a HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

  16. Understanding and controlling the step bunching instability in aqueous silicon etching

    NASA Astrophysics Data System (ADS)

    Bao, Hailing

    Chemical etching of silicon has been widely used for more than half a century in the semiconductor industry. It not only forms the basis for current wafer cleaning processes, it also serves as a powerful tool to create a variety of surface morphologies for different applications. Its potential for controlling surface morphology at the atomic scale over micron-size regions is especially appealing. In spite of its wide usage, the chemistry of silicon etching is poorly understood. Many seemingly simple but fundamental questions have not been answered. As a result, the development of new etchants and new etching protocols are based on expensive and tedious trial-and-error experiments. A better understanding of the etching mechanism would direct the rational formulation of new etchants that produce controlled etch morphologies. Particularly, micron-scale step bunches spontaneously develop on the vicinal Si(111) surface etched in KOH or other anisotropic aqueous etchants. The ability to control the size, orientation, density and regularity of these surface features would greatly improve the performance of microelectromechanical devices. This study is directed towards understanding the chemistry and step bunching instability in aqueous anisotropic etching of silicon through a combination of experimental techniques and theoretical simulations. To reveal the cause of step-bunching instability, kinetic Monte Carlo simulations were constructed based on an atomistic model of the silicon lattice and a modified kinematic wave theory. The simulations showed that inhomogeneity was the origin of step-bunching, which was confirmed through STM studies of etch morphologies created under controlled flow conditions. To quantify the size of the inhomogeneities in different etchants and to clarify their effects, a five-parallel-trench pattern was fabricated. This pattern used a nitride mask to protect most regions of the wafer; five evenly spaced etch windows were opened to the Si(110) substrate. Combining data from these etched patterns and surface IR spectra, a modified mechanism, which explained most experimental observations, was proposed. Control of the step-bunching instability was accomplished with a second micromachined etch barrier pattern which consisted of a circular array of seventy-two long, narrow trenches in an etch mask. Using this pattern, well aligned, regularly shaped, evenly-distributed, near-atomically flat terraces in micron size were produced controllably.

  17. Minimizing Isolate Catalyst Motion in Metal-Assisted Chemical Etching for Deep Trenching of Silicon Nanohole Array.

    PubMed

    Kong, Lingyu; Zhao, Yunshan; Dasgupta, Binayak; Ren, Yi; Hippalgaonkar, Kedar; Li, Xiuling; Chim, Wai Kin; Chiam, Sing Yang

    2017-06-21

    The instability of isolate catalysts during metal-assisted chemical etching is a major hindrance to achieve high aspect ratio structures in the vertical and directional etching of silicon (Si). In this work, we discussed and showed how isolate catalyst motion can be influenced and controlled by the semiconductor doping type and the oxidant concentration ratio. We propose that the triggering event in deviating isolate catalyst motion is brought about by unequal etch rates across the isolate catalyst. This triggering event is indirectly affected by the oxidant concentration ratio through the etching rates. While the triggering events are stochastic, the doping concentration of silicon offers a good control in minimizing isolate catalyst motion. The doping concentration affects the porosity at the etching front, and this directly affects the van der Waals (vdWs) forces between the metal catalyst and Si during etching. A reduction in the vdWs forces resulted in a lower bending torque that can prevent the straying of the isolate catalyst from its directional etching, in the event of unequal etch rates. The key understandings in isolate catalyst motion derived from this work allowed us to demonstrate the fabrication of large area and uniformly ordered sub-500 nm nanoholes array with an unprecedented high aspect ratio of ∼12.

  18. Fabrication and Modification of Nanoporous Silicon Particles

    NASA Technical Reports Server (NTRS)

    Ferrari, Mauro; Liu, Xuewu

    2010-01-01

    Silicon-based nanoporous particles as biodegradable drug carriers are advantageous in permeation, controlled release, and targeting. The use of biodegradable nanoporous silicon and silicon dioxide, with proper surface treatments, allows sustained drug release within the target site over a period of days, or even weeks, due to selective surface coating. A variety of surface treatment protocols are available for silicon-based particles to be stabilized, functionalized, or modified as required. Coated polyethylene glycol (PEG) chains showed the effective depression of both plasma protein adsorption and cell attachment to the modified surfaces, as well as the advantage of long circulating. Porous silicon particles are micromachined by lithography. Compared to the synthesis route of the nanomaterials, the advantages include: (1) the capability to make different shapes, not only spherical particles but also square, rectangular, or ellipse cross sections, etc.; (2) the capability for very precise dimension control; (3) the capacity for porosity and pore profile control; and (4) allowance of complex surface modification. The particle patterns as small as 60 nm can be fabricated using the state-of-the-art photolithography. The pores in silicon can be fabricated by exposing the silicon in an HF/ethanol solution and then subjecting the pores to an electrical current. The size and shape of the pores inside silicon can be adjusted by the doping of the silicon, electrical current application, the composition of the electrolyte solution, and etching time. The surface of the silicon particles can be modified by many means to provide targeted delivery and on-site permanence for extended release. Multiple active agents can be co-loaded into the particles. Because the surface modification of particles can be done on wafers before the mechanical release, asymmetrical surface modification is feasible. Starting from silicon wafers, a treatment, such as KOH dipping or reactive ion etching (RIE), may be applied to make the surface rough. This helps remove the nucleation layer. A protective layer is then deposited on the wafer. The protective layer, such as silicon nitride film or photoresist film, protects the wafer from electrochemical etching in an HF-based solution. A lithography technique is applied to pattern the particles onto the protective film. The undesired area of the protective film is removed, and the protective film on the back side of the wafer is also removed. Then the pattern is exposed to HF/surfactant solution, and a larger DC electrical current is applied to the wafers for a selected time. This step removes the nucleation layer. Then a DC current is applied to generate the nanopores. Next, a large electrical current is applied to generate a release layer. The particles are mechanically suspended in the solvent and collected by filtration or centrifuge.

  19. MITLL Silicon Integrated Photonics Process: Design Guide

    DTIC Science & Technology

    2015-07-31

    Silicon Integrated Photonics Process Comprehensive Design Guide 16  Deep Etch for Fiber Coupling (DEEP_ETCH...facets for fiber coupling. Standard design layers for each process are defined in Section 3, but other options can be made available. Notes on...a silicon thinning process that can create very low loss waveguides (and which better suppresses back scatter and, therefore, resonance splitting in

  20. Method for forming silicon on a glass substrate

    DOEpatents

    McCarthy, Anthony M.

    1995-01-01

    A method by which single-crystal silicon microelectronics may be fabricated on glass substrates at unconventionally low temperatures. This is achieved by fabricating a thin film of silicon on glass and subsequently forming the doped components by a short wavelength (excimer) laser doping procedure and conventional patterning techniques. This method may include introducing a heavily boron doped etch stop layer on a silicon wafer using an excimer laser, which permits good control of the etch stop layer removal process. This method additionally includes dramatically reducing the remaining surface roughness of the silicon thin films after etching in the fabrication of silicon on insulator wafers by scanning an excimer laser across the surface of the silicon thin film causing surface melting, whereby the surface tension of the melt causes smoothing of the surface during recrystallization. Applications for this method include those requiring a transparent or insulating substrate, such as display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard and high temperature electronics.

  1. Method for forming silicon on a glass substrate

    DOEpatents

    McCarthy, A.M.

    1995-03-07

    A method by which single-crystal silicon microelectronics may be fabricated on glass substrates at unconventionally low temperatures. This is achieved by fabricating a thin film of silicon on glass and subsequently forming the doped components by a short wavelength (excimer) laser doping procedure and conventional patterning techniques. This method may include introducing a heavily boron doped etch stop layer on a silicon wafer using an excimer laser, which permits good control of the etch stop layer removal process. This method additionally includes dramatically reducing the remaining surface roughness of the silicon thin films after etching in the fabrication of silicon on insulator wafers by scanning an excimer laser across the surface of the silicon thin film causing surface melting, whereby the surface tension of the melt causes smoothing of the surface during recrystallization. Applications for this method include those requiring a transparent or insulating substrate, such as display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard and high temperature electronics. 15 figs.

  2. Trench formation in <110> silicon for millimeter-wave switching device

    NASA Astrophysics Data System (ADS)

    Datta, P.; Kumar, Praveen; Nag, Manoj; Bhattacharya, D. K.; Khosla, Y. P.; Dahiya, K. K.; Singh, D. V.; Venkateswaran, R.; Kumar, Devender; Kesavan, R.

    1999-11-01

    Anisotropic etching using alkaline solution has been adopted to form trenches in silicon while fabricating surface oriented bulk window SPST switches. An array pattern has been etched on silicon with good control on depth of trenches. KOH-water solution is seen to yield a poor surface finish. Use of too much of additive like isopropyl alcohol improves the surface condition but distorts the array pattern due to loss of anisotropy. However, controlled use of this additive during the last phase of trench etching is found to produce trenched arrays with desired depth, improved surface finish and minimum distortion of lateral dimensions.

  3. Nanostructured gold and platinum electrodes on silicon structures for biosensing

    NASA Astrophysics Data System (ADS)

    Ogurtsov, V. I.; Sheehan, M. M.

    2005-01-01

    Gold and platinum metal electrodes on Si/SiO2 having undergone anisotropic potassium hydroxide (KOH) etch treatment are considered. This treatment etches at different rates and directions in the material resulting in creation of numerous pyramid shaped holes in the silicon substrate. This surface is used to make metal electrodes with increased electrode efficiency. The electrodes can serve as the sensors or as the sensor substrates (for surface polymer modification) and because both gold and platinum are inert they have applications for food safety biosensing. Wine, an economically significant food product, was chosen as a matrix, and impedance spectroscopy (EIS) was selected as a method of investigation of electrode behaviour. Based on results of EIS, different complexity equivalent circuits were determined by applying fitting mean square root optimisation of sensor complex impedance measurements.

  4. Etching process for improving the strength of a laser-machined silicon-based ceramic article

    DOEpatents

    Copley, Stephen M.; Tao, Hongyi; Todd-Copley, Judith A.

    1991-01-01

    A process for improving the strength of laser-machined articles formed of a silicon-based ceramic material such as silicon nitride, in which the laser-machined surface is immersed in an etching solution of hydrofluoric acid and nitric acid for a duration sufficient to remove substantially all of a silicon film residue on the surface but insufficient to allow the solution to unduly attack the grain boundaries of the underlying silicon nitride substrate. This effectively removes the silicon film as a source of cracks that otherwise could propagate downwardly into the silicon nitride substrate and significantly reduce its strength.

  5. Etching process for improving the strength of a laser-machined silicon-based ceramic article

    DOEpatents

    Copley, S.M.; Tao, H.; Todd-Copley, J.A.

    1991-06-11

    A process is disclosed for improving the strength of laser-machined articles formed of a silicon-based ceramic material such as silicon nitride, in which the laser-machined surface is immersed in an etching solution of hydrofluoric acid and nitric acid for a duration sufficient to remove substantially all of a silicon film residue on the surface but insufficient to allow the solution to unduly attack the grain boundaries of the underlying silicon nitride substrate. This effectively removes the silicon film as a source of cracks that otherwise could propagate downwardly into the silicon nitride substrate and significantly reduce its strength. 1 figure.

  6. Facile synthesis of silicon nanowire-nanopillar superhydrophobic structures

    NASA Astrophysics Data System (ADS)

    Roy, Abhijit; Satpati, Biswarup

    2018-04-01

    We have used metal assisted chemical etching (MACE) method to produce silicon (Si) nanowire-nanopillar array. Nanowire-nanopillar combined structures show higher degree of hydrophobicity compared to its nanowire (Si-NW) counterparts. The rate of etching is depended on initial metal deposition. The structural analysis was carried out using scanning electron microscopy (SEM) in combination with transmission electron microscopy (TEM) to determine different parameters like etching direction, crystallinity etc.

  7. Titanium disilicide formation by sputtering of titanium on heated silicon substrate

    NASA Astrophysics Data System (ADS)

    Tanielian, M.; Blackstone, S.

    1984-09-01

    We have sputter deposited titanium on bare silicon substrates at elevated temperatures. We find that at a substrate temperature of about 515 °C titanium silicide is formed due to the reaction of the titanium with the Si. The resistivity of the silicide is about 15 μΩ cm and it is not etchable in a selective titanium etch. This process can have applications in low-temperature, metal-oxide-semiconductor self-aligned silicide formation for very large scale integrated

  8. Improved PECVD Si x N y film as a mask layer for deep wet etching of the silicon

    NASA Astrophysics Data System (ADS)

    Han, Jianqiang; Yin, Yi Jun; Han, Dong; Dong, LiZhen

    2017-09-01

    Although plasma enhanced chemical vapor deposition (PECVD) silicon nitride (Si x N y ) films have been extensively investigated by many researchers, requirements of film properties vary from device to device. For some applications utilizing Si x N y film as the mask Layer for deep wet etching of the silicon, it is very desirable to obtain a high quality film. In this study, Si x N y films were deposited on silicon substrates by PECVD technique from the mixtures of NH3 and 5% SiH4 diluted in Ar. The deposition temperature and RF power were fixed at 400 °C and 20 W, respectively. By adjusting the SiH4/NH3 flow ratio, Si x N y films of different compositions were deposited on silicon wafers. The stoichiometry, residual stress, etch rate in 1:50 HF, BHF solution and 40% KOH solution of deposited Si x N y films were measured. The experimental results show that the optimum SiH4/NH3 flow ratio at which deposited Si x N y films can perfectly protect the polysilicon resistors on the front side of wafers during KOH etching is between 1.63 and 2.24 under the given temperature and RF power. Polysilicon resistors protected by the Si x N y films can withstand 6 h 40% KOH double-side etching at 80 °C. At the range of SiH4/NH3 flow ratios, the Si/N atom ratio of films ranges from 0.645 to 0.702, which slightly deviate the ideal stoichiometric ratio of LPCVD Si3N4 film. In addition, the silicon nitride films with the best protection effect are not the films of minimum etch rate in KOH solution.

  9. A deep etching mechanism for trench-bridging silicon nanowires

    NASA Astrophysics Data System (ADS)

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Erdem Alaca, B.

    2016-03-01

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  10. A deep etching mechanism for trench-bridging silicon nanowires.

    PubMed

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Alaca, B Erdem

    2016-03-04

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  11. New Deep Reactive Ion Etching Process Developed for the Microfabrication of Silicon Carbide

    NASA Technical Reports Server (NTRS)

    Evans, Laura J.; Beheim, Glenn M.

    2005-01-01

    Silicon carbide (SiC) is a promising material for harsh environment sensors and electronics because it can enable such devices to withstand high temperatures and corrosive environments. Microfabrication techniques have been studied extensively in an effort to obtain the same flexibility of machining SiC that is possible for the fabrication of silicon devices. Bulk micromachining using deep reactive ion etching (DRIE) is attractive because it allows the fabrication of microstructures with high aspect ratios (etch depth divided by lateral feature size) in single-crystal or polycrystalline wafers. Previously, the Sensors and Electronics Branch of the NASA Glenn Research Center developed a DRIE process for SiC using the etchant gases sulfur hexafluoride (SF6) and argon (Ar). This process provides an adequate etch rate of 0.2 m/min and yields a smooth surface at the etch bottom. However, the etch sidewalls are rougher than desired, as shown in the preceding photomicrograph. Furthermore, the resulting structures have sides that slope inwards, rather than being precisely vertical. A new DRIE process for SiC was developed at Glenn that produces smooth, vertical sidewalls, while maintaining an adequately high etch rate.

  12. In-depth porosity control of mesoporous silicon layers by an anodization current adjustment

    NASA Astrophysics Data System (ADS)

    Lascaud, J.; Defforge, T.; Certon, D.; Valente, D.; Gautier, G.

    2017-12-01

    The formation of thick mesoporous silicon layers in P+-type substrates leads to an increase in the porosity from the surface to the interface with silicon. The adjustment of the current density during the electrochemical etching of porous silicon is an intuitive way to control the layer in-depth porosity. The duration and the current density during the anodization were varied to empirically model porosity variations with layer thickness and build a database. Current density profiles were extracted from the model in order to etch layer with in-depth control porosity. As a proof of principle, an 80 μm-thick porous silicon multilayer was synthetized with decreasing porosities from 55% to 35%. The results show that the assessment of the in-depth porosity could be significantly enhanced by taking into account the pure chemical etching of the layer in the hydrofluoric acid-based electrolyte.

  13. Method and apparatus for stable silicon dioxide layers on silicon grown in silicon nitride ambient

    NASA Technical Reports Server (NTRS)

    Cohen, R. A.; Wheeler, R. K. (Inventor)

    1974-01-01

    A method and apparatus for thermally growing stable silicon dioxide layers on silicon is disclosed. A previously etched and baked silicon nitride tube placed in a furnace is used to grow the silicon dioxide. First, pure oxygen is allowed to flow through the tube to initially coat the inside surface of the tube with a thin layer of silicon dioxide. After the tube is coated with the thin layer of silicon dioxide, the silicon is oxidized thermally in a normal fashion. If the tube becomes contaminated, the silicon dioxide is etched off thereby exposing clean silicon nitride and then the inside of the tube is recoated with silicon dioxide. As is disclosed, the silicon nitride tube can also be used as the ambient for the pyrolytic decomposition of silane and ammonia to form thin layers of clean silicon nitride.

  14. Etching nano-holes in silicon carbide using catalytic platinum nano-particles

    NASA Astrophysics Data System (ADS)

    Moyen, E.; Wulfhekel, W.; Lee, W.; Leycuras, A.; Nielsch, K.; Gösele, U.; Hanbücken, M.

    2006-09-01

    The catalytic reaction of platinum during a hydrogen etching process has been used to perform controlled vertical nanopatterning of silicon carbide substrates. A first set of experiments was performed with platinum powder randomly distributed on the SiC surface. Subsequent hydrogen etching in a hot wall reactor caused local atomic hydrogen production at the catalyst resulting in local SiC etching and hole formation. Secondly, a highly regular and monosized distribution of Pt was obtained by sputter deposition of Pt through an Au membrane serving as a contact mask. After the lift-off of the mask, the hydrogen etching revealed the onset of well-controlled vertical patterned holes on the SiC surface.

  15. Multi-spot porous silicon chip prepared from asymmetric electrochemical etching for human immunoglobin G sensor.

    PubMed

    Um, Sungyong; Cho, Bomin; Woo, Hee-Gweon; Sohn, Honglae

    2011-08-01

    Multi-spot porous silicon (MSPS)-based optical biosensor was developed to specify the biomolecules. MSPS chip was generated by an electrochemical etching of silicon wafer using an asymmetric electrode configuration in aqueous ethanolic HF solution and constituted with nine arrayed porous silicon. MSPS prepared from anisotropic etching conditions displayed the Fabry-Pérot fringe patterns which varied spatially across the porous silicon (PS). Each spot displayed different reflection resonances and different pore characteristics as a function of the lateral distance from the Pt counter electrode. The sensor system consists of the 3 x 3 spot array of porous silicon modified with Protein A. The system was probed with various fragments of an aqueous Human Immunoglobin G (Ig G) analyte. The sensor operated by measurement of the reflection patterns in the white light reflection spectrum of MSPS. Molecular binding and specificity was detected as a shift in wavelength of these Fabry-Pérot fringe patterns.

  16. The dual role of silver during silicon etching in HF solution.

    PubMed

    Abouda-Lachiheb, Manel; Nafie, Nesma; Bouaicha, Mongi

    2012-08-13

    It was reported that during silicon etching, silver was subjected to have a controversial role. Some researchers debate that silver protects silicon, and, at the same time, other ones confirm that silver catalyzes silicon underneath. In this paper, we give experimental results arguing the dual role that silver has during the formation of silicon nanostructures. We give a proof that the role of silver depends on the experimental details and the intrinsic properties of silver during its deposition on the silicon wafer. Through our investigations, we tracked the silver particles that indicated which mechanism is involved. Characterizations of the prepared samples were made using a scanning electron microscope.

  17. System and Method for Fabricating Super Conducting Circuitry on Both Sides of an Ultra-Thin Layer

    NASA Technical Reports Server (NTRS)

    Brown, Ari D. (Inventor); Mikula, Vilem (Inventor)

    2017-01-01

    A method of fabricating circuitry in a wafer includes depositing a superconducting metal on a silicon on insulator wafer having a handle wafer, coating the wafer with a sacrificial layer and bonding the wafer to a thermally oxide silicon wafer with a first epoxy. The method includes flipping the wafer, thinning the flipped wafer by removing a handle wafer, etching a buried oxide layer, depositing a superconducting layer, bonding the wafer to a thermally oxidized silicon wafer having a handle wafer using an epoxy, flipping the wafer again, thinning the flipped wafer, etching a buried oxide layer from the wafer and etching the sacrificial layer from the wafer. The result is a wafer having superconductive circuitry on both sides of an ultra-thin silicon layer.

  18. Thermal ink-jet device using single-chip silicon microchannels

    NASA Astrophysics Data System (ADS)

    Wuu, DongSing; Cheng, Chen-Yue; Horng, RayHua; Chan, G. C.; Chiu, Sao-Ling; Wu, Yi-Yung

    1998-06-01

    We present a new method to fabricate silicon microfluidic channels by through-hole etching with subsequent planarization. The method is based on etching out the deep grooves through a perforated silicon carbide membrane, followed by sealing the membrane with plasma-enhanced chemical vapor deposition (PECVD). Low-pressure-chemical-vapor- deposited (LPCVD) polysilicon was used as a sacrificial layer to define the channel structure and only one etching step is required. This permits the realization of planarization after a very deep etching step in silicon and offers the possibility for film deposition, resist spinning and film patterning across deep grooves. The process technology was demonstrated on the fabrication of a monolithic silicon microchannel structure for thermal inkjet printing. The Ta-Al heater arrays are integrated on the top of each microchannel, which connect to a common on-chip front-end ink reservoir. The fabrication of this device requires six masks and no active nozzle-to-chip alignment. Moreover, the present micromachining process is compatible with the addition of on-chip circuitry for multiplexing the heater control signals. Heat transfer efficiency to the ink is enhanced by the high thermal conductivity of the silicon carbide in the channel ceiling, while the bulk silicon maintains high interchannel isolation. The fabricated inkjet devices show the droplet sizes of 20 - 50 micrometer in diameter with various channel dimensions and stable ejection of ink droplets more than 1 million.

  19. Fabrication and etching processes of silicon-based PZT thin films

    NASA Astrophysics Data System (ADS)

    Zhao, Hongjin; Liu, Yanxiang; Liu, Jianshe; Ren, Tian-Ling; Liu, Li-Tian; Li, Zhijian

    2001-09-01

    Lead-zirconate-titanate (PZT) thin films on silicon were prepared by a sol-gel method. Phase characterization and crystal orientation of the films were investigated by x-ray diffraction analysis (XRD). It was shown that the PZT thin films had a perfect perovskite structure after annealed at a low temperature of 600 degrees C. PZT thin films were chemically etched using HCl/HF solution through typical semiconductor lithographic process, and the etching condition was optimized. The scanning electron microscopy results indicated that the PZT thin film etching problem was well solved for the applications of PZT thin film devices.

  20. EDITORIAL: The Fifth International Workshop on Physical Chemistry of Wet Etching of Semiconductors (PCWES 2006)

    NASA Astrophysics Data System (ADS)

    Seidel, Helmut

    2007-04-01

    The biannual Workshop on Physical Chemistry of Wet Etching of Semiconductors (PCWES) was held in Saarbrücken, Germany in June 2006 for the fifth time in its history. The event was initiated in 1998 by Miko Elwenspoek from Twente University. It is a dedicated workshop with a typical attendance of about 30 scientists with multidisciplinary backgrounds from all parts of the world working in the field. Starting off in Holten in The Netherlands in 1998, subsequent workshops have been held at Toulouse, France in 2000, Nara, Japan in 2002, and Montreal, Canada in 2004. The initial focus was upon anisotropic etching of silicon in alkaline solutions, including surface topology, modelling aspects and applications. This process has found a wide range of applications in microsystems technology (MST), i.e. in the fabrication of microelectromechanical systems (MEMS). Most prominently, it provides the technological basis for bulk micromachining. More recently, other semiconductors such as germanium, III-V compounds and, particularly, wide-bandgap materials have started to enter the field. Furthermore, electrochemical aspects have gained in importance and the formation of porous silicon has also become a considerable part of the programme. From the very beginning up to the present time there was and is a strong focus on illumination of the underlying mechanism of crystallographic anisotropy, as well as on the understanding of electrochemical and dopant-induced etch stop phenomena. The fifth workshop, presented in Saarbrücken, included a total of twenty four contributions, six of which were as posters. Five of these are included in this partial special issue of Journal of Micromechanics and Microengineering as full length papers after having undergone the standard review process. The selection of contributions starts with the first invited paper given by M Gosalvez et al, resulting from a collaboration between Nagoya University, Japan and Helsinki University of Technology, Finland. It provides an atomistic point of view on the etching of the principal crystal surfaces of silicon. The step flow process and step bunching are explained in considerable detail, as well as effects of metal impurities. Simulation aspects of this approach are discussed in the second paper, also headed by M Gosalvez. They are based on a kinetic Monte Carlo scheme. The third contribution, from Z-f Zhou et al from the Southeast University in Nanjing, China also focuses on simulation aspects of anisotropic silicon etching. It proposes a novel 3-D cellular automata approach which is capable of describing the behaviour of high index planes in an efficient way. By choosing a dynamic algorithm, the programme gains speed and uses memory efficiently. The focus of the final two papers is on photoelectrochemical aspects of etching. D H van Dorp and J J Kelly from the University of Utrecht, The Netherlands describe the photoelectrochemistry and the etching behaviour of SiC in KOH. Silicon carbide is particularly attractive for harsh environment applications, due to its high chemical inertness. Therefore it is very difficult to etch purely chemically and can only be attacked by a light-induced process. Finally, F Yang et al from the Hahn-Meitner-Institut and ISAS Institute in Berlin, Germany describe an experiment of anodic oxide formation and subsequent etch back on (111) silicon surfaces in a NH4F solution. By monitoring the photoluminescence intensity and the photovoltage amplitude, effects of interface recombination and surface charging can be observed and characterized at the different steps of preparation. In total, the five papers provide a very fine overview of current activities and areas of interest in the field of wet chemical etching of semiconductors. The next PCWES workshop will be held in Asia in 2008.

  1. Cryo-Etched Black Silicon for Use as Optical Black

    NASA Technical Reports Server (NTRS)

    Yee, Karl Y.; White, Victor E.; Mouroulis, Pantazis; Eastwood, Michael L.

    2011-01-01

    Stray light reflected from the surface of imaging spectrometer components in particular, the spectrometer slit degrade the image quality. A technique has been developed for rapid, uniform, and cost-effective black silicon formation based on inductively coupled plasma (ICP) etching at cryogenic temperatures. Recent measurements show less than 1-percent total reflectance from 350 2,500 nm of doped black silicon formed in this way, making it an excellent option for texturing of component surfaces for reduction of stray light. Oxygen combines with SF6 + Si etch byproducts to form a passivation layer atop the Si when the etch is performed at cryogenic temperatures. Excess flow of oxygen results in micromasking and the formation of black silicon. The process is repeatable and reliable, and provides control over etch depth and sidewall profile. Density of the needles can be controlled to some extent. Regions to be textured can be patterned lithographically. Adhesion is not an issue as the nanotips are part of the underlying substrate. This is in contrast to surface growth/deposition techniques such as carbon nanotubes (CNTs). The black Si surface is compatible with wet processing, including processing with solvents, the textured surface is completely inorganic, and it does not outgas. In radiometry applications, optical absorbers are often constructed using gold black or CNTs. This black silicon technology is an improvement for these types of applications.

  2. Silicon Alignment Pins: An Easy Way to Realize a Wafer-to-Wafer Alignment

    NASA Technical Reports Server (NTRS)

    Jung-Kubiak, Cecile; Reck, Theodore J.; Lin, Robert H.; Peralta, Alejandro; Gill, John J.; Lee, Choonsup; Siles, Jose; Toda, Risaku; Chattopadhyay, Goutam; Cooper, Ken B.; hide

    2013-01-01

    Submillimeter heterodyne instruments play a critical role in addressing fundamental questions regarding the evolution of galaxies as well as being a crucial tool in planetary science. To make these instruments compatible with small platforms, especially for the study of the outer planets, or to enable the development of multi-pixel arrays, it is essential to reduce the mass, power, and volume of the existing single-pixel heterodyne receivers. Silicon micromachining technology is naturally suited for making these submillimeter and terahertz components, where precision and accuracy are essential. Waveguide and channel cavities are etched in a silicon bulk material using deep reactive ion etching (DRIE) techniques. Power amplifiers, multiplier and mixer chips are then integrated and the silicon pieces are stacked together to form a supercompact receiver front end. By using silicon micromachined packages for these components, instrument mass can be reduced and higher levels of integration can be achieved. A method is needed to assemble accurately these silicon pieces together, and a technique was developed here using etched pockets and silicon pins to align two wafers together.

  3. Fabrication of through-silicon via arrays by photo-assisted electrochemical etching and supercritical electroplating

    NASA Astrophysics Data System (ADS)

    Chuang, Ho-Chiao; Yang, Hsi-Min; Wu, Cheng-Xiang; Sanchez, Jorge; Shyu, Jenq-Huey

    2017-01-01

    This paper aims to fabricate high aspect ratio through silicon via (TSV) by photo-assisted electrochemical etching (PAECE) and supercritical CO2 copper electroplating. A blind-holed silicon array was first fabricated by PAECE. By studying the etching parameters, including hydrofluoric acid concentration, etchant temperature, stirring speed, tetrabutylammonium perchlorate (TBAP) content, and Ohmic contact thickness, an array of pores with a 1∶45 aspect ratio (height=250 μm and diameter=5.5 μm) was obtained successfully. Moreover, TBAP and Kodak Photo-Flo (PF) solution were added into the etchant to acquire smooth sidewalls for the first time. TBAP was added for the first time to serve as an antistatic agent in deionized water-based etchant to prevent side-branch etching, and PF was used to degasify hydrogen bubbles in the etchant. The effect of gold thickness over Ohmic contact was investigated. Randomized etching was observed with an Au thickness of 200 Å, but it can be improved by increasing the etching voltage. The silicon mold of through-holes was filled with metal using supercritical CO2 copper electroplating, which features high diffusivity, permeability, and density. The TSV structure (aspect ratio=1∶35) was obtained at a supercritical pressure of 2000 psi, temperature of 50°C, and current density of 30 mA/cm2 in 2.5 h.

  4. Micro-pyramidal structure fabrication on polydimethylsiloxane (PDMS) by Si (100) KOH wet etching

    NASA Astrophysics Data System (ADS)

    Hwang, Shinae; Lim, Kyungsuk; Shin, Hyeseon; Lee, Seongjae; Jang, Moongyu

    2017-10-01

    A high degree of accuracy in bulk micromachining is essential to fabricate micro-electro-mechanical systems (MEMS) devices. A series of etching experiments is carried out using 40 wt% KOH solutions at the constant temperature of 70 °C. Before wet etching, SF6 and O2 are used as the dry etching gas to etch the masking layers of a 100 nm thick Si3N4 and SiO2, respectively. The experimental results indicate that (100) silicon wafer form the pyramidal structures with (111) single crystal planes. All the etch profiles are analyzed using Scanning Electron Microscope (SEM) and the wet etch rates depend on the opening sizes. The manufactured pyramidal structures are used as the pattern of silicon mold. After a short hardening of coated polydimethylsiloxane (PDMS) layer, micro pyramidal structures are easily transferred to PDMS layer.

  5. Micropatterned arrays of porous silicon: toward sensory biointerfaces.

    PubMed

    Flavel, Benjamin S; Sweetman, Martin J; Shearer, Cameron J; Shapter, Joseph G; Voelcker, Nicolas H

    2011-07-01

    We describe the fabrication of arrays of porous silicon spots by means of photolithography where a positive photoresist serves as a mask during the anodization process. In particular, photoluminescent arrays and porous silicon spots suitable for further chemical modification and the attachment of human cells were created. The produced arrays of porous silicon were chemically modified by means of a thermal hydrosilylation reaction that facilitated immobilization of the fluorescent dye lissamine, and alternatively, the cell adhesion peptide arginine-glycine-aspartic acid-serine. The latter modification enabled the selective attachment of human lens epithelial cells on the peptide functionalized regions of the patterns. This type of surface patterning, using etched porous silicon arrays functionalized with biological recognition elements, presents a new format of interfacing porous silicon with mammalian cells. Porous silicon arrays with photoluminescent properties produced by this patterning strategy also have potential applications as platforms for in situ monitoring of cell behavior.

  6. Influence of the doping level on the porosity of silicon nanowires prepared by metal-assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Geyer, Nadine; Wollschläger, Nicole; Fuhrmann, Bodo; Tonkikh, Alexander; Berger, Andreas; Werner, Peter; Jungmann, Marco; Krause-Rehberg, Reinhard; Leipner, Hartmut S.

    2015-06-01

    A systematic method to control the porosity of silicon nanowires is presented. This method is based on metal-assisted chemical etching (MACE) and takes advantage of an HF/H2O2 etching solution and a silver catalyst in the form of a thin patterned film deposited on a doped silicon wafer. It is found that the porosity of the etched nanowires can be controlled by the doping level of the wafer. For low doping concentrations, the wires are primarily crystalline and surrounded by only a very thin layer of porous silicon (pSi) layer, while for highly doped silicon, they are porous in their entire volume. We performed a series of controlled experiments to conclude that there exists a well-defined critical doping concentration separating the crystalline and porous regimes. Furthermore, transmission electron microscopy investigations showed that the pSi has also a crystalline morphology on a length scale smaller than the pore size, determined from positron annihilation lifetime spectroscopy to be mesoscopic. Based on the experimental evidence, we devise a theoretical model of the pSi formation during MACE and apply it for better control of the nanowire morphology.

  7. 3D silicon shapes through bulk nano structuration by focused ion beam implantation and wet etching

    NASA Astrophysics Data System (ADS)

    Salhi, Billel; Troadec, David; Boukherroub, Rabah

    2017-05-01

    The work presented in this paper concerns the synthesis of silicon (Si) 2D and 3D nanostructures using the delayed effect, caused by implanted Ga ions, on the dissolution of Si in aqueous solutions of tetramethylammonium hydroxide (TMAH). The crystalline silicon substrates (100) are first cleaned and then hydrogenated by immersion in an aqueous solution of hydrofluoric acid. The ion implantation is then carried out by a focused ion beam by varying the dose and the exposure time. Chemical etching in aqueous solutions of TMAH at 80 °C leads to the selective dissolution of the Si planes not exposed to the ions. The preliminary results obtained in the laboratory made it possible to optimize the experimental conditions for the synthesis of 2D and 3D nanoobjects of controlled shape and size. Analysis by transmission electron microscopy and energy dispersive x-ray showed the amorphous nature of the nanostructures obtained and the presence of 5%-20% Ga in these nanoobjects. The first experiments of recrystallization by rapid thermal annealing allowed to reconstitute the crystal structure of these nanoobjects.

  8. 3D silicon shapes through bulk nano structuration by focused ion beam implantation and wet etching.

    PubMed

    Salhi, Billel; Troadec, David; Boukherroub, Rabah

    2017-05-19

    The work presented in this paper concerns the synthesis of silicon (Si) 2D and 3D nanostructures using the delayed effect, caused by implanted Ga ions, on the dissolution of Si in aqueous solutions of tetramethylammonium hydroxide (TMAH). The crystalline silicon substrates (100) are first cleaned and then hydrogenated by immersion in an aqueous solution of hydrofluoric acid. The ion implantation is then carried out by a focused ion beam by varying the dose and the exposure time. Chemical etching in aqueous solutions of TMAH at 80 °C leads to the selective dissolution of the Si planes not exposed to the ions. The preliminary results obtained in the laboratory made it possible to optimize the experimental conditions for the synthesis of 2D and 3D nanoobjects of controlled shape and size. Analysis by transmission electron microscopy and energy dispersive x-ray showed the amorphous nature of the nanostructures obtained and the presence of 5%-20% Ga in these nanoobjects. The first experiments of recrystallization by rapid thermal annealing allowed to reconstitute the crystal structure of these nanoobjects.

  9. Deep Etching Process Developed for the Fabrication of Silicon Carbide Microsystems

    NASA Technical Reports Server (NTRS)

    Beheim, Glenn M.

    2000-01-01

    Silicon carbide (SiC), because of its superior electrical and mechanical properties at elevated temperatures, is a nearly ideal material for the microminiature sensors and actuators that are used in harsh environments where temperatures may reach 600 C or greater. Deep etching using plasma methods is one of the key processes used to fabricate silicon microsystems for more benign environments, but SiC has proven to be a more difficult material to etch, and etch depths in SiC have been limited to several micrometers. Recently, the Sensors and Electronics Technology Branch at the NASA Glenn Research Center at Lewis Field developed a plasma etching process that was shown to be capable of etching SiC to a depth of 60 mm. Deep etching of SiC is achieved by inductive coupling of radiofrequency electrical energy to a sulfur hexafluoride (SF6) plasma to direct a high flux of energetic ions and reactive fluorine atoms to the SiC surface. The plasma etch is performed at a low pressure, 5 mtorr, which together with a high gas throughput, provides for rapid removal of the gaseous etch products. The lateral topology of the SiC microstructure is defined by a thin film of etch-resistant material, such as indium-tin-oxide, which is patterned using conventional photolithographic processes. Ions from the plasma bombard the exposed SiC surfaces and supply the energy needed to initiate a reaction between SiC and atomic fluorine. In the absence of ion bombardment, no reaction occurs, so surfaces perpendicular to the wafer surface (the etch sidewalls) are etched slowly, yielding the desired vertical sidewalls.

  10. High aspect ratio sub-15 nm silicon trenches from block copolymer templates.

    PubMed

    Gu, Xiaodan; Liu, Zuwei; Gunkel, Ilja; Chourou, S T; Hong, Sung Woo; Olynick, Deirdre L; Russell, Thomas P

    2012-11-08

    High-aspect-ratio sub-15-nm silicon trenches are fabricated directly from plasma etching of a block copolymer mask. A novel method that combines a block copolymer reconstruction process and reactive ion etching is used to make the polymer mask. Silicon trenches are characterized by various methods and used as a master for subsequent imprinting of different materials. Silicon nanoholes are generated from a block copolymer with cylindrical microdomains oriented normal to the surface. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Electrically Conductive and Optically Active Porous Silicon Nanowires

    PubMed Central

    Qu, Yongquan; Liao, Lei; Li, Yujing; Zhang, Hua; Huang, Yu; Duan, Xiangfeng

    2009-01-01

    We report the synthesis of vertical silicon nanowire array through a two-step metal-assisted chemical etching of highly doped n-type silicon (100) wafers in a solution of hydrofluoric acid and hydrogen peroxide. The morphology of the as-grown silicon nanowires is tunable from solid nonporous nanowires, nonporous/nanoporous core/shell nanowires, and entirely nanoporous nanowires by controlling the hydrogen peroxide concentration in the etching solution. The porous silicon nanowires retain the single crystalline structure and crystallographic orientation of the starting silicon wafer, and are electrically conductive and optically active with visible photoluminescence. The combination of electronic and optical properties in the porous silicon nanowires may provide a platform for the novel optoelectronic devices for energy harvesting, conversion and biosensing. PMID:19807130

  12. Roll up nanowire battery from silicon chips

    PubMed Central

    Vlad, Alexandru; Reddy, Arava Leela Mohana; Ajayan, Anakha; Singh, Neelam; Gohy, Jean-François; Melinte, Sorin; Ajayan, Pulickel M.

    2012-01-01

    Here we report an approach to roll out Li-ion battery components from silicon chips by a continuous and repeatable etch-infiltrate-peel cycle. Vertically aligned silicon nanowires etched from recycled silicon wafers are captured in a polymer matrix that operates as Li+ gel-electrolyte and electrode separator and peeled off to make multiple battery devices out of a single wafer. Porous, electrically interconnected copper nanoshells are conformally deposited around the silicon nanowires to stabilize the electrodes over extended cycles and provide efficient current collection. Using the above developed process we demonstrate an operational full cell 3.4 V lithium-polymer silicon nanowire (LIPOSIL) battery which is mechanically flexible and scalable to large dimensions. PMID:22949696

  13. The dual role of silver during silicon etching in HF solution

    PubMed Central

    2012-01-01

    It was reported that during silicon etching, silver was subjected to have a controversial role. Some researchers debate that silver protects silicon, and, at the same time, other ones confirm that silver catalyzes silicon underneath. In this paper, we give experimental results arguing the dual role that silver has during the formation of silicon nanostructures. We give a proof that the role of silver depends on the experimental details and the intrinsic properties of silver during its deposition on the silicon wafer. Through our investigations, we tracked the silver particles that indicated which mechanism is involved. Characterizations of the prepared samples were made using a scanning electron microscope. PMID:22888998

  14. Impact of substrate etching on plasmonic elements and metamaterials: preventing red shift and improving refractive index sensitivity.

    PubMed

    Moritake, Yuto; Tanaka, Takuo

    2018-02-05

    We propose and demonstrate the elimination of substrate influence on plasmon resonance by using selective and isotropic etching of substrates. Preventing the red shift of the resonance due to substrates and improving refractive index sensitivity were experimentally demonstrated by using plasmonic nanostructures fabricated on silicon substrates. Applying substrate etching decreases the effective refractive index around the metal nanostructures, resulting in elimination of the red shift. Improvement of sensitivity to the refractive index environment was demonstrated by using plasmonic metamaterials with Fano resonance based on far field interference. Change in quality factors (Q-factors) of the Fano resonance by substrate etching was also investigated in detail. The presence of a closely positioned substrate distorts the electric field distribution and degrades the Q-factors. Substrate etching dramatically increased the refractive index sensitivity reaching to 1532 nm/RIU since the electric fields under the nanostructures became accessible through substrate etching. The FOM was improved compared to the case without the substrate etching. The method presented in this paper is applicable to a variety of plasmonic structures to eliminate the influence of substrates for realizing high performance plasmonic devices.

  15. Fabricating and Controlling Silicon Zigzag Nanowires by Diffusion-Controlled Metal-Assisted Chemical Etching Method.

    PubMed

    Chen, Yun; Zhang, Cheng; Li, Liyi; Tuan, Chia-Chi; Wu, Fan; Chen, Xin; Gao, Jian; Ding, Yong; Wong, Ching-Ping

    2017-07-12

    Silicon (Si) zigzag nanowires (NWs) have a great potential in many applications because of its high surface/volume ratio. However, fabricating Si zigzag NWs has been challenging. In this work, a diffusion-controlled metal-assisted chemical etching method is developed to fabricate Si zigzag NWs. By tailoring the composition of etchant to change its diffusivity, etching direction, and etching time, various zigzag NWs can be easily fabricated. In addition, it is also found that a critical length of NW (>1 μm) is needed to form zigzag nanowires. Also, the amplitude of zigzag increases as the location approaches the center of the substrate and the length of zigzag nanowire increases. It is also demonstrated that such zigzag NWs can help the silicon substrate for self-cleaning and antireflection. This method may provide a feasible and economical way to fabricate zigzag NWs and novel structures for broad applications.

  16. A novel 2D silicon nano-mold fabrication technique for linear nanochannels over a 4 inch diameter substrate

    PubMed Central

    Yin, Zhifu; Qi, Liping; Zou, Helin; Sun, Lei

    2016-01-01

    A novel low-cost 2D silicon nano-mold fabrication technique was developed based on Cu inclined-deposition and Ar+ (argon ion) etching. With this technique, sub-100 nm 2D (two dimensional) nano-channels can be etched economically over the whole area of a 4 inch n-type <100> silicon wafer. The fabricating process consists of only 4 steps, UV (Ultraviolet) lithography, inclined Cu deposition, Ar+ sputter etching, and photoresist & Cu removing. During this nano-mold fabrication process, we investigated the influence of the deposition angle on the width of the nano-channels and the effect of Ar+ etching time on their depth. Post-etching measurements showed the accuracy of the nanochannels over the whole area: the variation in width is 10%, in depth it is 11%. However, post-etching measurements also showed the accuracy of the nanochannels between chips: the variation in width is 2%, in depth it is 5%. With this newly developed technology, low-cost and large scale 2D nano-molds can be fabricated, which allows commercial manufacturing of nano-components over large areas. PMID:26752559

  17. Fabrication of high aspect ratio structure and its releasing for silicon on insulator MEMS/MOEMS device application

    NASA Astrophysics Data System (ADS)

    Fan, Ji; Zhang, Wen Ting; Liu, Jin Quan; Wu, Wen Jie; Zhu, Tao; Tu, Liang Cheng

    2015-04-01

    We systematically investigate the fabrication and dry-release technology for a high aspect ratio (HAR) structure with vertical and smooth silicon etching sidewalls. One-hundred-micrometer silicon on insulator (SOI) wafers are used in this work. By optimizing the process parameters of inductively coupled plasma deep reactive-ion etching, a HAR (˜25∶1) structure with a microtrench width of 4 μm has been demonstrated. A perfect etching profile has been obtained in which the structures present an almost perfect verticality of 0.10 μm and no sidewall scallops. The root-mean square roughness of silicon sidewalls is 20 to 29 nm. An in situ dry-release method using notching effect is employed after etching. By analysis, we found that the final notch length is typically an aspect-ratio-dependent process. The structure designed in this work has been successfully released by this in situ dry-release method, and the released bottom roughness effectively prohibits the stiction mechanism. The results demonstrate potential applications for design and fabrication of HAR SOI MEMS/MOEMS.

  18. Visible-blind ultraviolet photodetectors on porous silicon carbide substrates

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Naderi, N.; Hashim, M.R., E-mail: roslan@usm.my

    2013-06-01

    Highlights: • Highly reliable UV detectors are fabricated on porous silicon carbide substrates. • The optical properties of samples are enhanced by increasing the current density. • The optimized sample exhibits enhanced sensitivity to the incident UV radiation. - Abstract: Highly reliable visible-blind ultraviolet (UV) photodetectors were successfully fabricated on porous silicon carbide (PSC) substrates. High responsivity and high photoconductive gain were observed in a metal–semiconductor–metal ultraviolet photodetector that was fabricated on an optimized PSC substrate. The PSC samples were prepared via the UV-assisted photo-electrochemical etching of an n-type hexagonal silicon carbide (6H-SiC) substrate using different etching current densities. Themore » optical results showed that the current density is an outstanding etching parameter that controls the porosity and uniformity of PSC substrates. A highly porous substrate was synthesized using a suitable etching current density to enhance its light absorption, thereby improving the sensitivity of UV detector with this substrate. The electrical characteristics of fabricated devices on optimized PSC substrates exhibited enhanced sensitivity and responsivity to the incident radiation.« less

  19. Controllable Si (100) micro/nanostructures by chemical-etching-assisted femtosecond laser single-pulse irradiation

    NASA Astrophysics Data System (ADS)

    Li, Xiaowei; Xie, Qian; Jiang, Lan; Han, Weina; Wang, Qingsong; Wang, Andong; Hu, Jie; Lu, Yongfeng

    2017-05-01

    In this study, silicon micro/nanostructures of controlled size and shape are fabricated by chemical-etching-assisted femtosecond laser single-pulse irradiation, which is a flexible, high-throughput method. The pulse fluence is altered to create various laser printing patterns for the etching mask, resulting in the sequential evolution of three distinct surface micro/nanostructures, namely, ring-like microstructures, flat-top pillar microstructures, and spike nanostructures. The characterized diameter of micro/nanostructures reveals that they can be flexibly tuned from the micrometer (˜2 μm) to nanometer (˜313 nm) scales by varying the laser pulse fluence in a wide range. Micro-Raman spectroscopy and transmission electron microscopy are utilized to demonstrate that the phase state changes from single-crystalline silicon (c-Si) to amorphous silicon (a-Si) after single-pulse femtosecond laser irradiation. This amorphous layer with a lower etching rate then acts as a mask in the wet etching process. Meanwhile, the on-the-fly punching technique enables the efficient fabrication of large-area patterned surfaces on the centimeter scale. This study presents a highly efficient method of controllably manufacturing silicon micro/nanostructures with different single-pulse patterns, which has promising applications in the photonic, solar cell, and sensors fields.

  20. Decoration of silicon nanostructures with copper particles for simultaneous selective capture and mass spectrometry detection of His-tagged model peptide.

    PubMed

    Coffinier, Yannick; Kurylo, Ievgen; Drobecq, Hervé; Szunerits, Sabine; Melnyk, Oleg; Zaitsev, Vladimir N; Boukherroub, Rabah

    2014-10-21

    We present in this work a simple and fast preparation method of a new affinity surface-assisted laser/desorption ionization mass spectrometry (SALDI-MS) substrate based on silicon nanostructures decorated with copper particles. The silicon nanostructures were fabricated by the metal-assisted chemical etching (MACE) method. Then, superhydrophilic areas surrounded by superhydrophobic regions were formed through hydrosilylation reaction of 1-octadecene, followed by local degradation of the octadecyl layer. After that, copper particles were deposited in the hydrophilic areas by using the electroless method. We have demonstrated that these surfaces were able to perform high selective capture of model His-tag peptide even in a complex mixture such as serum solution. Then, the captured peptide was detected by mass spectrometry at a femtomolar level without the need of organic matrix.

  1. Is actinometry reliable for monitoring Si and silicone halides produced in silicon etching plasmas? A comparison with their absolute densities measured by UV broad band absorption

    NASA Astrophysics Data System (ADS)

    Kogelschatz, M.; Cunge, G.; Sadeghi, N.

    2006-03-01

    SiCl{x} radicals, the silicon etching by-products, are playing a major role in silicon gate etching processes because their redeposition on the wafer leads to the formation of a SiOCl{x} passivation layer on the feature sidewalls, which controls the final shape of the etching profile. These radicals are also the precursors to the formation of a similar layer on the reactor walls, leading to process drifts. As a result, the understanding and modelling of these processes rely on the knowledge of their densities in the plasma. Actinometry technique, based on optical emission, is often used to measure relative variations of the density of the above mentioned radicals, even if it is well known that the results obtained with this technique might not always be reliable. To determine the validity domain of actinometry in industrial silicon-etching high density plasmas, we measure the RF source power and pressure dependences of the absolute densities of SiCl{x} (x=0{-}2), SiF and SiBr radicals, deduced from UV broad band absorption spectroscopy. These results are compared to the evolution of the corresponding actinometry signals from these radicals. It is shown that actinometry predicts the global trends of the species density variations when the RF power is changed at constant pressure (that is to say when only the electron density changes) but it completely fails if the gas pressure, hence the electron temperature, changes.

  2. Beam Simulation Studies of Plasma-Surface Interactions in Fluorocarbon Etching of Silicon and Silicon Dioxide

    NASA Astrophysics Data System (ADS)

    Gray, David C.

    1992-01-01

    A molecular beam apparatus has been constructed which allows the synthesis of dominant species fluxes to a wafer surface during fluorocarbon plasma etching. These species include atomic F as the primary etchant, CF _2 as a potential polymer forming precursor, and Ar^{+} or CF _{rm x}^{+} type ions. Ionic and neutral fluxes employed are within an order of magnitude of those typical of fluorocarbon plasmas and are well characterized through the use of in -situ probes. Etching yields and product distributions have been measured through the use of in-situ laser interferometry and line-of-sight mass spectrometry. XPS studies of etched surfaces were performed to assess surface chemical bonding states and average surface stoichiometry. A useful design guide was developed which allows optimal design of straight -tube molecular beam dosers in the collisionally-opaque regime. Ion-enhanced surface reaction kinetics have been studied as a function of the independently variable fluxes of free radicals and ions, as well as ion energy and substrate temperature. We have investigated the role of Ar ^{+} ions in enhancing the chemistries of F and CF_2 separately, and in combination on undoped silicon and silicon dioxide surfaces. We have employed both reactive and inert ions in the energy range most relevant to plasma etching processes, 20-500 eV, through the use of Kaufman and ECR type ion sources. The effect of increasing ion energy on the etching of fluorine saturated silicon and silicon dioxide surfaces was quantified through extensions of available low energy physical sputtering theory. Simple "site"-occupation models were developed for the quantification of the ion-enhanced fluorine etching kinetics in these systems. These models are suitable for use in topography evolution simulators (e.g. SAMPLE) for the predictive modeling of profile evolution in non-depositing fluorine-based plasmas such as NF_3 and SF_6. (Copies available exclusively from MIT Libraries, Rm. 14-0551, Cambridge, MA 02139-4307. Ph. 617 -253-5668; Fax 617-253-1690.) (Abstract shortened with permission of school.).

  3. Characterization of nanostructured CuO-porous silicon matrix formed on copper-coated silicon substrate via electrochemical etching

    NASA Astrophysics Data System (ADS)

    Naddaf, M.; Mrad, O.; Al-zier, A.

    2014-06-01

    A pulsed anodic etching method has been utilized for nanostructuring of a copper-coated p-type (100) silicon substrate, using HF-based solution as electrolyte. Scanning electron microscopy reveals the formation of a nanostructured matrix that consists of island-like textures with nanosize grains grown onto fiber-like columnar structures separated with etch pits of grooved porous structures. Spatial micro-Raman scattering analysis indicates that the island-like texture is composed of single-phase cupric oxide (CuO) nanocrystals, while the grooved porous structure is barely related to formation of porous silicon (PS). X-ray diffraction shows that both the grown CuO nanostructures and the etched silicon layer have the same preferred (220) orientation. Chemical composition obtained by means of X-ray photoelectron spectroscopic (XPS) analysis confirms the presence of the single-phase CuO on the surface of the patterned CuO-PS matrix. As compared to PS formed on the bare silicon substrate, the room-temperature photoluminescence (PL) from the CuO-PS matrix exhibits an additional weak `blue' PL band as well as a blue shift in the PL band of PS (S-band). This has been revealed from XPS analysis to be associated with the enhancement in the SiO2 content as well as formation of the carbonyl group on the surface in the case of the CuO-PS matrix.

  4. Fine Collimator Grids Using Silicon Metering Structure

    NASA Technical Reports Server (NTRS)

    Eberhard, Carol

    1998-01-01

    The project Fine Collimator Grids Using Silicon Metering Structure was managed by Dr. Carol Eberhard of the Electromagnetic Systems & Technology Department (Space & Technology Division) of TRW who also wrote this final report. The KOH chemical etching of the silicon wafers was primarily done by Dr. Simon Prussin of the Electrical Engineering Department of UCLA at the laboratory on campus. Moshe Sergant of the Superconductor Electronics Technology Department (Electronics Systems & Technology Division) of TRW and Dr. Prussin were instrumental in developing the low temperature silicon etching processes. Moshe Sergant and George G. Pinneo of the Microelectronics Production Department (Electronics Systems & Technology Division) of TRW were instrumental in developing the processes for filling the slots etched in the silicon wafers with metal-filled materials. Their work was carried out in the laboratories at the Space Park facility. Moshe Sergant is also responsible for the impressive array of Scanning Electron Microscope images with which the various processes were monitored. Many others also contributed their time and expertise to the project. I wish to thank them all.

  5. Optimization of the Surface Structure on Black Silicon for Surface Passivation

    NASA Astrophysics Data System (ADS)

    Jia, Xiaojie; Zhou, Chunlan; Wang, Wenjing

    2017-03-01

    Black silicon shows excellent anti-reflection and thus is extremely useful for photovoltaic applications. However, its high surface recombination velocity limits the efficiency of solar cells. In this paper, the effective minority carrier lifetime of black silicon is improved by optimizing metal-catalyzed chemical etching (MCCE) method, using an Al2O3 thin film deposited by atomic layer deposition (ALD) as a passivation layer. Using the spray method to eliminate the impact on the rear side, single-side black silicon was obtained on n-type solar grade silicon wafers. Post-etch treatment with NH4OH/H2O2/H2O mixed solution not only smoothes the surface but also increases the effective minority lifetime from 161 μs of as-prepared wafer to 333 μs after cleaning. Moreover, adding illumination during the etching process results in an improvement in both the numerical value and the uniformity of the effective minority carrier lifetime.

  6. Optimization of the Surface Structure on Black Silicon for Surface Passivation.

    PubMed

    Jia, Xiaojie; Zhou, Chunlan; Wang, Wenjing

    2017-12-01

    Black silicon shows excellent anti-reflection and thus is extremely useful for photovoltaic applications. However, its high surface recombination velocity limits the efficiency of solar cells. In this paper, the effective minority carrier lifetime of black silicon is improved by optimizing metal-catalyzed chemical etching (MCCE) method, using an Al 2 O 3 thin film deposited by atomic layer deposition (ALD) as a passivation layer. Using the spray method to eliminate the impact on the rear side, single-side black silicon was obtained on n-type solar grade silicon wafers. Post-etch treatment with NH 4 OH/H 2 O 2 /H 2 O mixed solution not only smoothes the surface but also increases the effective minority lifetime from 161 μs of as-prepared wafer to 333 μs after cleaning. Moreover, adding illumination during the etching process results in an improvement in both the numerical value and the uniformity of the effective minority carrier lifetime.

  7. Fabrication of p-type porous silicon nanowire with oxidized silicon substrate through one-step MACE

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Li, Shaoyuan; Faculty of Metallurgical and Energy Engineering, Kunming University of Science and Technology, Kunming 650093; Ma, Wenhui, E-mail: mwhsilicon@163.com

    2014-05-01

    In this paper, the simple pre-oxidization process is firstly used to treat the starting silicon wafer, and then MPSiNWs are successfully fabricated from the moderately doped wafer by one-step MACE technology in HF/AgNO{sub 3} system. The PL spectrum of MPSiNWs obtained from the oxidized silicon wafers show a large blue-shift, which can be attributed to the deep Q. C. effect induced by numerous mesoporous structures. The effects of HF and AgNO{sub 3} concentration on formation of SiNWs were carefully investigated. The results indicate that the higher HF concentration is favorable to the growth of SiNWs, and the density of SiNWsmore » is significantly reduced when Ag{sup +} ions concentrations are too high. The deposition behaviors of Ag{sup +} ions on oxidized and unoxidized silicon surface were studied. According to the experimental results, a model was proposed to explain the formation mechanism of porous SiNWs by etching the oxidized starting silicon. - Graphical abstract: Schematic cross-sectional views of PSiNWs array formation by etching oxidized silicon wafer in HF/AgNO{sub 3} solution. (A) At the starting point; (B) during the etching process; and (C) after Ag dendrites remove. - Highlights: • Prior to etching, a simple pre-oxidation is firstly used to treat silicon substrate. • The medially doped p-type MPSiNWs are prepared by one-step MACE. • Deposition behaviors of Ag{sup +} ions on oxidized and unoxidized silicon are studied. • A model is finally proposed to explain the formation mechanism of PSiNWs.« less

  8. Study on Silicon Microstructure Processing Technology Based on Porous Silicon

    NASA Astrophysics Data System (ADS)

    Shang, Yingqi; Zhang, Linchao; Qi, Hong; Wu, Yalin; Zhang, Yan; Chen, Jing

    2018-03-01

    Aiming at the heterogeneity of micro - sealed cavity in silicon microstructure processing technology, the technique of preparing micro - sealed cavity of porous silicon is proposed. The effects of different solutions, different substrate doping concentrations, different current densities, and different etching times on the rate, porosity, thickness and morphology of the prepared porous silicon were studied. The porous silicon was prepared by different process parameters and the prepared porous silicon was tested and analyzed. For the test results, optimize the process parameters and experiments. The experimental results show that the porous silicon can be controlled by optimizing the parameters of the etching solution and the doping concentration of the substrate, and the preparation of porous silicon with different porosity can be realized by different doping concentration, so as to realize the preparation of silicon micro-sealed cavity, to solve the sensor sensitive micro-sealed cavity structure heterogeneous problem, greatly increasing the application of the sensor.

  9. Crystal structure of laser-induced subsurface modifications in Si

    NASA Astrophysics Data System (ADS)

    Verburg, P. C.; Smillie, L. A.; Römer, G. R. B. E.; Haberl, B.; Bradby, J. E.; Williams, J. S.; Huis in't Veld, A. J.

    2015-08-01

    Laser-induced subsurface modification of dielectric materials is a well-known technology. Applications include the production of optical components and selective etching. In addition to dielectric materials, the subsurface modification technology can be applied to silicon, by employing near to mid-infrared radiation. An application of subsurface modifications in silicon is laser-induced subsurface separation, which is a method to separate wafers into individual dies. Other applications for which proofs of concept exist are the formation of waveguides and resistivity tuning. However, limited knowledge is available about the crystal structure of subsurface modifications in silicon. In this work, we investigate the geometry and crystal structure of laser-induced subsurface modifications in monocrystalline silicon wafers. In addition to the generation of lattice defects, we found that transformations to amorphous silicon and Si -iii/Si -xii occur as a result of the laser irradiation.

  10. Birefringence and anisotropic optical absorption in porous silicon

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Efimova, A. I., E-mail: efimova@vega.phys.msu.ru; Krutkova, E. Yu.; Golovan', L. A.

    2007-10-15

    The refractive indices and the coefficients of optical absorption by free charge carriers and local vibrations in porous silicon (por-Si) films, comprising nanometer-sized silicon residues (nanocrystals) separated by nanometer-sized pores (nanopores) formed in the course of electrochemical etching of the initial single crystal silicon, have been studied by polarization-resolved IR absorption spectroscopy techniques. It is shown that the birefringence observed in por-Si is related to the anisotropic shapes of nanocrystals and nanopores, while the anisotropy (dichroism) of absorption by the local vibrational modes is determined predominantly by the microrelief of the surface of nanocrystals. It is demonstrated that silicon-hydrogen surfacemore » bonds in nanocrystals can be restored by means of selective hydrogen thermodesorption with the formation of a considerable number of H-terminated surface Si-Si dimers.« less

  11. Light-trapping optimization in wet-etched silicon photonic crystal solar cells

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Eyderman, Sergey, E-mail: sergey.eyderman@utoronto.ca; John, Sajeev; Department of Physics, King Abdul-Aziz University, Jeddah

    2015-07-14

    We demonstrate, by numerical solution of Maxwell's equations, near-perfect solar light-trapping and absorption over the 300–1100 nm wavelength band in silicon photonic crystal (PhC) architectures, amenable to fabrication by wet-etching and requiring less than 10 μm (equivalent bulk thickness) of crystalline silicon. These PhC's consist of square lattices of inverted pyramids with sides comprised of various (111) silicon facets and pyramid center-to-center spacing in the range of 1.3–2.5 μm. For a wet-etched slab with overall height H = 10 μm and lattice constant a = 2.5 μm, we find a maximum achievable photo-current density (MAPD) of 42.5 mA/cm{sup 2}, falling not far from 43.5 mA/cm{sup 2}, correspondingmore » to 100% solar absorption in the range of 300–1100 nm. We also demonstrate a MAPD of 37.8 mA/cm{sup 2} for a thinner silicon PhC slab of overall height H = 5 μm and lattice constant a = 1.9 μm. When H is further reduced to 3 μm, the optimal lattice constant for inverted pyramids reduces to a = 1.3 μm and provides the MAPD of 35.5 mA/cm{sup 2}. These wet-etched structures require more than double the volume of silicon, in comparison to the overall mathematically optimum PhC structure (consisting of slanted conical pores), to achieve the same degree of solar absorption. It is suggested these 3–10 μm thick structures are valuable alternatives to currently utilized 300 μm-thick textured solar cells and are suitable for large-scale fabrication by wet-etching.« less

  12. Development of microchannel plate x-ray optics

    NASA Technical Reports Server (NTRS)

    Kaaret, Philip; Chen, Andrew

    1994-01-01

    The goal of this research program was to develop a novel technique for focusing x-rays based on the optical system of a lobster's eye. A lobster eye employs many closely packed reflecting surfaces arranged within a spherical or cylindrical shell. These optics have two unique properties: they have unlimited fields of view and can be manufactured via replication of identical structures. Because the angular resolution is given by the ratio of the size of the individual optical elements to the focal length, optical elements with sizes on the order of one hundred microns are required to achieve good angular resolution with a compact telescope. We employed anisotropic etching of single crystal silicon wafers for the fabrication of micron-scale optical elements. This technique, commonly referred to as silicon micromachining, is based on silicon fabrication techniques developed by the microelectronics industry. An anisotropic etchant is a chemical which etches certain silicon crystal planes much more rapidly than others. Using wafers in which the slowly etched crystal planes are aligned perpendicularly to the wafer surface, it is possible to etch a pattern completely through a wafer with very little distortion. Our optics consist of rectangular pores etched completely through group of zone axes (110) oriented silicon wafers. The larger surfaces of the pores (the mirror elements) were aligned with the group of zone axes (111) planes of the crystal perpendicular to the wafer surface. We have succeeded in producing silicon lenses with a geometry suitable for 1-d focusing x-ray optics. These lenses have an aspect ratio (40:1) suitable for x-ray reflection and have very good optical surface alignment. We have developed a number of process refinements which improved the quality of the lens geometry and the repeatability of the etch process. A significant progress was made in obtaining good optical surface quality. The RMS roughness was decreased from 110 A for our initial lenses to 30 A in the final lenses. A further factor of three improvement in surface quality is required for the production of efficient x-ray optics. In addition to the silicon fabrication, an x-ray beam line was constructed at Columbia for testing the optics.

  13. Patterned microstructures formed with MeV Au implantation in Si(1 0 0)

    NASA Astrophysics Data System (ADS)

    Rout, Bibhudutta; Greco, Richard R.; Zachry, Daniel P.; Dymnikov, Alexander D.; Glass, Gary A.

    2006-09-01

    Energetic (MeV) Au implantation in Si(1 0 0) (n-type) through masked micropatterns has been used to create layers resistant to KOH wet etching. Microscale patterns were produced in PMMA and SU(8) resist coatings on the silicon substrates using P-beam writing and developed. The silicon substrates were subsequently exposed using 1.5 MeV Au 3+ ions with fluences as high as 1 × 10 16 ions/cm 2 and additional patterns were exposed using copper scanning electron microscope calibration grids as masks on the silicon substrates. When wet etched with KOH microstructures were created in the silicon due to the resistance to KOH etching cause by the Au implantation. The process of combining the fabrication of masked patterns with P-beam writing with broad beam Au implantation through the masks can be a promising, cost-effective process for nanostructure engineering with Si.

  14. Thermally-isolated silicon-based integrated circuits and related methods

    DOEpatents

    Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

    2017-05-09

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  15. Formation of ultra Si/Ti nano thin film for enhancing silicon solar cell efficiency

    NASA Astrophysics Data System (ADS)

    Adam, T.; Dhahi, T. S.; Mohammed, M.; Al-Hajj, A. M.; Hashim, U.

    2017-10-01

    An alternative electrical source has l has become the major quest of every researchers due to it numerous advantages and applications of power supply and as electronic devices are becoming more and more portable. A highly efficient power supply is become inevitable. Thus. in this study, present ultrasonic based assisted fabrication of electrochemical silicon-Titanium nano thin film by in-house simple technique, uniformly silicon Nano film was fabricated and etched with HF (40%): C2H5OH (99%):1:1, < 20 nm pore diameter of silicon was fabricated. The surface and morphology reveal that the method produce uniform nano silicon porous layer with smaller silicon pores with high etching efficiency. The silicon-Titanium integrated nano porous exhibited excellent observation properties with low reflection index ~ 1.1 compared to silicon alone thin film.

  16. Highly Manufacturable Deep (Sub-Millimeter) Etching Enabled High Aspect Ratio Complex Geometry Lego-Like Silicon Electronics.

    PubMed

    Ghoneim, Mohamed Tarek; Hussain, Muhammad Mustafa

    2017-04-01

    A highly manufacturable deep reactive ion etching based process involving a hybrid soft/hard mask process technology shows high aspect ratio complex geometry Lego-like silicon electronics formation enabling free-form (physically flexible, stretchable, and reconfigurable) electronic systems. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Design and Fabrication of Electrostatically Actuated Silicon Microshutters Arrays

    NASA Technical Reports Server (NTRS)

    Oh, L.; Li, M.; Kim, K.; Kelly, D.; Kutyrev, A.; Moseley, S.

    2017-01-01

    We have developed a new fabrication process to actuate microshutter arrays (MSA) electrostatically at NASA Goddard Space Flight Center. The microshutters are fabricated on silicon with thin silicon nitride membranes. A pixel size of each microshutter is 100 x 200 micrometers 2. The microshutters rotate 90 degrees on torsion bars. The selected microshutters are actuated, held, and addressed electrostatically by applying voltages on the electrodes the front and back sides of the microshutters. The atomic layer deposition (ALD) of aluminum oxide was used to insulate electrodes on the back side of walls; the insulation can withstand over 100 V. The ALD aluminum oxide is dry etched, and then the microshutters are released in vapor HF.

  18. Freestanding silicon quantum dots: origin of red and blue luminescence.

    PubMed

    Gupta, Anoop; Wiggers, Hartmut

    2011-02-04

    In this paper, we studied the behavior of silicon quantum dots (Si-QDs) after etching and surface oxidation by means of photoluminescence (PL) measurements, Fourier transform infrared spectroscopy (FTIR) and electron paramagnetic resonance spectroscopy (EPR). We observed that etching of red luminescing Si-QDs with HF acid drastically reduces the concentration of defects and significantly enhances their PL intensity together with a small shift in the emission spectrum. Additionally, we observed the emergence of blue luminescence from Si-QDs during the re-oxidation of freshly etched particles. Our results indicate that the red emission is related to the quantum confinement effect, while the blue emission from Si-QDs is related to defect states at the newly formed silicon oxide surface.

  19. Simple fabrication of closed-packed IR microlens arrays on silicon by femtosecond laser wet etching

    NASA Astrophysics Data System (ADS)

    Meng, Xiangwei; Chen, Feng; Yang, Qing; Bian, Hao; Du, Guangqing; Hou, Xun

    2015-10-01

    We demonstrate a simple route to fabricate closed-packed infrared (IR) silicon microlens arrays (MLAs) based on femtosecond laser irradiation assisted by wet etching method. The fabricated MLAs show high fill factor, smooth surface and good uniformity. They can be used as optical devices for IR applications. The exposure and etching parameters are optimized to obtain reproducible microlens with hexagonal and rectangular arrangements. The surface roughness of the concave MLAs is only 56 nm. This presented method is a maskless process and can flexibly change the size, shape and the fill factor of the MLAs by controlling the experimental parameters. The concave MLAs on silicon can work in IR region and can be used for IR sensors and imaging applications.

  20. Morphological Study on Porous Silicon Carbide Membrane Fabricated by Double-Step Electrochemical Etching

    NASA Astrophysics Data System (ADS)

    Omiya, Takuma; Tanaka, Akira; Shimomura, Masaru

    2012-07-01

    The structure of porous silicon carbide membranes that peeled off spontaneously during electrochemical etching was studied. They were fabricated from n-type 6H SiC(0001) wafers by a double-step electrochemical etching process in a hydrofluoric electrolyte. Nanoporous membranes were obtained after double-step etching with current densities of 10-20 and 60-100 mA/cm2 in the first and second steps, respectively. Microporous membranes were also fabricated after double-step etching with current densities of 100 and 200 mA/cm2. It was found that the pore diameter is influenced by the etching current in step 1, and that a higher current is required in step 2 when the current in step 1 is increased. During the etching processes in steps 1 and 2, vertical nanopore and lateral crack formations proceed, respectively. The influx pathway of hydrofluoric solution, expansion of generated gases, and transfer limitation of positive holes to the pore surface are the key factors in the peeling-off mechanism of the membrane.

  1. Hemispherical cavities on silicon substrates: an overview of micro fabrication techniques

    NASA Astrophysics Data System (ADS)

    Poncelet, O.; Rasson, J.; Tuyaerts, R.; Coulombier, M.; Kotipalli, R.; Raskin, J.-P.; Francis, L. A.

    2018-04-01

    Hemispherical photonic crystals found in species like Papilio blumei and Cicendella chinensis have inspired new applications like anti-counterfeiting devices and gas sensors. In this work, we investigate and compare four different ways to micro fabricate such hemispherical cavities: using colloids as template, by wet (HNA) or dry (XeF2) isotropic etching of silicon and by electrochemical etching of silicon. The shape and the roughness of the obtained cavities have been discussed and the pros/cons for each method are highlighted.

  2. Spin-on metal oxide materials with high etch selectivity and wet strippability

    NASA Astrophysics Data System (ADS)

    Yao, Huirong; Mullen, Salem; Wolfer, Elizabeth; McKenzie, Douglas; Rahman, Dalil; Cho, JoonYeon; Padmanaban, Munirathna; Petermann, Claire; Hong, SungEun; Her, YoungJun

    2016-03-01

    Metal oxide or metal nitride films are used as hard mask materials in semiconductor industry for patterning purposes due to their excellent etch resistances against the plasma etches. Chemical vapor deposition (CVD) or atomic layer deposition (ALD) techniques are usually used to deposit the metal containing materials on substrates or underlying films, which uses specialized equipment and can lead to high cost-of-ownership and low throughput. We have reported novel spin-on coatings that provide simple and cost effective method to generate metal oxide films possessing good etch selectivity and can be removed by chemical agents. In this paper, new spin-on Al oxide and Zr oxide hard mask formulations are reported. The new metal oxide formulations provide higher metal content compared to previously reported material of specific metal oxides under similar processing conditions. These metal oxide films demonstrate ultra-high etch selectivity and good pattern transfer capability. The cured films can be removed by various chemical agents such as developer, solvents or wet etchants/strippers commonly used in the fab environment. With high metal MHM material as an underlayer, the pattern transfer process is simplified by reducing the number of layers in the stack and the size of the nano structure is minimized by replacement of a thicker film ACL. Therefore, these novel AZ® spinon metal oxide hard mask materials can potentially be used to replace any CVD or ALD metal, metal oxide, metal nitride or spin-on silicon-containing hard mask films in 193 nm or EUV process.

  3. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Gray, D.C.; Tepermeister, I.; Sawin, H.H.

    A multiple beam apparatus has been constructed to facilitate the study of ion-enhanced fluorine chemistry on undoped polysilicon and silicon dioxide surfaces by allowing the fluxes of fluorine (F) atoms and argon (Ar{sup +}) ions to be independently varied over several orders of magnitude. The chemical nature of the etching surfaces has been investigated following the vacuum transfer of the sample dies to an adjoining x-ray photoelectron spectroscopy facility. The etching {open_quotes}enhancement{close_quotes} effect of normally incident Ar{sup +} ions has been quantified over a wide range of ion energy through the use of Kaufman and electron cyclotron resonance-type ion sources.more » The increase in per ion etching yield of fluorine saturated silicon and silicon dioxide surfaces with increasing ion energy (E{sub ion}) was found to scale as (E{sub ion}{sup 1/2}-E{sub th}{sup 1/2}), where E{sub th} is the etching threshold energy for the process. Simple near-surface site occupation models have been proposed for the quantification of the ion-enhanced etching kinetics in these systems. Acceptable agreement has been found in comparison of these Ar{sup +}/F etching model predictions with similar Ar{sup +}/XeF{sub 2} studies reported in the literature, as well as with etching rate measurements made in F-based plasmas of gases such as SF{sub 6} and NF{sub 3}. 69 refs., 12 figs., 6 tabs.« less

  4. Ion beam figuring of CVD silicon carbide mirrors

    NASA Astrophysics Data System (ADS)

    Gailly, P.; Collette, J.-P.; Fleury Frenette, K.; Jamar, C.

    2017-11-01

    Optical and structural elements made of silicon carbide are increasingly found in space instruments. Chemical vapor deposited silicon carbide (CVD-SiC) is used as a reflective coating on SiC optics in reason of its good behavior under polishing. The advantage of applying ion beam figuring (IBF) to CVD-SiC over other surface figure-improving techniques is discussed herein. The results of an IBF sequence performed at the Centre Spatial de Liège on a 100 mm CVD-SiC mirror are reported. The process allowed to reduce the mirror surface errors from 243 nm to 13 nm rms . Beside the surface figure, roughness is another critical feature to consider in order to preserve the optical quality of CVD-SiC . Thus, experiments focusing on the evolution of roughness were performed in various ion beam etching conditions. The roughness of samples etched at different depths down to 3 ≠m was determined with an optical profilometer. These measurements emphasize the importance of selecting the right combination of gas and beam energy to keep roughness at a low level. Kaufman-type ion sources are generally used to perform IBF but the performance of an end-Hall ion source in figuring CVD-SiC mirrors was also evaluated in this study. In order to do so, ion beam etching profiles obtained with the end-Hall source on CVD-SiC were measured and used as a basis for IBF simulations.

  5. Porous Silicon Nanowires

    PubMed Central

    Qu, Yongquan; Zhou, Hailong; Duan, Xiangfeng

    2011-01-01

    In this minreview, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures — single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion battery, gas sensor and drug delivery. PMID:21869999

  6. Method to control artifacts of microstructural fabrication

    DOEpatents

    Shul, Randy J.; Willison, Christi G.; Schubert, W. Kent; Manginell, Ronald P.; Mitchell, Mary-Anne; Galambos, Paul C.

    2006-09-12

    New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Compensation for etching-related structural artifacts can be accomplished by proper use of such an etching delay layer.

  7. Environmentally benign semiconductor processing for dielectric etch

    NASA Astrophysics Data System (ADS)

    Liao, Marci Yi-Ting

    Semiconductor processing requires intensive usage of chemicals, electricity, and water. Such intensive resource usage leaves a large impact on the environment. For instance, in Silicon Valley, the semiconductor industry is responsible for 80% of the hazardous waste sites contaminated enough to require government assistance. Research on environmentally benign semiconductor processing is needed to reduce the environmental impact of the semiconductor industry. The focus of this dissertation is on the environmental impact of one aspect of semiconductor processing: patterning of dielectric materials. Plasma etching of silicon dioxide emits perfluorocarbons (PFCs) gases, like C2F6 and CF4, into the atmosphere. These gases are super global warming/greenhouse gases because of their extremely long atmospheric lifetimes and excellent infrared absorption properties. We developed the first inductively coupled plasma (ICP) abatement device for destroying PFCs downstream of a plasma etcher. Destruction efficiencies of 99% and 94% can be obtained for the above mentioned PFCs, by using O 2 as an additive gas. Our results have lead to extensive modeling in academia as well as commercialization of the ICP abatement system. Dielectric patterning of hi-k materials for future device technology brings different environment challenges. The uncertainty of the hi-k material selection and the patterning method need to be addressed. We have evaluated the environmental impact of three different dielectric patterning methods (plasma etch, wet etch and chemical-mechanical polishing), as well as, the transistor device performances associated with the patterning methods. Plasma etching was found to be the most environmentally benign patterning method, which also gives the best device performance. However, the environmental concern for plasma etching is the possibility of cross-contamination from low volatility etch by-products. Therefore, mass transfer in a plasma etcher for a promising hi-k dielectric material, ZrO2, was studied. A novel cross-contamination sampling technique was developed, along with a mass transfer model.

  8. Effect of etching parameters on antireflection properties of Si subwavelength grating structures for solar cell applications

    NASA Astrophysics Data System (ADS)

    Leem, J. W.; Song, Y. M.; Lee, Y. T.; Yu, J. S.

    2010-09-01

    Silicon (Si) subwavelength grating (SWG) structures were fabricated on Si substrates by holographic lithography and subsequent inductively coupled plasma (ICP) etching process using SiCl4 with or without Ar addition for solar cell applications. To ensure a good nanosized pattern transfer into the underlying Si layer, the etch selectivity of Si over the photoresist mask is optimized by varying the etching parameters, thus improving antireflection characteristics. For antireflection analysis of Si SWG surfaces, the optical reflectivity is measured experimentally and it is also calculated theoretically by a rigorous coupled-wave analysis. The reflectance depends on the height, period, and shape of two-dimensional periodic Si subwavelength structures, correlated with ICP etching parameters. The optimized Si SWG structure exhibits a dramatic decrease in optical reflection of the Si surface over a wide angle of incident light ( θ i ), i.e. less than 5% at wavelengths of 300-1100 nm, leading to good wide-angle antireflection characteristics (i.e. solar-weighted reflection of 1.7-4.9% at θ i <50°) of Si solar cells.

  9. Fabrication of wear-resistant silicon microprobe tips for high-speed surface roughness scanning devices

    NASA Astrophysics Data System (ADS)

    Wasisto, Hutomo Suryo; Yu, Feng; Doering, Lutz; Völlmeke, Stefan; Brand, Uwe; Bakin, Andrey; Waag, Andreas; Peiner, Erwin

    2015-05-01

    Silicon microprobe tips are fabricated and integrated with piezoresistive cantilever sensors for high-speed surface roughness scanning systems. The fabrication steps of the high-aspect-ratio silicon microprobe tips were started with photolithography and wet etching of potassium hydroxide (KOH) resulting in crystal-dependent micropyramids. Subsequently, thin conformal wear-resistant layer coating of aluminum oxide (Al2O3) was demonstrated on the backside of the piezoresistive cantilever free end using atomic layer deposition (ALD) method in a binary reaction sequence with a low thermal process and precursors of trimethyl aluminum and water. The deposited Al2O3 layer had a thickness of 14 nm. The captured atomic force microscopy (AFM) image exhibits a root mean square deviation of 0.65 nm confirming the deposited Al2O3 surface quality. Furthermore, vacuum-evaporated 30-nm/200-nm-thick Au/Cr layers were patterned by lift-off and served as an etch mask for Al2O3 wet etching and in ICP cryogenic dry etching. By using SF6/O2 plasma during inductively coupled plasma (ICP) cryogenic dry etching, micropillar tips were obtained. From the preliminary friction and wear data, the developed silicon cantilever sensor has been successfully used in 100 fast measurements of 5- mm-long standard artifact surface with a speed of 15 mm/s and forces of 60-100 μN. Moreover, the results yielded by the fabricated silicon cantilever sensor are in very good agreement with those of calibrated profilometer. These tactile sensors are targeted for use in high-aspect-ratio microform metrology.

  10. Electrolytic etch for preventing electrical shorts in solar cells on polymer surfaces

    DOEpatents

    Weber, Michael F.

    1991-10-08

    A method for preventing shorts and shunts in solar cells having in order, an insulating substrate, a conductive metal layer on the substrate, an amorphous silicon layer and a transparent conductive layer. The method includes anodic etching of exposed portions of the metal layer after deposition of the amorphous silicon and prior to depositing the transparent conductive layer.

  11. Defect structure of web silicon ribbon

    NASA Technical Reports Server (NTRS)

    Cunningham, B.; Strunk, H.; Ast, D.

    1980-01-01

    The results of a preliminary study of two dendritic web samples are presented. The structure and electrical activity of the defects in the silicon webs were studied. Optical microscopy of chemically etched specimens was used to determine dislocation densities. Samples were mechanically polished, then Secco etched for approximately 5 minutes. High voltage transmission electron microscopy was used to characterize the crystallographic nature of the defects.

  12. Effect of electroless etching parameters on the growth and reflection properties of silicon nanowires.

    PubMed

    Ozdemir, Baris; Kulakci, Mustafa; Turan, Rasit; Unalan, Husnu Emrah

    2011-04-15

    Vertically aligned silicon nanowire (Si NW) arrays have been fabricated over large areas using an electroless etching (EE) method, which involves etching of silicon wafers in a silver nitrate and hydrofluoric acid based solution. A detailed parametric study determining the relationship between nanowire morphology and time, temperature, solution concentration and starting wafer characteristics (doping type, resistivity, crystallographic orientation) is presented. The as-fabricated Si NW arrays were analyzed by field emission scanning electron microscope (FE-SEM) and a linear dependency of nanowire length to both temperature and time was obtained and the change in the growth rate of Si NWs at increased etching durations was shown. Furthermore, the effects of EE parameters on the optical reflectivity of the Si NWs were investigated in this study. Reflectivity measurements show that the 42.8% reflectivity of the starting silicon wafer drops to 1.3%, recorded for 10 µm long Si NW arrays. The remarkable decrease in optical reflectivity indicates that Si NWs have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection.

  13. Effect of electroless etching parameters on the growth and reflection properties of silicon nanowires

    NASA Astrophysics Data System (ADS)

    Ozdemir, Baris; Kulakci, Mustafa; Turan, Rasit; Emrah Unalan, Husnu

    2011-04-01

    Vertically aligned silicon nanowire (Si NW) arrays have been fabricated over large areas using an electroless etching (EE) method, which involves etching of silicon wafers in a silver nitrate and hydrofluoric acid based solution. A detailed parametric study determining the relationship between nanowire morphology and time, temperature, solution concentration and starting wafer characteristics (doping type, resistivity, crystallographic orientation) is presented. The as-fabricated Si NW arrays were analyzed by field emission scanning electron microscope (FE-SEM) and a linear dependency of nanowire length to both temperature and time was obtained and the change in the growth rate of Si NWs at increased etching durations was shown. Furthermore, the effects of EE parameters on the optical reflectivity of the Si NWs were investigated in this study. Reflectivity measurements show that the 42.8% reflectivity of the starting silicon wafer drops to 1.3%, recorded for 10 µm long Si NW arrays. The remarkable decrease in optical reflectivity indicates that Si NWs have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection.

  14. The effect of storage conditions, contamination modes and cleaning procedures on the resin bond strength to lithium disilicate ceramic.

    PubMed

    Klosa, Karsten; Wolfart, Stefan; Lehmann, Frank; Wenz, Hans-Jürgen; Kern, Matthias

    2009-04-01

    The purpose of this in-vitro study was to evaluate the resin bond strength to pre-etched lithium disilicate ceramic using different cleaning methods after two contamination modes (saliva or saliva and silicone). Plexiglas tubes filled with composite resin (MultiCore Flow) were bonded to etched and silanized ceramic disks made of lithium disilicate ceramic (IPS e.max Press) using a luting resin (Multilink Automix). Either etched or unetched ceramic surfaces were contaminated with saliva or with saliva followed by a disclosing silicone. Groups of 16 specimens each were bonded after pretreatment using 4 surface cleaning agents (37% phosphoric acid, 5% hydrofluoric acid, 96% isopropanol, air polishing device with sodium bicarbonate) in different combinations. Before measuring tensile bond strength, specimens were stored for 3 or 150 days with thermocycling. After 150 days of storage, etching of saliva-contaminated surfaces with 5% hydrofluoric acid and/or 37% phosphoric acid provided statistically significantly higher bond strengths (37.9 to 49.5 MPa) than the other cleaning methods (1.7 to 15.5 MPa). After saliva and silicone contamination, etching with 5% hydrofluoric acid provided statistically significantly higher bond strengths (44.5 to 50.3 MPa) than all other cleaning methods (0.3 to 13.5 MPa). Ceramic cleaning methods after try-in procedures have a significant influence on the resin bond strength and are dependent on the type of contamination. Re-etching lithium disilicate ceramic with 5% hydrofluoric acid is most effective in removing contamination with saliva and/or a silicone disclosing medium.

  15. Fabrication and characterization of microsieve electrode array (µSEA) enabling cell positioning on 3D electrodes

    NASA Astrophysics Data System (ADS)

    Schurink, B.; Tiggelaar, R. M.; Gardeniers, J. G. E.; Luttge, R.

    2017-01-01

    Here the fabrication and characterization of a novel microelectrode array for electrophysiology applications is described, termed a micro sieve electrode array (µSEA). This silicon based µSEA device allows for hydrodynamic parallel positioning of single cells on 3D electrodes realized on the walls of inverted pyramidal shaped pores. To realize the µSEA, a previously realized silicon sieving structure is provided with a patterned boron doped poly-silicon, connecting the contact electrodes with the 3D sensing electrodes in the pores. A LPCVD silicon-rich silicon nitride layer was used as insulation. The selective opening of this insulation layer at the ends of the wiring lines allows to generate well-defined contact and sensing electrodes according to the layout used in commercial microelectrode array readers. The main challenge lays in the simultaneously selective etching of material at both the planar surface (contact electrode) as well as in the sieving structure containing the (3D) pores (sensing electrodes). For the generation of 3D electrodes in the pores a self-aligning technique was developed using the pore geometry to our advantage. This technique, based on sacrificial layer etching, allows for the fine tuning of the sensing electrode surface area and thus supports the positioning and coupling of single cells on the electrode surface in relation to the cell size. Furthermore, a self-aligning silicide is formed on the sensing electrodes to favour the electrical properties. Experiments were performed to demonstrate the working principle of the µSEA using different types of neuronal cells. Capture efficiency in the pores was  >70% with a 70% survival rate of the cell maintained for up to 14 DIV. The TiSi2-boron-doped-poly-silicon sensing electrodes of the µSEA were characterized, which indicated noise levels of  <15 µV and impedance values of 360 kΩ. These findings potentially allow for future electrophysiological measurements using the µSEA.

  16. Recycling of silicon: from industrial waste to biocompatible nanoparticles for nanomedicine

    NASA Astrophysics Data System (ADS)

    Kozlov, N. K.; Natashina, U. A.; Tamarov, K. P.; Gongalsky, M. B.; Solovyev, V. V.; Kudryavtsev, A. A.; Sivakov, V.; Osminkina, L. A.

    2017-09-01

    The formation of photoluminescent porous silicon (PSi) nanoparticles (NPs) is usually based on an expensive semiconductor grade wafers technology. Here, we report a low-cost method of PSi NPs synthesis from the industrial silicon waste remained after the wafer production. The proposed method is based on metal-assisted wet-chemical etching (MACE) of the silicon surface of cm-sized metallurgical grade silicon stones which leads to a nanostructuring of the surface due to an anisotropic etching, with subsequent ultrasound fracturing in water. The obtained PSi NPs exhibit bright red room temperature photoluminescence (PL) and demonstrate similar microstructure and physical characteristics in comparison with the nanoparticles synthesized from semiconductor grade Si wafers. PSi NPs prepared from metallurgical grade silicon stones, similar to silicon NPs synthesized from high purity silicon wafer, show low toxicity to biological objects that open the possibility of using such type of NPs in nanomedicine.

  17. Directed dewetting of amorphous silicon film by a donut-shaped laser pulse.

    PubMed

    Yoo, Jae-Hyuck; In, Jung Bin; Zheng, Cheng; Sakellari, Ioanna; Raman, Rajesh N; Matthews, Manyalibo J; Elhadj, Selim; Grigoropoulos, Costas P

    2015-04-24

    Irradiation of a thin film with a beam-shaped laser is proposed to achieve site-selectively controlled dewetting of the film into nanoscale structures. As a proof of concept, the laser-directed dewetting of an amorphous silicon thin film on a glass substrate is demonstrated using a donut-shaped laser beam. Upon irradiation of a single laser pulse, the silicon film melts and dewets on the substrate surface. The irradiation with the donut beam induces an unconventional lateral temperature profile in the film, leading to thermocapillary-induced transport of the molten silicon to the center of the beam spot. Upon solidification, the ultrathin amorphous silicon film is transformed to a crystalline silicon nanodome of increased height. This morphological change enables further dimensional reduction of the nanodome as well as removal of the surrounding film material by isotropic silicon etching. These results suggest that laser-based dewetting of thin films can be an effective way for scalable manufacturing of patterned nanostructures.

  18. Oligosaccharide/silicon-containing block copolymers with 5 nm features for lithographic applications.

    PubMed

    Cushen, Julia D; Otsuka, Issei; Bates, Christopher M; Halila, Sami; Fort, Sébastien; Rochas, Cyrille; Easley, Jeffrey A; Rausch, Erica L; Thio, Anthony; Borsali, Redouane; Willson, C Grant; Ellison, Christopher J

    2012-04-24

    Block copolymers demonstrate potential for use in next-generation lithography due to their ability to self-assemble into well-ordered periodic arrays on the 3-100 nm length scale. The successful lithographic application of block copolymers relies on three critical conditions being met: high Flory-Huggins interaction parameters (χ), which enable formation of <10 nm features, etch selectivity between blocks for facile pattern transfer, and thin film self-assembly control. The present paper describes the synthesis and self-assembly of block copolymers composed of naturally derived oligosaccharides coupled to a silicon-containing polystyrene derivative synthesized by activators regenerated by electron transfer atom transfer radical polymerization. The block copolymers have a large χ and a low degree of polymerization (N) enabling formation of 5 nm feature diameters, incorporate silicon in one block for oxygen reactive ion etch contrast, and exhibit bulk and thin film self-assembly of hexagonally packed cylinders facilitated by a combination of spin coating and solvent annealing techniques. As observed by small angle X-ray scattering and atomic force microscopy, these materials exhibit some of the smallest block copolymer features in the bulk and in thin films reported to date.

  19. Crystal structure of laser-induced subsurface modifications in Si

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Verburg, P. C.; Smillie, L. A.; Römer, G. R. B. E.

    2015-06-04

    Laser-induced subsurface modification of dielectric materials is a well-known technology. Applications include the production of optical components and selective etching. In addition to dielectric materials, the subsurface modification technology can be applied to silicon, by employing near to mid-infrared radiation. An application of subsurface modifications in silicon is laser-induced subsurface separation, which is a method to separate wafers into individual dies. Other applications for which proofs of concept exist are the formation of waveguides and resistivity tuning. However, limited knowledge is available about the crystal structure of subsurface modifications in silicon. In this paper, we investigate the geometry and crystalmore » structure of laser-induced subsurface modifications in monocrystalline silicon wafers. Finally, in addition to the generation of lattice defects, we found that transformations to amorphous silicon and Si-iii/Si-xii occur as a result of the laser irradiation.« less

  20. Micro-PIXE and micro-RBS characterization of micropores in porous silicon prepared using microwave-assisted hydrofluoric acid etching.

    PubMed

    Ahmad, Muthanna; Grime, Geoffrey W

    2013-04-01

    Porous silicon (PS) has been prepared using a microwave-assisted hydrofluoric acid (HF) etching method from a silicon wafer pre-implanted with 5 MeV Cu ions. The use of microbeam proton-induced X-ray emission (micro-PIXE) and microbeam Rutherford backscattering techniques reveals for the first time the capability of these techniques for studying the formation of micropores. The porous structures observed from micro-PIXE imaging results are compared to scanning electron microscope images. It was observed that the implanted copper accumulates in the same location as the pores and that at high implanted dose the pores form large-scale patterns of lines and concentric circles. This is the first work demonstrating the use of microwave-assisted HF etching in the formation of PS.

  1. Three-dimensional collimation of in-plane-propagating light using silicon micromachined mirror

    NASA Astrophysics Data System (ADS)

    Sabry, Yasser M.; Khalil, Diaa; Saadany, Bassam; Bourouina, Tarik

    2014-03-01

    We demonstrate light collimation of single-mode optical fibers using deeply-etched three-dimensional curved micromirror on silicon chip. The three-dimensional curvature of the mirror is controlled by a process combining deep reactive ion etching and isotropic etching of silicon. The produced surface is astigmatic with out-of-plane radius of curvature that is about one half the in-plane radius of curvature. Having a 300-μm in-plane radius and incident beam inplane inclined with an angle of 45 degrees with respect to the principal axis, the reflected beam is maintained stigmatic with about 4.25 times reduction in the beam expansion angle in free space and about 12-dB reduction in propagation losses, when received by a limited-aperture detector.

  2. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111)sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 {mu}m wide (111) sidewalls was fabricated using a 220 {mu}m thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time,x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  3. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers.

    PubMed

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang, Zhen; Takano, Takayuki; Maeda, Ryutaro

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111) sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 microm wide (111) sidewalls was fabricated using a 220 microm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time, x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  4. Mechanism of the growth of amorphous and microcrystalline silicon from silicon tetrafluoride and hydrogen

    NASA Astrophysics Data System (ADS)

    Okada, Y.; Chen, J.; Campbell, I. H.; Fauchet, P. M.; Wagner, S.

    1990-02-01

    We study the growth of amorphous (a-Si:H,F) and of microcrystalline (μc-Si) silicon over trench patterns in crystalline silicon substrates. We vary the conditions of the SiF4-H2 glow discharge from deposition to etching. All deposited films form lips at the trench mouth and are uniformly thick on the trench walls. Therefore, surface diffusion is not important. The results of a Monte Carlo simulation suggest that film growth is governed by a single growth species with a low (˜0.2) sticking coefficient, in combination with a highly reactive etching species.

  5. Interference lithographically defined and catalytically etched, large-area silicon nanocones from nanowires.

    PubMed

    Dawood, M K; Liew, T H; Lianto, P; Hong, M H; Tripathy, S; Thong, J T L; Choi, W K

    2010-05-21

    We report a simple and cost effective method for the synthesis of large-area, precisely located silicon nanocones from nanowires. The nanowires were obtained from our interference lithography and catalytic etching (IL-CE) method. We found that porous silicon was formed near the Au catalyst during the fabrication of the nanowires. The porous silicon exhibited enhanced oxidation ability when exposed to atmospheric conditions or in wet oxidation ambient. Very well located nanocones with uniform sharpness resulted when these oxidized nanowires were etched in 10% HF. Nanocones of different heights were obtained by varying the doping concentration of the silicon wafers. We believe this is a novel method of producing large-area, low cost, well defined nanocones from nanowires both in terms of the control of location and shape of the nanocones. A wide range of potential applications of the nanocone array can be found as a master copy for nanoimprinted polymer substrates for possible biomedical research; as a candidate for making sharp probes for scanning probe nanolithography; or as a building block for field emitting tips or photodetectors in electronic/optoelectronic applications.

  6. Determination of etching parameters for pulsed XeF2 etching of silicon using chamber pressure data

    NASA Astrophysics Data System (ADS)

    Sarkar, Dipta; Baboly, M. G.; Elahi, M. M.; Abbas, K.; Butner, J.; Piñon, D.; Ward, T. L.; Hieber, Tyler; Schuberth, Austin; Leseman, Z. C.

    2018-04-01

    A technique is presented for determination of the depletion of the etchant, etched depth, and instantaneous etch rate for Si etching with XeF2 in a pulsed etching system in real time. The only experimental data required is the pressure data collected temporally. Coupling the pressure data with the knowledge of the chemical reactions allows for the determination of the etching parameters of interest. Using this technique, it is revealed that pulsed etching processes are nonlinear, with the initial etch rate being the highest and monotonically decreasing as the etchant is depleted. With the pulsed etching system introduced in this paper, the highest instantaneous etch rate of silicon was recorded to be 19.5 µm min-1 for an initial pressure of 1.2 Torr for XeF2. Additionally, the same data is used to determine the rate constant for the reaction of XeF2 with Si; the reaction is determined to be second order in nature. The effect of varying the exposed surface area of Si as well as the effect that pressure has on the instantaneous etch rate as a function of time is shown applying the same technique. As a proof of concept, an AlN resonator is released using XeF2 pulses to remove a sacrificial poly-Si layer.

  7. Surface etching technologies for monocrystalline silicon wafer solar cells

    NASA Astrophysics Data System (ADS)

    Tang, Muzhi

    With more than 200 GW of accumulated installations in 2015, photovoltaics (PV) has become an important green energy harvesting method. The PV market is dominated by solar cells made from crystalline silicon wafers. The engineering of the wafer surfaces is critical to the solar cell cost reduction and performance enhancement. Therefore, this thesis focuses on the development of surface etching technologies for monocrystalline silicon wafer solar cells. It aims to develop a more efficient alkaline texturing method and more effective surface cleaning processes. Firstly, a rapid, isopropanol alcohol free texturing method is successfully demonstrated to shorten the process time and reduce the consumption of chemicals. This method utilizes the special chemical properties of triethylamine, which can form Si-N bonds with wafer surface atoms. Secondly, a room-temperature anisotropic emitter etch-back process is developed to improve the n+ emitter passivation. Using this method, 19.0% efficient screen-printed aluminium back surface field solar cells are developed that show an efficiency gain of 0.15% (absolute) compared with conventionally made solar cells. Finally, state-of-the-art silicon surface passivation results are achieved using hydrogen plasma etching as a dry alternative to the classical hydrofluoric acid wet-chemical process. The effective native oxide removal and the hydrogenation of the silicon surface are shown to be the reasons for the excellent level of surface passivation achieved with this novel method.

  8. Progress in performance enhancement methods for capacitive silicon resonators

    NASA Astrophysics Data System (ADS)

    Van Toan, Nguyen; Ono, Takahito

    2017-11-01

    In this paper, we review the progress in recent studies on the performance enhancement methods for capacitive silicon resonators. We provide information on various fabrication technologies and design considerations that can be employed to improve the performance of capacitive silicon resonators, including low motional resistance, small insertion loss, and high quality factor (Q). This paper contains an overview of device structures and working principles, fabrication technologies consisting of hermetic packaging, deep reactive-ion etching and neutral beam etching, and design considerations including mechanically coupled, movable electrode structures and piezoresistive heat engines.

  9. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  10. The development of a method of producing etch resistant wax patterns on solar cells

    NASA Technical Reports Server (NTRS)

    Pastirik, E.

    1980-01-01

    A potentially attractive technique for wax masking of solar cells prior to etching processes was studied. This technique made use of a reuseable wax composition which was applied to the solar cell in patterned form by means of a letterpress printing method. After standard wet etching was performed, wax removal by means of hot water was investigated. Application of the letterpress wax printing process to silicon was met with a number of difficulties. The most serious shortcoming of the process was its inability to produce consistently well-defined printed patterns on the hard silicon cell surface.

  11. In-situ photoluminescence imaging for passivation-layer etching process control for photovoltaics

    NASA Astrophysics Data System (ADS)

    Lee, J. Z.; Michaelson, L.; Munoz, K.; Tyson, T.; Gallegos, A.; Sullivan, J. T.; Buonassisi, T.

    2014-07-01

    Light-induced plating (LIP) of solar-cell metal contacts is a scalable alternative to silver paste. However, LIP requires an additional patterning step to create openings in the silicon nitride (SiNx) antireflection coating (ARC) layer prior to metallization. One approach to pattern the SiNx is masking and wet chemical etching. In-situ real-time photoluminescence imaging (PLI) is demonstrated as a process-monitoring method to determine when SiNx has been fully removed during etching. We demonstrate that the change in PLI signal intensity during etching is caused by a combination of (1) decreasing light absorption from the reduction in SiNx ARC layer thickness and (2) decreasing surface lifetime as the SiNx/Si interface transitions to an etch-solution/Si. Using in-situ PLI to guide the etching process, we demonstrate a full-area plated single-crystalline silicon device. In-situ PLI has the potential to be integrated into a commercial processing line to improve process control and reliability.

  12. Etching Rate of Silicon Dioxide Using Chlorine Trifluoride Gas

    NASA Astrophysics Data System (ADS)

    Miura, Yutaka; Kasahara, Yu; Habuka, Hitoshi; Takechi, Naoto; Fukae, Katsuya

    2009-02-01

    The etching rate behavior of silicon dioxide (SiO2, fused silica) using chlorine trifluoride (ClF3) gas is studied at substrate temperatures between 573 and 1273 K at atmospheric pressure in a horizontal cold-wall reactor. The etching rate increases with the ClF3 gas concentration, and the overall reaction is recognized to be of the first order. The change of the etching rate with increasing substrate temperature is nonlinear, and the etching rate tends to approach a constant value at temperatures exceeding 1173 K. The overall rate constant is estimated by numerical calculation, taking into account the transport phenomena in the reactor, including the chemical reaction at the substrate surface. The activation energy obtained in this study is 45.8 kJ mol-1, and the rate constant is consistent with the measured etching rate behavior. A reactor system in which there is minimum etching of the fused silica chamber by ClF3 gas can be achieved using an IR lamp heating unit and a chamber cooling unit to maintain a sufficiently low temperature of the chamber wall.

  13. Bond efficacy and interface morphology of self-etching adhesives to ground enamel.

    PubMed

    Abdalla, Ali I; El Zohairy, Ahmed A; Abdel Mohsen, Mohamed M; Feilzer, Albert J

    2010-02-01

    This study compared the microshear bond strengths to ground enamel of three one-step self-etching adhesive systems, a self-etching primer system and an etch-and-rinse adhesive system. Three self-etching adhesives, Futurabond DC (Voco), Clearfil S Tri Bond (Kuraray) and Hybrid bond (Sun-Medical), a self-etching primer, Clearfil SE Bond (Kuraray), and an etch-and-rinse system, Admira Bond (Voco), were selected. Thirty human molars were used. The root of each tooth was removed and the crown was sectioned into halves. The convex enamel surfaces were reduced by polishing on silicone paper to prepare a flat surface. The bonding systems were applied on this surface. Prior to adhesive curing, a hollow cylinder (2.0 mm height/0.75 mm internal diameter) was placed on the treated surfaces. A resin composite was then inserted into the tube and cured. After water storage for 24 h, the tube was removed and shear bond strength was determined in a universal testing machine at a crosshead speed of 0.5 mm/min. The results were analyzed with ANOVA and the Tukey.-Kramer test at a 59 degrees confidence level. The enamel of five additional teeth was ground, and the etching component of each adhesive was applied and removed with absolute ethanol instead of being light cured. These teeth and selected fractured surfaces were examined by SEM. Adhesion to ground enamel of the Futurabond DC (25 +/- 3.5 MPa) and Clearfil SE Bond (23 +/- 2.9 MPa) self-etching systems was not significantly different from the etch-and-rinse system Admira Bond (27 +/- 2.3 MPa). The two self-etching adhesives Clearfil S Tri bond and Hybrid Bond demonstrated significantly lower bond strengths (14 +/- 1.4 MPa; 11 +/- 1.9 MPa) with no significant differences between them (p < 0.05). Bond strengths to ground enamel of self-etching adhesive systems are dependent on the type of adhesive system. Some of the new adhesive systems showed bond strength values comparable to that of etch-and-rinse systems. There was no correlation between bond strength and morphological changes in enamel.

  14. Wet-chemical dissolution of TRISO-coated simulated high-temperature-reactor fuel particles

    NASA Astrophysics Data System (ADS)

    Skolo, K. P.; Jacobs, P.; Venter, J. H.; Klopper, W.; Crouse, P. L.

    2012-01-01

    Chemical etching with different mixtures of acidic solutions has been investigated to disintegrate the two outermost coatings from tri-structural isotropic coated particles containing zirconia kernels, which are used in simulated particles instead of uranium dioxide. A scanning electron microscope (SEM) was used to study the morphology of the particles after the first etching step as well as at different stages of the second etching step. SEM examination shows that the outer carbon layer can be readily removed with a CrO 3-HNO 3/H 2SO 4 solution. This finding was verified by energy dispersive spectroscopy (EDS) analysis. Etching of the silicon carbide layer in a hydrofluoric-nitric solution yielded partial removal of the coating and localized attack of the underlying coating layers. The SEM results provide evidence that the etching of the silicon carbide layer is strongly influenced by its microstructure.

  15. Porous siliconformation and etching process for use in silicon micromachining

    DOEpatents

    Guilinger, Terry R.; Kelly, Michael J.; Martin, Jr., Samuel B.; Stevenson, Joel O.; Tsao, Sylvia S.

    1991-01-01

    A reproducible process for uniformly etching silicon from a series of micromechanical structures used in electrical devices and the like includes providing a micromechanical structure having a silicon layer with defined areas for removal thereon and an electrochemical cell containing an aqueous hydrofluoric acid electrolyte. The micromechanical structure is submerged in the electrochemical cell and the defined areas of the silicon layer thereon are anodically biased by passing a current through the electrochemical cell for a time period sufficient to cause the defined areas of the silicon layer to become porous. The formation of the depth of the porous silicon is regulated by controlling the amount of current passing through the electrochemical cell. The micromechanical structure is then removed from the electrochemical cell and submerged in a hydroxide solution to remove the porous silicon. The process is subsequently repeated for each of the series of micromechanical structures to achieve a reproducibility better than 0.3%.

  16. Micromachined cutting blade formed from {211}-oriented silicon

    DOEpatents

    Fleming, James G.; Sniegowski, Jeffry J.; Montague, Stephen

    2003-09-09

    A cutting blade is disclosed fabricated of micromachined silicon. The cutting blade utilizes a monocrystalline silicon substrate having a {211} crystalline orientation to form one or more cutting edges that are defined by the intersection of {211} crystalline planes of silicon with {111} crystalline planes of silicon. This results in a cutting blade which has a shallow cutting-edge angle .theta. of 19.5.degree.. The micromachined cutting blade can be formed using an anisotropic wet etching process which substantially terminates etching upon reaching the {111} crystalline planes of silicon. This allows multiple blades to be batch fabricated on a common substrate and separated for packaging and use. The micromachined cutting blade, which can be mounted to a handle in tension and optionally coated for increased wear resistance and biocompatibility, has multiple applications including eye surgery (LASIK procedure).

  17. Micromachined cutting blade formed from {211}-oriented silicon

    DOEpatents

    Fleming, James G [Albuquerque, NM; Fleming, legal representative, Carol; Sniegowski, Jeffry J [Tijeras, NM; Montague, Stephen [Albuquerque, NM

    2011-08-09

    A cutting blade is disclosed fabricated of micromachined silicon. The cutting blade utilizes a monocrystalline silicon substrate having a {211} crystalline orientation to form one or more cutting edges that are defined by the intersection of {211} crystalline planes of silicon with {111} crystalline planes of silicon. This results in a cutting blade which has a shallow cutting-edge angle .theta. of 19.5.degree.. The micromachined cutting blade can be formed using an anisotropic wet etching process which substantially terminates etching upon reaching the {111} crystalline planes of silicon. This allows multiple blades to be batch fabricated on a common substrate and separated for packaging and use. The micromachined cutting blade, which can be mounted to a handle in tension and optionally coated for increased wear resistance and biocompatibility, has multiple applications including eye surgery (LASIK procedure).

  18. Nanowires from dirty multi-crystalline Si for hydrogen generation

    NASA Astrophysics Data System (ADS)

    Li, Xiaopeng; Schweizer, Stefan L.; Sprafke, Alexander; Wehrspohn, Ralf B.

    2013-09-01

    Silicon nanowires are considered as a promising architecture for solar energy conversion systems. By metal assisted chemical etching of multi-crystalline upgraded metallurgical silicon (UMG-Si), large areas of silicon nanowires (SiNWs) with high quality can be produced on the mother substrates. These areas show a low reflectance comparable to black silicon. More interestingly, we find that various metal impurities inside UMG-Si are removed due to the etching through element analysis. A prototype cell was built to test the photoelectrochemical (PEC) properties of UMG-SiNWs for water splitting. The on-set potential for hydrogen evolution was much reduced, and the photocurrent density showed an increment of 35% in comparison with a `dirty' UMG-Si wafer.

  19. The MEMS process of a micro friction sensor

    NASA Astrophysics Data System (ADS)

    Yuan, Ming-Quan; Lei, Qiang; Wang, Xiong

    2018-02-01

    The research and testing techniques of friction sensor is an important support for hypersonic aircraft. Compared with the conventional skin friction sensor, the MEMS skin friction sensor has the advantages of small size, high sensitivity, good stability and dynamic response. The MEMS skin friction sensor can be integrated with other flow field sensors whose process is compatible with MEMS skin friction sensor to achieve multi-physical measurement of the flow field; and the micro-friction balance sensor array enable to achieve large area and accurate measurement for the near-wall flow. A MEMS skin friction sensor structure is proposed, which sensing element not directly contacted with the flow field. The MEMS fabrication process of the sensing element is described in detail. The thermal silicon oxide is used as the mask to solve the selection ratio problem of silicon DRIE. The optimized process parameters of silicon DRIE: etching power 1600W/LF power 100 W; SF6 flux 360 sccm; C4F8 flux 300 sccm; O2 flux 300 sccm. With Cr/Au mask, etch depth of glass shallow groove can be controlled in 30°C low concentration HF solution; the spray etch and wafer rotate improve the corrosion surface quality of glass shallow groove. The MEMS skin friction sensor samples were fabricated by the above MEMS process, and results show that the error of the length and width of the elastic cantilever is within 2 μm, the depth error of the shallow groove is less than 0.03 μm, and the static capacitance error is within 0.2 pF, which satisfy the design requirements.

  20. Photoluminescence Enhancement of Silole-Capped Silicon Quantum Dots Based on Förster Resonance Energy Transfer.

    PubMed

    Kim, Seongwoong; Kim, Sungsoo; Ko, Young Chun; Sohn, Honglae

    2015-07-01

    Photoluminescent porous silicon were prepared by an electrochemical etch of n-type silicon under the illumination with a 300 W tungsten filament bulb for the duration of etch. The red photoluminescence emitting at 650 nm with an excitation wavelength of 450 nm is due to the quantum confinement of silicon quantum dots in porous silicon. HO-terminated red luminescent PS was obtained by an electrochemical treatment of fresh PS with the current of 150 mA for 60 seconds in water and sodium chloride. As-prepared PS was sonicated, fractured, and centrifuged in toluene solution to obtain photoluminescence silicon quantum dots. Dichlorotetraphenylsilole exhibiting an emission band at 520 nm was reacted with HO-terminated silicon quantum dots to give a silole-capped silicon quantum dots. The optical characterization of silole-derivatized silicon quantum dots was investigated by UV-vis and fluorescence spectrometer. The fluorescence emission efficiency of silole-capped silicon quantum dots was increased by about 2.5 times due to F6rster resonance energy transfer from silole moiety to silicon quantum dots.

  1. Nanoporous Silicon Carbide for Nanoelectromechanical Systems Applications

    NASA Technical Reports Server (NTRS)

    Hossain, T.; Khan, F.; Adesida, I.; Bohn, P.; Rittenhouse, T.; Lienhard, Michael (Technical Monitor)

    2003-01-01

    A major goal of this project is to produce porous silicon carbide (PSiC) via an electroless process for eventual utilization in nanoscale sensing platforms. Results in the literature have shown a variety of porous morphologies in SiC produced in anodic cells. Therefore, predictability and reproducibility of porous structures are initial concerns. This work has concentrated on producing morphologies of known porosity, with particular attention paid toward producing the extremely high surface areas required for a porous flow sensor. We have conducted a parametric study of electroless etching conditions and characteristics of the resulting physical nanostructure and also investigated the relationship between morphology and materials properties. Further, we have investigated bulk etching of SiC using both photo-electrochemical etching and inductively-coupled-plasma reactive ion etching techniques.

  2. Texturization of diamond-wire-sawn multicrystalline silicon wafer using Cu, Ag, or Ag/Cu as a metal catalyst

    NASA Astrophysics Data System (ADS)

    Wang, Shing-Dar; Chen, Ting-Wei

    2018-06-01

    In this work, Cu, Ag, or Ag/Cu was used as a metal catalyst to study the surface texturization of diamond-wire-sawn (DWS) multi-crystalline silicon (mc-Si) wafer by a metal-assisted chemical etching (MACE) method. The DWS wafer was first etched by standard HF-HNO3 acidic etching, and it was labeled as AE-DWS wafer. The effects of ratios of Cu(NO3)2:HF, AgNO3:HF, and AgNO3:Cu(NO3)2 on the morphology of AE-DWS wafer were investigated. After the process of MACE, the wafer was treated with a NaF/H2O2 solution. In this process, H2O2 etched the nanostructure, and NaF removed the oxidation layer. The Si {1 1 1} plane was revealed by etching the wafer in a mixture of 0.03 M Cu(NO3)2 and 1 M HF at 55 °C for 2.5 min. These parallel Si {1 1 1} planes replaced some parallel saw marks on the surface of AE-DWS wafers without forming a positive pyramid or an inverted pyramid structure. The main topography of the wafer is comprised of silicon nanowires grown in <1 0 0> direction when Ag or Ag/Cu was used as a metal catalyst. When silicon is etched in a mixed solution of Cu(NO3)2, AgNO3, HF and H2O2 at 55 °C with a concentration ratio of [Cu2+]/[Ag+] of 50 or at 65 °C with a concentration ratio of [Cu2+]/[Ag+] of 33, a quasi-inverted pyramid structure can be obtained. The reflectivity of the AE-DWS wafers treated with MACE is lower than that of the multiwire-slurry-sawn (MWSS) mc-Si wafers treated with traditional HF + HNO3 etching.

  3. Dry etch method for texturing silicon and device

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Gershon, Talia S.; Haight, Richard A.; Kim, Jeehwan

    2017-07-25

    A method for texturing silicon includes loading a silicon wafer into a vacuum chamber, heating the silicon wafer and thermal cracking a gas to generate cracked sulfur species. The silicon wafer is exposed to the cracked sulfur species for a time duration in accordance with a texture characteristic needed for a surface of the silicon wafer.

  4. Novel ultra-lightweight and high-resolution MEMS x-ray optics

    NASA Astrophysics Data System (ADS)

    Mitsuishi, Ikuyuki; Ezoe, Yuichiro; Takagi, Utako; Mita, Makoto; Riveros, Raul; Yamaguchi, Hitomi; Kato, Fumiki; Sugiyama, Susumu; Fujiwara, Kouzou; Morishita, Kohei; Nakajima, Kazuo; Fujihira, Shinya; Kanamori, Yoshiaki; Yamasaki, Noriko Y.; Mitsuda, Kazuhisa; Maeda, Ryutaro

    2009-05-01

    We have been developing ultra light-weight X-ray optics using MEMS (Micro Electro Mechanical Systems) technologies.We utilized crystal planes after anisotropic wet etching of silicon (110) wafers as X-ray mirrors and succeeded in X-ray reflection and imaging. Since we can etch tiny pores in thin wafers, this type of optics can be the lightest X-ray telescope. However, because the crystal planes are alinged in certain directions, we must approximate ideal optical surfaces with flat planes, which limits angular resolution of the optics on the order of arcmin. In order to overcome this issue, we propose novel X-ray optics based on a combination of five recently developed MEMS technologies, namely silicon dry etching, X-ray LIGA, silicon hydrogen anneal, magnetic fluid assisted polishing and hot plastic deformation of silicon. In this paper, we describe this new method and report on our development of X-ray mirrors fabricated by these technologies and X-ray reflection experiments of two types of MEMS X-ray mirrors made of silicon and nickel. For the first time, X-ray reflections on these mirrors were detected in the angular response measurements. Compared to model calculations, surface roughness of the silicon and nickel mirrors were estimated to be 5 nm and 3 nm, respectively.

  5. Fluorinion transfer in silver-assisted chemical etching for silicon nanowires arrays

    NASA Astrophysics Data System (ADS)

    Feng, Tianyu; Xu, Youlong; Zhang, Zhengwei; Mao, Shengchun

    2015-08-01

    Uniform silicon nanowires arrays (SiNWAs) were fabricated on unpolished rough silicon wafers through KOH pretreatment followed by silver-assisted chemical etching (SACE). Density functional theory (DFT) calculations were used to investigate the function of silver (Ag) at atomic scale in the etching process. Among three adsorption sites of Ag atom on Si(1 0 0) surface, Ag(T4) above the fourth-layer surface Si atoms could transfer fluorinion (F-) to adjacent Si successfully due to its stronger electrostatic attraction force between Ag(T4) and F-, smaller azimuth angle of Fsbnd Ag(T4)sbnd Si, shorter bond length of Fsbnd Si compared with Fsbnd Ag. As F- was transferred to adjacent Si by Ag(T4) one by one, the Si got away from the wafer in the form of SiF4 when it bonded with enough F- while Ag(T4) was still attached onto the Si wafer ready for next transfer. Cyclic voltammetry tests confirmed that Ag can improve the etching rate by transferring F- to Si.

  6. Development of microchannel plate x-ray optics

    NASA Technical Reports Server (NTRS)

    Kaaret, Philip

    1995-01-01

    The goal of this research program was to develop a novel technique for focusing x-rays based on the optical system of a lobster's eye. A lobster eye employs many closely packed reflecting surfaces arranged within a spherical or cylindrical shell. These optics have two unique properties: they have unlimited fields of view and can be manufactured via replication of identical structures. Because the angular resolution is given by the ratio of the size of the individual optical elements to the focal length, optical elements with size on the order of one hundred microns are required to achieve good angular resolution with a compact telescope. We employed anisotropic etching of single crystal silicon wafers for the fabrication of micron-scale optical elements. This technique, commonly referred to as silicon micromachining, is based on silicon fabrication techniques developed by the microelectronics industry. We have succeeded in producing silicon lenses with a geometry suitable for a 1-d focusing x-ray optics. These lenses have an aspect ratio (40:1) suitable for x-ray reflection and have very good optical surface alignment. We have developed a number of process refinements which improved the quality of the lens geometry and the repeatability of the etch process. In addition to the silicon fabrication, an x-ray beam line was constructed at Columbia for testing the optics. Most recently, we have done several experiments to find the fundamental limits that the anisotropic etch process placed on the etched surface roughness.

  7. Thermal oxidation and nitridation of Si nanowalls prepared by metal assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Behera, Anil K.; Viswanath, R. N.; Lakshmanan, C.; Polaki, S. R.; Sarguna, R. M.; Mathews, Tom

    2018-04-01

    Silicon nanowalls with controlled orientation have been prepared using metal assisted chemical etching process. Thermal oxidation and nitridation processes have been carried out on the prepared silicon nanowalls under a control flow of oxygen/nitrogen gases independently at 1050°C for 900s. The morphology and structural properties of the as-prepared, oxidized and nitridated silicon nanowalls have been studied using the scanning electron microscopy and the Grazing incident X-ray diffraction techniques. The results obtained from the analysis of X-ray diffraction patterns and the microscopy images are discussed.

  8. PCR thermocycler

    DOEpatents

    Benett, William J.; Richards, James B.

    2003-01-01

    A sleeve-type silicon polymerase chain reaction (PCR) chamber or thermocycler having improved thermal performance. The silicon sleeve reaction chamber is improved in thermal performance by etched features therein that reduce thermal mass and increase the surface area of the sleeve for cooling. This improved thermal performance of the thermocycler enables an increase in speed and efficiency of the reaction chamber. The improvement is accomplished by providing grooves in the faces of the sleeve and a series of grooves on the interior surfaces that connect with grooves on the faces of the sleeve. The grooves can be anisotropically etched in the silicon sleeve simultaneously with formation of the chamber.

  9. PCR thermocycler

    DOEpatents

    Benett, William J.; Richards, James B.

    2005-05-17

    A sleeve-type silicon polymerase chain reaction (PCR) chamber or thermocycler having improved thermal performance. The silicon sleeve reaction chamber is improved in thermal performance by etched features therein that reduce thermal mass and increase the surface area of the sleeve for cooling. This improved thermal performance of the thermocycler enables an increase in speed and efficiency of the reaction chamber. The improvement is accomplished by providing grooves in the faces of the sleeve and a series of grooves on the interior surfaces that connect with grooves on the faces of the sleeve. The grooves can be anisotropically etched in the silicon sleeve simultaneously with formation of the chamber.

  10. Elasto-Capillary Folding Using Stop-Programmable Hinges Fabricated by 3D Micro-Machining

    PubMed Central

    Legrain, Antoine; Berenschot, Erwin J. W.; Tas, Niels R.; Abelmann, Leon

    2015-01-01

    We show elasto-capillary folding of silicon nitride objects with accurate folding angles between flaps of (70.6 ± 0.1)° and demonstrate the feasibility of such accurate micro-assembly with a final folding angle of 90°. The folding angle is defined by stop-programmable hinges that are fabricated starting from silicon molds employing accurate three-dimensional corner lithography. This nano-patterning method exploits the conformal deposition and the subsequent timed isotropic etching of a thin film in a 3D shaped silicon template. The technique leaves a residue of the thin film in sharp concave corners which can be used as an inversion mask in subsequent steps. Hinges designed to stop the folding at 70.6° were fabricated batchwise by machining the V-grooves obtained by KOH etching in (110) silicon wafers; 90° stop-programmable hinges were obtained starting from silicon molds obtained by dry etching on (100) wafers. The presented technique has potential to achieve any folding angle and opens a new route towards creating structures with increased complexity, which will ultimately lead to a novel method for device fabrication. PMID:25992886

  11. The automated array assembly task of the low-cost silicon solar array project, phase 2

    NASA Technical Reports Server (NTRS)

    Coleman, M. G.; Pryor, R. A.; Sparks, T. G.; Legge, R.; Saltzman, D. L.

    1980-01-01

    Several specific processing steps as part of a total process sequence for manufacturing silicon solar cells were studied. Ion implantation was identified as the preferred process step for impurity doping. Unanalyzed beam ion implantation was shown to have major cost advantages over analyzed beam implantation. Further, high quality cells were fabricated using a high current unanalyzed beam. Mechanically masked plasma patterning of silicon nitride was shown to be capable of forming fine lines on silicon surfaces with spacings between mask and substrate as great as 250 micrometers. Extensive work was performed on advances in plated metallization. The need for the thick electroless palladium layer was eliminated. Further, copper was successfully utilized as a conductor layer utilizing nickel as a barrier to copper diffusion into the silicon. Plasma etching of silicon for texturing and saw damage removal was shown technically feasible but not cost effective compared to wet chemical etching techniques.

  12. Investigation on the structural characterization of pulsed p-type porous silicon

    NASA Astrophysics Data System (ADS)

    Wahab, N. H. Abd; Rahim, A. F. Abd; Mahmood, A.; Yusof, Y.

    2017-08-01

    P-type Porous silicon (PS) was sucessfully formed by using an electrochemical pulse etching (PC) and conventional direct current (DC) etching techniques. The PS was etched in the Hydrofluoric (HF) based solution at a current density of J = 10 mA/cm2 for 30 minutes from a crystalline silicon wafer with (100) orientation. For the PC process, the current was supplied through a pulse generator with 14 ms cycle time (T) with 10 ms on time (Ton) and pause time (Toff) of 4 ms respectively. FESEM, EDX, AFM, and XRD have been used to characterize the morphological properties of the PS. FESEM images showed that pulse PS (PPC) sample produces more uniform circular structures with estimated average pore sizes of 42.14 nm compared to DC porous (PDC) sample with estimated average size of 16.37nm respectively. The EDX spectrum for both samples showed higher Si content with minimal presence of oxide.

  13. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Zheng, Xinyu (Inventor)

    2002-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  14. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

    2005-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  15. Tip-Enhanced Raman Imaging and Nano Spectroscopy of Etched Silicon Nanowires

    PubMed Central

    Kazemi-Zanjani, Nastaran; Kergrene, Erwan; Liu, Lijia; Sham, Tsun-Kong; Lagugné-Labarthet, François

    2013-01-01

    Tip-enhanced Raman spectroscopy (TERS) is used to investigate the influence of strains in isolated and overlapping silicon nanowires prepared by chemical etching of a (100) silicon wafer. An atomic force microscopy tip made of nanocrystalline diamond coated with a thin layer of silver is used in conjunction with an excitation wavelength of 532 nm in order to probe the first order optical phonon mode of the [100] silicon nanowires. The frequency shift and the broadening of the silicon first order phonon are analyzed and compared to the topographical measurements for distinct configuration of nanowires that are disposed in straight, bent or overlapping configuration over a microscope coverslip. The TERS spatial resolution is close to the topography provided by the nanocrystalline diamond tip and subtle spectral changes are observed for different nanowire configurations. PMID:24072021

  16. Quantitative analysis of defects in silicon: Silicon sheet growth development for the large area silicon sheet task of the low cost solar array project

    NASA Technical Reports Server (NTRS)

    Natesh, R.; Smith, J. M.; Qidwai, H. A.

    1978-01-01

    The various steps involved in the chemical polishing and etching of silicon samples are described and the data on twins, grain boundaries and dislocation pits from fifty-three (53) samples are discussed.

  17. Automated and inexpensive method to manufacture solid- state nanopores and micropores in robust silicon wafers

    NASA Astrophysics Data System (ADS)

    Vega, M.; Granell, P.; Lasorsa, C.; Lerner, B.; Perez, M.

    2016-02-01

    In this work an easy, reproducible and inexpensive technique for the production of solid state nanopores and micropores using silicon wafer substrate is proposed. The technique is based on control of pore formation, by neutralization etchant (KOH) with a strong acid (HCl). Thus, a local neutralization is produced around the nanopore, which stops the silicon etching. The etching process was performed with 7M KOH at 80°C, where 1.23µm/min etching speed was obtained, similar to those published in literature. The control of the pore formation with the braking acid method was done using 12M HCl and different extreme conditions: i) at 25°C, ii) at 80°C and iii) at 80°C applying an electric potential. In these studies, it was found that nanopores and micropores can be obtained automatically and at a low cost. Additionally, the process was optimized to obtain clean silicon wafers after the pore fabrication process. This method opens the possibility for an efficient scale-up from laboratory production.

  18. Design of a broadband reciprocal optical diode in multimode silicon waveguide by partial depth etching

    NASA Astrophysics Data System (ADS)

    Zhu, Danfeng; Zhang, Jinqiannan; Ye, Han; Yu, Zhongyuan; Liu, Yumin

    2018-07-01

    We propose a design of reciprocal optical diode based on asymmetric spatial mode conversion in multimode silicon waveguide on the silicon-on-insulator platform. The design possesses large bandwidth, high contrast ratio and high fabrication tolerance. The forward even-to-odd mode conversion and backward blockade of even mode are achieved by partial depth etching in the functional region. Simulated by three-dimension finite-difference time-domain method, the forward transmission efficiency is about -2.05 dB while the backward transmission efficiency is only -22.68 dB, reaching a highest contrast ratio of 0.983 at the wavelength of 1550 nm. The operational bandwidth is up to 200 nm (from 1450 nm to 1650 nm) with contrast ratio higher than 0.911. The numerical analysis also demonstrates that the proposed optical diode possesses high tolerance for geometry parameter errors which may be introduced in fabrication. The design based on partial depth etching is compatible with CMOS process and is expected to contribute to the silicon-based all-optical circuits.

  19. Nanoscale Etching and Indentation of Silicon Surfaces with Carbon Nanotubes

    NASA Technical Reports Server (NTRS)

    Dzegilenko, Fedor N.; Srivastava, Deepak; Saini, Subhash

    1998-01-01

    The possibility of nanolithography of silicon and germanium surfaces with bare carbon nanotube tips of scanning probe microscopy devices is considered with large scale classical molecular dynamics (MD) simulations employing Tersoff's reactive many-body potential for heteroatomic C/Si/Ge system. Lithography plays a key role in semiconductor manufacturing, and it is expected that future molecular and quantum electronic devices will be fabricated with nanolithographic and nanodeposition techniques. Carbon nanotubes, rolled up sheets of graphene made of carbon, are excellent candidates for use in nanolithography because they are extremely strong along axial direction and yet extremely elastic along radial direction. In the simulations, the interaction of a carbon nanotube tip with silicon surfaces is explored in two regimes. In the first scenario, the nanotubes barely touch the surface, while in the second they are pushed into the surface to make "nano holes". The first - gentle scenario mimics the nanotube-surface chemical reaction induced by the vertical mechanical manipulation of the nanotube. The second -digging - scenario intends to study the indentation profiles. The following results are reported in the two cases. In the first regime, depending on the surface impact site, two major outcomes outcomes are the selective removal of either a single surface atom or a surface dimer off the silicon surface. In the second regime, the indentation of a silicon substrate by the nanotube is observed. Upon the nanotube withdrawal, several surface silicon atoms are adsorbed at the tip of the nanotube causing significant rearrangements of atoms comprising the surface layer of the silicon substrate. The results are explained in terms of relative strength of C-C, C-Si, and Si-Si bonds. The proposed method is very robust and does not require applied voltage between the nanotube tips and the surface. The implications of the reported controllable etching and hole-creating for nanolithography on silicon are discussed in detail.

  20. Method of fabricating germanium and gallium arsenide devices

    NASA Technical Reports Server (NTRS)

    Jhabvala, Murzban (Inventor)

    1990-01-01

    A method of semiconductor diode fabrication is disclosed which relies on the epitaxial growth of a precisely doped thickness layer of gallium arsenide or germanium on a semi-insulating or intrinsic substrate, respectively, of gallium arsenide or germanium by either molecular beam epitaxy (MBE) or by metal-organic chemical vapor deposition (MOCVD). The method involves: depositing a layer of doped or undoped silicon dioxide on a germanium or gallium arsenide wafer or substrate, selectively removing the silicon dioxide layer to define one or more surface regions for a device to be fabricated thereon, growing a matched epitaxial layer of doped germanium or gallium arsenide of an appropriate thickness using MBE or MOCVD techniques on both the silicon dioxide layer and the defined one or more regions; and etching the silicon dioxide and the epitaxial material on top of the silicon dioxide to leave a matched epitaxial layer of germanium or gallium arsenide on the germanium or gallium arsenide substrate, respectively, and upon which a field effect device can thereafter be formed.

  1. Plant-Mimetic Heat Pipes for Operation with Large Inertial and Gravitation Stresses

    DTIC Science & Technology

    2012-08-16

    tensiometer based on the integration of the membrane with a MEMS-based pressure sen heat transfer, biomimicry , microfluidics, plant science U U U U...stable at each tension. Inset shows an optical micrograph of 25 cavities; dark cavities are filled and bright cavities are empty (cavitated). (C... Optical micrograph of a silicon membrane that has been anodically etched from the top to form nano- porous silicon and wet etched from the bottom to

  2. Process for manufacture of semipermeable silicon nitride membranes

    DOEpatents

    Galambos, Paul Charles; Shul, Randy J.; Willison, Christi Gober

    2003-12-09

    A new class of semipermeable membranes, and techniques for their fabrication, have been developed. These membranes, formed by appropriate etching of a deposited silicon nitride layer, are robust, easily manufacturable, and compatible with a wide range of silicon micromachining techniques.

  3. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Saxena, Shailendra K., E-mail: phd1211512@iiti.ac.in; Sahu, Gayatri; Sagdeo, Pankaj R.

    Quantum confinement effect has been studied in cheese like silicon nano-structures (Ch-SiNS) fabricated by metal induced chemical etching using different etching times. Scanning electron microscopy is used for the morphological study of these Ch-SiNS. A visible photoluminescence (PL) emission is observed from the samples under UV excitation at room temperature due to quantum confinement effect. The average size of Silicon Nanostructures (SiNS) present in the samples has been estimated by bond polarizability model using Raman Spectroscopy from the red-shift observed from SiNSs as compared to its bulk counterpart. The sizes of SiNS present in the samples decreases as etching timemore » increase from 45 to 75 mintunes.« less

  4. Same-Side Platinum Electrodes for Metal Assisted Etching of Porous Silicon

    DTIC Science & Technology

    2015-11-01

    hydrogen peroxide (H2O2), and ethanol etch solution. The H2O2 reacts with hydrogen ions from the HF at the catalytic metal surface to become water...order to measure the combustion rates of the PSi, bridge wires were photolithographically deposited onto the wafers, prior to PSi etching, using a...

  5. Dielectrophoretic trapping of DNA-coated gold nanoparticles on silicon based vertical nanogap devices.

    PubMed

    Strobel, Sebastian; Sperling, Ralph A; Fenk, Bernhard; Parak, Wolfgang J; Tornow, Marc

    2011-06-07

    We report on the successful dielectrophoretic trapping and electrical characterization of DNA-coated gold nanoparticles on vertical nanogap devices (VNDs). The nanogap devices with an electrode distance of 13 nm were fabricated from Silicon-on-Insulator (SOI) material using a combination of anisotropic reactive ion etching (RIE), selective wet chemical etching and metal thin-film deposition. Au nanoparticles (diameter 40 nm) coated with a monolayer of dithiolated 8 base pairs double stranded DNA were dielectrophoretically trapped into the nanogap from electrolyte buffer solution at MHz frequencies as verified by scanning and transmission electron microscopy (SEM/TEM) analysis. First electrical transport measurements through the formed DNA-Au-DNA junctions partially revealed an approximately linear current-voltage characteristic with resistance in the range of 2-4 GΩ when measured in solution. Our findings point to the importance of strong covalent bonding to the electrodes in order to observe DNA conductance, both in solution and in the dry state. We propose our setup for novel applications in biosensing, addressing the direct interaction of biomolecular species with DNA in aqueous electrolyte media.

  6. Silicon sheet growth development for the large area silicon sheet task of the low cost solar array project. Quantitative analysis of defects in silicon

    NASA Technical Reports Server (NTRS)

    Natesh, R.

    1978-01-01

    The various steps involved in obtaining quantitative information of structural defects in crystalline silicon samples are described. Procedures discussed include: (1) chemical polishing; (2) chemical etching; and (3) automated image analysis of samples on the QTM 720 System.

  7. Loss reduction in silicon nanophotonic waveguide micro-bends through etch profile improvement

    NASA Astrophysics Data System (ADS)

    Selvaraja, Shankar Kumar; Bogaerts, Wim; Van Thourhout, Dries

    2011-04-01

    Single mode silicon photonic wire waveguides allow low-loss sharp micro-bends, which enables compact photonic devices and circuits. The circuit compactness is achieved at the cost of loss induced by micro-bends, which can seriously affect the device performance. The bend loss strongly depends on the bend radius, polarization, waveguide dimension and profile. In this paper, we present the effect of waveguide profile on the bend loss. We present waveguide profile improvement with optimized etch chemistry and the role of etch chemistry in adapting the etch profile of silicon is investigated. We experimentally demonstrate that by making the waveguide sidewalls vertical, the bend loss can be reduced up to 25% without affecting the propagation loss of the photonic wires. The bend loss of a 2 μm bend has been reduced from 0.039dB/90° bend to 0.028dB/90° bend by changing the sidewall angle from 81° to 90°, respectively. The propagation loss of 2.7 ± 0.1dB/cm and 3 ± 0.09dB/cm was observed for sloped and vertical photonic wires respectively was obtained.

  8. Investigation of direct current electrical properties of electrochemically etched mesoporous silicon carbide

    NASA Astrophysics Data System (ADS)

    Gautier, G.; Biscarrat, J.; Defforge, T.; Fèvre, A.; Valente, D.; Gary, A.; Menard, S.

    2014-12-01

    In this study, we show I-V characterizations of various metal/porous silicon carbide (pSiC)/silicon carbide (SiC) structures. SiC wafers were electrochemically etched from the Si and C faces in the dark or under UV lighting leading to different pSiC morphologies. In the case of low porosity pSiC etched in the dark, the I-V characteristics were found to be almost linear and the extracted resistivities of pSiC were around 1.5 × 104 Ω cm at 30 °C for the Si face. This is around 6 orders of magnitude higher than the resistivity of doped SiC wafers. In the range of 20-200 °C, the activation energy was around 50 meV. pSiC obtained from the C face was less porous and the measured average resistivity was 10 Ω cm. In the case high porosity pSiC etched under UV illumination, the resistivity was found to be much higher, around 1014 Ω cm at room temperature. In this case, the extracted activation energy was estimated to be 290 meV.

  9. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yin Yunpeng; Sawin, Herbert H.

    The surface roughness evolutions of single crystal silicon, thermal silicon dioxide (SiO{sub 2}), and low dielectric constant film coral in argon plasma have been measured by atomic force microscopy as a function of ion bombardment energy, ion impingement angle, and etching time in an inductively coupled plasma beam chamber, in which the plasma chemistry, ion energy, ion flux, and ion incident angle can be adjusted independently. The sputtering yield (or etching rate) scales linearly with the square root of ion energy at normal impingement angle; additionally, the angular dependence of the etching yield of all films in argon plasma followedmore » the typical sputtering yield curve, with a maximum around 60 deg. -70 deg. off-normal angle. All films stayed smooth after etching at normal angle but typically became rougher at grazing angles. In particular, at grazing angles the rms roughness level of all films increased if more material was removed; additionally, the striation structure formed at grazing angles can be either parallel or transverse to the beam impingement direction, which depends on the off-normal angle. More interestingly, the sputtering caused roughness evolution at different off-normal angles can be qualitatively explained by the corresponding angular dependent etching yield curve. In addition, the roughening at grazing angles is a strong function of the type of surface; specifically, coral suffers greater roughening compared to thermal silicon dioxide.« less

  10. Quantitative Analysis of Defects in Silicon. Silicon Sheet Growth Development for the Large Area Silicon Sheet Task of the Low-cost Solar Array Project

    NASA Technical Reports Server (NTRS)

    Natesh, R.; Smith, J. M.; Qidwai, H. A.

    1979-01-01

    The various steps involved in the chemical polishing and etching of silicon samples are described. Data on twins, dislocation pits, and grain boundaries from thirty-one (31) silicon sample are also discussed. A brief review of the changes made to upgrade the image analysis system is included.

  11. Anisotropic multi-spot DBR porous silicon chip for the detection of human immunoglobin G.

    PubMed

    Cho, Bomin; Um, Sungyong; Sohn, Honglae

    2014-07-01

    Asymmetric porous silicon multilayer (APSM)-based optical biosensor was developed to specify human Immunoglobin G (Ig G). APSM chip was generated by an electrochemical etching of silicon wafer using an asymmetric electrode configuration in aqueous ethanolic HF solution and constituted with nine arrayed porous silicon multilayer. APSM prepared from anisotropic etching conditions displayed a sharp reflection resonance in the reflectivity spectrum. Each spot displayed single reflection resonance at different wavelengths as a function of the lateral distance from the Pt counter electrode. The sensor system was consisted of the 3 x 3 spot array of APSM modified with protein A. The system was probed with an aqueous human Ig G. Molecular binding and specificity was monitored as a shift in wavelength of reflection resonance.

  12. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Rajkumar, K.; Rajavel, K.; Cameron, D. C.

    This paper reports the electrowetting properties of liquid droplet on superhydrophobic silicon nanowires with Atomic layer deposited (ALD) Al{sub 2}O{sub 3} as dielectric layer. Silicon wafer were etched by metal assisted wet chemical etching with silver as catalyst. ALD Al{sub 2}O{sub 3} films of 10nm thickness were conformally deposited over silicon nanowires. Al{sub 2}O{sub 3} dielectric film coated silicon nanowires was chemically modified with Trichloro (1H, 1H, 2H, 2H-perfluorooctyl) silane to make it superhydrophobic(SHP). The contact angle was measured and all the samples exhibited superhydrophobic nature with maximum contact angles of 163° and a minimum contact angle hysteresis of 6°.more » Electrowetting induced a maximum reversible decrease of the contact angle of 20°at 150V in air.« less

  13. Process for Fabrication of Superconducting Vias for Electrical Connection to Groundplane in Cryogenic Detectors

    NASA Technical Reports Server (NTRS)

    Denis, Kevin L. (Inventor)

    2018-01-01

    Disclosed are systems, methods, and non-transitory computer-readable storage media for fabrication of silicon on insulator (SOI) wafers with a superconductive via for electrical connection to a groundplane. Fabrication of the SOI wafer with a superconductive via can involve depositing a superconducting groundplane onto a substrate with the superconducting groundplane having an oxidizing layer and a non-oxidizing layer. A layer of monocrystalline silicon can be bonded to the superconducting groundplane and a photoresist layer can be applied to the layer of monocrystalline silicon and the SOI wafer can be etched with the oxygen rich etching plasma, resulting in a monocrystalline silicon top layer with a via that exposes the superconducting groundplane. Then, the fabrication can involve depositing a superconducting surface layer to cover the via.

  14. Interactions of chlorine plasmas with silicon chloride-coated reactor walls during and after silicon etching

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Khare, Rohit; Srivastava, Ashutosh; Donnelly, Vincent M.

    2012-09-15

    The interplay between chlorine inductively coupled plasmas (ICP) and reactor walls coated with silicon etching products has been studied in situ by Auger electron spectroscopy and line-of-sight mass spectrometry using the spinning wall method. A bare silicon wafer mounted on a radio frequency powered electrode (-108 V dc self-bias) was etched in a 13.56 MHz, 400 W ICP. Etching products, along with some oxygen due to erosion of the discharge tube, deposit a Si-oxychloride layer on the plasma reactor walls, including the rotating substrate surface. Without Si-substrate bias, the layer that was previously deposited on the walls with Si-substrate biasmore » reacts with Cl-atoms in the chlorine plasma, forming products that desorb, fragment in the plasma, stick on the spinning wall and sometimes react, and then desorb and are detected by the mass spectrometer. In addition to mass-to-charge (m/e) signals at 63, 98, 133, and 168, corresponding to SiCl{sub x} (x = 1 - 4), many Si-oxychloride fragments with m/e = 107, 177, 196, 212, 231, 247, 275, 291, 294, 307, 329, 345, 361, and 392 were also observed from what appear to be major products desorbing from the spinning wall. It is shown that the evolution of etching products is a complex 'recycling' process in which these species deposit and desorb from the walls many times, and repeatedly fragment in the plasma before being detected by the mass spectrometer. SiCl{sub 3} sticks on the walls and appears to desorb for at least milliseconds after exposure to the chlorine plasma. Notably absent are signals at m/e = 70 and 72, indicating little or no Langmuir-Hinshelwood recombination of Cl on this surface, in contrast to previous studies done in the absence of Si etching.« less

  15. Surface Coatings for Gas Detection via Porous Silicon

    NASA Astrophysics Data System (ADS)

    Ozdemir, Serdar; Li, Ji-Guang; Gole, James

    2009-03-01

    Nanopore covered microporous silicon interfaces have been formed via an electrochemical etch for gas sensor applications. Rapid reversible and sensitive gas sensors have been fabricated. The fabricated porous silicon (PS) gas sensors display the advantages of operation at room temperature as well as at a single, readily accessible temperature with an insensitivity to temperature drift; operation in a heat-sunk configuration, ease of coating with gas-selective materials; low cost of fabrication and operation, and the ability to rapidly assess false positives by operating the sensor in a pulsed mode. The PS surface has been modified with unique coatings on the basis of a general theory in order to achieve maximum sensitivity and selectivity. Sensing of NH3, NOx and PH3 at or below the ppm level have been observed. A typical PS nanostructure coated microstructured hybrid configuration when coated with tin oxide (NOx, CO) and gold nanostructures (NH3) provides a greatly increased sensitivity to the indicated gases. Al2O3 coating of the porous silicon using atomic layer deposition and its effect on PH3 sensing has been investigated. 20-100 nm TiO2 nanoparticles have been produced using sol-gel methods to coat PS surfaces and the effects on the selectivity and the sensitivity have been studied.

  16. Selective-area growth of GaN nanowires on SiO{sub 2}-masked Si (111) substrates by molecular beam epitaxy

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kruse, J. E.; Doundoulakis, G.; Institute of Electronic Structure and Laser, Foundation for Research and Technology–Hellas, N. Plastira 100, 70013 Heraklion

    2016-06-14

    We analyze a method to selectively grow straight, vertical gallium nitride nanowires by plasma-assisted molecular beam epitaxy (MBE) at sites specified by a silicon oxide mask, which is thermally grown on silicon (111) substrates and patterned by electron-beam lithography and reactive-ion etching. The investigated method requires only one single molecular beam epitaxy MBE growth process, i.e., the SiO{sub 2} mask is formed on silicon instead of on a previously grown GaN or AlN buffer layer. We present a systematic and analytical study involving various mask patterns, characterization by scanning electron microscopy, transmission electron microscopy, and photoluminescence spectroscopy, as well asmore » numerical simulations, to evaluate how the dimensions (window diameter and spacing) of the mask affect the distribution of the nanowires, their morphology, and alignment, as well as their photonic properties. Capabilities and limitations for this method of selective-area growth of nanowires have been identified. A window diameter less than 50 nm and a window spacing larger than 500 nm can provide single nanowire nucleation in nearly all mask windows. The results are consistent with a Ga diffusion length on the silicon dioxide surface in the order of approximately 1 μm.« less

  17. Programmable 2-D Addressable Cryogenic Aperture Masks

    NASA Technical Reports Server (NTRS)

    Kutyrev, A. S.; Moseley, S. H.; Jhabvala, M.; Li, M.; Schwinger, D. S.; Silverberg, R. F.; Wesenberg, R. P.

    2004-01-01

    We are developing a two-dimensional array of square microshutters (programmable aperture mask) for a multi-object spectrometer for the James Webb Space Telescope (JWST). This device will provide random access selection of the areas in the field to be studied. The device is in essence a close packed array of square slits, each of which can be opened independently to select areas of the sky for detailed study.The device is produced using a 100-micron thick silicon wafer as a substrate with 0.5-micron thick silicon nitride shutters on top of it. Silicon nitride has been selected as the blade and flexure material because its stiffness allows thinner and lighter structures than single crystal Si, the chief alternative, and because of its ease of manufacture. The 100 micron silicon wafer is backetched in a high aspect ratio Deep Reactive Ion Etching (Deep RIE) to leave only a support grid for the shutters and the address electronics. The shutter actuation is done magnetically whereas addressing is electrostatic. 128x128 format microshutter arrays have been produced. Their operation has been demostarted on 32x32 subarrays. Good reliability of the fabrication process and good quality of the microshutters has been achieved. The mechanical behavior and optical performance of the fabricated arrays at cryogenic temperature are being studied.

  18. Sensors and Micromachined Devices for the Automotive and New Markets: The Delphi Delco Electronics MEMS Story.

    NASA Astrophysics Data System (ADS)

    Logsdon, James

    2002-03-01

    This presentation will provide a brief history of the development of MEMS products and technology, beginning with the manifold absolute pressure sensor in the late seventies through the current variety of Delphi Delco Electronics sensors available today. The technology development of micromachining from uncompensated P plus etch stops to deep reactive ion etching and the technology development of wafer level packaging from electrostatic bonding to glass frit sealing and silicon to silicon direct bonding will be reviewed.

  19. Components, Assembly and Electrochemical Properties of Three-Dimensional Battery Architectures

    DTIC Science & Technology

    2016-03-01

    batteries is directed at our project on 3-D lithium - ion batteries where improvements in materials and fabrication methods are expected to facilitate...reporting period, we focused on new materials and electrode array fabrication processes for 3-D lithium - ion batteries and made substantial progress. In...to facilitate the assembly of a full 3-D lithium - ion battery system. a Pattern silicon dioxide etch I I I I I mask b DRIE etch silicon posts c I I

  20. Fabrication of patterned surface by soft lithographic technique for confinement of lipid bilayer

    NASA Astrophysics Data System (ADS)

    Moulick, Ranjita Ghosh; Mayer, Dirk

    2018-04-01

    In this paper we demonstrated that a 3D pattern can be well transferred from a silicon Master to a gold substrate using µcontact printing. In this process 1-Octadecanthiol served as an ink and printing followed by etching generated the desired pattern on the gold substrate. The prepatterned substrate was also used for lipid vesicle fusion and revealed that lipid molecules selectively bind to the gold layer.

  1. Gas-driven microturbine

    DOEpatents

    Sniegowski, Jeffrey J.; Rodgers, Murray S.; McWhorter, Paul J.; Aeschliman, Daniel P.; Miller, William M.

    2002-01-01

    A microturbine fabricated by a three-level semiconductor batch-fabrication process based on polysilicon surface-micromachining. The microturbine comprises microelectromechanical elements formed from three polysilicon multi-layer surfaces applied to a silicon substrate. Interleaving sacrificial oxide layers provides electrical and physical isolation, and selective etching of both the sacrificial layers and the polysilicon layers allows formation of individual mechanical and electrical elements as well as the required space for necessary movement of rotating turbine parts and linear elements.

  2. Micromirror arrays using KOH:H[sub 2]O micromachining of silicon for lens templates, geodesic lenses, and other applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kendall, D.L.; Eaton, W.P.; Manginell, R.

    Micromirrors having diameters from a few micrometers to several millimeters have been produced on (100) silicon by wet-chemical etching in KOH:H[sub 2]O. The f/[number sign]'s range from about 2.5 to at least 10. The microroughness of an etched mirror with diameter 550 [mu]m and 9.6-[mu]m sagitta is less than 5 nm and its surface figure is within 0.5 [mu]m of a perfect sphere. Data over a wide range of diameters are presented and a semiempirical model is developed to explain the behavior. The concordance of the normalized etched profiles for all diameter mirrors demonstrates that the etching is dominated bymore » surface reaction rather than diffusion limitation. Design and fabrication schemes are presented for making a wide range of mirror diameters and focal lengths, for both single micromirrors and arrays. The etched depressions can be used as templates for microlenses and as substrates for geodesic waveguide lenses and arrays. Chem-mechanical polishing on the etched structures reduces the edge curvature and produces oblate spheroidal surfaces, both of which should improve geodesic lens behavior. The etched structures can also be used as variable crystal orientation substrates for epitaxial nucleation and various surface analysis studies.« less

  3. Micromirror arrays using KOH:H2O micromachining of silicon for lens templates, geodesic lenses, and other applications

    NASA Astrophysics Data System (ADS)

    Kendall, Don L.; Eaton, William P.; Manginell, Ronald P.; Digges, Thomas G.

    1994-11-01

    Micromirrors having diameters from a few micrometers to several millimeters have been produced on (100) silicon by wet-chemical etching in KOH:H2O. The f/#'s range from about 2.5 to at least 10. The microroughness of an etched mirror with diameter 550 micrometers and 9.6-micrometers sagitta is less than 5 nm and its surface figure is within 0.5 micrometers of a perfect sphere. Data over a wide range of diameters are presented and a semiempirical model is developed to explain the behavior. The concordance of the normalized etched profiles for all diameter mirrors demonstrates that the etching is dominated by surface reaction rather than diffusion limitation. Design and fabrication schemes are presented for making a wide range of mirror diameters and focal lengths, for both single micromirrors and arrays. The etched depressions can be used as templates for microlenses and as substrates for geodesic waveguide lenses and arrays. Chem-mechanical polishing on the etched structures reduces the edge curvature and produces oblate spheroidal surfaces, both of which should improve geodesic lens behavior. The etched structures can also be used as variable crystal orientation substrates for epitaxial nucleation and various surface analysis studies.

  4. Size Control of Porous Silicon-Based Nanoparticles via Pore-Wall Thinning.

    PubMed

    Secret, Emilie; Leonard, Camille; Kelly, Stefan J; Uhl, Amanda; Cozzan, Clayton; Andrew, Jennifer S

    2016-02-02

    Photoluminescent silicon nanocrystals are very attractive for biomedical and electronic applications. Here a new process is presented to synthesize photoluminescent silicon nanocrystals with diameters smaller than 6 nm from a porous silicon template. These nanoparticles are formed using a pore-wall thinning approach, where the as-etched porous silicon layer is partially oxidized to silica, which is dissolved by a hydrofluoric acid solution, decreasing the pore-wall thickness. This decrease in pore-wall thickness leads to a corresponding decrease in the size of the nanocrystals that make up the pore walls, resulting in the formation of smaller nanoparticles during sonication of the porous silicon. Particle diameters were measured using dynamic light scattering, and these values were compared with the nanocrystallite size within the pore wall as determined from X-ray diffraction. Additionally, an increase in the quantum confinement effect is observed for these particles through an increase in the photoluminescence intensity of the nanoparticles compared with the as-etched nanoparticles, without the need for a further activation step by oxidation after synthesis.

  5. A tunable sub-100 nm silicon nanopore array with an AAO membrane mask: reducing unwanted surface etching by introducing a PMMA interlayer.

    PubMed

    Lim, Namsoo; Pak, Yusin; Kim, Jin Tae; Hwang, Youngkyu; Lee, Ryeri; Kumaresan, Yogeenth; Myoung, NoSoung; Ko, Heung Cho; Jung, Gun Young

    2015-08-28

    Highly ordered silicon (Si) nanopores with a tunable sub-100 nm diameter were fabricated by a CF4 plasma etching process using an anodic aluminum oxide (AAO) membrane as an etching mask. To enhance the conformal contact of the AAO membrane mask to the underlying Si substrate, poly(methyl methacrylate) (PMMA) was spin-coated on top of the Si substrate prior to the transfer of the AAO membrane. The AAO membrane mask was fabricated by two-step anodization and subsequent removal of the aluminum support and the barrier layer, which was then transferred to the PMMA-coated Si substrate. Contact printing was performed on the sample with a pressure of 50 psi and a temperature of 120 °C to make a conformal contact of the AAO membrane mask to the Si substrate. The CF4 plasma etching was conducted to transfer nanopores onto the Si substrate through the PMMA interlayer. The introduced PMMA interlayer prevented unwanted surface etching of the Si substrate by eliminating the etching ions and radicals bouncing at the gap between the mask and the substrate, resulting in a smooth Si nanopore array.

  6. Fourier Transform Infrared Absorption Spectroscopy of Gas-Phase and Surface Reaction Products during Si Etching in Inductively Coupled Cl2 Plasmas

    NASA Astrophysics Data System (ADS)

    Miyata, Hiroki; Tsuda, Hirotaka; Fukushima, Daisuke; Takao, Yoshinori; Eriguchi, Koji; Ono, Kouichi

    2011-10-01

    A better understanding of plasma-surface interactions is indispensable during etching, including the behavior of reaction or etch products, because the products on surfaces and in the plasma are important in passivation layer formation through their redeposition on surfaces. In practice, the nanometer-scale control of plasma etching would still rely largely on such passivation layer formation as well as ion-enhanced etching on feature surfaces. This paper presents in situ Fourier transform infrared (FTIR) absorption spectroscopy of gas-phase and surface reaction products during inductively coupled plasma (ICP) etching of Si in Cl2. The observation was made in the gas phase by transmission absorption spectroscopy (TAS), and also on the substrate surface by reflection absorption spectroscopy (RAS). The quantum chemical calculation was also made of the vibrational frequency of silicon chloride molecules. The deconvolution of the TAS spectrum revealed absorption features of Si2Cl6 and SiClx (x = 1-3) as well as SiCl4, while that of the RAS spectrum revealed relatively increased absorption features of unsaturated silicon chlorides. A different behavior was also observed in bias power dependence between the TAS and RAS spectra.

  7. Single-Run Single-Mask Inductively-Coupled-Plasma Reactive-Ion-Etching Process for Fabricating Suspended High-Aspect-Ratio Microstructures

    NASA Astrophysics Data System (ADS)

    Yang, Yao-Joe; Kuo, Wen-Cheng; Fan, Kuang-Chao

    2006-01-01

    In this work, we present a single-run single-mask (SRM) process for fabricating suspended high-aspect-ratio structures on standard silicon wafers using an inductively coupled plasma-reactive ion etching (ICP-RIE) etcher. This process eliminates extra fabrication steps which are required for structure release after trench etching. Released microstructures with 120 μm thickness are obtained by this process. The corresponding maximum aspect ratio of the trench is 28. The SRM process is an extended version of the standard process proposed by BOSCH GmbH (BOSCH process). The first step of the SRM process is a standard BOSCH process for trench etching, then a polymer layer is deposited on trench sidewalls as a protective layer for the subsequent structure-releasing step. The structure is released by dry isotropic etching after the polymer layer on the trench floor is removed. All the steps can be integrated into a single-run ICP process. Also, only one mask is required. Therefore, the process complexity and fabrication cost can be effectively reduced. Discussions on each SRM step and considerations for avoiding undesired etching of the silicon structures during the release process are also presented.

  8. Nanostructured silicon membranes for control of molecular transport.

    PubMed

    Srijanto, Bernadeta R; Retterer, Scott T; Fowlkes, Jason D; Doktycz, Mitchel J

    2010-11-01

    A membrane that allows selective transport of molecular species requires precise engineering on the nanoscale. Membrane permeability can be tuned by controlling the physical structure and surface chemistry of the pores. Here, a combination of electron beam and optical lithography, along with cryogenic deep reactive ion etching, has been used to fabricate silicon membranes that are physically robust, have uniform pore sizes, and are directly integrated into a microfluidic network. Additional reductions in pore size were achieved using plasma enhanced chemical vapor deposition and atomic layer deposition of silicon dioxide to coat membrane surfaces. Cross sectioning of the membranes using focused ion beam milling was used to determine the physical shape of the membrane pores before and after coating. Functional characterization of the membranes was performed by using quantitative fluorescence microscopy to document the transport of molecular species across the membrane.

  9. Toward three-dimensional microelectronic systems: directed self-assembly of silicon microcubes via DNA surface functionalization.

    PubMed

    Lämmerhardt, Nico; Merzsch, Stephan; Ledig, Johannes; Bora, Achyut; Waag, Andreas; Tornow, Marc; Mischnick, Petra

    2013-07-02

    The huge and intelligent processing power of three-dimensional (3D) biological "processors" like the human brain with clock speeds of only 0.1 kHz is an extremely fascinating property, which is based on a massively parallel interconnect strategy. Artificial silicon microprocessors are 7 orders of magnitude faster. Nevertheless, they do not show any indication of intelligent processing power, mostly due to their very limited interconnectivity. Massively parallel interconnectivity can only be realized in three dimensions. Three-dimensional artificial processors would therefore be at the root of fabricating artificially intelligent systems. A first step in this direction would be the self-assembly of silicon based building blocks into 3D structures. We report on the self-assembly of such building blocks by molecular recognition, and on the electrical characterization of the formed assemblies. First, planar silicon substrates were functionalized with self-assembling monolayers of 3-aminopropyltrimethoxysilane for coupling of oligonucleotides (single stranded DNA) with glutaric aldehyde. The oligonucleotide immobilization was confirmed and quantified by hybridization with fluorescence-labeled complementary oligonucleotides. After the individual processing steps, the samples were analyzed by contact angle measurements, ellipsometry, atomic force microscopy, and fluorescence microscopy. Patterned DNA-functionalized layers were fabricated by microcontact printing (μCP) and photolithography. Silicon microcubes of 3 μm edge length as model objects for first 3D self-assembly experiments were fabricated out of silicon-on-insulator (SOI) wafers by a combination of reactive ion etching (RIE) and selective wet etching. The microcubes were then surface-functionalized using the same protocol as on planar substrates, and their self-assembly was demonstrated both on patterned silicon surfaces (88% correctly placed cubes), and to cube aggregates by complementary DNA functionalization and hybridization. The yield of formed aggregates was found to be about 44%, with a relative fraction of dimers of some 30%. Finally, the electrical properties of the formed dimers were characterized using probe tips inside a scanning electron microscope.

  10. Circuit quantum electrodynamics architecture for gate-defined quantum dots in silicon

    NASA Astrophysics Data System (ADS)

    Mi, X.; Cady, J. V.; Zajac, D. M.; Stehlik, J.; Edge, L. F.; Petta, J. R.

    2017-01-01

    We demonstrate a hybrid device architecture where the charge states in a double quantum dot (DQD) formed in a Si/SiGe heterostructure are read out using an on-chip superconducting microwave cavity. A quality factor Q = 5400 is achieved by selectively etching away regions of the quantum well and by reducing photon losses through low-pass filtering of the gate bias lines. Homodyne measurements of the cavity transmission reveal DQD charge stability diagrams and a charge-cavity coupling rate g c / 2 π = 23 MHz. These measurements indicate that electrons trapped in a Si DQD can be effectively coupled to microwave photons, potentially enabling coherent electron-photon interactions in silicon.

  11. A plasmaless, photochemical etch process for porous organosilicate glass films

    NASA Astrophysics Data System (ADS)

    Ryan, E. Todd; Molis, Steven E.

    2017-12-01

    A plasmaless, photochemical etch process using ultraviolet (UV) light in the presence of NH3 or O2 etched porous organosilicate glass films, also called pSiCOH films, in a two-step process. First, a UV/NH3 or UV/O2 treatment removed carbon (mostly methyl groups bonded to silicon) from a pSiCOH film by demethylation to a depth determined by the treatment exposure time. Second, aqueous HF was used to selectively remove the demethylated layer of the pSiCOH film leaving the methylated layer below. UV in the presence of inert gas or H2 did not demethylate the pSiCOH film. The depth of UV/NH3 demethylation followed diffusion limited kinetics and possible mechanisms of demethylation are presented. Unlike reactive plasma processes, which contain ions that can damage surrounding structures during nanofabrication, the photochemical etch contains no damaging ions. Feasibility of the photochemical etching was shown by comparing it to a plasma-based process to remove the pSiCOH dielectric from between Cu interconnect lines, which is a critical step during air gap fabrication. The findings also expand our understanding of UV photon interactions in pSiCOH films that may contribute to plasma-induced damage to pSiCOH films.

  12. Photonic Crystal Sensors Based on Porous Silicon

    PubMed Central

    Pacholski, Claudia

    2013-01-01

    Porous silicon has been established as an excellent sensing platform for the optical detection of hazardous chemicals and biomolecular interactions such as DNA hybridization, antigen/antibody binding, and enzymatic reactions. Its porous nature provides a high surface area within a small volume, which can be easily controlled by changing the pore sizes. As the porosity and consequently the refractive index of an etched porous silicon layer depends on the electrochemial etching conditions photonic crystals composed of multilayered porous silicon films with well-resolved and narrow optical reflectivity features can easily be obtained. The prominent optical response of the photonic crystal decreases the detection limit and therefore increases the sensitivity of porous silicon sensors in comparison to sensors utilizing Fabry-Pérot based optical transduction. Development of porous silicon photonic crystal sensors which allow for the detection of analytes by the naked eye using a simple color change or the fabrication of stacked porous silicon photonic crystals showing two distinct optical features which can be utilized for the discrimination of analytes emphasize its high application potential. PMID:23571671

  13. Versatile control of metal-assisted chemical etching for vertical silicon microwire arrays and their photovoltaic applications

    PubMed Central

    Um, Han-Don; Kim, Namwoo; Lee, Kangmin; Hwang, Inchan; Hoon Seo, Ji; Yu, Young J.; Duane, Peter; Wober, Munib; Seo, Kwanyong

    2015-01-01

    A systematic study was conducted into the use of metal-assisted chemical etching (MacEtch) to fabricate vertical Si microwire arrays, with several models being studied for the efficient redox reaction of reactants with silicon through a metal catalyst by varying such parameters as the thickness and morphology of the metal film. By optimizing the MacEtch conditions, high-quality vertical Si microwires were successfully fabricated with lengths of up to 23.2 μm, which, when applied in a solar cell, achieved a conversion efficiency of up to 13.0%. These solar cells also exhibited an open-circuit voltage of 547.7 mV, a short-circuit current density of 33.2 mA/cm2, and a fill factor of 71.3% by virtue of the enhanced light absorption and effective carrier collection provided by the Si microwires. The use of MacEtch to fabricate high-quality Si microwires therefore presents a unique opportunity to develop cost-effective and highly efficient solar cells. PMID:26060095

  14. Prediction of silicon oxynitride plasma etching using a generalized regression neural network

    NASA Astrophysics Data System (ADS)

    Kim, Byungwhan; Lee, Byung Teak

    2005-08-01

    A prediction model of silicon oxynitride (SiON) etching was constructed using a neural network. Model prediction performance was improved by means of genetic algorithm. The etching was conducted in a C2F6 inductively coupled plasma. A 24 full factorial experiment was employed to systematically characterize parameter effects on SiON etching. The process parameters include radio frequency source power, bias power, pressure, and C2F6 flow rate. To test the appropriateness of the trained model, additional 16 experiments were conducted. For comparison, four types of statistical regression models were built. Compared to the best regression model, the optimized neural network model demonstrated an improvement of about 52%. The optimized model was used to infer etch mechanisms as a function of parameters. The pressure effect was noticeably large only as relatively large ion bombardment was maintained in the process chamber. Ion-bombardment-activated polymer deposition played the most significant role in interpreting the complex effect of bias power or C2F6 flow rate. Moreover, [CF2] was expected to be the predominant precursor to polymer deposition.

  15. Etching of Silicon in HBr Plasmas for High Aspect Ratio Features

    NASA Technical Reports Server (NTRS)

    Hwang, Helen H.; Meyyappan, M.; Mathad, G. S.; Ranade, R.

    2002-01-01

    Etching in semiconductor processing typically involves using halides because of the relatively fast rates. Bromine containing plasmas can generate high aspect ratio trenches, desirable for DRAM and MEMS applications, with relatively straight sidewalk We present scanning electron microscope images for silicon-etched trenches in a HBr plasma. Using a feature profile simulation, we show that the removal yield parameter, or number of neutrals removed per incident ion due to all processes (sputtering, spontaneous desorption, etc.), dictates the profile shape. We find that the profile becomes pinched off when the removal yield is a constant, with a maximum aspect ratio (AR) of about 5 to 1 (depth to height). When the removal yield decreases with increasing ion angle, the etch rate increases at the comers and the trench bottom broadens. The profiles have ARs of over 9:1 for yields that vary with ion angle. To match the experimentally observed etched time of 250 s for an AR of 9:1 with a trench width of 0.135 microns, we find that the neutral flux must be 3.336 x 10(exp 17)sq cm/s.

  16. Continuous-flow mass production of silicon nanowires via substrate-enhanced metal-catalyzed electroless etching of silicon with dissolved oxygen as an oxidant.

    PubMed

    Hu, Ya; Peng, Kui-Qing; Liu, Lin; Qiao, Zhen; Huang, Xing; Wu, Xiao-Ling; Meng, Xiang-Min; Lee, Shuit-Tong

    2014-01-13

    Silicon nanowires (SiNWs) are attracting growing interest due to their unique properties and promising applications in photovoltaic devices, thermoelectric devices, lithium-ion batteries, and biotechnology. Low-cost mass production of SiNWs is essential for SiNWs-based nanotechnology commercialization. However, economic, controlled large-scale production of SiNWs remains challenging and rarely attainable. Here, we demonstrate a facile strategy capable of low-cost, continuous-flow mass production of SiNWs on an industrial scale. The strategy relies on substrate-enhanced metal-catalyzed electroless etching (MCEE) of silicon using dissolved oxygen in aqueous hydrofluoric acid (HF) solution as an oxidant. The distinct advantages of this novel MCEE approach, such as simplicity, scalability and flexibility, make it an attractive alternative to conventional MCEE methods.

  17. Microfabricated instrument for tissue biopsy and analysis

    DOEpatents

    Krulevitch, Peter A.; Lee, Abraham P.; Northrup, M. Allen; Benett, William J.

    2001-01-01

    A microfabricated biopsy/histology instrument which has several advantages over the conventional procedures, including minimal specimen handling, smooth cutting edges with atomic sharpness capable of slicing very thin specimens (approximately 2 .mu.m or greater), micro-liter volumes of chemicals for treating the specimens, low cost, disposable, fabrication process which renders sterile parts, and ease of use. The cutter is a "cheese-grater" style design comprising a block or substrate of silicon and which uses anisotropic etching of the silicon to form extremely sharp and precise cutting edges. As a specimen is cut, it passes through the silicon cutter and lies flat on a piece of glass which is bonded to the cutter. Microchannels are etched into the glass or silicon substrates for delivering small volumes of chemicals for treating the specimen. After treatment, the specimens can be examined through the glass substrate.

  18. Solvothermal synthesis of selenium nano and microspheres deposited on silicon surface by microwave-assisted method

    NASA Astrophysics Data System (ADS)

    Ahmad, Muthanna

    2016-10-01

    This work describes a new application of the solvothermal method, based on the microwave heating, for the synthesis of nano and microparticles of selenium. The reaction of selenium with hydrofluoric acid on the silicon surface is induced by microwave irradiation under high pressure and temperature of 60 bar and 160 °C, respectively. This method allows the deposition of spherical-like particles on the in situ etched silicon surface. The size of deposited selenium spheres scales from tens of nanometers up to tens of micrometers. The morphology and composition of the deposited selenium were analyzed by various analytical techniques. The formation dynamic of spherical structure is explained on the base of reduction of selenium species by hydrogen inside gas bubbles which are generated on the silicon surface by the etching process.

  19. InGaP/InGaAs field-effect transistor typed hydrogen sensor

    NASA Astrophysics Data System (ADS)

    Tsai, Jung-Hui; Liou, Syuan-Hao; Lin, Pao-Sheng; Chen, Yu-Chi

    2018-02-01

    In this article, the Pd-based mixture comprising silicon dioxide (SiO2) is applied as sensing material for the InGaP/InGaAs field-effect transistor typed hydrogen sensor. After wet selectively etching the SiO2, the mixture is turned into Pd nanoparticles on an interlayer. Experimental results depict that hydrogen atoms trapped inside the mixture could effectively decrease the gate barrier height and increase the drain current due to the improved sensing properties when Pd nanoparticles were formed by wet etching method. The sensitivity of the gate forward current from air (the reference) to 9800 ppm hydrogen/air environment approaches the high value of 1674. Thus, the studied device shows a good potential for hydrogen sensor and integrated circuit applications.

  20. Process Development for Automated Solar Cell and Module Production. Task 4: Automated Array Assembly

    NASA Technical Reports Server (NTRS)

    1979-01-01

    A baseline sequence for the manufacture of solar cell modules was specified. Starting with silicon wafers, the process goes through damage etching, texture etching, junction formation, plasma edge etch, aluminum back surface field formation, and screen printed metallization to produce finished solar cells. The cells were then series connected on a ribbon and bonded into a finished glass tedlar module. A number of steps required additional developmental effort to verify technical and economic feasibility. These steps include texture etching, plasma edge etch, aluminum back surface field formation, array layup and interconnect, and module edge sealing and framing.

  1. Development of Ordered, Porous (Sub-25 nm Dimensions) Surface Membrane Structures Using a Block Copolymer Approach.

    PubMed

    Ghoshal, Tandra; Holmes, Justin D; Morris, Michael A

    2018-05-08

    In an effort to develop block copolymer lithography to create high aspect vertical pore arrangements in a substrate surface we have used a microphase separated poly(ethylene oxide) -b- polystyrene (PEO-b-PS) block copolymer (BCP) thin film where (and most unusually) PS not PEO is the cylinder forming phase and PEO is the majority block. Compared to previous work, we can amplify etch contrast by inclusion of hard mask material into the matrix block allowing the cylinder polymer to be removed and the exposed substrate subject to deep etching thereby generating uniform, arranged, sub-25 nm cylindrical nanopore arrays. Briefly, selective metal ion inclusion into the PEO matrix and subsequent processing (etch/modification) was applied for creating iron oxide nanohole arrays. The oxide nanoholes (22 nm diameter) were cylindrical, uniform diameter and mimics the original BCP nanopatterns. The oxide nanohole network is demonstrated as a resistant mask to fabricate ultra dense, well ordered, good sidewall profile silicon nanopore arrays on substrate surface through the pattern transfer approach. The Si nanopores have uniform diameter and smooth sidewalls throughout their depth. The depth of the porous structure can be controlled via the etch process.

  2. Surface micro-structuring of silicon by excimer-laser irradiation in reactive atmospheres

    NASA Astrophysics Data System (ADS)

    Pedraza, A. J.; Fowlkes, J. D.; Jesse, S.; Mao, C.; Lowndes, D. H.

    2000-12-01

    The formation mechanisms of cones and columns by pulsed-laser irradiation in reactive atmospheres were studied using scanning electron microscopy and profilometry. Deep etching takes place in SF6- and O2- rich atmospheres and consequently, silicon-containing molecules and clusters are released. Transport of silicon from the etched/ablated regions to the tip of columns and cones and to the side of the cones is required because both structures, columns and cones, protrude above the initial surface. The laser-induced micro-structure is influenced not only by the nature but also by the partial pressure of the reactive gas in the atmosphere. Irradiation in Ar following cone formation in SF6 produced no additional growth but rather melting and resolidification. Subsequent irradiation using again a SF6 atmosphere lead to cone restructuring and growth resumption. Thus the effects of etching plus re-deposition that produce column/cone formation and growth are clearly separated from the effects of just melting. On the other hand, irradiation continued in air after first performed in SF6 resulted in: (a) an intense etching of the cones and a tendency to transform them into columns; (b) growth of new columns on top of the existing cones and (c) filamentary nano-structures coating the sides of the columns and cones.

  3. Simple fabrication of antireflective silicon subwavelength structure with self-cleaning properties.

    PubMed

    Kim, Bo-Soon; Ju, Won-Ki; Lee, Min-Woo; Lee, Cheon; Lee, Seung-Gol; Beom-Hoan, O

    2013-05-01

    A subwavelength structure (SWS) was formed via a simple chemical wet etching using a gold (Au) catalyst. Single nano-sized Au particles were fabricated by metallic self-aggregation. The deposition and thermal annealing of the thin metallic film were carried out. Thermal annealing of a thin metallic film enables the creation of metal nano particles by isolating them from each other by means of the self-aggregation of the metal. After annealing, the samples were soaked in an aqueous etching solution of hydrofluoric acid and hydrogen peroxide. When silicon (Si) was etched for 2 minutes using the Au nano particles, the reflectance was decreased almost 0% over the entire wavelength range from 300 to 1300 nm due to its deep and steeply double tapered structure. When given varying incident angle degrees from 30 degrees to 60 degrees, the reflectance was also maintained at less than 3%. Following this, the etched silicon was treated with a plasma-polymerized fluorocarbon (PPFC) film of about 5 nm using an ICP reactor for surface modification. The result of this surface treatment, the contact angle increased significantly from 27.5 degrees to 139.3 degrees. The surface modification was successful and maintained almost 0% reflectance because of the thin film deposition.

  4. Cyclic photochemical re-growth of gold nanoparticles: Overcoming the mask-erosion limit during reactive ion etching on the nanoscale

    PubMed Central

    Seidenstücker, Axel; Plettl, Alfred; Ziemann, Paul

    2013-01-01

    Summary The basic idea of using hexagonally ordered arrays of Au nanoparticles (NP) on top of a given substrate as a mask for the subsequent anisotropic etching in order to fabricate correspondingly ordered arrays of nanopillars meets two serious obstacles: The position of the NP may change during the etching process and, thus, the primary pattern of the mask deteriorates or is completely lost. Furthermore, the NP are significantly eroded during etching and, consequently, the achievable pillar height is strongly restricted. The present work presents approaches on how to get around both problems. For this purpose, arrays of Au NPs (starting diameter 12 nm) are deposited on top of silica substrates by applying diblock copolymer micelle nanolithography (BCML). It is demonstrated that evaporated octadecyltrimethoxysilane (OTMS) layers act as stabilizer on the NP position, which allows for an increase of their size up to 50 nm by an electroless photochemical process. In this way, ordered arrays of silica nanopillars are obtained with maximum heights of 270 nm and aspect ratios of 5:1. Alternatively, the NP position can be fixed by a short etching step with negligible mask erosion followed by cycles of growing and reactive ion etching (RIE). In that case, each cycle is started by photochemically re-growing the Au NP mask and thereby completely compensating for the erosion due to the previous cycle. As a result of this mask repair method, arrays of silica nanopillar with heights up to 680 nm and aspect ratios of 10:1 are fabricated. Based on the given recipes, the approach can be applied to a variety of materials like silicon, silicon oxide, and silicon nitride. PMID:24367758

  5. Investigation of porous silicon nanopowders functionalized by antibiotic Kanamycin, fluorophore Indocyanine Green

    NASA Astrophysics Data System (ADS)

    Bespalova, K.; Somov, P. A.; Spivak, Yu M.

    2017-11-01

    Porous silicon nanopowders for target drug delivery were obtained by electrochemical anodic etching in a hydrofluoric acid solution using the monocrystalline silicon n-type conductivity. Porous silicon powders were obtained by sonification of porous silicon layers. The powders were functionalized by antibiotic Kanamycin and fluorophore Indocyanine Green by the passive adsorption method. The peculiarities of absorption spectra in 190-600 nm region were revealed for functionalized porous silicon powders dispersions in water.

  6. Electron beam induced etching of carbon nanotubes enhanced by secondary electrons in oxygen.

    PubMed

    Yoshida, Hideto; Tomita, Yuto; Soma, Kentaro; Takeda, Seiji

    2017-05-12

    Multi-walled carbon nanotubes (CNTs) are subjected to electron-beam-induced etching (EBIE) in oxygen. The EBIE process is observed in situ by environmental transmission electron microscopy. The partial pressure of oxygen (10 and 100 Pa), energy of the primary electrons (80 and 200 keV), and environment of the CNTs (suspended or supported on a silicon nitride membrane) are investigated as factors affecting the etching rate. The EBIE rate of CNTs was markedly promoted by the effects of secondary electrons that were emitted from a silicon nitride membrane under irradiation by primary electrons. Membrane supported CNTs can be cut by EBIE with a spatial accuracy better than 3 nm, and a nanogap of 2 nm can be successfully achieved between the ends of two suspended CNTs.

  7. Detection of nerve agent stimulants based on photoluminescent porous silicon interferometer

    NASA Astrophysics Data System (ADS)

    Kim, Seongwoong; Cho, Bomin; Sohn, Honglae

    2012-09-01

    Porous silicon (PSi) exhibiting dual optical properties, both Fabry-Pérot fringe and photolumincence, was developed and used as chemical sensors. PSi samples were prepared by an electrochemical etch of p-type silicon under the illumination of 300-W tungsten lamp during the etch process. The surface of PSi was characterized by cold field-emission scanning electron microscope. PSi samples exhibited a strong visible orange photoluminescence at 610 nm with an excitation wavelength of 460 nm as well as Fabry-Pérot fringe with a tungsten light source. Both reflectivity and photoluminescence were simultaneously measured under the exposure of organophosphate vapors. An increase of optical thickness and quenching photoluminescences under the exposure of various organophosphate vapors were observed.

  8. X-ray mask and method for providing same

    DOEpatents

    Morales, Alfredo M [Pleasanton, CA; Skala, Dawn M [Fremont, CA

    2004-09-28

    The present invention describes a method for fabricating an x-ray mask tool which can achieve pattern features having lateral dimension of less than 1 micron. The process uses a thin photoresist and a standard lithographic mask to transfer an trace image pattern in the surface of a silicon wafer by exposing and developing the resist. The exposed portion of the silicon substrate is then anisotropically etched to provide an etched image of the trace image pattern consisting of a series of channels in the silicon having a high depth-to-width aspect ratio. These channels are then filled by depositing a metal such as gold to provide an inverse image of the trace image and thereby providing a robust x-ray mask tool.

  9. X-ray mask and method for providing same

    DOEpatents

    Morales, Alfredo M.; Skala, Dawn M.

    2002-01-01

    The present invention describes a method for fabricating an x-ray mask tool which can achieve pattern features having lateral dimension of less than 1 micron. The process uses a thin photoresist and a standard lithographic mask to transfer an trace image pattern in the surface of a silicon wafer by exposing and developing the resist. The exposed portion of the silicon substrate is then anisotropically etched to provide an etched image of the trace image pattern consisting of a series of channels in the silicon having a high depth-to-width aspect ratio. These channels are then filled by depositing a metal such as gold to provide an inverse image of the trace image and thereby providing a robust x-ray mask tool.

  10. Photoluminescence of etched SiC nanowires

    NASA Astrophysics Data System (ADS)

    Stewart, Polite D., Jr.; Rich, Ryan; Zerda, T. W.

    2010-10-01

    SiC nanowires were produced from carbon nanotubes and nanosize silicon powder in a tube furnace at temperatures between 1100^oC and 1350^oC. SiC nanowires had average diameter of 30 nm and very narrow size distribution. The compound possesses a high melting point, high thermal conductivity, and excellent wear resistance. The surface of the SiC nanowires after formation is covered by an amorphous layer. The composition of that layer is not fully understood, but it is believed that in addition to amorphous SiC it contains various carbon and silicon compounds, and SiO2. The objective of the research was to modify the surface structure of these SiC nanowires. Modification of the surface was done using the wet etching method. The etched nanowires were then analyzed using Fourier Transform Infrared spectroscopy (FTIR), transmission electron microscopy (TEM), and photoluminescence (PL). FTIR and TEM analysis provided valid proof that the SiC nanowires were successfully etched. Also, the PL results showed that the SiC nanowire core did possess a fluorescent signal.

  11. Developing Barbed Microtip-Based Electrode Arrays for Biopotential Measurement

    PubMed Central

    Hsu, Li-Sheng; Tung, Shu-Wei; Kuo, Che-Hsi; Yang, Yao-Joe

    2014-01-01

    This study involved fabricating barbed microtip-based electrode arrays by using silicon wet etching. KOH anisotropic wet etching was employed to form a standard pyramidal microtip array and HF/HNO3 isotropic etching was used to fabricate barbs on these microtips. To improve the electrical conductance between the tip array on the front side of the wafer and the electrical contact on the back side, a through-silicon via was created during the wet etching process. The experimental results show that the forces required to detach the barbed microtip arrays from human skin, a polydimethylsiloxane (PDMS) polymer, and a polyvinylchloride (PVC) film were larger compared with those required to detach microtip arrays that lacked barbs. The impedances of the skin-electrode interface were measured and the performance levels of the proposed dry electrode were characterized. Electrode prototypes that employed the proposed tip arrays were implemented. Electroencephalogram (EEG) and electrocardiography (ECG) recordings using these electrode prototypes were also demonstrated. PMID:25014098

  12. Metal assisted photochemical etching of 4H silicon carbide

    NASA Astrophysics Data System (ADS)

    Leitgeb, Markus; Zellner, Christopher; Schneider, Michael; Schwab, Stefan; Hutter, Herbert; Schmid, Ulrich

    2017-11-01

    Metal assisted photochemical etching (MAPCE) of 4H-silicon carbide (SiC) in Na2S2O8/HF and H2O2/HF aqueous solutions is investigated with platinum as metallic cathode. The formation process of the resulting porous layer is studied with respect to etching time, concentration and type of oxidizing agent. From the experiments it is concluded that the porous layer formation is due to electron hole pairs generated in the semiconductor, which stem from UV light irradiation. The generated holes are consumed during the oxidation of 4H-SiC and the formed oxide is dissolved by HF. To maintain charge balance, the oxidizing agent has to take up electrons at the Pt/etching solution interface. Total dissolution of the porous layers is achieved when the oxidizing agent concentration decreases during MAPCE. In combination with standard photolithography, the definition of porous regions is possible. Furthermore chemical micromachining of 4 H-SiC at room temperature is possible.

  13. Direct monolithic integration of vertical single crystalline octahedral molecular sieve nanowires on silicon

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Carretero-Genevrier, Adrian; Oro-Sole, Judith; Gazquez, Jaume

    2013-12-13

    We developed an original strategy to produce vertical epitaxial single crystalline manganese oxide octahedral molecular sieve (OMS) nanowires with tunable pore sizes and compositions on silicon substrates by using a chemical solution deposition approach. The nanowire growth mechanism involves the use of track-etched nanoporous polymer templates combined with the controlled growth of quartz thin films at the silicon surface, which allowed OMS nanowires to stabilize and crystallize. α-quartz thin films were obtained after thermal activated crystallization of the native amorphous silica surface layer assisted by Sr 2+- or Ba 2+-mediated heterogeneous catalysis in the air at 800 °C. These α-quartzmore » thin films work as a selective template for the epitaxial growth of randomly oriented vertical OMS nanowires. Furthermore, the combination of soft chemistry and epitaxial growth opens new opportunities for the effective integration of novel technological functional tunneled complex oxides nanomaterials on Si substrates.« less

  14. Surface Attachment of Gold Nanoparticles Guided by Block Copolymer Micellar Films and Its Application in Silicon Etching

    PubMed Central

    Wei, Mingjie; Wang, Yong

    2015-01-01

    Patterning metallic nanoparticles on substrate surfaces is important in a number of applications. However, it remains challenging to fabricate such patterned nanoparticles with easily controlled structural parameters, including particle sizes and densities, from simple methods. We report on a new route to directly pattern pre-formed gold nanoparticles with different diameters on block copolymer micellar monolayers coated on silicon substrates. Due to the synergetic effect of complexation and electrostatic interactions between the micellar cores and the gold particles, incubating the copolymer-coated silicon in a gold nanoparticles suspension leads to a monolayer of gold particles attached on the coated silicon. The intermediate micellar film was then removed using oxygen plasma treatment, allowing the direct contact of the gold particles with the Si substrate. We further demonstrate that the gold nanoparticles can serve as catalysts for the localized etching of the silicon substrate, resulting in nanoporous Si with a top layer of straight pores. PMID:28793407

  15. Development of a polysilicon process based on chemical vapor deposition, phase 1 and phase 2

    NASA Technical Reports Server (NTRS)

    Plahutnik, F.; Arvidson, A.; Sawyer, D.; Sharp, K.

    1982-01-01

    High-purity polycrystalline silicon was produced in an experimental, intermediate and advanced CVD reactor. Data from the intermediate and advanced reactors confirmed earlier results obtained in the experimental reactor. Solar cells were fabricated by Westinghouse Electric and Applied Solar Research Corporation which met or exceeded baseline cell efficiencies. Feedstocks containing trichlorosilane or silicon tetrachloride are not viable as etch promoters to reduce silicon deposition on bell jars. Neither are they capable of meeting program goals for the 1000 MT/yr plant. Post-run CH1 etch was found to be a reasonably effective method of reducing silicon deposition on bell jars. Using dichlorosilane as feedstock met the low-cost solar array deposition goal (2.0 gh-1-cm-1), however, conversion efficiency was approximately 10% lower than the targeted value of 40 mole percent (32 to 36% achieved), and power consumption was approximately 20 kWh/kg over target at the reactor.

  16. Determination of total fluoride in HF/HNO3/H2SiF6 etch solutions by new potentiometric titration methods.

    PubMed

    Weinreich, Wenke; Acker, Jörg; Gräber, Iris

    2007-03-30

    In the photovoltaic industry the etching of silicon in HF/HNO(3) solutions is a decisive process for cleaning wafer surfaces or to produce certain surface morphologies like polishing or texturization. With regard to cost efficiency, a maximal utilisation of etch baths in combination with highest quality and accuracy is strived. To provide an etch bath control realised by a replenishment with concentrated acids the main constituents of these HF/HNO(3) etch solutions including the reaction product H(2)SiF(6) have to be analysed. Two new methods for the determination of the total fluoride content in an acidic etch solution based on the precipitation titration with La(NO(3))(3) are presented within this paper. The first method bases on the proper choice of the reaction conditions, since free fluoride ions have to be liberated from HF and H(2)SiF(6) at the same time to be detected by a fluoride ion-selective electrode (F-ISE). Therefore, the sample is adjusted to a pH of 8 for total cleavage of the SiF(6)(2-) anion and titrated in absence of buffers. In a second method, the titration with La(NO(3))(3) is followed by a change of the pH-value using a HF resistant glass-electrode. Both methods provide consistent values, whereas the analysis is fast and accurate, and thus, applicable for industrial process control.

  17. Concept Demonstration of Dopant Selective Reactive Etching (DSRIE) in Silicon Carbide

    NASA Technical Reports Server (NTRS)

    Okojie, Robert S.

    2015-01-01

    Accurate quantification of combustor pressure dynamics for the primary purpose of experimental validation of computational fluid dynamics (CFD) codes requires the use of robust, reliable and sensitive pressure sensors that can resolve sub--pound-per-square-inch pressure levels in high temperature environments (i.e., combustor). The state of the art microfabricated piezoresistive silicon carbide (SiC) pressure sensors that we have developed are capable of operating reliably at 600 degrees Centigrade. This technology was used in support of the ARMD ISRP-ERA (NASA's Aeronautics Research Mission Directorate, Integrated System Research Project - Environmentally Responsible Aviation) program to quantify combustor thermoacoustic instabilities. The results showed that while the SiC pressure sensors survived the high temperature and measured instabilities, the diaphragm (force collector) was not thin enough to be sensitive in resolving sub-pound-per-square-inch pressures; 30 meters is the thinnest diaphragm achievable with conventional reactive ion etching (RIE) processes. Therefore, this precludes its use for sub-pound-per-square-inch pressure measurement with high fidelity. In order to effectively resolve sub-pound-per-square-inch pressures, a thinner more sensitive diaphragm (10 meters) is needed. To achieve this would require a new and innovative fabrication process technique.

  18. Development of silicon grisms and immersion gratings for high-resolution infrared spectroscopy

    NASA Astrophysics Data System (ADS)

    Ge, Jian; McDavitt, Daniel L.; Bernecker, John L.; Miller, Shane; Ciarlo, Dino R.; Kuzmenko, Paul J.

    2002-01-01

    We report new results on silicon grism and immersion grating development using photolithography and anisotropic chemical etching techniques, which include process recipe finding, prototype grism fabrication, lab performance evaluation and initial scientific observations. The very high refractive index of silicon (n=3.4) enables much higher dispersion power for silicon-based gratings than conventional gratings, e.g. a silicon immersion grating can offer a factor of 3.4 times the dispersion of a conventional immersion grating. Good transmission in the infrared (IR) allows silicon-based gratings to operate in the broad IR wavelength regions (~1- 10 micrometers and far-IR), which make them attractive for both ground and space-based spectroscopic observations. Coarser gratings can be fabricated with these new techniques rather than conventional techniques, allowing observations at very high dispersion orders for larger simultaneous wavelength coverage. We have found new etching techniques for fabricating high quality silicon grisms with low wavefront distortion, low scattered light and high efficiency. Particularly, a new etching process using tetramethyl ammonium hydroxide (TMAH) is significantly simplifying the fabrication process on large, thick silicon substrates, while providing comparable grating quality to our traditional potassium hydroxide (KOH) process. This technique is being used for fabricating inch size silicon grisms for several IR instruments and is planned to be used for fabricating ~ 4 inch size silicon immersion gratings later. We have obtained complete K band spectra of a total of 6 T Tauri and Ae/Be stars and their close companions at a spectral resolution of R ~ 5000 using a silicon echelle grism with a 5 mm pupil diameter at the Lick 3m telescope. These results represent the first scientific observations conducted by the high-resolution silicon grisms, and demonstrate the extremely high dispersing power of silicon- based gratings. The future of silicon-based grating applications in ground and space-based IR instruments is promising. Silicon immersion gratings will make very high-resolution spectroscopy (R>100,000) feasible with compact instruments for implementation on large telescopes. Silicon grisms will offer an efficient way to implement low-cost medium to high resolution IR spectroscopy (R~ 1000-50000) through the conversion of existing cameras into spectrometers by locating a grism in the instrument's pupil location.

  19. Application of porous silicon in solar cell

    NASA Astrophysics Data System (ADS)

    Maniya, Nalin H.; Ashokan, Jibinlal; Srivastava, Divesh N.

    2018-05-01

    Silicon is widely used in solar cell applications with over 95% of all solar cells produced worldwide composed of silicon. Nanostructured thin porous silicon (PSi) layer acting as anti-reflecting coating is used in photovoltaic solar cells due to its advantages including simple and low cost fabrication, highly textured surfaces enabling lowering of reflectance, controllability of thickness and porosity of layer, and high surface area. PSi layers have previously been reported to reduce the reflection of light and replaced the conventional anti-reflective coating layers on solar cells. This can essentially improve the efficiency and decrease the cost of silicon solar cells. Here, we investigate the reflectance of different PSi layers formed by varying current density and etching time. PSi layers were formed by a combination of current density including 60 and 80 mA/cm2 and time for fabrication as 2, 4, 6, and 8 seconds. The fabricated PSi layers were characterized using reflectance spectroscopy and field emission scanning electron microscopy. Thickness and pore size of PSi layer were increased with increase in etching time and current density, respectively. The reflectance of PSi layers was decreased with increase in etching time until 6 seconds and increased again after 6 seconds, which was observed across both the current density. Reduction in reflectance indicates the increase of absorption of light by silicon due to the thin PSi layer. In comparison with the reflectance of silicon wafer, PSi layer fabricated at 80 mA/cm2 for 6 seconds gave the best result with reduction in reflectance up to 57%. Thus, the application of PSi layer as an effective anti-reflecting coating for the fabrication of solar cell has been demonstrated.

  20. Optimization and validation of highly selective microfluidic integrated silicon nanowire chemical sensor

    NASA Astrophysics Data System (ADS)

    Ehfaed, Nuri. A. K. H.; Bathmanathan, Shillan A. L.; Dhahi, Th S.; Adam, Tijjani; Hashim, Uda; Noriman, N. Z.

    2017-09-01

    The study proposed characterization and optimization of silicon nanosensor for specific detection of heavy metal. The sensor was fabricated in-house and conventional photolithography coupled with size reduction via dry etching process in an oxidation furnace. Prior to heavy metal heavy metal detection, the capability to aqueous sample was determined utilizing serial DI water at various. The sensor surface was surface modified with Organofunctional alkoxysilanes (3-aminopropyl) triethoxysilane (APTES) to create molecular binding chemistry. This has allowed interaction between heavy metals being measured and the sensor component resulting in increasing the current being measured. Due to its, excellent detection capabilities, this sensor was able to identify different group heavy metal species. The device was further integrated with sub-50 µm for chemical delivery.

  1. Highly organised and dense vertical silicon nanowire arrays grown in porous alumina template on <100> silicon wafers

    PubMed Central

    2013-01-01

    In this work, nanoimprint lithography combined with standard anodization etching is used to make perfectly organised triangular arrays of vertical cylindrical alumina nanopores onto standard <100>−oriented silicon wafers. Both the pore diameter and the period of alumina porous array are well controlled and can be tuned: the periods vary from 80 to 460 nm, and the diameters vary from 15 nm to any required diameter. These porous thin layers are then successfully used as templates for the guided epitaxial growth of organised mono-crystalline silicon nanowire arrays in a chemical vapour deposition chamber. We report the densities of silicon nanowires up to 9 × 109 cm−2 organised in highly regular arrays with excellent diameter distribution. All process steps are demonstrated on surfaces up to 2 × 2 cm2. Specific emphasis was made to select techniques compatible with microelectronic fabrication standards, adaptable to large surface samples and with a reasonable cost. Achievements made in the quality of the porous alumina array, therefore on the silicon nanowire array, widen the number of potential applications for this technology, such as optical detectors or biological sensors. PMID:23773702

  2. A micro-scale plasma spectrometer for space and plasma edge applications (invited)

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Scime, E. E., E-mail: escime@wvu.edu; Keesee, A. M.; Elliott, D.

    2016-11-15

    A plasma spectrometer design based on advances in lithography and microchip stacking technologies is described. A series of curved plate energy analyzers, with an integrated collimator, is etched into a silicon wafer. Tests of spectrometer elements, the energy analyzer and collimator, were performed with a 5 keV electron beam. The measured collimator transmission and energy selectivity were in good agreement with design targets. A single wafer element could be used as a plasma processing or fusion first wall diagnostic.

  3. Directional Etching of Silicon by Silver Nanostructures

    NASA Astrophysics Data System (ADS)

    Sharma, Pradeep; Wang, Yuh-Lin

    2011-02-01

    We report directional etching of nanostructures (nanochannels and nanotrenches) into the Si(100) substrates in aqueous HF and H2O2 solution by lithographically defined Ag patterns (nanoparticles, nanorods, and nanorings). The Effect of Ag/Si interface oxide on the directional etching has been studied by etching Ag/SiOx/Si samples of known interface oxide thickness. Based on high resolution transmission electron microscopy (HRTEM) imaging and TEM-energy dispersive X-ray (EDX) spectra of the Ag/Si interfaces, we propose that maintenance of the sub-nanometer oxide at the Ag/Si interfaces and Ag-Si interaction are the key factors which regulate the directional etching of Si.

  4. Difference in anisotropic etching characteristics of alkaline and copper based acid solutions for single-crystalline Si.

    PubMed

    Chen, Wei; Liu, Yaoping; Yang, Lixia; Wu, Juntao; Chen, Quansheng; Zhao, Yan; Wang, Yan; Du, Xiaolong

    2018-02-21

    The so called inverted pyramid arrays, outperforming conventional upright pyramid textures, have been successfully achieved by one-step Cu assisted chemical etching (CACE) for light reflection minimization in silicon solar cells. Due to the lower reduction potential of Cu 2+ /Cu and different electronic properties of different Si planes, the etching of Si substrate shows orientation-dependent. Different from the upright pyramid obtained by alkaline solutions, the formation of inverted pyramid results from the coexistence of anisotropic etching and localized etching process. The obtained structure is bounded by Si {111} planes which have the lowest etching rate, no matter what orientation of Si substrate is. The Si etching rate and (100)/(111) etching ratio are quantitatively analyzed. The different behaviors of anisotropic etching of Si by alkaline and Cu based acid etchant have been systematically investigated.

  5. Quartz substrate infrared photonic crystal

    NASA Astrophysics Data System (ADS)

    Ghadiri, Khosrow; Rejeb, Jalel; Vitchev, Vladimir N.

    2003-01-01

    This paper presents the fabrication of a planar photonic crystal (p2c) made of a square array of dielectric rods embedded in air, operating in the infrared spectrum. A quartz substrate is employed instead of the commonly used silicon or column III-V substrate. Our square structure has a normalized cylinder radius-to-pitch ratio of r/a = 0.248 and dielectric material contrast ɛr of 4.5. We choose a Z-cut synthetic quartz for its cut (geometry), and etching properties. Then a particular Z-axis etching process is employed in order to ensure the sharp-edged verticality of the rods and fast etching speed. We also present the computer simulations that allowed the establishment of the photonic band gaps (PBG) of our photonic crystal, as well as the actual measurements. An experimental measurement have been carried out and compared with different simulations. It was found that experimental results are in good agreement with different simulation results. Finally, a frequency selective device for optical communication based on the introduction of impurity sites in the photonic crystal is presented. With our proposed structure Optical System on a Chip (OsoC) with micro-cavity based active devices such as lasers, diodes, modulators, couplers, frequency selective emitters, add-drop filters, detectors, mux/demuxes and polarizers connected by passive waveguide links can be realized.

  6. Study on fabrication technology of silicon-based silica array waveguide grating

    NASA Astrophysics Data System (ADS)

    Sun, Yanjun; Dong, Lianhe; Leng, Yanbing

    2009-05-01

    Array waveguide grating (AWG) is an important plane optical element in dense wavelength division multiplex/demultiplex system. There are many virtue, channel quantity larger,lower loss, lower crosstalk, size smaller and high reliability etc. This article describs AWG fabrication technics utilizing IC(Integrated Circles) techniques, based on sixteen channel Silicon-Based Silica Array Waveguide Grating, put emphasis on discussing doping and deposition of waveguide core film,technics theory and interrelated parameter condition of photoetch and ion etching. Experiment result indicates that it depens on electrode structure, energy of radio-frequency electrode gas component, pressure ,flowing speed and substrate temperature by CVD depositing film .During depositing waveguide film by PE-CVD, the silicon is not reacted, When temperature becomes lower,it is reacted and it is easy to realize the control of film thickness and time with a result of film thickness uniformity reaching about 4% after optimizing deposition parameter and condition. We get the result of high etching speed rate, outline zoom, and side frame smooth by photoresist/Cr multiple mask and optimizing etching technics.

  7. Fabrication of porous silicon nanowires by MACE method in HF/H2O2/AgNO3 system at room temperature

    PubMed Central

    2014-01-01

    In this paper, the moderately and lightly doped porous silicon nanowires (PSiNWs) were fabricated by the ‘one-pot procedure’ metal-assisted chemical etching (MACE) method in the HF/H2O2/AgNO3 system at room temperature. The effects of H2O2 concentration on the nanostructure of silicon nanowires (SiNWs) were investigated. The experimental results indicate that porous structure can be introduced by the addition of H2O2 and the pore structure could be controlled by adjusting the concentration of H2O2. The H2O2 species replaces Ag+ as the oxidant and the Ag nanoparticles work as catalyst during the etching. And the concentration of H2O2 influences the nucleation and motility of Ag particles, which leads to formation of different porous structure within the nanowires. A mechanism based on the lateral etching which is catalyzed by Ag particles under the motivation by H2O2 reduction is proposed to explain the PSiNWs formation. PMID:24910568

  8. Development of a high-yield via-last through silicon via process using notchless silicon etching and wet cleaning of the first metal layer

    NASA Astrophysics Data System (ADS)

    Watanabe, Naoya; Kikuchi, Hidekazu; Yanagisawa, Azusa; Shimamoto, Haruo; Kikuchi, Katsuya; Aoyagi, Masahiro; Nakamura, Akio

    2017-07-01

    A high-yield via-last through silicon via (TSV) process has been developed using notchless Si etching and wet cleaning of the first metal layer. In this process, the notching was suppressed by optimizing the deep Si etching conditions and wet cleaning was performed using an organic alkaline solution to remove reaction products generated by the etchback step on the first metal layer. By this process, a number of small TSVs (TSV diameter: 6 µm TSV depth: 22 µm number of TSVs: 20,000/chip) could be formed uniformly on an 8-in. wafer. The electrical characteristics of small TSVs formed by this via-last TSV process were investigated. The TSV resistance determined by four-terminal measurements was approximately 24 mΩ. The leakage current between the TSV and the Si substrate was 2.5 pA at 5 V. The TSV capacitance determined using an inductance-capacitance-resistance (LCR) meter was 54 fF, while the TSV yield determined from TSV chain measurements was high (83%) over an 8-in. wafer.

  9. Processing-Induced Electrically Active Defects in Black Silicon Nanowire Devices.

    PubMed

    Carapezzi, Stefania; Castaldini, Antonio; Mancarella, Fulvio; Poggi, Antonella; Cavallini, Anna

    2016-04-27

    Silicon nanowires (Si NWs) are widely investigated nowadays for implementation in advanced energy conversion and storage devices, as well as many other possible applications. Black silicon (BSi)-NWs are dry etched NWs that merge the advantages related to low-dimensionality with the special industrial appeal connected to deep reactive ion etching (RIE). In fact, RIE is a well established technique in microelectronics manufacturing. However, RIE processing could affect the electrical properties of BSi-NWs by introducing deep states into their forbidden gap. This work applies deep level transient spectroscopy (DLTS) to identify electrically active deep levels and the associated defects in dry etched Si NW arrays. Besides, the successful fitting of DLTS spectra of BSi-NWs-based Schottky barrier diodes is an experimental confirmation that the same theoretical framework of dynamic electronic behavior of deep levels applies in bulk as well as in low dimensional structures like NWs, when quantum confinement conditions do not occur. This has been validated for deep levels associated with simple pointlike defects as well as for deep levels associated with defects with richer structures, whose dynamic electronic behavior implies a more complex picture.

  10. Self-Anchored Catalyst Interface Enables Ordered Via Array Formation from Submicrometer to Millimeter Scale for Polycrystalline and Single-Crystalline Silicon.

    PubMed

    Kim, Jeong Dong; Kim, Munho; Kong, Lingyu; Mohseni, Parsian K; Ranganathan, Srikanth; Pachamuthu, Jayavel; Chim, Wai Kin; Chiam, Sing Yang; Coleman, James J; Li, Xiuling

    2018-03-14

    Defying text definitions of wet etching, metal-assisted chemical etching (MacEtch), a solution-based, damage-free semiconductor etching method, is directional, where the metal catalyst film sinks with the semiconductor etching front, producing 3D semiconductor structures that are complementary to the metal catalyst film pattern. The same recipe that works perfectly to produce ordered array of nanostructures for single-crystalline Si (c-Si) fails completely when applied to polycrystalline Si (poly-Si) with the same doping type and level. Another long-standing challenge for MacEtch is the difficulty of uniformly etching across feature sizes larger than a few micrometers because of the nature of lateral etching. The issue of interface control between the catalyst and the semiconductor in both lateral and vertical directions over time and over distance needs to be systematically addressed. Here, we present a self-anchored catalyst (SAC) MacEtch method, where a nanoporous catalyst film is used to produce nanowires through the pinholes, which in turn physically anchor the catalyst film from detouring as it descends. The systematic vertical etch rate study as a function of porous catalyst diameter from 200 to 900 nm shows that the SAC-MacEtch not only confines the etching direction but also enhances the etch rate due to the increased liquid access path, significantly delaying the onset of the mass-transport-limited critical diameter compared to nonporous catalyst c-Si counterpart. With this enhanced mass transport approach, vias on multistacks of poly-Si/SiO 2 are also formed with excellent vertical registry through the polystack, even though they are separated by SiO 2 which is readily removed by HF alone with no anisotropy. In addition, 320 μm square through-Si-via (TSV) arrays in 550 μm thick c-Si are realized. The ability of SAC-MacEtch to etch through poly/oxide/poly stack as well as more than half millimeter thick silicon with excellent site specificity for a wide range of feature sizes has significant implications for 2.5D/3D photonic and electronic device applications.

  11. Surface Nanostructures Formed by Phase Separation of Metal Salt-Polymer Nanocomposite Film for Anti-reflection and Super-hydrophobic Applications

    NASA Astrophysics Data System (ADS)

    Con, Celal; Cui, Bo

    2017-12-01

    This paper describes a simple and low-cost fabrication method for multi-functional nanostructures with outstanding anti-reflective and super-hydrophobic properties. Our method employed phase separation of a metal salt-polymer nanocomposite film that leads to nanoisland formation after etching away the polymer matrix, and the metal salt island can then be utilized as a hard mask for dry etching the substrate or sublayer. Compared to many other methods for patterning metallic hard mask structures, such as the popular lift-off method, our approach involves only spin coating and thermal annealing, thus is more cost-efficient. Metal salts including aluminum nitrate nonahydrate (ANN) and chromium nitrate nonahydrate (CNN) can both be used, and high aspect ratio (1:30) and high-resolution (sub-50 nm) pillars etched into silicon can be achieved readily. With further control of the etching profile by adjusting the dry etching parameters, cone-like silicon structure with reflectivity in the visible region down to a remarkably low value of 2% was achieved. Lastly, by coating a hydrophobic surfactant layer, the pillar array demonstrated a super-hydrophobic property with an exceptionally high water contact angle of up to 165.7°.

  12. Surface Nanostructures Formed by Phase Separation of Metal Salt-Polymer Nanocomposite Film for Anti-reflection and Super-hydrophobic Applications.

    PubMed

    Con, Celal; Cui, Bo

    2017-12-16

    This paper describes a simple and low-cost fabrication method for multi-functional nanostructures with outstanding anti-reflective and super-hydrophobic properties. Our method employed phase separation of a metal salt-polymer nanocomposite film that leads to nanoisland formation after etching away the polymer matrix, and the metal salt island can then be utilized as a hard mask for dry etching the substrate or sublayer. Compared to many other methods for patterning metallic hard mask structures, such as the popular lift-off method, our approach involves only spin coating and thermal annealing, thus is more cost-efficient. Metal salts including aluminum nitrate nonahydrate (ANN) and chromium nitrate nonahydrate (CNN) can both be used, and high aspect ratio (1:30) and high-resolution (sub-50 nm) pillars etched into silicon can be achieved readily. With further control of the etching profile by adjusting the dry etching parameters, cone-like silicon structure with reflectivity in the visible region down to a remarkably low value of 2% was achieved. Lastly, by coating a hydrophobic surfactant layer, the pillar array demonstrated a super-hydrophobic property with an exceptionally high water contact angle of up to 165.7°.

  13. A tunable sub-100 nm silicon nanopore array with an AAO membrane mask: reducing unwanted surface etching by introducing a PMMA interlayer

    NASA Astrophysics Data System (ADS)

    Lim, Namsoo; Pak, Yusin; Kim, Jin Tae; Hwang, Youngkyu; Lee, Ryeri; Kumaresan, Yogeenth; Myoung, Nosoung; Ko, Heung Cho; Jung, Gun Young

    2015-08-01

    Highly ordered silicon (Si) nanopores with a tunable sub-100 nm diameter were fabricated by a CF4 plasma etching process using an anodic aluminum oxide (AAO) membrane as an etching mask. To enhance the conformal contact of the AAO membrane mask to the underlying Si substrate, poly(methyl methacrylate) (PMMA) was spin-coated on top of the Si substrate prior to the transfer of the AAO membrane. The AAO membrane mask was fabricated by two-step anodization and subsequent removal of the aluminum support and the barrier layer, which was then transferred to the PMMA-coated Si substrate. Contact printing was performed on the sample with a pressure of 50 psi and a temperature of 120 °C to make a conformal contact of the AAO membrane mask to the Si substrate. The CF4 plasma etching was conducted to transfer nanopores onto the Si substrate through the PMMA interlayer. The introduced PMMA interlayer prevented unwanted surface etching of the Si substrate by eliminating the etching ions and radicals bouncing at the gap between the mask and the substrate, resulting in a smooth Si nanopore array.Highly ordered silicon (Si) nanopores with a tunable sub-100 nm diameter were fabricated by a CF4 plasma etching process using an anodic aluminum oxide (AAO) membrane as an etching mask. To enhance the conformal contact of the AAO membrane mask to the underlying Si substrate, poly(methyl methacrylate) (PMMA) was spin-coated on top of the Si substrate prior to the transfer of the AAO membrane. The AAO membrane mask was fabricated by two-step anodization and subsequent removal of the aluminum support and the barrier layer, which was then transferred to the PMMA-coated Si substrate. Contact printing was performed on the sample with a pressure of 50 psi and a temperature of 120 °C to make a conformal contact of the AAO membrane mask to the Si substrate. The CF4 plasma etching was conducted to transfer nanopores onto the Si substrate through the PMMA interlayer. The introduced PMMA interlayer prevented unwanted surface etching of the Si substrate by eliminating the etching ions and radicals bouncing at the gap between the mask and the substrate, resulting in a smooth Si nanopore array. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr02786a

  14. Surface Participation Effects in Titanium Nitride and Niobium Resonators

    NASA Astrophysics Data System (ADS)

    Dove, Allison; Kreikebaum, John Mark; Livingston, William; Delva, Remy; Qiu, Yanjie; Lolowang, Reinhard; Ramasesh, Vinay; O'Brien, Kevin; Siddiqi, Irfan

    Improving the coherence time of superconducting qubits requires a precise understanding of the location and density of surface defects. Superconducting microwave resonators are commonly used for quantum state readout and are a versatile testbed to systematically characterize materials properties as a function of device geometry and fabrication method. We report on sputter deposited titanium nitride and niobium on silicon coplanar waveguide resonators patterned using reactive ion etches to define the device geometry. We discuss the impact of different growth conditions (temperature and electrical bias) and processing techniques on the internal quality factor (Q) of these devices. In particular, to investigate the effect of surface participation, we use a Bosch process to etch many-micron-deep trenches in the silicon substrate and quantify the impact of etch depth and profile on the internal Q. This research was supported by the ARO.

  15. Metal catalyst technique for texturing silicon solar cells

    DOEpatents

    Ruby, Douglas S.; Zaidi, Saleem H.

    2001-01-01

    Textured silicon solar cells and techniques for their manufacture utilizing metal sources to catalyze formation of randomly distributed surface features such as nanoscale pyramidal and columnar structures. These structures include dimensions smaller than the wavelength of incident light, thereby resulting in a highly effective anti-reflective surface. According to the invention, metal sources present in a reactive ion etching chamber permit impurities (e.g. metal particles) to be introduced into a reactive ion etch plasma resulting in deposition of micro-masks on the surface of a substrate to be etched. Separate embodiments are disclosed including one in which the metal source includes one or more metal-coated substrates strategically positioned relative to the surface to be textured, and another in which the walls of the reaction chamber are pre-conditioned with a thin coating of metal catalyst material.

  16. Nanopore arrays in a silicon membrane for parallel single-molecule detection: fabrication

    NASA Astrophysics Data System (ADS)

    Schmidt, Torsten; Zhang, Miao; Sychugov, Ilya; Roxhed, Niclas; Linnros, Jan

    2015-08-01

    Solid state nanopores enable translocation and detection of single bio-molecules such as DNA in buffer solutions. Here, sub-10 nm nanopore arrays in silicon membranes were fabricated by using electron-beam lithography to define etch pits and by using a subsequent electrochemical etching step. This approach effectively decouples positioning of the pores and the control of their size, where the pore size essentially results from the anodizing current and time in the etching cell. Nanopores with diameters as small as 7 nm, fully penetrating 300 nm thick membranes, were obtained. The presented fabrication scheme to form large arrays of nanopores is attractive for parallel bio-molecule sensing and DNA sequencing using optical techniques. In particular the signal-to-noise ratio is improved compared to other alternatives such as nitride membranes suffering from a high-luminescence background.

  17. Nanopore arrays in a silicon membrane for parallel single-molecule detection: fabrication.

    PubMed

    Schmidt, Torsten; Zhang, Miao; Sychugov, Ilya; Roxhed, Niclas; Linnros, Jan

    2015-08-07

    Solid state nanopores enable translocation and detection of single bio-molecules such as DNA in buffer solutions. Here, sub-10 nm nanopore arrays in silicon membranes were fabricated by using electron-beam lithography to define etch pits and by using a subsequent electrochemical etching step. This approach effectively decouples positioning of the pores and the control of their size, where the pore size essentially results from the anodizing current and time in the etching cell. Nanopores with diameters as small as 7 nm, fully penetrating 300 nm thick membranes, were obtained. The presented fabrication scheme to form large arrays of nanopores is attractive for parallel bio-molecule sensing and DNA sequencing using optical techniques. In particular the signal-to-noise ratio is improved compared to other alternatives such as nitride membranes suffering from a high-luminescence background.

  18. Mushroom-free selective epitaxial growth of Si, SiGe and SiGe:B raised sources and drains

    NASA Astrophysics Data System (ADS)

    Hartmann, J. M.; Benevent, V.; Barnes, J. P.; Veillerot, M.; Lafond, D.; Damlencourt, J. F.; Morvan, S.; Prévitali, B.; Andrieu, F.; Loubet, N.; Dutartre, D.

    2013-05-01

    We have evaluated various Cyclic Selective Epitaxial Growth/Etch (CSEGE) processes in order to grow "mushroom-free" Si and SiGe:B Raised Sources and Drains (RSDs) on each side of ultra-short gate length Extra-Thin Silicon-On-Insulator (ET-SOI) transistors. The 750 °C, 20 Torr Si CSEGE process we have developed (5 chlorinated growth steps with four HCl etch steps in-between) yielded excellent crystalline quality, typically 18 nm thick Si RSDs. Growth was conformal along the Si3N4 sidewall spacers, without any poly-Si mushrooms on top of unprotected gates. We have then evaluated on blanket 300 mm Si(001) wafers the feasibility of a 650 °C, 20 Torr SiGe:B CSEGE process (5 chlorinated growth steps with four HCl etch steps in-between, as for Si). As expected, the deposited thickness decreased as the total HCl etch time increased. This came hands in hands with unforeseen (i) decrease of the mean Ge concentration (from 30% down to 26%) and (ii) increase of the substitutional B concentration (from 2 × 1020 cm-3 up to 3 × 1020 cm-3). They were due to fluctuations of the Ge concentration and of the atomic B concentration [B] in such layers (drop of the Ge% and increase of [B] at etch step locations). Such blanket layers were a bit rougher than layers grown using a single epitaxy step, but nevertheless of excellent crystalline quality. Transposition of our CSEGE process on patterned ET-SOI wafers did not yield the expected results. HCl etch steps indeed helped in partly or totally removing the poly-SiGe:B mushrooms on top of the gates. This was however at the expense of the crystalline quality and 2D nature of the ˜45 nm thick Si0.7Ge0.3:B recessed sources and drains selectively grown on each side of the imperfectly protected poly-Si gates. The only solution we have so far identified that yields a lesser amount of mushrooms while preserving the quality of the S/D is to increase the HCl flow during growth steps.

  19. Rigid thin windows for vacuum applications

    DOEpatents

    Meyer, Glenn Allyn; Ciarlo, Dino R.; Myers, Booth Richard; Chen, Hao-Lin; Wakalopulos, George

    1999-01-01

    A thin window that stands off atmospheric pressure is fabricated using photolithographic and wet chemical etching techniques and comprises at least two layers: an etch stop layer and a protective barrier layer. The window structure also comprises a series of support ribs running the width of the window. The windows are typically made of boron-doped silicon and silicon nitride and are useful in instruments such as electron beam guns and x-ray detectors. In an electron beam gun, the window does not impede the electrons and has demonstrated outstanding gun performance and survivability during the gun tube manufacturing process.

  20. Oblique patterned etching of vertical silicon sidewalls

    NASA Astrophysics Data System (ADS)

    Bruce Burckel, D.; Finnegan, Patrick S.; David Henry, M.; Resnick, Paul J.; Jarecki, Robert L.

    2016-04-01

    A method for patterning on vertical silicon surfaces in high aspect ratio silicon topography is presented. A Faraday cage is used to direct energetic reactive ions obliquely through a patterned suspended membrane positioned over the topography. The technique is capable of forming high-fidelity pattern (100 nm) features, adding an additional fabrication capability to standard top-down fabrication approaches.

  1. Effect of etching time on morphological, optical, and electronic properties of silicon nanowires.

    PubMed

    Nafie, Nesma; Lachiheb, Manel Abouda; Bouaicha, Mongi

    2012-07-16

    Owing to their interesting electronic, mechanical, optical, and transport properties, silicon nanowires (SiNWs) have attracted much attention, giving opportunities to several potential applications in nanoscale electronic, optoelectronic devices, and silicon solar cells. For photovoltaic application, a superficial film of SiNWs could be used as an efficient antireflection coating. In this work we investigate the morphological, optical, and electronic properties of SiNWs fabricated at different etching times. Characterizations of the formed SiNWs films were performed using a scanning electron microscope, ultraviolet-visible-near-infrared spectroscopy, and light-beam-induced-current technique. The latter technique was used to determine the effective diffusion length in SiNWs films. From these investigations, we deduce that the homogeneity of the SiNWs film plays a key role on the electronic properties.

  2. Defect characterization of silicon dendritic web ribbons

    NASA Technical Reports Server (NTRS)

    Cheng, L. J.

    1985-01-01

    Progress made in the study of defect characterization of silicon dendritic web ribbon is presented. Chemical etching is used combined with optical microscopy, as well as the electron beam induced current (EBIC) technique. Thermal annealing effect on carrier lifetime is examined.

  3. Deep Reactive Ion Etching (DRIE) of High Aspect Ratio SiC Microstructures using a Time-Multiplexed Etch-Passivate Process

    NASA Technical Reports Server (NTRS)

    Evans, Laura J.; Beheim, Glenn M.

    2006-01-01

    High aspect ratio silicon carbide (SiC) microstructures are needed for microengines and other harsh environment micro-electro-mechanical systems (MEMS). Previously, deep reactive ion etching (DRIE) of low aspect ratio (AR less than or = 1) deep (greater than 100 micron) trenches in SiC has been reported. However, existing DRIE processes for SiC are not well-suited for definition of high aspect ratio features because such simple etch-only processes provide insufficient control over sidewall roughness and slope. Therefore, we have investigated the use of a time-multiplexed etch-passivate (TMEP) process, which alternates etching with polymer passivation of the etch sidewalls. An optimized TMEP process was used to etch high aspect ratio (AR greater than 5) deep (less than 100 micron) trenches in 6H-SiC. Power MEMS structures (micro turbine blades) in 6H-SiC were also fabricated.

  4. Fabrication of luminescent porous silicon with stain etches and evidence that luminescence originates in amorphous layers

    NASA Technical Reports Server (NTRS)

    Fathauer, R. W.; George, T.; Ksendzov, A.; Lin, T. L.; Pike, W. T.; Vasquez, R. P.; Wu, Z.-C.

    1992-01-01

    Simple immersion of Si in stain etches of HF:HNO3:H2O or NaNO2 in aqueous HF was used to produce films exhibiting luminescence in the visible similar to that of anodically-etched porous Si. All of the luminescent samples consist of amorphous porous Si in at least the near surface region. No evidence was found for small crystalline regions within these amorphous layers.

  5. A Manufacturing Scheduler’s Perspective on Semiconductor Fabrication

    DTIC Science & Technology

    1989-04-01

    issues and use highly specialized models. To achieve effective scheduling, we need a better understanding of the IC fabri- cation environment. The...ackside pal side OxIld lasma etch ::eKt etch lphcoat.set se’r ....... jPhoSp giass Phosphrouposit Wesist ash vet etch eposition jT osW’OW4Y 𔃼V𔄃jijr - e...Ammo- nia, Boron trichloride, Dichlorosilane , Suffer Hexafloride, Freon 13, freon 14, freon 116, Helium, Phosphorous Pentafloride, Silicon

  6. Nanoscale silver-assisted wet etching of crystalline silicon for anti-reflection surface textures.

    PubMed

    Li, Rui; Wang, Shuling; Chuwongin, Santhad; Zhou, Weidong

    2013-01-01

    We report here an electro-less metal-assisted chemical etching (MacEtch) process as light management surface-texturing technique for single crystalline Si photovoltaics. Random Silver nanostructures were formed on top of the Si surface based on the thin film evaporation and annealing process. Significant reflection reduction was obtained from the fabricated Si sample, with approximately 2% reflection over a wide spectra range (300 to 1050 nm). The work demonstrates the potential of MacEtch process for anti-reflection surface texture fabrication of large area, high efficiency, and low cost thin film solar cell.

  7. Plasma-deposited fluoropolymer film mask for local porous silicon formation

    PubMed Central

    2012-01-01

    The study of an innovative fluoropolymer masking layer for silicon anodization is proposed. Due to its high chemical resistance to hydrofluoric acid even under anodic bias, this thin film deposited by plasma has allowed the formation of deep porous silicon regions patterned on the silicon wafer. Unlike most of other masks, fluoropolymer removal after electrochemical etching is rapid and does not alter the porous layer. Local porous regions were thus fabricated both in p+-type and low-doped n-type silicon substrates. PMID:22734507

  8. Purification of silicon powder by the formation of thin porous layer followed byphoto-thermal annealing.

    PubMed

    Khalifa, Marouan; Hajji, Messaoud; Ezzaouia, Hatem

    2012-08-08

    Porous silicon has been prepared using a vapor-etching based technique on a commercial silicon powder. Strong visible emission was observed in all samples. Obtained silicon powder with a thin porous layer at the surface was subjected to a photo-thermal annealing at different temperatures under oxygen atmosphere followed by a chemical treatment. Inductively coupled plasma atomic emission spectrometry results indicate that silicon purity is improved from 99.1% to 99.994% after annealing at 900°C.

  9. Purification of silicon powder by the formation of thin porous layer followed byphoto-thermal annealing

    PubMed Central

    2012-01-01

    Porous silicon has been prepared using a vapor-etching based technique on a commercial silicon powder. Strong visible emission was observed in all samples. Obtained silicon powder with a thin porous layer at the surface was subjected to a photo-thermal annealing at different temperatures under oxygen atmosphere followed by a chemical treatment. Inductively coupled plasma atomic emission spectrometry results indicate that silicon purity is improved from 99.1% to 99.994% after annealing at 900°C. PMID:22873706

  10. Low-loss, submicron chalcogenide integrated photonics with chlorine plasma etching

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chiles, Jeff; Malinowski, Marcin; Rao, Ashutosh

    A chlorine plasma etching-based method for the fabrication of high-performance chalcogenide-based integrated photonics on silicon substrates is presented. By optimizing the etching conditions, chlorine plasma is employed to produce extremely low-roughness etched sidewalls on waveguides with minimal penalty to propagation loss. Using this fabrication method, microring resonators with record-high intrinsic Q-factors as high as 450 000 and a corresponding propagation loss as low as 0.42 dB/cm are demonstrated in submicron chalcogenide waveguides. Furthermore, the developed chlorine plasma etching process is utilized to demonstrate fiber-to-waveguide grating couplers in chalcogenide photonics with high power coupling efficiency of 37% for transverse-electric polarized modes.

  11. Ultra-low loss fully-etched grating couplers for perfectly vertical coupling compatible with DUV lithography tools

    NASA Astrophysics Data System (ADS)

    Dabos, G.; Pleros, N.; Tsiokos, D.

    2016-03-01

    Hybrid integration of VCSELs onto silicon-on-insulator (SOI) substrates has emerged as an attractive approach for bridging the gap between cost-effective and energy-efficient directly modulated laser sources and silicon-based PICs by leveraging flip-chip (FC) bonding techniques and silicon grating couplers (GCs). In this context, silicon GCs, should comply with the process requirements imposed by the complimentary-metal-oxide-semiconductor manufacturing tools addressing in parallel the challenges originating from the perfectly vertical incidence. Firstly, fully etched GCs compatible with deep-ultraviolet lithography tools offering high coupling efficiencies are imperatively needed to maintain low fabrication cost. Secondly, GC's tolerance to VCSEL bonding misalignment errors is a prerequisite for practical deployment. Finally, a major challenge originating from the perfectly vertical coupling scheme is the minimization of the direct back-reflection to the VCSEL's outgoing facet which may destabilize its operation. Motivated from the above challenges, we used numerical simulation tools to design an ultra-low loss, bidirectional VCSEL-to-SOI optical coupling scheme for either TE or TM polarization, based on low-cost fully etched GCs with a Si-layer of 340 nm without employing bottom reflectors or optimizing the buried-oxide layer. Comprehensive 2D Finite-Difference-Time- Domain simulations have been performed. The reported GC layout remains fully compatible with the back-end-of-line (BEOL) stack associated with the 3D integration technology exploiting all the inter-metal-dielectric (IMD) layers of the CMOS fab. Simulation results predicted for the first time in fully etched structures a coupling efficiency of as low as -0.87 dB at 1548 nm and -1.47 dB at 1560 nm with a minimum direct back-reflection of -27.4 dB and -14.2 dB for TE and TM polarization, respectively.

  12. Self-assembled titanium calcium oxide nanopatterns as versatile reactive nanomasks for dry etching lithographic transfer with high selectivity.

    PubMed

    Faustini, Marco; Drisko, Glenna L; Letailleur, Alban A; Montiel, Rafael Salas; Boissière, Cédric; Cattoni, Andrea; Haghiri-Gosnet, Anne Marie; Lerondel, Gilles; Grosso, David

    2013-02-07

    We report the simple preparation of ultra-thin self-assembled nanoperforated titanium calcium oxide films and their use as reactive nanomasks for selective dry etching of silicon. This novel reactive nanomask is composed of TiO(2) in which up to 50% of Ti was replaced by Ca (Ca(x)Ti(1-x)O(2-x)). The system was prepared by evaporation induced self-assembly of dip-coated solution of CaCl(2), TiCl(4) and poly(butadiene-block-ethylene oxide) followed by 5 min of thermal treatment at 500 °C in air. The mask exhibits enhanced selectivity by forming a CaF(2) protective layer in the presence of a chemically reactive fluorinated plasma. In particular it is demonstrated that ordered nano-arrays of dense Si pillars, or deep cylindrical wells, with high aspect ratio i.e. lateral dimensions as small as 20 nm and height up to 200 nm, can be formed. Both wells and pillars were formed by tuning the morphology and the homogeneity of the deposited mask. The mask preparation is extremely fast and simple, low-cost and easily scalable. Its combination with reactive ion etching constitutes one of the first examples of what can be achieved when sol-gel chemistry is coupled with top-down technologies. The resulting Si nanopatterns and nanostructures are of high interest for applications in many fields of nanotechnology including electronics and optics. This work extends and diversifies the toolbox of nanofabrication methods.

  13. Iridium-coated micropore x-ray optics using dry etching of a silicon wafer and atomic layer deposition.

    PubMed

    Ogawa, Tomohiro; Ezoe, Yuichiro; Moriyama, Teppei; Mitsuishi, Ikuyuki; Kakiuchi, Takuya; Ohashi, Takaya; Mitsuda, Kazuhisa; Putkonen, Matti

    2013-08-20

    To enhance x-ray reflectivity of silicon micropore optics using dry etching of silicon (111) wafers, iridium coating is tested by use of atomic layer deposition. An iridium layer is successfully formed on sidewalls of tiny micropores with a pore width of 20 μm and depth of 300 μm. The film thickness is ∼20  nm. An enhanced x-ray reflectivity compared to that of silicon is confirmed at Ti Kα 4.51 keV, for what we believe to be the first time, with this type of optics. Some discrepancies from a theoretical reflectivity curve of iridium-coated silicon are noticed at small incident angles <1.3°. When a geometrical shadowing effect due to occultation by a ridge existing on the sidewalls is taken into account, the observed reflectivity becomes well represented by the modified theoretical curve. An estimated surface micro roughness of ∼1  nm rms is consistent with atomic force microscope measurements of the sidewalls.

  14. Etching radical controlled gas chopped deep reactive ion etching

    DOEpatents

    Olynick, Deidre; Rangelow, Ivo; Chao, Weilun

    2013-10-01

    A method for silicon micromachining techniques based on high aspect ratio reactive ion etching with gas chopping has been developed capable of producing essentially scallop-free, smooth, sidewall surfaces. The method uses precisely controlled, alternated (or chopped) gas flow of the etching and deposition gas precursors to produce a controllable sidewall passivation capable of high anisotropy. The dynamic control of sidewall passivation is achieved by carefully controlling fluorine radical presence with moderator gasses, such as CH.sub.4 and controlling the passivation rate and stoichiometry using a CF.sub.2 source. In this manner, sidewall polymer deposition thicknesses are very well controlled, reducing sidewall ripples to very small levels. By combining inductively coupled plasmas with controlled fluorocarbon chemistry, good control of vertical structures with very low sidewall roughness may be produced. Results show silicon features with an aspect ratio of 20:1 for 10 nm features with applicability to nano-applications in the sub-50 nm regime. By comparison, previous traditional gas chopping techniques have produced rippled or scalloped sidewalls in a range of 50 to 100 nm roughness.

  15. Synthesis and characterization of porous silicon gas sensors

    NASA Astrophysics Data System (ADS)

    abbas, Roaa A.; Alwan, Alwan M.; Abdulhamied, Zainab T.

    2018-05-01

    In this work, photo-electrochemical etching process of n-type Silicon of resistivity(10 Ω.cm) and (100) orientation, using two illumination sources IR and violet wavelength in HF acid have been used to produce PSi gas detection device. The fabrication process was carried out at a fixed etching current density of 25mA/cm2 and at different etching time (5, 10, 15 and 20) min and (8, 16, 24, and 30) min. Two configurations of gas sensor configuration planer and sandwich have been made and investigated. The morphological properties have been studied using SEM,the FTIR measurement show that the (Si-Hx) and (Si-O-Si) absorption peak were increases with increasing etching time,and Photoluminescence properties of PSi layer show decrease in the peak of PL peak toward the violet shift. The gas detection process is made on the CO2 gas at different operating temperature and fixed gas concentration. In the planner structure, the gas sensing was measured through, the change in the resistance readout as a function to the exposure time, while for sandwich structure J-V characteristic have been made to determine the sensitivity.

  16. Method for improving the stability of amorphous silicon

    DOEpatents

    Branz, Howard M.

    2004-03-30

    A method of producing a metastable degradation resistant amorphous hydrogenated silicon film is provided, which comprises the steps of growing a hydrogenated amorphous silicon film, the film having an exposed surface, illuminating the surface using an essentially blue or ultraviolet light to form high densities of a light induced defect near the surface, and etching the surface to remove the defect.

  17. Surface morphology evolution during plasma etching of silicon: roughening, smoothing and ripple formation

    NASA Astrophysics Data System (ADS)

    Ono, Kouichi; Nakazaki, Nobuya; Tsuda, Hirotaka; Takao, Yoshinori; Eriguchi, Koji

    2017-10-01

    Atomic- or nanometer-scale roughness on feature surfaces has become an important issue to be resolved in the fabrication of nanoscale devices in industry. Moreover, in some cases, smoothing of initially rough surfaces is required for planarization of film surfaces, and controlled surface roughening is required for maskless fabrication of organized nanostructures on surfaces. An understanding, under what conditions plasma etching results in surface roughening and/or smoothing and what are the mechanisms concerned, is of great technological as well as fundamental interest. In this article, we review recent developments in the experimental and numerical study of the formation and evolution of surface roughness (or surface morphology evolution such as roughening, smoothing, and ripple formation) during plasma etching of Si, with emphasis being placed on a deeper understanding of the mechanisms or plasma-surface interactions that are responsible for. Starting with an overview of the experimental and theoretical/numerical aspects concerned, selected relevant mechanisms are illustrated and discussed primarily on the basis of systematic/mechanistic studies of Si etching in Cl-based plasmas, including noise (or stochastic roughening), geometrical shadowing, surface reemission of etchants, micromasking by etch inhibitors, and ion scattering/chanelling. A comparison of experiments (etching and plasma diagnostics) and numerical simulations (Monte Carlo and classical molecular dynamics) indicates a crucial role of the ion scattering or reflection from microscopically roughened feature surfaces on incidence in the evolution of surface roughness (and ripples) during plasma etching; in effect, the smoothing/non-roughening condition is characterized by reduced effects of the ion reflection, and the roughening-smoothing transition results from reduced ion reflections caused by a change in the predominant ion flux due to that in plasma conditions. Smoothing of initially rough surfaces as well as non-roughening of initially planar surfaces during etching (normal ion incidence) and formation of surface ripples by plasma etching (off-normal ion incidence) are also presented and discussed in this context.

  18. Design and fabrication of MEMS devices using the integration of MUMPs, trench-refilled molding, DRIE and bulk silicon etching processes

    NASA Astrophysics Data System (ADS)

    Wu, Mingching; Fang, Weileun

    2005-03-01

    This work integrates multi-depth DRIE etching, trench-refilled molding, two poly-Si layers MUMPs and bulk releasing to improve the variety and performance of MEMS devices. In summary, the present fabrication process, named MOSBE II, has three merits. First, this process can monolithically fabricate and integrate poly-Si thin-film structures with different thicknesses and stiffnesses, such as the flexible spring and the stiff mirror plate. Second, multi-depth structures, such as vertical comb electrodes, are available from the DRIE processes. Third, a cavity under the micromachined device is provided by the bulk silicon etching process, so that a large out-of-plane motion is allowed. In application, an optical scanner driven by the self-aligned vertical comb actuator was demonstrated. The poly-Si micromachined components fabricated by MOSBE II can further integrate with the MUMPs devices to establish a more powerful MOEMS platform.

  19. Miniature all-silica optical fiber pressure sensor with an ultrathin uniform diaphragm.

    PubMed

    Wang, Wenhui; Wu, Nan; Tian, Ye; Niezrecki, Christopher; Wang, Xingwei

    2010-04-26

    This paper presents an all-silica miniature optical fiber pressure/acoustic sensor based on the Fabry-Perot (FP) interferometric principle. The endface of the etched optical fiber tip and silica thin diaphragm on it form the FP structure. The uniform and thin silica diaphragm was fabricated by etching away the silicon substrate from a commercial silicon wafer that has a thermal oxide layer. The thin film was directly thermally bonded to the endface of the optical fiber thus creating the Fabry-Perot cavity. Thin films with a thickness from 1microm to 3microm have been bonded successfully. The sensor shows good linearity and hysteresis during measurement. A sensor with 0.75 microm-thick diaphragm thinned by post silica etching was demonstrated to have a sensitivity of 11 nm/kPa. The new sensor has great potential to be used as a non-intrusive pressure sensor in a variety of sensing applications.

  20. Improvement in current density of nano- and micro-structured Si solar cells by cost-effective elastomeric stamp process

    NASA Astrophysics Data System (ADS)

    Jeon, Kiseok; Jee, Hongsub; Lim, Sangwoo; Park, Min Joon; Jeong, Chaehwan

    2018-03-01

    Effective incident light should be controlled for improving the current density of solar cells by employing nano- and micro-structures on silicon surface. The elastomeric stamp process, which is more cost effective and simpler than conventional photolithography, was proposed for the fabrication of nano- and micro-structures. Polydimethylsiloxane (PDMS) was poured on a mother pattern with a diameter of 6 μm and a spacing of 2 μm; then, curing was performed to create a PDMS mold. The regular micropattern was stamped on a low-viscosity resin-coated silicon surface, followed by the simple reactive ion etching process. Nano-structures were formed using the Ag-based electroless etching process. As etching time was increased to 6 min, reflectance decreased to 4.53% and current density improved from 22.35 to 34.72 mA/cm2.

  1. Fabrication of lithographically defined optical coupling facets for silicon-on-insulator waveguides by inductively coupled plasma etching

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yap, K.P.; Lamontagne, B.; Delage, A.

    2006-05-15

    We present a technique to lithographically define and fabricate all required optical facets on a silicon-on-insulator photonic integrated circuit by an inductively coupled plasma etch process. This technique offers 1 {mu}m positioning accuracy of the facets at any location within the chip and eliminates the need of polishing. Facet fabrication consists of two separate steps to ensure sidewall verticality and minimize attack on the end surfaces of the waveguides. Protection of the waveguides by a thermally evaporated aluminum layer before the 40-70 {mu}m deep optical facet etching has been proven essential in assuring the facet smoothness and integrity. Both scanningmore » electron microscopy analysis and optical measurement results show that the quality of the facets prepared by this technique is comparable to the conventional facets prepared by polishing.« less

  2. Fabrication of high aspect ratio TiO{sub 2} and Al{sub 2}O{sub 3} nanogratings by atomic layer deposition

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Shkondin, Evgeniy, E-mail: eves@fotonik.dtu.dk; Takayama, Osamu; Lavrinenko, Andrei V.

    The authors report on the fabrication of TiO{sub 2} and Al{sub 2}O{sub 3} nanostructured gratings with an aspect ratio of up to 50. The gratings were made by a combination of atomic layer deposition (ALD) and dry etch techniques. The workflow included fabrication of a Si template using deep reactive ion etching followed by ALD of TiO{sub 2} or Al{sub 2}O{sub 3}. Then, the template was etched away using SF{sub 6} in an inductively coupled plasma tool, which resulted in the formation of isolated ALD coatings, thereby achieving high aspect ratio grating structures. SF{sub 6} plasma removes silicon selectively withoutmore » any observable influence on TiO{sub 2} or Al{sub 2}O{sub 3}, thus revealing high selectivity throughout the fabrication. Scanning electron microscopy was used to analyze every fabrication step. Due to nonreleased stress in the ALD coatings, the top parts of the gratings were observed to bend inward as the Si template was removed, thus resulting in a gradual change in the pitch value of the structures. The pitch on top of the gratings is 400 nm, and it gradually reduces to 200 nm at the bottom. The form of the bending can be reshaped by Ar{sup +} ion beam etching. The chemical purity of the ALD grown materials was analyzed by x-ray photoelectron spectroscopy. The approach presented opens the possibility to fabricate high quality optical metamaterials and functional nanostructures.« less

  3. a-Si:H/SiNW shell/core for SiNW solar cell applications

    PubMed Central

    2013-01-01

    Vertically aligned silicon nanowires have been synthesized by the chemical etching of silicon wafers. The influence of a hydrogenated amorphous silicon (a-Si:H) layer (shell) on top of a silicon nanowire (SiNW) solar cell has been investigated. The optical properties of a-Si:H/SiNWs and SiNWs are examined in terms of optical reflection and absorption properties. In the presence of the a-Si:H shell, 5.2% reflection ratio in the spectral range (250 to 1,000 nm) is achieved with a superior absorption property with an average over 87% of the incident light. In addition, the characteristics of the solar cell have been significantly improved, which exhibits higher open-circuit voltage, short-circuit current, and efficiency by more than 15%, 12%, and 37%, respectively, compared with planar SiNW solar cells. Based on the current–voltage measurements and morphology results, we show that the a-Si:H shell can passivate the defects generated by wet etching processes. PMID:24195734

  4. Structures Self-Assembled Through Directional Solidification

    NASA Technical Reports Server (NTRS)

    Dynys, Frederick W.; Sayir, Ali

    2005-01-01

    Nanotechnology has created a demand for new fabrication methods with an emphasis on simple, low-cost techniques. Directional solidification of eutectics (DSE) is an unconventional approach in comparison to low-temperature biomimetic approaches. A technical challenge for DSE is producing microstructural architectures on the nanometer scale. In both processes, the driving force is the minimization of Gibb's free energy. Selfassembly by biomimetic approaches depends on weak interaction forces between organic molecules to define the architectural structure. The architectural structure for solidification depends on strong chemical bonding between atoms. Constituents partition into atomic-level arrangements at the liquid-solid interface to form polyphase structures, and this atomic-level arrangement at the liquid-solid interface is controlled by atomic diffusion and total undercooling due to composition (diffusion), kinetics, and curvature of the boundary phases. Judicious selection of the materials system and control of the total undercooling are the keys to producing structures on the nanometer scale. The silicon-titanium silicide (Si-TiSi2) eutectic forms a rod structure under isothermal cooling conditions. At the NASA Glenn Research Center, directional solidification was employed along with a thermal gradient to promote uniform rods oriented with the thermal gradient. The preceding photomicrograph shows the typical transverse microstructure of a solidified Si-TiSi2 eutectic composition. The dark and light gray regions are Si and TiSi2, respectively. Preferred rod orientation along the thermal gradient was poor. The ordered TiSi2 rods have a narrow distribution in diameter of 2 to 3 m, as shown. The rod diameter showed a weak dependence on process conditions. Anisotropic etch behavior between different phases provides the opportunity to fabricate structures with high aspect ratios. The photomicrographs show the resulting microstructure after a wet chemical etch and a dry plasma etch. The wet chemical etches the silicon away, exposing the TiSi2 rods, whereas plasma etching preferentially etches the Si-TiSi2 interface to form a crater. The porous architectures are applicable to fabricating microdevices or creating templates for part fabrication. The porous rod structure can serve as a platform for fabricating microplasma devices for propulsion or microheat exchangers and for fabricating microfilters for miniatured chemical reactors. Although more work is required, self-assembly from DSE can have a role in microdevice fabrication.

  5. Optimization of KOH etching parameters for quantitative defect recognition in n- and p-type doped SiC

    NASA Astrophysics Data System (ADS)

    Sakwe, S. A.; Müller, R.; Wellmann, P. J.

    2006-04-01

    We have developed a KOH-based defect etching procedure for silicon carbide (SiC), which comprises in situ temperature measurement and control of melt composition. As benefit for the first time reproducible etching conditions were established (calibration plot, etching rate versus temperature and time); the etching procedure is time independent, i.e. no altering in KOH melt composition takes place, and absolute melt temperature values can be set. The paper describes this advanced KOH etching furnace, including the development of a new temperature sensor resistant to molten KOH. We present updated, absolute KOH etching parameters of n-type SiC and new absolute KOH etching parameters for low and highly p-type doped SiC, which are used for quantitative defect analysis. As best defect etching recipes we found T=530 °C/5 min (activation energy: 16.4 kcal/mol) and T=500 °C/5 min (activation energy: 13.5 kcal/mol) for n-type and p-type SiC, respectively.

  6. Silicon insulator-based dielectrophoresis devices for minimized heating effects.

    PubMed

    Zellner, Phillip; Agah, Masoud

    2012-08-01

    Concentration of biological specimens that are extremely dilute in a solution is of paramount importance for their detection. Microfluidic chips based on insulator-based DEP (iDEP) have been used to selectively concentrate bacteria and viruses. iDEP biochips are currently fabricated with glass or polymer substrates to allow for high electric fields within the channels. Joule heating is a well-known problem in these substrates and can lead to decreased throughput and even device failure. In this work, we present, for the first time, highly efficient trapping and separation of particles in DC iDEP devices that are fabricated on silicon using a single-etch-step three-dimensional microfabrication process with greatly improved heat dissipation properties. Fabrication in silicon allows for greater heat dissipation for identical geometries and operating conditions. The 3D fabrication allows for higher performance at lower applied potentials. Thermal measurements were performed on both the presented silicon chips and previously published PDMS devices comprised of microposts. Trapping and separation of 1 and 2 μm polystyrene particles was demonstrated. These results demonstrate the feasibility of high-performance silicon iDEP devices for the next generation of sorting and concentration microsystems. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. Micromachined electrical cauterizer

    DOEpatents

    Lee, Abraham P.; Krulevitch, Peter A.; Northrup, M. Allen

    1999-01-01

    A micromachined electrical cauterizer. Microstructures are combined with microelectrodes for highly localized electro cauterization. Using boron etch stops and surface micromachining, microneedles with very smooth surfaces are made. Micromachining also allows for precision placement of electrodes by photolithography with micron sized gaps to allow for concentrated electric fields. A microcauterizer is fabricated by bulk etching silicon to form knife edges, then parallelly placed microelectrodes with gaps as small as 5 .mu.m are patterned and aligned adjacent the knife edges to provide homeostasis while cutting tissue. While most of the microelectrode lines are electrically insulated from the atmosphere by depositing and patterning silicon dioxide on the electric feedthrough portions, a window is opened in the silicon dioxide to expose the parallel microelectrode portion. This helps reduce power loss and assist in focusing the power locally for more efficient and safer procedures.

  8. Micromachined electrical cauterizer

    DOEpatents

    Lee, A.P.; Krulevitch, P.A.; Northrup, M.A.

    1999-08-31

    A micromachined electrical cauterizer is disclosed. Microstructures are combined with microelectrodes for highly localized electro cauterization. Using boron etch stops and surface micromachining, microneedles with very smooth surfaces are made. Micromachining also allows for precision placement of electrodes by photolithography with micron sized gaps to allow for concentrated electric fields. A microcauterizer is fabricated by bulk etching silicon to form knife edges, then parallelly placed microelectrodes with gaps as small as 5 {mu}m are patterned and aligned adjacent the knife edges to provide homeostasis while cutting tissue. While most of the microelectrode lines are electrically insulated from the atmosphere by depositing and patterning silicon dioxide on the electric feedthrough portions, a window is opened in the silicon dioxide to expose the parallel microelectrode portion. This helps reduce power loss and assist in focusing the power locally for more efficient and safer procedures. 7 figs.

  9. Effect of etching time on morphological, optical, and electronic properties of silicon nanowires

    PubMed Central

    2012-01-01

    Owing to their interesting electronic, mechanical, optical, and transport properties, silicon nanowires (SiNWs) have attracted much attention, giving opportunities to several potential applications in nanoscale electronic, optoelectronic devices, and silicon solar cells. For photovoltaic application, a superficial film of SiNWs could be used as an efficient antireflection coating. In this work we investigate the morphological, optical, and electronic properties of SiNWs fabricated at different etching times. Characterizations of the formed SiNWs films were performed using a scanning electron microscope, ultraviolet–visible-near-infrared spectroscopy, and light-beam-induced-current technique. The latter technique was used to determine the effective diffusion length in SiNWs films. From these investigations, we deduce that the homogeneity of the SiNWs film plays a key role on the electronic properties. PMID:22799265

  10. HARM processing techniques for MEMS and MOEMS devices using bonded SOI substrates and DRIE

    NASA Astrophysics Data System (ADS)

    Gormley, Colin; Boyle, Anne; Srigengan, Viji; Blackstone, Scott C.

    2000-08-01

    Silicon-on-Insulator (SOI) MEMS devices (1) are rapidly gaining popularity in realizing numerous solutions for MEMS, especially in the optical and inertia application fields. BCO recently developed a DRIE trench etch, utilizing the Bosch process, and refill process for high voltage dielectric isolation integrated circuits on thick SOI substrates. In this paper we present our most recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilized to develop optical router and filter products for fiber optics telecommunications and high precision accelerometers.

  11. Large-aperture focusing of x rays with micropore optics using dry etching of silicon wafers.

    PubMed

    Ezoe, Yuichiro; Moriyama, Teppei; Ogawa, Tomohiro; Kakiuchi, Takuya; Mitsuishi, Ikuyuki; Mitsuda, Kazuhisa; Aoki, Tatsuhiko; Morishita, Kohei; Nakajima, Kazuo

    2012-03-01

    Large-aperture focusing of Al K(α) 1.49 keV x-ray photons using micropore optics made from a dry-etched 4 in. (100 mm) silicon wafer is demonstrated. Sidewalls of the micropores are smoothed with high-temperature annealing to work as x-ray mirrors. The wafer is bent to a spherical shape to collect parallel x rays into a focus. Our result supports that this new type of optics allows for the manufacturing of ultralight-weight and high-performance x-ray imaging optics with large apertures at low cost. © 2012 Optical Society of America

  12. Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

    NASA Astrophysics Data System (ADS)

    Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

    As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  13. Elastic Distribution of Microshutters, Measurements Obtainable on James Web Space Telescope

    NASA Technical Reports Server (NTRS)

    Kletetschka, Gunther; King, Todd; Mikula, Vilem

    2008-01-01

    Spectrographic astronomy measurements in the near-infrared region will be done by functional two-dimensional microshutter arrays that are being fabricated at the NASA Goddard Space Flight Center for the James Webb Space Telescope (JWST). These micro-shutter arrays will represent the first mission-critical MEMS devices to be flown in space. JWST will use microshutter arrays to select focal plane object. 2-D programmable aperture masks of more than 200,000 elements select such space object. The use of silicon wafer material promises high efficiency and high contrast. Microshutter operation temperature is around 35K. Microshutter arrays are fabricated as close-packed silicon nitride membranes with a unit cell size of 105 x 204 micrometers. A layer of magnetic material is deposited onto each shutter. Individual shutters are equipped with a torsion flexure. Reactive ion etching (RIE) releases the shutters so they can open up to 90 degrees using the torsion flexure. Shutter rotation is initiated into a silicon support structure via an external magnetic field. Two electrically independent aluminum electrodes are deposited, one onto each shutter and another onto the support structure side-wall, permitting electrostatic latching and 2-D addressing to hold specific shutters open via external electronics.

  14. Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Schwank, James R.; Fleetwood, Daniel M.; Shaneyfelt, Marty R.; Winokur, Peter S.; Devine, Roderick A. B.

    1998-01-01

    A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.

  15. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    NASA Astrophysics Data System (ADS)

    Hussain, Muhammad M.; Rojas, Jhonathan P.; Torres Sevilla, Galo A.

    2013-05-01

    Today's information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor - heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon - industry's darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%).

  16. A comparison of etched-geometry and overgrown silicon permeable base transistors by two-dimensional numerical simulations

    NASA Astrophysics Data System (ADS)

    Vojak, B. A.; Alley, G. D.

    1983-08-01

    Two-dimensional numerical simulations are used to compare etched geometry and overgrown Si permeable base transistors (PTBs), considering both the etched collector and etched emitter biasing conditions made possible by the asymmetry of the etched structure. In PTB devices, the two-dimensional nature of the depletion region near the Schottky contact base grating results in a smaller electron barrier and, therefore, a larger collector current in the etched than in the overgrown structure. The parasitic feedback effects which result at high base-to-emitter bias levels lead to a deviation from the square-law behavior found in the collector characteristics of the overgrown PBT. These structures also have lower device capacitances and smaller transconductances at high base-to-emitter voltages. As a result, overgrown and etched structures have comparable predicted maximum values of the small signal unity short-circuit current gain frequency and maximum oscillation frequency.

  17. Physicochemical properties of crystalline silica dusts and their possible implication in various biological responses.

    PubMed

    Fubini, B; Bolis, V; Cavenago, A; Volante, M

    1995-01-01

    The effect of grinding, heating, and etching was investigated on polymorphs of silicon dioxide exhibiting different biological responses. Diatomaceous earths were converted into cristobalite at 1000 degrees C. Dusts obtained by grinding crystalline minerals exhibited different micromorphology and a propensity to originate surface radicals which decrease in the sequence cristobalite --> quartz --> coesite --> stishovite. The production of surface radicals was suppressed by grinding in the presence of water. Thermal treatments selectively quenched the radicals and decreased surface hydrophilicity. Quartz treated with aluminum lactate exhibited higher surface acidity when compared with pure quartz, with a reduction in fibrogenicity. Etching by hydrofluoric acid smoothed the particles with loss of specific surface. Adsorption of water on three cristobalite dusts of different origin (ground mineral, ex-diatomite, heated quartz) indicated a loss in heated quartz (1300 degrees C) that was relatable to the corresponding reduction in fibrogenicity.

  18. Wet-chemical systems and methods for producing black silicon substrates

    DOEpatents

    Yost, Vernon; Yuan, Hao-Chih; Page, Matthew

    2015-05-19

    A wet-chemical method of producing a black silicon substrate. The method comprising soaking single crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution. The substrate is combined with an etchant solution that forms a uniform noble metal nanoparticle induced Black Etch of the silicon wafer, resulting in a nanoparticle that is kinetically stabilized. The method comprising combining with an etchant solution having equal volumes acetonitrile/acetic acid:hydrofluoric acid:hydrogen peroxide.

  19. Ultracompact and high efficient silicon-based polarization splitter-rotator using a partially-etched subwavelength grating coupler

    PubMed Central

    Xu, Yin; Xiao, Jinbiao

    2016-01-01

    On-chip polarization manipulation is pivotal for silicon-on-insulator material platform to realize polarization-transparent circuits and polarization-division-multiplexing transmissions, where polarization splitters and rotators are fundamental components. In this work, we propose an ultracompact and high efficient silicon-based polarization splitter-rotator (PSR) using a partially-etched subwavelength grating (SWG) coupler. The proposed PSR consists of a taper-integrated SWG coupler combined with a partially-etched waveguide between the input and output strip waveguides to make the input transverse-electric (TE) mode couple and convert to the output transverse-magnetic (TM) mode at the cross port while the input TM mode confine well in the strip waveguide during propagation and directly output from the bar port with nearly neglected coupling. Moreover, to better separate input polarizations, an additional tapered waveguide extended from the partially-etched waveguide is also added. From results, an ultracompact PSR of only 8.2 μm in length is achieved, which is so far the reported shortest one. The polarization conversion loss and efficiency are 0.12 dB and 98.52%, respectively, together with the crosstalk and reflection loss of −31.41/−22.43 dB and −34.74/−33.13 dB for input TE/TM mode at wavelength of 1.55 μm. These attributes make the present device suitable for constructing on-chip compact photonic integrated circuits with polarization-independence. PMID:27306112

  20. Rapid prototyping of 2D glass microfluidic devices based on femtosecond laser assisted selective etching process

    NASA Astrophysics Data System (ADS)

    Kim, Sung-Il; Kim, Jeongtae; Koo, Chiwan; Joung, Yeun-Ho; Choi, Jiyeon

    2018-02-01

    Microfluidics technology which deals with small liquid samples and reagents within micro-scale channels has been widely applied in various aspects of biological, chemical, and life-scientific research. For fabricating microfluidic devices, a silicon-based polymer, PDMS (Polydimethylsiloxane), is widely used in soft lithography, but it has several drawbacks for microfluidic applications. Glass has many advantages over PDMS due to its excellent optical, chemical, and mechanical properties. However, difficulties in fabrication of glass microfluidic devices that requires multiple skilled steps such as MEMS technology taking several hours to days, impedes broad application of glass based devices. Here, we demonstrate a rapid and optical prototyping of a glass microfluidic device by using femtosecond laser assisted selective etching (LASE) and femtosecond laser welding. A microfluidic droplet generator was fabricated as a demonstration of a microfluidic device using our proposed prototyping. The fabrication time of a single glass chip containing few centimeter long and complex-shaped microfluidic channels was drastically reduced in an hour with the proposed laser based rapid and simple glass micromachining and hermetic packaging technique.

  1. Fabrication Techniques for III-V Micro-Opto-Electro-Mechanical Systems

    DTIC Science & Technology

    2002-03-26

    Trifluoride . . . . . . . . . . . . . . . . . . . . . 2-33 ClF3 Chlorine Trifluoride . . . . . . . . . . . . . . . . . . . . . 2-33 xix Symbol Page O2 Oxygen...dimensionless) . . . . . . . . . . . . 2-36 HCl Hydrochloric Acid . . . . . . . . . . . . . . . . . . . . . . 3-16 M Molarity (moles/liter...interhalogen etch gases have been synthesized and used to etch silicon. These gases include bromine triflouride (BrF3) and chlorine trifluoride (ClF3) [27

  2. Nanoscale Ge fin etching using F- and Cl-based etchants for Ge-based multi-gate devices

    NASA Astrophysics Data System (ADS)

    Zhang, Bingxin; An, Xia; Li, Ming; Hao, Peilin; Zhang, Xing; Huang, Ru

    2018-04-01

    In this paper, nanoscale germanium (Ge) fin etching with inductively coupled plasma equipment with SF6/CHF3/Ar and Cl2/BCl3/Ar gas mixes are experimentally demonstrated. The impact of the gas ratio on etching induced Ge surface flatness, etch rate and sidewall steepness are comprehensively investigated and compared for these two kinds of etchants and the optimized gas ratio is provided. By using silicon oxide as a hard mask, nanoscale Ge fin with a flat surface and sharp sidewall is experimentally illustrated, which indicates great potential for use in nanoscale Ge-based multi-gate MOSFETs.

  3. GaN MOSFET with Boron Trichloride-Based Dry Recess Process

    NASA Astrophysics Data System (ADS)

    Jiang, Y.; Wang, Q. P.; Tamai, K.; Miyashita, T.; Motoyama, S.; Wang, D. J.; Ao, J. P.; Ohno, Y.

    2013-06-01

    The dry recessed-gate GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure using boron trichloride (BCl3) as etching gas were fabricated and characterized. Etching with different etching power was conducted. Devices with silicon tetrachloride (SiCl4) etching gas were also prepared for comparison. Field-effect mobility and interface state density were extracted from current-voltage (I-V) characteristics. GaN MOSFETs on AlGaN/GaN heterostructure with BCl3 based dry recess achieved a high maximum electron mobility of 141.5 cm2V-1s-1 and a low interface state density.

  4. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yin Yunpeng; Sawin, Herbert H.

    The impact of etching kinetics and etching chemistries on surface roughening was investigated by etching thermal silicon dioxide and low-k dielectric coral materials in C{sub 4}F{sub 8}/Ar plasma beams in an inductive coupled plasma beam reactor. The etching kinetics, especially the angular etching yield curves, were measured by changing the plasma pressure and the feed gas composition which influence the effective neutral-to-ion flux ratio during etching. At low neutral-to-ion flux ratios, the angular etching yield curves are sputteringlike, with a peak around 60 deg. -70 deg. off-normal angles; the surface at grazing ion incidence angles becomes roughened due to ionmore » scattering related ion-channeling effects. At high neutral-to-ion flux ratios, ion enhanced etching dominates and surface roughening at grazing angles is mainly caused by the local fluorocarbon deposition induced micromasking mechanism. Interestingly, the etched surfaces at grazing angles remain smooth for both films at intermediate neutral-to-ion flux ratio regime. Furthermore, the oxygen addition broadens the region over which the etching without roughening can be performed.« less

  5. Photo-EMF sensitivity of porous silicon thin layer-crystalline silicon heterojunction to ammonia adsorption.

    PubMed

    Vashpanov, Yuriy; Jung, Jae Il; Kwack, Kae Dal

    2011-01-01

    A new method of using photo-electromotive force in detecting gas and controlling sensitivity is proposed. Photo-electromotive force on the heterojunction between porous silicon thin layer and crystalline silicon wafer depends on the concentration of ammonia in the measurement chamber. A porous silicon thin layer was formed by electrochemical etching on p-type silicon wafer. A gas and light transparent electrical contact was manufactured to this porous layer. Photo-EMF sensitivity corresponding to ammonia concentration in the range from 10 ppm to 1,000 ppm can be maximized by controlling the intensity of illumination light.

  6. Silicon on insulator self-aligned transistors

    DOEpatents

    McCarthy, Anthony M.

    2003-11-18

    A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

  7. Nanotip Carpets as Antireflection Surfaces

    NASA Technical Reports Server (NTRS)

    Bae, Youngsam; Mobasser, Sohrab; Manohara, Harish; Lee, Choonsup

    2008-01-01

    Carpet-like random arrays of metal-coated silicon nanotips have been shown to be effective as antireflection surfaces. Now undergoing development for incorporation into Sun sensors that would provide guidance for robotic exploratory vehicles on Mars, nanotip carpets of this type could also have many uses on Earth as antireflection surfaces in instruments that handle or detect ultraviolet, visible, or infrared light. In the original Sun-sensor application, what is required is an array of 50-micron-diameter apertures on what is otherwise an opaque, minimally reflective surface, as needed to implement a miniature multiple-pinhole camera. The process for fabrication of an antireflection nanotip carpet for this application (see Figure 1) includes, and goes somewhat beyond, the process described in A New Process for Fabricating Random Silicon Nanotips (NPO-40123), NASA Tech Briefs, Vol. 28, No. 1 (November 2004), page 62. In the first step, which is not part of the previously reported process, photolithography is performed to deposit etch masks to define the 50-micron apertures on a silicon substrate. In the second step, which is part of the previously reported process, the non-masked silicon area between the apertures is subjected to reactive ion etching (RIE) under a special combination of conditions that results in the growth of fluorine-based compounds in randomly distributed formations, known in the art as "polymer RIE grass," that have dimensions of the order of microns. The polymer RIE grass formations serve as microscopic etch masks during the next step, in which deep reactive ion etching (DRIE) is performed. What remains after DRIE is the carpet of nano - tips, which are high-aspect-ratio peaks, the tips of which have radii of the order of nanometers. Next, the nanotip array is evaporatively coated with Cr/Au to enhance the absorption of light (more specifically, infrared light in the Sun-sensor application). The photoresist etch masks protecting the apertures are then removed by dipping the substrate into acetone. Finally, for the Sun-sensor application, the back surface of the substrate is coated with a 57-nm-thick layer of Cr for attenuation of sunlight.

  8. Method of producing buried porous silicon-geramanium layers in monocrystalline silicon lattices

    NASA Technical Reports Server (NTRS)

    Fathauer, Robert W. (Inventor); George, Thomas (Inventor); Jones, Eric W. (Inventor)

    1997-01-01

    Lattices of alternating layers of monocrystalline silicon and porous silicon-germanium have been produced. These single crystal lattices have been fabricated by epitaxial growth of Si and Si--Ge layers followed by patterning into mesa structures. The mesa structures are stain etched resulting in porosification of the Si--Ge layers with a minor amount of porosification of the monocrystalline Si layers. Thicker Si--Ge layers produced in a similar manner emitted visible light at room temperature.

  9. Electron beam enhanced surface modification for making highly resolved structures

    DOEpatents

    Pitts, John R.

    1986-01-01

    A method for forming high resolution submicron structures on a substrate is provided by direct writing with a submicron electron beam in a partial pressure of a selected gas phase characterized by the ability to dissociate under the beam into a stable gaseous leaving group and a reactant fragment that combines with the substrate material under beam energy to form at least a surface compound. Variations of the method provide semiconductor device regions on doped silicon substrates, interconnect lines between active sites, three dimensional electronic chip structures, electron beam and optical read mass storage devices that may include color differentiated data areas, and resist areas for use with selective etching techniques.

  10. Electron beam enhanced surface modification for making highly resolved structures

    DOEpatents

    Pitts, J.R.

    1984-10-10

    A method for forming high resolution submicron structures on a substrate is provided by direct writing with a submicron electron beam in a partial pressure of a selected gas phase characterized by the ability to dissociate under the beam into a stable gaseous leaving group and a reactant fragment that combines with the substrate material under beam energy to form at least a surface compound. Variations of the method provide semiconductor device regions on doped silicon substrates, interconnect lines between active sites, three dimensional electronic chip structures, electron beam and optical read mass storage devices that may include color differentiated data areas, and resist areas for use with selective etching techniques.

  11. Effect of fabrication parameters on morphological and optical properties of highly doped p-porous silicon

    NASA Astrophysics Data System (ADS)

    Zare, Maryam; Shokrollahi, Abbas; Seraji, Faramarz E.

    2011-09-01

    Porous silicon (PS) layers were fabricated by anodization of low resistive (highly doped) p-type silicon in HF/ethanol solution, by varying current density, etching time and HF concentration. Atomic force microscopy (AFM) and field emission scanning electron microscope (FESEM) analyses were used to investigate the physical properties and reflection spectrum was used to investigate the optical behavior of PS layers in different fabrication conditions. Vertically aligned mesoporous morphology is observed in fabricated films and with HF concentration higher than 20%. The dependence of porosity, layer thickness and rms roughness of the PS layer on current density, etching time and composition of electrolyte is also observed in obtained results. Correlation between reflectivity and fabrication parameters was also explored. Thermal oxidation was performed on some mesoporous layers that resulted in changes of surface roughness, mean height and reflectivity of the layers.

  12. Controlled morphology and optical properties of n-type porous silicon: effect of magnetic field and electrode-assisted LEF.

    PubMed

    Antunez, Edgar E; Campos, Jose; Basurto, Miguel A; Agarwal, Vivechana

    2014-01-01

    Fabrication of photoluminescent n-type porous silicon (nPS), using electrode-assisted lateral electric field accompanied with a perpendicular magnetic field, is reported. The results have been compared with the porous structures fabricated by means of conventional anodization and electrode-assisted lateral electric field without magnetic field. The lateral electric field (LEF) applied across the silicon substrate leads to the formation of structural gradient in terms of density, dimension, and depth of the etched pores. Apart from the pore shape tunability, the simultaneous application of LEF and magnetic field (MF) contributes to a reduction of the dimension of the pores and promotes relatively more defined pore tips as well as a decreased side-branching in the pore walls of the macroporous structure. Additionally, when using magnetic field-assisted etching, within a certain range of LEF, an enhancement of the photoluminescence (PL) response was obtained.

  13. Controlled morphology and optical properties of n-type porous silicon: effect of magnetic field and electrode-assisted LEF

    PubMed Central

    2014-01-01

    Fabrication of photoluminescent n-type porous silicon (nPS), using electrode-assisted lateral electric field accompanied with a perpendicular magnetic field, is reported. The results have been compared with the porous structures fabricated by means of conventional anodization and electrode-assisted lateral electric field without magnetic field. The lateral electric field (LEF) applied across the silicon substrate leads to the formation of structural gradient in terms of density, dimension, and depth of the etched pores. Apart from the pore shape tunability, the simultaneous application of LEF and magnetic field (MF) contributes to a reduction of the dimension of the pores and promotes relatively more defined pore tips as well as a decreased side-branching in the pore walls of the macroporous structure. Additionally, when using magnetic field-assisted etching, within a certain range of LEF, an enhancement of the photoluminescence (PL) response was obtained. PMID:25313298

  14. Atmospheric-pressure plasma jet system for silicon etching without fluorocarbon gas feed

    NASA Astrophysics Data System (ADS)

    Ohtsu, Yasunori; Nagamatsu, Kenta

    2018-01-01

    We developed an atmospheric-pressure plasma jet (APPJ) system with a tungsten rod electrode coated with C2F4 particles of approximately 0.3 µm diameter for the surface treatment of a silicon wafer. The APPJ was generated by dielectric barrier discharge with a driving frequency of 22 kHz using a He gas flow. The characteristics of the APPJ were examined under various experimental conditions. The plasma jet length increased proportionally to the electric field. It was found that the treatment area of the silicon wafer was approximately 1 mm in diameter. By atomic force microscopy analysis, minute irregularities with a maximum length of about 600 nm and part of a ring-shaped trench were observed. A Si etching rate of approximately 400 nm/min was attained at a low power of 6 W and a He flow rate of 1 L/min without introducing molecular gas including F atoms.

  15. Growing Embossed Nanostructures of Polymer Brushes on Wet-Etched Silicon Templated via Block Copolymers

    PubMed Central

    Lu, Xiaobin; Yan, Qin; Ma, Yinzhou; Guo, Xin; Xiao, Shou-Jun

    2016-01-01

    Block copolymer nanolithography has attracted enormous interest in chip technologies, such as integrated silicon chips and biochips, due to its large-scale and mass production of uniform patterns. We further modified this technology to grow embossed nanodots, nanorods, and nanofingerprints of polymer brushes on silicon from their corresponding wet-etched nanostructures covered with pendent SiHx (X = 1–3) species. Atomic force microscopy (AFM) was used to image the topomorphologies, and multiple transmission-reflection infrared spectroscopy (MTR-IR) was used to monitor the surface molecular films in each step for the sequential stepwise reactions. In addition, two layers of polymethacrylic acid (PMAA) brush nanodots were observed, which were attributed to the circumferential convergence growth and the diffusion-limited growth of the polymer brushes. The pH response of PMAA nanodots in the same region was investigated by AFM from pH 3.0 to 9.0. PMID:26841692

  16. Growing Embossed Nanostructures of Polymer Brushes on Wet-Etched Silicon Templated via Block Copolymers

    NASA Astrophysics Data System (ADS)

    Lu, Xiaobin; Yan, Qin; Ma, Yinzhou; Guo, Xin; Xiao, Shou-Jun

    2016-02-01

    Block copolymer nanolithography has attracted enormous interest in chip technologies, such as integrated silicon chips and biochips, due to its large-scale and mass production of uniform patterns. We further modified this technology to grow embossed nanodots, nanorods, and nanofingerprints of polymer brushes on silicon from their corresponding wet-etched nanostructures covered with pendent SiHx (X = 1-3) species. Atomic force microscopy (AFM) was used to image the topomorphologies, and multiple transmission-reflection infrared spectroscopy (MTR-IR) was used to monitor the surface molecular films in each step for the sequential stepwise reactions. In addition, two layers of polymethacrylic acid (PMAA) brush nanodots were observed, which were attributed to the circumferential convergence growth and the diffusion-limited growth of the polymer brushes. The pH response of PMAA nanodots in the same region was investigated by AFM from pH 3.0 to 9.0.

  17. Graphoepitaxy integration and pattern transfer of lamellar silicon-containing high-chi block copolymers

    NASA Astrophysics Data System (ADS)

    Bézard, P.; Chevalier, X.; Legrain, A.; Navarro, C.; Nicolet, C.; Fleury, G.; Cayrefourcq, I.; Tiron, R.; Zelsmann, M.

    2018-03-01

    In this work, we present our recent achievements on the integration and transfer etching of a novel silicon-containing high-χ block copolymer for lines/spaces applications. Developed carbo-silane BCPs are synthesized under industrial conditions and present periodicities as low as 14 nm. A full directed self-assembly by graphoepitaxy process is shown using standard photolithography stacks and all processes are performed on 300 mm wafer compatible tools. Specific plasma processes are developed to isolate perpendicular lamellae and sub-12 nm features are finally transferred into silicon substrates. The quality of the final BCP hard mask (CDU, LWR, LER) are also investigated. Finally, thanks to the development of dedicated neutral layers and top-coats allowing perpendicular orientations, it was possible to investigate plasma etching experiments on full-sheets at 7 nm resolution, opening the way to the integration of these polymers in chemoepitaxy stacks.

  18. Comparative evaluation of self-etching primers and phosphoric acid effectiveness on composite to enamel bond: an in vitro study.

    PubMed

    Patil, Basanagouda S; Rao, Bk Raghavendra; Sharathchandra, Sm; Hegde, Reshma; Kumar, G Vinay

    2013-09-01

    The aim of the present study was to investigate the effectiveness of the one total-etch self-priming adhesive, one two-step self-etching primer adhesive, and one 'all-in-one' self-etching adhesive system on the adhesion of a resin composite to enamel. Thirty-six freshly extracted human mandibular molars were selected for this study. A fat area about 5 mm in diameter was created on the exposed mesial surface of enamel of each tooth by moist grinding with 320, 420 and 600 grit silicon carbide paper. Twelve teeth were randomly assigned into three groups. In group 1, Adper Easy One (3M ESPE), a one step self-etching primer adhesive was applied and light curing unit for 10 seconds. In group 2, Adper SE Plus, a two-step self-etching primer with bottle A containing the aqueous primer and bottle B containing the acidic adhesive was applied and light cured for 10 seconds. Group 3 (control)-etchant 37% phosphoric acid is applied to the surface for 15 seconds and rinsed with water and air dried and adhesive (single bond 2) is applied to the surface and tube is placed and light cured for 20 seconds. Composite material (Z350) was placed in the tube and light cured for 40 seconds in all the groups. Bond strength testing was done using universal testing machine at the enamel-composite interface. The debonded enamel surface was evaluated in stereomicroscope to assess the cohesive, adhesive or mixed fracture. Data was statistically analyzed by one way analysis of variance (ANOVA). Group 1 performed least among all groups with a mean score of 19.46 MPa. Group 2 had a mean score of 25.67 MPa. Group 3 had a mean score of 27.16 MPa. Under the conditions of this in vitro study, the bond strength values of the two-step self-etching primer systems tested were similar to the total-etch. And, one step self-etching primers have lower bond strength compared to the total-etch.

  19. Optimization of hybrid organic/inorganic poly(3-hexylthiophene-2,5-diyl)/silicon solar cells

    NASA Astrophysics Data System (ADS)

    Weingarten, Martin; Sanders, Simon; Stümmler, Dominik; Pfeiffer, Pascal; Vescan, Andrei; Kalisch, Holger

    2016-04-01

    In the last years, hybrid organic/silicon solar cells have attracted great interest in photovoltaic research due to their potential to become a low-cost alternative for the conventionally used silicon pn-junction solar cells. This work is focused on hybrid solar cells based on the polymer poly(3-hexylthiophene-2,5-diyl), which was deposited on n-doped crystalline silicon via spin-coating under ambient conditions. By employing an anisotropic etching step with potassium hydroxide (KOH), the reflection losses at the silicon surface were reduced. Hereby, the short-circuit current density of the hybrid devices was increased by 31%, leading to a maximum power conversion efficiency (PCE) of 13.1% compared to a PCE of 10.7% for the devices without KOH etching. In addition, the contacts were improved by replacing gold with the more conductive silver as top grid material to reduce the contact resistance and by introducing a thin (˜0.5 nm) lithium fluoride layer between the silicon and the aluminum backside contact to improve electron collection and hole blocking. Hereby, the open-circuit voltage and the fill factor of the hybrid solar cells were further improved and devices with very high PCE up to 14.2% have been realized.

  20. Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

    DOEpatents

    Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

    1991-01-01

    A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

  1. Silicon micromachined waveguides for millimeter and submillimeter wavelengths

    NASA Technical Reports Server (NTRS)

    Yap, Markus; Tai, Yu-Chong; Mcgrath, William R.; Walker, Christopher

    1992-01-01

    The majority of radio receivers, transmitters, and components operating at millimeter and submillimeter wavelengths utilize rectangular waveguides in some form. However, conventional machining techniques for waveguides operating above a few hundred GHz are complicated and costly. This paper reports on the development of silicon micromachining techniques to create silicon-based waveguide circuits which can operate at millimeter and submillimeter wavelengths. As a first step, rectangular WR-10 waveguide structures have been fabricated from (110) silicon wafers using micromachining techniques. The waveguide is split along the broad wall. Each half is formed by first etching a channel completely through a wafer. Potassium hydroxide is used to etch smooth mirror-like vertical walls and LPCVD silicon nitride is used as a masking layer. This wafer is then bonded to another flat wafer using a polyimide bonding technique and diced into the U-shaped half wavelengths. Finally, a gold layer is applied to the waveguide walls. Insertion loss measurements show losses comparable to those of standard metal waveguides. It is suggested that active devices and planar circuits can be integrated with the waveguides, solving the traditional mounting problems. Potential applications in terahertz instrumentation technology are further discussed.

  2. Macroscale Transformation Optics Enabled by Photoelectrochemical Etching.

    PubMed

    Barth, David S; Gladden, Christopher; Salandrino, Alessandro; O'Brien, Kevin; Ye, Ziliang; Mrejen, Michael; Wang, Yuan; Zhang, Xiang

    2015-10-28

    Photoelectrochemical etching of silicon can be used to form lateral refractive index gradients for transformation optical devices. This technique allows the fabrication of macroscale devices with large refractive index gradients. Patterned porous layers can also be lifted from the substrate and transferred to other materials, creating more possibilities for novel devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Antireflective hydrophobic si subwavelength structures using thermally dewetted Ni/SiO2 nanomask patterns.

    PubMed

    Joo, Dong Hyuk; Leem, Jung Woo; Yu, Jae Su

    2011-11-01

    We report the disordered silicon (Si) subwavelength structures (SWSs), which are fabricated with the use of inductively coupled plasma (ICP) etching in SiCl4 gas using nickel/silicon dioxide (Ni/SiO2) nanopattens as the etch mask, on Si substrates by varying the etching parameters for broadband antireflective and self-cleaning surfaces. For the fabricated Si SWSs, the antireflection characteristics are experimentally investigated and a theoretical analysis is made based on the rigorous coupled-wave analysis method. The desirable dot-like Ni nanoparticles on SiO2/Si substrates are formed by the thermal dewetting process of Ni films at 900 degrees C. The truncated cone shaped Si SWS with a high average height of 790 +/- 23 nm, which is fabricated by ICP etching with 5 sccm SiCl4 at 50 W RF power with additional 200 W ICP power under 10 mTorr process pressure, exhibits a low average reflectance of approximately 5% over a wide wavelength range of 450-1050 nm. The water contact angle of 110 degrees is obtained, indicating a hydrophobic surface. The calculated reflectance results are also reasonably consistent with the experimental data.

  4. Hybrid silicon honeycomb/organic solar cells with enhanced efficiency using surface etching.

    PubMed

    Liu, Ruiyuan; Sun, Teng; Liu, Jiawei; Wu, Shan; Sun, Baoquan

    2016-06-24

    Silicon (Si) nanostructure-based photovoltaic devices are attractive for their excellent optical and electrical performance, but show lower efficiency than their planar counterparts due to the increased surface recombination associated with the high surface area and roughness. Here, we demonstrate an efficiency enhancement for hybrid nanostructured Si/polymer solar cells based on a novel Si honeycomb (SiHC) structure using a simple etching method. SiHC structures are fabricated using a combination of nanosphere lithography and plasma treatment followed by a wet chemical post-etching. SiHC has shown superior light-trapping ability in comparison with the other Si nanostructures, along with a robust structure. Anisotropic tetramethylammonium hydroxide etching not only tunes the final surface morphologies of the nanostructures, but also reduces the surface roughness leading to a lower recombination rate in the hybrid solar cells. The suppressed recombination loss, benefiting from the reduced surface-to-volume ratio and roughness, has resulted in a high open-circuit voltage of 600 mV, a short-circuit current of 31.46 mA cm(-2) due to the light-trapping ability of the SiHCs, and yields a power conversion efficiency of 12.79% without any other device structure optimization.

  5. Rotational actuator of motor based on carbon nanotubes

    DOEpatents

    Zettl, Alexander K.; Fennimore, Adam M.; Yuzvinsky, Thomas D.

    2008-11-18

    A rotational actuator/motor based on rotation of a carbon nanotube is disclosed. The carbon nanotube is provided with a rotor plate attached to an outer wall, which moves relative to an inner wall of the nanotube. After deposit of a nanotube on a silicon chip substrate, the entire structure may be fabricated by lithography using selected techniques adapted from silicon manufacturing technology. The structures to be fabricated may comprise a multiwall carbon nanotube (MWNT), two in plane stators S1, S2 and a gate stator S3 buried beneath the substrate surface. The MWNT is suspended between two anchor pads and comprises a rotator attached to an outer wall and arranged to move in response to electromagnetic inputs. The substrate is etched away to allow the rotor to freely rotate. Rotation may be either in a reciprocal or fully rotatable manner.

  6. Rotational actuator or motor based on carbon nanotubes

    DOEpatents

    Zetti, Alexander K.; Fennimore, Adam M.; Yuzvinsky, Thomas D.

    2006-05-30

    A rotational actuator/motor based on rotation of a carbon nanotube is disclosed. The carbon nanotube is provided with a rotor plate attached to an outer wall, which moves relative to an inner wall of the nanotube. After deposit of a nanotube on a silicon chip substrate, the entire structure may be fabricated by lithography using selected techniques adapted from silicon manufacturing technology. The structures to be fabricated may comprise a multiwall carbon nanotube (MWNT), two in plane stators S1, S2 and a gate stator S3 buried beneath the substrate surface. The MWNT is suspended between two anchor pads and comprises a rotator attached to an outer wall and arranged to move in response to electromagnetic inputs. The substrate is etched away to allow the rotor to freely rotate. Rotation may be either in a reciprocal or fully rotatable manner.

  7. Porous silicon photoluminescence biosensor for rapid and sensitive detection of toxins

    NASA Astrophysics Data System (ADS)

    Melnyk, Yulia; Pavlova, Karyna; Myndrul, Valerii; Viter, Roman; Smyntyna, Valentyn; Iatsunskyi, Igor

    2017-08-01

    A rapid and low cost photoluminescence (PL) immunosensor for the determination of low concentrations of Ochratoxin A(OTA) and Aflatoxine B1 (AfB1) has been developed. This biosensor was based on porous silicon (PSi) fabricated by metal-assisted chemical etching (MACE) and modified by antibodies against OTA/AfB1 (anti-OTA/anti-AfB1). Biofunctionalization method of the PSi surface by anti-OTA/ anti-AfB1 was developed. The changes of the PL intensity after interaction of the immobilized anti-OTA/anti-AfB1with OTA/AfB1 antigens were used as biosensor signal, allowing sensitive and selective detection of OTA/AfB1 antigens in BSA solution. The sensitivity of the reported optical biosensor towards OTA/AfB1 antigens is in the range from 10-3 to 102 ng/ml.

  8. Compact Submillimeter-Wave Receivers Made with Semiconductor Nano-Fabrication Technologies

    NASA Technical Reports Server (NTRS)

    Jung, C.; Thomas, B.; Lee, C.; Peralta, A.; Chattopadhyay, G.; Gill, J.; Cooper, K.; Mehdi, I.

    2011-01-01

    Advanced semiconductor nanofabrication techniques are utilized to design, fabricate and demonstrate a super-compact, low-mass (<10 grams) submillimeter-wave heterodyne front-end. RF elements such as waveguides and channels are fabricated in a silicon wafer substrate using deep-reactive ion etching (DRIE). Etched patterns with sidewalls angles controlled with 1 deg precision are reported, while maintaining a surface roughness of better than 20 nm rms for the etched structures. This approach is being developed to build compact 2-D imaging arrays in the THz frequency range.

  9. Robust graphene membranes in a silicon carbide frame.

    PubMed

    Waldmann, Daniel; Butz, Benjamin; Bauer, Sebastian; Englert, Jan M; Jobst, Johannes; Ullmann, Konrad; Fromm, Felix; Ammon, Maximilian; Enzelberger, Michael; Hirsch, Andreas; Maier, Sabine; Schmuki, Patrik; Seyller, Thomas; Spiecker, Erdmann; Weber, Heiko B

    2013-05-28

    We present a fabrication process for freely suspended membranes consisting of bi- and trilayer graphene grown on silicon carbide. The procedure, involving photoelectrochemical etching, enables the simultaneous fabrication of hundreds of arbitrarily shaped membranes with an area up to 500 μm(2) and a yield of around 90%. Micro-Raman and atomic force microscopy measurements confirm that the graphene layer withstands the electrochemical etching and show that the membranes are virtually unstrained. The process delivers membranes with a cleanliness suited for high-resolution transmission electron microscopy (HRTEM) at atomic scale. The membrane, and its frame, is very robust with respect to thermal cycling above 1000 °C as well as harsh acidic or alkaline treatment.

  10. Holographic fabrication of gratings in metal substrates

    NASA Technical Reports Server (NTRS)

    Fletcher, R. M.; Wagner, D. K.; Ballantyne, J. M.

    1982-01-01

    A program for investigating the grain enlargement resulting from the laser recrystallization of a thin gallium arsenide film on a patterned substrate, a technique known as graphoepitaxy was evaluated. More specifically, the effects of recrystallizing an uncapped gallium arsenide film using a continuous wave neodymium YAG laser operating at 1.06 microns were studied. In an effort to minimize arsenic loss from the film, the specimens were held in an arsine atmosphere during recrystallization. Two methods for fabricating patterned substrates were developed, one using reactive ion etching of a molybdenum film on both sapphire and silicon substates and another by preferential wet etching of a silicon substrate onto which a film of molybdenum was subsequently deposited.

  11. Inversion layer solar cell fabrication and evaluation. [etching on silicon films

    NASA Technical Reports Server (NTRS)

    Call, R. L.

    1974-01-01

    Inversion layer solar cells were fabricated by etching through the diffused layer on p-type silicon wafers in a comb-like contact pattern. The charge separation comes from an induced p-n junction at the surface. The inverted surface is caused by a layer of transparent material applied to the surface that either contains free positive ions or that creates donor states at the interface. Cells are increased from 3 ma I sub sc to 100 ma by application of sodium silicate. The action is unstable, however, and decays. Non-mesa contaminated oxide cells were fabricated with short circuit currents of over 100 ma measured in the sun. Cells of this type have demonstrated stability.

  12. Enhanced electrochemical etching of ion irradiated silicon by localized amorphization

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Dang, Z. Y.; Breese, M. B. H.; Lin, Y.

    2014-05-12

    A tailored distribution of ion induced defects in p-type silicon allows subsequent electrochemical anodization to be modified in various ways. Here we describe how a low level of lattice amorphization induced by ion irradiation influences anodization. First, it superposes a chemical etching effect, which is observable at high fluences as a reduced height of a micromachined component. Second, at lower fluences, it greatly enhances electrochemical anodization by allowing a hole diffusion current to flow to the exposed surface. We present an anodization model, which explains all observed effects produced by light ions such as helium and heavy ions such asmore » cesium over a wide range of fluences and irradiation geometries.« less

  13. Patterning of graphene on silicon-on-insulator waveguides through laser ablation and plasma etching

    NASA Astrophysics Data System (ADS)

    Van Erps, Jürgen; Ciuk, Tymoteusz; Pasternak, Iwona; Krajewska, Aleksandra; Strupinski, Wlodek; Van Put, Steven; Van Steenberge, Geert; Baert, Kitty; Terryn, Herman; Thienpont, Hugo; Vermeulen, Nathalie

    2016-05-01

    We present the use of femtosecond laser ablation for the removal of monolayer graphene from silicon-on-insulator (SOI) waveguides, and the use of oxygen plasma etching through a metal mask to peel off graphene from the grating couplers attached to the waveguides. Through Raman spectroscopy and atomic force microscopy, we show that the removal of graphene is successful with minimal damage to the underlying SOI waveguides. Finally, we employ both removal techniques to measure the contribution of graphene to the loss of grating-coupled graphene-covered SOI waveguides using the cut-back method. This loss contribution is measured to be 0.132 dB/μm.

  14. Ion transport by gating voltage to nanopores produced via metal-assisted chemical etching method

    NASA Astrophysics Data System (ADS)

    Van Toan, Nguyen; Inomata, Naoki; Toda, Masaya; Ono, Takahito

    2018-05-01

    In this work, we report a simple and low-cost way to create nanopores that can be employed for various applications in nanofluidics. Nano sized Ag particles in the range from 1 to 20 nm are formed on a silicon substrate with a de-wetting method. Then the silicon nanopores with an approximate 15 nm average diameter and 200 μm height are successfully produced by the metal-assisted chemical etching method. In addition, electrically driven ion transport in the nanopores is demonstrated for nanofluidic applications. Ion transport through the nanopores is observed and could be controlled by an application of a gating voltage to the nanopores.

  15. Ion transport by gating voltage to nanopores produced via metal-assisted chemical etching method.

    PubMed

    Van Toan, Nguyen; Inomata, Naoki; Toda, Masaya; Ono, Takahito

    2018-05-11

    In this work, we report a simple and low-cost way to create nanopores that can be employed for various applications in nanofluidics. Nano sized Ag particles in the range from 1 to 20 nm are formed on a silicon substrate with a de-wetting method. Then the silicon nanopores with an approximate 15 nm average diameter and 200 μm height are successfully produced by the metal-assisted chemical etching method. In addition, electrically driven ion transport in the nanopores is demonstrated for nanofluidic applications. Ion transport through the nanopores is observed and could be controlled by an application of a gating voltage to the nanopores.

  16. Nested potassium hydroxide etching and protective coatings for silicon-based microreactors

    NASA Astrophysics Data System (ADS)

    de Mas, Nuria; Schmidt, Martin A.; Jensen, Klavs F.

    2014-03-01

    We have developed a multilayer, multichannel silicon-based microreactor that uses elemental fluorine as a reagent and generates hydrogen fluoride as a byproduct. Nested potassium hydroxide etching (using silicon nitride and silicon oxide as masking materials) was developed to create a large number of channels (60 reaction channels connected to individual gas and liquid distributors) of significantly different depths (50-650 µm) with sloped walls (54.7° with respect to the (1 0 0) wafer surface) and precise control over their geometry. The wetted areas were coated with thermally grown silicon oxide and electron-beam evaporated nickel films to protect them from the corrosive fluorination environment. Up to four Pyrex layers were anodically bonded to three silicon layers in a total of six bonding steps to cap the microchannels and stack the reaction layers. The average pinhole density in as-evaporated films was 3 holes cm-2. Heating during anodic bonding (up to 350 °C for 4 min) did not significantly alter the film composition. Upon fluorine exposure, nickel films (160 nm thick) deposited on an adhesion layer of Cr (10 nm) over an oxidized silicon substrate (up to 500 nm thick SiO2) led to the formation of a nickel fluoride passivation layer. This microreactor was used to investigate direct fluorinations at room temperature over several hours without visible signs of film erosion.

  17. Novel passivation dielectrics-The boron- or phosphorus-doped hydrogenated amorphous silicon carbide films

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chang, C.Y.; Fang, Y.K.; Huang, C.F.

    1985-02-01

    Hydrogenated amorphous silicon carbide (a-SiC:H) thin films were prepared and studied in a radiofrequency glowdischarge system, using a gas mixture of SiH/sub 4/ and one of the following carbon sources: methane (CH/sub 4/), benzene (C/sub 6/H/sub 6/), toluene (C/sub 7/H/sub 8/), sigma-xylene (C/sub 8/H/sub 10/), trichloroethane (C/sub 2/H/sub 3/Cl/sub 3/), trichloroethylene (C/sub 2/HCl/sub 3/), or carbon tetrachloride (CCl/sub 4/). The effect of doping phosphorus and boron into those a-SiC:H films on chemical etching rate, electrica dc resistivity, breakdown strength, and optical refractive index have been systematically investigated. Their chemical etching properties were examined by immersing in 49% HF, buffered HF,more » 180/sup 0/C H/sub 3/PO/sub 4/ solutions, or in CF/sub 4/ + O/sub 2/ plasma. It was found that the boron-doped a-SiC:H film possesses five times slower etching rate than the undoped one, while phosphorus-doped a-SiC:H film shows about three times slower. Among those a-SiC:H films, the one obtained from a mixture of SiH/sub 4/ and benzene shows the best etch-resistant property, while the ones obtained from a mixture of SiH/sub 4/ and chlorine containing carbon sources (e.g., trichloroethylene, trichloroethane, or carbon tetrachloride) shows that they are poor in etching resistance (i.e., the etching rate is higher). By measuring dc resistivity, dielectric breakdown strength, and effective refractive index, it was found that boron- or phosphorus-doped a-SiC:H films exhibit much higher dielectric strength and resistivity, but lower etching rate, presumably because of higher density.« less

  18. Effects of silicon nanowire morphology on optical properties and hybrid solar cell performance

    NASA Astrophysics Data System (ADS)

    Syu, Hong-Jhang; Shiu, Shu-Chia; Hung, Yung-Jr; Lee, San-Liang; Lin, Ching-Fuh

    2012-10-01

    Silicon nanowire (SiNW) arrays are widespread applied on hybrid photovoltaic devices because SiNW arrays can substitute the pyramid texture and anti-reflection coating due to its strong light trapping. Also, SiNWs can be prepared through a cost-efficient process of metal-assisted chemical etching. However, though longer SiNW arrays have lower reflectance, the top of long SiNWs aggregate together to make junction synthesis difficult for SiNW/organic hybrid solar cell. To control and analyze the effect of SiNW array morphology on hybrid solar cells, here we change the metal deposition condition for metal-assisted chemical etching to obtain different SiNW array morphologies. The experiment was separated to two groups, by depositing metal, say, Ag, before etching (BE) or during etching (DE). For group BE, Ag was deposited on n-type Si (n-Si) wafers by thermal evaporation; then etched by H2O2 and HF. For group DE, n-Si was etched by Ag+ and HF directly. Ag was deposited on n-Si during etching process. Afterwards, residual Ag and SiO2 were removed by HNO3 and buffered HF, successively; then Ti and Ag were evaporated on the bottom of Si to be a cathode. Finally, SiNWs were stuck on the poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) that was spincoated on the ITO coated glass to form SiNW/organic heterojunction. The results show that group BE has reflectance lower than that in group DE in solar spectrum. However, group BE has smaller power conversion efficiency (PCE) of 8.65% and short-circuit current density (Jsc) of 24.94 mA/cm2 than group DE of PCE of 9.47% and Jsc of 26.81 mA/cm2.

  19. Polysilicon planarization and plug recess etching in a decoupled plasma source chamber using two endpoint techniques

    NASA Astrophysics Data System (ADS)

    Kaplita, George A.; Schmitz, Stefan; Ranade, Rajiv; Mathad, Gangadhara S.

    1999-09-01

    The planarization and recessing of polysilicon to form a plug are processes of increasing importance in silicon IC fabrication. While this technology has been developed and applied to DRAM technology using Trench Storage Capacitors, the need for such processes in other IC applications (i.e. polysilicon studs) has increased. Both planarization and recess processes usually have stringent requirements on etch rate, recess uniformity, and selectivity to underlying films. Additionally, both processes generally must be isotropic, yet must not expand any seams that might be present in the polysilicon fill. These processes should also be insensitive to changes in exposed silicon area (pattern factor) on the wafer. A SF6 plasma process in a polysilicon DPS (Decoupled Plasma Source) reactor has demonstrated the capability of achieving the above process requirements for both planarization and recess etch. The SF6 process in the decoupled plasma source reactor exhibited less sensitivity to pattern factor than in other types of reactors. Control of these planarization and recess processes requires two endpoint systems to work sequentially in the same recipe: one for monitoring the endpoint when blanket polysilicon (100% Si loading) is being planarized and one for monitoring the recess depth while the plug is being recessed (less than 10% Si loading). The planarization process employs an optical emission endpoint system (OES). An interferometric endpoint system (IEP), capable of monitoring lateral interference, is used for determining the recess depth. The ability of using either or both systems is required to make these plug processes manufacturable. Measuring the recess depth resulting from the recess process can be difficult, costly and time- consuming. An Atomic Force Microscope (AFM) can greatly alleviate these problems and can serve as a critical tool in the development of recess processes.

  20. High-aspect-ratio microstructures with versatile slanting angles on silicon by uniform metal-assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Li, Liyi; Zhang, Cheng; Tuan, Chia-Chi; Chen, Yun; Wong, C.-P.

    2018-05-01

    High-aspect-ratio (HAR) microstructures on silicon (Si) play key roles in photonics and electromechanical devices. However, it has been challenging to fabricate HAR microstructures with slanting profiles. Here we report successful fabrication of uniform HAR microstructures with controllable slanting angles on (1 0 0)-Si by slanted uniform metal-assisted chemical etching (SUMaCE). The trenches have width of 2 µm, aspect ratio greater than 20:1 and high geometric uniformity. The slanting angles can be adjusted between 2-70° with respect to the Si surface normal. The results support a fundamental hypothesis that under the UMaCE condition, the preferred etching direction is along the normal of the thin film catalysts, regardless of the relative orientation of the catalyst to Si substrates or the crystalline orientation of the substrates. The SUMaCE method paves the way to HAR 3D microfabrication with arbitrary slanting profiles inside Si.

  1. Fabrication and Characterization of CMOS-MEMS Magnetic Microsensors

    PubMed Central

    Hsieh, Chen-Hsuan; Dai, Ching-Liang; Yang, Ming-Zhi

    2013-01-01

    This study investigates the design and fabrication of magnetic microsensors using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process. The magnetic sensor is composed of springs and interdigitated electrodes, and it is actuated by the Lorentz force. The finite element method (FEM) software CoventorWare is adopted to simulate the displacement and capacitance of the magnetic sensor. A post-CMOS process is utilized to release the suspended structure. The post-process uses an anisotropic dry etching to etch the silicon dioxide layer and an isotropic dry etching to remove the silicon substrate. When a magnetic field is applied to the magnetic sensor, it generates a change in capacitance. A sensing circuit is employed to convert the capacitance variation of the sensor into the output voltage. The experimental results show that the output voltage of the magnetic microsensor varies from 0.05 to 1.94 V in the magnetic field range of 5–200 mT. PMID:24172287

  2. A method for determining average damage depth of sawn crystalline silicon wafers

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sopori, B.; Devayajanam, S.; Basnyat, P.

    2016-04-01

    The depth of surface damage (or simply, damage) in crystalline silicon wafers, caused by wire sawing of ingots, is determined by performing a series of minority carrier lifetime (MCLT) measurements. Samples are sequentially etched to remove thin layers from each surface and MCLT is measured after each etch step. The thickness-removed (..delta..t) at which the lifetime reaches a peak value corresponds to the damage depth. This technique also allows the damage to be quantified in terms of effective surface recombination velocity (Seff). To accomplish this, the MCLT data are converted into an Seff vs ..delta..t plot, which represents a quantitativemore » distribution of the degree of damage within the surface layer. We describe a wafer preparation procedure to attain reproducible etching and MCLT measurement results. We also describe important characteristics of an etchant used for controllably removing thin layers from the wafer surfaces. Some typical results showing changes in the MCLT vs ..delta..t plots for different cutting parameters are given.« less

  3. Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

    NASA Astrophysics Data System (ADS)

    Qi, Yangyang; Wang, Zhen; Zhang, Mingliang; Wang, Xiaodong; Ji, An; Yang, Fuhua

    2014-03-01

    The electron transport characteristics of silicon nanowires (SiNWs) fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V) characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

  4. Deep silicon etching: current capabilities and future directions

    NASA Astrophysics Data System (ADS)

    Westerman, Russ; Martinez, Linnell; Pays-Volard, David; Mackenzie, Ken; Lazerand, Thierry

    2014-03-01

    Deep Reactive Ion Etching (DRIE) has revolutionized a wide variety of MEMS applications since its inception nearly two decades ago. The DRIE technology has been largely responsible for allowing lab scale technology demonstrations to become manufacturable and profitable consumer products. As applications which utilize DRIE technologies continue to expand and evolve, they continue to spawn a range of new requirements and open up exciting opportunities for advancement of DRIE. This paper will examine a number of current and emerging DRIE applications including nanotechnology, and DRIE related packaging technologies such as Through Silicon Via (TSV) and plasma dicing. The paper will discuss a number of technical challenges and solutions associated with these applications including: feature profile control at high aspect ratios, causes and elimination of feature tilt/skew, process options for fragile device structures, and problems associated with through substrate etching. The paper will close with a short discussion around the challenges of implementing DRIE in production environments as well as looking at potentially disruptive enhancements / substitutions for DRIE.

  5. Edge morphology evolution of graphene domains during chemical vapor deposition cooling revealed through hydrogen etching.

    PubMed

    Zhang, Haoran; Zhang, Yanhui; Zhang, Yaqian; Chen, Zhiying; Sui, Yanping; Ge, Xiaoming; Yu, Guanghui; Jin, Zhi; Liu, Xinyu

    2016-02-21

    During cooling, considerable changes such as wrinkle formation and edge passivation occur in graphene synthesized on the Cu substrate. Wrinkle formation is caused by the difference in the thermal expansion coefficients of graphene and its substrate. This work emphasizes the cooling-induced edge passivation. The graphene-edge passivation can limit the regrowth of graphene at the domain edge. Our work shows that silicon-containing particles tend to accumulate at the graphene edge, and the formation of these particles is related to cooling. Furthermore, a clear curvature can be observed at the graphene edge on the Cu substrate, indicating the sinking of the graphene edge into the Cu substrate. Both the sinking of the graphene edge and the accumulation of silicon-containing particles are responsible for edge passivation. In addition, two kinds of graphene edge morphologies are observed after etching, which were explained by different etching mechanisms that illustrate the changes of the graphene edge during cooling.

  6. Optical and electrical properties of porous silicon layer formed on the textured surface by electrochemical etching

    NASA Astrophysics Data System (ADS)

    Weiying, Ou; Lei, Zhao; Hongwei, Diao; Jun, Zhang; Wenjing, Wang

    2011-05-01

    Porous silicon (PS) layers were formed on textured crystalline silicon by electrochemical etching in HF-based electrolyte. Optical and electrical properties of the TMAH textured surfaces with PS formation are studied. Moreover, the influences of the initial structures and the anodizing time on the optical and electrical properties of the surfaces after PS formation are investigated. The results show that the TMAH textured surfaces with PS formation present a dramatic decrease in reflectance. The longer the anodizing time is, the lower the reflectance. Moreover, an initial surface with bigger pyramids achieved lower reflectance in a short wavelength range. A minimum reflectance of 3.86% at 460 nm is achieved for a short anodizing time of 2 min. Furthermore, the reflectance spectrum of the sample, which was etched in 3 vol.% TMAH for 25 min and then anodized for 20 min, is extremely flat and lies between 3.67% and 6.15% in the wavelength range from 400 to 1040 nm. In addition, for a short anodizing time, a slight increase in the effective carrier lifetime is observed. Our results indicate that PS layers formed on a TMAH textured surface for a short anodization treatment can be used as both broadband antireflection coatings and passivation layers for the application in solar cells.

  7. Characterization of a New Organosilicon Photoresist

    NASA Astrophysics Data System (ADS)

    Cunningham, Wells C.

    1987-08-01

    For a number of years, there has lo'ep. great interest in organometallic based photoresists for use as the top layer in multilevel resist schemes.-' In general, bilevel approaches to lithography are forced upon the industry as a means of planarizing topography for a subsequent patterning step. This pattern is initially defined by exposure and development of a thin top layer (0.3 to 0.5μm) over the thicker bottom layer (1.0 to 2.0μm). (See Figure 1). In a conventional bilevel approach, the chosen bottom layer is photoactive at a wavelength for which the top is relatively opaque. The top level acts as a portable conformable mask (PCM) for image transfer through the bottom layer after its exposure and wet development. By using a silicon containing photoresist on the top image transfer may be accomplished using an oxygen plasma instead of a second exposure and development. The PCM in this case acts as an etch mask by forming a silicon dioxide crust in the plasma which slows the etch rate of the top versus the bottom layer. A generic curve of etch rate of a photoresist versus percent silicon by weight is shown in Figure 2. The shape is similar over a wide range of organosilicon polymers.5,6

  8. Technological processes of grating light valve as diffractive spatial light modulator in laser phototypesetting system

    NASA Astrophysics Data System (ADS)

    Zhang, Wei; Geng, Yu; Hou, Changlun; Yang, Guoguang; Bai, Jian

    2008-11-01

    Grating Light Valve (GLV) is a kind of optics device based on Micro-Opto-Electro-Mechanical System (MOEMS) technology, utilizing diffraction principle to switch, attenuate and modulate light. In this paper, traditional GLV device's structure and its working principle are illuminated, and a kind of modified GLV structure is presented, with details introduction of the fabrication technology. The GLV structure includes single crystal silicon substrate, silicon dioxide isolating layer, aluminum layer of fixed ribbons and silicon nitride of movable ribbons. In the fabrication, lots of techniques are adopted, such as low-pressure chemical vapor deposition (LPCVD), photolithography, etching and evaporation. During the fabrication processes, Photolithography is a fundamental and fatal technology, which determines etching result and GLV quality. Some methods are proposed through repeated experiments, to improve etching result greatly and guide the practical application. This kind of GLV device can be made both small and inexpensively, and has been tested to show proper range of actuation under DC bias, with good performance. The GLV device also has merits such as low cost, simple technology, high fill ratio and low driving voltage. It can properly be well used and match the demands of high light power needed in laser phototypesetting system, as a high-speed, high-resolution light modulator.

  9. Thin silicon-solar cell fabrication

    NASA Technical Reports Server (NTRS)

    Lindmayer, J.

    1979-01-01

    Flexible silicon slices of uniform thicknesses are fabricated by etching in sodium hydroxide solution. Maintaining uniform thickness across slices during process(fabrication) is important for cell strength and resistance to damage in handling. Slices formed by procedure have reproducible surface with fine orange peel texture, and are far superior to slices prepared by other methods.

  10. Development of an improved high efficiency thin silicon solar cell

    NASA Technical Reports Server (NTRS)

    Lindmayer, J.

    1978-01-01

    Efforts were concerned with optimizing techniques for thinning silicon slices in NaOH etches, initial investigations of surface texturing, variation of furnace treatments to improve cell efficiency, initial efforts on optimization of gridline and cell sizes and Pilot Line fabrication of quantities of 2 cm x 2 cm 50 micron thick cells.

  11. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

    PubMed Central

    Makey, Ghaith; Elahi, Parviz; Çolakoğlu, Tahir; Ergeçen, Emre; Yavuz, Özgün; Hübner, René; Borra, Mona Zolfaghari; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ömer

    2017-01-01

    Silicon is an excellent material for microelectronics and integrated photonics1–3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e., “in-chip” microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances. PMID:28983323

  12. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

    NASA Astrophysics Data System (ADS)

    Tokel, Onur; Turnalı, Ahmet; Makey, Ghaith; Elahi, Parviz; ćolakoǧlu, Tahir; Ergeçen, Emre; Yavuz, Ã.-zgün; Hübner, René; Zolfaghari Borra, Mona; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ã.-mer

    2017-10-01

    Silicon is an excellent material for microelectronics and integrated photonics1-3, with untapped potential for mid-infrared optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow the fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realized with techniques like reactive ion etching. Embedded optical elements7, electronic devices and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1-µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has an optical index different to that in unmodified parts, enabling the creation of numerous photonic devices. Optionally, these parts can be chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface—that is, `in-chip'—microstructures for microfluidic cooling of chips, vias, micro-electro-mechanical systems, photovoltaic applications and photonic devices that match or surpass corresponding state-of-the-art device performances.

  13. Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils

    NASA Astrophysics Data System (ADS)

    Syed Mohammed, Zishan Ali; Puiu, Poenar Daniel; Aditya, Sheel

    2018-01-01

    Low resistance is an important requirement for microcoils which act as a signal receiver to ensure low thermal noise during signal detection. High-aspect ratio (HAR) planar microcoils entrenched in blind silicon trenches have features that make them more attractive than their traditional counterparts employing electroplating through a patterned thick polymer or achieved through silicon vias. However, challenges met in fabrication of such coils have not been discussed in detail until now. This paper reports the realization of such HAR microcoils embedded in Si blind trenches, fabricated with a single lithography step by first etching blind trenches in the silicon substrate with an aspect ratio of almost 3∶1 and then filling them up using copper electroplating. The electroplating was followed by chemical wet etching as a faster way of removing excess copper than traditional chemical mechanical polishing. Electrical resistance was further reduced by annealing the microcoils. The process steps and challenges faced in the realization of such structures are reported here followed by their electrical characterization. The obtained electrical resistances are then compared with those of other similar microcoils embedded in blind vias.

  14. Microfabricated instrument for tissue biopsy and analysis

    DOEpatents

    Krulevitch, Peter A.; Lee, Abraham P.; Northrup, M. Allen; Benett, William J.

    1999-01-01

    A microfabricated biopsy/histology instrument which has several advantages over the conventional procedures, including minimal specimen handling, smooth cutting edges with atomic sharpness capable of slicing very thin specimens (approximately 2 .mu.m or greater), micro-liter volumes of chemicals for treating the specimens, low cost, disposable, fabrication process which renders sterile parts, and ease of use. The cutter is a "cheese-grater" style design comprising a block or substrate of silicon and which uses anisotropic etching of the silicon to form extremely sharp and precise cutting edges. As a specimen is cut, it passes through the silicon cutter and lies flat on a piece of glass which is bonded to the cutter. Microchannels are etched into the glass or silicon substrates for delivering small volumes of chemicals for treating the specimen. After treatment, the specimens can be examined through the glass substrate. For automation purposes, microvalves and micropumps may be incorporated. Also, specimens in parallel may be cut and treated with identical or varied chemicals. The instrument is disposable due to its low cost and thus could replace current expensive microtome and histology equipment.

  15. Single crystal silicon filaments fabricated in SOI: A potential IR source for a microfabricated photometric CO2 sensor

    NASA Technical Reports Server (NTRS)

    Tu, Juliana; Smith, Rosemary L.

    1995-01-01

    The objective of this project was to design, fabricate, and test single crystal silicon filaments as potential black body IR sources for a spectrophotometric CO2 sensing microsystem. The design and fabrication of the silicon-on-insulator (SOI) filaments are summarized and figures showing the composite layout of the filament die (which contains four filaments of different lengths -- 500 microns, 1 mm, 1.5 mm and 2 mm -- and equal widths of 15 microns) are presented. The composite includes four mask layers: (1) silicon - defines the filament dimensions and contact pads; (2) release pit - defines the oxide removed from under the filament and hence, the length of the released filament; (3) Pyrex pit - defines the pit etched in the Pyrex cap (not used); and (4) metal - defines a metal pattern on the contact pads or used as a contact hole etch. I/V characteristics testing of the fabricated SOI filaments is described along with the nitride-coating procedures carried out to prevent oxidation and resistance instability.

  16. Fabrication of optical filters using multilayered porous silicon

    NASA Astrophysics Data System (ADS)

    Gaber, Noha; Khalil, Diaa; Shaarawi, Amr

    2011-02-01

    In this work we describe a method for fabricating optical filters using multilayered porous silicon 1D photonic structure. An electrochemical cell is constructed to control the porosity of variable layers in p-type Si wafers. Porous silicon multilayered structures are formed of λ/4 (or multiples) thin films that construct optical interference filters. By changing the anodizing current density of the cell during fabrication, different porosities can be obtained as the optical refractive index is a direct function of the layer porosity. To determine the morphology, the wavelength dependent refractive index n and absorption coefficient α, first, porous silicon free standing mono-layers have been fabricated at different conditions and characterized in the near infrared region (from 1000 to 2500nm). Large difference in refractive index (between 1.6 and 2.6) is obtained. Subsequently, multilayer structures have been fabricated and tested. Their spectral response has been measured and it shows good agreement with numerical simulations. A technique based on inserting etching breaks is adopted to ensure the depth homogeneity. The effect of differing etching/break times on the reproducibility of the filters is studied.

  17. Control of the interaction strength of photonic molecules by nanometer precise 3D fabrication.

    PubMed

    Rawlings, Colin D; Zientek, Michal; Spieser, Martin; Urbonas, Darius; Stöferle, Thilo; Mahrt, Rainer F; Lisunova, Yuliya; Brugger, Juergen; Duerig, Urs; Knoll, Armin W

    2017-11-28

    Applications for high resolution 3D profiles, so-called grayscale lithography, exist in diverse fields such as optics, nanofluidics and tribology. All of them require the fabrication of patterns with reliable absolute patterning depth independent of the substrate location and target materials. Here we present a complete patterning and pattern-transfer solution based on thermal scanning probe lithography (t-SPL) and dry etching. We demonstrate the fabrication of 3D profiles in silicon and silicon oxide with nanometer scale accuracy of absolute depth levels. An accuracy of less than 1nm standard deviation in t-SPL is achieved by providing an accurate physical model of the writing process to a model-based implementation of a closed-loop lithography process. For transfering the pattern to a target substrate we optimized the etch process and demonstrate linear amplification of grayscale patterns into silicon and silicon oxide with amplification ratios of ∼6 and ∼1, respectively. The performance of the entire process is demonstrated by manufacturing photonic molecules of desired interaction strength. Excellent agreement of fabricated and simulated structures has been achieved.

  18. Photo-EMF Sensitivity of Porous Silicon Thin Layer–Crystalline Silicon Heterojunction to Ammonia Adsorption

    PubMed Central

    Vashpanov, Yuriy; Jung, Jae Il; Kwack, Kae Dal

    2011-01-01

    A new method of using photo-electromotive force in detecting gas and controlling sensitivity is proposed. Photo-electromotive force on the heterojunction between porous silicon thin layer and crystalline silicon wafer depends on the concentration of ammonia in the measurement chamber. A porous silicon thin layer was formed by electrochemical etching on p-type silicon wafer. A gas and light transparent electrical contact was manufactured to this porous layer. Photo-EMF sensitivity corresponding to ammonia concentration in the range from 10 ppm to 1,000 ppm can be maximized by controlling the intensity of illumination light. PMID:22319353

  19. Quantitative Analysis of Defects in Silicon. [to predict energy conversion efficiency of silicon samples for solar cells

    NASA Technical Reports Server (NTRS)

    Natesh, R.; Smith, J. M.; Qidwai, H. A.; Bruce, T.

    1979-01-01

    The evaluation and prediction of the conversion efficiency for a variety of silicon samples with differences in structural defects, such as grain boundaries, twin boundaries, precipitate particles, dislocations, etc. are discussed. Quantitative characterization of these structural defects, which were revealed by etching the surface of silicon samples, is performed by using an image analyzer. Due to different crystal growth and fabrication techniques the various types of silicon contain a variety of trace impurity elements and structural defects. The two most important criteria in evaluating the various silicon types for solar cell applications are cost and conversion efficiency.

  20. Research and Development for Continued Performance Improvement in Flexible a-Si PV

    DTIC Science & Technology

    2010-12-14

    accomplished, however, at low temperatures silicides tend to form on the surface of the filament, which affected filament lifetime and deposition rate...considered. Titanium Nitride, sputtered As an alternative to the hot wire deposition of silicon, samples were prepared with various thicknesses of...Silicon 21 Insitu DC Sputtering Titanium Nitride 22 Metal Machine 2 ឈ> RF Oxygen Plasma Silicon Dioxide 20. Oxygen Etch Table A.4.1 Open circuit

  1. Analysis of plastic deformation in silicon web crystals

    NASA Technical Reports Server (NTRS)

    Spitznagel, J. A.; Seidensticker, R. G.; Lien, S. Y.; Mchugh, J. P.; Hopkins, R. H.

    1987-01-01

    Numerical calculation of 111-plane 110-line slip activity in silicon web crystals generated by thermal stresses is in good agreement with etch pit patterns and X-ray topographic data. The data suggest that stress redistribution effects are small and that a model, similar to that proposed by Penning (1958) and Jordan (1981) but modified to account for dislocation annihilation and egress, can be used to describe plastic flow effects during silicon web growth.

  2. Enhanced photo-response of porous silicon photo-detectors by embeddingTitanium-dioxide nano-particles

    NASA Astrophysics Data System (ADS)

    Ali, Hiba M.; Makki, Sameer A.; Abd, Ahmed N.

    2018-05-01

    Porous silicon (n-PS) films can be prepared by photoelectochemical etching (PECE) Silicon chips n - types with 15 (mA / cm2), in 15 minutes etching time on the fabrication nano-sized pore arrangement. By using X-ray diffraction measurement and atomic power microscopy characteristics (AFM), PS was investigated. It was also evaluated the crystallites size from (XRD) for the PS nanoscale. The atomic force microscopy confirmed the nano-metric size chemical fictionalization through the electrochemical etching that was shown on the PS surface chemical composition. The atomic power microscopy checks showed the roughness of the silicon surface. It is also notified (TiO2) preparation nano-particles that were prepared by pulse laser eradication in ethanol (PLAL) technique through irradiation with a Nd:YAG laser pulses TiO2 target that is sunk in methanol using 400 mJ of laser energy. It has been studied the structural, optical and morphological of TiO2NPs. It has been detected that through XRD measurement, (TiO2) NPs have been Tetragonal crystal structure. While with AFM measurements, it has been realized that the synthesized TiO2 particles are spherical with an average particle size in the (82 nm) range. It has been determined that the energy band gap of TiO2 NPs from optical properties and set to be in (5eV) range.The transmittance and reflectance spectra have determined the TiO2 NPs optical constants. It was reported the effectiveness of TiO2 NPs expansion on the PS Photodetector properties which exposes the benefits in (Al/PS/Si/Al). The built-in tension values depend on the etching time current density and laser flounce. Al/TiO2/PS/Si/Al photo-detector heterojunction have two response peaks that are situated at 350 nm and (700 -800nm) with max sensitivity ≈ 0.7 A/W. The maximum given detectivity is 9.38at ≈ 780 nm wavelength.

  3. Thermal Atomic Layer Etching of SiO2 by a "Conversion-Etch" Mechanism Using Sequential Reactions of Trimethylaluminum and Hydrogen Fluoride.

    PubMed

    DuMont, Jaime W; Marquardt, Amy E; Cano, Austin M; George, Steven M

    2017-03-22

    The thermal atomic layer etching (ALE) of SiO 2 was performed using sequential reactions of trimethylaluminum (TMA) and hydrogen fluoride (HF) at 300 °C. Ex situ X-ray reflectivity (XRR) measurements revealed that the etch rate during SiO 2 ALE was dependent on reactant pressure. SiO 2 etch rates of 0.027, 0.15, 0.20, and 0.31 Å/cycle were observed at static reactant pressures of 0.1, 0.5, 1.0, and 4.0 Torr, respectively. Ex situ spectroscopic ellipsometry (SE) measurements were in agreement with these etch rates versus reactant pressure. In situ Fourier transform infrared (FTIR) spectroscopy investigations also observed SiO 2 etching that was dependent on the static reactant pressures. The FTIR studies showed that the TMA and HF reactions displayed self-limiting behavior at the various reactant pressures. In addition, the FTIR spectra revealed that an Al 2 O 3 /aluminosilicate intermediate was present after the TMA exposures. The Al 2 O 3 /aluminosilicate intermediate is consistent with a "conversion-etch" mechanism where SiO 2 is converted by TMA to Al 2 O 3 , aluminosilicates, and reduced silicon species following a family of reactions represented by 3SiO 2 + 4Al(CH 3 ) 3 → 2Al 2 O 3 + 3Si(CH 3 ) 4 . Ex situ X-ray photoelectron spectroscopy (XPS) studies confirmed the reduction of silicon species after TMA exposures. Following the conversion reactions, HF can fluorinate the Al 2 O 3 and aluminosilicates to species such as AlF 3 and SiO x F y . Subsequently, TMA can remove the AlF 3 and SiO x F y species by ligand-exchange transmetalation reactions and then convert additional SiO 2 to Al 2 O 3 . The pressure-dependent conversion reaction of SiO 2 to Al 2 O 3 and aluminosilicates by TMA is critical for thermal SiO 2 ALE. The "conversion-etch" mechanism may also provide pathways for additional materials to be etched using thermal ALE.

  4. Process technologies of MPACVD planar waveguide devices and fiber attachment

    NASA Astrophysics Data System (ADS)

    Li, Cheng-Chung; Qian, Fan; Boudreau, Robert A.; Rowlette, John R., Sr.; Bowen, Terry P.

    1999-03-01

    Optical circuits based on low-loss glass waveguide on silicon are a practical and promising approach to integrate different functional components. Fiber attachment to planar waveguide provides a practical application for optical communications. Microwave Plasma Assisted Chemical Vapor Deposition (MPACVD) produces superior quality, low birefringence, low-loss, planar waveguides for integrated optical devices. Microwave plasma initiates the chemical vapor of SiCl4, GeCl4 and oxygen. A Ge-doped silica layer is thus deposited with a compatible high growth rate (i.e. 0.4 - 0.5 micrometer/min). Film properties are based on various parameters, such as chemical flow rates, chamber pressure and temperature, power level and injector design. The resultant refractive index can be varied between 1.46 (i.e. pure silica) and 1.60 (i.e. pure germania). Waveguides can be fabricated with any desired refractive index profile. Standard photolithography defines the waveguide pattern on a mask layer. The core layer is removed by plasma dry etch which has been investigated by both reactive ion etch (RIE) and inductively coupled plasma (ICP) etch. Etch rates of 3000 - 4000 angstrom/min have been achieved using ICP compared to typical etch rates of 200 - 300 angstrom/min using conventional RIE. Planar waveguides offer good mode matching to optical fiber. A polished fiber end can be glued to the end facet of waveguide with a very low optical coupling loss. In addition, anisotropic etching of silicon V- grooves provides a passive alignment capability. Epoxy and solder were used to fix the fiber within the guiding groove. Several designs of waveguide-fiber attachment will be discussed.

  5. Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology.

    PubMed

    Llobet, J; Rius, G; Chuquitarqui, A; Borrisé, X; Koops, R; van Veghel, M; Perez-Murano, F

    2018-04-02

    We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

  6. Porous silicon nanoparticle as a stabilizing support for chondroitinase.

    PubMed

    Daneshjou, Sara; Dabirmanesh, Bahareh; Rahimi, Fereshteh; Khajeh, Khosro

    2017-01-01

    Chondroitinase ABCI (cABCI) from Proteus vulgaris is a drug enzyme that can be used to treat spinal cord injuries. One of the main problems of chondroitinase ABC1 is its low thermal stability. The objective of the current study was to stabilize the enzyme through entrapment within porous silicon (pSi) nanoparticles. pSi was prepared by an electrochemical etch of p-type silicon using hydrofluoric acid/ethanol. The size of nanoparticles were determined 180nm by dynamic light scattering and the mean pore diameter was in the range of 40-60nm obtained by scanning electron microscopy. Enzymes were immobilized on porouse silicon nanoparticles by entrapment. The capacity of matrix was 35μg enzyme per 1mg of silicon. The immobilized enzyme displayed lower V max values compared to the free enzyme, but Km values were the same for both enzymes. Immobilization significantly increased the enzyme stability at various temperatures (-20, 4, 25 and 37°C). For example, at 4°C, the free enzyme (in 10mM imidazole) retained 20% of its activity after 100min, while the immobilized one retained 50% of its initial activity. Nanoparticles loading capacity and the enzyme release rate showed that the selected particles could be a pharmaceutically acceptable carrier for chondroitinase. Copyright © 2016 Elsevier B.V. All rights reserved.

  7. Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology

    NASA Astrophysics Data System (ADS)

    Llobet, J.; Rius, G.; Chuquitarqui, A.; Borrisé, X.; Koops, R.; van Veghel, M.; Perez-Murano, F.

    2018-04-01

    We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

  8. Dynamic Chemically Driven Dewetting, Spreading, and Self-Running of Sessile Droplets on Crystalline Silicon.

    PubMed

    Arscott, Steve

    2016-12-06

    A chemically driven dewetting effect is demonstrated using sessile droplets of dilute hydrofluoric acid on chemically oxidized silicon wafers. The dewetting occurs as the thin oxide is slowly etched by the droplet and replaced by a hydrogen-terminated surface; the result of this is a gradual increase in the contact angle of the droplet with time. The time-varying work of adhesion is calculated from the time-varying contact angle; this corresponds to the changing chemical nature of the surface during dewetting and can be modeled by the well-known logistic (sigmoid) function often used for the modeling of restricted growth, in this case, the transition from an oxidized surface to a hydrogen-terminated silicon surface. The observation of the time-varying contact angle allows one to both measure the etch rate of the silicon oxide and estimate the hydrogenation rate as a function of HF concentration and wafer type. In addition to this, at a certain HF concentration, a self-running droplet effect is observed. In contrast, on hydrogen-terminated silicon wafers, a chemically induced spreading effect is observed using sessile droplets of nitric acid. The droplet spreading can also be modeled using a logistical function, where the restricted growth is the transition from hydrogen-terminated to a chemically induced oxidized silicon surface. The chemically driven dewetting and spreading observed here add to the methods available to study dynamic wetting (e.g., the moving three-phase contact line) of sessile droplets on surfaces. By slowing down chemical kinetics of the wetting, one is able to record the changing profile of the sessile droplet with time and gather information concerning the time-varying surface chemistry. The data also indicates a chemical interface hysteresis (CIH) that is compared to contact angle hysteresis (CAH). The approach can also be used to study the chemical etching and deposition behavior of thin films using liquids by monitoring the macroscopic droplet profile and relating this to the time-varying physical and chemical interface phenomena.

  9. DAPHNE silicon photonics technological platform for research and development on WDM applications

    NASA Astrophysics Data System (ADS)

    Baudot, Charles; Fincato, Antonio; Fowler, Daivid; Perez-Galacho, Diego; Souhaité, Aurélie; Messaoudène, Sonia; Blanc, Romuald; Richard, Claire; Planchot, Jonathan; De-Buttet, Come; Orlando, Bastien; Gays, Fabien; Mezzomo, Cécilia; Bernard, Emilie; Marris-Morini, Delphine; Vivien, Laurent; Kopp, Christophe; Boeuf, Frédéric

    2016-05-01

    A new technological platform aimed at making prototypes and feasibility studies has been setup at STMicroelectronics using 300mm wafer foundry facilities. The technology, called DAPHNE (Datacom Advanced PHotonic Nanoscale Environment), is devoted at developing and evaluating new devices and sub-systems in particular for wavelength division multiplexing (WDM) applications and ring resonator based applications. Developed in the course of PLAT4MFP7 European project, DAPHNE is a flexible platform that fits perfectly R&D needs. The fabrication flow enables the processing of photonic integrated circuits using a silicon-on-insulator (SOI) of 300nm, partial etches of 150nm and 50nm and a total silicon etching. Consequently, two varieties of rib waveguides and one strip waveguide can be fabricated simultaneously with auto-alignment properties. The process variability on the 150nm partially etched silicon and the thin 50nm slab region are both less than 6 nm. Using a variety of different implantation configurations and a back-end of line of 5 metal layers, active devices are fabricated both in germanium and silicon. An available far back-end of line process consists of making 20 μm diameter copper posts on top of the electrical pads so that an electronic integrated circuit can be bonded on top the photonic die by 3D integration. Besides having those fabrication process options, DAPHNE is equipped with a library of standard cells for optical routing and multiplexing. Moreover, typical Mach-Zehnder modulators based on silicon pn junctions are also available for optical signal modulation. To achieve signal detection, germanium photodetectors also exist as standard cells. The measured single-mode propagation losses are 3.5 dB/cm for strip, 3.7 dB/cm for deep-rib (50nm slab) and 1.4 dB/cm for standard rib (150nm slab) waveguides. Transition tapers between different waveguide structures are as low as 0.006 dB.

  10. Scale-dependent diffusion anisotropy in nanoporous silicon

    PubMed Central

    Kondrashova, Daria; Lauerer, Alexander; Mehlhorn, Dirk; Jobic, Hervé; Feldhoff, Armin; Thommes, Matthias; Chakraborty, Dipanjan; Gommes, Cedric; Zecevic, Jovana; de Jongh, Petra; Bunde, Armin; Kärger, Jörg; Valiullin, Rustem

    2017-01-01

    Nanoporous silicon produced by electrochemical etching of highly B-doped p-type silicon wafers can be prepared with tubular pores imbedded in a silicon matrix. Such materials have found many technological applications and provide a useful model system for studying phase transitions under confinement. This paper reports a joint experimental and simulation study of diffusion in such materials, covering displacements from molecular dimensions up to tens of micrometers with carefully selected probe molecules. In addition to mass transfer through the channels, diffusion (at much smaller rates) is also found to occur in directions perpendicular to the channels, thus providing clear evidence of connectivity. With increasing displacements, propagation in both axial and transversal directions is progressively retarded, suggesting a scale-dependent, hierarchical distribution of transport resistances (“constrictions” in the channels) and of shortcuts (connecting “bridges”) between adjacent channels. The experimental evidence from these studies is confirmed by molecular dynamics (MD) simulation in the range of atomistic displacements and rationalized with a simple model of statistically distributed “constrictions” and “bridges” for displacements in the micrometer range via dynamic Monte Carlo (DMC) simulation. Both ranges are demonstrated to be mutually transferrable by DMC simulations based on the pore space topology determined by electron tomography. PMID:28106047

  11. Silicon hollow sphere anode with enhanced cycling stability by a template-free method

    NASA Astrophysics Data System (ADS)

    Chen, Song; Chen, Zhuo; Luo, Yunjun; Xia, Min; Cao, Chuanbao

    2017-04-01

    Silicon is a promising alternative anode material since it has a ten times higher theoretical specific capacity than that of a traditional graphite anode. However, the poor cycling stability due to the huge volume change of Si during charge/discharge processes has seriously hampered its widespread application. To address this challenge, we design a silicon hollow sphere nanostructure by selective etching and a subsequent magnesiothermic reduction. The Si hollow spheres exhibit enhanced electrochemical properties compared to the commercial Si nanoparticles. The initial discharge and charge capacities of the Si hollow sphere anode are 2215.8 mAh g-1 and 1615.1 mAh g-1 with a high initial coulombic efficiency (72%) at a current density of 200 mA g-1, respectively. In particular, the reversible capacity is 1534.5 mAh g-1 with a remarkable 88% capacity retention against the second cycle after 100 cycles, over four times the theoretical capacity of the traditional graphite electrode. Therefore, our work demonstrates the considerable potential of silicon structures for displacing commercial graphite, and might open up new opportunities to rationally design various nanostructured materials for lithium ion batteries.

  12. Fabrication of an Absorber-Coupled MKID Detector

    NASA Technical Reports Server (NTRS)

    Brown, Ari; Hsieh, Wen-Ting; Moseley, Samuel; Stevenson, Thomas; U-Yen, Kongpop; Wollack, Edward

    2012-01-01

    Absorber-coupled microwave kinetic inductance detector (MKID) arrays were developed for submillimeter and far-infrared astronomy. These sensors comprise arrays of lambda/2 stepped microwave impedance resonators patterned on a 1.5-mm-thick silicon membrane, which is optimized for optical coupling. The detector elements are supported on a 380-mm-thick micro-machined silicon wafer. The resonators consist of parallel plate aluminum transmission lines coupled to low-impedance Nb microstrip traces of variable length, which set the resonant frequency of each resonator. This allows for multiplexed microwave readout and, consequently, good spatial discrimination between pixels in the array. The transmission lines simultaneously act to absorb optical power and employ an appropriate surface impedance and effective filling fraction. The fabrication techniques demonstrate high-fabrication yield of MKID arrays on large, single-crystal membranes and sub-micron front-to-back alignment of the micro strip circuit. An MKID is a detector that operates upon the principle that a superconducting material s kinetic inductance and surface resistance will change in response to being exposed to radiation with a power density sufficient to break its Cooper pairs. When integrated as part of a resonant circuit, the change in surface impedance will result in a shift in its resonance frequency and a decrease of its quality factor. In this approach, incident power creates quasiparticles inside a superconducting resonator, which is configured to match the impedance of free space in order to absorb the radiation being detected. For this reason MKIDs are attractive for use in large-format focal plane arrays, because they are easily multiplexed in the frequency domain and their fabrication is straightforward. The fabrication process can be summarized in seven steps: (1) Alignment marks are lithographically patterned and etched all the way through a silicon on insulator (SOI) wafer, which consists of a thin silicon membrane bonded to a thick silicon handle wafer. (2) The metal microwave circuitry on the front of the membrane is patterned and etched. (3) The wafer is then temporarily bonded with wafer wax to a Pyrex wafer, with the SOI side abutting the Pyrex. (4) The silicon handle component of the SOI wafer is subsequently etched away so as to expose the membrane backside. (5) The wafer is flipped over, and metal microwave circuitry is patterned and etched on the membrane backside. Furthermore, cuts in the membrane are made so as to define the individual detector array chips. (6) Silicon frames are micromachined and glued to the silicon membrane. (7) The membranes, which are now attached to the frames, are released from the Pyrex wafer via dissolution of the wafer wax in acetone.

  13. Porous silicon formation during Au-catalyzed etching

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Algasinger, Michael; Bernt, Maximilian; Koynov, Svetoslav

    2014-04-28

    The formation of “black” nano-textured Si during the Au-catalyzed wet-chemical etch process was investigated with respect to photovoltaic applications. Cross-sectional scanning electron microscopy (SEM) images recorded at different stages of the etch process exhibit an evolution of a two-layer structure, consisting of cone-like Si hillocks covered with a nano-porous Si (np-Si) layer. Optical measurements confirm the presence of a np-Si phase which appears after the first ∼10 s of the etch process and continuously increases with the etch time. Furthermore, the etch process was investigated on Si substrates with different doping levels (∼0.01–100 Ω cm). SEM images show a transition frommore » the two-layer morphology to a structure consisting entirely of np-Si for higher doping levels (<0.1 Ω cm). The experimental results are discussed on the basis of the model of a local electrochemical etch process. A better understanding of the metal-catalyzed etch process facilitates the fabrication of “black” Si on various Si substrates, which is of significant interest for photovoltaic applications.« less

  14. Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

    DOEpatents

    Warren, W.L.; Vanheusden, K.J.R.; Schwank, J.R.; Fleetwood, D.M.; Shaneyfelt, M.R.; Winokur, P.S.; Devine, R.A.B.

    1998-07-28

    A method is disclosed for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer. 5 figs.

  15. Nanostructured silicon for thermoelectric

    NASA Astrophysics Data System (ADS)

    Stranz, A.; Kähler, J.; Waag, A.; Peiner, E.

    2011-06-01

    Thermoelectric modules convert thermal energy into electrical energy and vice versa. At present bismuth telluride is the most widely commercial used material for thermoelectric energy conversion. There are many applications where bismuth telluride modules are installed, mainly for refrigeration. However, bismuth telluride as material for energy generation in large scale has some disadvantages. Its availability is limited, it is hot stable at higher temperatures (>250°C) and manufacturing cost is relatively high. An alternative material for energy conversion in the future could be silicon. The technological processing of silicon is well advanced due to the rapid development of microelectronics in recent years. Silicon is largely available and environmentally friendly. The operating temperature of silicon thermoelectric generators can be much higher than of bismuth telluride. Today silicon is rarely used as a thermoelectric material because of its high thermal conductivity. In order to use silicon as an efficient thermoelectric material, it is necessary to reduce its thermal conductivity, while maintaining high electrical conductivity and high Seebeck coefficient. This can be done by nanostructuring into arrays of pillars. Fabrication of silicon pillars using ICP-cryogenic dry etching (Inductive Coupled Plasma) will be described. Their uniform height of the pillars allows simultaneous connecting of all pillars of an array. The pillars have diameters down to 180 nm and their height was selected between 1 micron and 10 microns. Measurement of electrical resistance of single silicon pillars will be presented which is done in a scanning electron microscope (SEM) equipped with nanomanipulators. Furthermore, measurement of thermal conductivity of single pillars with different diameters using the 3ω method will be shown.

  16. Fundamentals of EUV resist-inorganic hardmask interactions

    NASA Astrophysics Data System (ADS)

    Goldfarb, Dario L.; Glodde, Martin; De Silva, Anuja; Sheshadri, Indira; Felix, Nelson M.; Lionti, Krystelle; Magbitang, Teddie

    2017-03-01

    High resolution Extreme Ultraviolet (EUV) patterning is currently limited by EUV resist thickness and pattern collapse, thus impacting the faithful image transfer into the underlying stack. Such limitation requires the investigation of improved hardmasks (HMs) as etch transfer layers for EUV patterning. Ultrathin (<5nm) inorganic HMs can provide higher etch selectivity, lower post-etch LWR, decreased defectivity and wet strippability compared to spin-on hybrid HMs (e.g., SiARC), however such novel layers can induce resist adhesion failure and resist residue. Therefore, a fundamental understanding of EUV resist-inorganic HM interactions is needed in order to optimize the EUV resist interfacial behavior. In this paper, novel materials and processing techniques are introduced to characterize and improve the EUV resist-inorganic HM interface. HM surface interactions with specific EUV resist components are evaluated for open-source experimental resist formulations dissected into its individual additives using EUV contrast curves as an effective characterization method to determine post-development residue formation. Separately, an alternative adhesion promoter platform specifically tailored for a selected ultrathin inorganic HM based on amorphous silicon (aSi) is presented and the mitigation of resist delamination is exemplified for the cases of positive-tone and negative-tone development (PTD, NTD). Additionally, original wafer priming hardware for the deposition of such novel adhesion promoters is unveiled. The lessons learned in this work can be directly applied to the engineering of EUV resist materials and processes specifically designed to work on such novel HMs.

  17. Synthesis and Characterization of Silicon Nanowires by Electroless Etching

    NASA Astrophysics Data System (ADS)

    Bhujel, Rabina; Rizal, Umesh; Agarwal, Amit; Swain, Bhabani S.; Swain, Bibhu P.

    2018-02-01

    Silicon nanowires (SiNWs) were synthesized by two-step electroless etching of p-type Si (100) wafer and characterized by field emission scanning electron microscopy, UV-Vis spectroscopy, x-ray photoelectron spectroscopy, Fourier transform infrared spectroscopy and Raman spectroscopy. The vibrational signature at 1108 and 2087 cm-1 confirmed SiNWs were passivated by both oxygen and hydrogen atoms. Raman peak at 517 cm-1 indicated crystalline SiNWs with tailing toward redshift due to Fano effect. The Si(2p) and Si(2s) core orbital spectra of SiNWs were found at 99.8 and 150.5 eV, respectively. Moreover, the reflection of SiNWs is minimized to 1 to 5% in the 650-nm wavelength.

  18. Durability Enhancement of a Microelectromechanical System-Based Liquid Droplet Lens

    NASA Astrophysics Data System (ADS)

    Kyoo Lee, June; Park, Kyung-Woo; Kim, Hak-Rin; Kong, Seong Ho

    2010-06-01

    In this paper, we propose methods to enhance the durability of a microelectromechanical system (MEMS)-based liquid droplet lens driven by electrowetting. The enhanced durability of the lens is achieved through not only improvement in quality of dielectric layer for electrowetting by minimizing concentration of coarse pinholes, but also mitigation of physical and electrostatic stresses by reforming lens cavity. Silicon dioxide layer is deposited using plasma enhanced chemical vapor deposition, splitting the process into several steps to minimize the pinhole concentration in the oxide layer. And the stresses-reduced cavity in a form of overturned tetra-angular truncated pyramid with rounded corners, which is based on simulated results, is proposed and realized using silicon wet etching processes combined into anisotropic and isotropic etching.

  19. Nanofabrication on unconventional substrates using transferred hard masks

    DOE PAGES

    Li, Luozhou; Bayn, Igal; Lu, Ming; ...

    2015-01-15

    Here, a major challenge in nanofabrication is to pattern unconventional substrates that cannot be processed for a variety of reasons, such as incompatibility with spin coating, electron beam lithography, optical lithography, or wet chemical steps. Here, we present a versatile nanofabrication method based on re-usable silicon membrane hard masks, patterned using standard lithography and mature silicon processing technology. These masks, transferred precisely onto targeted regions, can be in the millimetre scale. They allow for fabrication on a wide range of substrates, including rough, soft, and non-conductive materials, enabling feature linewidths down to 10 nm. Plasma etching, lift-off, and ion implantationmore » are realized without the need for scanning electron/ion beam processing, UV exposure, or wet etching on target substrates.« less

  20. Fabrication of triangular nanobeam waveguide networks in bulk diamond using single-crystal silicon hard masks

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Bayn, I.; Mouradian, S.; Li, L.

    2014-11-24

    A scalable approach for integrated photonic networks in single-crystal diamond using triangular etching of bulk samples is presented. We describe designs of high quality factor (Q = 2.51 × 10{sup 6}) photonic crystal cavities with low mode volume (V{sub m} = 1.062 × (λ/n){sup 3}), which are connected via waveguides supported by suspension structures with predicted transmission loss of only 0.05 dB. We demonstrate the fabrication of these structures using transferred single-crystal silicon hard masks and angular dry etching, yielding photonic crystal cavities in the visible spectrum with measured quality factors in excess of Q = 3 × 10{sup 3}.

  1. Nanoscale Etching and Indentation of Silicon(001) Surface with Carbon Nanotube Tips

    NASA Technical Reports Server (NTRS)

    Dzegilenko, Fendor N.; Srivastava, Deepak; Saini, Subhash

    1998-01-01

    The possibility of nanoscale etching and indentation of Si(001)(2x1) surface by (8,0) and (10,10) carbon nanotube tips is demonstrated, for the first time, by classical molecular dynamics simulations employing Tersoff's many-body potential for a mixed C/Si/Ge system. In the nanotube tip barely touching the surface scenario atomistic etching is observed, where as in the nanoindentation scenario nanotube tip penetrates the surface without much hindrance. The results are explained in terms of the relative strength of C-C, C-Si, and Si-Si bonds.

  2. Three-dimensional photonic crystals created by single-step multi-directional plasma etching.

    PubMed

    Suzuki, Katsuyoshi; Kitano, Keisuke; Ishizaki, Kenji; Noda, Susumu

    2014-07-14

    We fabricate 3D photonic nanostructures by simultaneous multi-directional plasma etching. This simple and flexible method is enabled by controlling the ion-sheath in reactive-ion-etching equipment. We realize 3D photonic crystals on single-crystalline silicon wafers and show high reflectance (>95%) and low transmittance (<-15dB) at optical communication wavelengths, suggesting the formation of a complete photonic bandgap. Moreover, our method simply demonstrates Si-based 3D photonic crystals that show the photonic bandgap effect in a shorter wavelength range around 0.6 μm, where further fine structures are required.

  3. Method of making a silicon nanowire device

    DOEpatents

    None, None

    2017-05-23

    There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation. The method, in examples, includes thinning the nanowire through iterative oxidation and etching of the oxidized portion.

  4. Oblique patterned etching of vertical silicon sidewalls

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Burckel, D. Bruce; Finnegan, Patrick S.; Henry, M. David

    A method for patterning on vertical silicon surfaces in high aspect ratio silicontopography is presented. A Faraday cage is used to direct energetic reactive ions obliquely through a patterned suspended membrane positioned over the topography. The technique is capable of forming high-fidelity pattern (100 nm) features, adding an additional fabrication capability to standard top-down fabrication approaches.

  5. Oblique patterned etching of vertical silicon sidewalls

    DOE PAGES

    Burckel, D. Bruce; Finnegan, Patrick S.; Henry, M. David; ...

    2016-04-05

    A method for patterning on vertical silicon surfaces in high aspect ratio silicontopography is presented. A Faraday cage is used to direct energetic reactive ions obliquely through a patterned suspended membrane positioned over the topography. The technique is capable of forming high-fidelity pattern (100 nm) features, adding an additional fabrication capability to standard top-down fabrication approaches.

  6. Unveiling the Formation Pathway of Single Crystalline Porous Silicon Nanowires

    PubMed Central

    Zhong, Xing; Qu, Yongquan; Lin, Yung-Chen; Liao, Lei; Duan, Xiangfeng

    2011-01-01

    Porous silicon nanowire is emerging as an interesting material system due to its unique combination of structural, chemical, electronic, and optical properties. To fully understand their formation mechanism is of great importance for controlling the fundamental physical properties and enabling potential applications. Here we present a systematic study to elucidate the mechanism responsible for the formation of porous silicon nanowires in a two-step silver-assisted electroless chemical etching method. It is shown that silicon nanowire arrays with various porosities can be prepared by varying multiple experimental parameters such as the resistivity of the starting silicon wafer, the concentration of oxidant (H2O2) and the amount of silver catalyst. Our study shows a consistent trend that the porosity increases with the increasing wafer conductivity (dopant concentration) and oxidant (H2O2) concentration. We further demonstrate that silver ions, formed by the oxidation of silver, can diffuse upwards and re-nucleate on the sidewalls of nanowires to initiate new etching pathways to produce porous structure. The elucidation of this fundamental formation mechanism opens a rational pathway to the production of wafer-scale single crystalline porous silicon nanowires with tunable surface areas ranging from 370 m2·g−1 to 30 m2·g−1, and can enable exciting opportunities in catalysis, energy harvesting, conversion, storage, as well as biomedical imaging and therapy. PMID:21244020

  7. Improved Starting Materials for Back-Illuminated Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2009-01-01

    An improved type of starting materials for the fabrication of silicon-based imaging integrated circuits that include back-illuminated photodetectors has been conceived, and a process for making these starting materials is undergoing development. These materials are intended to enable reductions in dark currents and increases in quantum efficiencies, relative to those of comparable imagers made from prior silicon-on-insulator (SOI) starting materials. Some background information is prerequisite to a meaningful description of the improved starting materials and process. A prior SOI starting material, depicted in the upper part the figure, includes: a) A device layer on the front side, typically between 2 and 20 m thick, made of p-doped silicon (that is, silicon lightly doped with an electron acceptor, which is typically boron); b) A buried oxide (BOX) layer (that is, a buried layer of oxidized silicon) between 0.2 and 0.5 m thick; and c) A silicon handle layer (also known as a handle wafer) on the back side, between about 600 and 650 m thick. After fabrication of the imager circuitry in and on the device layer, the handle wafer is etched away, the BOX layer acting as an etch stop. In subsequent operation of the imager, light enters from the back, through the BOX layer. The advantages of back illumination over front illumination have been discussed in prior NASA Tech Briefs articles.

  8. Fabrication of Pop-up Detector Arrays on Si Wafers

    NASA Technical Reports Server (NTRS)

    Li, Mary J.; Allen, Christine A.; Gordon, Scott A.; Kuhn, Jonathan L.; Mott, David B.; Stahle, Caroline K.; Wang, Liqin L.

    1999-01-01

    High sensitivity is a basic requirement for a new generation of thermal detectors. To meet the requirement, close-packed, two-dimensional silicon detector arrays have been developed in NASA Goddard Space Flight Center. The goal of the task is to fabricate detector arrays configured with thermal detectors such as infrared bolometers and x-ray calorimeters to use in space fliGht missions. This paper focuses on the fabrication and the mechanical testing of detector arrays in a 0.2 mm pixel size, the smallest pop-up detectors being developed so far. These array structures, nicknamed "PUDS" for "Pop-Up Detectors", are fabricated on I pm thick, single-crystal, silicon membranes. Their designs have been refined so we can utilize the flexibility of thin silicon films by actually folding the silicon membranes to 90 degrees in order to obtain close-packed two-dimensional arrays. The PUD elements consist of a detector platform and two legs for mechanical support while also serving as electrical and thermal paths. Torsion bars and cantilevers connecting the detector platform to the legs provide additional flexures for strain relief. Using micro-electromechanical structure (MEMS) fabrication techniques, including photolithography, anisotropic chemical etching, reactive-ion etching, and laser dicing, we have fabricated PLTD detector arrays of fourteen designs with a variation of four parameters including cantilever length, torsion bar length and width, and leg length. Folding tests were conducted to test mechanical stress distribution for the array structures. We obtained folding yields and selected optimum design parameters to reach minimal stress levels. Computer simulation was also employed to verify mechanical behaviors of PUDs in the folding process. In addition, scanning electron microscopy was utilized to examine the flatness of detectors and the alignment of detector pixels in arrays. The fabrication of thermistors and heaters on the pop-up detectors is under way, preparing us for the next step of the experiment, the thermal test.

  9. Automated Array Assembly, Phase 2. Low-cost Solar Array Project, Task 4

    NASA Technical Reports Server (NTRS)

    Lopez, M.

    1978-01-01

    Work was done to verify the technological readiness of a select process sequence with respect to satisfying the Low Cost Solar Array Project objectives of meeting the designated goals of $.50 per peak watt in 1986 (1975 dollars). The sequence examined consisted of: (1) 3 inches diameter as-sawn Czochralski grown 1:0:0 silicon, (2) texture etching, (3) ion implanting, (4) laser annealing, (5) screen printing of ohmic contacts and (6) sprayed anti-reflective coatings. High volume production projections were made on the selected process sequence. Automated processing and movement of hardware at high rates were conceptualized to satisfy the PROJECT's 500 MW/yr capability. A production plan was formulated with flow diagrams integrating the various processes in the cell fabrication sequence.

  10. Focused-ion-beam-inflicted surface amorphization and gallium implantation--new insights and removal by focused-electron-beam-induced etching.

    PubMed

    Roediger, P; Wanzenboeck, H D; Waid, S; Hochleitner, G; Bertagnolli, E

    2011-06-10

    Recently focused-electron-beam-induced etching of silicon using molecular chlorine (Cl(2)-FEBIE) has been developed as a reliable and reproducible process capable of damage-free, maskless and resistless removal of silicon. As any electron-beam-induced processing is considered non-destructive and implantation-free due to the absence of ion bombardment this approach is also a potential method for removing focused-ion-beam (FIB)-inflicted crystal damage and ion implantation. We show that Cl(2)-FEBIE is capable of removing FIB-induced amorphization and gallium ion implantation after processing of surfaces with a focused ion beam. TEM analysis proves that the method Cl(2)-FEBIE is non-destructive and therefore retains crystallinity. It is shown that Cl(2)-FEBIE of amorphous silicon when compared to crystalline silicon can be up to 25 times faster, depending on the degree of amorphization. Also, using this method it has become possible for the first time to directly investigate damage caused by FIB exposure in a top-down view utilizing a localized chemical reaction, i.e. without the need for TEM sample preparation. We show that gallium fluences above 4 × 10(15) cm(-2) result in altered material resulting from FIB-induced processes down to a depth of ∼ 250 nm. With increasing gallium fluences, due to a significant gallium concentration close beneath the surface, removal of the topmost layer by Cl(2)-FEBIE becomes difficult, indicating that gallium serves as an etch stop for Cl(2)-FEBIE.

  11. Liquid metal micro heat pipes for space radiator applications

    NASA Technical Reports Server (NTRS)

    Gerner, F. M.; Henderson, H. T.

    1995-01-01

    Micromachining is a chemical means of etching three-dimensional structures, typically in single-crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (micro electro mechanical systems), where in addition to the ordinary two dimensional (planar) microelectronics, it is possible to build three-dimensional micromotors, electrically-actuated microvalves, hydraulic systems, and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor microfabrication. The University of Cincinnati group in collaboration with NASA Lewis formed micro heat pipes in silicon by the above techniques. Work is ongoing at a modest level, but several essential bonding and packaging techniques have been recently developed. Currently, we have constructed and filled water/silicon micro heat pipes. Preliminary thermal tests of arrays of 125 micro heat pipes etched in a 1 inch x 1 inch x 250 micron silicon wafer have been completed. These pipes are instrumented with extremely small P-N junctions to measure their effective conductivity and their maximum operating power. A relatively simple one-dimensional model has been developed in order to predict micro heat pipes' operating characteristics. This information can be used to optimize micro heat pipe design with respect to length, hydraulic diameter, and number of pipes. Work is progressing on the fabrication of liquid-metal micro heat pipes. In order to be compatible with liquid metal (sodium or potassium), the inside of the micro heat pipes will be coated with a refractory metal (such as tungsten, molybdenum, or titanium).

  12. Preparation of wafer-level glass cavities by a low-cost chemical foaming process (CFP).

    PubMed

    Shang, Jintang; Chen, Boyin; Lin, Wei; Wong, Ching-Ping; Zhang, Di; Xu, Chao; Liu, Junwen; Huang, Qing-An

    2011-04-21

    A novel foaming process-chemical foaming process (CFP)-using foaming agents to fabricate wafer-level micro glass cavities including channels and bubbles was investigated. The process consists of the following steps sequentially: (1) shallow cavities were fabricated by a wet etching on a silicon wafer; (2) powders of a proper foaming agent were placed in a silicon cavity, named 'mother cavity', on the etched silicon surface; (3) the silicon cavities were sealed with a glass wafer by anodic bonding; (4) the bonded wafers were heated to above the softening point of the glass, and baked for several minutes, when the gas released by the decomposition of the foaming agent in the 'mother cavity' went into the other sealed interconnected silicon cavities to foam the softened glass into cylindrical channels named 'daughter channels', or spherical bubbles named 'son bubbles'. Results showed that wafer-level micro glass cavities with smooth wall surfaces were achieved successfully without contamination by the CFP. A model for the CFP was proposed to predict the final shape of the glass cavity. Experimental results corresponded with model predictions. The CFP provides a low-cost avenue to preparation of micro glass cavities of high quality for applications such as micro-reactors, micro total analysis systems (μTAS), analytical and bio-analytical applications, and MEMS packaging.

  13. Structured Antireflective Coating for Silicon at Submillimeter Frequencies

    NASA Astrophysics Data System (ADS)

    Padilla, Estefania

    2018-01-01

    Observations at millimeter and submillimeter wavelengths are useful for many astronomical studies, such as the polarization of the cosmic microwave background or the formation and evolution of galaxy clusters. In order to allow observations over a broad spectral bandwidth (approximatively from 70 to 420 GHz), innovative broadband anti-reflective (AR) optics must be utilized in submillimeter telescopes. Due to its low loss and high refractive index, silicon is a fine optical material at these frequencies, but an AR coating with multiple layers is required to maximize its transmission over a wide bandwidth. Structured multilayer AR coatings for silicon are currently being developed at Caltech and JPL. The development process includes the design of the structured layers with commercial electromagnetic simulation software, the fabrication by using deep reactive ion etching, and the test of the transmission and reflection of the patterned wafers. Geometrical 3D patterns have successfully been etched at the surface of the silicon wafers creating up to 2 layers with different effective refractive indices. The transmission and reflection of single AR layer wafers, measured between 75 and 330 GHz, are close to the simulation predictions. These results allow the development of new designs with 5 or 6 AR layers in order to improve the bandwidth and transmission of the silicon AR coatings.

  14. Micro-miniature gas chromatograph column disposed in silicon wafers

    DOEpatents

    Yu, Conrad M.

    2000-01-01

    A micro-miniature gas chromatograph column is fabricated by forming matching halves of a circular cross-section spiral microcapillary in two silicon wafers and then bonding the two wafers together using visual or physical alignment methods. Heating wires are deposited on the outside surfaces of each wafer in a spiral or serpentine pattern large enough in area to cover the whole microcapillary area inside the joined wafers. The visual alignment method includes etching through an alignment window in one wafer and a precision-matching alignment target in the other wafer. The two wafers are then bonded together using the window and target. The physical alignment methods include etching through vertical alignment holes in both wafers and then using pins or posts through corresponding vertical alignment holes to force precision alignment during bonding. The pins or posts may be withdrawn after curing of the bond. Once the wafers are bonded together, a solid phase of very pure silicone is injected in a solution of very pure chloroform into one end of the microcapillary. The chloroform lowers the viscosity of the silicone enough that a high pressure hypodermic needle with a thumbscrew plunger can force the solution into the whole length of the spiral microcapillary. The chloroform is then evaporated out slowly to leave the silicone behind in a deposit.

  15. Black thin film silicon

    NASA Astrophysics Data System (ADS)

    Koynov, Svetoslav; Brandt, Martin S.; Stutzmann, Martin

    2011-08-01

    "Black etching" has been proposed previously as a method for the nanoscale texturing of silicon surfaces, which results in an almost complete suppression of reflectivity in the spectral range of absorption relevant for photovoltaics. The method modifies the topmost 150 to 300 nm of the material and thus also is applicable for thin films of silicon. The present work is focused on the optical effects induced by the black-etching treatment on hydrogenated amorphous and microcrystalline silicon thin films, in particular with respect to their application in solar cells. In addition to a strong reduction of the reflectivity, efficient light trapping within the modified thin films is found. The enhancement of the optical absorption due to the light trapping is investigated via photometric measurements and photothermal deflection spectroscopy. The correlation of the texture morphology (characterized via atomic force microscopy) with the optical effects is discussed in terms of an effective medium with gradually varying optical density and in the framework of the theory of statistical light trapping. Photoconductivity spectra directly show that the light trapping causes a significant prolongation of the light path within the black silicon films by up to 15 μm for ˜1 μm thick films, leading to a significant increase of the absorption in the red.

  16. Two-year Randomized Clinical Trial of Self-etching Adhesives and Selective Enamel Etching.

    PubMed

    Pena, C E; Rodrigues, J A; Ely, C; Giannini, M; Reis, A F

    2016-01-01

    The aim of this randomized, controlled prospective clinical trial was to evaluate the clinical effectiveness of restoring noncarious cervical lesions with two self-etching adhesive systems applied with or without selective enamel etching. A one-step self-etching adhesive (Xeno V(+)) and a two-step self-etching system (Clearfil SE Bond) were used. The effectiveness of phosphoric acid selective etching of enamel margins was also evaluated. Fifty-six cavities were restored with each adhesive system and divided into two subgroups (n=28; etch and non-etch). All 112 cavities were restored with the nanohybrid composite Esthet.X HD. The clinical effectiveness of restorations was recorded in terms of retention, marginal integrity, marginal staining, caries recurrence, and postoperative sensitivity after 3, 6, 12, 18, and 24 months (modified United States Public Health Service). The Friedman test detected significant differences only after 18 months for marginal staining in the groups Clearfil SE non-etch (p=0.009) and Xeno V(+) etch (p=0.004). One restoration was lost during the trial (Xeno V(+) etch; p>0.05). Although an increase in marginal staining was recorded for groups Clearfil SE non-etch and Xeno V(+) etch, the clinical effectiveness of restorations was considered acceptable for the single-step and two-step self-etching systems with or without selective enamel etching in this 24-month clinical trial.

  17. Silicon Nanostructures, Excitonic Interactions, Laser Consequences

    DTIC Science & Technology

    2008-07-11

    etching using an anodized aluminum oxide membrane as mask. The results described here lay a solid foundation for the next phase of development aimed at...achieved though reactive-ion-etching using an anodized aluminum oxide membrane as mask. The results described here lay a solid foundation for the next...Materials, April 4, 2006 issue). 6. Aijun Yin, Marian Tzolov, David Cardimona and Jimmy Xu, "Fabrication of Highly Ordered Anodic Aluminum Oxide

  18. Cyclic etching of tin-doped indium oxide using hydrogen-induced modified layer

    NASA Astrophysics Data System (ADS)

    Hirata, Akiko; Fukasawa, Masanaga; Nagahata, Kazunori; Li, Hu; Karahashi, Kazuhiro; Hamaguchi, Satoshi; Tatsumi, Tetsuya

    2018-06-01

    The rate of etching of tin-doped indium oxide (ITO) and the effects of a hydrogen-induced modified layer on cyclic, multistep thin-layer etching were investigated. It was found that ITO cyclic etching is possible by precisely controlling the hydrogen-induced modified layer. Highly selective etching of ITO/SiO2 was also investigated, and it was suggested that cyclic etching by selective surface adsorption of Si can precisely control the etch rates of ITO and SiO2, resulting in an almost infinite selectivity for ITO over SiO2 and in improved profile controllability.

  19. Reflectance analysis of porosity gradient in nanostructured silicon layers

    NASA Astrophysics Data System (ADS)

    Jurečka, Stanislav; Imamura, Kentaro; Matsumoto, Taketoshi; Kobayashi, Hikaru

    2017-12-01

    In this work we study optical properties of nanostructured layers formed on silicon surface. Nanostructured layers on Si are formed in order to reach high suppression of the light reflectance. Low spectral reflectance is important for improvement of the conversion efficiency of solar cells and for other optoelectronic applications. Effective method of forming nanostructured layers with ultralow reflectance in a broad interval of wavelengths is in our approach based on metal assisted etching of Si. Si surface immersed in HF and H2O2 solution is etched in contact with the Pt mesh roller and the structure of the mesh is transferred on the etched surface. During this etching procedure the layer density evolves gradually and the spectral reflectance decreases exponentially with the depth in porous layer. We analyzed properties of the layer porosity by incorporating the porosity gradient into construction of the layer spectral reflectance theoretical model. Analyzed layer is splitted into 20 sublayers in our approach. Complex dielectric function in each sublayer is computed by using Bruggeman effective media theory and the theoretical spectral reflectance of modelled multilayer system is computed by using Abeles matrix formalism. Porosity gradient is extracted from the theoretical reflectance model optimized in comparison to the experimental values. Resulting values of the structure porosity development provide important information for optimization of the technological treatment operations.

  20. GaN membrane MSM ultraviolet photodetectors

    NASA Astrophysics Data System (ADS)

    Muller, A.; Konstantinidis, G.; Kostopoulos, A.; Dragoman, M.; Neculoiu, D.; Androulidaki, M.; Kayambaki, M.; Vasilache, D.; Buiculescu, C.; Petrini, I.

    2006-12-01

    GaN exhibits unique physical properties, which make this material very attractive for wide range of applications and among them ultraviolet detection. For the first time a MSM type UV photodetector structure was manufactured on a 2.2 μm. thick GaN membrane obtained using micromachining techniques. The low unintentionally doped GaN layer structure was grown by MOCVD on high resistivity (ρ>10kΩcm) <111> oriented silicon wafers, 500μm thick. The epitaxially grown layers include a thin AlN layer in order to reduce the stress in the GaN layer and avoid cracking. Conventional contact lithography, e-gun Ni/Au (10nm /200nm) evaporation and lift-off techniques were used to define the interdigitated Schottky metalization on the top of the wafer. Ten digits with a width of 1μm and a length of 100μm were defined for each electrode. The distance between the digits was also 1μm. After the backside lapping of the wafer to a thickness of approximately 150μm, a 400nm thick Al layer was patterned and deposited on the backside, to be used as mask for the selective reactive ion etching of silicon. The backside mask, for the membrane formation, was patterned using double side alignment techniques and silicon was etched down to the 2.2μm thin GaN layer using SF 6 plasma. A very low dark current (30ρA at 3V) was obtained. Optical responsivity measurements were performed at 1.5V. A maximum responsivity of 18mA/W was obtained at a wavelength of 370nm. This value is very good and can be further improved using transparent contacts for the interdigitated structure.

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