Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors

NASA Astrophysics Data System (ADS)

Tsao, Yu-Ching; Chang, Ting-Chang; Chen, Hua-Mao; Chen, Bo-Wei; Chiang, Hsiao-Cheng; Chen, Guan-Fu; Chien, Yu-Chieh; Tai, Ya-Hsiang; Hung, Yu-Ju; Huang, Shin-Ping; Yang, Chung-Yi; Chou, Wu-Ching

2017-01-01

This work demonstrates the generation of abnormal capacitance for amorphous indium-gallium-zinc oxide (a-InGaZnO4) thin-film transistors after being subjected to negative bias stress under ultraviolet light illumination stress (NBIS). At various operation frequencies, there are two-step tendencies in their capacitance-voltage curves. When gate bias is smaller than threshold voltage, the measured capacitance is dominated by interface defects. Conversely, the measured capacitance is dominated by oxygen vacancies when gate bias is larger than threshold voltage. The impact of these interface defects and oxygen vacancies on capacitance-voltage curves is verified by TCAD simulation software.

Design and simulation of a novel E-mode GaN MIS-HEMT based on a cascode connection for suppression of electric field under gate and improvement of reliability

NASA Astrophysics Data System (ADS)

Li, Weiyi; Zhang, Zhili; Fu, Kai; Yu, Guohao; Zhang, Xiaodong; Sun, Shichuang; Song, Liang; Hao, Ronghui; Fan, Yaming; Cai, Yong; Zhang, Baoshun

2017-07-01

We proposed a novel AlGaN/GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT) with a dual-gate structure and carried out the detailed numerical simulation of device operation using Silvaco Atlas. The dual-gate device is based on a cascode connection of an E-mode and a D-mode gate. The simulation results show that electric field under the gate is decreased by more than 70% compared to that of the conventional E-mode MIS-HEMTs (from 2.83 MV/cm decreased to 0.83 MV/cm). Thus, with the discussion of ionized trap density, the proposed dual-gate structure can highly improve electric field-related reliability, such as, threshold voltage stability. In addition, compared with HEMT with field plate structure, the proposed structure exhibits a simplified fabrication process and a more effective suppression of high electric field. Project supported by the Key Technologies Support Program of Jiangsu Province (No. BE2013002-2) and the National Key Scientific Instrument and Equipment Development Projects of China (No. 2013YQ470767).

Increase in the Random Dopant Induced Threshold Fluctuations and Lowering in Sub 100 nm MOSFETs Due to Quantum Effects: A 3-D Density-Gradient Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Brown, A. R.; Davies, J. H.; Saini, S.

2000-01-01

In this paper we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub 100 nm MOSFETs. The simulations have been performed using a 3-D implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantisation but also the lateral confinement effects related to current filamentation in the 'valleys' of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides.

Superconducting quantum circuits at the surface code threshold for fault tolerance.

PubMed

Barends, R; Kelly, J; Megrant, A; Veitia, A; Sank, D; Jeffrey, E; White, T C; Mutus, J; Fowler, A G; Campbell, B; Chen, Y; Chen, Z; Chiaro, B; Dunsworth, A; Neill, C; O'Malley, P; Roushan, P; Vainsencher, A; Wenner, J; Korotkov, A N; Cleland, A N; Martinis, John M

2014-04-24

A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

Multi-Subband Ensemble Monte Carlo simulations of scaled GAA MOSFETs

NASA Astrophysics Data System (ADS)

Donetti, L.; Sampedro, C.; Ruiz, F. G.; Godoy, A.; Gamiz, F.

2018-05-01

We developed a Multi-Subband Ensemble Monte Carlo simulator for non-planar devices, taking into account two-dimensional quantum confinement. It couples self-consistently the solution of the 3D Poisson equation, the 2D Schrödinger equation, and the 1D Boltzmann transport equation with the Ensemble Monte Carlo method. This simulator was employed to study MOS devices based on ultra-scaled Gate-All-Around Si nanowires with diameters in the range from 4 nm to 8 nm with gate length from 8 nm to 14 nm. We studied the output and transfer characteristics, interpreting the behavior in the sub-threshold region and in the ON state in terms of the spatial charge distribution and the mobility computed with the same simulator. We analyzed the results, highlighting the contribution of different valleys and subbands and the effect of the gate bias on the energy and velocity profiles. Finally the scaling behavior was studied, showing that only the devices with D = 4nm maintain a good control of the short channel effects down to the gate length of 8nm .

Quantum Corrections to the 'Atomistic' MOSFET Simulations

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Kaya, S.; Balasubramaniam, R.

2000-01-01

We have introduced in a simple and efficient manner quantum mechanical corrections in our 3D 'atomistic' MOSFET simulator using the density gradient formalism. We have studied in comparison with classical simulations the effect of the quantum mechanical corrections on the simulation of random dopant induced threshold voltage fluctuations, the effect of the single charge trapping on interface states and the effect of the oxide thickness fluctuations in decanano MOSFETs with ultrathin gate oxides. The introduction of quantum corrections enhances the threshold voltage fluctuations but does not affect significantly the amplitude of the random telegraph noise associated with single carrier trapping. The importance of the quantum corrections for proper simulation of oxide thickness fluctuation effects has also been demonstrated.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

Performance analysis and simulation of vertical gallium nitride nanowire transistors

NASA Astrophysics Data System (ADS)

Witzigmann, Bernd; Yu, Feng; Frank, Kristian; Strempel, Klaas; Fatahilah, Muhammad Fahlesa; Schumacher, Hans Werner; Wasisto, Hutomo Suryo; Römer, Friedhard; Waag, Andreas

2018-06-01

Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device. He joined Bell Laboratories, Murray Hill, NJ, as a Technical Staff Member. In October 2001, he joined the Optical Access and Transport Division, Agere Systems, Alhambra, CA. In 2004, he was appointed an Assistant Professor at ETH Zurich,. Since 2008, at the University of Kassel, Kassel, Germany, and he has been a Professor the Head of the Computational Electronics and Photonics Group, and co-director of CINSaT since 2010. His research interests include computational optoelectronics, process and device design of semiconductor photonic devices, microwave components, and electromagnetics modeling for nanophotonics. Dr. Witzigmann is a senior member of the SPIE and IEEE.

Two dimensional analytical model for a reconfigurable field effect transistor

NASA Astrophysics Data System (ADS)

Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

2018-02-01

This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

Modeling and simulation of enhancement mode p-GaN Gate AlGaN/GaN HEMT for RF circuit switch applications

NASA Astrophysics Data System (ADS)

Panda, D. K.; Lenka, T. R.

2017-06-01

An enhancement mode p-GaN gate AlGaN/GaN HEMT is proposed and a physics based virtual source charge model with Landauer approach for electron transport has been developed using Verilog-A and simulated using Cadence Spectre, in order to predict device characteristics such as threshold voltage, drain current and gate capacitance. The drain current model incorporates important physical effects such as velocity saturation, short channel effects like DIBL (drain induced barrier lowering), channel length modulation (CLM), and mobility degradation due to self-heating. The predicted I d-V ds, I d-V gs, and C-V characteristics show an excellent agreement with the experimental data for both drain current and capacitance which validate the model. The developed model was then utilized to design and simulate a single-pole single-throw (SPST) RF switch.

Bubbles, Gating, and Anesthetics in Ion Channels

PubMed Central

Roth, Roland; Gillespie, Dirk; Nonner, Wolfgang; Eisenberg, Robert E.

2008-01-01

We suggest that bubbles are the bistable hydrophobic gates responsible for the on-off transitions of single channel currents. In this view, many types of channels gate by the same physical mechanism—dewetting by capillary evaporation—but different types of channels use different sensors to modulate hydrophobic properties of the channel wall and thereby trigger and control bubbles and gating. Spontaneous emptying of channels has been seen in many simulations. Because of the physics involved, such phase transitions are inherently sensitive, unstable threshold phenomena that are difficult to simulate reproducibly and thus convincingly. We present a thermodynamic analysis of a bubble gate using morphometric density functional theory of classical (not quantum) mechanics. Thermodynamic analysis of phase transitions is generally more reproducible and less sensitive to details than simulations. Anesthetic actions of inert gases—and their interactions with hydrostatic pressure (e.g., nitrogen narcosis)—can be easily understood by actions on bubbles. A general theory of gas anesthesia may involve bubbles in channels. Only experiments can show whether, or when, or which channels actually use bubbles as hydrophobic gates: direct observation of bubbles in channels is needed. Existing experiments show thin gas layers on hydrophobic surfaces in water and suggest that bubbles nearly exist in bulk water. PMID:18234836

Continuous adjustment of threshold voltage in carbon nanotube field-effect transistors through gate engineering

NASA Astrophysics Data System (ADS)

Zhong, Donglai; Zhao, Chenyi; Liu, Lijun; Zhang, Zhiyong; Peng, Lian-Mao

2018-04-01

In this letter, we report a gate engineering method to adjust threshold voltage of carbon nanotube (CNT) based field-effect transistors (FETs) continuously in a wide range, which makes the application of CNT FETs especially in digital integrated circuits (ICs) easier. Top-gated FETs are fabricated using solution-processed CNT network films with stacking Pd and Sc films as gate electrodes. By decreasing the thickness of the lower layer metal (Pd) from 20 nm to zero, the effective work function of the gate decreases, thus tuning the threshold voltage (Vt) of CNT FETs from -1.0 V to 0.2 V. The continuous adjustment of threshold voltage through gate engineering lays a solid foundation for multi-threshold technology in CNT based ICs, which then can simultaneously provide high performance and low power circuit modules on one chip.

Step buffer layer of Al0.25Ga0.75N/Al0.08Ga0.92N on P-InAlN gate normally-off high electron mobility transistors

NASA Astrophysics Data System (ADS)

Shrestha, Niraj M.; Li, Yiming; Chang, E. Y.

2016-07-01

Normally-off AlGaN/GaN high electron mobility transistors (HEMTs) are indispensable devices for power electronics as they can greatly simplify circuit designs in a cost-effective way. In this work, the electrical characteristics of p-type InAlN gate normally-off AlGaN/GaN HEMTs with a step buffer layer of Al0.25Ga0.75N/Al0.1Ga0.9N is studied numerically. Our device simulation shows that a p-InAlN gate with a step buffer layer allows the transistor to possess normally-off behavior with high drain current and high breakdown voltage simultaneously. The gate modulation by the p-InAlN gate and the induced holes appearing beneath the gate at the GaN/Al0.25Ga0.75N interface is because a hole appearing in the p-InAlN layer can effectively vary the threshold voltage positively. The estimated threshold voltage of the normally-off HEMTs explored is 2.5 V at a drain bias of 25 V, which is 220% higher than the conventional p-AlGaN normally-off AlGaN/GaN gate injection transistor (GIT). Concurrently, the maximum current density of the explored HEMT at a drain bias of 10 V slightly decreases by about 7% (from 240 to 223 mA mm-1). At a drain bias of 15 V, the current density reached 263 mA mm-1. The explored structure is promising owing to tunable positive threshold voltage and the maintenance of similar current density; notably, its breakdown voltage significantly increases by 36% (from 800 V, GIT, to 1086 V). The engineering findings of this study indicate that novel p-InAlN for both the gate and the step buffer layer can feature a high threshold voltage, large current density and high operating voltage for advanced AlGaN/GaN HEMT devices.

Error threshold for color codes and random three-body Ising models.

PubMed

Katzgraber, Helmut G; Bombin, H; Martin-Delgado, M A

2009-08-28

We study the error threshold of color codes, a class of topological quantum codes that allow a direct implementation of quantum Clifford gates suitable for entanglement distillation, teleportation, and fault-tolerant quantum computation. We map the error-correction process onto a statistical mechanical random three-body Ising model and study its phase diagram via Monte Carlo simulations. The obtained error threshold of p(c) = 0.109(2) is very close to that of Kitaev's toric code, showing that enhanced computational capabilities do not necessarily imply lower resistance to noise.

Performance characteristics of a nanoscale double-gate reconfigurable array

NASA Astrophysics Data System (ADS)

Beckett, Paul

2008-12-01

The double gate transistor is a promising device applicable to deep sub-micron design due to its inherent resistance to short-channel effects and superior subthreshold performance. Using both TCAD and SPICE circuit simulation, it is shown that the characteristics of fully depleted dual-gate thin-body Schottky barrier silicon transistors will not only uncouple the conflicting requirements of high performance and low standby power in digital logic, but will also allow the development of a locally-connected reconfigurable computing mesh. The magnitude of the threshold shift effect will scale with device dimensions and will remain compatible with oxide reliability constraints. A field-programmable architecture based on the double gate transistor is described in which the operating point of the circuit is biased via one gate while the other gate is used to form the logic array, such that complex heterogeneous computing functions may be developed from this homogeneous, mesh-connected organization.

Influence of trap-assisted tunneling on trap-assisted tunneling current in double gate tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Zhi, Jiang; Yi-Qi, Zhuang; Cong, Li; Ping, Wang; Yu-Qi, Liu

2016-02-01

Trap-assisted tunneling (TAT) has attracted more and more attention, because it seriously affects the sub-threshold characteristic of tunnel field-effect transistor (TFET). In this paper, we assess subthreshold performance of double gate TFET (DG-TFET) through a band-to-band tunneling (BTBT) model, including phonon-assisted scattering and acoustic surface phonons scattering. Interface state density profile (Dit) and the trap level are included in the simulation to analyze their effects on TAT current and the mechanism of gate leakage current. Project supported by the National Natural Science Foundation of China (Grant Nos. 61574109 and 61204092).

Modeling and analysis of sub-surface leakage current in nano-MOSFET under cutoff regime

NASA Astrophysics Data System (ADS)

Swami, Yashu; Rai, Sanjeev

2017-02-01

The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in nano-MOSFET circuits as threshold voltage, channel length, and gate oxide thickness are scaled down to nano-meter range. Precise leakage current valuation and meticulous modeling of the same at nano-meter technology scale is an increasingly a critical work in designing the low power nano-MOSFET circuits. We present a specific compact model for sub-threshold regime leakage current in bulk driven nano-MOSFETs. The proposed logical model is instigated and executed into the latest updated PTM bulk nano-MOSFET model and is found to be in decent accord with technology-CAD simulation data. This paper also reviews various transistor intrinsic leakage mechanisms for nano-MOSFET exclusively in weak inversion, like drain-induced barricade lowering (DIBL), gate-induced drain leakage (GIDL), gate oxide tunneling (GOT) leakage etc. The root cause of the sub-surface leakage current is mainly due to the nano-scale short channel length causing source-drain coupling even in sub-threshold domain. Consequences leading to carriers triumphing the barricade between the source and drain. The enhanced model effectively considers the following parameter dependence in the account for better-quality value-added results like drain-to-source bias (VDS), gate-to-source bias (VGS), channel length (LG), source/drain junction depth (Xj), bulk doping concentration (NBULK), and operating temperature (Top).

Characterizing a four-qubit planar lattice for arbitrary error detection

NASA Astrophysics Data System (ADS)

Chow, Jerry M.; Srinivasan, Srikanth J.; Magesan, Easwar; Córcoles, A. D.; Abraham, David W.; Gambetta, Jay M.; Steffen, Matthias

2015-05-01

Quantum error correction will be a necessary component towards realizing scalable quantum computers with physical qubits. Theoretically, it is possible to perform arbitrarily long computations if the error rate is below a threshold value. The two-dimensional surface code permits relatively high fault-tolerant thresholds at the ~1% level, and only requires a latticed network of qubits with nearest-neighbor interactions. Superconducting qubits have continued to steadily improve in coherence, gate, and readout fidelities, to become a leading candidate for implementation into larger quantum networks. Here we describe characterization experiments and calibration of a system of four superconducting qubits arranged in a planar lattice, amenable to the surface code. Insights into the particular qubit design and comparison between simulated parameters and experimentally determined parameters are given. Single- and two-qubit gate tune-up procedures are described and results for simultaneously benchmarking pairs of two-qubit gates are given. All controls are eventually used for an arbitrary error detection protocol described in separate work [Corcoles et al., Nature Communications, 6, 2015].

Study of fully-depleted Ge double-gate n-type Tunneling Field-Effect Transistors for improvement in on-state current and sub-threshold swing

NASA Astrophysics Data System (ADS)

Liu, Xiangyu; Hu, Huiyong; Wang, Meng; Zhang, Heming; Cui, Shimin; Shu, Bin; Wang, Bin

2018-01-01

In this paper, a fully-depleted (FD) Ge double-gate (DG) n-type Tunneling Field-Effect Transistors (TFET) structure is studied in detail by two-dimensional numerical simulation. The simulation results indicated that the on-state current Ion and on-off ratio of the FD Ge DG-TFET increases about 1 order of magnitude comparing with the Conventional Ge DG-TFET, and Ion=3.95×10-5 A/μm and the below 60 mV/decade subthreshold swing S=26.4 mV/decade are achieved with the length of gate LD=20 nm, the workfuntion of metal gate Φm=0.2 eV and the doping concentration of n+-type-channel ND=1×1018 cm-3. Moreover, the impacts of Φm, ND and LD are investigated. The simulation results indicated that the off-state current Ioff includes the tunneling current at the middle of channel IB the gated-induced drain leakage (GIDL) current IGIDL. With optimized Φm and ND, Ioff is reduced about 2 orders of magnitude to 2.5×10-13 A/μm with LD increasing from 40 nm to 100 nm, and on-off ratio is increased to 1.58×107.

LOGIC OF CONTROLLED THRESHOLD DEVICES.

DTIC Science & Technology

The synthesis of threshold logic circuits from several points of view is presented. The first approach is applicable to resistor-transistor networks...in which the outputs are tied to a common collector resistor. In general, fewer threshold logic gates than NOR gates connected to a common collector...network to realize a specified function such that the failure of any but the output gate can be compensated for by a change in the threshold level (and

ADAPTIVE THRESHOLD LOGIC.

DTIC Science & Technology

The design and construction of a 16 variable threshold logic gate with adaptable weights is described. The operating characteristics of tape wound...and sizes as well as for the 16 input adaptive threshold logic gate. (Author)

Ku-band radar threshold analysis

NASA Technical Reports Server (NTRS)

Weber, C. L.; Polydoros, A.

1979-01-01

The statistics of the CFAR threshold for the Ku-band radar was determined. Exact analytical results were developed for both the mean and standard deviations in the designated search mode. The mean value is compared to the results of a previously reported simulation. The analytical results are more optimistic than the simulation results, for which no explanation is offered. The normalized standard deviation is shown to be very sensitive to signal-to-noise ratio and very insensitive to the noise correlation present in the range gates of the designated search mode. The substantial variation in the CFAR threshold is dominant at large values of SNR where the normalized standard deviation is greater than 0.3. Whether or not this significantly affects the resulting probability of detection is a matter which deserves additional attention.

Gradient ascent pulse engineering approach to CNOT gates in donor electron spin quantum computing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tsai, D.-B.; Goan, H.-S.

2008-11-07

In this paper, we demonstrate how gradient ascent pulse engineering (GRAPE) optimal control methods can be implemented on donor electron spin qubits in semiconductors with an architecture complementary to the original Kane's proposal. We focus on the high fidelity controlled-NOT (CNOT) gate and we explicitly find the digitized control sequences for a controlled-NOT gate by optimizing its fidelity using the effective, reduced donor electron spin Hamiltonian with external controls over the hyperfine A and exchange J interactions. We then simulate the CNOT-gate sequence with the full spin Hamiltonian and find that it has an error of 10{sup -6} that ismore » below the error threshold of 10{sup -4} required for fault-tolerant quantum computation. Also the CNOT gate operation time of 100 ns is 3 times faster than 297 ns of the proposed global control scheme.« less

Analog Computation by DNA Strand Displacement Circuits.

PubMed

Song, Tianqi; Garg, Sudhanshu; Mokhtar, Reem; Bui, Hieu; Reif, John

2016-08-19

DNA circuits have been widely used to develop biological computing devices because of their high programmability and versatility. Here, we propose an architecture for the systematic construction of DNA circuits for analog computation based on DNA strand displacement. The elementary gates in our architecture include addition, subtraction, and multiplication gates. The input and output of these gates are analog, which means that they are directly represented by the concentrations of the input and output DNA strands, respectively, without requiring a threshold for converting to Boolean signals. We provide detailed domain designs and kinetic simulations of the gates to demonstrate their expected performance. On the basis of these gates, we describe how DNA circuits to compute polynomial functions of inputs can be built. Using Taylor Series and Newton Iteration methods, functions beyond the scope of polynomials can also be computed by DNA circuits built upon our architecture.

Anomalous bias-stress-induced unstable phenomena of InZnO thin-film transistors using Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Xu, Wangying; Dai, Mingzhi; Liang, Lingyan; Liu, Zhimin; Sun, Xilian; Wan, Qing; Cao, Hongtao

2012-05-01

InZnO thin-film transistors using high-κ Ta2O5 gate dielectric are presented and analysed. The large capacitance coupling effect of amorphous Ta2O5 results in fabricated devices with good electrical properties. However, an anomalous negative threshold voltage (Vth) shift under positive bias stress is observed. It is suggested that electron detrapping from the high-κ Ta2O5 dielectric to the gate electrode is responsible for this Vth shift, which is supported both by the logarithmical dependence of the Vth change on the duration of the bias stress and device simulation extracted trapped charges involved.

Device and material characterization and analytic modeling of amorphous silicon thin film transistors

NASA Astrophysics Data System (ADS)

Slade, Holly Claudia

Hydrogenated amorphous silicon thin film transistors (TFTs) are now well-established as switching elements for a variety of applications in the lucrative electronics market, such as active matrix liquid crystal displays, two-dimensional imagers, and position-sensitive radiation detectors. These applications necessitate the development of accurate characterization and simulation tools. The main goal of this work is the development of a semi- empirical, analytical model for the DC and AC operation of an amorphous silicon TFT for use in a manufacturing facility to improve yield and maintain process control. The model is physically-based, in order that the parameters scale with gate length and can be easily related back to the material and device properties. To accomplish this, extensive experimental data and 2D simulations are used to observe and quantify non- crystalline effects in the TFTs. In particular, due to the disorder in the amorphous network, localized energy states exist throughout the band gap and affect all regimes of TFT operation. These localized states trap most of the free charge, causing a gate-bias-dependent field effect mobility above threshold, a power-law dependence of the current on gate bias below threshold, very low leakage currents, and severe frequency dispersion of the TFT gate capacitance. Additional investigations of TFT instabilities reveal the importance of changes in the density of states and/or back channel conduction due to bias and thermal stress. In the above threshold regime, the model is similar to the crystalline MOSFET model, considering the drift component of free charge. This approach uses the field effect mobility to take into account the trap states and must utilize the correct definition of threshold voltage. In the below threshold regime, the density of deep states is taken into account. The leakage current is modeled empirically, and the parameters are temperature dependent to 150oC. The capacitance of the TFT can be modeled using a transmission line model, which is implemented using a small signal circuit with access resistors in series with the source and drain capacitances. This correctly reproduces the frequency dispersion in the TFT. Automatic parameter extraction routines are provided and are used to test the robustness of the model on a variety of devices from different research laboratories. The results demonstrate excellent agreement, showing that the model is suitable for device design, scaling, and implementation in the manufacturing process.

Gate voltage dependent 1/f noise variance model based on physical noise generation mechanisms in n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Arai, Yukiko; Aoki, Hitoshi; Abe, Fumitaka; Todoroki, Shunichiro; Khatami, Ramin; Kazumi, Masaki; Totsuka, Takuya; Wang, Taifeng; Kobayashi, Haruo

2015-04-01

1/f noise is one of the most important characteristics for designing analog/RF circuits including operational amplifiers and oscillators. We have analyzed and developed a novel 1/f noise model in the strong inversion, saturation, and sub-threshold regions based on SPICE2 type model used in any public metal-oxide-semiconductor field-effect transistor (MOSFET) models developed by the University of California, Berkeley. Our model contains two noise generation mechanisms that are mobility and interface trap number fluctuations. Noise variability dependent on gate voltage is also newly implemented in our model. The proposed model has been implemented in BSIM4 model of a SPICE3 compatible circuit simulator. Parameters of the proposed model are extracted with 1/f noise measurements for simulation verifications. The simulation results show excellent agreements between measurement and simulations.

Contributions of adaptation currents to dynamic spike threshold on slow timescales: Biophysical insights from conductance-based models

NASA Astrophysics Data System (ADS)

Yi, Guosheng; Wang, Jiang; Wei, Xile; Deng, Bin; Li, Huiyan; Che, Yanqiu

2017-06-01

Spike-frequency adaptation (SFA) mediated by various adaptation currents, such as voltage-gated K+ current (IM), Ca2+-gated K+ current (IAHP), or Na+-activated K+ current (IKNa), exists in many types of neurons, which has been shown to effectively shape their information transmission properties on slow timescales. Here we use conductance-based models to investigate how the activation of three adaptation currents regulates the threshold voltage for action potential (AP) initiation during the course of SFA. It is observed that the spike threshold gets depolarized and the rate of membrane depolarization (dV/dt) preceding AP is reduced as adaptation currents reduce firing rate. It is indicated that the presence of inhibitory adaptation currents enables the neuron to generate a dynamic threshold inversely correlated with preceding dV/dt on slower timescales than fast dynamics of AP generation. By analyzing the interactions of ionic currents at subthreshold potentials, we find that the activation of adaptation currents increase the outward level of net membrane current prior to AP initiation, which antagonizes inward Na+ to result in a depolarized threshold and lower dV/dt from one AP to the next. Our simulations demonstrate that the threshold dynamics on slow timescales is a secondary effect caused by the activation of adaptation currents. These findings have provided a biophysical interpretation of the relationship between adaptation currents and spike threshold.

An extensive investigation of work function modulated trapezoidal recessed channel MOSFET

NASA Astrophysics Data System (ADS)

Lenka, Annada Shankar; Mishra, Sikha; Mishra, Satyaranjan; Bhanja, Urmila; Mishra, Guru Prasad

2017-11-01

The concept of silicon on insulator (SOI) and grooved gate help to lessen the short channel effects (SCEs). Again the work function modulation along the metal gate gives a better drain current due to the uniform electric field along the channel. So all these concepts are combined and used in the proposed MOSFET structure for more improved performance. In this work, trapezoidal recessed channel silicon on insulator (TRC-SOI) MOSFET and work function modulated trapezoidal recessed channel silicon on insulator (WFM-TRC-SOI) MOSFET are compared with DC and RF parameters and later linearity of both the devices is tested. An analytical model is formulated by using a 2-D Poisson's equation and develops a compact equation for threshold voltage using minimum surface potential. In this work we analyze the effect of negative junction depth and the corner angle on various device parameters such as minimum surface potential, sub-threshold slope (SS), drain induced barrier lowering (DIBL) and threshold voltage. The analysis interprets that the switching performance of WFM-TRC-SOI MOSFET surpasses TRC-SOI MOSFET in terms of high Ion/Ioff ratio and also the proposed structure can minimize the short channel effects (SCEs) in RF application. The validity of proposed model has been verified with simulation result performed on Sentaurus TCAD device simulator.

Threshold-Voltage Shifts in Organic Transistors Due to Self-Assembled Monolayers at the Dielectric: Evidence for Electronic Coupling and Dipolar Effects.

PubMed

Aghamohammadi, Mahdieh; Rödel, Reinhold; Zschieschang, Ute; Ocal, Carmen; Boschker, Hans; Weitz, R Thomas; Barrena, Esther; Klauk, Hagen

2015-10-21

The mechanisms behind the threshold-voltage shift in organic transistors due to functionalizing of the gate dielectric with self-assembled monolayers (SAMs) are still under debate. We address the mechanisms by which SAMs determine the threshold voltage, by analyzing whether the threshold voltage depends on the gate-dielectric capacitance. We have investigated transistors based on five oxide thicknesses and two SAMs with rather diverse chemical properties, using the benchmark organic semiconductor dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene. Unlike several previous studies, we have found that the dependence of the threshold voltage on the gate-dielectric capacitance is completely different for the two SAMs. In transistors with an alkyl SAM, the threshold voltage does not depend on the gate-dielectric capacitance and is determined mainly by the dipolar character of the SAM, whereas in transistors with a fluoroalkyl SAM the threshold voltages exhibit a linear dependence on the inverse of the gate-dielectric capacitance. Kelvin probe force microscopy measurements indicate this behavior is attributed to an electronic coupling between the fluoroalkyl SAM and the organic semiconductor.

A novel double gate MOSFET by symmetrical insulator packets with improved short channel effects

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2018-03-01

In this article, we study a novel double-gate SOI MOSFET structure incorporating insulator packets (IPs) at the junction between channel and source/drain (S/D) ends. The proposed MOSFET has great strength in inhibiting short channel effects and OFF-state current that are the main problems compared with conventional one due to the significant suppressed penetrations of both the lateral electric field and the carrier diffusion from the S/D into the channel. Improvement of the hot electron reliability, the ON to OFF drain current ratio, drain-induced barrier lowering, gate-induced drain leakage and threshold voltage over conventional double-gate SOI MOSFETs, i.e. without IPs, is displayed with the simulation results. This study is believed to improve the CMOS device reliability and is suitable for the low-power very-large-scale integration circuits.

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Controllable Hysteresis and Threshold Voltage of Single-Walled Carbon Nano-tube Transistors with Ferroelectric Polymer Top-Gate Insulators

PubMed Central

Sun, Yi-Lin; Xie, Dan; Xu, Jian-Long; Zhang, Cheng; Dai, Rui-Xuan; Li, Xian; Meng, Xiang-Jian; Zhu, Hong-Wei

2016-01-01

Double-gated field effect transistors have been fabricated using the SWCNT networks as channel layer and the organic ferroelectric P(VDF-TrFE) film spin-coated as top gate insulators. Standard photolithography process has been adopted to achieve the patterning of organic P(VDF-TrFE) films and top-gate electrodes, which is compatible with conventional CMOS process technology. An effective way for modulating the threshold voltage in the channel of P(VDF-TrFE) top-gate transistors under polarization has been reported. The introduction of functional P(VDF-TrFE) gate dielectric also provides us an alternative method to suppress the initial hysteresis of SWCNT networks and obtain a controllable ferroelectric hysteresis behavior. Applied bottom gate voltage has been found to be another effective way to highly control the threshold voltage of the networked SWCNTs based FETs by electrostatic doping effect. PMID:26980284

A novel gate and drain engineered charge plasma tunnel field-effect transistor for low sub-threshold swing and ambipolar nature

NASA Astrophysics Data System (ADS)

Yadav, Dharmendra Singh; Raad, Bhagwan Ram; Sharma, Dheeraj

2016-12-01

In this paper, we focus on the improvement of figures of merit for charge plasma based tunnel field-effect transistor (TFET) in terms of ON-state current, threshold voltage, sub-threshold swing, ambipolar nature, and gate to drain capacitance which provides better channel controlling of the device with improved high frequency response at ultra-low supply voltages. Regarding this, we simultaneously employ work function engineering on the drain and gate electrode of the charge plasma TFET. The use of gate work function engineering modulates the barrier on the source/channel interface leads to improvement in the ON-state current, threshold voltage, and sub-threshold swing. Apart from this, for the first time use of work function engineering on the drain electrode increases the tunneling barrier for the flow of holes on the drain/channel interface, it results into suppression of ambipolar behavior. The lowering of gate to drain capacitance therefore enhanced high frequency parameters. Whereas, the presence of dual work functionality at the gate electrode and over the drain region improves the overall performance of the charge plasma based TFET.

THRESHOLD LOGIC.

DTIC Science & Technology

synthesis procedures; a ’best’ method is definitely established. (2) ’Symmetry Types for Threshold Logic’ is a tutorial expositon including a careful...development of the Goto-Takahasi self-dual type ideas. (3) ’Best Threshold Gate Decisions’ reports a comparison, on the 2470 7-argument threshold ...interpretation is shown best. (4) ’ Threshold Gate Networks’ reviews the previously discussed 2-algorithm in geometric terms, describes our FORTRAN

Modelling the Future Hydroclimatology of the Lower Fraser River and its Impacts on the Spawning Migration Survival of Sockeye Salmon

NASA Technical Reports Server (NTRS)

Hague, M. J.; Ferrari, M. R.; Miller, J. R.; Patterson, D. A.; Russell, G. L.; Farrell, A.P.; Hinch, S. G.

2010-01-01

Short episodic high temperature events can be lethal for migrating adult Pacific salmon (Oncorhynchus spp.). We downscaled temperatures for the Fraser River, British Columbia to evaluate the impact of climate warming on the frequency of exceeding thermal thresholds associated with salmon migratory success. Alarmingly, a modest 1.0 C increase in average summer water temperature over 100 years (1981-2000 to 2081-2100) tripled the number of days per year exceeding critical salmonid thermal thresholds (i.e. 19.0 C). Refined thresholds for two populations (Gates Creek and Weaver Creek) of sockeye salmon (Oncorhynchus nerka) were defined using physiological constraint models based on aerobic scope. While extreme temperatures leading to complete aerobic collapse remained unlikely under our warming scenario, both populations were increasingly forced to migrate upriver at reduced levels of aerobic performance (e.g. in 80% of future simulations, => 90% of salmon encountered temperatures exceeding population specific thermal optima for maximum aerobic scope; T(sub opt)) = 16.3 C for Gates Creek and T(sub sopt)=14.5 C for Weaver Creek). Assuming recent changes to river entry timing persist, we also predicted dramatic increases in the probability of freshwater mortality for Weaver Creek salmon due to reductions in aerobic, and general physiological, performance (e.g. in 42% of future simulations =>50% of Weaver Creek fish exceeded temperature thresholds associated with 0 - 60% of maximum aerobic scope). Potential for adaptation via directional selection on run-timing was more evident for the Weaver Creek population. Early entry Weaver Creek fish experienced 25% (range: 15 - 31%) more suboptimal temperatures than late entrants, compared with an 8% difference (range: 0 - 17%) between early and late Gates Creek fish. Our results emphasize the need to consider daily temperature variability in association with population-specific differences in behaviour and physiological constraints when forecasting impacts of climate change on migratory survival of aquatic species.

2-D Modeling of Nanoscale MOSFETs: Non-Equilibrium Green's Function Approach

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Electron-electron interaction is treated within Hartree approximation by solving NEGF and Poisson equations self-consistently. For the calculations presented here, parallelization is performed by distributing the solution of NEGF equations to various processors, energy wise. We present simulation of the "benchmark" MIT 25nm and 90nm MOSFETs and compare our results to those from the drift-diffusion simulator and the quantum-corrected results available. In the 25nm MOSFET, the channel length is less than ten times the electron wavelength, and the electron scattering time is comparable to its transit time. Our main results are: (1) Simulated drain subthreshold current characteristics are shown, where the potential profiles are calculated self-consistently by the corresponding simulation methods. The current predicted by our quantum simulation has smaller subthreshold slope of the Vg dependence which results in higher threshold voltage. (2) When gate oxide thickness is less than 2 nm, gate oxide leakage is a primary factor which determines off-current of a MOSFET (3) Using our 2-D NEGF simulator, we found several ways to drastically decrease oxide leakage current without compromising drive current. (4) Quantum mechanically calculated electron density is much smaller than the background doping density in the poly silicon gate region near oxide interface. This creates an additional effective gate voltage. Different ways to. include this effect approximately will be discussed.

Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

NASA Astrophysics Data System (ADS)

Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir

2013-11-01

This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.

Device optimization and scaling properties of a gate-on-germanium source tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Chattopadhyay, Avik; Mallik, Abhijit; Omura, Yasuhisa

2015-06-01

A gate-on-germanium source (GoGeS) tunnel field-effect transistor (TFET) shows great promise for low-power (sub-0.5 V) applications. A detailed investigation, with the help of a numerical device simulator, on the effects of variation in different structural parameters of a GoGeS TFET on its electrical performance is reported in this paper. Structural parameters such as κ-value of the gate dielectric, length and κ-value of the spacer, and doping concentrations of both the substrate and source are considered. A low-κ symmetric spacer and a high-κ gate dielectric are found to yield better device performance. The substrate doping influences only the p-i-n leakage floor. The source doping is found to significantly affect performance parameters such as OFF-state current, ON-state current and subthreshold swing, in addition to a threshold voltage shift. Results of the investigation on the gate length scaling of such devices are also reported in this paper.

Hysteresis-Free Carbon Nanotube Field-Effect Transistors.

PubMed

Park, Rebecca S; Hills, Gage; Sohn, Joon; Mitra, Subhasish; Shulaker, Max M; Wong, H-S Philip

2017-05-23

While carbon nanotube (CNT) field-effect transistors (CNFETs) promise high-performance and energy-efficient digital systems, large hysteresis degrades these potential CNFET benefits. As hysteresis is caused by traps surrounding the CNTs, previous works have shown that clean interfaces that are free of traps are important to minimize hysteresis. Our previous findings on the sources and physics of hysteresis in CNFETs enabled us to understand the influence of gate dielectric scaling on hysteresis. To begin with, we validate through simulations how scaling the gate dielectric thickness results in greater-than-expected benefits in reducing hysteresis. Leveraging this insight, we experimentally demonstrate reducing hysteresis to <0.5% of the gate-source voltage sweep range using a very large-scale integration compatible and solid-state technology, simply by fabricating CNFETs with a thin effective oxide thickness of 1.6 nm. However, even with negligible hysteresis, large subthreshold swing is still observed in the CNFETs with multiple CNTs per transistor. We show that the cause of large subthreshold swing is due to threshold voltage variation between individual CNTs. We also show that the source of this threshold voltage variation is not explained solely by variations in CNT diameters (as is often ascribed). Rather, other factors unrelated to the CNTs themselves (i.e., process variations, random fixed charges at interfaces) are a significant factor in CNT threshold voltage variations and thus need to be further improved.

Performance analysis of SiGe double-gate N-MOSFET

NASA Astrophysics Data System (ADS)

Singh, A.; Kapoor, D.; Sharma, R.

2017-04-01

The major purpose of this paper is to find an alternative configuration that not only minimizes the limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET. The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool. Moreover, we have designed its structure and studied both {I}{{d}}{-}{V}{{g}} characteristics for different voltages namely 0.05, 0.1, 0.5, 0.8, 1 and 1.5 V and {I}{{d}}{-}{V}{{d}} characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.

Trilayer TMDC Heterostructures for MOSFETs and Nanobiosensors

NASA Astrophysics Data System (ADS)

Datta, Kanak; Shadman, Abir; Rahman, Ehsanur; Khosru, Quazi D. M.

2017-02-01

Two dimensional materials such as transition metal dichalcogenides (TMDC) and their bi-layer/tri-layer heterostructures have become the focus of intense research and investigation in recent years due to their promising applications in electronics and optoelectronics. In this work, we have explored device level performance of trilayer TMDC heterostructure (MoS2/MX2/MoS2; M = Mo or, W and X = S or, Se) metal oxide semiconductor field effect transistors (MOSFETs) in the quantum ballistic regime. Our simulation shows that device `on' current can be improved by inserting a WS2 monolayer between two MoS2 monolayers. Application of biaxial tensile strain reveals a reduction in drain current which can be attributed to the lowering of carrier effective mass with increased tensile strain. In addition, it is found that gate underlap geometry improves electrostatic device performance by improving sub-threshold swing. However, increase in channel resistance reduces drain current. Besides exploring the prospect of these materials in device performance, novel trilayer TMDC heterostructure double gate field effect transistors (FETs) are proposed for sensing Nano biomolecules as well as for pH sensing. Bottom gate operation ensures these FETs operating beyond Nernst limit of 59 mV/pH. Simulation results found in this work reveal that scaling of bottom gate oxide results in better sensitivity while top oxide scaling exhibits an opposite trend. It is also found that, for identical operating conditions, proposed TMDC FET pH sensors show super-Nernst sensitivity indicating these materials as potential candidates in implementing such sensor. Besides pH sensing, all these materials show high sensitivity in the sub-threshold region as a channel material in nanobiosensor while MoS2/WS2/MoS2 FET shows the least sensitivity among them.

A computational study of a novel graphene nanoribbon field effect transistor

NASA Astrophysics Data System (ADS)

Ghoreishi, Seyed Saleh; Yousefi, Reza

2017-04-01

In this paper, using gate structure engineering and modification of channel dopant profile, we propose a new double gate graphene nanoribbon field effect transistor (DG-GNRFET) mainly to suppress the band-to-band tunneling (BTBT) of carriers. In the new device, the intrinsic part of the channel is replaced by an intrinsic-lightly doped-intrinsic (I -N--I) configuration in a way that only the intrinsic parts are covered by the gate contact. Transport characteristics of the device are investigated theoretically using the nonequilibrium Green’s function (NEGF) formalism. Numerical simulations show that off-current, ambipolar behavior, on/off-current ratio and the switching characteristics such as intrinsic delay and power-delay product are improved. In addition, the new device demonstrates better sub-threshold swing and less drain-induced barrier lowering (DIBL).

Analysis of stability improvement in ZnO thin film transistor with dual-gate structure under negative bias stress

NASA Astrophysics Data System (ADS)

Yun, Ho-Jin; Kim, Young-Su; Jeong, Kwang-Seok; Kim, Yu-Mi; Yang, Seung-dong; Lee, Hi-Deok; Lee, Ga-Won

2014-01-01

In this study, we fabricated dual-gate zinc oxide thin film transistors (ZnO TFTs) without additional processes and analyzed their stability characteristics under a negative gate bias stress (NBS) by comparison with conventional bottom-gate structures. The dual-gate device shows superior electrical parameters, such as subthreshold swing (SS) and on/off current ratio. NBS of VGS = -20 V with VDS = 0 was applied, resulting in a negative threshold voltage (Vth) shift. After applying stress for 1000 s, the Vth shift is 0.60 V in a dual-gate ZnO TFT, while the Vth shift is 2.52 V in a bottom-gate ZnO TFT. The stress immunity of the dual-gate device is caused by the change in field distribution in the ZnO channel by adding another gate as the technology computer aided design (TCAD) simulation shows. Additionally, in flicker noise analysis, a lower noise level with a different mechanism is observed in the dual-gate structure. This can be explained by the top side of the ZnO film having a larger crystal and fewer grain boundaries than the bottom side, which is revealed by the enhanced SS and XRD results. Therefore, the improved stability of the dual-gate ZnO TFT is greatly related to the E-field cancellation effect and crystal quality of the ZnO film.

Hard decoding algorithm for optimizing thresholds under general Markovian noise

NASA Astrophysics Data System (ADS)

Chamberland, Christopher; Wallman, Joel; Beale, Stefanie; Laflamme, Raymond

2017-04-01

Quantum error correction is instrumental in protecting quantum systems from noise in quantum computing and communication settings. Pauli channels can be efficiently simulated and threshold values for Pauli error rates under a variety of error-correcting codes have been obtained. However, realistic quantum systems can undergo noise processes that differ significantly from Pauli noise. In this paper, we present an efficient hard decoding algorithm for optimizing thresholds and lowering failure rates of an error-correcting code under general completely positive and trace-preserving (i.e., Markovian) noise. We use our hard decoding algorithm to study the performance of several error-correcting codes under various non-Pauli noise models by computing threshold values and failure rates for these codes. We compare the performance of our hard decoding algorithm to decoders optimized for depolarizing noise and show improvements in thresholds and reductions in failure rates by several orders of magnitude. Our hard decoding algorithm can also be adapted to take advantage of a code's non-Pauli transversal gates to further suppress noise. For example, we show that using the transversal gates of the 5-qubit code allows arbitrary rotations around certain axes to be perfectly corrected. Furthermore, we show that Pauli twirling can increase or decrease the threshold depending upon the code properties. Lastly, we show that even if the physical noise model differs slightly from the hypothesized noise model used to determine an optimized decoder, failure rates can still be reduced by applying our hard decoding algorithm.

Quantifying the impact of respiratory-gated 4D CT acquisition on thoracic image quality: a digital phantom study.

PubMed

Bernatowicz, K; Keall, P; Mishra, P; Knopf, A; Lomax, A; Kipritidis, J

2015-01-01

Prospective respiratory-gated 4D CT has been shown to reduce tumor image artifacts by up to 50% compared to conventional 4D CT. However, to date no studies have quantified the impact of gated 4D CT on normal lung tissue imaging, which is important in performing dose calculations based on accurate estimates of lung volume and structure. To determine the impact of gated 4D CT on thoracic image quality, the authors developed a novel simulation framework incorporating a realistic deformable digital phantom driven by patient tumor motion patterns. Based on this framework, the authors test the hypothesis that respiratory-gated 4D CT can significantly reduce lung imaging artifacts. Our simulation framework synchronizes the 4D extended cardiac torso (XCAT) phantom with tumor motion data in a quasi real-time fashion, allowing simulation of three 4D CT acquisition modes featuring different levels of respiratory feedback: (i) "conventional" 4D CT that uses a constant imaging and couch-shift frequency, (ii) "beam paused" 4D CT that interrupts imaging to avoid oversampling at a given couch position and respiratory phase, and (iii) "respiratory-gated" 4D CT that triggers acquisition only when the respiratory motion fulfills phase-specific displacement gating windows based on prescan breathing data. Our framework generates a set of ground truth comparators, representing the average XCAT anatomy during beam-on for each of ten respiratory phase bins. Based on this framework, the authors simulated conventional, beam-paused, and respiratory-gated 4D CT images using tumor motion patterns from seven lung cancer patients across 13 treatment fractions, with a simulated 5.5 cm(3) spherical lesion. Normal lung tissue image quality was quantified by comparing simulated and ground truth images in terms of overall mean square error (MSE) intensity difference, threshold-based lung volume error, and fractional false positive/false negative rates. Averaged across all simulations and phase bins, respiratory-gating reduced overall thoracic MSE by 46% compared to conventional 4D CT (p ∼ 10(-19)). Gating leads to small but significant (p < 0.02) reductions in lung volume errors (1.8%-1.4%), false positives (4.0%-2.6%), and false negatives (2.7%-1.3%). These percentage reductions correspond to gating reducing image artifacts by 24-90 cm(3) of lung tissue. Similar to earlier studies, gating reduced patient image dose by up to 22%, but with scan time increased by up to 135%. Beam paused 4D CT did not significantly impact normal lung tissue image quality, but did yield similar dose reductions as for respiratory-gating, without the added cost in scanning time. For a typical 6 L lung, respiratory-gated 4D CT can reduce image artifacts affecting up to 90 cm(3) of normal lung tissue compared to conventional acquisition. This image improvement could have important implications for dose calculations based on 4D CT. Where image quality is less critical, beam paused 4D CT is a simple strategy to reduce imaging dose without sacrificing acquisition time.

Compact universal logic gates realized using quantization of current in nanodevices.

PubMed

Zhang, Wancheng; Wu, Nan-Jian; Yang, Fuhua

2007-12-12

This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.

Fabrication of amorphous InGaZnO thin-film transistor with solution processed SrZrO3 gate insulator

NASA Astrophysics Data System (ADS)

Takahashi, Takanori; Oikawa, Kento; Hoga, Takeshi; Uraoka, Yukiharu; Uchiyama, Kiyoshi

2017-10-01

In this paper, we describe a method of fabrication of thin film transistors (TFTs) with high dielectric constant (high-k) gate insulator by a solution deposition. We chose a solution processed SrZrO3 as a gate insulator material, which possesses a high dielectric constant of 21 with smooth surface. The IGZO-TFT with solution processed SrZrO3 showed good switching property and enough saturation features, i.e. field effect mobility of 1.7cm2/Vs, threshold voltage of 4.8V, sub-threshold swing of 147mV/decade, and on/off ratio of 2.3×107. Comparing to the TFTs with conventional SiO2 gate insulator, the sub-threshold swing was improved by smooth surface and high field effect due to the high dielectric constant of SrZrO3. These results clearly showed that use of solution processed high-k SrZrO3 gate insulator could improve sub-threshold swing. In addition, the residual carbon originated from organic precursors makes TFT performances degraded.

Effect of gate bias sweep rate on the threshold voltage of in-plane gate nanowire transistor

NASA Astrophysics Data System (ADS)

Liu, H. X.; Li, J.; Tan, R. R.

2018-01-01

In2O3 nanowire electric-double-layer (EDL) transistors with in-plane gate gated by SiO2 solid-electrolyte are fabricated on transparent glass substrates. The gate voltage sweep rates can effectively modulate the threshold voltage (Vth) of nanowire device. Both depletion mode and enhancement mode are realized, and the Vth shift of the nanowire transistors is estimated to be 0.73V (without light). This phenomenon is due to increased adsorption of oxygen on the nanowire surface by the slower gate voltage sweep rates. Adsorbed oxygens capture electrons and cause a surface of nanowire channel was depleted. The operation voltage of transistor was 1.0 V, because the EDL gate dielectric can lead to high gate dielectric capacitance. These transparent in-plane gate nanowire transistors are promising for “see-through” nanoscale sensors.

Modeling Proton Irradiation in AlGaN/GaN HEMTs: Understanding the Increase of Critical Voltage

NASA Astrophysics Data System (ADS)

Patrick, Erin; Law, Mark E.; Liu, Lu; Cuervo, Camilo Velez; Xi, Yuyin; Ren, Fan; Pearton, Stephen J.

2013-12-01

A combination of TRIM and FLOODS models the effect of radiation damage on AlGaN/GaN HEMTs. While excellent fits are obtained for threshold voltage shift, the models do not fully explain the increased reliability observed experimentally. In short, the addition of negatively-charged traps in the GaN buffer layer does not significantly change the electric field at the gate edges at radiation fluence levels seen in this study. We propose that negative trapped charge at the nitride/AlGaN interface actually produces the virtual-gate effect that results in decreasing the magnitude of the electric field at the gate edges and thus the increase in critical voltage. Simulation results including nitride interface charge show significant changes in electric field profiles while the I-V device characteristics do not change.

Satellite rainfall retrieval by logistic regression

NASA Technical Reports Server (NTRS)

Chiu, Long S.

1986-01-01

The potential use of logistic regression in rainfall estimation from satellite measurements is investigated. Satellite measurements provide covariate information in terms of radiances from different remote sensors.The logistic regression technique can effectively accommodate many covariates and test their significance in the estimation. The outcome from the logistical model is the probability that the rainrate of a satellite pixel is above a certain threshold. By varying the thresholds, a rainrate histogram can be obtained, from which the mean and the variant can be estimated. A logistical model is developed and applied to rainfall data collected during GATE, using as covariates the fractional rain area and a radiance measurement which is deduced from a microwave temperature-rainrate relation. It is demonstrated that the fractional rain area is an important covariate in the model, consistent with the use of the so-called Area Time Integral in estimating total rain volume in other studies. To calibrate the logistical model, simulated rain fields generated by rainfield models with prescribed parameters are needed. A stringent test of the logistical model is its ability to recover the prescribed parameters of simulated rain fields. A rain field simulation model which preserves the fractional rain area and lognormality of rainrates as found in GATE is developed. A stochastic regression model of branching and immigration whose solutions are lognormally distributed in some asymptotic limits has also been developed.

Biophysical mechanism of spike threshold dependence on the rate of rise of the membrane potential by sodium channel inactivation or subthreshold axonal potassium current

PubMed Central

Wester, Jason C.

2013-01-01

Spike threshold filters incoming inputs and thus gates activity flow through neuronal networks. Threshold is variable, and in many types of neurons there is a relationship between the threshold voltage and the rate of rise of the membrane potential (dVm/dt) leading to the spike. In primary sensory cortex this relationship enhances the sensitivity of neurons to a particular stimulus feature. While Na+ channel inactivation may contribute to this relationship, recent evidence indicates that K+ currents located in the spike initiation zone are crucial. Here we used a simple Hodgkin-Huxley biophysical model to systematically investigate the role of K+ and Na+ current parameters (activation voltages and kinetics) in regulating spike threshold as a function of dVm/dt. Threshold was determined empirically and not estimated from the shape of the Vm prior to a spike. This allowed us to investigate intrinsic currents and values of gating variables at the precise voltage threshold. We found that Na+ inactivation is sufficient to produce the relationship provided it occurs at hyperpolarized voltages combined with slow kinetics. Alternatively, hyperpolarization of the K+ current activation voltage, even in the absence of Na+ inactivation, is also sufficient to produce the relationship. This hyperpolarized shift of K+ activation allows an outward current prior to spike initiation to antagonize the Na+ inward current such that it becomes self-sustaining at a more depolarized voltage. Our simulations demonstrate parameter constraints on Na+ inactivation and the biophysical mechanism by which an outward current regulates spike threshold as a function of dVm/dt. PMID:23344915

The effects of electric field and gate bias pulse on the migration and stability of ionized oxygen vacancies in amorphous In–Ga–Zn–O thin film transistors

PubMed Central

Oh, Young Jun; Noh, Hyeon-Kyun; Chang, Kee Joo

2015-01-01

Oxygen vacancies have been considered as the origin of threshold voltage instability under negative bias illumination stress in amorphous oxide thin film transistors. Here we report the results of first-principles molecular dynamics simulations for the drift motion of oxygen vacancies. We show that oxygen vacancies, which are initially ionized by trapping photoexcited hole carriers, can easily migrate under an external electric field. Thus, accumulated hole traps near the channel/dielectric interface cause negative shift of the threshold voltage, supporting the oxygen vacancy model. In addition, we find that ionized oxygen vacancies easily recover their neutral defect configurations by capturing electrons when the Fermi level increases. Our results are in good agreement with the experimental observation that applying a positive gate bias pulse of short duration eliminates hole traps and thus leads to the recovery of device stability from persistent photoconductivity. PMID:27877799

Performance evaluation of bottom gate ZnO based thin film transistors with different W/L ratios for UV sensing

NASA Astrophysics Data System (ADS)

Varma, Tarun; Periasamy, C.; Boolchandani, Dharmendar

2018-02-01

In this paper, we report the simulation, fabrication and characterisation of UV photo-detectors with bottom gate ZnO Thin Film Transistors (TFTs), grown on silicon at room temperature using RF magnetron sputtering process. The static performance of these detectors have been explored by varying the channel lengths (6 μm and 12 μm). The fabricated devices show low leakage currents with threshold voltages of 1.18 & 2.33 V, sub-threshold swings of 13.5 & 12.8 V/dec for channel lengths of 6 μm and 12 μm TFT, respectively. They also exhibit superior electrical characteristics with an ON-OFF ratio of the order of 3. The detector was also tested for device stability, with the transfer characteristics of the TFTs, which got deteriorated mainly by the negative bias-stress. The TFTs were further tested for UV detector applications and found to exhibit good photo-response.

2D modeling based comprehensive analysis of short channel effects in DMG strained VSTB FET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Sarkar, Subir Kumar

2018-06-01

The paper aims to develop two dimensional analytical model of the proposed dual material (DM) Vertical Super Thin Body (VSTB) strained Field Effect Transistor (FET) with focus on its short channel behaviour in nanometer regime. Electrostatic potential across gate/channel and dielectric wall/channel interface is derived by solving 2D Poisson's equation with parabolic approximation method by applying appropriate boundary conditions. Threshold voltage is then calculated by using the criteria of minimum surface potential considering both gate and dielectric wall side potential. Performance analysis of the present structure is demonstrated in terms of potential, electric field, threshold voltage characteristics and subthreshold behaviour by varying various device parameters and applied biases. Effect of application of strain in channel is further explored to establish the superiority of the proposed device in comparison to conventional VSTB FET counterpart. All analytical results are compared with Silvaco ATLAS device simulated data to substantiate the accuracy of our derived model.

Gate engineered heterostructure junctionless TFET with Gaussian doping profile for ambipolar suppression and electrical performance improvement

NASA Astrophysics Data System (ADS)

Aghandeh, Hadi; Sedigh Ziabari, Seyed Ali

2017-11-01

This study investigates a junctionless tunnel field-effect transistor with a dual material gate and a heterostructure channel/source interface (DMG-H-JLTFET). We find that using the heterostructure interface improves device behavior by reducing the tunneling barrier width at the channel/source interface. Simultaneously, the dual material gate structure decreases ambipolar current by increasing the tunneling barrier width at the drain/channel interface. The performance of the device is analyzed based on the energy band diagram at on, off, and ambipolar states. Numerical simulations demonstrate improvements in ION, IOFF, ION/IOFF, subthreshold slope (SS), transconductance and cut-off frequency and suppressed ambipolar behavior. Next, the workfunction optimization of dual material gate is studied. It is found that if appropriate workfunctions are selected for tunnel and auxiliary gates, the JLTFET exhibits considerably improved performance. We then study the influence of Gaussian doping distribution at the drain and the channel on the ambipolar performance of the device and find that a Gaussian doping profile and a dual material gate structure remarkably reduce ambipolar current. Gaussian doped DMG-H-JLTFET, also exhibits enhanced IOFF, ION/IOFF, SS and a low threshold voltage without degrading IOFF.

Ionizing radiation detector

DOEpatents

Thacker, Louis H.

1990-01-01

An ionizing radiation detector is provided which is based on the principle of analog electronic integration of radiation sensor currents in the sub-pico to nano ampere range between fixed voltage switching thresholds with automatic voltage reversal each time the appropriate threshold is reached. The thresholds are provided by a first NAND gate Schmitt trigger which is coupled with a second NAND gate Schmitt trigger operating in an alternate switching state from the first gate to turn either a visible or audible indicating device on and off in response to the gate switching rate which is indicative of the level of radiation being sensed. The detector can be configured as a small, personal radiation dosimeter which is simple to operate and responsive over a dynamic range of at least 0.01 to 1000 R/hr.

Quiescent period respiratory gating for PET∕CT

PubMed Central

Liu, Chi; Alessio, Adam; Pierce, Larry; Thielemans, Kris; Wollenweber, Scott; Ganin, Alexander; Kinahan, Paul

2010-01-01

Purpose: To minimize respiratory motion artifacts, this work proposes quiescent period gating (QPG) methods that extract PET data from the end-expiration quiescent period and form a single PET frame with reduced motion and improved signal-to-noise properties. Methods: Two QPG methods are proposed and evaluated. Histogram-based quiescent period gating (H-QPG) extracts a fraction of PET data determined by a window of the respiratory displacement signal histogram. Cycle-based quiescent period gating (C-QPG) extracts data with a respiratory displacement signal below a specified threshold of the maximum amplitude of each individual respiratory cycle. Performances of both QPG methods were compared to ungated and five-bin phase-gated images across 21 FDG-PET∕CT patient data sets containing 31 thorax and abdomen lesions as well as with computer simulations driven by 1295 different patient respiratory traces. Image quality was evaluated in terms of the lesion SUVmax and the fraction of counts included in each gate as a surrogate for image noise. Results: For all the gating methods, image noise artifactually increases SUVmax when the fraction of counts included in each gate is less than 50%. While simulation data show that H-QPG is superior to C-QPG, the H-QPG and C-QPG methods lead to similar quantification-noise tradeoffs in patient data. Compared to ungated images, both QPG methods yield significantly higher lesion SUVmax. Compared to five-bin phase gating, the QPG methods yield significantly larger fraction of counts with similar SUVmax improvement. Both QPG methods result in increased lesion SUVmax for patients whose lesions have longer quiescent periods. Conclusions: Compared to ungated and phase-gated images, the QPG methods lead to images with less motion blurring and an improved compromise between SUVmax and fraction of counts. The QPG methods for respiratory motion compensation could effectively improve tumor quantification with minimal noise increase. PMID:20964223

Simulation, fabrication and characterization of ZnO based thin film transistors grown by radio frequency magnetron sputtering.

PubMed

Singh, Shaivalini; Chakrabarti, P

2012-03-01

We report the performance of the thin film transistors (TFTs) using ZnO as an active channel layer grown by radio frequency (RF) magnetron sputtering technique. The bottom gate type TFT, consists of a conventional thermally grown SiO2 as gate insulator onto p-type Si substrates. The X-ray diffraction patterns reveal that the ZnO films are preferentially orientated in the (002) plane, with the c-axis perpendicular to the substrate. A typical ZnO TFT fabricated by this method exhibits saturation field effect mobility of about 0.6134 cm2/V s, an on to off ratio of 102, an off current of 2.0 x 10(-7) A, and a threshold voltage of 3.1 V at room temperature. Simulation of this TFT is also carried out by using the commercial software modeling tool ATLAS from Silvaco-International. The simulated global characteristics of the device were compared and contrasted with those measured experimentally. The experimental results are in fairly good agreement with those obtained from simulation.

Quantifying the impact of respiratory-gated 4D CT acquisition on thoracic image quality: A digital phantom study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bernatowicz, K., E-mail: kingab@student.ethz.ch; Knopf, A.; Lomax, A.

Purpose: Prospective respiratory-gated 4D CT has been shown to reduce tumor image artifacts by up to 50% compared to conventional 4D CT. However, to date no studies have quantified the impact of gated 4D CT on normal lung tissue imaging, which is important in performing dose calculations based on accurate estimates of lung volume and structure. To determine the impact of gated 4D CT on thoracic image quality, the authors developed a novel simulation framework incorporating a realistic deformable digital phantom driven by patient tumor motion patterns. Based on this framework, the authors test the hypothesis that respiratory-gated 4D CTmore » can significantly reduce lung imaging artifacts. Methods: Our simulation framework synchronizes the 4D extended cardiac torso (XCAT) phantom with tumor motion data in a quasi real-time fashion, allowing simulation of three 4D CT acquisition modes featuring different levels of respiratory feedback: (i) “conventional” 4D CT that uses a constant imaging and couch-shift frequency, (ii) “beam paused” 4D CT that interrupts imaging to avoid oversampling at a given couch position and respiratory phase, and (iii) “respiratory-gated” 4D CT that triggers acquisition only when the respiratory motion fulfills phase-specific displacement gating windows based on prescan breathing data. Our framework generates a set of ground truth comparators, representing the average XCAT anatomy during beam-on for each of ten respiratory phase bins. Based on this framework, the authors simulated conventional, beam-paused, and respiratory-gated 4D CT images using tumor motion patterns from seven lung cancer patients across 13 treatment fractions, with a simulated 5.5 cm{sup 3} spherical lesion. Normal lung tissue image quality was quantified by comparing simulated and ground truth images in terms of overall mean square error (MSE) intensity difference, threshold-based lung volume error, and fractional false positive/false negative rates. Results: Averaged across all simulations and phase bins, respiratory-gating reduced overall thoracic MSE by 46% compared to conventional 4D CT (p ∼ 10{sup −19}). Gating leads to small but significant (p < 0.02) reductions in lung volume errors (1.8%–1.4%), false positives (4.0%–2.6%), and false negatives (2.7%–1.3%). These percentage reductions correspond to gating reducing image artifacts by 24–90 cm{sup 3} of lung tissue. Similar to earlier studies, gating reduced patient image dose by up to 22%, but with scan time increased by up to 135%. Beam paused 4D CT did not significantly impact normal lung tissue image quality, but did yield similar dose reductions as for respiratory-gating, without the added cost in scanning time. Conclusions: For a typical 6 L lung, respiratory-gated 4D CT can reduce image artifacts affecting up to 90 cm{sup 3} of normal lung tissue compared to conventional acquisition. This image improvement could have important implications for dose calculations based on 4D CT. Where image quality is less critical, beam paused 4D CT is a simple strategy to reduce imaging dose without sacrificing acquisition time.« less

Irradiation of MOS-FET devices to provide desired logic functions

NASA Technical Reports Server (NTRS)

Danchenko, V.; Schaefer, D. H.

1972-01-01

Gamma, X-ray, electron, or other radiation is used to shift threshold potentials of MOS devices on logic circuits. Before irradiation MOS gates to be shifted are biased positive and other gates are grounded to substrate. Threshold lasts 10 years. Thermal annealing brings circuit back to original configuration.

Lower-upper-threshold correlation for underwater range-gated imaging self-adaptive enhancement.

PubMed

Sun, Liang; Wang, Xinwei; Liu, Xiaoquan; Ren, Pengdao; Lei, Pingshun; He, Jun; Fan, Songtao; Zhou, Yan; Liu, Yuliang

2016-10-10

In underwater range-gated imaging (URGI), enhancement of low-brightness and low-contrast images is critical for human observation. Traditional histogram equalizations over-enhance images, with the result of details being lost. To compress over-enhancement, a lower-upper-threshold correlation method is proposed for underwater range-gated imaging self-adaptive enhancement based on double-plateau histogram equalization. The lower threshold determines image details and compresses over-enhancement. It is correlated with the upper threshold. First, the upper threshold is updated by searching for the local maximum in real time, and then the lower threshold is calculated by the upper threshold and the number of nonzero units selected from a filtered histogram. With this method, the backgrounds of underwater images are constrained with enhanced details. Finally, the proof experiments are performed. Peak signal-to-noise-ratio, variance, contrast, and human visual properties are used to evaluate the objective quality of the global and regions of interest images. The evaluation results demonstrate that the proposed method adaptively selects the proper upper and lower thresholds under different conditions. The proposed method contributes to URGI with effective image enhancement for human eyes.

Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

NASA Astrophysics Data System (ADS)

Nikodem, Maciej; Bawiec, Marek A.; Surmacz, Tomasz R.

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today's technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.

An in-depth analysis of temperature effect on DIBL in UTBB FD SOI MOSFETs based on experimental data, numerical simulations and analytical models

NASA Astrophysics Data System (ADS)

Pereira, A. S. N.; de Streel, G.; Planes, N.; Haond, M.; Giacomini, R.; Flandre, D.; Kilchytska, V.

2017-02-01

The Drain Induced Barrier Lowering (DIBL) behavior in Ultra-Thin Body and Buried oxide (UTBB) transistors is investigated in details in the temperature range up to 150 °C, for the first time to the best of our knowledge. The analysis is based on experimental data, physical device simulation, compact model (SPICE) simulation and previously published models. Contrary to MASTAR prediction, experiments reveal DIBL increase with temperature. Physical device simulations of different thin-film fully-depleted (FD) devices outline the generality of such behavior. SPICE simulations, with UTSOI DK2.4 model, only partially adhere to experimental trends. Several analytic models available in the literature are assessed for DIBL vs. temperature prediction. Although being the closest to experiments, Fasarakis' model overestimates DIBL(T) dependence for shortest devices and underestimates it for upsized gate lengths frequently used in ultra-low-voltage (ULV) applications. This model is improved in our work, by introducing a temperature-dependent inversion charge at threshold. The improved model shows very good agreement with experimental data, with high gain in precision for the gate lengths under test.

Fabrication of quantum dots in undoped Si/Si 0.8Ge 0.2 heterostructures using a single metal-gate layer

DOE PAGES

Lu, T. M.; Gamble, J. K.; Muller, R. P.; ...

2016-08-01

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for their potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30%. Here, we report the fabrication and low-temperature characterization of quantum dots in the Si/Si 0.8Ge 0.2 heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 μm increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratiomore » used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. Furthermore, the device uses only a single metal-gate layer, greatly simplifying device design and fabrication.« less

Quantum ballistic analysis of transition metal dichalcogenides based double gate junctionless field effect transistor and its application in nano-biosensor

NASA Astrophysics Data System (ADS)

Shadman, Abir; Rahman, Ehsanur; Khosru, Quazi D. M.

2017-11-01

To reduce the thermal budget and the short channel effects in state of the art CMOS technology, Junctionless field effect transistor (JLFET) has been proposed in the literature. Numerous experimental, modeling, and simulation based works have been done on this new FET with bulk materials for various geometries until now. On the other hand, the two-dimensional layered material is considered as an alternative to current Si technology because of its ultra-thin body and high mobility. Very recently few simulation based works have been done on monolayer molybdenum disulfide based JLFET mainly to show the advantage of JLFET over conventional FET. However, no comprehensive simulation-based work has been done for double gate JLFET keeping in mind the prominent transition metal dichalcogenides (TMDC) to the authors' best knowledge. In this work, we have studied quantum ballistic drain current-gate voltage characteristics of such FETs within non-equilibrium Green's function (NEGF) framework. Our simulation results reveal that all these TMDC materials are viable options for implementing state of the art Junctionless MOSFET with emphasis on their performance at short gate lengths. Besides evaluating the prospect of TMDC materials in the digital logic application, the performance of Junctionless Double Gate trilayer TMDC heterostructure FET for the label-free electrical detection of biomolecules in dry environment has been investigated for the first time to the authors' best knowledge. The impact of charge neutral biomolecules on the electrical characteristics of the biosensor has been analyzed under dry environment situation. Our study shows that these materials could provide high sensitivity in the sub-threshold region as a channel material in nano-biosensor, a trend demonstrated by silicon on insulator FET sensor in the literature. Thus, going by the trend of replacing silicon with these novel materials in device level, TMDC heterostructure could be a viable alternative to silicon for potentiometric biosensing.

Optimal thresholds for the estimation of area rain-rate moments by the threshold method

NASA Technical Reports Server (NTRS)

Short, David A.; Shimizu, Kunio; Kedem, Benjamin

1993-01-01

Optimization of the threshold method, achieved by determination of the threshold that maximizes the correlation between an area-average rain-rate moment and the area coverage of rain rates exceeding the threshold, is demonstrated empirically and theoretically. Empirical results for a sequence of GATE radar snapshots show optimal thresholds of 5 and 27 mm/h for the first and second moments, respectively. Theoretical optimization of the threshold method by the maximum-likelihood approach of Kedem and Pavlopoulos (1991) predicts optimal thresholds near 5 and 26 mm/h for lognormally distributed rain rates with GATE-like parameters. The agreement between theory and observations suggests that the optimal threshold can be understood as arising due to sampling variations, from snapshot to snapshot, of a parent rain-rate distribution. Optimal thresholds for gamma and inverse Gaussian distributions are also derived and compared.

Effects of passive and active movement on vibrotactile detection thresholds of the Pacinian channel and forward masking.

PubMed

Yıldız, Mustafa Z; Toker, İpek; Özkan, Fatma B; Güçlü, Burak

2015-01-01

We investigated the gating effect of passive and active movement on the vibrotactile detection thresholds of the Pacinian (P) psychophysical channel and forward masking. Previous work on gating mostly used electrocutaneous stimulation and did not allow focusing on tactile submodalities. Ten healthy adults participated in our study. Passive movement was achieved by swinging a platform, on which the participant's stimulated hand was attached, manually by a trained operator. The root-mean-square value of the movement speed was kept in a narrow range (slow: 10-20 cm/s, fast: 50-60 cm/s). Active movement was performed by the participant him-/herself using the same apparatus. The tactile stimuli consisted of 250-Hz sinusoidal mechanical vibrations, which were generated by a shaker mounted on the movement platform and applied to the middle fingertip. In the forward-masking experiments, a high-level masking stimulus preceded the test stimulus. Each movement condition was tested separately in a two-interval forced-choice detection task. Both passive and active movement caused a robust gating effect, that is, elevation of thresholds, in the fast speed range. Statistically significant change of thresholds was not found in slow movement conditions. Passive movement yielded higher thresholds than those measured during active movement, but this could not be confirmed statistically. On the other hand, the effect of forward masking was approximately constant as the movement condition varied. These results imply that gating depends on both peripheral and central factors in the P channel. Active movement may have some facilitatory role and produce less gating. Additionally, the results support the hypothesis regarding a critical speed for gating, which may be relevant for daily situations involving vibrations transmitted through grasped objects and for manual exploration.

Design and optimization analysis of dual material gate on DG-IMOS

NASA Astrophysics Data System (ADS)

Singh, Sarabdeep; Raman, Ashish; Kumar, Naveen

2017-12-01

An impact ionization MOSFET (IMOS) is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope (SS) of conventional MOSFET at room temperature. In this work, first, the device performance of the p-type double gate impact ionization MOSFET (DG-IMOS) is optimized by adjusting the device design parameters. The adjusted parameters are ratio of gate and intrinsic length, gate dielectric thickness and gate work function. Secondly, the DMG (dual material gate) DG-IMOS is proposed and investigated. This DMG DG-IMOS is further optimized to obtain the best possible performance parameters. Simulation results reveal that DMG DG-IMOS when compared to DG-IMOS, shows better I ON, I ON/I OFF ratio, and RF parameters. Results show that by properly tuning the lengths of two materials at a ratio of 1.5 in DMG DG-IMOS, optimized performance is achieved including I ON/I OFF ratio of 2.87 × 109 A/μm with I ON as 11.87 × 10-4 A/μm and transconductance of 1.06 × 10-3 S/μm. It is analyzed that length of drain side material should be greater than the length of source side material to attain the higher transconductance in DMG DG-IMOS.

Dynamic and Tunable Threshold Voltage in Organic Electrochemical Transistors.

PubMed

Doris, Sean E; Pierre, Adrien; Street, Robert A

2018-04-01

In recent years, organic electrochemical transistors (OECTs) have found applications in chemical and biological sensing and interfacing, neuromorphic computing, digital logic, and printed electronics. However, the incorporation of OECTs in practical electronic circuits is limited by the relative lack of control over their threshold voltage, which is important for controlling the power consumption and noise margin in complementary and unipolar circuits. Here, the threshold voltage of OECTs is precisely tuned over a range of more than 1 V by chemically controlling the electrochemical potential at the gate electrode. This threshold voltage tunability is exploited to prepare inverters and amplifiers with improved noise margin and gain, respectively. By coupling the gate electrode with an electrochemical oscillator, single-transistor oscillators based on OECTs with dynamic time-varying threshold voltages are prepared. This work highlights the importance of electrochemistry at the gate electrode in determining the electrical properties of OECTs, and opens a path toward the system-level design of low-power OECT-based electronics. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Analytical model of nanoscale junctionless transistors towards controlling of short channel effects through source/drain underlap and channel thickness engineering

NASA Astrophysics Data System (ADS)

Roy, Debapriya; Biswas, Abhijit

2018-01-01

We develop a 2D analytical subthreshold model for nanoscale double-gate junctionless transistors (DGJLTs) with gate-source/drain underlap. The model is validated using well-calibrated TCAD simulation deck obtained by comparing experimental data in the literature. To analyze and control short-channel effects, we calculate the threshold voltage, drain induced barrier lowering (DIBL) and subthreshold swing of DGJLTs using our model and compare them with corresponding simulation value at channel length of 20 nm with channel thickness tSi ranging 5-10 nm, gate-source/drain underlap (LSD) values 0-7 nm and source/drain doping concentrations (NSD) ranging 5-12 × 1018 cm-3. As tSi reduces from 10 to 5 nm DIBL drops down from 42.5 to 0.42 mV/V at NSD = 1019 cm-3 and LSD = 5 nm in contrast to decrement from 71 to 4.57 mV/V without underlap. For a lower tSiDIBL increases marginally with increasing NSD. The subthreshold swing reduces more rapidly with thinning of channel thickness rather than increasing LSD or decreasing NSD.

Design and simulation of nanoscale double-gate TFET/tunnel CNTFET

NASA Astrophysics Data System (ADS)

Bala, Shashi; Khosla, Mamta

2018-04-01

A double-gate tunnel field-effect transistor (DG tunnel FET) has been designed and investigated for various channel materials such as silicon (Si), gallium arsenide (GaAs), alminium gallium arsenide (Al x Ga1‑x As) and CNT using a nano ViDES Device and TCAD SILVACO ATLAS simulator. The proposed devices are compared on the basis of inverse subthreshold slope (SS), I ON/I OFF current ratio and leakage current. Using Si as the channel material limits the property to reduce leakage current with scaling of channel, whereas the Al x Ga1‑x As based DG tunnel FET provides a better I ON/I OFF current ratio (2.51 × 106) as compared to other devices keeping the leakage current within permissible limits. The performed silmulation of the CNT based channel in the double-gate tunnel field-effect transistor using the nano ViDES shows better performace for a sub-threshold slope of 29.4 mV/dec as the channel is scaled down. The proposed work shows the potential of the CNT channel based DG tunnel FET as a futuristic device for better switching and high retention time, which makes it suitable for memory based circuits.

Effects of drain bias on the statistical variation of double-gate tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Choi, Woo Young

2017-04-01

The effects of drain bias on the statistical variation of double-gate (DG) tunnel field-effect transistors (TFETs) are discussed in comparison with DG metal-oxide-semiconductor FETs (MOSFETs). Statistical variation corresponds to the variation of threshold voltage (V th), subthreshold swing (SS), and drain-induced barrier thinning (DIBT). The unique statistical variation characteristics of DG TFETs and DG MOSFETs with the variation of drain bias are analyzed by using full three-dimensional technology computer-aided design (TCAD) simulation in terms of the three dominant variation sources: line-edge roughness (LER), random dopant fluctuation (RDF) and workfunction variation (WFV). It is observed than DG TFETs suffer from less severe statistical variation as drain voltage increases unlike DG MOSFETs.

Threshold voltage control in TmSiO/HfO2 high-k/metal gate MOSFETs

NASA Astrophysics Data System (ADS)

Dentoni Litta, E.; Hellström, P.-E.; Östling, M.

2015-06-01

High-k interfacial layers have been proposed as a way to extend the scalability of Hf-based high-k/metal gate CMOS technology, which is currently limited by strong degradations in threshold voltage control, channel mobility and device reliability when the chemical oxide (SiOx) interfacial layer is scaled below 0.4 nm. We have previously demonstrated that thulium silicate (TmSiO) is a promising candidate as a high-k interfacial layer, providing competitive advantages in terms of EOT scalability and channel mobility. In this work, the effect of the TmSiO interfacial layer on threshold voltage control is evaluated, showing that the TmSiO/HfO2 dielectric stack is compatible with threshold voltage control techniques commonly used with SiOx/HfO2 stacks. Specifically, we show that the flatband voltage can be set in the range -1 V to +0.5 V by the choice of gate metal and that the effective workfunction of the stack is properly controlled by the metal workfunction in a gate-last process flow. Compatibility with a gate-first approach is also demonstrated, showing that integration of La2O3 and Al2O3 capping layers can induce a flatband voltage shift of at least 150 mV. Finally, the effect of the annealing conditions on flatband voltage is investigated, finding that the duration of the final forming gas anneal can be used as a further process knob to tune the threshold voltage. The evaluation performed on MOS capacitors is confirmed by the fabrication of TmSiO/HfO2/TiN MOSFETs achieving near-symmetric threshold voltages at sub-nm EOT.

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Kim, Hyeongnam; Nath, Digbijoy; Rajan, Siddharth; Lu, Wu

2013-01-01

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/ p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al0.2Ga0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al0.3Ga0.7N/GaN channel/Al0.2Ga0.8N/ p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80- μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al0.3GaN0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.

Three-Dimensional Color Code Thresholds via Statistical-Mechanical Mapping

NASA Astrophysics Data System (ADS)

Kubica, Aleksander; Beverland, Michael E.; Brandão, Fernando; Preskill, John; Svore, Krysta M.

2018-05-01

Three-dimensional (3D) color codes have advantages for fault-tolerant quantum computing, such as protected quantum gates with relatively low overhead and robustness against imperfect measurement of error syndromes. Here we investigate the storage threshold error rates for bit-flip and phase-flip noise in the 3D color code (3DCC) on the body-centered cubic lattice, assuming perfect syndrome measurements. In particular, by exploiting a connection between error correction and statistical mechanics, we estimate the threshold for 1D stringlike and 2D sheetlike logical operators to be p3DCC (1 )≃1.9 % and p3DCC (2 )≃27.6 % . We obtain these results by using parallel tempering Monte Carlo simulations to study the disorder-temperature phase diagrams of two new 3D statistical-mechanical models: the four- and six-body random coupling Ising models.

Gate length variation effect on performance of gate-first self-aligned In₀.₅₃Ga₀.₄₇As MOSFET.

PubMed

Mohd Razip Wee, Mohd F; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y

2013-01-01

A multi-gate n-type In₀.₅₃Ga₀.₄₇As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm(2)/Vs are achieved for the gate length and width of 0.2 µm and 30 µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10(-8) A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared.

Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET

PubMed Central

Mohd Razip Wee, Mohd F.; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y.

2013-01-01

A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm2/Vs are achieved for the gate length and width of 0.2 µm and 30µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10−8 A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared. PMID:24367548

Radiation hardening of MOS devices by boron. [for stabilizing gate threshold potential of field effect device

NASA Technical Reports Server (NTRS)

Danchenko, V. (Inventor)

1974-01-01

A technique is described for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device with a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. The boron is introduced within a layer of the oxide of about 100 A-300 A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 to the 18th power atoms/cu cm. The technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations.

Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

NASA Astrophysics Data System (ADS)

Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

2017-11-01

Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

Energetic mapping of oxide traps in MoS2 field-effect transistors

NASA Astrophysics Data System (ADS)

Illarionov, Yury Yu; Knobloch, Theresia; Waltl, Michael; Rzepa, Gerhard; Pospischil, Andreas; Polyushkin, Dmitry K.; Furchi, Marco M.; Mueller, Thomas; Grasser, Tibor

2017-06-01

The performance of MoS2 transistors is strongly affected by charge trapping in oxide traps with very broad distributions of time constants. These defects degrade the mobility and additionally lead to the hysteresis of the gate transfer characteristics, which presents a crucial performance and reliability issue for these new technologies. Here we perform a detailed study of the hysteresis in double-gated MoS2 FETs and show that this issue is nothing else than a combination of threshold voltage shifts resulting from positive and negative bias-temperature instabilities. While these instabilities are well known from silicon devices, they are even more important in 2D devices given the considerably larger defect densities. Most importantly, the magnitudes of these threshold voltage shifts depend strongly on the density and energetic alignment of the active oxide traps. Based on this, we introduce the incremental hysteresis sweep method which allows for an accurate mapping of these defects and extract their energy distributions from simulations. By applying our method to analyze the impact of oxide traps situated in the Al2O3 top gate of several devices, we confirm its versatility. Since all 2D devices investigated so far suffer from a similar hysteresis behavior, the incremental hysteresis sweep method provides a unique and powerful way for the detailed characterization of their defect bands.

Performance analysis of junctionless double gate VeSFET considering the effects of thermal variation - An explicit 2D analytical model

NASA Astrophysics Data System (ADS)

Chaudhary, Tarun; Khanna, Gargi

2017-03-01

The purpose of this paper is to explore junctionless double gate vertical slit field effect transistor (JLDG VeSFET) with reduced short channel effects and to develop an analytical threshold voltage model for the device considering the impact of thermal variations for the very first time. The model has been derived by solving 2D Poisson's equation and the effects of variation in temperature on various electrical parameters of the device such as Rout, drain current, mobility, subthreshold slope and DIBL has been studied and described in the paper. The model provides a deep physical insight of the device behavior and is also very helpful in contributing to the design space exploration for JLDG VeSFET. The proposed model is verified with simulative analysis at different radii of the device and it has been observed that there is a good agreement between the analytical model and simulation results.

Bias stress instability of double-gate a-IGZO TFTs on polyimide substrate

NASA Astrophysics Data System (ADS)

Cho, Won-Ju; Ahn, Min-Ju

2017-09-01

In this study, flexible double-gate thin-film transistor (TFT)-based amorphous indium-galliumzinc- oxide (a-IGZO) was fabricated on a polyimide substrate. Double-gate operation with connected front and back gates was compared with a single-gate operation. As a result, the double-gate a- IGZO TFT exhibited enhanced electrical characteristics as well as improved long-term reliability. Under positive- and negative-bias temperature stress, the threshold voltage shift of the double-gate operation was much smaller than that of the single-gate operation.

Electron transporting water-gated thin film transistors

NASA Astrophysics Data System (ADS)

Al Naim, Abdullah; Grell, Martin

2012-10-01

We demonstrate an electron-transporting water-gated thin film transistor, using thermally converted precursor-route zinc-oxide (ZnO) intrinsic semiconductors with hexamethyldisilazene (HMDS) hydrophobic surface modification. Water gated HMDS-ZnO thin film transistors (TFT) display low threshold and high electron mobility. ZnO films constitute an attractive alternative to organic semiconductors for TFT transducers in sensor applications for waterborne analytes. Despite the use of an electrolyte as gate medium, the gate geometry (shape of gate electrode and distance between gate electrode and TFT channel) is relevant for optimum performance of water-gated TFTs.

Significance of the gate voltage-dependent mobility in the electrical characterization of organic field effect transistors

NASA Astrophysics Data System (ADS)

Kim, Jong Beom; Lee, Dong Ryeol

2018-04-01

We studied the effect of the addition of free hole- and electron-rich organic molecules to organic semiconductors (OSCs) in organic field effect transistors (OFETs) on the gate voltage-dependent mobility. The drain current versus gate voltage characteristics were quantitatively analyzed using an OFET mobility model of power law behavior based on hopping transport in an OSC. This analysis distinguished the threshold voltage shifts, depending on the materials and structures of the OFET device, and properly estimated the hopping transport of the charge carriers induced by the gate bias within the OSC from the power law exponent parameter. The addition of pentacene or C60 molecules to a one-monolayer pentacene-based OFET shifted the threshold voltages negatively or positively, respectively, due to the structural changes that occurred in the OFET device. On the other hand, the power law parameters revealed that the addition of charge carriers of the same or opposite polarity enhanced or hindered hopping transport, respectively. This study revealed the need for a quantitative analysis of the gate voltage-dependent mobility while distinguishing this effect from the threshold voltage effect in order to understand OSC hopping transport in OFETs.

Variable-Threshold Threshold Elements,

DTIC Science & Technology

A threshold element is a mathematical model of certain types of logic gates and of a biological neuron. Much work has been done on the subject of... threshold elements with fixed thresholds; this study concerns itself with elements in which the threshold may be varied, variable- threshold threshold ...elements. Physical realizations include resistor-transistor elements, in which the threshold is simply a voltage. Variation of the threshold causes the

Comparative influence study of gate-formation structuring on Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors

NASA Astrophysics Data System (ADS)

Hsu, M. K.; Chiu, S. Y.; Wu, C. H.; Guo, D. F.; Lour, W. S.

2008-12-01

Pseudomorphic Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors (DH-HEMTs) fabricated with different gate-formation structures of a single-recess gate (SRG), a double-recess gate (DRG) and a field-plate gate (FPG) were comparatively investigated. FPG devices show the best breakdown characteristics among these devices due to great reduction in the peak electric field between the drain and gate electrodes. The measured gate-drain breakdown voltages defined at a 1 mA mm-1 reverse gate-drain current density were -15.3, -19.1 and -26.0 V for SRG, DRG and FPG devices, respectively. No significant differences in their room-temperature common-source current-voltage characteristics were observed. However, FPG devices exhibit threshold voltages being the least sensitive to temperature. Threshold voltages as a function of temperature indicate a threshold-voltage variation as low as -0.97 mV K-1 for FPG devices. According to the 2.4 GHz load-pull power measurement at VDS = 3.0 V and VGS = -0.5 V, the saturated output power (POUT), power gain (GP) and maximum power-added efficiency (PAE) were 10.3 dBm/13.2 dB/36.6%, 11.2 dBm/13.1 dB/39.7% and 13.06 dBm/12.8 dB/47.3%, respectively, for SRG, DRG and FPG devices with a pi-gate in class AB operation. When the FPG device is biased at a VDS of 10 V, the saturated power density is more than 600 mW mm-1.

Dynamical decoupling of local transverse random telegraph noise in a two-qubit gate

NASA Astrophysics Data System (ADS)

D'Arrigo, A.; Falci, G.; Paladino, E.

2015-10-01

Achieving high-fidelity universal two-qubit gates is a central requisite of any implementation of quantum information processing. The presence of spurious fluctuators of various physical origin represents a limiting factor for superconducting nanodevices. Operating qubits at optimal points, where the qubit-fluctuator interaction is transverse with respect to the single qubit Hamiltonian, considerably improved single qubit gates. Further enhancement has been achieved by dynamical decoupling (DD). In this article we investigate DD of transverse random telegraph noise acting locally on each of the qubits forming an entangling gate. Our analysis is based on the exact numerical solution of the stochastic Schrödinger equation. We evaluate the gate error under local periodic, Carr-Purcell and Uhrig DD sequences. We find that a threshold value of the number, n, of pulses exists above which the gate error decreases with a sequence-specific power-law dependence on n. Below threshold, DD may even increase the error with respect to the unconditioned evolution, a behaviour reminiscent of the anti-Zeno effect.

Three-Dimensional Color Code Thresholds via Statistical-Mechanical Mapping.

PubMed

Kubica, Aleksander; Beverland, Michael E; Brandão, Fernando; Preskill, John; Svore, Krysta M

2018-05-04

Three-dimensional (3D) color codes have advantages for fault-tolerant quantum computing, such as protected quantum gates with relatively low overhead and robustness against imperfect measurement of error syndromes. Here we investigate the storage threshold error rates for bit-flip and phase-flip noise in the 3D color code (3DCC) on the body-centered cubic lattice, assuming perfect syndrome measurements. In particular, by exploiting a connection between error correction and statistical mechanics, we estimate the threshold for 1D stringlike and 2D sheetlike logical operators to be p_{3DCC}^{(1)}≃1.9% and p_{3DCC}^{(2)}≃27.6%. We obtain these results by using parallel tempering Monte Carlo simulations to study the disorder-temperature phase diagrams of two new 3D statistical-mechanical models: the four- and six-body random coupling Ising models.

Rapidly reconfigurable all-optical universal logic gate

DOEpatents

Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.

2010-09-07

A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.

Investigation of AlGaN/GaN HEMTs degradation with gate pulse stressing at cryogenic temperature

NASA Astrophysics Data System (ADS)

Wang, Ning; Wang, Hui; Lin, Xinpeng; Qi, Yongle; Duan, Tianli; Jiang, Lingli; Iervolino, Elina; Cheng, Kai; Yu, Hongyu

2017-09-01

Degradation on DC characteristics of AlGaN/GaN high electron mobility transistors (HEMTs) after applying pulsed gate stress at cryogenic temperatures is presented in this paper. The nitrogen vacancy near to the AlGaN/GaN interface leads to threshold voltage of stress-free sample shifting positively at low temperature. The anomalous behavior of threshold voltage variation (decrease first and then increase) under gate stressing as compared to stress-free sample is observed when lowing temperature. This can be correlated with the pre-existing electron traps in SiNX layer or at SiNX/AlGaN interface which can be de-activated and the captured electrons inject back to channel with lowering temperature, which counterbalances the influence of nitrogen vacancy on threshold voltage shift.

An “ohmic-first” self-terminating gate-recess technique for normally-off Al2O3/GaN MOSFET

NASA Astrophysics Data System (ADS)

Wang, Hongyue; Wang, Jinyan; Li, Mengjun; He, Yandong; Wang, Maojun; Yu, Min; Wu, Wengang; Zhou, Yang; Dai, Gang

2018-04-01

In this article, an ohmic-first AlGaN/GaN self-terminating gate-recess etching technique was demonstrated where ohmic contact formation is ahead of gate-recess-etching/gate-dielectric-deposition (GRE/GDD) process. The ohmic contact exhibits few degradations after the self-terminating gate-recess process. Besides, when comparing with that using the conventional fabrication process, the fabricated device using the ohmic-first fabrication process shows a better gate dielectric quality in terms of more than 3 orders lower forward gate leakage current, more than twice higher reverse breakdown voltage as well as better stability. Based on this proposed technique, the normally-off Al2O3/GaN MOSFET exhibits a threshold voltage (V th) of ˜1.8 V, a maximum drain current of ˜328 mA/mm, a forward gate leakage current of ˜10-6 A/mm and an off-state breakdown voltage of 218 V at room temperature. Meanwhile, high temperature characteristics of the device was also evaluated and small variations (˜7.6%) of the threshold voltage was confirmed up to 300 °C.

Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

NASA Astrophysics Data System (ADS)

Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

2017-12-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

Experimental studies of MOS inversion and accumulation layers: Quantum mechanical effects and mobility

NASA Astrophysics Data System (ADS)

Chindalore, Gowrishankar L.

The development of fast, multi-functional, and energy efficient integrated circuits, is made possible by aggressively scaling the gate lengths of the MOS devices into the sub-quarter micron regime. However, with the increasing cost of fabrication, there is a strong need for the development of reliable and accurate device simulation capabilities. The development of the theoretical models for simulators is guided by extensive experimental data, which enable an experimental verification of the models, and lead to a better understanding of the underlying physics. This dissertation presents the methodology and the results for one such experimental effort, where two important physical effects in the inversion layer and the accumulation layer of a MOS device, namely, the quantum mechanical (QM) effects and the carrier mobility are investigated. Accordingly, this dissertation has been divided into two parts, with the first part discussing the increase in the threshold voltage and the accumulation electrical oxide thickness due to QM effects. The second part discusses the methodology and the experimental results for the extraction of the majority carrier mobilities in the accumulation layers of a MOSFET. The continued scaling of the MOS gate length requires decreased gate oxide thickness (tox) and increased channel doping (NB) in order to improve device performance while suppressing the short- channel effects. The combination of the two result in large enough transverse electric fields to cause significant quantization of the carriers in the potential well at the Si/SiO2 interface. Hence, compared to the classical calculations (where the QM effects are ignored), the QM effects are found to lead to an increase in the experimental threshold voltage by approximately 100mV, and an overestimation of the physical oxide thickness by approximately 3-4A, in MOSFET devices with a gate oxide thickness and the doping level anticipated for technologies with sub-quarter micron gate lengths. Thus, the experimental results indicate the need for using accurate QM models for simulating sub-quarter micron devices. Carrier mobility is a fundamental semiconductor device transport parameter that has been extensively characterized for both electrons and holes in the silicon bulk and MOS inversion layers. Accumulation layer mobility (μacc) has become increasingly important as the MOS devices have scaled to deep submicron gate lengths, and much effort has been required to achieve increased drive current. However, very little experimental data has been reported for carrier mobility in the MOS accumulation layers (Sun80, Man89). Hence, in this research work, the accumulation layer mobilities were extracted using buried-channel MOSFETs for both the electrons and holes, and for a wide range of doping levels at temperatures ranging from 25C to 150C. The experimental μacc is found to be greater than the corresponding bulk and the inversion layer mobilities, at low to moderate effective fields. However, at very high effective fields, where phonon and surface roughness scattering are dominant, the mobility behavior is found to be very similar to that of the inversion carriers. The extensive set of experimental data will enable the development of accurate local accumulation mobility models for inclusion in 2-D device simulators.

A pH sensor with a double-gate silicon nanowire field-effect transistor

NASA Astrophysics Data System (ADS)

Ahn, Jae-Hyuk; Kim, Jee-Yeon; Seol, Myeong-Lok; Baek, David J.; Guo, Zheng; Kim, Chang-Hoon; Choi, Sung-Jin; Choi, Yang-Kyu

2013-02-01

A pH sensor composed of a double-gate silicon nanowire field-effect transistor (DG Si-NW FET) is demonstrated. The proposed DG Si-NW FET allows the independent addressing of the gate voltage and hence improves the sensing capability through an application of asymmetric gate voltage between the two gates. One gate is a driving gate which controls the current flow, and the other is a supporting gate which amplifies the shift of the threshold voltage, which is a sensing metric, and which arises from changes in the pH. The pH signal is also amplified through modulation of the gate oxide thickness.

Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials

NASA Astrophysics Data System (ADS)

Ilatikhameneh, Hesameddin; Tan, Yaohua; Novakovic, Bozidar; Klimeck, Gerhard; Rahman, Rajib; Appenzeller, Joerg

2015-12-01

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2D material based TFETs can have tight gate control and high electric fields at the tunnel junction, and can in principle generate high ON-currents along with a sub-threshold swing smaller than 60 mV/dec. Our simulations reveal that high performance TMD TFETs, not only require good gate control, but also rely on the choice of the right channel material with optimum band gap, effective mass and source/drain doping level. Unlike previous works, a full band atomistic tight binding method is used self-consistently with 3D Poisson equation to simulate ballistic quantum transport in these devices. The effect of the choice of TMD material on the performance of the device and its transfer characteristics are discussed. Moreover, the criteria for high ON-currents are explained with a simple analytic model, showing the related fundamental factors. Finally, the subthreshold swing and energy-delay of these TFETs are compared with conventional CMOS devices.

Energy-band engineering for tunable memory characteristics through controlled doping of reduced graphene oxide.

PubMed

Han, Su-Ting; Zhou, Ye; Yang, Qing Dan; Zhou, Li; Huang, Long-Biao; Yan, Yan; Lee, Chun-Sing; Roy, Vellaisamy A L

2014-02-25

Tunable memory characteristics are used in multioperational mode circuits where memory cells with various functionalities are needed in one combined device. It is always a challenge to obtain control over threshold voltage for multimode operation. On this regard, we use a strategy of shifting the work function of reduced graphene oxide (rGO) in a controlled manner through doping gold chloride (AuCl3) and obtained a gradient increase of rGO work function. By inserting doped rGO as floating gate, a controlled threshold voltage (Vth) shift has been achieved in both p- and n-type low voltage flexible memory devices with large memory window (up to 4 times for p-type and 8 times for n-type memory devices) in comparison with pristine rGO floating gate memory devices. By proper energy band engineering, we demonstrated a flexible floating gate memory device with larger memory window and controlled threshold voltage shifts.

Graphene quantum dot (GQD)-induced photovoltaic and photoelectric memory elements in a pentacene/GQD field effect transistor as a probe of functional interface

NASA Astrophysics Data System (ADS)

Kim, Youngjun; Cho, Seongeun; Kim, Hyeran; Seo, Soonjoo; Lee, Hyun Uk; Lee, Jouhahn; Ko, Hyungduk; Chang, Mincheol; Park, Byoungnam

2017-09-01

Electric field-induced charge trapping and exciton dissociation were demonstrated at a penatcene/grapheme quantum dot (GQD) interface using a bottom contact bi-layer field effect transistor (FET) as an electrical nano-probe. Large threshold voltage shift in a pentacene/GQD FET in the dark arises from field-induced carrier trapping in the GQD layer or GQD-induced trap states at the pentacene/GQD interface. As the gate electric field increases, hysteresis characterized by the threshold voltage shift depending on the direction of the gate voltage scan becomes stronger due to carrier trapping associated with the presence of a GQD layer. Upon illumination, exciton dissociation and gate electric field-induced charge trapping simultaneously contribute to increase the threshold voltage window, which can potentially be exploited for photoelectric memory and/or photovoltaic devices through interface engineering.

Two-Dimensional Quantum Model of a Nanotransistor

NASA Technical Reports Server (NTRS)

Govindan, T. R.; Biegel, B.; Svizhenko, A.; Anantram, M. P.

2009-01-01

A mathematical model, and software to implement the model, have been devised to enable numerical simulation of the transport of electric charge in, and the resulting electrical performance characteristics of, a nanotransistor [in particular, a metal oxide/semiconductor field-effect transistor (MOSFET) having a channel length of the order of tens of nanometers] in which the overall device geometry, including the doping profiles and the injection of charge from the source, gate, and drain contacts, are approximated as being two-dimensional. The model and software constitute a computational framework for quantitatively exploring such device-physics issues as those of source-drain and gate leakage currents, drain-induced barrier lowering, and threshold voltage shift due to quantization. The model and software can also be used as means of studying the accuracy of quantum corrections to other semiclassical models.

Logical qubit fusion

NASA Astrophysics Data System (ADS)

Moussa, Jonathan; Ryan-Anderson, Ciaran

The canonical modern plan for universal quantum computation is a Clifford+T gate set implemented in a topological error-correcting code. This plan has the basic disparity that logical Clifford gates are natural for codes in two spatial dimensions while logical T gates are natural in three. Recent progress has reduced this disparity by proposing logical T gates in two dimensions with doubled, stacked, or gauge color codes, but these proposals lack an error threshold. An alternative universal gate set is Clifford+F, where a fusion (F) gate converts two logical qubits into a logical qudit. We show that logical F gates can be constructed by identifying compatible pairs of qubit and qudit codes that stabilize the same logical subspace, much like the original Bravyi-Kitaev construction of magic state distillation. The simplest example of high-distance compatible codes results in a proposal that is very similar to the stacked color code with the key improvement of retaining an error threshold. Sandia National Labs is a multi-program laboratory managed and operated by Sandia Corp, a wholly owned subsidiary of Lockheed Martin Corp, for the U.S. Department of Energy's National Nuclear Security Administration under contract DE-AC04-94AL85000.

Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen

1999-01-01

The ferroelectric channel in a Metal-Ferroelectric-Semiconductor Field Effect Transistor (MFSFET) can partially change its polarization when the gate voltage near the polarization threshold voltage. This causes the MFSFET Drain current to change with repeated pulses of the same gate voltage near the polarization threshold voltage. A previously developed model [11, based on the Fermi-Dirac function, assumed that for a given gate voltage and channel polarization, a sin-le Drain current value would be generated. A study has been done to characterize the effects of partial polarization on the Drain current of a MFSFET. These effects have been described mathematically and these equations have been incorporated into a more comprehensive mathematical model of the MFSFET. The model takes into account the hysteresis nature of the MFSFET and the time dependent decay as well as the effects of partial polarization. This model defines the Drain current based on calculating the degree of polarization from previous gate pulses, the present Gate voltage, and the amount of time since the last Gate volta-e pulse.

Analysis of electrical characteristics and proposal of design guide for ultra-scaled nanoplate vertical FET and 6T-SRAM

NASA Astrophysics Data System (ADS)

Seo, Youngsoo; Kim, Shinkeun; Ko, Kyul; Woo, Changbeom; Kim, Minsoo; Lee, Jangkyu; Kang, Myounggon; Shin, Hyungcheol

2018-02-01

In this paper, electrical characteristics of gate-all-around (GAA) nanoplate (NP) vertical FET (VFET) were analyzed for single transistor and 6T-SRAM cell through 3D technology computer-aided design (TCAD) simulation. In VFET, gate and extension lengths are not limited by the area of device because theses lengths are vertically located. The height of NP is assumed in 40 nm considering device fabrication method (top-down approach). According to the sizes of devices, we analyzed the performances of device such as total resistance, capacitance, intrinsic gate delay, sub-threshold swing (S.S), drain-induced barrier lowering (DIBL) and static noise margin (SNM). As the gate length becomes larger, the resistance should be smaller because the total height of NP is fixed in 40 nm. Also, when the channel thickness becomes thicker, the total resistance becomes smaller since the sheet resistances of channel and extension become smaller and the contact resistance becomes smaller due to the increasing contact area. In addition, as the length of channel pitch increases, the parasitic capacitance comes to be larger due to the increasing area of gate-drain and gate-source. The performance of RC delay is best in the shortest gate length (12 nm), the thickest channel (6 nm) and the shortest channel pitch (17 nm) owing to the reduced resistance and parasitic capacitance. However, the other performances such as DIBL, S.S, on/off ratio and SNM are worst because the short channel effect is highest in this situation. Also, we investigated the performance of the multi-channel device. As the number of channels increases, the performance of device and the reliability of SRAM improve because of reduced contact resistance, increased gate dimension and multi-channel compensation effect.

Experimental and theoretical studies of Sub-THz detection using strained-Si FETs

NASA Astrophysics Data System (ADS)

Delgado Notario, J. A.; Javadi, E.; Clericò, V.; Fobelets, K.; Otsuji, T.; Diez, E.; Velázquez-Pérez, J. E.; Meziani, Y. M.

2017-10-01

We report on experimental and theoretical studies of nanoscale gate-lengths strained Silicon MODFETs as room temperature non resonant detectors. Devices were excited at room temperature by an electronic source at 150 and 300 GHz to characterize their sub-THz response. The maximum of the photovoltaic response was obtained when the FET gate was biased at a value close to the threshold voltage. Simulations based on a bi-dimensional hydrodynamic model for the charge transport coupled to a Poisson equation solver were performed by using Synopsys TCAD. A charge boundary condition for the floating drain contact was implemented to obtain the photovoltaic response. Results from numerical simulations are in agreement with experimental ones. To understand the coupling between terahertz radiation and devices, the devices were rotated at different angles under excitation at both sub-terahertz frequencies and their response measured. Both NEP (Noise Equivalent Power) and Responsivity were calculated from measurements. To demonstrate their utility, devices were used as sensors in a terahertz imaging system for inspection of hidden objects at both frequencies.

Experimental limits on the fidelity of adiabatic geometric phase gates in a single solid-state spin qubit

DOE PAGES

Zhang, Kai; Nusran, N. M.; Slezak, B. R.; ...

2016-05-17

While it is often thought that the geometric phase is less sensitive to fluctuations in the control fields, a very general feature of adiabatic Hamiltonians is the unavoidable dynamic phase that accompanies the geometric phase. The effect of control field noise during adiabatic geometric quantum gate operations has not been probed experimentally, especially in the canonical spin qubit system that is of interest for quantum information. We present measurement of the Berry phase and carry out adiabatic geometric phase gate in a single solid-state spin qubit associated with the nitrogen-vacancy center in diamond. We manipulate the spin qubit geometrically bymore » careful application of microwave radiation that creates an effective rotating magnetic field, and observe the resulting Berry phase signal via spin echo interferometry. Our results show that control field noise at frequencies higher than the spin echo clock frequency causes decay of the quantum phase, and degrades the fidelity of the geometric phase gate to the classical threshold after a few (~10) operations. This occurs in spite of the geometric nature of the state preparation, due to unavoidable dynamic contributions. In conclusion, we have carried out systematic analysis and numerical simulations to study the effects of the control field noise and imperfect driving waveforms on the quantum phase gate.« less

Experimental limits on the fidelity of adiabatic geometric phase gates in a single solid-state spin qubit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Kai; Nusran, N. M.; Slezak, B. R.

While it is often thought that the geometric phase is less sensitive to fluctuations in the control fields, a very general feature of adiabatic Hamiltonians is the unavoidable dynamic phase that accompanies the geometric phase. The effect of control field noise during adiabatic geometric quantum gate operations has not been probed experimentally, especially in the canonical spin qubit system that is of interest for quantum information. We present measurement of the Berry phase and carry out adiabatic geometric phase gate in a single solid-state spin qubit associated with the nitrogen-vacancy center in diamond. We manipulate the spin qubit geometrically bymore » careful application of microwave radiation that creates an effective rotating magnetic field, and observe the resulting Berry phase signal via spin echo interferometry. Our results show that control field noise at frequencies higher than the spin echo clock frequency causes decay of the quantum phase, and degrades the fidelity of the geometric phase gate to the classical threshold after a few (~10) operations. This occurs in spite of the geometric nature of the state preparation, due to unavoidable dynamic contributions. In conclusion, we have carried out systematic analysis and numerical simulations to study the effects of the control field noise and imperfect driving waveforms on the quantum phase gate.« less

DIGITAL Q METER

DOEpatents

Briscoe, W.L.

1962-02-13

A digital Q meter is described for measuring the Q of mechanical or electrical devices. The meter comprises in combination a transducer coupled to an input amplifier, and an upper and lower level discriminator coupled to the amplifier and having their outputs coupled to an anticoincidence gate. The output of the gate is connected to a scaler. The lower level discriminator is adjusted to a threshold level of 36.8 percent of the operating threshold level of the upper level discriminator. (AEC)

Stable indium oxide thin-film transistors with fast threshold voltage recovery

NASA Astrophysics Data System (ADS)

Vygranenko, Yuriy; Wang, Kai; Nathan, Arokia

2007-12-01

Stable thin-film transistors (TFTs) with semiconducting indium oxide channel and silicon dioxide gate dielectric were fabricated by reactive ion beam assisted evaporation and plasma-enhanced chemical vapor deposition. The field-effect mobility is 3.3cm2/Vs, along with an on/off current ratio of 106, and subthreshold slope of 0.5V/decade. When subject to long-term gate bias stress, the TFTs show fast recovery of the threshold voltage (VT) when relaxed without annealing, suggesting that charge trapping at the interface and/or in the bulk gate dielectric to be the dominant mechanism underlying VT instability. Device performance and stability make indium oxide TFTs promising for display applications.

A normally-off fully AlGaN HEMT with high breakdown voltage and figure of merit for power switch applications

NASA Astrophysics Data System (ADS)

Ebrahimi, Behzad; Asad, Mohsen

2015-07-01

In this paper, we propose a fully AlGaN high electron mobility (HEMT) in which the gate electrode, the barrier and the channel are all AlGaN. The p-type AlGaN gate facilitates the normally-off operation to be compatible with the state-of-the-art power amplifiers. In addition, the AlGaN channel increases the breakdown voltage (VBR) to 598 V due to the higher breakdown field of AlGaN compared to GaN. To assess the efficiency of the proposed structure, its characteristics are compared with the conventional and recently proposed structures. The two-dimensional device simulation results show that the proposed structure has the highest threshold voltage (Vth) and the VBR with the moderately low ON-resistance (RON). These features lead to the highest figure of merit (2.49 × 1012) among the structures which is 83%, 59%, 47% and 49% more than those of the conventional, with a field plate, AlGaN gate and AlGaN channel structures, respectively.

Modeling of static electrical properties in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Minari, Takeo; Tsukagoshi, Kazuhito; Gwoziecki, Romain; Coppard, Romain; Benwadih, Mohamed; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-07-01

A modeling of organic field-effect transistors' (OFETs') electrical characteristics is presented. This model is based on a one-dimensional (1-D) Poisson's equation solution that solves the potential profile in the organic semiconducting film. Most importantly, it demonstrates that, due to the common open-surface configuration used in organic transistors, the conduction occurs in the film volume below threshold. This is because the potential at the free surface is not fixed to zero but rather rises also with the gate bias. The tail of carrier concentration at the free surface is therefore significantly modulated by the gate bias, which partially explains the gate-voltage dependent contact resistance. At the same time in the so-called subthreshold region, we observe a clear charge trapping from the difference between C-V and I-V measurements; hence a traps study by numerical simulation is also performed. By combining the analytical modeling and the traps analysis, the questions on the C-V and I-V characteristics are answered. Finally, the combined results obtained with traps fit well the experimental data in both pentacene and bis(triisopropylsilylethynyl)-pentacene OFETs.

DMLC tracking and gating can improve dose coverage for prostate VMAT

DOE Office of Scientific and Technical Information (OSTI.GOV)

Colvill, E.; Northern Sydney Cancer Centre, Royal North Shore Hospital, Sydney, NSW 2065; School of Physics, University of Sydney, NSW 2006

2014-09-15

Purpose: To assess and compare the dosimetric impact of dynamic multileaf collimator (DMLC) tracking and gating as motion correction strategies to account for intrafraction motion during conventionally fractionated prostate radiotherapy. Methods: A dose reconstruction method was used to retrospectively assess the dose distributions delivered without motion correction during volumetric modulated arc therapy fractions for 20 fractions of five prostate cancer patients who received conventionally fractionated radiotherapy. These delivered dose distributions were compared with the dose distributions which would have been delivered had DMLC tracking or gating motion correction strategies been implemented. The delivered dose distributions were constructed by incorporating themore » observed prostate motion with the patient's original treatment plan to simulate the treatment delivery. The DMLC tracking dose distributions were constructed using the same dose reconstruction method with the addition of MLC positions from Linac log files obtained during DMLC tracking simulations with the observed prostate motions input to the DMLC tracking software. The gating dose distributions were constructed by altering the prostate motion to simulate the application of a gating threshold of 3 mm for 5 s. Results: The delivered dose distributions showed that dosimetric effects of intrafraction prostate motion could be substantial for some fractions, with an estimated dose decrease of more than 19% and 34% from the planned CTVD{sub 99%} and PTV D{sub 95%} values, respectively, for one fraction. Evaluation of dose distributions for DMLC tracking and gating deliveries showed that both interventions were effective in improving the CTV D{sub 99%} for all of the selected fractions to within 4% of planned value for all fractions. For the delivered dose distributions the difference in rectum V{sub 65%} for the individual fractions from planned ranged from −44% to 101% and for the bladder V{sub 65%} the range was −61% to 26% from planned. The application of tracking decreased the maximum rectum and bladder V{sub 65%} difference to 6% and 4%, respectively. Conclusions: For the first time, the dosimetric impact of DMLC tracking and gating to account for intrafraction motion during prostate radiotherapy has been assessed and compared with no motion correction. Without motion correction intrafraction prostate motion can result in a significant decrease in target dose coverage for a small number of individual fractions. This is unlikely to effect the overall treatment for most patients undergoing conventionally fractionated treatments. Both DMLC tracking and gating demonstrate dose distributions for all assessed fractions that are robust to intrafraction motion.« less

Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography

DOE PAGES

Blume-Kohout, Robin; Gamble, John King; Nielsen, Erik; ...

2017-02-15

Quantum information processors promise fast algorithms for problems inaccessible to classical computers. But since qubits are noisy and error-prone, they will depend on fault-tolerant quantum error correction (FTQEC) to compute reliably. Quantum error correction can protect against general noise if—and only if—the error in each physical qubit operation is smaller than a certain threshold. The threshold for general errors is quantified by their diamond norm. Until now, qubits have been assessed primarily by randomized benchmarking, which reports a different error rate that is not sensitive to all errors, and cannot be compared directly to diamond norm thresholds. Finally, we usemore » gate set tomography to completely characterize operations on a trapped-Yb +-ion qubit and demonstrate with greater than 95% confidence that they satisfy a rigorous threshold for FTQEC (diamond norm ≤6.7 × 10 -4).« less

Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography

PubMed Central

Blume-Kohout, Robin; Gamble, John King; Nielsen, Erik; Rudinger, Kenneth; Mizrahi, Jonathan; Fortier, Kevin; Maunz, Peter

2017-01-01

Quantum information processors promise fast algorithms for problems inaccessible to classical computers. But since qubits are noisy and error-prone, they will depend on fault-tolerant quantum error correction (FTQEC) to compute reliably. Quantum error correction can protect against general noise if—and only if—the error in each physical qubit operation is smaller than a certain threshold. The threshold for general errors is quantified by their diamond norm. Until now, qubits have been assessed primarily by randomized benchmarking, which reports a different error rate that is not sensitive to all errors, and cannot be compared directly to diamond norm thresholds. Here we use gate set tomography to completely characterize operations on a trapped-Yb+-ion qubit and demonstrate with greater than 95% confidence that they satisfy a rigorous threshold for FTQEC (diamond norm ≤6.7 × 10−4). PMID:28198466

Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blume-Kohout, Robin; Gamble, John King; Nielsen, Erik

Quantum information processors promise fast algorithms for problems inaccessible to classical computers. But since qubits are noisy and error-prone, they will depend on fault-tolerant quantum error correction (FTQEC) to compute reliably. Quantum error correction can protect against general noise if—and only if—the error in each physical qubit operation is smaller than a certain threshold. The threshold for general errors is quantified by their diamond norm. Until now, qubits have been assessed primarily by randomized benchmarking, which reports a different error rate that is not sensitive to all errors, and cannot be compared directly to diamond norm thresholds. Finally, we usemore » gate set tomography to completely characterize operations on a trapped-Yb +-ion qubit and demonstrate with greater than 95% confidence that they satisfy a rigorous threshold for FTQEC (diamond norm ≤6.7 × 10 -4).« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Won Lee, Sang; Suh, Dongseok, E-mail: energy.suh@skku.edu; Department of Energy Science and Department of Physics, Sungkyunkwan University, Suwon 440-746

A prior requirement of any developed transistor for practical use is the stability test. Random network carbon nanotube-thin film transistor (CNT-TFT) was fabricated on SiO{sub 2}/Si. Gate bias stress stability was investigated with various passivation layers of HfO{sub 2} and Al{sub 2}O{sub 3}. Compared to the threshold voltage shift without passivation layer, the measured values in the presence of passivation layers were reduced independent of gate bias polarity except HfO{sub 2} under positive gate bias stress (PGBS). Al{sub 2}O{sub 3} capping layer was found to be the best passivation layer to prevent ambient gas adsorption, while gas adsorption on HfO{submore » 2} layer was unavoidable, inducing surface charges to increase threshold voltage shift in particular for PGBS. This high performance in the gate bias stress test of CNT-TFT even superior to that of amorphous silicon opens potential applications to active TFT industry for soft electronics.« less

Applications of a morphological scene change detection (MSCD) for visual leak and failure identification in process and chemical engineering

NASA Astrophysics Data System (ADS)

Tickle, Andrew J.; Harvey, Paul K.; Smith, Jeremy S.

2010-10-01

Morphological Scene Change Detection (MSCD) is a process typically tasked at detecting relevant changes in a guarded environment for security applications. This can be implemented on a Field Programmable Gate Array (FPGA) by a combination of binary differences based around exclusive-OR (XOR) gates, mathematical morphology and a crucial threshold setting. The additional ability to set up the system in virtually any location due to the FPGA makes it ideal for insertion into an autonomous mobile robot for patrol duties. However, security is not the only potential of this robust algorithm. This paper details how such a system can be used for the detection of leaks in piping for use in the process and chemical industries and could be deployed as stated in the above manner. The test substance in this work was water, which was pumped either as a liquid or as low pressure steam through a simple pipe configuration with holes at set points to simulate the leaks. These holes were situated randomly at either the center of a pipe (in order to simulate an impact to it) or at a joint or corner (to simulate a failed weld). Imagery of the resultant leaks, which were visualised as drips or the accumulation of steam, which where analysed using MATLAB to determine their pixel volume in order to calibrate the trigger for the MSCD. The triggering mechanism is adaptive to make it possible in theory for the type of leak to be determined by the number of pixels in the threshold of the image and a numerical output signal to state which of the leak situations is being observed. The system was designed using the DSP Builder package from Altera so that its graphical nature is easily comprehensible to the non-embedded system designer. Furthermore, all the data from the DSP Builder simulation underwent verification against MATLAB comparisons using the image processing toolbox in order to validate the results.

Simulation of axonal excitability using a Spreadsheet template created in Microsoft Excel.

PubMed

Brown, A M

2000-08-01

The objective of this present study was to implement an established simulation protocol (A.M. Brown, A methodology for simulating biological systems using Microsoft Excel, Comp. Methods Prog. Biomed. 58 (1999) 181-90) to model axonal excitability. The simulation protocol involves the use of in-cell formulas directly typed into a spreadsheet and does not require any programming skills or use of the macro language. Once the initial spreadsheet template has been set up the simulations described in this paper can be executed with a few simple keystrokes. The model axon contained voltage-gated ion channels that were modeled using Hodgkin Huxley style kinetics. The basic properties of axonal excitability modeled were: (1) threshold of action potential firing, demonstrating that not only are the stimulus amplitude and duration critical in the generation of an action potential, but also the resting membrane potential; (2) refractoriness, the phenomenon of reduced excitability immediately following an action potential. The difference between the absolute refractory period, when no amount of stimulus will elicit an action potential, and relative refractory period, when an action potential may be generated by applying increased stimulus, was demonstrated with regard to the underlying state of the Na(+) and K(+) channels; (3) temporal summation, a process by which two sub-threshold stimuli can unite to elicit an action potential was shown to be due to conductance changes outlasting the first stimulus and summing with the second stimulus-induced conductance changes to drive the membrane potential past threshold; (4) anode break excitation, where membrane hyperpolarization was shown to produce an action potential by removing Na(+) channel inactivation that is present at resting membrane potential. The simulations described in this paper provide insights into mechanisms of axonal excitation that can be carried out by following an easily understood protocol.

Interfacial fields in organic field-effect transistors and sensors

NASA Astrophysics Data System (ADS)

Dawidczyk, Thomas J.

Organic electronics are currently being commercialized and present a viable alternative to conventional electronics. These organic materials offer the ability to chemically manipulate the molecule, allowing for more facile mass processing techniques, which in turn reduces the cost. One application where organic semiconductors (OSCs) are being investigated is sensors. This work evaluates an assortment of n- and p-channel semiconductors as organic field-effect transistor (OFET) sensors. The sensor responses to dinitrotoluene (DNT) vapor and solid along with trinitrotoluene (TNT) solid were studied. Different semiconductor materials give different magnitude and direction of electrical current response upon exposure to DNT. Additional OFET parameters---mobility and threshold voltage---further refine the response to the DNT with each OFET sensor requiring a certain gate voltage for an optimized response to the vapor. The pattern of responses has sufficient diversity to distinguish DNT from other vapors. To effectively use these OFET sensors in a circuit, the threshold voltage needs to be tuned for each transistor to increase the efficiency of the circuit and maximize the sensor response. The threshold voltage can be altered by embedding charges into the dielectric layer of the OFET. To study the quantity and energy of charges needed to alter the threshold voltage, charge carriers were injected into polystyrene (PS) and investigated with scanning Kelvin probe microscopy (SKPM) and thermally stimulated discharge current (TSDC). Lateral heterojunctions of pentacene/PS were scanned using SKPM, effectively observing polarization along a side view of a lateral nonvolatile organic field-effect transistor dielectric interface. TSDC was used to observe charge migration out of PS films and to estimate the trap energy level inside the PS, using the initial rise method. The process was further refined to create lateral heterojunctions that were actual working OFETs, consisting of a PS or poly (3-trifluoro)styrene (F-PS) gate dielectric and a pentacene OSC. The charge storage inside the dielectric was visualized with SKPM, correlated to a threshold voltage shift in the transistor operation, and related to bias stress as well. The SKPM method allows the dielectric/OSC interface of the OFET to be visualized without any alteration of the OFET. Furthermore, this technique allows for the observation of charge distribution between the two dielectric interfaces, PS and F-PS. The SKPM is used to visualize the charge from conventional gate biasing and also as a result of embedding charges deliberately into the dielectric to shift the threshold voltage. Conventional gate biasing shows considerable residual charge in the PS dielectric, which results in gate bias stress. Gate bias stress is one of the major hurdles left in the commercialization of OFETs. To prevent this bias stress, additives of different energy levels were inserted into the dielectric to limit the gate bias stress. Additionally, the dielectrics were pre-charged to try and prevent further bias stress. Neither pre-charging the dielectric or the addition of additive has been used in gate bias prevention, but both methods offer improved resistance to gate bias stress, and help to further refine the dielectric design.

Compact modeling of nanoscale triple-gate junctionless transistors covering drift-diffusion to quasi-ballistic carrier transport

NASA Astrophysics Data System (ADS)

Oproglidis, T. A.; Karatsori, T. A.; Barraud, S.; Ghibaudo, G.; Dimitriadis, C. A.

2018-04-01

In this work, we extend our analytical compact model for nanoscale junctionless triple-gate (JL TG) MOSFETs, capturing carrier transport from drift-diffusion to quasi-ballistic regime. This is based on a simple formulation of the low-field mobility extracted from experimental data using the Y-function method, taking into account the ballistic carrier motion and an increased carrier scattering in process-induced defects near the source/drain regions. The case of a Schottky junction in non-ideal ohmic contact at the drain side was also taken into account by modifying the threshold voltage and ideality factor of the JL transistor. The model is validated with experimental data for n-channel JL TG MOSFETs with channel length varying from 95 down to 25 nm. It can be easily implemented as a compact model for use in Spice circuit simulators.

Study of the enhancement-mode AlGaN/GaN high electron mobility transistor with split floating gates

NASA Astrophysics Data System (ADS)

Wang, Hui; Wang, Ning; Jiang, Ling-Li; Zhao, Hai-Yue; Lin, Xin-Peng; Yu, Hong-Yu

2017-11-01

In this work, the charge storage based split floating gates (FGs) enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) are studied. The simulation results reveal that under certain density of two dimensional electron gas, the variation tendency of the threshold voltage (Vth) with the variation of the blocking dielectric thickness depends on the FG charge density. It is found that when the length sum and isolating spacing sum of the FGs both remain unchanged, the Vth shall decrease with the increasing FGs number but maintaining the device as E-mode. It is also reported that for the FGs HEMT, the failure of a FG will lead to the decrease of Vth as well as the increase of drain current, and the failure probability can be improved significantly with the increase of FGs number.

Impact of random discrete dopant in extension induced fluctuation in gate-source/drain underlap FinFET

NASA Astrophysics Data System (ADS)

Wang, Yijiao; Huang, Peng; Xin, Zheng; Zeng, Lang; Liu, Xiaoyan; Du, Gang; Kang, Jinfeng

2014-01-01

In this work, three dimensional technology computer-aided design (TCAD) simulations are performed to investigate the impact of random discrete dopant (RDD) including extension induced fluctuation in 14 nm silicon-on-insulator (SOI) gate-source/drain (G-S/D) underlap fin field effect transistor (FinFET). To fully understand the RDD impact in extension, RDD effect is evaluated in channel and extension separately and together. The statistical variability of FinFET performance parameters including threshold voltage (Vth), subthreshold slope (SS), drain induced barrier lowering (DIBL), drive current (Ion), and leakage current (Ioff) are analyzed. The results indicate that RDD in extension can lead to substantial variability, especially for SS, DIBL, and Ion and should be taken into account together with that in channel to get an accurate estimation on RDF. Meanwhile, higher doping concentration of extension region is suggested from the perspective of overall variability control.

GaN HEMTs with p-GaN gate: field- and time-dependent degradation

NASA Astrophysics Data System (ADS)

Meneghesso, G.; Meneghini, M.; Rossetto, I.; Canato, E.; Bartholomeus, J.; De Santi, C.; Trivellin, N.; Zanoni, E.

2017-02-01

GaN-HEMTs with p-GaN gate have recently demonstrated to be excellent normally-off devices for application in power conversion systems, thanks to the high and robust threshold voltage (VTH>1 V), the high breakdown voltage, and the low dynamic Ron increase. For this reason, studying the stability and reliability of these devices under high stress conditions is of high importance. This paper reports on our most recent results on the field- and time-dependent degradation of GaN-HEMTs with p-GaN gate submitted to stress with positive gate bias. Based on combined step-stress experiments, constant voltage stress and electroluminescence testing we demonstrated that: (i) when submitted to high/positive gate stress, the transistors may show a negative threshold voltage shift, that is ascribed to the injection of holes from the gate metal towards the p-GaN/AlGaN interface; (ii) in a step-stress experiment, the analyzed commercial devices fail at gate voltages higher than 9-10 V, due to the extremely high electric field over the p-GaN/AlGaN stack; (iii) constant voltage stress tests indicate that the failure is also time-dependent and Weibull distributed. The several processes that can explain the time-dependent failure are discussed in the following.

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

DOE Office of Scientific and Technical Information (OSTI.GOV)

Niang, K. M.; Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk; Barquinha, P. M. C.

Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 10{sup 7} s{sup −1}. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys.more » 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.« less

A CMOS matrix for extracting MOSFET parameters before and after irradiation

NASA Technical Reports Server (NTRS)

Blaes, B. R.; Buehler, M. G.; Lin, Y.-S.; Hicks, K. A.

1988-01-01

An addressable matrix of 16 n- and 16 p-MOSFETs was designed to extract the dc MOSFET parameters for all dc gate bias conditions before and after irradiation. The matrix contains four sets of MOSFETs, each with four different geometries that can be biased independently. Thus the worst-case bias scenarios can be determined. The MOSFET matrix was fabricated at a silicon foundry using a radiation-soft CMOS p-well LOCOS process. Co-60 irradiation results for the n-MOSFETs showed a threshold-voltage shift of -3 mV/krad(Si), whereas the p-MOSFETs showed a shift of 21 mV/krad(Si). The worst-case threshold-voltage shift occurred for the n-MOSFETs, with a gate bias of 5 V during the anneal. For the p-MOSFETs, biasing did not affect the shift in the threshold voltage. A parasitic MOSFET dominated the leakage of the n-MOSFET biased with 5 V on the gate during irradiation. Co-60 test results for other parameters are also presented.

Temperature-dependent degradation mechanisms of threshold voltage in La2O3-gated n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Ming-Tsong; Hsu, De-Cheng; Juan, Pi-Chun; Wang, Y. L.; Lee, Joseph Ya-min

2010-09-01

Metal-oxide-semiconductor capacitors and n-channel metal-oxide-semiconductor field-effect transistors with La2O3 gate dielectric were fabricated. The positive bias temperature instability was studied. The degradation of threshold voltage (ΔVT) showed an exponential dependence on the stress time in the temperature range from 25 to 75 °C. The degradation of subthreshold slope (ΔS) and gate leakage (IG) with stress voltage was also measured. The degradation of VT is attributed to the oxide trap charges Qot. The extracted activation energy of 0.2 eV is related to a degradation dominated by the release of atomic hydrogen in La2O3 thin films.

Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

NASA Astrophysics Data System (ADS)

Tang, Lan-Feng; Yu, Guang; Lu, Hai; Wu, Chen-Fei; Qian, Hui-Min; Zhou, Dong; Zhang, Rong; Zheng, You-Dou; Huang, Xiao-Ming

2015-08-01

The influence of white light illumination on the stability of an amorphous InGaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed. Project supported by the State Key Program for Basic Research of China (Grant Nos. 2011CB301900 and 2011CB922100) and the Priority Academic Program Development of Jiangsu Higher Education Institutions, China.

Explicit continuous charge-based compact model for long channel heavily doped surrounding-gate MOSFETs incorporating interface traps and quantum effects

NASA Astrophysics Data System (ADS)

Hamzah, Afiq; Hamid, Fatimah A.; Ismail, Razali

2016-12-01

An explicit solution for long-channel surrounding-gate (SRG) MOSFETs is presented from intrinsic to heavily doped body including the effects of interface traps and fixed oxide charges. The solution is based on the core SRGMOSFETs model of the Unified Charge Control Model (UCCM) for heavily doped conditions. The UCCM model of highly doped SRGMOSFETs is derived to obtain the exact equivalent expression as in the undoped case. Taking advantage of the undoped explicit charge-based expression, the asymptotic limits for below threshold and above threshold have been redefined to include the effect of trap states for heavily doped cases. After solving the asymptotic limits, an explicit mobile charge expression is obtained which includes the trap state effects. The explicit mobile charge model shows very good agreement with respect to numerical simulation over practical terminal voltages, doping concentration, geometry effects, and trap state effects due to the fixed oxide charges and interface traps. Then, the drain current is obtained using the Pao-Sah's dual integral, which is expressed as a function of inversion charge densities at the source/drain ends. The drain current agreed well with the implicit solution and numerical simulation for all regions of operation without employing any empirical parameters. A comparison with previous explicit models has been conducted to verify the competency of the proposed model with the doping concentration of 1× {10}19 {{cm}}-3, as the proposed model has better advantages in terms of its simplicity and accuracy at a higher doping concentration.

Lens implementation on the GATE Monte Carlo toolkit for optical imaging simulation

NASA Astrophysics Data System (ADS)

Kang, Han Gyu; Song, Seong Hyun; Han, Young Been; Kim, Kyeong Min; Hong, Seong Jong

2018-02-01

Optical imaging techniques are widely used for in vivo preclinical studies, and it is well known that the Geant4 Application for Emission Tomography (GATE) can be employed for the Monte Carlo (MC) modeling of light transport inside heterogeneous tissues. However, the GATE MC toolkit is limited in that it does not yet include optical lens implementation, even though this is required for a more realistic optical imaging simulation. We describe our implementation of a biconvex lens into the GATE MC toolkit to improve both the sensitivity and spatial resolution for optical imaging simulation. The lens implemented into the GATE was validated against the ZEMAX optical simulation using an US air force 1951 resolution target. The ray diagrams and the charge-coupled device images of the GATE optical simulation agreed with the ZEMAX optical simulation results. In conclusion, the use of a lens on the GATE optical simulation could improve the image quality of bioluminescence and fluorescence significantly as compared with pinhole optics.

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

NASA Astrophysics Data System (ADS)

Afzalian, Aryan; Colinge, Jean-Pierre; Flandre, Denis

2011-05-01

A new concept of nanoscale MOSFET, the Gate Modulated Resonant Tunneling Transistor (RT-FET), is presented and modeled using 3D Non-Equilibrium Green's Function simulations enlightening the main physical mechanisms. Owing to the additional tunnel barriers and the related longitudinal confinement present in the device, the density of state is reduced in its off-state, while remaining comparable in its on-state, to that of a MOS transistor without barriers. The RT-FET thus features both a lower RT-limited off-current and a faster increase of the current with V G, i.e. an improved slope characteristic, and hence an improved Ion/ Ioff ratio. Such improvement of the slope can happen in subthreshold regime, and therefore lead to subthreshold slope below the kT/q limit. In addition, faster increase of current and improved slope occur above threshold and lead to high thermionic on-current and significant Ion/ Ioff ratio improvement, even with threshold voltage below 0.2 V and supply voltage V dd of a few hundreds of mV as critically needed for future technology nodes. Finally RT-FETs are intrinsically immune to source-drain tunneling and are therefore promising candidate for extending the roadmap below 10 nm.

AN EVALUATION OF HEURISTICS FOR THRESHOLD-FUNCTION TEST-SYNTHESIS,

DTIC Science & Technology

Linear programming offers the most attractive procedure for testing and obtaining optimal threshold gate realizations for functions generated in...The design of the experiments may be of general interest to students of automatic problem solving; the results should be of interest in threshold logic and linear programming. (Author)

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

NASA Astrophysics Data System (ADS)

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-09-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec.

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

PubMed Central

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-01-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec. PMID:27641430

SU-C-9A-06: The Impact of CT Image Used for Attenuation Correction in 4D-PET

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cui, Y; Bowsher, J; Yan, S

2014-06-01

Purpose: To evaluate the appropriateness of using 3D non-gated CT image for attenuation correction (AC) in a 4D-PET (gated PET) imaging protocol used in radiotherapy treatment planning simulation. Methods: The 4D-PET imaging protocol in a Siemens PET/CT simulator (Biograph mCT, Siemens Medical Solutions, Hoffman Estates, IL) was evaluated. CIRS Dynamic Thorax Phantom (CIRS Inc., Norfolk, VA) with a moving glass sphere (8 mL) in the middle of its thorax portion was used in the experiments. The glass was filled with {sup 18}F-FDG and was in a longitudinal motion derived from a real patient breathing pattern. Varian RPM system (Varian Medicalmore » Systems, Palo Alto, CA) was used for respiratory gating. Both phase-gating and amplitude-gating methods were tested. The clinical imaging protocol was modified to use three different CT images for AC in 4D-PET reconstruction: first is to use a single-phase CT image to mimic actual clinical protocol (single-CT-PET); second is to use the average intensity projection CT (AveIP-CT) derived from 4D-CT scanning (AveIP-CT-PET); third is to use 4D-CT image to do the phase-matched AC (phase-matching- PET). Maximum SUV (SUVmax) and volume of the moving target (glass sphere) with threshold of 40% SUVmax were calculated for comparison between 4D-PET images derived with different AC methods. Results: The SUVmax varied 7.3%±6.9% over the breathing cycle in single-CT-PET, compared to 2.5%±2.8% in AveIP-CT-PET and 1.3%±1.2% in phasematching PET. The SUVmax in single-CT-PET differed by up to 15% from those in phase-matching-PET. The target volumes measured from single- CT-PET images also presented variations up to 10% among different phases of 4D PET in both phase-gating and amplitude-gating experiments. Conclusion: Attenuation correction using non-gated CT in 4D-PET imaging is not optimal process for quantitative analysis. Clinical 4D-PET imaging protocols should consider phase-matched 4D-CT image if available to achieve better accuracy.« less

Efficient III-Nitride MIS-HEMT devices with high-κ gate dielectric for high-power switching boost converter circuits

NASA Astrophysics Data System (ADS)

Mohanbabu, A.; Mohankumar, N.; Godwin Raj, D.; Sarkar, Partha; Saha, Samar K.

2017-03-01

The paper reports the results of a systematic theoretical study on efficient recessed-gate, double-heterostructure, and normally-OFF metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs), HfAlOx/AlGaN on Al2O3 substrate. In device architecture, a thin AlGaN layer is used in the AlGaN graded barrier MIS-HEMTs that offers an excellent enhancement-mode device operation with threshold voltage higher than 5.3 V and drain current above 0.64 A/mm along with high on-current/off-current ratio over 107 and subthreshold slope less than 73 mV/dec. In addition, a high OFF-state breakdown voltage of 1200 V is achieved for a device with a gate-to-drain distance and field-plate length of 15 μm and 5.3 μm, respectively at a drain current of 1 mA/mm with a zero gate bias, and the substrate grounded. The numerical device simulation results show that in comparison to a conventional AlGaN/GaN MIS-HEMT of similar design, a graded barrier MIS-HEMT device exhibits a better interface property, remarkable suppression of leakage current, and a significant improvement of breakdown voltage for HfAlOx gate dielectric. Finally, the benefit of HfAlOx graded-barrier AlGaN MIS-HEMTs based switching devices is evaluated on an ultra-low-loss converter circuit.

Upsets in Erased Floating Gate Cells With High-Energy Protons

DOE PAGES

Gerardin, S.; Bagatin, M.; Paccagnella, A.; ...

2017-01-01

We discuss upsets in erased floating gate cells, due to large threshold voltage shifts, using statistical distributions collected on a large number of memory cells. The spread in the neutral threshold voltage appears to be too low to quantitatively explain the experimental observations in terms of simple charge loss, at least in SLC devices. The possibility that memories exposed to high energy protons and heavy ions exhibit negative charge transfer between programmed and erased cells is investigated, although the analysis does not provide conclusive support to this hypothesis.

NOTE: Implementation of angular response function modeling in SPECT simulations with GATE

NASA Astrophysics Data System (ADS)

Descourt, P.; Carlier, T.; Du, Y.; Song, X.; Buvat, I.; Frey, E. C.; Bardies, M.; Tsui, B. M. W.; Visvikis, D.

2010-05-01

Among Monte Carlo simulation codes in medical imaging, the GATE simulation platform is widely used today given its flexibility and accuracy, despite long run times, which in SPECT simulations are mostly spent in tracking photons through the collimators. In this work, a tabulated model of the collimator/detector response was implemented within the GATE framework to significantly reduce the simulation times in SPECT. This implementation uses the angular response function (ARF) model. The performance of the implemented ARF approach has been compared to standard SPECT GATE simulations in terms of the ARF tables' accuracy, overall SPECT system performance and run times. Considering the simulation of the Siemens Symbia T SPECT system using high-energy collimators, differences of less than 1% were measured between the ARF-based and the standard GATE-based simulations, while considering the same noise level in the projections, acceleration factors of up to 180 were obtained when simulating a planar 364 keV source seen with the same SPECT system. The ARF-based and the standard GATE simulation results also agreed very well when considering a four-head SPECT simulation of a realistic Jaszczak phantom filled with iodine-131, with a resulting acceleration factor of 100. In conclusion, the implementation of an ARF-based model of collimator/detector response for SPECT simulations within GATE significantly reduces the simulation run times without compromising accuracy.

Accurate analytical modeling of junctionless DG-MOSFET by green's function approach

NASA Astrophysics Data System (ADS)

Nandi, Ashutosh; Pandey, Nilesh

2017-11-01

An accurate analytical model of Junctionless double gate MOSFET (JL-DG-MOSFET) in the subthreshold regime of operation is developed in this work using green's function approach. The approach considers 2-D mixed boundary conditions and multi-zone techniques to provide an exact analytical solution to 2-D Poisson's equation. The Fourier coefficients are calculated correctly to derive the potential equations that are further used to model the channel current and subthreshold slope of the device. The threshold voltage roll-off is computed from parallel shifts of Ids-Vgs curves between the long channel and short-channel devices. It is observed that the green's function approach of solving 2-D Poisson's equation in both oxide and silicon region can accurately predict channel potential, subthreshold current (Isub), threshold voltage (Vt) roll-off and subthreshold slope (SS) of both long & short channel devices designed with different doping concentrations and higher as well as lower tsi/tox ratio. All the analytical model results are verified through comparisons with TCAD Sentaurus simulation results. It is observed that the model matches quite well with TCAD device simulations.

GATE Monte Carlo simulation of dose distribution using MapReduce in a cloud computing environment.

PubMed

Liu, Yangchuan; Tang, Yuguo; Gao, Xin

2017-12-01

The GATE Monte Carlo simulation platform has good application prospects of treatment planning and quality assurance. However, accurate dose calculation using GATE is time consuming. The purpose of this study is to implement a novel cloud computing method for accurate GATE Monte Carlo simulation of dose distribution using MapReduce. An Amazon Machine Image installed with Hadoop and GATE is created to set up Hadoop clusters on Amazon Elastic Compute Cloud (EC2). Macros, the input files for GATE, are split into a number of self-contained sub-macros. Through Hadoop Streaming, the sub-macros are executed by GATE in Map tasks and the sub-results are aggregated into final outputs in Reduce tasks. As an evaluation, GATE simulations were performed in a cubical water phantom for X-ray photons of 6 and 18 MeV. The parallel simulation on the cloud computing platform is as accurate as the single-threaded simulation on a local server and the simulation correctness is not affected by the failure of some worker nodes. The cloud-based simulation time is approximately inversely proportional to the number of worker nodes. For the simulation of 10 million photons on a cluster with 64 worker nodes, time decreases of 41× and 32× were achieved compared to the single worker node case and the single-threaded case, respectively. The test of Hadoop's fault tolerance showed that the simulation correctness was not affected by the failure of some worker nodes. The results verify that the proposed method provides a feasible cloud computing solution for GATE.

MaGate Simulator: A Simulation Environment for a Decentralized Grid Scheduler

NASA Astrophysics Data System (ADS)

Huang, Ye; Brocco, Amos; Courant, Michele; Hirsbrunner, Beat; Kuonen, Pierre

This paper presents a simulator for of a decentralized modular grid scheduler named MaGate. MaGate’s design emphasizes scheduler interoperability by providing intelligent scheduling serving the grid community as a whole. Each MaGate scheduler instance is able to deal with dynamic scheduling conditions, with continuously arriving grid jobs. Received jobs are either allocated on local resources, or delegated to other MaGates for remote execution. The proposed MaGate simulator is based on GridSim toolkit and Alea simulator, and abstracts the features and behaviors of complex fundamental grid elements, such as grid jobs, grid resources, and grid users. Simulation of scheduling tasks is supported by a grid network overlay simulator executing distributed ant-based swarm intelligence algorithms to provide services such as group communication and resource discovery. For evaluation, a comparison of behaviors of different collaborative policies among a community of MaGates is provided. Results support the use of the proposed approach as a functional ready grid scheduler simulator.

Lens implementation on the GATE Monte Carlo toolkit for optical imaging simulation.

PubMed

Kang, Han Gyu; Song, Seong Hyun; Han, Young Been; Kim, Kyeong Min; Hong, Seong Jong

2018-02-01

Optical imaging techniques are widely used for in vivo preclinical studies, and it is well known that the Geant4 Application for Emission Tomography (GATE) can be employed for the Monte Carlo (MC) modeling of light transport inside heterogeneous tissues. However, the GATE MC toolkit is limited in that it does not yet include optical lens implementation, even though this is required for a more realistic optical imaging simulation. We describe our implementation of a biconvex lens into the GATE MC toolkit to improve both the sensitivity and spatial resolution for optical imaging simulation. The lens implemented into the GATE was validated against the ZEMAX optical simulation using an US air force 1951 resolution target. The ray diagrams and the charge-coupled device images of the GATE optical simulation agreed with the ZEMAX optical simulation results. In conclusion, the use of a lens on the GATE optical simulation could improve the image quality of bioluminescence and fluorescence significantly as compared with pinhole optics. (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE).

GATE: a simulation toolkit for PET and SPECT.

PubMed

Jan, S; Santin, G; Strul, D; Staelens, S; Assié, K; Autret, D; Avner, S; Barbier, R; Bardiès, M; Bloomfield, P M; Brasse, D; Breton, V; Bruyndonckx, P; Buvat, I; Chatziioannou, A F; Choi, Y; Chung, Y H; Comtat, C; Donnarieix, D; Ferrer, L; Glick, S J; Groiselle, C J; Guez, D; Honore, P F; Kerhoas-Cavata, S; Kirov, A S; Kohli, V; Koole, M; Krieguer, M; van der Laan, D J; Lamare, F; Largeron, G; Lartizien, C; Lazaro, D; Maas, M C; Maigne, L; Mayet, F; Melot, F; Merheb, C; Pennacchio, E; Perez, J; Pietrzyk, U; Rannou, F R; Rey, M; Schaart, D R; Schmidtlein, C R; Simon, L; Song, T Y; Vieira, J M; Visvikis, D; Van de Walle, R; Wieërs, E; Morel, C

2004-10-07

Monte Carlo simulation is an essential tool in emission tomography that can assist in the design of new medical imaging devices, the optimization of acquisition protocols and the development or assessment of image reconstruction algorithms and correction techniques. GATE, the Geant4 Application for Tomographic Emission, encapsulates the Geant4 libraries to achieve a modular, versatile, scripted simulation toolkit adapted to the field of nuclear medicine. In particular, GATE allows the description of time-dependent phenomena such as source or detector movement, and source decay kinetics. This feature makes it possible to simulate time curves under realistic acquisition conditions and to test dynamic reconstruction algorithms. This paper gives a detailed description of the design and development of GATE by the OpenGATE collaboration, whose continuing objective is to improve, document and validate GATE by simulating commercially available imaging systems for PET and SPECT. Large effort is also invested in the ability and the flexibility to model novel detection systems or systems still under design. A public release of GATE licensed under the GNU Lesser General Public License can be downloaded at http:/www-lphe.epfl.ch/GATE/. Two benchmarks developed for PET and SPECT to test the installation of GATE and to serve as a tutorial for the users are presented. Extensive validation of the GATE simulation platform has been started, comparing simulations and measurements on commercially available acquisition systems. References to those results are listed. The future prospects towards the gridification of GATE and its extension to other domains such as dosimetry are also discussed.

GATE - Geant4 Application for Tomographic Emission: a simulation toolkit for PET and SPECT

PubMed Central

Jan, S.; Santin, G.; Strul, D.; Staelens, S.; Assié, K.; Autret, D.; Avner, S.; Barbier, R.; Bardiès, M.; Bloomfield, P. M.; Brasse, D.; Breton, V.; Bruyndonckx, P.; Buvat, I.; Chatziioannou, A. F.; Choi, Y.; Chung, Y. H.; Comtat, C.; Donnarieix, D.; Ferrer, L.; Glick, S. J.; Groiselle, C. J.; Guez, D.; Honore, P.-F.; Kerhoas-Cavata, S.; Kirov, A. S.; Kohli, V.; Koole, M.; Krieguer, M.; van der Laan, D. J.; Lamare, F.; Largeron, G.; Lartizien, C.; Lazaro, D.; Maas, M. C.; Maigne, L.; Mayet, F.; Melot, F.; Merheb, C.; Pennacchio, E.; Perez, J.; Pietrzyk, U.; Rannou, F. R.; Rey, M.; Schaart, D. R.; Schmidtlein, C. R.; Simon, L.; Song, T. Y.; Vieira, J.-M.; Visvikis, D.; Van de Walle, R.; Wieërs, E.; Morel, C.

2012-01-01

Monte Carlo simulation is an essential tool in emission tomography that can assist in the design of new medical imaging devices, the optimization of acquisition protocols, and the development or assessment of image reconstruction algorithms and correction techniques. GATE, the Geant4 Application for Tomographic Emission, encapsulates the Geant4 libraries to achieve a modular, versatile, scripted simulation toolkit adapted to the field of nuclear medicine. In particular, GATE allows the description of time-dependent phenomena such as source or detector movement, and source decay kinetics. This feature makes it possible to simulate time curves under realistic acquisition conditions and to test dynamic reconstruction algorithms. This paper gives a detailed description of the design and development of GATE by the OpenGATE collaboration, whose continuing objective is to improve, document, and validate GATE by simulating commercially available imaging systems for PET and SPECT. Large effort is also invested in the ability and the flexibility to model novel detection systems or systems still under design. A public release of GATE licensed under the GNU Lesser General Public License can be downloaded at the address http://www-lphe.ep.ch/GATE/. Two benchmarks developed for PET and SPECT to test the installation of GATE and to serve as a tutorial for the users are presented. Extensive validation of the GATE simulation platform has been started, comparing simulations and measurements on commercially available acquisition systems. References to those results are listed. The future prospects toward the gridification of GATE and its extension to other domains such as dosimetry are also discussed. PMID:15552416

Fault tolerance with noisy and slow measurements and preparation.

PubMed

Paz-Silva, Gerardo A; Brennen, Gavin K; Twamley, Jason

2010-09-03

It is not so well known that measurement-free quantum error correction protocols can be designed to achieve fault-tolerant quantum computing. Despite their potential advantages in terms of the relaxation of accuracy, speed, and addressing requirements, they have usually been overlooked since they are expected to yield a very bad threshold. We show that this is not the case. We design fault-tolerant circuits for the 9-qubit Bacon-Shor code and find an error threshold for unitary gates and preparation of p((p,g)thresh)=3.76×10(-5) (30% of the best known result for the same code using measurement) while admitting up to 1/3 error rates for measurements and allocating no constraints on measurement speed. We further show that demanding gate error rates sufficiently below the threshold pushes the preparation threshold up to p((p)thresh)=1/3.

Role of deposition and annealing of the top gate dielectric in a-IGZO TFT-based dual-gate ion-sensitive field-effect transistors

NASA Astrophysics Data System (ADS)

Kumar, Narendra; Sutradhar, Moitri; Kumar, Jitendra; Panda, Siddhartha

2017-03-01

The deposition of the top gate dielectric in thin film transistor (TFT)-based dual-gate ion-sensitive field-effect transistors (DG ISFETs) is critical, and expected not to affect the bottom gate TFT characteristics, while providing a higher pH sensitive surface and efficient capacitive coupling between the gates. Amorphous Ta2O5, in addition to having good sensing properties, possesses a high dielectric constant of ˜25 making it well suited as the top gate dielectric in a DG ISFET by providing higher capacitive coupling (ratio of C top/C bottom) leading to higher amplification. To avoid damage of the a-IGZO channel reported to be caused by plasma exposure, deposition of Ta2O5 by e-beam evaporation followed by annealing was investigated in this work to obtain sensitivity over the Nernst limit. The deteriorated bottom gate TFT characteristics, indicated by an increase in the channel conductance, confirmed that plasma exposure is not the sole contributor to the changes. Oxygen vacancies at the Ta2O5/a-IGZO interface, which emerged during processing, increased the channel conductivity, became filled by optimum annealing in oxygen at 400 °C for 1 h, which was confirmed by an x-ray photoelectron spectroscopy depth profiling analysis. The obtained pH sensitivity of the TFT-based DG ISFET was 402 mV pH-1, which is about 6.8 times the Nernst limit (59 mV pH-1). The concept of capacitive coupling was also demonstrated by simulating an a-IGZO-based DG TFT structure. Here, the exposure of the top gate dielectric to the electrolyte without applying any top gate bias led to changes in the measured threshold voltage of the bottom gate TFT, and this obviated the requirement of a reference electrode needed in conventional ISFETs and other reported DG ISFETs. These devices, with high sensitivities and requiring low volumes (˜2 μl) of analyte solution, could be potential candidates for utilization as chemical sensors and biosensors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Le, Son Phuong; Ui, Toshimasa; Nguyen, Tuan Quy

Using aluminum titanium oxide (AlTiO, an alloy of Al{sub 2}O{sub 3} and TiO{sub 2}) as a high-k gate insulator, we fabricated and investigated AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. From current low-frequency noise (LFN) characterization, we find Lorentzian spectra near the threshold voltage, in addition to 1/f spectra for the well-above-threshold regime. The Lorentzian spectra are attributed to electron trapping/detrapping with two specific time constants, ∼25 ms and ∼3 ms, which are independent of the gate length and the gate voltage, corresponding to two trap level depths of 0.5–0.7 eV with a 0.06 eV difference in the AlTiO insulator. In addition, gate leakage currents aremore » analyzed and attributed to the Poole-Frenkel mechanism due to traps in the AlTiO insulator, where the extracted trap level depth is consistent with the Lorentzian LFN.« less

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

Statistical Analysis of the Fractal Gating Motions of the Enzyme Acetylcholinesterase

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shen, T Y.; Tai, Kaihsu; Mccammon, Andy

The enzyme acetylcholinesterase has an active site that is accessible only by a gorge or main channel from the surface, and perhaps by secondary channels such as the back door. Molecular-dynamics simulations show that these channels are too narrow most of the time to admit substrate or other small molecules. Binding of substrates is therefore gated by structural fluctuations of the enzyme. Here, we analyze the fluctuations of these possible channels, as observed in the 10.8-ns trajectory of the simulation. The probability density function of the gorge proper radius (defined in the text) was calculated. A double-peak feature of themore » function was discovered and therefore two states with a threshold were identified. The relaxation (transition probability) functions of these two states were also calculated. The results revealed a power-law decay trend and an oscillation around it, which show properties of fractal dynamics with a complex exponent. The cross correlation of potential energy versus proper radius was also investigated. We discuss possible physical models behind the fractal protein dynamics; the dynamic hierarchical model for glassy systems is evaluated in detail.« less

A Study on Fast Gates for Large-Scale Quantum Simulation with Trapped Ions

PubMed Central

Taylor, Richard L.; Bentley, Christopher D. B.; Pedernales, Julen S.; Lamata, Lucas; Solano, Enrique; Carvalho, André R. R.; Hope, Joseph J.

2017-01-01

Large-scale digital quantum simulations require thousands of fundamental entangling gates to construct the simulated dynamics. Despite success in a variety of small-scale simulations, quantum information processing platforms have hitherto failed to demonstrate the combination of precise control and scalability required to systematically outmatch classical simulators. We analyse how fast gates could enable trapped-ion quantum processors to achieve the requisite scalability to outperform classical computers without error correction. We analyze the performance of a large-scale digital simulator, and find that fidelity of around 70% is realizable for π-pulse infidelities below 10−5 in traps subject to realistic rates of heating and dephasing. This scalability relies on fast gates: entangling gates faster than the trap period. PMID:28401945

A Study on Fast Gates for Large-Scale Quantum Simulation with Trapped Ions.

PubMed

Taylor, Richard L; Bentley, Christopher D B; Pedernales, Julen S; Lamata, Lucas; Solano, Enrique; Carvalho, André R R; Hope, Joseph J

2017-04-12

Large-scale digital quantum simulations require thousands of fundamental entangling gates to construct the simulated dynamics. Despite success in a variety of small-scale simulations, quantum information processing platforms have hitherto failed to demonstrate the combination of precise control and scalability required to systematically outmatch classical simulators. We analyse how fast gates could enable trapped-ion quantum processors to achieve the requisite scalability to outperform classical computers without error correction. We analyze the performance of a large-scale digital simulator, and find that fidelity of around 70% is realizable for π-pulse infidelities below 10 -5 in traps subject to realistic rates of heating and dephasing. This scalability relies on fast gates: entangling gates faster than the trap period.

Polarization engineered enhancement mode GaN HEMT: Design and investigation

NASA Astrophysics Data System (ADS)

Verma, Sumit; Loan, Sajad A.; Alharbi, Abdullah G.

2018-07-01

In this paper, we propose and perform the experimentally calibrated simulation of a novel structure of a GaN/AlGaN high electron mobility transistor (HEMT). The novelty of the structure is the realization of enhancement mode operation by employing polarization engineering approach. In the proposed polarization engineered HEMT (PE-HEMT) a buried Aluminum Nitride (AlN) box is employed in the GaN layer just below the gate. The AlN box creates a two-dimensional hole gas (2DHG) at the GaN/AlN interface, which creates a conduction band barrier in the path of the already existing two-dimensional electron gas (2DEG) at GaN/AlGaN. Therefore, there is no direct path between the source and drain regions at zero gate voltage due to the barrier created by AIN and the device is initially OFF, an enhancement mode operation. A two dimensional (2D) calibrated simulation study of proposed PE-HEMT shows that the device has a threshold voltage (Vth) of 2.3 V. The PE-HEMT also reduces the electron spillover and thus improves the breakdown voltage by 108% as compared to conventional HEMT. The thermal analysis of the GaN PE-HEMT shows that a hot zone occurs on the drain side gate edge. It has been observed that the drain current in the PE-HEMT structure can be improved by 157% by using AlN heat sink.

Integration of SimSET photon history generator in GATE for efficient Monte Carlo simulations of pinhole SPECT.

PubMed

Chen, Chia-Lin; Wang, Yuchuan; Lee, Jason J S; Tsui, Benjamin M W

2008-07-01

The authors developed and validated an efficient Monte Carlo simulation (MCS) workflow to facilitate small animal pinhole SPECT imaging research. This workflow seamlessly integrates two existing MCS tools: simulation system for emission tomography (SimSET) and GEANT4 application for emission tomography (GATE). Specifically, we retained the strength of GATE in describing complex collimator/detector configurations to meet the anticipated needs for studying advanced pinhole collimation (e.g., multipinhole) geometry, while inserting the fast SimSET photon history generator (PHG) to circumvent the relatively slow GEANT4 MCS code used by GATE in simulating photon interactions inside voxelized phantoms. For validation, data generated from this new SimSET-GATE workflow were compared with those from GATE-only simulations as well as experimental measurements obtained using a commercial small animal pinhole SPECT system. Our results showed excellent agreement (e.g., in system point response functions and energy spectra) between SimSET-GATE and GATE-only simulations, and, more importantly, a significant computational speedup (up to approximately 10-fold) provided by the new workflow. Satisfactory agreement between MCS results and experimental data were also observed. In conclusion, the authors have successfully integrated SimSET photon history generator in GATE for fast and realistic pinhole SPECT simulations, which can facilitate research in, for example, the development and application of quantitative pinhole and multipinhole SPECT for small animal imaging. This integrated simulation tool can also be adapted for studying other preclinical and clinical SPECT techniques.

Fast multipurpose Monte Carlo simulation for proton therapy using multi- and many-core CPU architectures.

PubMed

Souris, Kevin; Lee, John Aldo; Sterpin, Edmond

2016-04-01

Accuracy in proton therapy treatment planning can be improved using Monte Carlo (MC) simulations. However the long computation time of such methods hinders their use in clinical routine. This work aims to develop a fast multipurpose Monte Carlo simulation tool for proton therapy using massively parallel central processing unit (CPU) architectures. A new Monte Carlo, called MCsquare (many-core Monte Carlo), has been designed and optimized for the last generation of Intel Xeon processors and Intel Xeon Phi coprocessors. These massively parallel architectures offer the flexibility and the computational power suitable to MC methods. The class-II condensed history algorithm of MCsquare provides a fast and yet accurate method of simulating heavy charged particles such as protons, deuterons, and alphas inside voxelized geometries. Hard ionizations, with energy losses above a user-specified threshold, are simulated individually while soft events are regrouped in a multiple scattering theory. Elastic and inelastic nuclear interactions are sampled from ICRU 63 differential cross sections, thereby allowing for the computation of prompt gamma emission profiles. MCsquare has been benchmarked with the gate/geant4 Monte Carlo application for homogeneous and heterogeneous geometries. Comparisons with gate/geant4 for various geometries show deviations within 2%-1 mm. In spite of the limited memory bandwidth of the coprocessor simulation time is below 25 s for 10(7) primary 200 MeV protons in average soft tissues using all Xeon Phi and CPU resources embedded in a single desktop unit. MCsquare exploits the flexibility of CPU architectures to provide a multipurpose MC simulation tool. Optimized code enables the use of accurate MC calculation within a reasonable computation time, adequate for clinical practice. MCsquare also simulates prompt gamma emission and can thus be used also for in vivo range verification.

Effects of negative gate-bias stress on the performance of solution-processed zinc-oxide transistors

NASA Astrophysics Data System (ADS)

Kim, Dongwook; Lee, Woo-Sub; Shin, Hyunji; Choi, Jong Sun; Zhang, Xue; Park, Jaehoon; Hwang, Jaeeun; Kim, Hongdoo; Bae, Jin-Hyuk

2014-08-01

We studied the effects of negative gate-bias stress on the electrical characteristics of top-contact zinc-oxide (ZnO) thin-film transistors (TFTs), which were fabricated by spin coating a ZnO solution onto a silicon-nitride gate dielectric layer. The negative gate-bias stress caused characteristic degradations in the on-state currents and the field-effect mobility of the fabricated ZnO TFTs. Additionally, a decrease in the off-state currents and a positive shift in the threshold voltage occurred with increasing stress time. These results indicate that the negative gate-bias stress caused an injection of electrons into the gate dielectric, thereby deteriorating the TFT's performance.

α,ω-dihexyl-sexithiophene thin films for solution-gated organic field-effect transistors

NASA Astrophysics Data System (ADS)

Schamoni, Hannah; Noever, Simon; Nickel, Bert; Stutzmann, Martin; Garrido, Jose A.

2016-02-01

While organic semiconductors are being widely investigated for chemical and biochemical sensing applications, major drawbacks such as the poor device stability and low charge carrier mobility in aqueous electrolytes have not yet been solved to complete satisfaction. In this work, solution-gated organic field-effect transistors (SGOFETs) based on the molecule α,ω-dihexyl-sexithiophene (DH6T) are presented as promising platforms for in-electrolyte sensing. Thin films of DH6T were investigated with regard to the influence of the substrate temperature during deposition on the grain size and structural order. The performance of SGOFETs can be improved by choosing suitable growth parameters that lead to a two-dimensional film morphology and a high degree of structural order. Furthermore, the capability of the SGOFETs to detect changes in the pH or ionic strength of the gate electrolyte is demonstrated and simulated. Finally, excellent transistor stability is confirmed by continuously operating the device over a period of several days, which is a consequence of the low threshold voltage of DH6T-based SGOFETs. Altogether, our results demonstrate the feasibility of high performance and highly stable organic semiconductor devices for chemical or biochemical applications.

Quantum Mechanical Study of Nanoscale MOSFET

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

The steady state characteristics of MOSFETS that are of practical Interest are the drive current, off-current, dope of drain current versus drain voltage, and threshold voltage. In this section, we show that quantum mechanical simulations yield significantly different results from drift-diffusion based methods. These differences arise because of the following quantum mechanical features: (I) polysilicon gate depletion in a manner opposite to the classical case (II) dependence of the resonant levels in the channel on the gate voltage, (III) tunneling of charge across the gate oxide and from source to drain, (IV) quasi-ballistic flow of electrons. Conclusions dI/dV versus V does not increase in a manner commensurate with the increase in number of subbands. - The increase in dI/dV with bias is much smaller then the increase in the number of subbands - a consequence of bragg reflection. Our calculations show an increase in transmission with length of contact, as seen in experiments. It is desirable for molecular electronics applications to have a small contact area, yet large coupling. In this case, the circumferential dependence of the nanotube wave function dictates: - Transmission in armchair tubes saturates around unity - Transmission in zigzag tubes saturates at two.

Top-gate organic depletion and inversion transistors with doped channel and injection contact

NASA Astrophysics Data System (ADS)

Liu, Xuhai; Kasemann, Daniel; Leo, Karl

2015-03-01

Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

High-fidelity operations in microfabricated surface ion traps

NASA Astrophysics Data System (ADS)

Maunz, Peter

2017-04-01

Trapped ion systems can be used to implement quantum computation as well as quantum simulation. To scale these systems to the number of qubits required to solve interesting problems in quantum chemistry or solid state physics, the use of large multi-zone ion traps has been proposed. Microfabrication enables the realization of surface electrode ion traps with complex electrode structures. While these traps may enable the scaling of trapped ion quantum information processing (QIP), microfabricated ion traps also pose several technical challenges. Here, we present Sandia's trap fabrication capabilities and characterize trap properties and shuttling operations in our most recent high optical access trap (HOA-2). To demonstrate the viability of Sandia's microfabricated ion traps for QIP we realize robust single and two-qubit gates and characterize them using gate set tomography (GST). In this way we are able to demonstrate the first single qubit gates with a diamond norm of less than 1 . 7 ×10-4 , below a rigorous fault tolerance threshold for general noise of 6 . 7 ×10-4. Furthermore, we realize Mølmer-Sørensen two qubit gates with a process fidelity of 99 . 58(6) % also characterized by GST. These results demonstrate the viability of microfabricated surface traps for state of the art quantum information processing demonstrations. This research was funded, in part, by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA).

LDPC Codes with Minimum Distance Proportional to Block Size

NASA Technical Reports Server (NTRS)

Divsalar, Dariush; Jones, Christopher; Dolinar, Samuel; Thorpe, Jeremy

2009-01-01

Low-density parity-check (LDPC) codes characterized by minimum Hamming distances proportional to block sizes have been demonstrated. Like the codes mentioned in the immediately preceding article, the present codes are error-correcting codes suitable for use in a variety of wireless data-communication systems that include noisy channels. The previously mentioned codes have low decoding thresholds and reasonably low error floors. However, the minimum Hamming distances of those codes do not grow linearly with code-block sizes. Codes that have this minimum-distance property exhibit very low error floors. Examples of such codes include regular LDPC codes with variable degrees of at least 3. Unfortunately, the decoding thresholds of regular LDPC codes are high. Hence, there is a need for LDPC codes characterized by both low decoding thresholds and, in order to obtain acceptably low error floors, minimum Hamming distances that are proportional to code-block sizes. The present codes were developed to satisfy this need. The minimum Hamming distances of the present codes have been shown, through consideration of ensemble-average weight enumerators, to be proportional to code block sizes. As in the cases of irregular ensembles, the properties of these codes are sensitive to the proportion of degree-2 variable nodes. A code having too few such nodes tends to have an iterative decoding threshold that is far from the capacity threshold. A code having too many such nodes tends not to exhibit a minimum distance that is proportional to block size. Results of computational simulations have shown that the decoding thresholds of codes of the present type are lower than those of regular LDPC codes. Included in the simulations were a few examples from a family of codes characterized by rates ranging from low to high and by thresholds that adhere closely to their respective channel capacity thresholds; the simulation results from these examples showed that the codes in question have low error floors as well as low decoding thresholds. As an example, the illustration shows the protograph (which represents the blueprint for overall construction) of one proposed code family for code rates greater than or equal to 1.2. Any size LDPC code can be obtained by copying the protograph structure N times, then permuting the edges. The illustration also provides Field Programmable Gate Array (FPGA) hardware performance simulations for this code family. In addition, the illustration provides minimum signal-to-noise ratios (Eb/No) in decibels (decoding thresholds) to achieve zero error rates as the code block size goes to infinity for various code rates. In comparison with the codes mentioned in the preceding article, these codes have slightly higher decoding thresholds.

Threshold voltage tuning in AlGaN/GaN HFETs with p-type Cu2O gate synthesized by magnetron reactive sputtering

NASA Astrophysics Data System (ADS)

Wang, Lei; Li, Liuan; Xie, Tian; Wang, Xinzhi; Liu, Xinke; Ao, Jin-Ping

2018-04-01

In present study, copper oxide films were prepared at different sputtering powers (10-100 W) using magnetron reactive sputtering. The crystalline structure, surface morphologies, composition, and optical band gap of the as-grown films are dependent on sputtering power. As the sputtering power decreasing from 100 to 10 W, the composition of films changed from CuO to quasi Cu2O domination. Moreover, when the sputtering power is 10 W, a relative high hole carrier density and high-surface-quality quasi Cu2O thin film can be achieved. AlGaN/GaN HFETs were fabricated with the optimized p-type quasi Cu2O film as gate electrode, the threshold voltage of the device shows a 0.55 V positive shift, meanwhile, a lower gate leakage current, a higher ON/OFF drain current ratio of ∼108, a higher electron mobility (1465 cm2/Vs), and a lower subthreshold slope of 74 mV/dec are also achieved, compared with the typical Ni/Au-gated HFETs. Therefore, Cu2O have a great potential to develop high performance p-type gate AlGaN/GaN HFETs.

Universal quantum gate set approaching fault-tolerant thresholds with superconducting qubits.

PubMed

Chow, Jerry M; Gambetta, Jay M; Córcoles, A D; Merkel, Seth T; Smolin, John A; Rigetti, Chad; Poletto, S; Keefe, George A; Rothwell, Mary B; Rozen, J R; Ketchen, Mark B; Steffen, M

2012-08-10

We use quantum process tomography to characterize a full universal set of all-microwave gates on two superconducting single-frequency single-junction transmon qubits. All extracted gate fidelities, including those for Clifford group generators, single-qubit π/4 and π/8 rotations, and a two-qubit controlled-not, exceed 95% (98%), without (with) subtracting state preparation and measurement errors. Furthermore, we introduce a process map representation in the Pauli basis which is visually efficient and informative. This high-fidelity gate set serves as a critical building block towards scalable architectures of superconducting qubits for error correction schemes and pushes up on the known limits of quantum gate characterization.

Universal Quantum Gate Set Approaching Fault-Tolerant Thresholds with Superconducting Qubits

NASA Astrophysics Data System (ADS)

Chow, Jerry M.; Gambetta, Jay M.; Córcoles, A. D.; Merkel, Seth T.; Smolin, John A.; Rigetti, Chad; Poletto, S.; Keefe, George A.; Rothwell, Mary B.; Rozen, J. R.; Ketchen, Mark B.; Steffen, M.

2012-08-01

We use quantum process tomography to characterize a full universal set of all-microwave gates on two superconducting single-frequency single-junction transmon qubits. All extracted gate fidelities, including those for Clifford group generators, single-qubit π/4 and π/8 rotations, and a two-qubit controlled-not, exceed 95% (98%), without (with) subtracting state preparation and measurement errors. Furthermore, we introduce a process map representation in the Pauli basis which is visually efficient and informative. This high-fidelity gate set serves as a critical building block towards scalable architectures of superconducting qubits for error correction schemes and pushes up on the known limits of quantum gate characterization.

On the physical operation and optimization of the p-GaN gate in normally-off GaN HEMT devices

NASA Astrophysics Data System (ADS)

Efthymiou, L.; Longobardi, G.; Camuso, G.; Chien, T.; Chen, M.; Udrea, F.

2017-03-01

In this study, an investigation is undertaken to determine the effect of gate design parameters on the on-state characteristics (threshold voltage and gate turn-on voltage) of pGaN/AlGaN/GaN high electron mobility transistors (HEMTs). Design parameters considered are pGaN doping and gate metal work function. The analysis considers the effects of variations on these parameters using a TCAD model matched with experimental results. A better understanding of the underlying physics governing the operation of these devices is achieved with a view to enable better optimization of such gate designs.

Study of mechanism of stress-induced threshold voltage shift and recovery in top-gate amorphous-InGaZnO4 thin-film transistors with source- and drain-offsets

NASA Astrophysics Data System (ADS)

Mativenga, Mallory; Kang, Dong Han; Lee, Ung Gi; Jang, Jin

2012-09-01

Bias instability of top-gate amorphous-indium-gallium-zinc-oxide thin-film transistors with source- and drain-offsets is reported. Positive and negative gate bias-stress (VG_STRESS) respectively induce reversible negative threshold-voltage shift (ΔVTH) and reduction in on-current. Migration of positive charges towards the offsets lowers the local resistance of the offsets, resulting in the abnormal negative ΔVTH under positive VG_STRESS. The reduction in on-current under negative VG_STRESS is due to increase in resistance of the offsets when positive charges migrate away from the offsets. Appropriate drain and source bias-stresses applied simultaneously with VG_STRESS either suppress or enhance the instability, verifying lateral ion migration to be the instability mechanism.

The development of an interim generalized gate logic software simulator

NASA Technical Reports Server (NTRS)

Mcgough, J. G.; Nemeroff, S.

1985-01-01

A proof-of-concept computer program called IGGLOSS (Interim Generalized Gate Logic Software Simulator) was developed and is discussed. The simulator engine was designed to perform stochastic estimation of self test coverage (fault-detection latency times) of digital computers or systems. A major attribute of the IGGLOSS is its high-speed simulation: 9.5 x 1,000,000 gates/cpu sec for nonfaulted circuits and 4.4 x 1,000,000 gates/cpu sec for faulted circuits on a VAX 11/780 host computer.

Modeling and Simulating Airport Surface Operations with Gate Conflicts

NASA Technical Reports Server (NTRS)

Zelinski, Shannon; Windhorst, Robert

2017-01-01

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASA's Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglass International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling harsdstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departures are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

Modeling and Simulating Airport Surface Operations with Gate Conflicts

NASA Technical Reports Server (NTRS)

Zelinski, Shannon; Windhorst, Robert

2017-01-01

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASAs Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglas International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling hardstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departure are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

Charge injection from gate electrode by simultaneous stress of optical and electrical biases in HfInZnO amorphous oxide thin film transistor

NASA Astrophysics Data System (ADS)

Kwon, Dae Woong; Kim, Jang Hyun; Chang, Ji Soo; Kim, Sang Wan; Sun, Min-Chul; Kim, Garam; Kim, Hyun Woo; Park, Jae Chul; Song, Ihun; Kim, Chang Jung; Jung, U. In; Park, Byung-Gook

2010-11-01

A comprehensive study is done regarding stabilities under simultaneous stress of light and dc-bias in amorphous hafnium-indium-zinc-oxide thin film transistors. The positive threshold voltage (Vth) shift is observed after negative gate bias and light stress, and it is completely different from widely accepted phenomenon which explains that negative-bias stress results in Vth shift in the left direction by bias-induced hole-trapping. Gate current measurement is performed to explain the unusual positive Vth shift under simultaneous application of light and negative gate bias. As a result, it is clearly found that the positive Vth shift is derived from electron injection from gate electrode to gate insulator.

Two-dimensional analytical model of double-gate tunnel FETs with interface trapped charges including effects of channel mobile charge carriers

NASA Astrophysics Data System (ADS)

Xu, Huifang; Dai, Yuehua

2017-02-01

A two-dimensional analytical model of double-gate (DG) tunneling field-effect transistors (TFETs) with interface trapped charges is proposed in this paper. The influence of the channel mobile charges on the potential profile is also taken into account in order to improve the accuracy of the models. On the basis of potential profile, the electric field is derived and the expression for the drain current is obtained by integrating the BTBT generation rate. The model can be used to study the impact of interface trapped charges on the surface potential, the shortest tunneling length, the drain current and the threshold voltage for varying interface trapped charge densities, length of damaged region as well as the structural parameters of the DG TFET and can also be utilized to design the charge trapped memory devices based on TFET. The biggest advantage of this model is that it is more accurate, and in its expression there are no fitting parameters with small calculating amount. Very good agreements for both the potential, drain current and threshold voltage are observed between the model calculations and the simulated results. Project supported by the National Natural Science Foundation of China (No. 61376106), the University Natural Science Research Key Project of Anhui Province (No. KJ2016A169), and the Introduced Talents Project of Anhui Science and Technology University.

Structure-dependent water transport across nanopores of carbon nanotubes: toward selective gating upon temperature regulation.

PubMed

Zhao, Kuiwen; Wu, Huiying

2015-04-28

Determining water structure in nanopores and its influence on water transport behaviour is of great importance for understanding and regulating the transport across nanopores. Here we report an ultrafast-slow flow transition phenomenon for water transport across nanopores of carbon nanotubes owing to the change in water structure in nanopores induced by temperature. By performing extensive molecular dynamics simulations, we show the dependence of water transport behaviours on water structures. Our results indicate that owing to the change in water structure in nanopores, water flux across nanopores with certain pore sizes decreases sharply (nearly 3 orders of magnitude) with the decreasing temperature. This phenomenon is very sensitive to the pore size. The threshold temperatures for the occurrence of the ultrafast-slow flow transition for water transport are also determined for various pore sizes. These findings suggest a novel protocol for selective gating of water and proton conduction across nanopores and temperature-controlled drug release.

Wide operating window spin-torque majority gate towards large-scale integration of logic circuits

NASA Astrophysics Data System (ADS)

Vaysset, Adrien; Zografos, Odysseas; Manfrini, Mauricio; Mocuta, Dan; Radu, Iuliana P.

2018-05-01

Spin Torque Majority Gate (STMG) is a logic concept that inherits the non-volatility and the compact size of MRAM devices. In the original STMG design, the operating range was restricted to very small size and anisotropy, due to the exchange-driven character of domain expansion. Here, we propose an improved STMG concept where the domain wall is driven with current. Thus, input switching and domain wall propagation are decoupled, leading to higher energy efficiency and allowing greater technological optimization. To ensure majority operation, pinning sites are introduced. We observe through micromagnetic simulations that the new structure works for all input combinations, regardless of the initial state. Contrary to the original concept, the working condition is only given by threshold and depinning currents. Moreover, cascading is now possible over long distances and fan-out is demonstrated. Therefore, this improved STMG concept is ready to build complete Boolean circuits in absence of external magnetic fields.

A microwave field-driven transistor-like skyrmionic device with the microwave current-assisted skyrmion creation

NASA Astrophysics Data System (ADS)

Xia, Jing; Huang, Yangqi; Zhang, Xichao; Kang, Wang; Zheng, Chentian; Liu, Xiaoxi; Zhao, Weisheng; Zhou, Yan

2017-10-01

Magnetic skyrmion is a topologically protected domain-wall structure at nanoscale, which could serve as a basic building block for advanced spintronic devices. Here, we propose a microwave field-driven skyrmionic device with the transistor-like function, where the motion of a skyrmion in a voltage-gated ferromagnetic nanotrack is studied by micromagnetic simulations. It is demonstrated that the microwave field can drive the motion of a skyrmion by exciting the propagating spin waves, and the skyrmion motion can be governed by a gate voltage. We also investigate the microwave current-assisted creation of a skyrmion to facilitate the operation of the transistor-like skyrmionic device on the source terminal. It is found that the microwave current with an appropriate frequency can reduce the threshold current density required for the creation of a skyrmion from the ferromagnetic background. The proposed transistor-like skyrmionic device operated with the microwave field and current could be useful for building future skyrmion-based circuits.

Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

NASA Astrophysics Data System (ADS)

Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

2016-07-01

Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

Measurement-free implementations of small-scale surface codes for quantum-dot qubits

NASA Astrophysics Data System (ADS)

Ercan, H. Ekmel; Ghosh, Joydip; Crow, Daniel; Premakumar, Vickram N.; Joynt, Robert; Friesen, Mark; Coppersmith, S. N.

2018-01-01

The performance of quantum-error-correction schemes depends sensitively on the physical realizations of the qubits and the implementations of various operations. For example, in quantum-dot spin qubits, readout is typically much slower than gate operations, and conventional surface-code implementations that rely heavily on syndrome measurements could therefore be challenging. However, fast and accurate reset of quantum-dot qubits, without readout, can be achieved via tunneling to a reservoir. Here we propose small-scale surface-code implementations for which syndrome measurements are replaced by a combination of Toffoli gates and qubit reset. For quantum-dot qubits, this enables much faster error correction than measurement-based schemes, but requires additional ancilla qubits and non-nearest-neighbor interactions. We have performed numerical simulations of two different coding schemes, obtaining error thresholds on the orders of 10-2 for a one-dimensional architecture that only corrects bit-flip errors and 10-4 for a two-dimensional architecture that corrects bit- and phase-flip errors.

Introduction of performance boosters like Ge as channel material for the future of CMOS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Samia, Slimani, E-mail: slimani.samia@gmail.com; Laboratoire de Modélisation et Méthodes de calcul LMMC,20002 Saida; Bouaza, Djellouli, E-mail: djelbou@hotmail.fr

High mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. Ge is one of new attractive channel materials that require CMOS scaling For future technology nodes and future high performance P-MOSFETS, we have studied a nanoscale SOI DG MOSFETs using quantum simulation approach on DG MOSFETs within the variation of Ge channel concentration and in the presence of source and drain doping by replacing Silicon in the channel by Ge using various dielectric constant. The use of high mobility channel (like Ge) to maximize the MOSFET IDsat and simultaneously circumventmore » the poor electrostatic control to suppress short-channel effects and enhance source injection velocity. The leakage current (I{sub off}) can be controlled by different gates oxide thickness more ever the required threshold voltage (V{sub TH}) can be achieved by keeping gate work function and altering the doping channel.« less

Way-Scaling to Reduce Power of Cache with Delay Variation

NASA Astrophysics Data System (ADS)

Goudarzi, Maziar; Matsumura, Tadayuki; Ishihara, Tohru

The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistors improves leakage, but impacts cell delay. We show that due to uncorrelated random within-die delay variation, only some (not all) of cells actually violate the cache delay after the above change. We propose to add a spare cache way to replace delay-violating cache-lines separately in each cache-set. By SPICE and gate-level simulations in a commercial 90nm process, we show that choosing higher Vth, Tox and adding one spare way to a 4-way 16KB cache reduces leakage power by 42%, which depending on the share of leakage in total cache power, gives up to 22.59% and 41.37% reduction of total energy respectively in L1 instruction- and L2 unified-cache with a negligible delay penalty, but without sacrificing cache capacity or timing-yield.

Threshold Voltage Instability in A-Si:H TFTS and the Implications for Flexible Displays and Circuits

DTIC Science & Technology

2008-12-01

and negative gate voltages with and without elevated drain voltages for FDC TFTs. Extending techniques used to localize hot electron degradation...in MOSFETs, experiments in our lab have localized the degradation of a-Si:H to the gate dielectric/a-Si:H channel interface [Shringarpure, et al...saturation, increased drain source current measured with the source and drain reversed indicates localization of ΔVth to the gate dielectric/amorphous

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2015-08-12

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Temperature dependence of DC transport characteristics for a two-dimensional electron gas in an undoped Si/SiGe heterostructure

NASA Astrophysics Data System (ADS)

Chou, Kuan-Yu; Hsu, Nai-Wen; Su, Yi-Hsin; Chou, Chung-Tao; Chiu, Po-Yuan; Chuang, Yen; Li, Jiun-Yun

2018-02-01

We investigate DC characteristics of a two-dimensional electron gas (2DEG) in an undoped Si/SiGe heterostructure and its temperature dependence. An insulated-gate field-effect transistor was fabricated, and transfer characteristics were measured at 4 K-300 K. At low temperatures (T < 45 K), source electrons are injected into the buried 2DEG channel first and drain current increases with the gate voltage. By increasing the gate voltage further, the current saturates followed by a negative transconductance observed, which can be attributed to electron tunneling from the buried channel to the surface channel. Finally, the drain current is saturated again at large gate biases due to parallel conduction of buried and surface channels. By increasing the temperature, an abrupt increase in threshold voltage is observed at T ˜ 45 K and it is speculated that negatively charged impurities at the Al2O3/Si interface are responsible for the threshold voltage shift. At T > 45 K, the current saturation and negative transconductance disappear and the device acts as a normal transistor.

Fault-tolerant quantum computation with nondeterministic entangling gates

NASA Astrophysics Data System (ADS)

Auger, James M.; Anwar, Hussain; Gimeno-Segovia, Mercedes; Stace, Thomas M.; Browne, Dan E.

2018-03-01

Performing entangling gates between physical qubits is necessary for building a large-scale universal quantum computer, but in some physical implementations—for example, those that are based on linear optics or networks of ion traps—entangling gates can only be implemented probabilistically. In this work, we study the fault-tolerant performance of a topological cluster state scheme with local nondeterministic entanglement generation, where failed entangling gates (which correspond to bonds on the lattice representation of the cluster state) lead to a defective three-dimensional lattice with missing bonds. We present two approaches for dealing with missing bonds; the first is a nonadaptive scheme that requires no additional quantum processing, and the second is an adaptive scheme in which qubits can be measured in an alternative basis to effectively remove them from the lattice, hence eliminating their damaging effect and leading to better threshold performance. We find that a fault-tolerance threshold can still be observed with a bond-loss rate of 6.5% for the nonadaptive scheme, and a bond-loss rate as high as 14.5% for the adaptive scheme.

Electrical characteristic fluctuation of 16-nm-gate high-κ/metal gate bulk FinFET devices in the presence of random interface traps

NASA Astrophysics Data System (ADS)

Hsu, Sheng-Chia; Li, Yiming

2014-11-01

In this work, we study the impact of random interface traps (RITs) at the interface of SiO x /Si on the electrical characteristic of 16-nm-gate high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices. Under the same threshold voltage, the effects of RIT position and number on the degradation of electrical characteristics are clarified with respect to different levels of RIT density of state ( D it). The variability of the off-state current ( I off) and drain-induced barrier lowering (DIBL) will be severely affected by RITs with high D it varying from 5 × 1012 to 5 × 1013 eV-1 cm-2 owing to significant threshold voltage ( V th) fluctuation. The results of this study indicate that if the level of D it is lower than 1 × 1012 eV-1 cm-2, the normalized variability of the on-state current, I off, V th, DIBL, and subthreshold swing is within 5%.

Limitations of threshold voltage engineering of AlGaN/GaN heterostructures by dielectric interface charge density and manipulation by oxygen plasma surface treatments

NASA Astrophysics Data System (ADS)

Lükens, G.; Yacoub, H.; Kalisch, H.; Vescan, A.

2016-05-01

The interface charge density between the gate dielectric and an AlGaN/GaN heterostructure has a significant impact on the absolute value and stability of the threshold voltage Vth of metal-insulator-semiconductor (MIS) heterostructure field effect transistor. It is shown that a dry-etching step (as typically necessary for normally off devices engineered by gate-recessing) before the Al2O3 gate dielectric deposition introduces a high positive interface charge density. Its origin is most likely donor-type trap states shifting Vth to large negative values, which is detrimental for normally off devices. We investigate the influence of oxygen plasma annealing techniques of the dry-etched AlGaN/GaN surface by capacitance-voltage measurements and demonstrate that the positive interface charge density can be effectively compensated. Furthermore, only a low Vth hysteresis is observable making this approach suitable for threshold voltage engineering. Analysis of the electrostatics in the investigated MIS structures reveals that the maximum Vth shift to positive voltages achievable is fundamentally limited by the onset of accumulation of holes at the dielectric/barrier interface. In the case of the Al2O3/Al0.26Ga0.74N/GaN material system, this maximum threshold voltage shift is limited to 2.3 V.

The electrical performance and gate bias stability of an amorphous InGaZnO thin-film transistor with HfO2 high-k dielectrics

NASA Astrophysics Data System (ADS)

Wang, Ruo Zheng; Wu, Sheng Li; Li, Xin Yu; Zhang, Jin Tao

2017-07-01

In this study, we set out to fabricate an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with SiNx/HfO2/SiNx (SHS) sandwiched dielectrics. The J-V and C-V of this SHS film were extracted by the Au/p-Si/SHS/Ti structure. At room temperature the a-IGZO with SHS dielectrics showed the following electrical properties: a threshold voltage of 2.9 V, a subthreshold slope of 0.35 V/decade, an on/off current ratio of 3.5 × 107, and a mobility of 12.8 cm2 V-1 s-1. Finally, we tested the influence of gate bias stress on the TFT, and the result showed that the threshold voltage shifted to a positive voltage when applying a positive gate voltage to the TFT.

Pseudo-diode based on protonic/electronic hybrid oxide transistor

NASA Astrophysics Data System (ADS)

Fu, Yang Ming; Liu, Yang Hui; Zhu, Li Qiang; Xiao, Hui; Song, An Ran

2018-01-01

Current rectification behavior has been proved to be essential in modern electronics. Here, a pseudo-diode is proposed based on protonic/electronic hybrid indium-gallium-zinc oxide electric-double-layer (EDL) transistor. The oxide EDL transistors are fabricated by using phosphorous silicate glass (PSG) based proton conducting electrolyte as gate dielectric. A diode operation mode is established on the transistor, originating from field configurable proton fluxes within the PSG electrolyte. Current rectification ratios have been modulated to values ranged between ˜4 and ˜50 000 with gate electrode biased at voltages ranged between -0.7 V and 0.1 V. Interestingly, the proposed pseudo-diode also exhibits field reconfigurable threshold voltages. When the gate is biased at -0.5 V and 0.3 V, threshold voltages are set to ˜-1.3 V and -0.55 V, respectively. The proposed pseudo-diode may find potential applications in brain-inspired platforms and low-power portable systems.

Transmission and reflection of charge-density wave packets in a quantum Hall edge controlled by a metal gate

NASA Astrophysics Data System (ADS)

Matsuura, Masahiro; Mano, Takaaki; Noda, Takeshi; Shibata, Naokazu; Hotta, Masahiro; Yusa, Go

2018-02-01

Quantum energy teleportation (QET) is a proposed protocol related to quantum vacuum. The edge channels in a quantum Hall system are well suited for the experimental verification of QET. For this purpose, we examine a charge-density wave packet excited and detected by capacitively coupled front gate electrodes. We observe the waveform of the charge packet, which is proportional to the time derivative of the applied square voltage wave. Further, we study the transmission and reflection behaviors of the charge-density wave packet by applying a voltage to another front gate electrode to control the path of the edge state. We show that the threshold voltages where the dominant direction is switched in either transmission or reflection for dense and sparse wave packets are different from the threshold voltage where the current stops flowing in an equilibrium state.

Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

NASA Astrophysics Data System (ADS)

Wang, Kai; Ou, Hai; Chen, Jun

2015-06-01

Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

Low-Temperature-Processed Zinc Oxide Thin-Film Transistors Fabricated by Plasma-Assisted Atomic Layer Deposition

NASA Astrophysics Data System (ADS)

Kawamura, Yumi; Tani, Mai; Hattori, Nozomu; Miyatake, Naomasa; Horita, Masahiro; Ishikawa, Yasuaki; Uraoka, Yukiharu

2012-02-01

We investigated zinc oxide (ZnO) thin films prepared by plasma assisted atomic layer deposition (PA-ALD), and thin-film transistors (TFTs) with the ALD ZnO channel layer for application to next-generation displays. We deposited the ZnO channel layer by PA-ALD at 100 or 300 °C, and fabricated TFTs. The transfer characteristic of the 300 °C-deposited ZnO TFT exhibited high mobility (5.7 cm2 V-1 s-1), although the threshold voltage largely shifted toward the negative (-16 V). Furthermore, we deposited Al2O3 thin film as a gate insulator by PA-ALD at 100 °C for the low-temperature TFT fabrication process. In the case of ZnO TFTs with the Al2O3 gate insulator, the shift of the threshold voltage improved (-0.1 V). This improvement of the negative shift seems to be due to the negative charges of the Al2O3 film deposited by PA-ALD. On the basis of the experimental results, we confirmed that the threshold voltage of ZnO TFTs is controlled by PA-ALD for the deposition of the gate insulator.

Planarized thick copper gate polycrystalline silicon thin film transistors for ultra-large AMOLED displays

NASA Astrophysics Data System (ADS)

Yun, Seung Jae; Lee, Yong Woo; Son, Se Wan; Byun, Chang Woo; Reddy, A. Mallikarjuna; Joo, Seung Ki

2012-08-01

A planarized thick copper (Cu) gate low temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) is fabricated for ultra-large active-matrix organic light-emitting diode (AMOLED) displays. We introduce a damascene and chemical mechanical polishing process to embed a planarized Cu gate of 500 nm thickness into a trench and Si3N4/SiO2 multilayer gate insulator, to prevent the Cu gate from diffusing into the silicon (Si) layer at 550°C, and metal-induced lateral crystallization (MILC) technology to crystallize the amorphous Si layer. A poly-Si TFT with planarized thick Cu gate exhibits a field effect mobility of 5 cm2/Vs and a threshold voltage of -9 V, and a subthreshold swing (S) of 1.4 V/dec.

Using in-process measurements of open-gate structures to evaluate threshold voltage of normally-off GaN-based high electron mobility transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hou, Bin; Ma, Xiao-Hua, E-mail: xhma@xidian.edu.cn, E-mail: yhao@xidian.edu.cn; Chen, Wei-Wei

The parameters of open-gate structures treated with different etching time were monitored during the gate recess process, and their impacts on the threshold voltage (V{sub th}) of final fabricated AlGaN/GaN high electron mobility transistors (HEMTs) based on open-gate structures were discussed in this paper. It is found that V{sub th} can exceed 0 V when channel resistance in the recessed region (R{sub on-open}) increases over ∼275 Ω mm, maximum current (I{sub Dmax}) decreases below ∼29 mA/mm, or recessed barrier thickness (t{sub RB}) is below ∼7.5 nm. In addition, t{sub RB} obtained by atomic force microscopy measurements and C-V measurements are also compared. Finally,more » theoretical common criteria based on the experimental results of this work for t{sub RB} and R{sub on-open} were established to evaluate the V{sub th} of a regular normally-off AlGaN/GaN HEMTs. The results indicate that these parameters of open-gate structure can be utilized to achieve normally-off HEMTs with controllable V{sub th}.« less

Heterojunction fully depleted SOI-TFET with oxide/source overlap

NASA Astrophysics Data System (ADS)

Chander, Sweta; Bhowmick, B.; Baishya, S.

2015-10-01

In this work, a hetero-junction fully depleted (FD) Silicon-on-Insulator (SOI) Tunnel Field Effect Transistor (TFET) nanostructure with oxide overlap on the Germanium-source region is proposed. Investigations using Synopsys Technology Computer Aided Design (TCAD) simulation tools reveal that the simple oxide overlap on the Germanium-source region increases the tunneling area as well as the tunneling current without degrading the band-to-band tunneling (BTBT) and improves the device performance. More importantly, the improvement is independent of gate overlap. Simulation study shows improvement in ON current, subthreshold swing (SS), OFF current, ION/IOFF ration, threshold voltage and transconductance. The proposed device with hafnium oxide (HfO2)/Aluminium Nitride (AlN) stack dielectric material offers an average subthreshold swing of 22 mV/decade and high ION/IOFF ratio (∼1010) at VDS = 0.4 V. Compared to conventional TFET, the Miller capacitance of the device shows the enhanced performance. The impact of the drain voltage variation on different parameters such as threshold voltage, subthreshold swing, transconductance, and ION/IOFF ration are also found to be satisfactory. From fabrication point of view also it is easy to utilize the existing CMOS process flows to fabricate the proposed device.

Elucidating reaction mechanisms on quantum computers.

PubMed

Reiher, Markus; Wiebe, Nathan; Svore, Krysta M; Wecker, Dave; Troyer, Matthias

2017-07-18

With rapid recent advances in quantum technology, we are close to the threshold of quantum devices whose computational powers can exceed those of classical supercomputers. Here, we show that a quantum computer can be used to elucidate reaction mechanisms in complex chemical systems, using the open problem of biological nitrogen fixation in nitrogenase as an example. We discuss how quantum computers can augment classical computer simulations used to probe these reaction mechanisms, to significantly increase their accuracy and enable hitherto intractable simulations. Our resource estimates show that, even when taking into account the substantial overhead of quantum error correction, and the need to compile into discrete gate sets, the necessary computations can be performed in reasonable time on small quantum computers. Our results demonstrate that quantum computers will be able to tackle important problems in chemistry without requiring exorbitant resources.

Elucidating reaction mechanisms on quantum computers

PubMed Central

Reiher, Markus; Wiebe, Nathan; Svore, Krysta M.; Wecker, Dave; Troyer, Matthias

2017-01-01

With rapid recent advances in quantum technology, we are close to the threshold of quantum devices whose computational powers can exceed those of classical supercomputers. Here, we show that a quantum computer can be used to elucidate reaction mechanisms in complex chemical systems, using the open problem of biological nitrogen fixation in nitrogenase as an example. We discuss how quantum computers can augment classical computer simulations used to probe these reaction mechanisms, to significantly increase their accuracy and enable hitherto intractable simulations. Our resource estimates show that, even when taking into account the substantial overhead of quantum error correction, and the need to compile into discrete gate sets, the necessary computations can be performed in reasonable time on small quantum computers. Our results demonstrate that quantum computers will be able to tackle important problems in chemistry without requiring exorbitant resources. PMID:28674011

Elucidating reaction mechanisms on quantum computers

NASA Astrophysics Data System (ADS)

Reiher, Markus; Wiebe, Nathan; Svore, Krysta M.; Wecker, Dave; Troyer, Matthias

2017-07-01

With rapid recent advances in quantum technology, we are close to the threshold of quantum devices whose computational powers can exceed those of classical supercomputers. Here, we show that a quantum computer can be used to elucidate reaction mechanisms in complex chemical systems, using the open problem of biological nitrogen fixation in nitrogenase as an example. We discuss how quantum computers can augment classical computer simulations used to probe these reaction mechanisms, to significantly increase their accuracy and enable hitherto intractable simulations. Our resource estimates show that, even when taking into account the substantial overhead of quantum error correction, and the need to compile into discrete gate sets, the necessary computations can be performed in reasonable time on small quantum computers. Our results demonstrate that quantum computers will be able to tackle important problems in chemistry without requiring exorbitant resources.

Hot-Carrier Immunity of Polycrystalline Silicon Thin Film Transistors Using Silicon Oxynitride Gate Dielectric Formed with Plasma-Enhanced Chemical Vapor Deposition

NASA Astrophysics Data System (ADS)

Kunii, Masafumi

2009-11-01

An analysis is presented of the hot-carrier degradation in a polycrystalline silicon (poly-Si) thin film transistor (TFT) with a silicon oxynitride gate dielectric formed with plasma-enhanced chemical vapor deposition. An introduction of silicon oxynitride into a gate dielectric significantly improves hot-carrier immunity even under the severe stressing mode of drain avalanche hot carriers. To compensate the initial negative shift of threshold voltage for TFTs with a silicon oxynitride gate dielectric, high-pressure water vapor annealing (HWA) is applied. A comparison of TFTs with and without HWA reveals that the improvement in hot-carrier immunity is mainly attributed to the introduction of Si≡N bonds into a gate dielectric.

Simulation and video animation of canal flushing created by a tide gate

USGS Publications Warehouse

Schoellhamer, David H.

1988-01-01

A tide-gate algorithm was added to a one-dimensional unsteady flow model that was calibrated, verified, and used to determine the locations of as many as five tide gates that would maximize flushing in two canal systems. Results from the flow model were used to run a branched Lagrangian transport model to simulate the flushing of a conservative constituent from the canal systems both with and without tide gates. A tide gate produces a part-time riverine flow through the canal system that improves flushing along the flow path created by the tide gate. Flushing with no tide gates and with a single optimally located tide gate are shown with a video animation.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

NASA Astrophysics Data System (ADS)

Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

2014-01-01

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

High-Fidelity Quantum Logic Gates Using Trapped-Ion Hyperfine Qubits.

PubMed

Ballance, C J; Harty, T P; Linke, N M; Sepiol, M A; Lucas, D M

2016-08-05

We demonstrate laser-driven two-qubit and single-qubit logic gates with respective fidelities 99.9(1)% and 99.9934(3)%, significantly above the ≈99% minimum threshold level required for fault-tolerant quantum computation, using qubits stored in hyperfine ground states of calcium-43 ions held in a room-temperature trap. We study the speed-fidelity trade-off for the two-qubit gate, for gate times between 3.8  μs and 520  μs, and develop a theoretical error model which is consistent with the data and which allows us to identify the principal technical sources of infidelity.

Efficient simulation of voxelized phantom in GATE with embedded SimSET multiple photon history generator.

PubMed

Lin, Hsin-Hon; Chuang, Keh-Shih; Lin, Yi-Hsing; Ni, Yu-Ching; Wu, Jay; Jan, Meei-Ling

2014-10-21

GEANT4 Application for Tomographic Emission (GATE) is a powerful Monte Carlo simulator that combines the advantages of the general-purpose GEANT4 simulation code and the specific software tool implementations dedicated to emission tomography. However, the detailed physical modelling of GEANT4 is highly computationally demanding, especially when tracking particles through voxelized phantoms. To circumvent the relatively slow simulation of voxelized phantoms in GATE, another efficient Monte Carlo code can be used to simulate photon interactions and transport inside a voxelized phantom. The simulation system for emission tomography (SimSET), a dedicated Monte Carlo code for PET/SPECT systems, is well-known for its efficiency in simulation of voxel-based objects. An efficient Monte Carlo workflow integrating GATE and SimSET for simulating pinhole SPECT has been proposed to improve voxelized phantom simulation. Although the workflow achieves a desirable increase in speed, it sacrifices the ability to simulate decaying radioactive sources such as non-pure positron emitters or multiple emission isotopes with complex decay schemes and lacks the modelling of time-dependent processes due to the inherent limitations of the SimSET photon history generator (PHG). Moreover, a large volume of disk storage is needed to store the huge temporal photon history file produced by SimSET that must be transported to GATE. In this work, we developed a multiple photon emission history generator (MPHG) based on SimSET/PHG to support a majority of the medically important positron emitters. We incorporated the new generator codes inside GATE to improve the simulation efficiency of voxelized phantoms in GATE, while eliminating the need for the temporal photon history file. The validation of this new code based on a MicroPET R4 system was conducted for (124)I and (18)F with mouse-like and rat-like phantoms. Comparison of GATE/MPHG with GATE/GEANT4 indicated there is a slight difference in energy spectra for energy below 50 keV due to the lack of x-ray simulation from (124)I decay in the new code. The spatial resolution, scatter fraction and count rate performance are in good agreement between the two codes. For the case studies of (18)F-NaF ((124)I-IAZG) using MOBY phantom with 1  ×  1 × 1 mm(3) voxel sizes, the results show that GATE/MPHG can achieve acceleration factors of approximately 3.1 × (4.5 ×), 6.5 × (10.7 ×) and 9.5 × (31.0 ×) compared with GATE using the regular navigation method, the compressed voxel method and the parameterized tracking technique, respectively. In conclusion, the implementation of MPHG in GATE allows for improved efficiency of voxelized phantom simulations and is suitable for studying clinical and preclinical imaging.

Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

PubMed

Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

2014-12-24

We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

Scaling properties of ballistic nano-transistors

PubMed Central

2011-01-01

Recently, we have suggested a scale-invariant model for a nano-transistor. In agreement with experiments a close-to-linear thresh-old trace was found in the calculated ID - VD-traces separating the regimes of classically allowed transport and tunneling transport. In this conference contribution, the relevant physical quantities in our model and its range of applicability are discussed in more detail. Extending the temperature range of our studies it is shown that a close-to-linear thresh-old trace results at room temperatures as well. In qualitative agreement with the experiments the ID - VG-traces for small drain voltages show thermally activated transport below the threshold gate voltage. In contrast, at large drain voltages the gate-voltage dependence is weaker. As can be expected in our relatively simple model, the theoretical drain current is larger than the experimental one by a little less than a decade. PMID:21711899

SU-E-J-211: Design and Study of In-House Software Based Respiratory Motion Monitoring, Controlling and Breath-Hold Device for Gated Radiotherapy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shanmugam, Senthilkumar

Purpose: The purpose of this present work was to fabricate an in-house software based respiratory monitoring, controlling and breath-hold device using computer software programme which guides the patient to have uniform breath hold in response to request during the gated radiotherapy. Methods: The respiratory controlling device consists of a computer, inhouse software, video goggles, a highly sensitive sensor for measurement of distance, mounting systems, a camera, a respiratory signal device, a speaker and a visual indicator. The computer is used to display the respiratory movements of the patient with digital as well as analogue respiration indicators during the respiration cycle,more » to control, breath-hold and analyze the respiratory movement using indigenously developed software. Results: Studies were conducted with anthropomophic phantoms by simulating the respiratory motion on phantoms and recording the respective movements using the respiratory monitoring device. The results show good agreement between the simulated and measured movements. Further studies were conducted for 60 cancer patients with several types of cancers in the thoracic region. The respiratory movement cycles for each fraction of radiotherapy treatment were recorded and compared. Alarm indications are provided in the system to indicate when the patient breathing movement exceeds the threshold level. This will help the patient to maintain uniform breath hold during the radiotherapy treatment. Our preliminary clinical test results indicate that our device is highly reliable and able to maintain the uniform respiratory motion and breathe hold during the entire course of gated radiotherapy treatment. Conclusion: An indigenous respiratory monitoring device to guide the patient to have uniform breath hold device was fabricated. The alarm feature and the visual waveform indicator in the system guide the patient to have normal respiration. The signal from the device can be connected to the radiation unit in near future to carry out the gated radiotherapy treatment.« less

A theoretical approach to study the optical sensitivity of a MESFET

NASA Astrophysics Data System (ADS)

Dutta, Sutanu

2018-05-01

A theoretical model to study the optical sensitivity of a metal-semiconductor field effect transistor has been proposed for a relatively high drain field. An analytical expression of drain current of the device has been derived for a MESFET under optical illumination considering field dependent mobility of electrons across the channel. The variation of drain current with and without optical illumination has been studied with drain and gate voltages. The optical sensitivity of the drain current has been studied for different biasing conditions and gate lengths. In addition, the shift in threshold voltage of a MESFET under optical illumination is determined and optical sensitivity of the device in terms of its threshold voltage has been studied.

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

NASA Technical Reports Server (NTRS)

Toshishige, Yamada; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

[Protective effect of Uncaria rhynchophylla total alkaloids pretreatment on hippocampal neurons after acute hypoxia].

PubMed

Liu, Wei; Zhang, Zhao-qin; Zhao, Xiao-min; Gao, Yun-sheng

2006-05-01

To investigate the effect of Uncaria rhynchophylla total alkaloids (RTA) pretreatment on the voltage-gated sodium currents of the rat hippocampal neurons after acute hypoxia. Primary cultured hippocampal neurons were divided into RTA pre-treated and non-pretreated groups. Patch clamp whole-cell recording was used to compare the voltage-gated sodium current amplitude and threshold with those before hypoxia. After acute hypoxia, sodium current amplitude was significantly decreased and its threshold was upside. RTA pretreatment could inhibit the reduction of sodium current amplitude. RTA pretreatment alleviates the acute hypoxia-induced change of sodium currents, which may be one of the mechanisms for protective effect of RTA on cells.

Evaluation of effective dose with chest digital tomosynthesis system using Monte Carlo simulation

NASA Astrophysics Data System (ADS)

Kim, Dohyeon; Jo, Byungdu; Lee, Youngjin; Park, Su-Jin; Lee, Dong-Hoon; Kim, Hee-Joung

2015-03-01

Chest digital tomosynthesis (CDT) system has recently been introduced and studied. This system offers the potential to be a substantial improvement over conventional chest radiography for the lung nodule detection and reduces the radiation dose with limited angles. PC-based Monte Carlo program (PCXMC) simulation toolkit (STUK, Helsinki, Finland) is widely used to evaluate radiation dose in CDT system. However, this toolkit has two significant limits. Although PCXMC is not possible to describe a model for every individual patient and does not describe the accurate X-ray beam spectrum, Geant4 Application for Tomographic Emission (GATE) simulation describes the various size of phantom for individual patient and proper X-ray spectrum. However, few studies have been conducted to evaluate effective dose in CDT system with the Monte Carlo simulation toolkit using GATE. The purpose of this study was to evaluate effective dose in virtual infant chest phantom of posterior-anterior (PA) view in CDT system using GATE simulation. We obtained the effective dose at different tube angles by applying dose actor function in GATE simulation which was commonly used to obtain the medical radiation dosimetry. The results indicated that GATE simulation was useful to estimate distribution of absorbed dose. Consequently, we obtained the acceptable distribution of effective dose at each projection. These results indicated that GATE simulation can be alternative method of calculating effective dose in CDT applications.

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Effects of various gate materials on electrical degradation of a-Si:H TFT in industrial display application

NASA Astrophysics Data System (ADS)

Ho, Ching-Yuan; Chang, Yaw-Jen

2016-02-01

Both aluminum (Al) and copper (Cu), acting as transmission lines in the hydrogenated amorphous silicon of a thin film transistor (a-Si:H TFT), were studied to investigate electrical degradation including electron-migration (EM) and threshold voltage (Vt) stability and recovery performance. Under long-term current stress, the Cu material exhibited excellent resistance to EM properties, but a passivated SiNx crack was observed due to fast heat conductivity. By applying electrical stress on the gate and drain for 5 × 104 s, the power-law time dependency of the threshold voltage shift (ΔVt) indicated that the defective state creation dominated the TFT device's instability. The presence of drain stress increased the overall ΔVt because the high longitudinal field induced impact ionization and then, enhanced hot-carrier-induced electron trapping within the gate SiNx dielectric. An annealing effect prompted a stressed a-Si:H TFT back to virgin status. This study proposes better ΔVt stability and excellent resistance against electron-migration in a Cu gate device which can be considered as a candidate for a transmission line on prolonged TFT applications.

Image-guided adaptive gating of lung cancer radiotherapy: a computer simulation study

NASA Astrophysics Data System (ADS)

Aristophanous, Michalis; Rottmann, Joerg; Park, Sang-June; Nishioka, Seiko; Shirato, Hiroki; Berbeco, Ross I.

2010-08-01

The purpose of this study is to investigate the effect that image-guided adaptation of the gating window during treatment could have on the residual tumor motion, by simulating different gated radiotherapy techniques. There are three separate components of this simulation: (1) the 'Hokkaido Data', which are previously measured 3D data of lung tumor motion tracks and the corresponding 1D respiratory signals obtained during the entire ungated radiotherapy treatments of eight patients, (2) the respiratory gating protocol at our institution and the imaging performed under that protocol and (3) the actual simulation in which the Hokkaido Data are used to select tumor position information that could have been collected based on the imaging performed under our gating protocol. We simulated treatments with a fixed gating window and a gating window that is updated during treatment. The patient data were divided into different fractions, each with continuous acquisitions longer than 2 min. In accordance to the imaging performed under our gating protocol, we assume that we have tumor position information for the first 15 s of treatment, obtained from kV fluoroscopy, and for the rest of the fractions the tumor position is only available during the beam-on time from MV imaging. The gating window was set according to the information obtained from the first 15 s such that the residual motion was less than 3 mm. For the fixed gating window technique the gate remained the same for the entire treatment, while for the adaptive technique the range of the tumor motion during beam-on time was measured and used to adapt the gating window to keep the residual motion below 3 mm. The algorithm used to adapt the gating window is described. The residual tumor motion inside the gating window was reduced on average by 24% for the patients with regular breathing patterns and the difference was statistically significant (p-value = 0.01). The magnitude of the residual tumor motion depended on the regularity of the breathing pattern suggesting that image-guided adaptive gating should be combined with breath coaching. The adaptive gating window technique was able to track the exhale position of the breathing cycle quite successfully. Out of a total of 53 fractions the duty cycle was greater than 20% for 42 fractions for the fixed gating window technique and for 39 fractions for the adaptive gating window technique. The results of this study suggest that real-time updating of the gating window can result in reliably low residual tumor motion and therefore can facilitate safe margin reduction.

Fast multipurpose Monte Carlo simulation for proton therapy using multi- and many-core CPU architectures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Souris, Kevin, E-mail: kevin.souris@uclouvain.be; Lee, John Aldo; Sterpin, Edmond

2016-04-15

Purpose: Accuracy in proton therapy treatment planning can be improved using Monte Carlo (MC) simulations. However the long computation time of such methods hinders their use in clinical routine. This work aims to develop a fast multipurpose Monte Carlo simulation tool for proton therapy using massively parallel central processing unit (CPU) architectures. Methods: A new Monte Carlo, called MCsquare (many-core Monte Carlo), has been designed and optimized for the last generation of Intel Xeon processors and Intel Xeon Phi coprocessors. These massively parallel architectures offer the flexibility and the computational power suitable to MC methods. The class-II condensed history algorithmmore » of MCsquare provides a fast and yet accurate method of simulating heavy charged particles such as protons, deuterons, and alphas inside voxelized geometries. Hard ionizations, with energy losses above a user-specified threshold, are simulated individually while soft events are regrouped in a multiple scattering theory. Elastic and inelastic nuclear interactions are sampled from ICRU 63 differential cross sections, thereby allowing for the computation of prompt gamma emission profiles. MCsquare has been benchmarked with the GATE/GEANT4 Monte Carlo application for homogeneous and heterogeneous geometries. Results: Comparisons with GATE/GEANT4 for various geometries show deviations within 2%–1 mm. In spite of the limited memory bandwidth of the coprocessor simulation time is below 25 s for 10{sup 7} primary 200 MeV protons in average soft tissues using all Xeon Phi and CPU resources embedded in a single desktop unit. Conclusions: MCsquare exploits the flexibility of CPU architectures to provide a multipurpose MC simulation tool. Optimized code enables the use of accurate MC calculation within a reasonable computation time, adequate for clinical practice. MCsquare also simulates prompt gamma emission and can thus be used also for in vivo range verification.« less

Adiabatic gate teleportation.

PubMed

Bacon, Dave; Flammia, Steven T

2009-09-18

The difficulty in producing precisely timed and controlled quantum gates is a significant source of error in many physical implementations of quantum computers. Here we introduce a simple universal primitive, adiabatic gate teleportation, which is robust to timing errors and many control errors and maintains a constant energy gap throughout the computation above a degenerate ground state space. This construction allows for geometric robustness based upon the control of two independent qubit interactions. Further, our piecewise adiabatic evolution easily relates to the quantum circuit model, enabling the use of standard methods from fault-tolerance theory for establishing thresholds.

Network-based simulation of aircraft at gates in airport terminals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cheng, Y.

1998-03-01

Simulation is becoming an essential tool for planning, design, and management of airport facilities. A simulation of aircraft at gates at an airport can be applied for various periodically performed applications, relating to the dynamic behavior of aircraft at gates in airport terminals for analyses, evaluations, and decision supports. Conventionally, such simulations are implemented using an event-driven method. For a more efficient simulation, this paper proposes a network-based method. The basic idea is to transform all the sequence constraint relations of aircraft at gates into a network. The simulation is done by calculating the longest path to all the nodesmore » in the network. The effect of the algorithm of the proposed method has been examined by experiments, and the superiority of the proposed method over the event-driven method is revealed through comprehensive comparisons of their overall simulation performance.« less

An Adaptive Deghosting Method in Neural Network-Based Infrared Detectors Nonuniformity Correction

PubMed Central

Li, Yiyang; Jin, Weiqi; Zhu, Jin; Zhang, Xu; Li, Shuo

2018-01-01

The problems of the neural network-based nonuniformity correction algorithm for infrared focal plane arrays mainly concern slow convergence speed and ghosting artifacts. In general, the more stringent the inhibition of ghosting, the slower the convergence speed. The factors that affect these two problems are the estimated desired image and the learning rate. In this paper, we propose a learning rate rule that combines adaptive threshold edge detection and a temporal gate. Through the noise estimation algorithm, the adaptive spatial threshold is related to the residual nonuniformity noise in the corrected image. The proposed learning rate is used to effectively and stably suppress ghosting artifacts without slowing down the convergence speed. The performance of the proposed technique was thoroughly studied with infrared image sequences with both simulated nonuniformity and real nonuniformity. The results show that the deghosting performance of the proposed method is superior to that of other neural network-based nonuniformity correction algorithms and that the convergence speed is equivalent to the tested deghosting methods. PMID:29342857

An Adaptive Deghosting Method in Neural Network-Based Infrared Detectors Nonuniformity Correction.

PubMed

Li, Yiyang; Jin, Weiqi; Zhu, Jin; Zhang, Xu; Li, Shuo

2018-01-13

The problems of the neural network-based nonuniformity correction algorithm for infrared focal plane arrays mainly concern slow convergence speed and ghosting artifacts. In general, the more stringent the inhibition of ghosting, the slower the convergence speed. The factors that affect these two problems are the estimated desired image and the learning rate. In this paper, we propose a learning rate rule that combines adaptive threshold edge detection and a temporal gate. Through the noise estimation algorithm, the adaptive spatial threshold is related to the residual nonuniformity noise in the corrected image. The proposed learning rate is used to effectively and stably suppress ghosting artifacts without slowing down the convergence speed. The performance of the proposed technique was thoroughly studied with infrared image sequences with both simulated nonuniformity and real nonuniformity. The results show that the deghosting performance of the proposed method is superior to that of other neural network-based nonuniformity correction algorithms and that the convergence speed is equivalent to the tested deghosting methods.

100-nm gate lithography for double-gate transistors

NASA Astrophysics Data System (ADS)

Krasnoperova, Azalia A.; Zhang, Ying; Babich, Inna V.; Treichler, John; Yoon, Jung H.; Guarini, Kathryn; Solomon, Paul M.

2001-09-01

The double gate field effect transistor (FET) is an exploratory device that promises certain performance advantages compared to traditional CMOS FETs. It can be scaled down further than the traditional devices because of the greater electrostatic control by the gates on the channel (about twice as short a channel length for the same gate oxide thickness), has steeper sub-threshold slope and about double the current for the same width. This paper presents lithographic results for double gate FET's developed at IBM's T. J. Watson Research Center. The device is built on bonded wafers with top and bottom gates self-aligned to each other. The channel is sandwiched between the top and bottom polysilicon gates and the gate length is defined using DUV lithography. An alternating phase shift mask was used to pattern gates with critical dimensions of 75 nm, 100 nm and 125 nm in photoresist. 50 nm gates in photoresist have also been patterned by 20% over-exposure of nominal 100 nm lines. No trim mask was needed because of a specific way the device was laid out. UV110 photoresist from Shipley on AR-3 antireflective layer were used. Process windows, developed and etched patterns are presented.

Low-voltage electric-double-layer paper transistors gated by microporous SiO2 processed at room temperature

NASA Astrophysics Data System (ADS)

Sun, Jia; Wan, Qing; Lu, Aixia; Jiang, Jie

2009-11-01

Battery drivable low-voltage SnO2-based paper thin-film transistors with a near-zero threshold voltage (Vth=0.06 V) gated by microporous SiO2 dielectric with electric-double-layer (EDL) effect are fabricated at room temperature. The operating voltage is found to be as low as 1.5 V due to the huge gate specific capacitance (1.34 μF/cm2 at 40 Hz) related to EDL formation. The subthreshold gate voltage swing and current on/off ratio is found to be 82 mV/decade and 2.0×105, respectively. The electron field-effect mobility is estimated to be 47.3 cm2/V s based on the measured gate specific capacitance at 40 Hz.

High-performance pentacene OTFT by incorporating Ti in LaON gate dielectric

NASA Astrophysics Data System (ADS)

Ma, Y. X.; Han, C. Y.; Tang, W. M.; Lai, P. T.

2017-07-01

Pentacene organic thin-film transistors (OTFT) using high-k LaTiON gate dielectric with different Ti contents are investigated. The LaxTi(1-x)ON films (with x = 1, 0.87, 0.76, and 0.67) are deposited by reactive sputtering followed by an annealing in N2 at 200 °C. The OTFT with La0.87Ti0.13ON can achieve a high carrier mobility of 2.6 cm2/V.s, a small threshold voltage of -1.5 V, a small sub-threshold swing of 0.07 V/dec, and a small hysteresis of 0.17 V. AFM and X-ray photoelectron spectroscopy reveal that Ti can suppress the hygroscopicity of La oxide to achieve a smoother dielectric surface, which can result in larger pentacene grains and thus higher carrier mobility. All the devices show a clockwise hysteresis because both the LaOH formation and Ti incorporation can generate acceptor-like traps in the gate dielectric.

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE PAGES

King, M. P.; Wu, X.; Eller, Manfred; ...

2016-12-07

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

King, M. P.; Wu, X.; Eller, Manfred

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

NASA Astrophysics Data System (ADS)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

High-performance enhancement-mode Al2O3/InAlGaN/GaN MOS high-electron mobility transistors with a self-aligned gate recessing technology

NASA Astrophysics Data System (ADS)

Zhang, Kai; Kong, Cen; Zhou, Jianjun; Kong, Yuechan; Chen, Tangsheng

2017-02-01

The paper reports high-performance enhancement-mode MOS high-electron mobility transistors (MOS-HEMTs) based on a quaternary InAlGaN barrier. Self-aligned gate technology is used for gate recessing, dielectric deposition, and gate electrode formation. An improved digital recessing process is developed, and an Al2O3 gate dielectric grown with O2 plasma is used. Compared to results with AlGaN barrier, the fabricated E-mode MOS-HEMT with InAlGaN barrier delivers a record output current density of 1.7 A/mm with a threshold voltage (V TH) of 1.5 V, and a small on-resistance (R on) of 2.0 Ω·mm. Excellent V TH hysteresis and greatly improved gate leakage characteristics are also demonstrated.

Pentacene-based low voltage organic field-effect transistors with anodized Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Jeong, Yeon Taek; Dodabalapur, Ananth

2007-11-01

Pentacene-based low voltage organic field-effect transistors were realized using an anodized Ta2O5 gate dielectric. The Ta2O5 gate dielectric layer with a surface roughness of 1.3Å was obtained by anodizing an e-beam evaporated Ta film. The device exhibited values of saturation mobility, threshold voltage, and Ion/Ioff ratio of 0.45cm2/Vs, 0.56V, and 7.5×101, respectively. The gate leakage current was reduced by more than 70% with a hexamethyldisilazane (HMDS) treatment on the Ta2O5 layer. The HMDS treatment also resulted in enhanced mobility values and a larger pentacene grain size.

Cycle of charge carrier states with formation and extinction of a floating gate in an ambipolar tetracyanoquaterthienoquinoid-based field-effect transistor

NASA Astrophysics Data System (ADS)

Itoh, Takuro; Toyota, Taro; Higuchi, Hiroyuki; Matsushita, Michio M.; Suzuki, Kentaro; Sugawara, Tadashi

2017-03-01

A tetracyanoquaterthienoquinoid (TCT4Q)-based field effect transistor is characterized by the ambipolar transfer characteristics and the facile shift of the threshold voltage induced by the bias stress. The trapping and detrapping kinetics of charge carriers was investigated in detail by the temperature dependence of the decay of source-drain current (ISD). We found a repeatable formation of a molecular floating gate is derived from a 'charge carrier-and-gate' cycle comprising four stages, trapping of mobile carriers, formation of a floating gate, induction of oppositely charged mobile carriers, and recombination between mobile and trapped carriers to restore the initial state.

Transistor-based particle detection systems and methods

DOEpatents

Jain, Ankit; Nair, Pradeep R.; Alam, Muhammad Ashraful

2015-06-09

Transistor-based particle detection systems and methods may be configured to detect charged and non-charged particles. Such systems may include a supporting structure contacting a gate of a transistor and separating the gate from a dielectric of the transistor, and the transistor may have a near pull-in bias and a sub-threshold region bias to facilitate particle detection. The transistor may be configured to change current flow through the transistor in response to a change in stiffness of the gate caused by securing of a particle to the gate, and the transistor-based particle detection system may configured to detect the non-charged particle at least from the change in current flow.

A 32-bit Ultrafast Parallel Correlator using Resonant Tunneling Devices

NASA Technical Reports Server (NTRS)

Kulkarni, Shriram; Mazumder, Pinaki; Haddad, George I.

1995-01-01

An ultrafast 32-bit pipeline correlator has been implemented using resonant tunneling diodes (RTD) and hetero-junction bipolar transistors (HBT). The negative differential resistance (NDR) characteristics of RTD's is the basis of logic gates with the self-latching property that eliminates pipeline area and delay overheads which limit throughput in conventional technologies. The circuit topology also allows threshold logic functions such as minority/majority to be implemented in a compact manner resulting in reduction of the overall complexity and delay of arbitrary logic circuits. The parallel correlator is an essential component in code division multi-access (CDMA) transceivers used for the continuous calculation of correlation between an incoming data stream and a PN sequence. Simulation results show that a nano-pipelined correlator can provide and effective throughput of one 32-bit correlation every 100 picoseconds, using minimal hardware, with a power dissipation of 1.5 watts. RTD plus HBT based logic gates have been fabricated and the RTD plus HBT based correlator is compared with state of the art complementary metal oxide semiconductor (CMOS) implementations.

Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions.

PubMed

Trommer, Jens; Heinzig, André; Mühle, Uwe; Löffler, Markus; Winzer, Annett; Jordan, Paul M; Beister, Jürgen; Baldauf, Tim; Geidel, Marion; Adolphi, Barbara; Zschech, Ehrenfried; Mikolajick, Thomas; Weber, Walter M

2017-02-28

Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.

Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Tian-Li, E-mail: Tian-Li.Wu@imec.be; Groeseneken, Guido; Department of Electrical Engineering, KU Leuven, Leuven

2015-08-31

In this paper, three electrical techniques (frequency dependent conductance analysis, AC transconductance (AC-g{sub m}), and positive gate bias stress) were used to evaluate three different gate dielectrics (Plasma-Enhanced Atomic Layer Deposition Si{sub 3}N{sub 4}, Rapid Thermal Chemical Vapor Deposition Si{sub 3}N{sub 4}, and Atomic Layer Deposition (ALD) Al{sub 2}O{sub 3}) for AlGaN/GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors. From these measurements, the interface state density (D{sub it}), the amount of border traps, and the threshold voltage (V{sub TH}) shift during a positive gate bias stress can be obtained. The results show that the V{sub TH} shift during a positive gate bias stress ismore » highly correlated to not only interface states but also border traps in the dielectric. A physical model is proposed describing that electrons can be trapped by both interface states and border traps. Therefore, in order to minimize the V{sub TH} shift during a positive gate bias stress, the gate dielectric needs to have a lower interface state density and less border traps. However, the results also show that the commonly used frequency dependent conductance analysis technique to extract D{sub it} needs to be cautiously used since the resulting value might be influenced by the border traps and, vice versa, i.e., the g{sub m} dispersion commonly attributed to border traps might be influenced by interface states.« less

Gated high speed optical detector

NASA Technical Reports Server (NTRS)

Green, S. I.; Carson, L. M.; Neal, G. W.

1973-01-01

The design, fabrication, and test of two gated, high speed optical detectors for use in high speed digital laser communication links are discussed. The optical detectors used a dynamic crossed field photomultiplier and electronics including dc bias and RF drive circuits, automatic remote synchronization circuits, automatic gain control circuits, and threshold detection circuits. The equipment is used to detect binary encoded signals from a mode locked neodynium laser.

The physical mechanism on the threshold voltage temperature stability improvement for GaN HEMTs with pre-fluorination argon treatment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Yun-Hsiang; A*STAR Institute of Microelectronics, Singapore 117685; Liang, Yung C., E-mail: chii@nus.edu.sg

2016-06-06

In this paper, a normally-off AlGaN/GaN MIS-HEMT with improved threshold voltage (V{sub TH}) thermal stability is reported with investigations on its physical mechanism. The normally-off operation of the device is achieved from novel short argon plasma treatment (APT) prior to the fluorine plasma treatment (FPT) on Al{sub 2}O{sub 3} gate dielectrics. For the MIS-HEMT with FPT only, its V{sub TH} drops from 4.2 V at room temperature to 0.5 V at 200 °C. Alternatively, for the device with APT-then-FPT process, its V{sub TH} can retain at 2.5 V at 200 °C due to the increased amount of deep-level traps that do not emit electrons atmore » 200 °C. This thermally stable V{sub TH} makes this device suitable for high power applications. The depth profile of the F atoms in Al{sub 2}O{sub 3}, measured by the secondary ion mass spectroscopy, reveals a significant increase in the F concentration when APT is conducted prior to FPT. The X-ray photoelectron spectroscopy (XPS) analysis on the plasma-treated Al{sub 2}O{sub 3} surfaces observes higher composition of Al-F bonds if APT was applied before FPT. The enhanced breaking of Al-O bonds due to Ar bombardment assisted in the increased incorporation of F radicals at the surface during the subsequent FPT process. The Schrödinger equation of Al{sub 2}O{sub x}F{sub y} cells, with the same Al-F compositions as obtained from XPS, was solved by Gaussian 09 molecular simulations to extract electron state distribution as a function of energy. The simulation results show creation of the deeper trap states in the Al{sub 2}O{sub 3} bandgap when APT is used before FPT. Finally, the trap distribution extracted from the simulations is verified by the gate-stress experimental characterization to confirm the physical mechanism described.« less

Influence of gate recess on the electronic characteristics of β-Ga2O3 MOSFETs

NASA Astrophysics Data System (ADS)

Lv, Yuanjie; Mo, Jianghui; Song, Xubo; He, Zezhao; Wang, Yuangang; Tan, Xin; Zhou, Xingye; Gu, Guodong; Guo, Hongyu; Feng, Zhihong

2018-05-01

Gallium oxide (Ga2O3) metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with gate recess depths of 110 nm and 220 nm, respectively. The gate recess was formed by dry plasma etching with Cr metal as the mask. The fabricated devices with a 25-nm HfO2 gate dielectric both showed a low off-state drain current of about 1.8 × 10-10 A/mm. The effects of recess depth on the electronic characteristics of Ga2O3 MOSFETs were investigated. Upon increasing the recess depth from 110 nm to 220 nm, the saturated drain current decreased from 20.7 mA/mm to 2.6 mA/mm, while the threshold voltage moved increased to +3 V. Moreover, the breakdown voltage increased from 122 V to 190 V. This is mainly because the inverted-trapezoidal gate played the role of a gate-field plate, which suppressed the peak electric field close to the gate.

Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chun, Minkyu; Um, Jae Gwang; Park, Min Sang

We report the abnormal behavior of the threshold voltage (V{sub TH}) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (V{sub TG}), while bottom gate bias (V{sub BG}) is less effect than V{sub TG}. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of Inmore » metal diffusion to the top SiO{sub 2}/a-IGZO and also the existence of large amount of In{sup +} under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH{sup −} at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of V{sub TG} both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.« less

Crystalline ZrTiO{sub 4} gated p-metal–oxide–semiconductor field effect transistors with sub-nm equivalent oxide thickness featuring good electrical characteristics and reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Chao-Yi; Hsieh, Ching-Heng; Lee, Ching-Wei

2015-02-02

ZrTiO{sub 4} crystallized in orthorhombic (o-) phase was stacked with an amorphous Yb{sub 2}O{sub 3} interfacial layer as the gate dielectric for Si-based p-MOSFETs. With thermal annealing after gate electrode, the gate stack with equivalent oxide thickness (EOT) of 0.82 nm achieves high dielectric quality by showing a low interface trap density (D{sub it}) of 2.75 × 10{sup 11 }cm{sup −2}eV{sup −1} near the midgap and low oxide traps. Crystallization of ZrTiO{sub 4} and post metal annealing are also proven to introduce very limited amount of metal induced gap states or interfacial dipole. The p-MOSFETs exhibit good sub-threshold swing of 75 mV/dec which is ascribedmore » to the low D{sub it} value and small EOT. Owing to the Y{sub 2}O{sub 3} interfacial layer and smooth interface with Si substrate that, respectively, suppress phonon and surface roughness scattering, the p-MOSFETs also display high hole mobility of 49 cm{sup 2}/V-s at 1 MV/cm. In addition, I{sub on}/I{sub off} ratio larger than 10{sup 6} is also observed. From the reliability evaluation by negative bias temperature instability test, after stressing with an electric field of −10 MV/cm at 85 °C for 1000 s, satisfactory threshold voltage shift of 12 mV and sub-threshold swing degradation of 3% were obtained. With these promising characteristics, the Yb{sub 2}O{sub 3}/o-ZrTiO{sub 4} gate stack holds the great potential for next-generation electronics.« less

Impact of SiNx capping on the formation of source/drain contact for In-Ga-Zn-O thin film transistor with self-aligned gate

NASA Astrophysics Data System (ADS)

Oh, Himchan; Pi, Jae-Eun; Hwang, Chi-Sun; Kwon, Oh-Sang

2017-12-01

Self-aligned gate structures are preferred for faster operation and scaling down of thin film transistors by reducing the overlapped region between source/drain and gate electrodes. Doping on source/drain regions is essential to fabricate such a self-aligned gate thin film transistor. For oxide semiconductors such as In-Ga-Zn-O, SiNx capping readily increases their carrier concentration. We report that the SiNx deposition temperature and thickness significantly affect the device properties, including threshold voltage, field effect mobility, and contact resistance. The reason for these variations in device characteristics mainly comes from the extension of the doped region to the gated area after the SiNx capping step. Analyses on capacitance-voltage and transfer length characteristics support this idea.

Hardware Fault Simulator for Microprocessors

NASA Technical Reports Server (NTRS)

Hess, L. M.; Timoc, C. C.

1983-01-01

Breadboarded circuit is faster and more thorough than software simulator. Elementary fault simulator for AND gate uses three gates and shaft register to simulate stuck-at-one or stuck-at-zero conditions at inputs and output. Experimental results showed hardware fault simulator for microprocessor gave faster results than software simulator, by two orders of magnitude, with one test being applied every 4 microseconds.

A SONOS device with a separated charge trapping layer for improvement of charge injection

NASA Astrophysics Data System (ADS)

Ahn, Jae-Hyuk; Moon, Dong-Il; Ko, Seung-Won; Kim, Chang-Hoon; Kim, Jee-Yeon; Kim, Moon-Seok; Seol, Myeong-Lok; Moon, Joon-Bae; Choi, Ji-Min; Oh, Jae-Sub; Choi, Sung-Jin; Choi, Yang-Kyu

2017-03-01

A charge trapping layer that is separated from the primary gate dielectric is implemented on a FinFET SONOS structure. By virtue of the reduced effective oxide thickness of the primary gate dielectric, a strong gate-to-channel coupling is obtained and thus short-channel effects in the proposed device are effectively suppressed. Moreover, a high program/erase speed and a large shift in the threshold voltage are achieved due to the improved charge injection by the reduced effective oxide thickness. The proposed structure has potential for use in high speed flash memory.

Extended-gate organic field-effect transistor for the detection of histamine in water

NASA Astrophysics Data System (ADS)

Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

2015-04-01

As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

Superlinear threshold detectors in quantum cryptography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lydersen, Lars; Maroey, Oystein; Skaar, Johannes

2011-09-15

We introduce the concept of a superlinear threshold detector, a detector that has a higher probability to detect multiple photons if it receives them simultaneously rather than at separate times. Highly superlinear threshold detectors in quantum key distribution systems allow eavesdropping the full secret key without being revealed. Here, we generalize the detector control attack, and analyze how it performs against quantum key distribution systems with moderately superlinear detectors. We quantify the superlinearity in superconducting single-photon detectors based on earlier published data, and gated avalanche photodiode detectors based on our own measurements. The analysis shows that quantum key distribution systemsmore » using detector(s) of either type can be vulnerable to eavesdropping. The avalanche photodiode detector becomes superlinear toward the end of the gate. For systems expecting substantial loss, or for systems not monitoring loss, this would allow eavesdropping using trigger pulses containing less than 120 photons per pulse. Such an attack would be virtually impossible to catch with an optical power meter at the receiver entrance.« less

Nanocrystal floating gate memory with solution-processed indium-zinc-tin-oxide channel and colloidal silver nanocrystals

NASA Astrophysics Data System (ADS)

Hu, Quanli; Ha, Sang-Hyub; Lee, Hyun Ho; Yoon, Tae-Sik

2011-12-01

A nanocrystal (NC) floating gate memory with solution-processed indium-zinc-tin-oxide (IZTO) channel and silver (Ag) NCs embedded in thin gate dielectric layer (SiO2(30 nm)/Al2O3(3 nm)) was fabricated. Both the IZTO channel and colloidal Ag NC layers were prepared by spin-coating and subsequent annealing, and dip-coating process, respectively. A threshold voltage shift up to ~0.9 V, corresponding to the electron density of 6.5 × 1011 cm-2, at gate pulsing <=10 V was achieved by the charging of high density NCs. These results present the successful non-volatile memory characteristics of an oxide-semiconductor transistor fabricated through solution processes.

Characteristics of enhanced-mode AlGaN/GaN MIS HEMTs for millimeter wave applications

NASA Astrophysics Data System (ADS)

Lee, Jong-Min; Ahn, Ho-Kyun; Jung, Hyun-Wook; Shin, Min Jeong; Lim, Jong-Won

2017-09-01

In this paper, an enhanced-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT) was developed by using 4-inch GaN HEMT process. We designed and fabricated Emode HEMTs and characterized device performance. To estimate the possibility of application for millimeter wave applications, we focused on the high frequency performance and power characteristics. To shift the threshold voltage of HEMTs we applied the Al2O3 insulator to the gate structure and adopted the gate recess technique. To increase the frequency performance the e-beam lithography technique was used to define the 0.15 um gate length. To evaluate the dc and high frequency performance, electrical characterization was performed. The threshold voltage was measured to be positive value by linear extrapolation from the transfer curve. The device leakage current is comparable to that of the depletion mode device. The current gain cut-off frequency and the maximum oscillation frequency of the E-mode device with a total gate width of 150 um were 55 GHz and 168 GHz, respectively. To confirm the power performance for mm-wave applications the load-pull test was performed. The measured power density of 2.32 W/mm was achieved at frequencies of 28 and 30 GHz.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device andmore » thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.« less

Highly Stable, Dual-Gated MoS2 Transistors Encapsulated by Hexagonal Boron Nitride with Gate-Controllable Contact, Resistance, and Threshold Voltage.

PubMed

Lee, Gwan-Hyoung; Cui, Xu; Kim, Young Duck; Arefe, Ghidewon; Zhang, Xian; Lee, Chul-Ho; Ye, Fan; Watanabe, Kenji; Taniguchi, Takashi; Kim, Philip; Hone, James

2015-07-28

Emerging two-dimensional (2D) semiconductors such as molybdenum disulfide (MoS2) have been intensively studied because of their novel properties for advanced electronics and optoelectronics. However, 2D materials are by nature sensitive to environmental influences, such as temperature, humidity, adsorbates, and trapped charges in neighboring dielectrics. Therefore, it is crucial to develop device architectures that provide both high performance and long-term stability. Here we report high performance of dual-gated van der Waals (vdW) heterostructure devices in which MoS2 layers are fully encapsulated by hexagonal boron nitride (hBN) and contacts are formed using graphene. The hBN-encapsulation provides excellent protection from environmental factors, resulting in highly stable device performance, even at elevated temperatures. Our measurements also reveal high-quality electrical contacts and reduced hysteresis, leading to high two-terminal carrier mobility (33-151 cm(2) V(-1) s(-1)) and low subthreshold swing (80 mV/dec) at room temperature. Furthermore, adjustment of graphene Fermi level and use of dual gates enable us to separately control contact resistance and threshold voltage. This novel vdW heterostructure device opens up a new way toward fabrication of stable, high-performance devices based on 2D materials.

Methodology for Analysis, Modeling and Simulation of Airport Gate-waiting Delays

NASA Astrophysics Data System (ADS)

Wang, Jianfeng

This dissertation presents methodologies to estimate gate-waiting delays from historical data, to identify gate-waiting-delay functional causes in major U.S. airports, and to evaluate the impact of gate operation disruptions and mitigation strategies on gate-waiting delay. Airport gates are a resource of congestion in the air transportation system. When an arriving flight cannot pull into its gate, the delay it experiences is called gate-waiting delay. Some possible reasons for gate-waiting delay are: the gate is occupied, gate staff or equipment is unavailable, the weather prevents the use of the gate (e.g. lightning), or the airline has a preferred gate assignment. Gate-waiting delays potentially stay with the aircraft throughout the day (unless they are absorbed), adding costs to passengers and the airlines. As the volume of flights increases, ensuring that airport gates do not become a choke point of the system is critical. The first part of the dissertation presents a methodology for estimating gate-waiting delays based on historical, publicly available sources. Analysis of gate-waiting delays at major U.S. airports in the summer of 2007 identifies the following. (i) Gate-waiting delay is not a significant problem on majority of days; however, the worst delay days (e.g. 4% of the days at LGA) are extreme outliers. (ii) The Atlanta International Airport (ATL), the John F. Kennedy International Airport (JFK), the Dallas/Fort Worth International Airport (DFW) and the Philadelphia International Airport (PHL) experience the highest gate-waiting delays among major U.S. airports. (iii) There is a significant gate-waiting-delay difference between airlines due to a disproportional gate allocation. (iv) Gate-waiting delay is sensitive to time of a day and schedule peaks. According to basic principles of queueing theory, gate-waiting delay can be attributed to over-scheduling, higher-than-scheduled arrival rate, longer-than-scheduled gate-occupancy time, and reduced gate availability. Analysis of the worst days at six major airports in the summer of 2007 indicates that major gate-waiting delays are primarily due to operational disruptions---specifically, extended gate occupancy time, reduced gate availability and higher-than-scheduled arrival rate (usually due to arrival delay). Major gate-waiting delays are not a result of over-scheduling. The second part of this dissertation presents a simulation model to evaluate the impact of gate operational disruptions and gate-waiting-delay mitigation strategies, including building new gates, implementing common gates, using overnight off-gate parking and adopting self-docking gates. Simulation results show the following effects of disruptions: (i) The impact of arrival delay in a time window (e.g. 7 pm to 9 pm) on gate-waiting delay is bounded. (ii) The impact of longer-than-scheduled gate-occupancy times in a time window on gate-waiting delay can be unbounded and gate-waiting delay can increase linearly as the disruption level increases. (iii) Small reductions in gate availability have a small impact on gate-waiting delay due to slack gate capacity, while larger reductions have a non-linear impact as slack gate capacity is used up. Simulation results show the following effects of mitigation strategies: (i) Implementing common gates is an effective mitigation strategy, especially for airports with a flight schedule not dominated by one carrier, such as LGA. (ii) The overnight off-gate rule is effective in mitigating gate-waiting delay for flights stranded overnight following departure cancellations. This is especially true at airports where the gate utilization is at maximum overnight, such as LGA and DFW. The overnight off-gate rule can also be very effective to mitigate gate-waiting delay due to operational disruptions in evenings. (iii) Self-docking gates are effective in mitigating gate-waiting delay due to reduced gate availability.

Thick layered semiconductor devices with water top-gates: High on-off ratio field-effect transistors and aqueous sensors.

PubMed

Huang, Yuan; Sutter, Eli; Wu, Liangmei; Xu, Hong; Bao, Lihong; Gao, Hong-Jun; Zhou, Xingjiang; Sutter, Peter

2018-06-21

Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for field-effect switching of layered semiconductors including SnS2, MoS2, and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on-off current ratios, near-ideal sub-threshold swing, and enhanced short-channel behavior even for FETs with thick, bulk-like channels where such control is difficult to realize with conventional back-gating. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for aqueous sensing, demonstrated here by the amperometric detection of glucose in aqueous solution. DI water gating of layered semiconductors can be harnessed in research on novel materials and devices, and it may with further development find broad applications in microelectronics and sensing.

EduGATE - basic examples for educative purpose using the GATE simulation platform.

PubMed

Pietrzyk, Uwe; Zakhnini, Abdelhamid; Axer, Markus; Sauerzapf, Sophie; Benoit, Didier; Gaens, Michaela

2013-02-01

EduGATE is a collection of basic examples to introduce students to the fundamental physical aspects of medical imaging devices. It is based on the GATE platform, which has received a wide acceptance in the field of simulating medical imaging devices including SPECT, PET, CT and also applications in radiation therapy. GATE can be configured by commands, which are, for the sake of simplicity, listed in a collection of one or more macro files to set up phantoms, multiple types of sources, detection device, and acquisition parameters. The aim of the EduGATE is to use all these helpful features of GATE to provide insights into the physics of medical imaging by means of a collection of very basic and simple GATE macros in connection with analysis programs based on ROOT, a framework for data processing. A graphical user interface to define a configuration is also included. Copyright © 2012. Published by Elsevier GmbH.

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr. (Inventor)

2002-01-01

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause the voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. The method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr. (Inventor)

2002-01-01

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause tile voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. A method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

PubMed

Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

2015-10-01

In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

Experimental investigation on On-Off current ratio behavior near onset voltage for a pentacene based organic thin film transistor

NASA Astrophysics Data System (ADS)

Amrani, Aumeur El; Es-saghiri, Abdeljabbar; Boufounas, El-Mahjoub; Lucas, Bruno

2018-06-01

The performance of a pentacene based organic thin film transistor (OTFT) with polymethylmethacrylate as a dielectric insulator and indium tin oxide based electrical gate is investigated. On the one hand, we showed that the threshold voltage increases with gate voltage, and on the other hand that it decreases with drain voltage. Thus, we noticed that the onset voltage shifts toward positive voltage values with the drain voltage increase. In addition, threshold-onset differential voltage (TODV) is proposed as an original approach to estimate an averaged carrier density in pentacene. Indeed, a value of about 4.5 × 1016 cm-3 is reached at relatively high gate voltage of -50 V; this value is in good agreement with that reported in literature with other technique measurements. However, at a low applied gate voltage, the averaged pentacene carrier density remains two orders of magnitude lower; it is of about 2.8 × 1014 cm-3 and remains similar to that obtained from space charge limited current approach for low applied bias voltage of about 2.2 × 1014 cm-3. Furthermore, high IOn/IOff and IOn/IOnset current ratios of 5 × 106 and 7.5 × 107 are reported for lower drain voltage, respectively. The investigated OTFTs also showed good electrical performance including carrier mobility increasing with gate voltage; mobility values of 4.5 × 10-2 cm2 V-1 s-1 and of 4.25 × 10-2 cm2 V-1 s-1 are reached for linear and saturation regimes, respectively. These results remain enough interesting since current modulation ratio exceeds a value of 107 that is a quite important requirement than high mobility for some particular logic gate applications.

Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing

PubMed Central

Chen, Szi-Wen; Chen, Yuan-Ho

2015-01-01

In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz. PMID:26501290

Hardware design and implementation of a wavelet de-noising procedure for medical signal preprocessing.

PubMed

Chen, Szi-Wen; Chen, Yuan-Ho

2015-10-16

In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz.

Optical bistability and second-harmonic generation in thin film coupled cavity photonic crystal structures

NASA Astrophysics Data System (ADS)

Diao, Liyong

This thesis deals with design, fabrication and modeling of bistable and multi-stable switching dynamics and second-harmonic generation in two groups of thin film coupled cavity photonic crystal structures. The first component studies optical bistability and multistability in such structures. Optical bistability and multistability are modelled by a nonlinear transfer matrix method. The second component is focused on the modelling and experimental measurement of second-harmonic generation in such structures. It is found that coupled cavity structures can reduce the threshold and index change for bistable operation, but single cavity structures can do the same. However, there is a clear advantage in using coupled cavity structures for multistability in that the threshold for multistability can be reduced. Second-harmonic generation is enhanced by field localization due to the resonant effect at the fundamental wavelength in single and coupled cavity structures by simulated and measured results. The work in this thesis makes three significant contributions. First, in the successful fabrication of thin film coupled cavity structures, the simulated linear transmissions of such structures match those of the fabricated structures almost exactly. Second, the newly defined figure of merit at the maximum transmission point on the bistable curve can be used to compare the material damage tolerance to any other Kerr effect nonlinear gate. Third, the simulated second-harmonic generation agrees excellently with experimental results. More generally optical thin film fabrication has commercial applications in many industry sections, such as electronics, opto-electronics, optical coating, solar cell and MEMS.

MO-DE-207A-06: ECG-Gated CT Reconstruction for a C-Arm Inverse Geometry X-Ray System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Slagowski, JM; Dunkerley, DAP

2016-06-15

Purpose: To obtain ECG-gated CT images from truncated projection data acquired with a C-arm based inverse geometry fluoroscopy system, for the purpose of cardiac chamber mapping in interventional procedures. Methods: Scanning-beam digital x-ray (SBDX) is an inverse geometry fluoroscopy system with a scanned multisource x-ray tube and a photon-counting detector mounted to a C-arm. In the proposed method, SBDX short-scan rotational acquisition is performed followed by inverse geometry CT (IGCT) reconstruction and segmentation of contrast-enhanced objects. The prior image constrained compressed sensing (PICCS) framework was adapted for IGCT reconstruction to mitigate artifacts arising from data truncation and angular undersampling duemore » to cardiac gating. The performance of the reconstruction algorithm was evaluated in numerical simulations of truncated and non-truncated thorax phantoms containing a dynamic ellipsoid to represent a moving cardiac chamber. The eccentricity of the ellipsoid was varied at frequencies from 1–1.5 Hz. Projection data were retrospectively sorted into 13 cardiac phases. Each phase was reconstructed using IGCT-PICCS, with a nongated gridded FBP (gFBP) prior image. Surface accuracy was determined using Dice similarity coefficient and a histogram of the point distances between the segmented surface and ground truth surface. Results: The gated IGCT-PICCS algorithm improved surface accuracy and reduced streaking and truncation artifacts when compared to nongated gFBP. For the non-truncated thorax with 1.25 Hz motion, 99% of segmented surface points were within 0.3 mm of the 15 mm diameter ground truth ellipse, versus 1.0 mm for gFBP. For the truncated thorax phantom with a 40 mm diameter ellipse, IGCT-PICCS surface accuracy measured 0.3 mm versus 7.8 mm for gFBP. Dice similarity coefficient was 0.99–1.00 (IGCT-PICCS) versus 0.63–0.75 (gFBP) for intensity-based segmentation thresholds ranging from 25–75% maximum contrast. Conclusions: The PICCS algorithm was successfully applied to reconstruct truncated IGCT projection data with angular undersampling resulting from simulated cardiac gating. Research supported by the National Heart, Lung, and Blood Institute of the NIH under award number R01HL084022. The content is solely the responsibility of the authors and does not necessarily represent the official views of the NIH.« less

Molecular Dynamics Simulations of KirBac1.1 Mutants Reveal Global Gating Changes of Kir Channels.

PubMed

Linder, Tobias; Wang, Shizhen; Zangerl-Plessl, Eva-Maria; Nichols, Colin G; Stary-Weinzinger, Anna

2015-04-27

Prokaryotic inwardly rectifying (KirBac) potassium channels are homologous to mammalian Kir channels. Their activity is controlled by dynamical conformational changes that regulate ion flow through a central pore. Understanding the dynamical rearrangements of Kir channels during gating requires high-resolution structure information from channels crystallized in different conformations and insight into the transition steps, which are difficult to access experimentally. In this study, we use MD simulations on wild type KirBac1.1 and an activatory mutant to investigate activation gating of KirBac channels. Full atomistic MD simulations revealed that introducing glutamate in position 143 causes significant widening at the helix bundle crossing gate, enabling water flux into the cavity. Further, global rearrangements including a twisting motion as well as local rearrangements at the subunit interface in the cytoplasmic domain were observed. These structural rearrangements are similar to recently reported KirBac3.1 crystal structures in closed and open conformation, suggesting that our simulations capture major conformational changes during KirBac1.1 opening. In addition, an important role of protein-lipid interactions during gating was observed. Slide-helix and C-linker interactions with lipids were strengthened during activation gating.

Computer simulation of ion channel gating: the M(2) channel of influenza A virus in a lipid bilayer

NASA Technical Reports Server (NTRS)

Schweighofer, K. J.; Pohorille, A.

2000-01-01

The transmembrane fragment of the influenza virus M(2) protein forms a homotetrameric channel that transports protons. In this paper, we use molecular dynamics simulations to help elucidate the mechanism of channel gating by four histidines that occlude the channel lumen in the closed state. We test two competing hypotheses. In the "shuttle" mechanism, the delta nitrogen atom on the extracellular side of one histidine is protonated by the incoming proton, and, subsequently, the proton on the epsilon nitrogen atom is released on the opposite side. In the "water-wire" mechanism, the gate opens because of electrostatic repulsion between four simultaneously biprotonated histidines. This allows for proton transport along the water wire that penetrates the gate. For each system, composed of the channel embedded in a hydrated phospholipid bilayer, a 1.3-ns trajectory was obtained. It is found that the states involved in the shuttle mechanism, which contain either single-protonated histidines or a mixture of single-protonated histidines plus one biprotonated residue, are stable during the simulations. Furthermore, the orientations and dynamics of water molecules near the gate are conducive to proton transfer. In contrast, the fully biprotonated state is not stable. Additional simulations show that if only two histidines are biprotonated, the channel deforms but the gate remains closed. These results support the shuttle mechanism but not the gate-opening mechanism of proton gating in M(2).

A Substrate Bias Effect on Recovery of the Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Han, Chang-Wook; Han, Min-Koo; Choi, Nack-Bong; Kim, Chang-Dong; Kim, Ki-Yong; Chung, In-Jae

2007-07-01

Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) were fabricated on a flexible stainless-steel (SS) substrate. The stability of the a-Si:H TFT is a key issue for active matrix organic light-emitting diodes (AMOLEDs). The drain current decreases because of the threshold voltage shift (Δ VTH) during OLED driving. A negative voltage at a floated gate can be induced by a negative substrate bias through a capacitor between the substrate and the gate electrode without additional circuits. The negative voltage biased at the SS substrate can recover Δ VTH and reduced drain current of the driving TFT. The VTH of the TFT increased by 2.3 V under a gate bias of +15 V and a drain bias of +15 V at 65 °C applied for 3,500 s. The VTH decreased by -2.3 V and the drain current recovered 97% of its initial value under a substrate bias of -23 V at 65 °C applied for 3,500 s.

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

PubMed

Yoon, Changjoon; Jeon, Youngin; Yun, Junggwon; Kim, Sangsig

2012-01-01

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Rectification of graphene self-switching diodes: First-principles study

NASA Astrophysics Data System (ADS)

Ghaziasadi, Hassan; Jamasb, Shahriar; Nayebi, Payman; Fouladian, Majid

2018-05-01

The first principles calculations based on self-consistent charge density functional tight-binding have performed to investigate the electrical properties and rectification behavior of the graphene self-switching diodes (GSSD). The devices contained two structures called CG-GSSD and DG-GSSD which have metallic or semiconductor gates depending on their side gates have a single or double hydrogen edge functionalized. We have relaxed the devices and calculated I-V curves, transmission spectrums and maximum rectification ratios. We found that the DG-MSM devices are more favorable and more stable. Also, the DG-MSM devices have better maximum rectification ratios and current. Moreover, by changing the side gates widths and behaviors from semiconductor to metal, the threshold voltages under forward bias changed from +1.2 V to +0.3 V. Also, the maximum currents are obtained from 1.12 μA to 10.50 μA. Finally, the MSM and SSS type of all devices have minimum and maximum values of voltage threshold and maximum rectification ratios, but the 769-DG devices don't obey this rule.

Room temperature high-fidelity holonomic single-qubit gate on a solid-state spin.

PubMed

Arroyo-Camejo, Silvia; Lazariev, Andrii; Hell, Stefan W; Balasubramanian, Gopalakrishnan

2014-09-12

At its most fundamental level, circuit-based quantum computation relies on the application of controlled phase shift operations on quantum registers. While these operations are generally compromised by noise and imperfections, quantum gates based on geometric phase shifts can provide intrinsically fault-tolerant quantum computing. Here we demonstrate the high-fidelity realization of a recently proposed fast (non-adiabatic) and universal (non-Abelian) holonomic single-qubit gate, using an individual solid-state spin qubit under ambient conditions. This fault-tolerant quantum gate provides an elegant means for achieving the fidelity threshold indispensable for implementing quantum error correction protocols. Since we employ a spin qubit associated with a nitrogen-vacancy colour centre in diamond, this system is based on integrable and scalable hardware exhibiting strong analogy to current silicon technology. This quantum gate realization is a promising step towards viable, fault-tolerant quantum computing under ambient conditions.

Quantifying the quantum gate fidelity of single-atom spin qubits in silicon by randomized benchmarking.

PubMed

Muhonen, J T; Laucht, A; Simmons, S; Dehollain, J P; Kalra, R; Hudson, F E; Freer, S; Itoh, K M; Jamieson, D N; McCallum, J C; Dzurak, A S; Morello, A

2015-04-22

Building upon the demonstration of coherent control and single-shot readout of the electron and nuclear spins of individual (31)P atoms in silicon, we present here a systematic experimental estimate of quantum gate fidelities using randomized benchmarking of 1-qubit gates in the Clifford group. We apply this analysis to the electron and the ionized (31)P nucleus of a single P donor in isotopically purified (28)Si. We find average gate fidelities of 99.95% for the electron and 99.99% for the nuclear spin. These values are above certain error correction thresholds and demonstrate the potential of donor-based quantum computing in silicon. By studying the influence of the shape and power of the control pulses, we find evidence that the present limitation to the gate fidelity is mostly related to the external hardware and not the intrinsic behaviour of the qubit.

Dependence of electrical and time stress in organic field effect transistor with low temperature forming gas treated Al2O3 gate dielectrics.

PubMed

Lee, Sunwoo; Chung, Keum Jee; Park, In-Sung; Ahn, Jinho

2009-12-01

We report the characteristics of the organic field effect transistor (OFET) after electrical and time stress. Aluminum oxide (Al2O3) was used as a gate dielectric layer. The surface of the gate oxide layer was treated with hydrogen (H2) and nitrogen (N2) mixed gas to minimize the dangling bond at the interface layer of gate oxide. According to the two stress parameters of electrical and time stress, threshold voltage shift was observed. In particular, the mobility and subthreshold swing of OFET were significantly decreased due to hole carrier localization and degradation of the channel layer between gate oxide and pentacene by electrical stress. Electrical stress is a more critical factor in the degradation of mobility than time stress caused by H2O and O2 in the air.

ZnO thin-film transistors with a polymeric gate insulator built on a polyethersulfone substrate

NASA Astrophysics Data System (ADS)

Hyung, Gun Woo; Park, Jaehoon; Koo, Ja Ryong; Choi, Kyung Min; Kwon, Sang Jik; Cho, Eou Sik; Kim, Yong Seog; Kim, Young Kwan

2012-03-01

Zinc oxide (ZnO) thin-film transistors (TFTs) with a cross-linked poly(vinyl alcohol) (c-PVA) insulator are fabricated on a polyethersulfone substrate. The ZnO film, formed by atomic layer deposition, shows a polycrystalline hexagonal structure with a band gap energy of about 3.37 eV. The fabricated ZnO TFT exhibits a field-effect mobility of 0.38 cm2/Vs and a threshold voltage of 0.2 V. The hysteresis of the device is mainly caused by trapped electrons at the c-PVA/ZnO interface, whereas the positive threshold voltage shift occurs as a consequence of constant positive gate bias stress after 5000 s due to an electron injection from the ZnO film into the c-PVA insulator.

Implementation of cascade logic gates and majority logic gate on a simple and universal molecular platform.

PubMed

Gao, Jinting; Liu, Yaqing; Lin, Xiaodong; Deng, Jiankang; Yin, Jinjin; Wang, Shuo

2017-10-25

Wiring a series of simple logic gates to process complex data is significantly important and a large challenge for untraditional molecular computing systems. The programmable property of DNA endows its powerful application in molecular computing. In our investigation, it was found that DNA exhibits excellent peroxidase-like activity in a colorimetric system of TMB/H 2 O 2 /Hemin (TMB, 3,3', 5,5'-Tetramethylbenzidine) in the presence of K + and Cu 2+ , which is significantly inhibited by the addition of an antioxidant. According to the modulated catalytic activity of this DNA-based catalyst, three cascade logic gates including AND-OR-INH (INHIBIT), AND-INH and OR-INH were successfully constructed. Interestingly, by only modulating the concentration of Cu 2+ , a majority logic gate with a single-vote veto function was realized following the same threshold value as that of the cascade logic gates. The strategy is quite straightforward and versatile and provides an instructive method for constructing multiple logic gates on a simple platform to implement complex molecular computing.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Reduction of gate leakage current on AlGaN/GaN high electron mobility transistors by electron-beam irradiation.

PubMed

Oh, S K; Song, C G; Jang, T; Kim, Kwang-Choong; Jo, Y J; Kwak, J S

2013-03-01

This study examined the effect of electron-beam (E-beam) irradiation on the AIGaN/GaN HEMTs for the reduction of gate leakage. After E-beam irradiation, the gate leakage current significantly decreased from 2.68 x 10(-8) A to 4.69 x 10(-9) A at a drain voltage of 10 V. The maximum drain current density of the AIGaN/GaN HEMTs with E-beam irradiation increased 14%, and the threshold voltage exhibited a negative shift, when compared to that of the AIGaN/GaN HEMTs before E-beam irradiation. These results strongly suggest that the reduction of gate leakage current resulted from neutralization nitrogen vacancies and removing of oxygen impurities.

Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor

NASA Astrophysics Data System (ADS)

Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.

2017-12-01

Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.

Suitability of markerless EPID tracking for tumor position verification in gated radiotherapy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Serpa, Marco; University Clinic for Radiotherapy and Radio-Oncology, Landeskrankenhaus Salzburg, Paracelsus Medical University Clinics, 5020 Salzburg; Department of Physics and Astronomy, University of Canterbury, Christchurch 8140

2014-03-15

Purpose: To maximize the benefits of respiratory gated radiotherapy (RGRT) of lung tumors real-time verification of the tumor position is required. This work investigates the feasibility of markerless tracking of lung tumors during beam-on time in electronic portal imaging device (EPID) images of the MV therapeutic beam. Methods: EPID movies were acquired at ∼2 fps for seven lung cancer patients with tumor peak-to-peak motion ranges between 7.8 and 17.9 mm (mean: 13.7 mm) undergoing stereotactic body radiotherapy. The external breathing motion of the abdomen was synchronously measured. Both datasets were retrospectively analyzed inPortalTrack, an in-house developed tracking software. The authorsmore » define a three-step procedure to run the simulations: (1) gating window definition, (2) gated-beam delivery simulation, and (3) tumor tracking. First, an amplitude threshold level was set on the external signal, defining the onset of beam-on/-off signals. This information was then mapped onto a sequence of EPID images to generate stamps of beam-on/-hold periods throughout the EPID movies in PortalTrack, by obscuring the frames corresponding to beam-off times. Last, tumor motion in the superior-inferior direction was determined on portal images by the tracking algorithm during beam-on time. The residual motion inside the gating window as well as target coverage (TC) and the marginal target displacement (MTD) were used as measures to quantify tumor position variability. Results: Tumor position monitoring and estimation from beam's-eye-view images during RGRT was possible in 67% of the analyzed beams. For a reference gating window of 5 mm, deviations ranging from 2% to 86% (35% on average) were recorded between the reference and measured residual motion. TC (range: 62%–93%; mean: 77%) losses were correlated with false positives incidence rates resulting mostly from intra-/inter-beam baseline drifts, as well as sudden cycle-to-cycle fluctuations in exhale positions. Both phenomena can lead to considerable deviations (with MTD values up to a maximum of 7.8 mm) from the intended tumor position, and in turn may result in a marginal miss. The difference between tumor traces determined within the gating window against ground truth trajectory maps was 1.1 ± 0.7 mm on average (range: 0.4–2.3 mm). Conclusions: In this retrospective analysis of motion data, it is demonstrated that the system is capable of determining tumor positions in the plane perpendicular to the beam direction without the aid of fiducial markers, and may hence be suitable as an online verification tool in RGRT. It may be possible to use the tracking information to enable on-the-fly corrections to intra-/inter-beam variations by adapting the gating window by means of a robotic couch.« less

A two-qubit logic gate in silicon.

PubMed

Veldhorst, M; Yang, C H; Hwang, J C C; Huang, W; Dehollain, J P; Muhonen, J T; Simmons, S; Laucht, A; Hudson, F E; Itoh, K M; Morello, A; Dzurak, A S

2015-10-15

Quantum computation requires qubits that can be coupled in a scalable manner, together with universal and high-fidelity one- and two-qubit logic gates. Many physical realizations of qubits exist, including single photons, trapped ions, superconducting circuits, single defects or atoms in diamond and silicon, and semiconductor quantum dots, with single-qubit fidelities that exceed the stringent thresholds required for fault-tolerant quantum computing. Despite this, high-fidelity two-qubit gates in the solid state that can be manufactured using standard lithographic techniques have so far been limited to superconducting qubits, owing to the difficulties of coupling qubits and dephasing in semiconductor systems. Here we present a two-qubit logic gate, which uses single spins in isotopically enriched silicon and is realized by performing single- and two-qubit operations in a quantum dot system using the exchange interaction, as envisaged in the Loss-DiVincenzo proposal. We realize CNOT gates via controlled-phase operations combined with single-qubit operations. Direct gate-voltage control provides single-qubit addressability, together with a switchable exchange interaction that is used in the two-qubit controlled-phase gate. By independently reading out both qubits, we measure clear anticorrelations in the two-spin probabilities of the CNOT gate.

Normative behavioral thresholds for short tone-bursts.

PubMed

Beattie, R C; Rochverger, I

2001-10-01

Although tone-bursts have been commonly used in auditory brainstem response (ABR) evaluations for many years, national standards describing normal calibration values have not been established. This study was designed to gather normative threshold data to establish a physical reference for tone-burst stimuli that can be reproduced across clinics and laboratories. More specifically, we obtained norms for 3-msec tone-bursts presented at two repetition rates (9.3/sec and 39/sec), two gating functions (Trapezoid and Blackman), and four frequencies (500, 1000, 2000, and 4000 Hz). Our results are specified using three physical references: dB peak sound pressure level, dB peak-to-peak equivalent sound pressure level, and dB SPL (fast meter response, rate = 50 stimuli/sec). These data are offered for consideration when calibrating ABR equipment. The 39/sec stimulus rate yielded tone-burst thresholds that were approximately 3 dB lower than the 9.3/sec rate. The improvement in threshold with increasing stimulus rate may reflect the ability of the auditory system to integrate energy that occurs within a time interval of 200 to 500 msec (temporal integration). The Trapezoid gating function yielded thresholds that averaged 1.4 dB lower than the Blackman function. Although these differences are small and of little clinical importance, the cumulative effects of several instrument and/or procedural variables may yield clinically important differences.

Application of machine learning methodology for pet-based definition of lung cancer

PubMed Central

Kerhet, A.; Small, C.; Quon, H.; Riauka, T.; Schrader, L.; Greiner, R.; Yee, D.; McEwan, A.; Roa, W.

2010-01-01

We applied a learning methodology framework to assist in the threshold-based segmentation of non-small-cell lung cancer (nsclc) tumours in positron-emission tomography–computed tomography (pet–ct) imaging for use in radiotherapy planning. Gated and standard free-breathing studies of two patients were independently analysed (four studies in total). Each study had a pet–ct and a treatment-planning ct image. The reference gross tumour volume (gtv) was identified by two experienced radiation oncologists who also determined reference standardized uptake value (suv) thresholds that most closely approximated the gtv contour on each slice. A set of uptake distribution-related attributes was calculated for each pet slice. A machine learning algorithm was trained on a subset of the pet slices to cope with slice-to-slice variation in the optimal suv threshold: that is, to predict the most appropriate suv threshold from the calculated attributes for each slice. The algorithm’s performance was evaluated using the remainder of the pet slices. A high degree of geometric similarity was achieved between the areas outlined by the predicted and the reference suv thresholds (Jaccard index exceeding 0.82). No significant difference was found between the gated and the free-breathing results in the same patient. In this preliminary work, we demonstrated the potential applicability of a machine learning methodology as an auxiliary tool for radiation treatment planning in nsclc. PMID:20179802

The Development of III-V Semiconductor MOSFETs for Future CMOS Applications

NASA Astrophysics Data System (ADS)

Greene, Andrew M.

Alternative channel materials with superior transport properties over conventional strained silicon are required for supply voltage scaling in low power complementary metal-oxide-semiconductor (CMOS) integrated circuits. Group III-V compound semiconductor systems offer a potential solution due to their high carrier mobility, low carrier effective mass and large injection velocity. The enhancement in transistor drive current at a lower overdrive voltage allows for the scaling of supply voltage while maintaining high switching performance. This thesis focuses on overcoming several material and processing challenges associated with III-V semiconductor development including a low thermal processing budget, high interface trap state density (Dit), low resistance source/drain contacts and growth on lattice mismatched substrates. Non-planar In0.53Ga0.47As FinFETs were developed using both "gate-first" and "gate-last" fabrication methods for n-channel MOSFETs. Electron beam lithography and anisotropic plasma etching processes were optimized to create highly scaled fins with near vertical sidewalls. Plasma damage was removed using a wet etch process and improvements in gate efficiency were characterized on MOS capacitor structures. A two-step, selective removal of the pre-grown n+ contact layer was developed for "gate-last" recess etching. The final In0.53Ga 0.47As FinFET devices demonstrated an ION = 70 mA/mm, I ON/IOFF ratio = 15,700 and sub-threshold swing = 210 mV/dec. Bulk GaSb and strained In0.36Ga0.64Sb quantum well (QW) heterostructures were developed for p-channel MOSFETs. Dit was reduced to 2 - 3 x 1012 cm-2eV-1 using an InAs surface layer, (NH4)2S passivation and atomic layer deposition (ALD) of Al2O3. A self-aligned "gate-first" In0.36Ga0.64Sb MOSFET fabrication process was invented using a "T-shaped" electron beam resist patterning stack and intermetallic source/drain contacts. Ni contacts annealed at 300°C demonstrated an ION = 166 mA/mm, ION/IOFF ratio = 1,500 and sub-threshold swing = 340 mV/dec. Split C-V measurements were used to extract an effective channel mobility of muh* = 300 cm2/Vs at Ns = 2 x 1012 cm -2. "Gate-last" MOSFETs grown with an epitaxial p + contact layer were fabricated using selective gate-recess etching techniques. A parasitic "n-channel" limited ION/I OFF ratio and sub-threshold swing, most likely due to effects from the InAs surface layer.

Frequency-Stable Ionic-Type Hybrid Gate Dielectrics for High Mobility Solution-Processed Metal-Oxide Thin-Film Transistors

PubMed Central

Heo, Jae Sang; Choi, Seungbeom; Jo, Jeong-Wan; Kang, Jingu; Park, Ho-Hyun; Kim, Yong-Hoon; Park, Sung Kyu

2017-01-01

In this paper, we demonstrate high mobility solution-processed metal-oxide thin-film transistors (TFTs) by using a high-frequency-stable ionic-type hybrid gate dielectric (HGD). The HGD gate dielectric, a blend of sol-gel aluminum oxide (AlOx) and poly(4-vinylphenol) (PVP), exhibited high dielectric constant (ε~8.15) and high-frequency-stable characteristics (1 MHz). Using the ionic-type HGD as a gate dielectric layer, an minimal electron-double-layer (EDL) can be formed at the gate dielectric/InOx interface, enhancing the field-effect mobility of the TFTs. Particularly, using the ionic-type HGD gate dielectrics annealed at 350 °C, InOx TFTs having an average field-effect mobility of 16.1 cm2/Vs were achieved (maximum mobility of 24 cm2/Vs). Furthermore, the ionic-type HGD gate dielectrics can be processed at a low temperature of 150 °C, which may enable their applications in low-thermal-budget plastic and elastomeric substrates. In addition, we systematically studied the operational stability of the InOx TFTs using the HGD gate dielectric, and it was observed that the HGD gate dielectric effectively suppressed the negative threshold voltage shift during the negative-illumination-bias stress possibly owing to the recombination of hole carriers injected in the gate dielectric with the negatively charged ionic species in the HGD gate dielectric. PMID:28772972

Reconfigurable all-optical NOT, XOR, and NOR logic gates based on two dimensional photonic crystals

NASA Astrophysics Data System (ADS)

Parandin, Fariborz; Malmir, M. Reza; Naseri, Mosayeb; Zahedi, Abdulhamid

2018-01-01

Photonic crystals can be considered as one of the most important basis for designing optical devices. In this research, using two-dimensional photonic crystals with triangular lattices, ultra-compact logic gates are designed and simulated. The intended structure has the capability to be used as three logical gates (NOT, XOR, and NOR). The designed structures not only have characteristics of small dimensions which make them suitable for integrated optical circuits, but also exhibit very low power transfer delay which makes it possible to design high speed gates. On comparison with the previous works, our simulations show that at a wavelength of 1.55 μm , the gates indicate a time delay of about 0.1 ps and the contrast ratio for the XOR gate is about 30 dB, i.e., the proposed structures are more applicable in designing low error optical logic gates.

Cylindrical gate all around Schottky barrier MOSFET with insulated shallow extensions at source/drain for removal of ambipolarity: a novel approach

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Pratap, Yogesh; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

2017-12-01

In this paper TCAD-based simulation of a novel insulated shallow extension (ISE) cylindrical gate all around (CGAA) Schottky barrier (SB) MOSFET has been reported, to eliminate the suicidal ambipolar behavior (bias-dependent OFF state leakage current) of conventional SB-CGAA MOSFET by blocking the metal-induced gap states as well as unwanted charge sharing between source/channel and drain/channel regions. This novel structure offers low barrier height at the source and offers high ON-state current. The I ON/I OFF of ISE-CGAA-SB-MOSFET increases by 1177 times and offers steeper subthreshold slope (~60 mV/decade). However a little reduction in peak cut off frequency is observed and to further improve the cut-off frequency dual metal gate architecture has been employed and a comparative assessment of single metal gate, dual metal gate, single metal gate with ISE, and dual metal gate with ISE has been presented. The improved performance of Schottky barrier CGAA MOSFET by the incorporation of ISE makes it an attractive candidate for CMOS digital circuit design. The numerical simulation is performed using the ATLAS-3D device simulator.

SU-E-T-178: Experimental Study of Acceptable Movement Conditions for SBRT Lung Treatments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carrasco de Fez, P; Ruiz-Martinez, A; Jornet, N

2014-06-01

Purpose: To experimentally study the acceptable movement conditions for SBRT lung treatments we quantified with film dosimetry the change in dose distributions due to periodic movements of 5 different amplitudes and 4 respiratory gating duty cycles on a SBRT treatment plan. Methods: We planned a SBRT treatment plan for the QUASAR™ (Modus Medical) phantom equipped with the respiratory motion device. We placed a 3 mm water-equivalent sphere simulating a tumour inside the lung-equivalent insert. This sphere is divided in two hemispheres that allow placing films in between. We used radiochromic EBT2™ (Ashland) films. We oriented the lung insert in suchmore » a way that sagittal dose distributions could be measured. We applied a sinusoidal movement with 3 s period for 5 different amplitudes of 0(static), 5, 7, 10, 15 and 20 mm without gating. For the 20 mm amplitude we studied the gating technique with 4 duty cycles of 20, 40, 60 and 80% of the respiratory cycle. Each situation was irradiated in a Clinac 2100 linac (Varian) equipped with the RPM™ system. FilmQA Pro™ (Ashland) software together with an Expression 10000XL scanner (EPSON) were used to analyze and compare the measured dose distributions with those planned by the Eclipse™ TPS v. 8.9 (Varian) by means of gamma analysis with 6 criteria: 5%/3mm, 5%/2mm, 5%/1mm, 3%/3mm, 3%/2mm and 2%/2mm (threshold of 10%). Results: Movements with amplitude of less than 7mm do not significantly modified the dosimetry. Gating duty cycles of less than 40% yielded also acceptable results for a 2 cm amplitude movement. Conclusion: To safely perform daily accurate SBRT treatments, movements have to be restricted to 7 mm amplitude (±3.5 mm). Otherwise, a gating strategy should be considered.« less

Threshold voltage variation depending on single grain boundary and stored charges in an adjacent cell for vertical silicon–oxide–nitride–oxide–silicon NAND flash memory

NASA Astrophysics Data System (ADS)

Oh, Hyeongwan; Kim, Jiwon; Baek, Rock-Hyun; Lee, Jeong-Soo

2018-04-01

The effects of single grain boundary (SGB) position and stored electron charges in an adjacent cell in silicon–oxide–nitride–oxide–silicon (SONOS) structures on the variations of threshold voltage (V th) were investigated using technology computer-aided design (TCAD) simulation. As the bit line voltage increases, the SGB position causing the maximum V th variation was shifted from the center to the source side in the channel, owing to the drain-induced grain barrier lowering effect. When the SGB is located in the spacer region, the potential interaction from both the SGB and the stored electron charges in the adjacent cell becomes significant and thus resulting in larger V th variation. In contrast, when the SGB is located at the center of the channel, the peak position of potential barrier is shifted to the center, so that the influence of the adjacent cell is diminished. As the gate length is scaled down to 20 nm, the influence of stored charges in adjacent cells becomes significant, resulting in larger V th variations.

Modeling and analysis of energy quantization effects on single electron inverter performance

NASA Astrophysics Data System (ADS)

Dan, Surya Shankar; Mahapatra, Santanu

2009-08-01

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.

A Physics-Based Engineering Methodology for Calculating Soft Error Rates of Bulk CMOS and SiGe Heterojunction Bipolar Transistor Integrated Circuits

NASA Astrophysics Data System (ADS)

Fulkerson, David E.

2010-02-01

This paper describes a new methodology for characterizing the electrical behavior and soft error rate (SER) of CMOS and SiGe HBT integrated circuits that are struck by ions. A typical engineering design problem is to calculate the SER of a critical path that commonly includes several circuits such as an input buffer, several logic gates, logic storage, clock tree circuitry, and an output buffer. Using multiple 3D TCAD simulations to solve this problem is too costly and time-consuming for general engineering use. The new and simple methodology handles the problem with ease by simple SPICE simulations. The methodology accurately predicts the measured threshold linear energy transfer (LET) of a bulk CMOS SRAM. It solves for circuit currents and voltage spikes that are close to those predicted by expensive 3D TCAD simulations. It accurately predicts the measured event cross-section vs. LET curve of an experimental SiGe HBT flip-flop. The experimental cross section vs. frequency behavior and other subtle effects are also accurately predicted.

Femtosecond excitation tuning and site energy memory of population transfer in poly(p-phenylenevinylene): Gated luminescence experiments and simulation

NASA Astrophysics Data System (ADS)

Sperling, J.; Milota, F.; Tortschanoff, A.; Warmuth, Ch.; Mollay, B.; Bässler, H.; Kauffmann, H. F.

2002-12-01

We present a comprehensive experimental and computational study on fs-relaxational dynamics of optical excitations in the conjugated polymer poly(p-phenylenevinylene) (PPV) under selective excitation tuning conditions into the long-wavelength, low-vibrational S1ν=0-density-of-states (DOS). The dependence of single-wavelength luminescence kinetics and time-windowed spectral transients on distinct, initial excitation boundaries at 1.4 K and at room temperature was measured applying the luminescence up-conversion technique. The typical energy-dispersive intra-DOS energy transfer was simulated by a combination of static Monte Carlo method with a dynamical algorithm for solving the energy-space transport Master-Equation in population-space. For various, selective excitations that give rise to specific S1-population distributions in distinct spatial and energetic subspaces inside the DOS, simulations confirm the experimental results and show that the subsequent, energy-dissipative, multilevel relaxation is hierarchically constrained, and reveals a pronounced site-energy memory effect with a migration-threshold, characteristic of the (dressed) excitation dynamics in the disordered PPV many-body system.

Toward elucidating the heat activation mechanism of the TRPV1 channel gating by molecular dynamics simulation

PubMed Central

Wen, Han; Qin, Feng; Zheng, Wenjun

2016-01-01

As a key cellular sensor, the TRPV1 cation channel undergoes a gating transition from a closed state to an open state in response to various physical and chemical stimuli including noxious heat. Despite years of study, the heat activation mechanism of TRPV1 gating remains enigmatic at the molecular level. Toward elucidating the structural and energetic basis of TRPV1 gating, we have performed molecular dynamics (MD) simulations (with cumulative simulation time of 3 μs), starting from the high-resolution closed and open structures of TRPV1 solved by cryo-electron microscopy. In the closed-state simulations at 30°C, we observed a stably closed channel constricted at the lower gate (near residue I679), while the upper gate (near residues G643 and M644) is dynamic and undergoes flickery opening/closing. In the open-state simulations at 60°C, we found higher conformational variation consistent with a large entropy increase required for the heat activation, and both the lower and upper gates are dynamic with transient opening/closing. Through ensemble-based structural analyses of the closed state vs. the open state, we revealed pronounced closed-to-open conformational changes involving the membrane proximal domain (MPD) linker, the outer pore, and the TRP helix, which are accompanied by breaking/forming of a network of closed/open-state specific hydrogen bonds. By comparing the closed-state simulations at 30°C and 60°C, we observed heat-activated conformational changes in the MPD linker, the outer pore, and the TRP helix that resemble the closed-to-open conformational changes, along with partial formation of the open-state specific hydrogen bonds. Some of the residues involved in the above key hydrogen bonds were validated by previous mutational studies. Taken together, our MD simulations have offered rich structural and dynamic details beyond the static structures of TRPV1, and promising targets for future mutagenesis and functional studies of the TRPV1 channel. PMID:27699868

Simulation of nanoparticle-mediated near-infrared thermal therapy using GATE

PubMed Central

Cuplov, Vesna; Pain, Frédéric; Jan, Sébastien

2017-01-01

Application of nanotechnology for biomedicine in cancer therapy allows for direct delivery of anticancer agents to tumors. An example of such therapies is the nanoparticle-mediated near-infrared hyperthermia treatment. In order to investigate the influence of nanoparticle properties on the spatial distribution of heat in the tumor and healthy tissues, accurate simulations are required. The Geant4 Application for Emission Tomography (GATE) open-source simulation platform, based on the Geant4 toolkit, is widely used by the research community involved in molecular imaging, radiotherapy and optical imaging. We present an extension of GATE that can model nanoparticle-mediated hyperthermal therapy as well as simple heat diffusion in biological tissues. This new feature of GATE combined with optical imaging allows for the simulation of a theranostic scenario in which the patient is injected with theranostic nanosystems that can simultaneously deliver therapeutic (i.e. hyperthermia therapy) and imaging agents (i.e. fluorescence imaging). PMID:28663855

Demonstration of Qubit Operations Below a Rigorous Fault Tolerance Threshold With Gate Set Tomography (Open Access, Publisher’s Version)

DTIC Science & Technology

2017-02-15

Maunz2 Quantum information processors promise fast algorithms for problems inaccessible to classical computers. But since qubits are noisy and error-prone...information processors have been demonstrated experimentally using superconducting circuits1–3, electrons in semiconductors4–6, trapped atoms and...qubit quantum information processor has been realized14, and single- qubit gates have demonstrated randomized benchmarking (RB) infidelities as low as 10

Experimental controlled-NOT gate simulation with thermal light

PubMed Central

Peng, Tao; Tamma, Vincenzo; Shih, Yanhua

2016-01-01

We report a recent experimental simulation of a controlled-NOT gate operation based on polarization correlation measurements of thermal fields in photon-number fluctuations. The interference between pairs of correlated paths at the very heart of these experiments has the potential for the simulation of correlations between a larger number of qubits. PMID:27439330

Modeling and simulation of electronic structure, material interface and random doping in nano electronic devices

PubMed Central

Chen, Duan; Wei, Guo-Wei

2010-01-01

The miniaturization of nano-scale electronic devices, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. Modeling and simulation of this class of problems have emerged as an important topic in applied and computational mathematics. This work presents mathematical models and computational algorithms for the simulation of nano-scale MOSFETs. We introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential of the nano-electronic device. This framework enables us to put microscopic and macroscopic descriptions in an equal footing at nano scale. By optimization of the energy functional, we derive consistently-coupled Poisson-Kohn-Sham equations. Additionally, layered structures are crucial to the electrostatic and transport properties of nano transistors. A material interface model is proposed for more accurate description of the electrostatics governed by the Poisson equation. Finally, a new individual dopant model that utilizes the Dirac delta function is proposed to understand the random doping effect in nano electronic devices. Two mathematical algorithms, the matched interface and boundary (MIB) method and the Dirichlet-to-Neumann mapping (DNM) technique, are introduced to improve the computational efficiency of nano-device simulations. Electronic structures are computed via subband decomposition and the transport properties, such as the I-V curves and electron density, are evaluated via the non-equilibrium Green's functions (NEGF) formalism. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our three-dimensional numerical simulations. For these devices, the current fluctuation and voltage threshold lowering effect induced by the discrete dopant model are explored. Numerical convergence and model well-posedness are also investigated in the present work. PMID:20396650

A new DG nanoscale TFET based on MOSFETs by using source gate electrode: 2D simulation and an analytical potential model

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2017-08-01

This paper suggests and investigates a double-gate (DG) MOSFET, which emulates tunnel field effect transistors (M-TFET). We have combined this novel concept into a double-gate MOSFET, which behaves as a tunneling field effect transistor by work function engineering. In the proposed structure, in addition to the main gate, we utilize another gate over the source region with zero applied voltage and a proper work function to convert the source region from N+ to P+. We check the impact obtained by varying the source gate work function and source doping on the device parameters. The simulation results of the M-TFET indicate that it is a suitable case for a switching performance. Also, we present a two-dimensional analytic potential model of the proposed structure by solving the Poisson's equation in x and y directions and by derivatives from the potential profile; thus, the electric field is achieved. To validate our present model, we use the SILVACO ATLAS device simulator. The analytical results have been compared with it.

Method and infrastructure for cycle-reproducible simulation on large scale digital circuits on a coordinated set of field-programmable gate arrays (FPGAs)

DOEpatents

Asaad, Sameh W; Bellofatto, Ralph E; Brezzo, Bernard; Haymes, Charles L; Kapur, Mohit; Parker, Benjamin D; Roewer, Thomas; Tierno, Jose A

2014-01-28

A plurality of target field programmable gate arrays are interconnected in accordance with a connection topology and map portions of a target system. A control module is coupled to the plurality of target field programmable gate arrays. A balanced clock distribution network is configured to distribute a reference clock signal, and a balanced reset distribution network is coupled to the control module and configured to distribute a reset signal to the plurality of target field programmable gate arrays. The control module and the balanced reset distribution network are cooperatively configured to initiate and control a simulation of the target system with the plurality of target field programmable gate arrays. A plurality of local clock control state machines reside in the target field programmable gate arrays. The local clock state machines are configured to generate a set of synchronized free-running and stoppable clocks to maintain cycle-accurate and cycle-reproducible execution of the simulation of the target system. A method is also provided.

Dosimetry applications in GATE Monte Carlo toolkit.

PubMed

Papadimitroulas, Panagiotis

2017-09-01

Monte Carlo (MC) simulations are a well-established method for studying physical processes in medical physics. The purpose of this review is to present GATE dosimetry applications on diagnostic and therapeutic simulated protocols. There is a significant need for accurate quantification of the absorbed dose in several specific applications such as preclinical and pediatric studies. GATE is an open-source MC toolkit for simulating imaging, radiotherapy (RT) and dosimetry applications in a user-friendly environment, which is well validated and widely accepted by the scientific community. In RT applications, during treatment planning, it is essential to accurately assess the deposited energy and the absorbed dose per tissue/organ of interest, as well as the local statistical uncertainty. Several types of realistic dosimetric applications are described including: molecular imaging, radio-immunotherapy, radiotherapy and brachytherapy. GATE has been efficiently used in several applications, such as Dose Point Kernels, S-values, Brachytherapy parameters, and has been compared against various MC codes which are considered as standard tools for decades. Furthermore, the presented studies show reliable modeling of particle beams when comparing experimental with simulated data. Examples of different dosimetric protocols are reported for individualized dosimetry and simulations combining imaging and therapy dose monitoring, with the use of modern computational phantoms. Personalization of medical protocols can be achieved by combining GATE MC simulations with anthropomorphic computational models and clinical anatomical data. This is a review study, covering several dosimetric applications of GATE, and the different tools used for modeling realistic clinical acquisitions with accurate dose assessment. Copyright © 2017 Associazione Italiana di Fisica Medica. Published by Elsevier Ltd. All rights reserved.

Transport properties of two-dimensional metal-phthalocyanine junctions: An ab initio study

NASA Astrophysics Data System (ADS)

Liu, Shuang-Long; Wang, Yun-Peng; Li, Xiang-Guo; Cheng, Hai-Ping

We study two dimensional (2D) electronic/spintronic junctions made of metal-organic frameworks via first-principles simulation. The system consists of two Mn-phthalocyanine leads and a Ni-phthalocyanine center. A 2D Mn phthalocyanine sheet is ferromagnetic half metal and a 2D Ni phthalocyanine sheet is nonmagnetic semiconductor. Our results show that this system has a large tunnel magnetic resistance. The transmission coefficient at Fermi energy decays exponentially with the length of the central region which is not surprising. However, the transmission of the junction can be tuned using gate voltage by up to two orders of magnitude. The origin of the change lies in the mode matching between the lead and the center electronic states. Moreover, the threshold gate voltage varies with the length of the center region which provides a way of engineering the transport properties. Finally, we combine non-equilibrium Green's function and Boltzmann transport equation to compute conductance of the junction. This work was supported by the US Department of Energy (DOE), Office of Basic Energy Sciences (BES), under Contract No. DE-FG02-02ER45995. Computations were done using the utilities of NERSC and University of Florida Research Computing.

Molecular sensing using monolayer floating gate, fully depleted SOI MOSFET acting as an exponential transducer.

PubMed

Takulapalli, Bharath R

2010-02-23

Field-effect transistor-based chemical sensors fall into two broad categories based on the principle of signal transduction-chemiresistor or Schottky-type devices and MOSFET or inversion-type devices. In this paper, we report a new inversion-type device concept-fully depleted exponentially coupled (FDEC) sensor, using molecular monolayer floating gate fully depleted silicon on insulator (SOI) MOSFET. Molecular binding at the chemical-sensitive surface lowers the threshold voltage of the device inversion channel due to a unique capacitive charge-coupling mechanism involving interface defect states, causing an exponential increase in the inversion channel current. This response of the device is in opposite direction when compared to typical MOSFET-type sensors, wherein inversion current decreases in a conventional n-channel sensor device upon addition of negative charge to the chemical-sensitive device surface. The new sensor architecture enables ultrahigh sensitivity along with extraordinary selectivity. We propose the new sensor concept with the aid of analytical equations and present results from our experiments in liquid phase and gas phase to demonstrate the new principle of signal transduction. We present data from numerical simulations to further support our theory.

Programmable ion-sensitive transistor interfaces. II. Biomolecular sensing and manipulation.

PubMed

Jayant, Krishna; Auluck, Kshitij; Funke, Mary; Anwar, Sharlin; Phelps, Joshua B; Gordon, Philip H; Rajwade, Shantanu R; Kan, Edwin C

2013-07-01

The chemoreceptive neuron metal-oxide-semiconductor transistor described in the preceding paper is further used to monitor the adsorption and interaction of DNA molecules and subsequently manipulate the adsorbed biomolecules with injected static charge. Adsorption of DNA molecules onto poly-L-lysine-coated sensing gates (SGs) modulates the floating gate (FG) potential ψ(O), which is reflected as a threshold voltage shift measured from the control gate (CG) V(th_CG). The asymmetric capacitive coupling between the CG and SG to the FG results in V(th_CG) amplification. The electric field in the SG oxide E(SG_ox) is fundamentally different when we drive the current readout with V(CG) and V(ref) (i.e., the potential applied to the CG and reference electrode, respectively). The V(CG)-driven readout induces a larger E(SG_ox), leading to a larger V(th_CG) shift when DNA is present. Simulation studies indicate that the counterion screening within the DNA membrane is responsible for this effect. The DNA manipulation mechanism is enabled by tunneling electrons (program) or holes (erase) onto FGs to produce repulsive or attractive forces. Programming leads to repulsion and eventual desorption of DNA, while erasing reestablishes adsorption. We further show that injected holes or electrons prior to DNA addition either aids or disrupts the immobilization process, which can be used for addressable sensor interfaces. To further substantiate DNA manipulation, we used impedance spectroscopy with a split ac-dc technique to reveal the net interface impedance before and after charge injection.

Field-induced strain degradation of AlGaN/GaN high electron mobility transistors on a nanometer scale

NASA Astrophysics Data System (ADS)

Lin, Chung-Han; Doutt, D. R.; Mishra, U. K.; Merz, T. A.; Brillson, L. J.

2010-11-01

Nanoscale Kelvin probe force microscopy and depth-resolved cathodoluminescence spectroscopy reveal an electronic defect evolution inside operating AlGaN/GaN high electron mobility transistors with degradation under electric-field-induced stress. Off-state electrical stress results in micron-scale areas within the extrinsic drain expanding and decreasing in electric potential, midgap defects increasing by orders-of-magnitude at the AlGaN layer, and local Fermi levels lowering as gate-drain voltages increase above a characteristic stress threshold. The pronounced onset of defect formation, Fermi level movement, and transistor degradation at the threshold gate-drain voltage of J. A. del Alamo and J. Joh [Microelectron. Reliab. 49, 1200 (2009)] is consistent with crystal deformation and supports the inverse piezoelectric model of high electron mobility transistor degradation.

The operation of 0.35 μm partially depleted SOI CMOS technology in extreme environments

NASA Astrophysics Data System (ADS)

Li, Ying; Niu, Guofu; Cressler, John D.; Patel, Jagdish; Liu, S. T.; Reed, Robert A.; Mojarradi, Mohammad M.; Blalock, Benjamin J.

2003-06-01

We evaluate the usefulness of partially depleted SOI CMOS devices fabricated in a 0.35 μm technology on UNIBOND material for electronics applications requiring robust operation under extreme environment conditions consisting of low and/or high temperature, and under substantial radiation exposure. The threshold voltage, effective mobility, and the impact ionization parameters were determined across temperature for both the nFETs and the pFETs. The radiation response was characterized using threshold voltage shifts of both the front-gate and back-gate transistors. These results suggest that this 0.35 μm partially depleted SOI CMOS technology is suitable for operation across a wide range of extreme environment conditions consisting of: cryogenic temperatures down to 86 K, elevated temperatures up to 573 K, and under radiation exposure to 1.3 Mrad(Si) total dose.

Stability study of solution-processed zinc tin oxide thin-film transistors

NASA Astrophysics Data System (ADS)

Zhang, Xue; Ndabakuranye, Jean Pierre; Kim, Dong Wook; Choi, Jong Sun; Park, Jaehoon

2015-11-01

In this study, the environmental dependence of the electrical stability of solution-processed n-channel zinc tin oxide (ZTO) thin-film transistors (TFTs) is reported. Under a prolonged negative gate bias stress, a negative shift in threshold voltage occurs in atmospheric air, whereas a negligible positive shift in threshold voltage occurs under vacuum. In the positive bias-stress experiments, a positive shift in threshold voltage was invariably observed both in atmospheric air and under vacuum. In this study, the negative gate-bias-stress-induced instability in atmospheric air is explained through an internal potential in the ZTO semiconductor, which can be generated owing to the interplay between H2O molecules and majority carrier electrons at the surface of the ZTO film. The positive bias-stress-induced instability is ascribed to electron-trapping phenomenon in and around the TFT channel region, which can be further augmented in the presence of air O2 molecules. These results suggest that the interaction between majority carriers and air molecules will have crucial implications for a reliable operation of solution-processed ZTO TFTs. [Figure not available: see fulltext.

Spiking Excitable Semiconductor Laser as Optical Neurons: Dynamics, Clustering and Global Emerging Behaviors

DTIC Science & Technology

2014-06-28

constructed from inexpensive semiconductor lasers could lead to the development of novel neuro-inspired optical computing devices (threshold detectors ...optical computing devices (threshold detectors , logic gates, signal recognition, etc.). Other topics of research included the analysis of extreme events in...Extreme events is nowadays a highly active field of research. Rogue waves, earthquakes of high magnitude and financial crises are all rare and

Mentally simulated movements in virtual reality: does Fitts's law hold in motor imagery?

PubMed

Decety, J; Jeannerod, M

1995-12-14

This study was designed to investigate mentally simulated actions in a virtual reality environment. Naive human subjects (n = 15) were instructed to imagine themselves walking in a three-dimensional virtual environment toward gates of different apparent widths placed at three different apparent distances. Each subject performed nine blocks of six trials in a randomised order. The response time (reaction time and mental walking time) was measured as the duration between an acoustic go signal and a motor signal produced by the subject. There was a combined effect on response time of both gate width and distance. Response time increased for decreasing apparent gate widths when the gate was placed at different distances. These results support the notion that mentally simulated actions are governed by central motor rules.

Thermal Simulation of a Silicon Carbide (SiC) Insulated-Gate Bipolar Transistor (IGBT) in Continuous Switching Mode

DTIC Science & Technology

operation in a DC-DC power converter switching at a frequency of up to 15 kHz. Calculations also estimated the effect of solder layers on temperature in the device....Thermal simulations were used to calculate temperatures in a silicon carbide (SiC) Insulated -Gate Bipolar Transistor (IGBT),simulating device

Factors affecting speech understanding in gated interference: Cochlear implant users and normal-hearing listeners

NASA Astrophysics Data System (ADS)

Nelson, Peggy B.; Jin, Su-Hyun

2004-05-01

Previous work [Nelson, Jin, Carney, and Nelson (2003), J. Acoust. Soc. Am 113, 961-968] suggested that cochlear implant users do not benefit from masking release when listening in modulated noise. The previous findings indicated that implant users experience little to no release from masking when identifying sentences in speech-shaped noise, regardless of the modulation frequency applied to the noise. The lack of masking release occurred for all implant subjects who were using three different devices and speech processing strategies. In the present study, possible causes of this reduced masking release in implant listeners were investigated. Normal-hearing listeners, implant users, and normal-hearing listeners presented with a four-band simulation of a cochlear implant were tested for their understanding of sentences in gated noise (1-32 Hz gate frequencies) when the duty cycle of the noise was varied from 25% to 75%. No systematic effect of noise duty cycle on implant and simulation listeners' performance was noted, indicating that the masking caused by gated noise is not only energetic masking. Masking release significantly increased when the number of spectral channels was increased from 4 to 12 for simulation listeners, suggesting that spectral resolution is important for masking release. Listeners were also tested for their understanding of gated sentences (sentences in quiet interrupted by periods of silence ranging from 1 to 32 Hz as a measure of auditory fusion, or the ability to integrate speech across temporal gaps. Implant and simulation listeners had significant difficulty understanding gated sentences at every gate frequency. When the number of spectral channels was increased for simulation listeners, their ability to understand gated sentences improved significantly. Findings suggest that implant listeners' difficulty understanding speech in modulated conditions is related to at least two (possibly related) factors: degraded spectral information and limitations in auditory fusion across temporal gaps.

Excitatory Post-Synaptic Potential Mimicked in Indium-Zinc-Oxide Synaptic Transistors Gated by Methyl Cellulose Solid Electrolyte

PubMed Central

Guo, Liqiang; Wen, Juan; Ding, Jianning; Wan, Changjin; Cheng, Guanggui

2016-01-01

The excitatory postsynaptic potential (EPSP) of biological synapses is mimicked in indium-zinc-oxide synaptic transistors gated by methyl cellulose solid electrolyte. These synaptic transistors show excellent electrical performance at an operating voltage of 0.8 V, Ion/off ratio of 2.5 × 106, and mobility of 38.4 cm2/Vs. After this device is connected to a resistance of 4 MΩ in series, it exhibits excellent characteristics as an inverter. A threshold potential of 0.3 V is achieved by changing the gate pulse amplitude, width, or number, which is analogous to biological EPSP. PMID:27924838

Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

2012-02-01

Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

Bias-stress characterization of solution-processed organic field-effect transistor based on highly ordered liquid crystals

NASA Astrophysics Data System (ADS)

Kunii, M.; Iino, H.; Hanna, J.

2017-06-01

Bias-stress effects in solution-processed, 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-10) field effect transistors (FETs) are studied under negative and positive direct current bias. The bottom gate, bottom contact polycrystalline Ph-BTBT-10 FET with a hybrid gate dielectric of polystyrene and SiO2 shows high field effect mobility as well as a steep subthreshold slope when fabricated with a highly ordered smectic E liquid crystalline (SmE) film as a precursor. Negative gate bias-stress causes negative threshold voltage shift (ΔVth) for Ph-BTBT-10 FET in ambient air, but ΔVth rapidly decreases as the gate bias decreases and approaches to near zero when the gate bias goes down to 9 V in amplitude. In contrast, positive gate bias-stress causes negligible ΔVth even with a relatively high bias voltage. These results conclude that Ph-BTBT-10 FET has excellent bias-stress stability in ambient air in the range of low to moderate operating voltages.

A multi-SNP association test for complex diseases incorporating an optimal P-value threshold algorithm in nuclear families.

PubMed

Wang, Yi-Ting; Sung, Pei-Yuan; Lin, Peng-Lin; Yu, Ya-Wen; Chung, Ren-Hua

2015-05-15

Genome-wide association studies (GWAS) have become a common approach to identifying single nucleotide polymorphisms (SNPs) associated with complex diseases. As complex diseases are caused by the joint effects of multiple genes, while the effect of individual gene or SNP is modest, a method considering the joint effects of multiple SNPs can be more powerful than testing individual SNPs. The multi-SNP analysis aims to test association based on a SNP set, usually defined based on biological knowledge such as gene or pathway, which may contain only a portion of SNPs with effects on the disease. Therefore, a challenge for the multi-SNP analysis is how to effectively select a subset of SNPs with promising association signals from the SNP set. We developed the Optimal P-value Threshold Pedigree Disequilibrium Test (OPTPDT). The OPTPDT uses general nuclear families. A variable p-value threshold algorithm is used to determine an optimal p-value threshold for selecting a subset of SNPs. A permutation procedure is used to assess the significance of the test. We used simulations to verify that the OPTPDT has correct type I error rates. Our power studies showed that the OPTPDT can be more powerful than the set-based test in PLINK, the multi-SNP FBAT test, and the p-value based test GATES. We applied the OPTPDT to a family-based autism GWAS dataset for gene-based association analysis and identified MACROD2-AS1 with genome-wide significance (p-value=2.5×10(-6)). Our simulation results suggested that the OPTPDT is a valid and powerful test. The OPTPDT will be helpful for gene-based or pathway association analysis. The method is ideal for the secondary analysis of existing GWAS datasets, which may identify a set of SNPs with joint effects on the disease.

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

AlGaN/GaN high electron mobility transistors with selective area grown p-GaN gates

NASA Astrophysics Data System (ADS)

Yuliang, Huang; Lian, Zhang; Zhe, Cheng; Yun, Zhang; Yujie, Ai; Yongbing, Zhao; Hongxi, Lu; Junxi, Wang; Jinmin, Li

2016-11-01

We report a selective area growth (SAG) method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors (HEMTs) by metal-organic chemical vapor deposition. Compared with Schottky gate HEMTs, the SAG p-GaN gate HEMTs show more positive threshold voltage (V th) and better gate control ability. The influence of Cp2Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied. With the increasing Cp2Mg from 0.16 μmol/min to 0.20 μmol/min, the V th raises from -0.67 V to -0.37 V. The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm. The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage. Project supported by the National Natural Sciences Foundation of China (Nos. 61376090, 61306008) and the National High Technology Program of China (No. 2014AA032606).

A Novel Threshold Voltage Defined Multiplexer for Interconnect Camouflaging

DTIC Science & Technology

2017-03-01

camouflaged onventional reli amouflaged to i g the overhead random-net bas indicate 32-81 rhead when 5 the proposed te ing, Camouflag an Intellectua...profitable or of camouflag w chosen ga area, delay of adversary w rea overhead . nalities such ct gate funct l create a pa o through a gu gate...of l ; and only few ll overhead w proposed ca el RE-resistan defined switch aves no layou ouflaged, the a match the ou est pattern and ly; and (c

Observations of Single Event Failure in Power MOSFETS

NASA Technical Reports Server (NTRS)

Nichols, D.; McCarty, K.; Coss, J.

1994-01-01

The first compendium of single event test data for power MOSFETs provides failure thresholds from burnout or gate rupture for over 100 devices of eight manufacturers. Ordering the data has also provided some useful insights.

Superficial dosimetry imaging based on Čerenkov emission for external beam radiotherapy with megavoltage x-ray beam

PubMed Central

Zhang, Rongxiao; Glaser, Adam K.; Gladstone, David J.; Fox, Colleen J.; Pogue, Brian W.

2013-01-01

Purpose: Čerenkov radiation emission occurs in all tissue, when charged particles (either primary or secondary) travel at velocity above the threshold for the Čerenkov effect (about 220 KeV in tissue for electrons). This study presents the first examination of optical Čerenkov emission as a surrogate for the absorbed superficial dose for MV x-ray beams. Methods: In this study, Monte Carlo simulations of flat and curved surfaces were studied to analyze the energy spectra of charged particles produced in different regions near the surfaces when irradiated by MV x-ray beams. Čerenkov emission intensity and radiation dose were directly simulated in voxelized flat and cylindrical phantoms. The sampling region of superficial dosimetry based on Čerenkov radiation was simulated in layered skin models. Angular distributions of optical emission from the surfaces were investigated. Tissue mimicking phantoms with flat and curved surfaces were imaged with a time domain gating system. The beam field sizes (50 × 50–200 × 200 mm2), incident angles (0°–70°) and imaging regions were all varied. Results: The entrance or exit region of the tissue has nearly homogeneous energy spectra across the beam, such that their Čerenkov emission is proportional to dose. Directly simulated local intensity of Čerenkov and radiation dose in voxelized flat and cylindrical phantoms further validate that this signal is proportional to radiation dose with absolute average discrepancy within 2%, and the largest within 5% typically at the beam edges. The effective sampling depth could be tuned from near 0 up to 6 mm by spectral filtering. The angular profiles near the theoretical Lambertian emission distribution for a perfect diffusive medium, suggesting that angular correction of Čerenkov images may not be required even for curved surface. The acquisition speed and signal to noise ratio of the time domain gating system were investigated for different acquisition procedures, and the results show there is good potential for real-time superficial dose monitoring. Dose imaging under normal ambient room lighting was validated, using gated detection and a breast phantom. Conclusions: This study indicates that Čerenkov emission imaging might provide a valuable way to superficial dosimetry imaging in real time for external beam radiotherapy with megavoltage x-ray beams. PMID:24089916

Toward Quantifying the Electrostatic Transduction Mechanism in Carbon Nanotube Biomolecular Sensors

NASA Astrophysics Data System (ADS)

Lerner, Mitchell; Kybert, Nicholas; Mendoza, Ryan; Dailey, Jennifer; Johnson, A. T. Charlie

2013-03-01

Despite the great promise of carbon nanotube field-effect transistors (CNT FETs) for applications in chemical and biochemical detection, a quantitative understanding of sensor responses is lacking. To explore the role of electrostatics in sensor transduction, experiments were conducted with a set of similar compounds designed to adsorb onto the CNT FET via a pyrene linker group and take on a set of known charge states under ambient conditions. Acidic and basic species were observed to induce threshold voltage shifts of opposite sign, consistent with gating of the CNT FET by local charges due to protonation or deprotonation of the pyrene compounds by interfacial water. The magnitude of the gate voltage shift was controlled by the distance between the charged group and the CNT. Additionally, functionalization with an uncharged pyrene compound showed a threshold shift ascribed to its molecular dipole moment. This work illustrates a method for producing CNT FETs with controlled values of the turnoff gate voltage, and more generally, these results will inform the development of quantitative models for the response of CNT FET chemical and biochemical sensors. As an example, the results of an experiment detecting biomarkers of Lyme disease will be discussed in the context of this model.

Low-voltage organic strain sensor on plastic using polymer/high- K inorganic hybrid gate dielectrics

NASA Astrophysics Data System (ADS)

Jung, Soyoun; Ji, Taeksoo; Varadan, Vijay K.

2007-12-01

In this paper, gate-induced pentacene semiconductor strain sensors based on hybrid-gate dielectrics using poly-vinylphenol (PVP) and high-K inorganic, Ta IIO 5 are fabricated on flexible substrates, polyethylene naphthalate (PEN). The Ta IIO 5 gate dielectric layer is combined with a thin PVP layer to obtain very smooth and hydrophobic surfaces which improve the molecular structures of pentacene films. The PVP-Ta IIO 5 hybrid-gate dielectric films exhibit a high dielectric capacitance and low leakage current. The sensors adopting thin film transistor (TFT)-like structures show a significantly reduced operating voltage (~6V), and good device characteristics with a field-effect mobility of 1.89 cm2/V•s, a threshold voltage of -0.5 V, and an on/off ratio of 10 3. The strain sensor, one of the practical applications in large-area organic electronics, was characterized with different bending radii of 50, 40, 30, and 20 mm. The sensor output signals were significantly improved with low-operating voltages.

High-mobility solution-processed copper phthalocyanine-based organic field-effect transistors.

PubMed

Chaure, Nandu B; Cammidge, Andrew N; Chambrier, Isabelle; Cook, Michael J; Cain, Markys G; Murphy, Craig E; Pal, Chandana; Ray, Asim K

2011-04-01

Solution-processed films of 1,4,8,11,15,18,22,25-octakis(hexyl) copper phthalocyanine (CuPc 6 ) were utilized as an active semiconducting layer in the fabrication of organic field-effect transistors (OFETs) in the bottom-gate configurations using chemical vapour deposited silicon dioxide (SiO 2 ) as gate dielectrics. The surface treatment of the gate dielectric with a self-assembled monolayer of octadecyltrichlorosilane (OTS) resulted in values of 4×10 -2 cm 2 V -1 s -1 and 10 6 for saturation mobility and on/off current ratio, respectively. This improvement was accompanied by a shift in the threshold voltage from 3 V for untreated devices to -2 V for OTS treated devices. The trap density at the interface between the gate dielectric and semiconductor decreased by about one order of magnitude after the surface treatment. The transistors with the OTS treated gate dielectrics were more stable over a 30-day period in air than untreated ones.

High-mobility solution-processed copper phthalocyanine-based organic field-effect transistors

PubMed Central

Chaure, Nandu B; Cammidge, Andrew N; Chambrier, Isabelle; Cook, Michael J; Cain, Markys G; Murphy, Craig E; Pal, Chandana; Ray, Asim K

2011-01-01

Solution-processed films of 1,4,8,11,15,18,22,25-octakis(hexyl) copper phthalocyanine (CuPc6) were utilized as an active semiconducting layer in the fabrication of organic field-effect transistors (OFETs) in the bottom-gate configurations using chemical vapour deposited silicon dioxide (SiO2) as gate dielectrics. The surface treatment of the gate dielectric with a self-assembled monolayer of octadecyltrichlorosilane (OTS) resulted in values of 4×10−2 cm2 V−1 s−1 and 106 for saturation mobility and on/off current ratio, respectively. This improvement was accompanied by a shift in the threshold voltage from 3 V for untreated devices to -2 V for OTS treated devices. The trap density at the interface between the gate dielectric and semiconductor decreased by about one order of magnitude after the surface treatment. The transistors with the OTS treated gate dielectrics were more stable over a 30-day period in air than untreated ones. PMID:27877383

A biochemical logic gate using an enzyme and its inhibitor. Part II: The logic gate.

PubMed

Sivan, Sarit; Tuchman, Samuel; Lotan, Noah

2003-06-01

Enzyme-Based Logic Gates (ENLOGs) are key components in bio-molecular systems for information processing. This report and the previous one in this series address the characterization of two bio-molecular switching elements, namely the alpha-chymotrypsin (alphaCT) derivative p-phenylazobenzoyl-alpha-chymotrypsin (PABalphaCT) and its inhibitor (proflavine), as well as their assembly into a logic gate. The experimental output of the proposed system is expressed in terms of enzymic activity and this was translated into logic output (i.e. "1" or "0") relative to a predetermined threshold value. We have found that an univalent link exists between the dominant isomers of PABalphaCT (cis or trans), the dominant form of either acridine (proflavine) or acridan and the logic output of the system. Thus, of all possible combinations, only the trans-PABalphaCT and the acridan lead to an enzymic activity that can be defined as logic output "1". The system operates under the rules of Boolean algebra and performs as an "AND" logic gate.

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

NASA Astrophysics Data System (ADS)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

The four-gate transistor

NASA Technical Reports Server (NTRS)

Mojarradi, M. M.; Cristoveanu, S.; Allibert, F.; France, G.; Blalock, B.; Durfrene, B.

2002-01-01

The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

A simulation for the gated weir opening of Wonokromo River, Rungkut District, Surabaya

NASA Astrophysics Data System (ADS)

Handajani, N.; Wahjudijanto, I.; Mu'afi, M.

2018-01-01

The gated weir is a weir that the crest elevation could be operated based on the flow through the river. The upstream water level of the gated weir could be controlled with gate opening or closing. This study applied a simulation with HEC-RAS 4,0 program in order to know the river hydraulic condition after the gated weir has built. According to the rainfall intensity from each sub-watershed, Distribution Log Pearson III with return period 50 years (Q50) was determined to calculate the design flood discharge. By using Rational Method, the design flood discharge is 470 m3/s. The Results show that capacity of the river is able to accomodate Q50 with discharge 470 m3/s and the gate should be fully opened during flood. This condition could passed the normal discharge at + 5.00 m elevation.

Poster — Thur Eve — 46: Monte Carlo model of the Novalis Classic 6MV stereotactic linear accelerator using the GATE simulation platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wiebe, J; Department of Physics and Astronomy, University of Calgary, Calgary, AB; Ploquin, N

2014-08-15

Monte Carlo (MC) simulation is accepted as the most accurate method to predict dose deposition when compared to other methods in radiation treatment planning. Current dose calculation algorithms used for treatment planning can become inaccurate when small radiation fields and tissue inhomogeneities are present. At our centre the Novalis Classic linear accelerator (linac) is used for Stereotactic Radiosurgery (SRS). The first MC model to date of the Novalis Classic linac was developed at our centre using the Geant4 Application for Tomographic Emission (GATE) simulation platform. GATE is relatively new, open source MC software built from CERN's Geometry and Tracking 4more » (Geant4) toolkit. The linac geometry was modeled using manufacturer specifications, as well as in-house measurements of the micro MLC's. Among multiple model parameters, the initial electron beam was adjusted so that calculated depth dose curves agreed with measured values. Simulations were run on the European Grid Infrastructure through GateLab. Simulation time is approximately 8 hours on GateLab for a complete head model simulation to acquire a phase space file. Current results have a majority of points within 3% of the measured dose values for square field sizes ranging from 6×6 mm{sup 2} to 98×98 mm{sup 2} (maximum field size on the Novalis Classic linac) at 100 cm SSD. The x-ray spectrum was determined from the MC data as well. The model provides an investigation into GATE'S capabilities and has the potential to be used as a research tool and an independent dose calculation engine for clinical treatment plans.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nielsen, Michael A.; School of Information Technology and Electrical Engineering, University of Queensland, Brisbane, Queensland 4072; Dawson, Christopher M.

The one-way quantum computing model introduced by Raussendorf and Briegel [Phys. Rev. Lett. 86, 5188 (2001)] shows that it is possible to quantum compute using only a fixed entangled resource known as a cluster state, and adaptive single-qubit measurements. This model is the basis for several practical proposals for quantum computation, including a promising proposal for optical quantum computation based on cluster states [M. A. Nielsen, Phys. Rev. Lett. (to be published), quant-ph/0402005]. A significant open question is whether such proposals are scalable in the presence of physically realistic noise. In this paper we prove two threshold theorems which showmore » that scalable fault-tolerant quantum computation may be achieved in implementations based on cluster states, provided the noise in the implementations is below some constant threshold value. Our first threshold theorem applies to a class of implementations in which entangling gates are applied deterministically, but with a small amount of noise. We expect this threshold to be applicable in a wide variety of physical systems. Our second threshold theorem is specifically adapted to proposals such as the optical cluster-state proposal, in which nondeterministic entangling gates are used. A critical technical component of our proofs is two powerful theorems which relate the properties of noisy unitary operations restricted to act on a subspace of state space to extensions of those operations acting on the entire state space. We expect these theorems to have a variety of applications in other areas of quantum-information science.« less

Probing the Energy Landscape of Activation Gating of the Bacterial Potassium Channel KcsA

PubMed Central

Linder, Tobias; de Groot, Bert L.; Stary-Weinzinger, Anna

2013-01-01

The bacterial potassium channel KcsA, which has been crystallized in several conformations, offers an ideal model to investigate activation gating of ion channels. In this study, essential dynamics simulations are applied to obtain insights into the transition pathways and the energy profile of KcsA pore gating. In agreement with previous hypotheses, our simulations reveal a two phasic activation gating process. In the first phase, local structural rearrangements in TM2 are observed leading to an intermediate channel conformation, followed by large structural rearrangements leading to full opening of KcsA. Conformational changes of a highly conserved phenylalanine, F114, at the bundle crossing region are crucial for the transition from a closed to an intermediate state. 3.9 µs umbrella sampling calculations reveal that there are two well-defined energy barriers dividing closed, intermediate, and open channel states. In agreement with mutational studies, the closed state was found to be energetically more favorable compared to the open state. Further, the simulations provide new insights into the dynamical coupling effects of F103 between the activation gate and the selectivity filter. Investigations on individual subunits support cooperativity of subunits during activation gating. PMID:23658510

High-performance SEGISFET pH Sensor using the structure of double-gate a-IGZO TFTs with engineered gate oxides

NASA Astrophysics Data System (ADS)

Pyo, Ju-Young; Cho, Won-Ju

2017-03-01

In this paper, we propose a high-performance separative extended gate ion-sensitive field-effect transistor (SEGISFET) that consists of a tin dioxide (SnO2) SEG sensing part and a double-gate structure amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with tantalum pentoxide/silicon dioxide (Ta2O5/SiO2)-engineered top-gate oxide. To increase sensitivity, we maximized the capacitive coupling ratio by applying high-k dielectric at the top-gate oxide layer. As an engineered top-gate oxide, a stack of 25 nm-thick Ta2O5 and 10 nm-thick SiO2 layers was found to simultaneously satisfy a small equivalent oxide thickness (˜17.14 nm), a low leakage current, and a stable interfacial property. The threshold-voltage instability, which is a fundamental issue in a-IGZO TFTs, was improved by low-temperature post-deposition annealing (˜87 °C) using microwave irradiation. The double-gate structure a-IGZO TFTs with engineered top-gate oxide exhibited high mobility, small subthreshold swing, high drive current, and larger on/off current ratio. The a-IGZO SEGISFETs with a dual-gate sensing mode showed a pH sensitivity of 649.04 mV pH-1, which is far beyond the Nernst limit. The non-ideal behavior of ISFETs, hysteresis, and drift effect also improved. These results show that the double-gate structure a-IGZO TFTs with engineered top-gate oxide can be a good candidate for cheap and disposable SEGISFET sensors.

Gate line edge roughness amplitude and frequency variation effects on intra die MOS device characteristics

NASA Astrophysics Data System (ADS)

Hamadeh, Emad; Gunther, Norman G.; Niemann, Darrell; Rahman, Mahmud

2006-06-01

Random fluctuations in fabrication process outcomes such as gate line edge roughness (LER) give rise to corresponding fluctuations in scaled down MOS device characteristics. A thermodynamic-variational model is presented to study the effects of LER on threshold voltage and capacitance of sub-50 nm MOS devices. Conceptually, we treat the geometric definition of the MOS devices on a die as consisting of a collection of gates. In turn, each of these gates has an area, A, and a perimeter, P, defined by nominally straight lines subject to random process outcomes producing roughness. We treat roughness as being deviations from straightness consisting of both transverse amplitude and longitudinal wavelength each having lognormal distribution. We obtain closed-form expressions for variance of threshold voltage ( Vth), and device capacitance ( C) at Onset of Strong Inversion (OSI) for a small device. Using our variational model, we characterized the device electrical properties such as σ and σC in terms of the statistical parameters of the roughness amplitude and spatial frequency, i.e., inverse roughness wavelength. We then verified our model with numerical analysis of Vth roll-off for small devices and σ due to dopant fluctuation. Our model was also benchmarked against TCAD of σ as a function of LER. We then extended our analysis to predict variations in σ and σC versus average LER spatial frequency and amplitude, and oxide-thickness. Given the intuitive expectation that LER of very short wavelengths must also have small amplitude, we have investigated the case in which the amplitude mean is inversely related to the frequency mean. We compare with the situation in which amplitude and frequency mean are unrelated. Given also that the gate perimeter may consist of different LER signature for each side, we have extended our analysis to the case when the LER statistical difference between gate sides is moderate, as well as when it is significantly large.

Monte Carlo simulations in Nuclear Medicine

NASA Astrophysics Data System (ADS)

Loudos, George K.

2007-11-01

Molecular imaging technologies provide unique abilities to localise signs of disease before symptoms appear, assist in drug testing, optimize and personalize therapy, and assess the efficacy of treatment regimes for different types of cancer. Monte Carlo simulation packages are used as an important tool for the optimal design of detector systems. In addition they have demonstrated potential to improve image quality and acquisition protocols. Many general purpose (MCNP, Geant4, etc) or dedicated codes (SimSET etc) have been developed aiming to provide accurate and fast results. Special emphasis will be given to GATE toolkit. The GATE code currently under development by the OpenGATE collaboration is the most accurate and promising code for performing realistic simulations. The purpose of this article is to introduce the non expert reader to the current status of MC simulations in nuclear medicine and briefly provide examples of current simulated systems, and present future challenges that include simulation of clinical studies and dosimetry applications.

Toward elucidating the heat activation mechanism of the TRPV1 channel gating by molecular dynamics simulation.

PubMed

Wen, Han; Qin, Feng; Zheng, Wenjun

2016-12-01

As a key cellular sensor, the TRPV1 cation channel undergoes a gating transition from a closed state to an open state in response to various physical and chemical stimuli including noxious heat. Despite years of study, the heat activation mechanism of TRPV1 gating remains enigmatic at the molecular level. Toward elucidating the structural and energetic basis of TRPV1 gating, we have performed molecular dynamics (MD) simulations (with cumulative simulation time of 3 μs), starting from the high-resolution closed and open structures of TRPV1 solved by cryo-electron microscopy. In the closed-state simulations at 30°C, we observed a stably closed channel constricted at the lower gate (near residue I679), while the upper gate (near residues G643 and M644) is dynamic and undergoes flickery opening/closing. In the open-state simulations at 60°C, we found higher conformational variation consistent with a large entropy increase required for the heat activation, and both the lower and upper gates are dynamic with transient opening/closing. Through ensemble-based structural analyses of the closed state versus the open state, we revealed pronounced closed-to-open conformational changes involving the membrane proximal domain (MPD) linker, the outer pore, and the TRP helix, which are accompanied by breaking/forming of a network of closed/open-state specific hydrogen bonds. By comparing the closed-state simulations at 30°C and 60°C, we observed heat-activated conformational changes in the MPD linker, the outer pore, and the TRP helix that resemble the closed-to-open conformational changes, along with partial formation of the open-state specific hydrogen bonds. Some of the residues involved in the above key hydrogen bonds were validated by previous mutational studies. Taken together, our MD simulations have offered rich structural and dynamic details beyond the static structures of TRPV1, and promising targets for future mutagenesis and functional studies of the TRPV1 channel. Proteins 2016; 84:1938-1949. © 2016 Wiley Periodicals, Inc. © 2016 Wiley Periodicals, Inc.

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

NASA Astrophysics Data System (ADS)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

Reduced distribution of threshold voltage shift in double layer NiSi2 nanocrystals for nano-floating gate memory applications.

PubMed

Choi, Sungjin; Lee, Junhyuk; Kim, Donghyoun; Oh, Seulki; Song, Wangyu; Choi, Seonjun; Choi, Eunsuk; Lee, Seung-Beck

2011-12-01

We report on the fabrication and capacitance-voltage characteristics of double layer nickel-silicide nanocrystals with Si3N4 interlayer tunnel barrier for nano-floating gate memory applications. Compared with devices using SiO2 interlayer, the use of Si3N4 interlayer separation reduced the average size (4 nm) and distribution (+/- 2.5 nm) of NiSi2 nanocrystal (NC) charge traps by more than 50% and giving a two fold increase in NC density to 2.3 x 10(12) cm(-2). The increased density and reduced NC size distribution resulted in a significantly decrease in the distribution of the device C-V characteristics. For each program voltage, the distribution of the shift in the threshold voltage was reduced by more than 50% on average to less than 0.7 V demonstrating possible multi-level-cell operation.

Optimizing MOS-gated thyristor using voltage-based equivalent circuit model for designing steep-subthreshold-slope PN-body-tied silicon-on-insulator FET

NASA Astrophysics Data System (ADS)

Ueda, Daiki; Takeuchi, Kiyoshi; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

A new circuit model that provides a clear guide on designing a MOS-gated thyristor (MGT) is reported. MGT plays a significant role in achieving a steep subthreshold slope of a PN-body tied silicon-on-insulator (SOI) FET (PNBTFET), which is an SOI MOSFET merged with an MGT. The effects of design parameters on MGT and the proposed equivalent circuit model are examined to determine how to regulate the voltage response of MGT and how to suppress power dissipation. It is demonstrated that MGT with low threshold voltages, small hysteresis widths, and small power dissipation can be designed by tuning design parameters. The temperature dependence of MGT is also examined, and it is confirmed that hysteresis width decreases with the average threshold voltage kept nearly constant as temperature rises. The equivalent circuit model can be conveniently used to design low-power PNBTFET.

Fault-tolerant logical gates in quantum error-correcting codes

NASA Astrophysics Data System (ADS)

Pastawski, Fernando; Yoshida, Beni

2015-01-01

Recently, S. Bravyi and R. König [Phys. Rev. Lett. 110, 170503 (2013), 10.1103/PhysRevLett.110.170503] have shown that there is a trade-off between fault-tolerantly implementable logical gates and geometric locality of stabilizer codes. They consider locality-preserving operations which are implemented by a constant-depth geometrically local circuit and are thus fault tolerant by construction. In particular, they show that, for local stabilizer codes in D spatial dimensions, locality-preserving gates are restricted to a set of unitary gates known as the D th level of the Clifford hierarchy. In this paper, we explore this idea further by providing several extensions and applications of their characterization to qubit stabilizer and subsystem codes. First, we present a no-go theorem for self-correcting quantum memory. Namely, we prove that a three-dimensional stabilizer Hamiltonian with a locality-preserving implementation of a non-Clifford gate cannot have a macroscopic energy barrier. This result implies that non-Clifford gates do not admit such implementations in Haah's cubic code and Michnicki's welded code. Second, we prove that the code distance of a D -dimensional local stabilizer code with a nontrivial locality-preserving m th -level Clifford logical gate is upper bounded by O (LD +1 -m) . For codes with non-Clifford gates (m >2 ), this improves the previous best bound by S. Bravyi and B. Terhal [New. J. Phys. 11, 043029 (2009), 10.1088/1367-2630/11/4/043029]. Topological color codes, introduced by H. Bombin and M. A. Martin-Delgado [Phys. Rev. Lett. 97, 180501 (2006), 10.1103/PhysRevLett.97.180501; Phys. Rev. Lett. 98, 160502 (2007), 10.1103/PhysRevLett.98.160502; Phys. Rev. B 75, 075103 (2007), 10.1103/PhysRevB.75.075103], saturate the bound for m =D . Third, we prove that the qubit erasure threshold for codes with a nontrivial transversal m th -level Clifford logical gate is upper bounded by 1 /m . This implies that no family of fault-tolerant codes with transversal gates in increasing level of the Clifford hierarchy may exist. This result applies to arbitrary stabilizer and subsystem codes and is not restricted to geometrically local codes. Fourth, we extend the result of Bravyi and König to subsystem codes. Unlike stabilizer codes, the so-called union lemma does not apply to subsystem codes. This problem is avoided by assuming the presence of an error threshold in a subsystem code, and a conclusion analogous to that of Bravyi and König is recovered.

Validation of a Monte Carlo simulation of the Inveon PET scanner using GATE

NASA Astrophysics Data System (ADS)

Lu, Lijun; Zhang, Houjin; Bian, Zhaoying; Ma, Jianhua; Feng, Qiangjin; Chen, Wufan

2016-08-01

The purpose of this study is to validate the application of GATE (Geant4 Application for Tomographic Emission) Monte Carlo simulation toolkit in order to model the performance characteristics of Siemens Inveon small animal PET system. The simulation results were validated against experimental/published data in accordance with the NEMA NU-4 2008 protocol for standardized evaluation of spatial resolution, sensitivity, scatter fraction (SF) and noise equivalent counting rate (NECR) of a preclinical PET system. An agreement of less than 18% was obtained between the radial, tangential and axial spatial resolutions of the simulated and experimental results. The simulated peak NECR of mouse-size phantom agreed with the experimental result, while for the rat-size phantom simulated value was higher than experimental result. The simulated and experimental SFs of mouse- and rat- size phantom both reached an agreement of less than 2%. It has been shown the feasibility of our GATE model to accurately simulate, within certain limits, all major performance characteristics of Inveon PET system.

Electrical Properties of Ultrathin Hf-Ti-O Higher k Gate Dielectric Films and Their Application in ETSOI MOSFET.

PubMed

Xiong, Yuhua; Chen, Xiaoqiang; Wei, Feng; Du, Jun; Zhao, Hongbin; Tang, Zhaoyun; Tang, Bo; Wang, Wenwu; Yan, Jiang

2016-12-01

Ultrathin Hf-Ti-O higher k gate dielectric films (~2.55 nm) have been prepared by atomic layer deposition. Their electrical properties and application in ETSOI (fully depleted extremely thin SOI) PMOSFETs were studied. It is found that at the Ti concentration of Ti/(Ti + Hf) ~9.4%, low equivalent gate oxide thickness (EOT) of ~0.69 nm and acceptable gate leakage current density of 0.61 A/cm 2 @ (V fb  - 1)V could be obtained. The conduction mechanism through the gate dielectric is dominated by the F-N tunneling in the gate voltage range of -0.5 to -2 V. Under the same physical thickness and process flow, lower EOT and higher I on /I off ratio could be obtained while using Hf-Ti-O as gate dielectric compared with HfO 2 . With Hf-Ti-O as gate dielectric, two ETSOI PMOSFETs with gate width/gate length (W/L) of 0.5 μm/25 nm and 3 μm/40 nm show good performances such as high I on , I on /I off ratio in the magnitude of 10 5 , and peak transconductance, as well as suitable threshold voltage (-0.3~-0.2 V). Particularly, ETSOI PMOSFETs show superior short-channel control capacity with DIBL <82 mV/V and subthreshold swing <70 mV/decade.

Nanocomposites of polyimide and mixed oxide nanoparticles for high performance nanohybrid gate dielectrics in flexible thin film transistors

NASA Astrophysics Data System (ADS)

Kim, Ju Hyun; Hwang, Byeong-Ung; Kim, Do-Il; Kim, Jin Soo; Seol, Young Gug; Kim, Tae Woong; Lee, Nae-Eung

2017-05-01

Organic gate dielectrics in thin film transistors (TFTs) for flexible display have advantages of high flexibility yet have the disadvantage of low dielectric constant (low- k). To supplement low- k characteristics of organic gate dielectrics, an organic/inorganic nanocomposite insulator loaded with high- k inorganic oxide nanoparticles (NPs) has been investigated but high loading of high- k NPs in polymer matrix is essential. Herein, compositing of over-coated polyimide (PI) on self-assembled (SA) layer of mixed HfO2 and ZrO2 NPs as inorganic fillers was used to make dielectric constant higher and leakage characteristics lower. A flexible TFT with lower the threshold voltage and high current on/off ratio could be fabricated by using the hybrid gate dielectric structure of the nanocomposite with SA layer of mixed NPs on ultrathin atomic-layer deposited Al2O3. [Figure not available: see fulltext.

GATE Monte Carlo simulation in a cloud computing environment

NASA Astrophysics Data System (ADS)

Rowedder, Blake Austin

The GEANT4-based GATE is a unique and powerful Monte Carlo (MC) platform, which provides a single code library allowing the simulation of specific medical physics applications, e.g. PET, SPECT, CT, radiotherapy, and hadron therapy. However, this rigorous yet flexible platform is used only sparingly in the clinic due to its lengthy calculation time. By accessing the powerful computational resources of a cloud computing environment, GATE's runtime can be significantly reduced to clinically feasible levels without the sizable investment of a local high performance cluster. This study investigated a reliable and efficient execution of GATE MC simulations using a commercial cloud computing services. Amazon's Elastic Compute Cloud was used to launch several nodes equipped with GATE. Job data was initially broken up on the local computer, then uploaded to the worker nodes on the cloud. The results were automatically downloaded and aggregated on the local computer for display and analysis. Five simulations were repeated for every cluster size between 1 and 20 nodes. Ultimately, increasing cluster size resulted in a decrease in calculation time that could be expressed with an inverse power model. Comparing the benchmark results to the published values and error margins indicated that the simulation results were not affected by the cluster size and thus that integrity of a calculation is preserved in a cloud computing environment. The runtime of a 53 minute long simulation was decreased to 3.11 minutes when run on a 20-node cluster. The ability to improve the speed of simulation suggests that fast MC simulations are viable for imaging and radiotherapy applications. With high power computing continuing to lower in price and accessibility, implementing Monte Carlo techniques with cloud computing for clinical applications will continue to become more attractive.

Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module

DTIC Science & Technology

2015-02-01

executed with SolidWorks Flow Simulation , a computational fluid-dynamics code. The graph in Fig. 2 shows the timing and amplitudes of power pulses...defined a convective flow of air perpendicular to the bottom surface of the mounting plate, with a velocity of 10 ft/s. The thermal simulations were...Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module by Gregory K Ovrebo ARL-TR-7210

Advanced p-MOSFET Ionizing-Radiation Dosimeter

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.

1994-01-01

Circuit measures total dose of ionizing radiation in terms of shift in threshold gate voltage of doped-channel metal oxide/semiconductor field-effect transistor (p-MOSFET). Drain current set at temperature-independent point to increase accuracy in determination of radiation dose.

A Subthreshold Digital Library Using a Dynamic-Threshold Metal-Oxide Semiconductor (DTMOS) and Transmission Gate Logic

DTIC Science & Technology

2014-09-01

electrocardiography (ECG), electromyography (EMG), and electroencephalography (EEG) applications that operate using thermoelectrically generated energy...semiconductor ECG electrocardiography EEG electroencephalography EMG electromyography FY15 fiscal year 2015 IC integrated circuit MOSFETs

An ionic liquid-gated polymer thin film transistor with exceptionally low "on" resistance

NASA Astrophysics Data System (ADS)

Algarni, Saud A.; Althagafi, Talal M.; Smith, Patrick J.; Grell, Martin

2014-05-01

We report the ionic liquid (IL) gating of a solution processed semiconducting polymer, poly(2,5-bis(3-hexadecylthiophen-2-yl)thieno[3,2-b]thiophene) (PBTTT). IL gating relies on the poor solubility of PBTTT, which requires hot chlorinated benzenes for solution processing. PBTTT, thus, resists dissolution even in IL, which otherwise rapidly dissolves semiconducting polymers. The resulting organic thin film transistors (OTFTs) display low threshold, very high carrier mobility (>3 cm2/Vs), and deliver high currents (in the order of 1 mA) at low operational voltages. Such OTFTs are interesting both practically, for the addressing of current-driven devices (e.g., organic LEDs), and for the study of charge transport in semiconducting polymers at very high carrier density.

Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan

High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio andmore » good memory retention.« less

Nitrogen anion doping as a strategy to suppress negative gate-bias illumination instability of ZnSnO thin film transistor

NASA Astrophysics Data System (ADS)

Li, Jun; Fu, Yi-Zhou; Huang, Chuan-Xin; Zhang, Jian-Hua; Jiang, Xue-Yin; Zhang, Zhi-Lin

2016-04-01

This work presents a strategy of nitrogen anion doping to suppress negative gate-bias illumination instability. The electrical performance and negative gate-bias illumination stability of the ZnSnON thin film transistors (TFTs) are investigated. Compared with ZnSnO-TFT, ZnSnON-TFT has a 53% decrease in the threshold voltage shift under negative bias illumination stress and electrical performance also progresses obviously. The stability improvement of ZnSnON-TFT is attributed to the reduction in ionized oxygen vacancy defects and the photodesorption of oxygen-related molecules. It suggests that anion doping can provide an effective solution to the adverse tradeoff between field effect mobility and negative bias illumination stability.

Entangling quantum-logic gate operated with an ultrabright semiconductor single-photon source.

PubMed

Gazzano, O; Almeida, M P; Nowak, A K; Portalupi, S L; Lemaître, A; Sagnes, I; White, A G; Senellart, P

2013-06-21

We demonstrate the unambiguous entangling operation of a photonic quantum-logic gate driven by an ultrabright solid-state single-photon source. Indistinguishable single photons emitted by a single semiconductor quantum dot in a micropillar optical cavity are used as target and control qubits. For a source brightness of 0.56 photons per pulse, the measured truth table has an overlap with the ideal case of 68.4±0.5%, increasing to 73.0±1.6% for a source brightness of 0.17 photons per pulse. The gate is entangling: At a source brightness of 0.48, the Bell-state fidelity is above the entangling threshold of 50% and reaches 71.0±3.6% for a source brightness of 0.15.

Molecular nanomagnets with switchable coupling for quantum simulation

DOE PAGES

Chiesa, Alessandro; Whitehead, George F. S.; Carretta, Stefano; ...

2014-12-11

Molecular nanomagnets are attractive candidate qubits because of their wide inter- and intra-molecular tunability. Uniform magnetic pulses could be exploited to implement one- and two-qubit gates in presence of a properly engineered pattern of interactions, but the synthesis of suitable and potentially scalable supramolecular complexes has proven a very hard task. Indeed, no quantum algorithms have ever been implemented, not even a proof-of-principle two-qubit gate. In this paper we show that the magnetic couplings in two supramolecular {Cr7Ni}-Ni-{Cr7Ni} assemblies can be chemically engineered to fit the above requisites for conditional gates with no need of local control. Microscopic parameters aremore » determined by a recently developed many-body ab-initio approach and used to simulate quantum gates. We find that these systems are optimal for proof-of-principle two-qubit experiments and can be exploited as building blocks of scalable architectures for quantum simulation.« less

Improved surface-roughness scattering and mobility models for multi-gate FETs with arbitrary cross-section and biasing scheme

NASA Astrophysics Data System (ADS)

Lizzit, D.; Badami, O.; Specogna, R.; Esseni, D.

2017-06-01

We present a new model for surface roughness (SR) scattering in n-type multi-gate FETs (MuGFETs) and gate-all-around nanowire FETs with fairly arbitrary cross-sections, its implementation in a complete device simulator, and the validation against experimental electron mobility data. The model describes the SR scattering matrix elements as non-linear transformations of interface fluctuations, which strongly influences the root mean square value of the roughness required to reproduce experimental mobility data. Mobility simulations are performed via the deterministic solution of the Boltzmann transport equation for a 1D-electron gas and including the most relevant scattering mechanisms for electronic transport, such as acoustic, polar, and non-polar optical phonon scattering, Coulomb scattering, and SR scattering. Simulation results show the importance of accounting for arbitrary cross-sections and biasing conditions when compared to experimental data. We also discuss how mobility is affected by the shape of the cross-section as well as by its area in gate-all-around and tri-gate MuGFETs.

GaAs-based optoelectronic neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H. (Inventor); Kim, Jae H. (Inventor); Psaltis, Demetri (Inventor)

1993-01-01

An integrated, optoelectronic, variable thresholding neuron implemented monolithically in GaAs integrated circuit and exhibiting high differential optical gain and low power consumption is presented. Two alternative embodiments each comprise an LED monolithically integrated with a detector and two transistors. One of the transistors is responsive to a bias voltage applied to its gate for varying the threshold of the neuron. One embodiment is implemented as an LED monolithically integrated with a double heterojunction bipolar phototransistor (detector) and two metal semiconductor field effect transistors (MESFET's) on a single GaAs substrate and another embodiment is implemented as an LED monolithically integrated with three MESFET's (one of which is an optical FET detector) on a single GaAs substrate. The first noted embodiment exhibits a differential optical gain of 6 and an optical switching energy of 10 pJ. The second embodiment has a differential optical gain of 80 and an optical switching energy of 38 pJ. Power consumption is 2.4 and 1.8 mW, respectively. Input 'light' power needed to turn on the LED is 2 micro-W and 54 nW, respectively. In both embodiments the detector is in series with a biasing MESFET and saturates the other MESFET upon detecting light above a threshold level. The saturated MESFET turns on the LED. Voltage applied to the biasing MESFET gate controls the threshold.

2-D modeling and analysis of short-channel behavior of a front high- K gate stack triple-material gate SB SON MOSFET

NASA Astrophysics Data System (ADS)

Banerjee, Pritha; Kumari, Tripty; Sarkar, Subir Kumar

2018-02-01

This paper presents the 2-D analytical modeling of a front high- K gate stack triple-material gate Schottky Barrier Silicon-On-Nothing MOSFET. Using the two-dimensional Poisson's equation and considering the popular parabolic potential approximation, expression for surface potential as well as the electric field has been considered. In addition, the response of the proposed device towards aggressive downscaling, that is, its extent of immunity towards the different short-channel effects, has also been considered in this work. The analytical results obtained have been validated using the simulated results obtained using ATLAS, a two-dimensional device simulator from SILVACO.

G(sup 4)FET Implementations of Some Logic Circuits

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

2009-01-01

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

PubMed

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-15

Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium-gallium-zinc oxide gate stack.

PubMed

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-20

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10 4 ). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2

NASA Astrophysics Data System (ADS)

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-01

Top-gated and bottom-gated transistors with multilayer MoS2 channel fully encapsulated by stacked Al2O3/HfO2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on–off current ratio of 108, high field-effect mobility of 102 cm2 V‑1 s‑1, and low subthreshold swing of 93 mV dec–1. Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10‑3–10‑2 V MV–1 cm–1 after 6 MV cm‑1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS2 channel fully encapsulated by stacked Al2O3/HfO2 is a promising way to fabricate high-performance ML MoS2 field-effect transistors for practical electron device applications.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium–gallium–zinc oxide gate stack

NASA Astrophysics Data System (ADS)

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-01

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium–gallium–zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>104). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

Photolithographically Patterned TiO2 Films for Electrolyte-Gated Transistors.

PubMed

Valitova, Irina; Kumar, Prajwal; Meng, Xiang; Soavi, Francesca; Santato, Clara; Cicoira, Fabio

2016-06-15

Metal oxides constitute a class of materials whose properties cover the entire range from insulators to semiconductors to metals. Most metal oxides are abundant and accessible at moderate cost. Metal oxides are widely investigated as channel materials in transistors, including electrolyte-gated transistors, where the charge carrier density can be modulated by orders of magnitude upon application of relatively low electrical bias (2 V). Electrolyte gating offers the opportunity to envisage new applications in flexible and printed electronics as well as to improve our current understanding of fundamental processes in electronic materials, e.g. insulator/metal transitions. In this work, we employ photolithographically patterned TiO2 films as channels for electrolyte-gated transistors. TiO2 stands out for its biocompatibility and wide use in sensing, electrochromics, photovoltaics and photocatalysis. We fabricated TiO2 electrolyte-gated transistors using an original unconventional parylene-based patterning technique. By using a combination of electrochemical and charge carrier transport measurements we demonstrated that patterning improves the performance of electrolyte-gated TiO2 transistors with respect to their unpatterned counterparts. Patterned electrolyte-gated (EG) TiO2 transistors show threshold voltages of about 0.9 V, ON/OFF ratios as high as 1 × 10(5), and electron mobility above 1 cm(2)/(V s).

Asymmetric underlap optimization of sub-10nm finfets for realizing energy-efficient logic and robust memories

NASA Astrophysics Data System (ADS)

Akkala, Arun Goud

Leakage currents in CMOS transistors have risen dramatically with technology scaling leading to significant increase in standby power consumption. Among the various transistor candidates, the excellent short channel immunity of Silicon double gate FinFETs have made them the best contender for successful scaling to sub-10nm nodes. For sub-10nm FinFETs, new quantum mechanical leakage mechanisms such as direct source to drain tunneling (DSDT) of charge carriers through channel potential energy barrier arising due to proximity of source/drain regions coupled with the high transport direction electric field is expected to dominate overall leakage. To counter the effects of DSDT and worsening short channel effects and to maintain Ion/ Ioff, performance and power consumption at reasonable values, device optimization techniques are necessary for deeply scaled transistors. In this work, source/drain underlapping of FinFETs has been explored using quantum mechanical device simulations as a potentially promising method to lower DSDT while maintaining the Ion/ Ioff ratio at acceptable levels. By adopting a device/circuit/system level co-design approach, it is shown that asymmetric underlapping, where the drain side underlap is longer than the source side underlap, results in optimal energy efficiency for logic circuits in near-threshold as well as standard, super-threshold operating regimes. In addition, read/write conflict in 6T SRAMs and the degradation in cell noise margins due to the low supply voltage can be mitigated by using optimized asymmetric underlapped n-FinFETs for the access transistor, thereby leading to robust cache memories. When gate-workfunction tuning is possible, using asymmetric underlapped n-FinFETs for both access and pull-down devices in an SRAM bit cell can lead to high-speed and low-leakage caches. Further, it is shown that threshold voltage degradation in the presence of Hot Carrier Injection (HCI) is less severe in asymmetric underlap n-FinFETs. A lifetime projection is carried out assuming that HCI is the major degradation mechanism and it is shown that a 3.4x improvement in device lifetime is possible over symmetric underlapped n-FinFET.

Effect of OFF-state stress induced electric field on trapping in AlGaN/GaN high electron mobility transistors on Si (111)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Anand, M. J., E-mail: anand2@e.ntu.edu.sg, E-mail: eging@ntu.edu.sg; Ng, G. I., E-mail: anand2@e.ntu.edu.sg, E-mail: eging@ntu.edu.sg; Syamal, B.

2015-02-23

The influence of electric field (EF) on the dynamic ON-resistance (dyn-R{sub DS[ON]}) and threshold-voltage shift (ΔV{sub th}) of AlGaN/GaN high electron mobility transistors on Si has been investigated using pulsed current-voltage (I{sub DS}-V{sub DS}) and drain current (I{sub D}) transients. Different EF was realized with devices of different gate-drain spacing (L{sub gd}) under the same OFF-state stress. Under high-EF (L{sub gd} = 2 μm), the devices exhibited higher dyn-R{sub DS[ON]} degradation but a small ΔV{sub th} (∼120 mV). However, at low-EF (L{sub gd} = 5 μm), smaller dyn-R{sub DS[ON]} degradation but a larger ΔV{sub th} (∼380 mV) was observed. Our analysis shows that under OFF-state stress, the gatemore » electrons are injected and trapped in the AlGaN barrier by tunnelling-assisted Poole-Frenkel conduction mechanism. Under high-EF, trapping spreads towards the gate-drain access region of the AlGaN barrier causing dyn-R{sub DS[ON]} degradation, whereas under low-EF, trapping is mostly confined under the gate causing ΔV{sub th}. A trap with activation energy 0.33 eV was identified in the AlGaN barrier by I{sub D}-transient measurements. The influence of EF on trapping was also verified by Silvaco TCAD simulations.« less

Demonstration of a Sub-Millimeter Wave Integrated Circuit (S-MMIC) using InP HEMT with a 35-nm Gate

NASA Technical Reports Server (NTRS)

Deal, W. R.; Din, S.; Padilla, J.; Radisic, V.; Mei, G.; Yoshida, W.; Liu, P. S.; Uyeda, J.; Barsky, M.; Gaier, T.;

New design of a passive type RADFET reader for enhanced sensitivity

NASA Astrophysics Data System (ADS)

Lee, Dae-Hee

2016-07-01

We present a new design of a passive type RADFET reader with enhanced radiation sensitivity. Using a electostatic plate, we have applied a static electric field to the gate voltage, which impacts a positive biasing on the p-type MOSFET. The resultant effect shows that 1.8 times of radiation sensitivity increased when we measured the threshold voltage shift of the RADFET exposed to 30 krad irradiation. We discuss further about the characteristic changes of a RADFET according to the positive biasing on the gate voltage.

Observation of electric potential in organic thin-film transistor by bias-applied hard X-ray photoemission spectroscopy

NASA Astrophysics Data System (ADS)

Watanabe, Takeshi; Tada, Keisuke; Yasuno, Satoshi; Oji, Hiroshi; Yoshimoto, Noriyuki; Hirosawa, Ichiro

2016-03-01

The effect of gate voltage on electric potential in a pentacene (PEN) layer was studied by hard X-ray photoelectron spectroscopy under a bias voltage. It was observed that applying a negative gate voltage substantially increases the width of a C 1s peak. This suggested that injected and accumulated carriers in an organic thin film transistor channel modified the potential depth profile in PEN. It was also observed that the C 1s kinetic energy tends to increase monotonically with threshold voltage.

Room-Temperature-Processed Flexible Amorphous InGaZnO Thin Film Transistor.

PubMed

Xiao, Xiang; Zhang, Letao; Shao, Yang; Zhou, Xiaoliang; He, Hongyu; Zhang, Shengdong

2017-12-13

A room-temperature flexible amorphous indium-gallium-zinc oxide thin film transistor (a-IGZO TFT) technology is developed on plastic substrates, in which both the gate dielectric and passivation layers of the TFTs are formed by an anodic oxidation (anodization) technique. While the gate dielectric Al 2 O 3 is grown with a conventional anodization on an Al:Nd gate electrode, the channel passivation layer Al 2 O 3 is formed using a localized anodization technique. The anodized Al 2 O 3 passivation layer shows a superior passivation effect to that of PECVD SiO 2 . The room-temperature-processed flexible a-IGZO TFT exhibits a field-effect mobility of 7.5 cm 2 /V·s, a subthreshold swing of 0.44 V/dec, an on-off ratio of 3.1 × 10 8 , and an acceptable gate-bias stability with threshold voltage shifts of 2.65 and -1.09 V under positive gate-bias stress and negative gate-bias stress, respectively. Bending and fatigue tests confirm that the flexible a-IGZO TFT also has a good mechanical reliability, with electrical performances remaining consistent up to a strain of 0.76% as well as after 1200 cycles of fatigue testing.

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

NASA Astrophysics Data System (ADS)

Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

2014-10-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

Monte Carlo simulation of Ray-Scan 64 PET system and performance evaluation using GATE toolkit

NASA Astrophysics Data System (ADS)

Li, Suying; Zhang, Qiushi; Vuletic, Ivan; Xie, Zhaoheng; Yang, Kun; Ren, Qiushi

2017-02-01

In this study, we aimed to develop a GATE model for the simulation of Ray-Scan 64 PET scanner and model its performance characteristics. A detailed implementation of system geometry and physical process were included in the simulation model. Then we modeled the performance characteristics of Ray-Scan 64 PET system for the first time, based on National Electrical Manufacturers Association (NEMA) NU-2 2007 protocols and validated the model against experimental measurement, including spatial resolution, sensitivity, counting rates and noise equivalent count rate (NECR). Moreover, an accurate dead time module was investigated to simulate the counting rate performance. Overall results showed reasonable agreement between simulation and experimental data. The validation results showed the reliability and feasibility of the GATE model to evaluate major performance of Ray-Scan 64 PET system. It provided a useful tool for a wide range of research applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vaysset, Adrien; Manfrini, Mauricio; Pourtois, Geoffrey

The functionality of a cross-shaped Spin Torque Majority Gate is explored by means of micromagnetic simulations. The different input combinations are simulated varying material parameters, current density and size. The main failure mode is identified: above a critical size, a domain wall can be pinned at the center of the cross, preventing further propagation of the information. By simulating several phase diagrams, the key parameters are obtained and the operating condition is deduced. A simple relation between the domain wall width and the size of the Spin Torque Majority Gate determines the working range. Finally, a correlation is found betweenmore » the energy landscape and the main failure mode. We demonstrate that a macrospin behavior ensures a reliable majority gate operation.« less

Numerical characteristics of quantum computer simulation

NASA Astrophysics Data System (ADS)

Chernyavskiy, A.; Khamitov, K.; Teplov, A.; Voevodin, V.; Voevodin, Vl.

2016-12-01

The simulation of quantum circuits is significantly important for the implementation of quantum information technologies. The main difficulty of such modeling is the exponential growth of dimensionality, thus the usage of modern high-performance parallel computations is relevant. As it is well known, arbitrary quantum computation in circuit model can be done by only single- and two-qubit gates, and we analyze the computational structure and properties of the simulation of such gates. We investigate the fact that the unique properties of quantum nature lead to the computational properties of the considered algorithms: the quantum parallelism make the simulation of quantum gates highly parallel, and on the other hand, quantum entanglement leads to the problem of computational locality during simulation. We use the methodology of the AlgoWiki project (algowiki-project.org) to analyze the algorithm. This methodology consists of theoretical (sequential and parallel complexity, macro structure, and visual informational graph) and experimental (locality and memory access, scalability and more specific dynamic characteristics) parts. Experimental part was made by using the petascale Lomonosov supercomputer (Moscow State University, Russia). We show that the simulation of quantum gates is a good base for the research and testing of the development methods for data intense parallel software, and considered methodology of the analysis can be successfully used for the improvement of the algorithms in quantum information science.

Fault-tolerance in Two-dimensional Topological Systems

NASA Astrophysics Data System (ADS)

Anderson, Jonas T.

This thesis is a collection of ideas with the general goal of building, at least in the abstract, a local fault-tolerant quantum computer. The connection between quantum information and topology has proven to be an active area of research in several fields. The introduction of the toric code by Alexei Kitaev demonstrated the usefulness of topology for quantum memory and quantum computation. Many quantum codes used for quantum memory are modeled by spin systems on a lattice, with operators that extract syndrome information placed on vertices or faces of the lattice. It is natural to wonder whether the useful codes in such systems can be classified. This thesis presents work that leverages ideas from topology and graph theory to explore the space of such codes. Homological stabilizer codes are introduced and it is shown that, under a set of reasonable assumptions, any qubit homological stabilizer code is equivalent to either a toric code or a color code. Additionally, the toric code and the color code correspond to distinct classes of graphs. Many systems have been proposed as candidate quantum computers. It is very desirable to design quantum computing architectures with two-dimensional layouts and low complexity in parity-checking circuitry. Kitaev's surface codes provided the first example of codes satisfying this property. They provided a new route to fault tolerance with more modest overheads and thresholds approaching 1%. The recently discovered color codes share many properties with the surface codes, such as the ability to perform syndrome extraction locally in two dimensions. Some families of color codes admit a transversal implementation of the entire Clifford group. This work investigates color codes on the 4.8.8 lattice known as triangular codes. I develop a fault-tolerant error-correction strategy for these codes in which repeated syndrome measurements on this lattice generate a three-dimensional space-time combinatorial structure. I then develop an integer program that analyzes this structure and determines the most likely set of errors consistent with the observed syndrome values. I implement this integer program to find the threshold for depolarizing noise on small versions of these triangular codes. Because the threshold for magic-state distillation is likely to be higher than this value and because logical CNOT gates can be performed by code deformation in a single block instead of between pairs of blocks, the threshold for fault-tolerant quantum memory for these codes is also the threshold for fault-tolerant quantum computation with them. Since the advent of a threshold theorem for quantum computers much has been improved upon. Thresholds have increased, architectures have become more local, and gate sets have been simplified. The overhead for magic-state distillation has been studied, but not nearly to the extent of the aforementioned topics. A method for greatly reducing this overhead, known as reusable magic states, is studied here. While examples of reusable magic states exist for Clifford gates, I give strong reasons to believe they do not exist for non-Clifford gates.

Topological color codes on Union Jack lattices: a stable implementation of the whole Clifford group

DOE Office of Scientific and Technical Information (OSTI.GOV)

Katzgraber, Helmut G.; Theoretische Physik, ETH Zurich, CH-8093 Zurich; Bombin, H.

We study the error threshold of topological color codes on Union Jack lattices that allow for the full implementation of the whole Clifford group of quantum gates. After mapping the error-correction process onto a statistical mechanical random three-body Ising model on a Union Jack lattice, we compute its phase diagram in the temperature-disorder plane using Monte Carlo simulations. Surprisingly, topological color codes on Union Jack lattices have a similar error stability to color codes on triangular lattices, as well as to the Kitaev toric code. The enhanced computational capabilities of the topological color codes on Union Jack lattices with respectmore » to triangular lattices and the toric code combined with the inherent robustness of this implementation show good prospects for future stable quantum computer implementations.« less

An Evaluation of Flash Cells Used in Critical Applications

NASA Technical Reports Server (NTRS)

Katz, Rich; Flowers, David; Bergevin, Keith

2016-01-01

Due to the common use of Flash technology in many commercial and industrial Programmable Logic Devices (PLDs) such as FPGAs and mixed-signal microcontrollers, flash technology is being utilized in fuzed munition applications. This presents a long-term reliability issue for both DoD and NASA safety- and mission-critical applications. A thorough understanding of the data retention failure modes and statistics associated with Flash data retention is of vital concern to the fuze safety community. A key retention parameter for a flash cell is the threshold voltage (VTH), which is an indirect indicator of the amount of charge stored on the cells floating gate. Initial test results based on a study of charge loss in flash cells in an FPGA device is presented. Statistical data taken from a small sample set indicates quantifiable charge loss for devices stored at both room temperature and 150 C. Initial evaluation of the distribution of threshold voltage in a large sample set (800 devices) is presented. The magnitude of charge loss from exposure to electrostatic discharge and electromagnetic fields is measured and presented. Simulated data (and measured data as available) resultant from harsh-environment testing (neutron, heavy ion, EMP) is presented.

Dual-Gate p-GaN Gate High Electron Mobility Transistors for Steep Subthreshold Slope.

PubMed

Bae, Jong-Ho; Lee, Jong-Ho

2016-05-01

A steep subthreshold slope characteristic is achieved through p-GaN gate HEMT with dual-gate structure. Obtained subthreshold slope is less than 120 μV/dec. Based on the measured and simulated data obtained from single-gate device, breakdown of parasitic floating-base bipolar transistor and floating gate charged with holes are responsible to increase abruptly in drain current. In the dual-gate device, on-current degrades with high temperature but subthreshold slope is not changed. To observe the switching speed of dual-gate device and transient response of drain current are measured. According to the transient responses of drain current, switching speed of the dual-gate device is about 10(-5) sec.

Exercise may cause myocardial ischemia at the anaerobic threshold in cardiac rehabilitation programs.

PubMed

Fuchs, A R C N; Meneghelo, R S; Stefanini, E; De Paola, A V; Smanio, P E P; Mastrocolla, L E; Ferraz, A S; Buglia, S; Piegas, L S; Carvalho, A A C

2009-03-01

Myocardial ischemia may occur during an exercise session in cardiac rehabilitation programs. However, it has not been established whether it is elicited when exercise prescription is based on heart rate corresponding to the anaerobic threshold as measured by cardiopulmonary exercise testing. Our objective was to determine the incidence of myocardial ischemia in cardiac rehabilitation programs according to myocardial perfusion SPECT in exercise programs based on the anaerobic threshold. Thirty-nine patients (35 men and 4 women) diagnosed with coronary artery disease by coronary angiography and stress technetium-99m-sestamibi gated SPECT associated with a baseline cardiopulmonary exercise test were assessed. Ages ranged from 45 to 75 years. A second cardiopulmonary exercise test determined training intensity at the anaerobic threshold. Repeat gated-SPECT was obtained after a third cardiopulmonary exercise test at the prescribed workload and heart rate. Myocardial perfusion images were analyzed using a score system of 6.4 at rest, 13.9 at peak stress, and 10.7 during the prescribed exercise (P < 0.05). The presence of myocardial ischemia during exercise was defined as a difference > or = 2 between the summed stress score and summed rest score. Accordingly, 25 (64%) patients were classified as ischemic and 14 (36%) as nonischemic. MIBI-SPECT showed myocardial ischemia during exercise within the anaerobic threshold. The 64% prevalence of ischemia observed in the study should not be looked on as representative of the whole population of patients undergoing exercise programs. Changes in patient care and exercise programs were implemented as a result of our finding of ischemia during the prescribed exercise.

Modeling of High-Quality Factor XNOR Gate Using Quantum-Dot Semiconductor Optical Amplifiers at 1 Tb/s

NASA Astrophysics Data System (ADS)

Kotb, Amer

2015-06-01

The modeling of all-optical logic XNOR gate is realized by a series combination of XOR and INVERT gates. This Boolean function is simulated by using Mach-Zehnder interferometers (MZIs) utilizing quantum-dots semiconductor optical amplifiers (QDs-SOAs). The study is carried out when the effect of amplified spontaneous emission (ASE) is included. The dependence of the output quality factor ( Q-factor) on signals and QDs-SOAs' parameters is also investigated and discussed. The simulation is conducted under a repetition rate of ˜1 Tb/s.

Computer Simulation Studies of Ion Channel Gating: Characteristics of the M2 Channel of Influenza-A Virus in a Phospholipid Bilayer

NASA Technical Reports Server (NTRS)

Schweighofer, Karl J.; Pohorille, Andrew; DeVincenzi, D. (Technical Monitor)

1999-01-01

The 25 amino acids long, transmembrane fragment of the Influenza virus M2 protein forms a homotetrameric channel that transports protons across lipid bilayers. It has been postulated that high efficiency and selectivity of this process is due to gating by four histidine residues that occlude the channel lumen in the closed state. Two mechanisms of gating have been postulated. In one mechanism, the proton is "shuttled" through the gate by attaching to the delta nitrogen atom on the extracellular side of the imidazole ring, followed by the release of the proton attached to the epsilon nitrogen atom on the opposite side. In the second mechanism, the four histidines move away from each other due to electrostatic repulsion upon protonation, thus opening the gate sufficiently that a wire of water molecules can penetrate the gate. Then, protons are transported by "hopping" along the wire. In this paper, both mechanisms are evaluated in a series of molecular dynamics simulations by investigating stability of different protonation states of the channel that are involved in these mechanisms. For the shuttle mechanism, these are states with all epsilon protonated histidines, one biprotonated residue or one histidine protonated in the delta position. For the gate opening mechanism, this is the state in which all four histidines are biprotonated. In addition, a state with two biprotonated histidines is considered. For each system, composed of the protein channel embedded in phospholipid bilayer located between two water lamellae, a molecular dynamics trajectory of approximately 1.3 ns (after equilibration) was obtained. It is found that the states involved in the shuttle mechanism are stable during the simulations. Furthermore, the orientations and dynamics of water molecules near the gate are conducive to proton transfers involved in the shuttle. In contract, the fully biprotonated state, implicated in the gate opening mechanism, is not stable and the channel looses its structural integrity. If only two histidines are biprotonated the channel deforms but remains intact with the gate mostly closed. In summary, the results of this study lend support to the shuttle mechanism but not to the gate opening mechanism of proton gating in M2.

Abrupt current switching in graphene bilayer tunnel transistors enabled by van Hove singularities.

PubMed

Alymov, Georgy; Vyurkov, Vladimir; Ryzhii, Victor; Svintsov, Dmitry

2016-04-21

In a continuous search for the energy-efficient electronic switches, a great attention is focused on tunnel field-effect transistors (TFETs) demonstrating an abrupt dependence of the source-drain current on the gate voltage. Among all TFETs, those based on one-dimensional (1D) semiconductors exhibit the steepest current switching due to the singular density of states near the band edges, though the current in 1D structures is pretty low. In this paper, we propose a TFET based on 2D graphene bilayer which demonstrates a record steep subthreshold slope enabled by van Hove singularities in the density of states near the edges of conduction and valence bands. Our simulations show the accessibility of 3.5 × 10(4) ON/OFF current ratio with 150 mV gate voltage swing, and a maximum subthreshold slope of (20 μV/dec)(-1) just above the threshold. The high ON-state current of 0.8 mA/μm is enabled by a narrow (~0.3 eV) extrinsic band gap, while the smallness of the leakage current is due to an all-electrical doping of the source and drain contacts which suppresses the band tailing and trap-assisted tunneling.

Triple pulse shape discrimination and capture-gated spectroscopy in a composite heterogeneous scintillator

NASA Astrophysics Data System (ADS)

Sharma, M.; Nattress, J.; Wilhelm, K.; Jovanovic, I.

2017-06-01

We demonstrate an all-solid-state design for a composite heterogeneous scintillation detector sensitive to interactions with high-energy photons (gammas), fast neutrons, and thermal neutrons. The scintillator exhibits triple pulse shape discrimination, effectively separating electron recoils, fast neutron recoils, and neutron captures. This is accomplished by combining the properties of two distinct scintillators, whereby a 51-mm diameter, 51-mm tall cylinder of pulse shape discriminating plastic is wrapped by a 320-μm thick sheet of 6LiF:ZnS(Ag), optically coupling the scintillators to each other and to the photomultiplier tube. In this way, the sensitivity to neutron captures is achieved without the need to load the plastic scintillator with a capture agent. We demonstrate a figure of merit of up to 1.2 for fast neutrons/gammas and 5.7 for thermal neutrons/gammas. Intrinsic capture efficiency is found to be 0.46±0.05% and is in good agreement with simulation, while gamma rejection was 10-6 with respect to the capture region and 10-4 with respect to the recoil region using a 300 keVee threshold. Finally, we show an improvement in capture-gated neutron spectroscopy by rejecting accidental gamma coincidences using pulse shape discrimination in the plastic scintillator.

Modeling of Dual Gate Material Hetero-dielectric Strained PNPN TFET for Improved ON Current

NASA Astrophysics Data System (ADS)

Kumari, Tripty; Saha, Priyanka; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-01-01

The tunnel field effect transistor (TFET) is considered to be a promising alternative device for future low-power VLSI circuits due to its steep subthreshold slope, low leakage current and its efficient performance at low supply voltage. However, the main challenging issue associated with realizing TFET for wide scale applications is its low ON current. To overcome this, a dual gate material with the concept of dielectric engineering has been incorporated into conventional TFET structure to tune the tunneling width at source-channel interface allowing significant flow of carriers. In addition to this, N+ pocket is implanted at source-channel junction of the proposed structure and the effect of strain is added for exploring the performance of the model in nanoscale regime. All these added features upgrade the device characteristics leading to higher ON current, low leakage and low threshold voltage. The present work derives the surface potential, electric field expression and drain current by solving 2D Poisson's equation at different boundary conditions. A comparative analysis of proposed model with conventional TFET has been done to establish the superiority of the proposed structure. All analytical results have been compared with the results obtained in SILVACO ATLAS device simulator to establish the accuracy of the derived analytical model.

Abrupt current switching in graphene bilayer tunnel transistors enabled by van Hove singularities

PubMed Central

Alymov, Georgy; Vyurkov, Vladimir; Ryzhii, Victor; Svintsov, Dmitry

2016-01-01

In a continuous search for the energy-efficient electronic switches, a great attention is focused on tunnel field-effect transistors (TFETs) demonstrating an abrupt dependence of the source-drain current on the gate voltage. Among all TFETs, those based on one-dimensional (1D) semiconductors exhibit the steepest current switching due to the singular density of states near the band edges, though the current in 1D structures is pretty low. In this paper, we propose a TFET based on 2D graphene bilayer which demonstrates a record steep subthreshold slope enabled by van Hove singularities in the density of states near the edges of conduction and valence bands. Our simulations show the accessibility of 3.5 × 104 ON/OFF current ratio with 150 mV gate voltage swing, and a maximum subthreshold slope of (20 μV/dec)−1 just above the threshold. The high ON-state current of 0.8 mA/μm is enabled by a narrow (~0.3 eV) extrinsic band gap, while the smallness of the leakage current is due to an all-electrical doping of the source and drain contacts which suppresses the band tailing and trap-assisted tunneling. PMID:27098051

Universal model of bias-stress-induced instability in inkjet-printed carbon nanotube networks field-effect transistors

NASA Astrophysics Data System (ADS)

Jung, Haesun; Choi, Sungju; Jang, Jun Tae; Yoon, Jinsu; Lee, Juhee; Lee, Yongwoo; Rhee, Jihyun; Ahn, Geumho; Yu, Hye Ri; Kim, Dong Myong; Choi, Sung-Jin; Kim, Dae Hwan

2018-02-01

We propose a universal model for bias-stress (BS)-induced instability in the inkjet-printed carbon nanotube (CNT) networks used in field-effect transistors (FETs). By combining two experimental methods, i.e., a comparison between air and vacuum BS tests and interface trap extraction, BS instability is explained regardless of either the BS polarity or ambient condition, using a single platform constituted by four key factors: OH- adsorption/desorption followed by a change in carrier concentration, electron concentration in CNT channel corroborated with H2O/O2 molecules in ambient, charge trapping/detrapping, and interface trap generation. Under negative BS (NBS), the negative threshold voltage shift (ΔVT) is dominated by OH- desorption, which is followed by hole trapping in the interface and/or gate insulator. Under positive BS (PBS), the positive ΔVT is dominated by OH- adsorption, which is followed by electron trapping in the interface and/or gate insulator. This instability is compensated by interface trap extraction; PBS instability is slightly more complicated than NBS instability. Furthermore, our model is verified using device simulation, which gives insights on how much each mechanism contributes to BS instability. Our result is potentially useful for the design of highly stable CNT-based flexible circuits in the Internet of Things wearable healthcare era.

Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

NASA Astrophysics Data System (ADS)

Lagger, P.; Steinschifter, P.; Reiner, M.; Stadtmüller, M.; Denifl, G.; Naumann, A.; Müller, J.; Wilde, L.; Sundqvist, J.; Pogany, D.; Ostermaier, C.

2014-07-01

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔVth, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness tD and barrier thickness tB, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔNit, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔNit is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

Visible-light-induced instability in amorphous metal-oxide based TFTs for transparent electronics

NASA Astrophysics Data System (ADS)

Ha, Tae-Jun

2014-10-01

We investigate the origin of visible-light-induced instability in amorphous metal-oxide based thin film transistors (oxide-TFTs) for transparent electronics by exploring the shift in threshold voltage (Vth). A large hysteresis window in amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs possessing large optical band-gap (≈3 eV) was observed in a visible-light illuminated condition whereas no hysteresis window was shown in a dark measuring condition. We also report the instability caused by photo irradiation and prolonged gate bias stress in oxide-TFTs. Larger Vth shift was observed after photo-induced stress combined with a negative gate bias than the sum of that after only illumination stress and only negative gate bias stress. Such results can be explained by trapped charges at the interface of semiconductor/dielectric and/or in the gate dielectric which play a role in a screen effect on the electric field applied by gate voltage, for which we propose that the localized-states-assisted transitions by visible-light absorption can be responsible.

Enhanced Performance of Gate-First p-Channel Metal-Insulator-Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

NASA Astrophysics Data System (ADS)

Kitano, Naomu; Horie, Shinya; Arimura, Hiroaki; Kawahara, Takaaki; Sakashita, Shinsuke; Nishida, Yukio; Yugami, Jiro; Minami, Takashi; Kosuda, Motomu; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2007-12-01

We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (Vth) were realized by reducing the carbon impurity in the gate stacks and improving the Vth stability against thermal treatment. As a result, we obtained superior current drivability (Ion = 350 μA/μm at Ioff = 200 pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

A 4H Silicon Carbide Gate Buffer for Integrated Power Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ericson, N; Frank, S; Britton, C

2014-02-01

A gate buffer fabricated in a 2-mu m 4H silicon carbide (SiC) process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics, simulation results, and directions for future improvement of this buffer are presented. In addition, plans for its incorporation into anmore » isolated high-side/low-side gate-driver architecture, fully integrated with power switching devices in a SiC process, are briefly discussed. This letter represents the first reported MOSFET-based gate buffer fabricated in 4H SiC.« less

SONOS Nonvolatile Memory Cell Programming Characteristics

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jermoumi, M; Cao, D; Housley, D

Purpose: In this study, we evaluated the performance of an Elekta linac in the delivery of gated radiotherapy. We examined whether the use of either a short gating window or a long beam hold impacts the accuracy of the delivery Methods: The performance of an Elekta linac in the delivery of gated radiotherapy was assessed using a 20cmX 20cm open field with the radiation delivered using a range of beam-on and beam-off time periods. Two SBRT plans were used to examine the accuracy of gated beam delivery for clinical treatment plans. For the SBRT cases, tests were performed for bothmore » free-breathing based gating and for gated delivery with a simulated breath-hold. A MatriXX 2D ion chamber array was used for data collection, and the gating accuracy was evaluated using gamma score. Results: For the 20cmX20cm open field, the gated beam delivery agreed closely with the non-gated delivery results. Discrepancies in the agreement, however, began to appear with a 5-to-1 ratio of the beam-off to beam-on. For these tight gating windows, each beam-on segment delivered a small number of monitor units. This finding was confirmed with dose distribution analysis from the delivery of the two VMAT plans where the gamma score(±1%,2%/1mm) showed passing rates in the range of 95% to 100% for gating windows of 25%, 38%, 50%, 63%, 75%, and 83%. Using a simulated sinusoidal breathing signal with a 4 second period, the gamma score of freebreathing gating and breath-hold gating deliveries were measured in the range of 95.7% to 100%. Conclusion: The results demonstrate that Elekta linacs can be used to accurately deliver respiratory gated treatments for both free-breathing and breath-hold patients. The accuracy of beams delivered in a gated delivery mode at low small MU proved higher than similar deliveries performed in a non-gated (manually interrupted) fashion.« less

Validation of the Monte Carlo simulator GATE for indium-111 imaging.

PubMed

Assié, K; Gardin, I; Véra, P; Buvat, I

2005-07-07

Monte Carlo simulations are useful for optimizing and assessing single photon emission computed tomography (SPECT) protocols, especially when aiming at measuring quantitative parameters from SPECT images. Before Monte Carlo simulated data can be trusted, the simulation model must be validated. The purpose of this work was to validate the use of GATE, a new Monte Carlo simulation platform based on GEANT4, for modelling indium-111 SPECT data, the quantification of which is of foremost importance for dosimetric studies. To that end, acquisitions of (111)In line sources in air and in water and of a cylindrical phantom were performed, together with the corresponding simulations. The simulation model included Monte Carlo modelling of the camera collimator and of a back-compartment accounting for photomultiplier tubes and associated electronics. Energy spectra, spatial resolution, sensitivity values, images and count profiles obtained for experimental and simulated data were compared. An excellent agreement was found between experimental and simulated energy spectra. For source-to-collimator distances varying from 0 to 20 cm, simulated and experimental spatial resolution differed by less than 2% in air, while the simulated sensitivity values were within 4% of the experimental values. The simulation of the cylindrical phantom closely reproduced the experimental data. These results suggest that GATE enables accurate simulation of (111)In SPECT acquisitions.

Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

NASA Astrophysics Data System (ADS)

Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

2018-04-01

We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

Simulation study of short-channel effects of tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Fukuda, Koichi; Asai, Hidehiro; Hattori, Junichi; Mori, Takahiro; Morita, Yukinori; Mizubayashi, Wataru; Masahara, Meishoku; Migita, Shinji; Ota, Hiroyuki; Endo, Kazuhiro; Matsukawa, Takashi

2018-04-01

Short-channel effects of tunnel field-effect transistors (FETs) are investigated in detail using simulations of a nonlocal band-to-band tunneling model. Discussion is limited to silicon. Several simulation scenarios were considered to address different effects, such as source overlap and drain offset effects. Adopting the drain offset to suppress the drain leakage current suppressed the short channel effects. The physical mechanism underlying the short-channel behavior of the tunnel FETs (TFETs) was very different from that of metal-oxide-semiconductor FETs (MOSFETs). The minimal gate lengths that do not lose on-state current by one order are shown to be 3 nm for single-gate structures and 2 nm for double gate structures, as determined from the drain offset structure.

Fermion-to-qubit mappings with varying resource requirements for quantum simulation

NASA Astrophysics Data System (ADS)

Steudtner, Mark; Wehner, Stephanie

2018-06-01

The mapping of fermionic states onto qubit states, as well as the mapping of fermionic Hamiltonian into quantum gates enables us to simulate electronic systems with a quantum computer. Benefiting the understanding of many-body systems in chemistry and physics, quantum simulation is one of the great promises of the coming age of quantum computers. Interestingly, the minimal requirement of qubits for simulating Fermions seems to be agnostic of the actual number of particles as well as other symmetries. This leads to qubit requirements that are well above the minimal requirements as suggested by combinatorial considerations. In this work, we develop methods that allow us to trade-off qubit requirements against the complexity of the resulting quantum circuit. We first show that any classical code used to map the state of a fermionic Fock space to qubits gives rise to a mapping of fermionic models to quantum gates. As an illustrative example, we present a mapping based on a nonlinear classical error correcting code, which leads to significant qubit savings albeit at the expense of additional quantum gates. We proceed to use this framework to present a number of simpler mappings that lead to qubit savings with a more modest increase in gate difficulty. We discuss the role of symmetries such as particle conservation, and savings that could be obtained if an experimental platform could easily realize multi-controlled gates.

Traps and Interface Fixed Charge Effects on a Solution-Processed n-Type Polymeric-Based Organic Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Hafsi, B.; Boubaker, A.; Guerin, D.; Lenfant, S.; Kalboussi, A.; Lmimouni, K.

2017-02-01

Organic field-effect transistors based on poly{[ N, N0- bis(2-octyldodecyl)- naphthalene-1,4,5,8- bis(dicarboximide)-2,6-diyl]-alt-5,50-(2,20-bithiophene)}, [P(NDI2OD-T2)n], were fabricated and characterized. The effect of octadecyltrichlorosilane (OTS) a self-assembled monolayer (SAM) grafted on to a SiO2 gate dielectric was investigated. A significant improvement of the charge mobility ( μ), up to 0.22 cm2/V s, was reached thanks to the OTS treatment. Modifying some technological parameters relating to fabrication, such as solvents, was also studied. We have analyzed the electrical properties of these thin-film transistors by using a two-dimensional drift-diffusion simulator, Integrated System Engineering-Technology Computer Aided Design (ISE-TCAD®). We studied the fixed surface charges at the organic semiconductor/oxide interface and the bulk traps effect. The dependence of the threshold voltage on the density and energy level of the trap states has also been considered. We finally found a good agreement between the output and transfer characteristics for experimental and simulated data.

Reliability investigation of high-k/metal gate in nMOSFETs by three-dimensional kinetic Monte-Carlo simulation with multiple trap interactions

NASA Astrophysics Data System (ADS)

Li, Yun; Jiang, Hai; Lun, Zhiyuan; Wang, Yijiao; Huang, Peng; Hao, Hao; Du, Gang; Zhang, Xing; Liu, Xiaoyan

2016-04-01

Degradation behaviors in the high-k/metal gate stacks of nMOSFETs are investigated by three-dimensional (3D) kinetic Monte-Carlo (KMC) simulation with multiple trap coupling. Novel microscopic mechanisms are simultaneously considered in a compound system: (1) trapping/detrapping from/to substrate/gate; (2) trapping/detrapping to other traps; (3) trap generation and recombination. Interacting traps can contribute to random telegraph noise (RTN), bias temperature instability (BTI), and trap-assisted tunneling (TAT). Simulation results show that trap interaction induces higher probability and greater complexity in trapping/detrapping processes and greatly affects the characteristics of RTN and BTI. Different types of trap distribution cause largely different behaviors of RTN, BTI, and TAT. TAT currents caused by multiple trap coupling are sensitive to the gate voltage. Moreover, trap generation and recombination have great effects on the degradation of HfO2-based nMOSFETs under a large stress.

Comparison of GATE/GEANT4 with EGSnrc and MCNP for electron dose calculations at energies between 15 keV and 20 MeV.

PubMed

Maigne, L; Perrot, Y; Schaart, D R; Donnarieix, D; Breton, V

2011-02-07

The GATE Monte Carlo simulation platform based on the GEANT4 toolkit has come into widespread use for simulating positron emission tomography (PET) and single photon emission computed tomography (SPECT) imaging devices. Here, we explore its use for calculating electron dose distributions in water. Mono-energetic electron dose point kernels and pencil beam kernels in water are calculated for different energies between 15 keV and 20 MeV by means of GATE 6.0, which makes use of the GEANT4 version 9.2 Standard Electromagnetic Physics Package. The results are compared to the well-validated codes EGSnrc and MCNP4C. It is shown that recent improvements made to the GEANT4/GATE software result in significantly better agreement with the other codes. We furthermore illustrate several issues of general interest to GATE and GEANT4 users who wish to perform accurate simulations involving electrons. Provided that the electron step size is sufficiently restricted, GATE 6.0 and EGSnrc dose point kernels are shown to agree to within less than 3% of the maximum dose between 50 keV and 4 MeV, while pencil beam kernels are found to agree to within less than 4% of the maximum dose between 15 keV and 20 MeV.

Development of a High-Fidelity Simulation Environment for Shadow-Mode Assessments of Air Traffic Concepts

NASA Technical Reports Server (NTRS)

Lee, Alan G.; Robinson, John E.; Lai, Chok Fung

2017-01-01

This paper will describe the purpose, architecture, and implementation of a gate-to-gate, high-fidelity air traffic simulation environment called the Shadow Mode Assessment using Realistic Technologies for the National Airspace System (SMART-NAS) Test Bed.The overarching purpose of the SMART-NAS Test Bed (SNTB) is to conduct high-fidelity, real-time, human-in-the-loop and automation-in-the-loop simulations of current and proposed future air traffic concepts for the Next Generation Air Transportation System of the United States, called NextGen. SNTB is intended to enable simulations that are currently impractical or impossible for three major areas of NextGen research and development: Concepts across multiple operational domains such as the gate-to-gate trajectory-based operations concept; Concepts related to revolutionary operations such as the seamless and widespread integration of large and small Unmanned Aerial System (UAS) vehicles throughout U.S. airspace; Real-time system-wide safety assurance technologies to allow safe, increasingly autonomous aviation operations. SNTB is primarily accessed through a web browser. A set of secure support services are provided to simplify all aspects of real-time, human-in-the-loop and automation-in-the-loop simulations from design (i.e., prior to execution) through analysis (i.e., after execution). These services include simulation architecture and asset configuration; scenario generation; command, control and monitoring; and analysis support.

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors

PubMed Central

2013-01-01

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric. PMID:23294730

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

PubMed

Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

2013-01-08

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

Gate bias stress stability under light irradiation for indium zinc oxide thin-film transistors based on anodic aluminium oxide gate dielectrics

NASA Astrophysics Data System (ADS)

Li, Min; Lan, Linfeng; Xu, Miao; Wang, Lei; Xu, Hua; Luo, Dongxiang; Zou, Jianhua; Tao, Hong; Yao, Rihui; Peng, Junbiao

2011-11-01

Thin-film transistors (TFTs) using indium zinc oxide as the active layer and anodic aluminium oxide (Al2O3) as the gate dielectric layer were fabricated. The device showed an electron mobility of as high as 10.1 cm2 V-1 s-1, an on/off current ratio of as high as ~108, and a turn-on voltage (Von) of only -0.5 V. Furthermore, this kind of TFTs was very stable under positive bias illumination stress. However, when the device experienced negative bias illumination stress, the threshold voltage shifted to the positive direction. It was found that the instability under negative bias illumination stress (NBIS) was due to the electrons from the Al gate trapping into the Al2O3 dielectric when exposed to the illuminated light. Using a stacked structure of Al2O3/SiO2 dielectrics, the device became more stable under NBIS.

Recent Radiation Test Results for Trench Power MOSFETs

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan C.; Wilcox, Edward P.; Phan, Anthony M.; Kim, Hak S.; Topper, Alyson D.; Ladbury, Raymond L.; Label, Kenneth A.

2017-01-01

Single-event effect (SEE) radiation test results are presented for various trench-gate power MOSFETs. The heavy-ion response of the first (and only) radiation-hardened trench-gate power MOSFET is evaluated: the manufacturer SEE response curve is verified and importantly, no localized dosing effects are measured, distinguishing it from other, non-hardened trench-gate power MOSFETs. Evaluations are made of n-type commercial and both n- and p-type automotive grade trench-gate device using ions comparable to of those on the low linear energy transfer (LET) side of the iron knee of the galactic cosmic ray spectrum, to explore suitability of these parts for missions with higher risk tolerance and shorter duration, such as CubeSats. Part-to-part variability of SEE threshold suggests testing with larger sample sizes and applying more aggressive derating to avoid on-orbit failures. The n-type devices yielded expected localized dosing effects including when irradiated in an unbiased (0-V) configuration, adding to the challenge of inserting these parts into space flight missions.

Accurate evaluation of fast threshold voltage shift for SiC MOS devices under various gate bias stress conditions

NASA Astrophysics Data System (ADS)

Sometani, Mitsuru; Okamoto, Mitsuo; Hatakeyama, Tetsuo; Iwahashi, Yohei; Hayashi, Mariko; Okamoto, Dai; Yano, Hiroshi; Harada, Shinsuke; Yonezawa, Yoshiyuki; Okumura, Hajime

2018-04-01

We investigated methods of measuring the threshold voltage (V th) shift of 4H-silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) under positive DC, negative DC, and AC gate bias stresses. A fast measurement method for V th shift under both positive and negative DC stresses revealed the existence of an extremely large V th shift in the short-stress-time region. We then examined the effect of fast V th shifts on drain current (I d) changes within a pulse under AC operation. The fast V th shifts were suppressed by nitridation. However, the I d change within one pulse occurred even in commercially available SiC MOSFETs. The correlation between I d changes within one pulse and V th shifts measured by a conventional method is weak. Thus, a fast and in situ measurement method is indispensable for the accurate evaluation of I d changes under AC operation.

Measurement-based quantum communication with resource states generated by entanglement purification

NASA Astrophysics Data System (ADS)

Wallnöfer, J.; Dür, W.

2017-01-01

We investigate measurement-based quantum communication with noisy resource states that are generated by entanglement purification. We consider the transmission of encoded information via noisy quantum channels using a measurement-based implementation of encoding, error correction, and decoding. We show that such an approach offers advantages over direct transmission, gate-based error correction, and measurement-based schemes with direct generation of resource states. We analyze the noise structure of resource states generated by entanglement purification and show that a local error model, i.e., noise acting independently on all qubits of the resource state, is a good approximation in general, and provides an exact description for Greenberger-Horne-Zeilinger states. The latter are resources for a measurement-based implementation of error-correction codes for bit-flip or phase-flip errors. This provides an approach to link the recently found very high thresholds for fault-tolerant measurement-based quantum information processing based on local error models for resource states with error thresholds for gate-based computational models.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

PubMed

Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

2016-08-10

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Cyclic-nucleotide–gated cation current and Ca2+-activated Cl current elicited by odorant in vertebrate olfactory receptor neurons

PubMed Central

Li, Rong-Chang; Ben-Chaim, Yair; Yau, King-Wai; Lin, Chih-Chun

2016-01-01

Olfactory transduction in vertebrate olfactory receptor neurons (ORNs) involves primarily a cAMP-signaling cascade that leads to the opening of cyclic-nucleotide–gated (CNG), nonselective cation channels. The consequent Ca2+ influx triggers adaptation but also signal amplification, the latter by opening a Ca2+-activated Cl channel (ANO2) to elicit, unusually, an inward Cl current. Hence the olfactory response has inward CNG and Cl components that are in rapid succession and not easily separable. We report here success in quantitatively separating these two currents with respect to amplitude and time course over a broad range of odorant strengths. Importantly, we found that the Cl current is the predominant component throughout the olfactory dose–response relation, down to the threshold of signaling to the brain. This observation is very surprising given a recent report by others that the olfactory-signal amplification effected by the Ca2+-activated Cl current does not influence the behavioral olfactory threshold in mice. PMID:27647918

A Low-Cost CMOS Programmable Temperature Switch

PubMed Central

Li, Yunlong; Wu, Nanjian

2008-01-01

A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature Tth can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature Tth variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 μm CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature Tths from 45—120°C with a 5°C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm2 and power consumption is 3.1 μA at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis. PMID:27879871

High-Threshold Low-Overhead Fault-Tolerant Classical Computation and the Replacement of Measurements with Unitary Quantum Gates.

PubMed

Cruikshank, Benjamin; Jacobs, Kurt

2017-07-21

von Neumann's classic "multiplexing" method is unique in achieving high-threshold fault-tolerant classical computation (FTCC), but has several significant barriers to implementation: (i) the extremely complex circuits required by randomized connections, (ii) the difficulty of calculating its performance in practical regimes of both code size and logical error rate, and (iii) the (perceived) need for large code sizes. Here we present numerical results indicating that the third assertion is false, and introduce a novel scheme that eliminates the two remaining problems while retaining a threshold very close to von Neumann's ideal of 1/6. We present a simple, highly ordered wiring structure that vastly reduces the circuit complexity, demonstrates that randomization is unnecessary, and provides a feasible method to calculate the performance. This in turn allows us to show that the scheme requires only moderate code sizes, vastly outperforms concatenation schemes, and under a standard error model a unitary implementation realizes universal FTCC with an accuracy threshold of p<5.5%, in which p is the error probability for 3-qubit gates. FTCC is a key component in realizing measurement-free protocols for quantum information processing. In view of this, we use our scheme to show that all-unitary quantum circuits can reproduce any measurement-based feedback process in which the asymptotic error probabilities for the measurement and feedback are (32/63)p≈0.51p and 1.51p, respectively.

Fast CNOT gate between two spatially separated atoms via shortcuts to adiabatic passage.

PubMed

Liang, Yan; Song, Chong; Ji, Xin; Zhang, Shou

2015-09-07

Quantum logic gate is indispensable to quantum computation. One of the important qubit operations is the quantum controlled-not (CNOT) gate that performs a NOT operation on a target qubit depending on the state of the control qubit. In this paper we present a scheme to realize the quantum CNOT gate between two spatially separated atoms via shortcuts to adiabatic passage. The influence of various decoherence processes on the fidelity is discussed. The strict numerical simulation results show that the fidelity for the CNOT gate is relatively high.

Effects of plasma-induced charging damage on random telegraph noise in metal-oxide-semiconductor field-effect transistors with SiO2 and high-k gate dielectrics

NASA Astrophysics Data System (ADS)

Kamei, Masayuki; Takao, Yoshinori; Eriguchi, Koji; Ono, Kouichi

2014-01-01

We clarified in this study how plasma-induced charging damage (PCD) affects the so-called “random telegraph noise (RTN)” — a principal concern in designing ultimately scaled large-scale integrated circuits (LSIs). Metal-oxide-semiconductor field-effect transistors (MOSFETs) with SiO2 and high-k gate dielectric were exposed to an inductively coupled plasma (ICP) with Ar gas. Drain current vs gate voltage (Ids-Vg) characteristics were obtained before and after the ICP plasma exposure for the same device. Then, the time evolution of Ids fluctuation defined as Ids/μIds was measured, where μIds is the mean Ids. This value corresponds to an RTN feature, and RTN was obtained under various gate voltages (Vg) by a customized measurement technique. We focused on the statistical distribution width of (Ids/μIds), δ(Ids/μIds), in order to clarify the effects of PCD on RTN. δ(Ids/μIds) was increased by PCD for both MOSFETs with the SiO2 and high-k gate dielectrics, suggesting that RTN can be used as a measure of PCD, i.e., a distribution width increase directly indicates the presence of PCD. The dependence of δ(Ids/μIds) on the overdrive voltage Vg-Vth, where Vth is the threshold voltage, was investigated by the present technique. It was confirmed that δ(Ids/μIds) increased with a decrease in the overdrive voltage for MOSFETs with the SiO2 and high-k gate dielectrics. The presence of created carrier trap sites with PCD was characterized by the time constants for carrier capture and emission. The threshold voltage shift (ΔVth) induced by PCD was also evaluated and compared with the RTN change, to correlate the RTN increase with ΔVth induced by PCD. Although the estimated time constants exhibited complex behaviors due to the nature of trap sites created by PCD, δ(Ids/μIds) showed a straightforward tendency in accordance with the amount of PCD. These findings provide an in-depth understanding of plasma-induced RTN characteristic changes in future MOSFETs.

Low-frequency noise reduction in vertical MOSFETs having tunable threshold voltage fabricated with 60 nm CMOS technology on 300 mm wafer process

NASA Astrophysics Data System (ADS)

Imamoto, Takuya; Ma, Yitao; Muraguchi, Masakazu; Endoh, Tetsuo

2015-04-01

In this paper, DC and low-frequency noise (LFN) characteristics have been investigated with actual measurement data in both n- and p-type vertical MOSFETs (V-MOSFETs) for the first time. The V-MOSFETs which was fabricated on 300 mm bulk silicon wafer process have realized excellent DC performance and a significant reduction of flicker (1/f) noise. The measurement results show that the fabricated V-MOSFETs with 60 nm silicon pillar and 100 nm gate length achieve excellent steep sub-threshold swing (69 mV/decade for n-type and 66 mV/decade for p-type), good on-current (281 µA/µm for n-type 149 µA/µm for p-type), low off-leakage current (28.1 pA/µm for n-type and 79.6 pA/µm for p-type), and excellent on-off ratio (1 × 107 for n-type and 2 × 106 for p-type). In addition, it is demonstrated that our fabricated V-MOSFETs can control the threshold voltage (Vth) by changing the channel doping condition, which is the useful and low-cost technique as it has been widely used in the conventional bulk planar MOSFET. This result indicates that V-MOSFETs can control Vth more finely and flexibly by the combined the use of the doping technique with other techniques such as work function engineering of metal-gate. Moreover, it is also shown that V-MOSFETs can suppress 1/f noise (L\\text{gate}WS\\text{Id}/I\\text{d}2 of 10-13-10-11 µm2/Hz for n-type and 10-12-10-10 µm2/Hz for p-type) to one or two order lower level than previously reported nanowire type MOSFET, FinFET, Tri-Gate, and planar MOSFETs. The results have also proved that both DC and 1/f noise performances are independent from the bias voltage which is applied to substrate or well layer. Therefore, it is verified that V-MOSFETs can eliminate the effects from substrate or well layer, which always adversely affects the circuit performances due to this serial connection.

GIDL analysis of the process variation effect in gate-all-around nanowire FET

NASA Astrophysics Data System (ADS)

Kim, Shinkeun; Seo, Youngsoo; Lee, Jangkyu; Kang, Myounggon; Shin, Hyungcheol

2018-02-01

In this paper, the gate-induced drain leakage (GIDL) is analyzed on gate-all-around (GAA) Nanowire FET (NW FET) with ellipse-shaped channel induced by process variation effect (PVE). The fabrication process of nanowire can lead to change the shape of channel cross section from circle to ellipse. The effect of distorted channel shape is investigated and verified by technology computer-aided design (TCAD) simulation in terms of the GIDL current. The simulation results demonstrate that the components of GIDL current are two mechanisms of longitudinal band-to-band tunneling (L-BTBT) at body/drain junction and transverse band-to-band tunneling (T-BTBT) at gate/drain junction. These two mechanisms are investigated on channel radius (rnw) and aspect ratio of ellipse-shape respectively and together.

Double gate impact ionization MOS transistor: Proposal and investigation

NASA Astrophysics Data System (ADS)

Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei

2017-02-01

In this paper, a double gate impact ionization MOS (DG-IMOS) transistor with improved performance is proposed and investigated by TCAD simulation. In the proposed design, a second gate is introduced in a conventional impact ionization MOS (IMOS) transistor that lengthens the equivalent channel length and suppresses the band-to-band tunneling. The OFF-state leakage current is reduced by over four orders of magnitude. At the ON-state, the second gate is negatively biased in order to enhance the electric field in the intrinsic region. As a result, the operating voltage does not increase with the increase in the channel length. The simulation result verifies that the proposed DG-IMOS achieves a better switching characteristic than the conventional is achieved. Lastly, the application of the DG-IMOS is discussed theoretically.

Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chun, Minkyu; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr

We investigated the effects of top gate voltage (V{sub TG}) and temperature (in the range of 25 to 70 {sup o}C) on dual-gate (DG) back-channel-etched (BCE) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) characteristics. The increment of V{sub TG} from -20V to +20V, decreases the threshold voltage (V{sub TH}) from 19.6V to 3.8V and increases the electron density to 8.8 x 10{sup 18}cm{sup −3}. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on V{sub TG}. At V{sub TG} of 20V, the mobility decreases from 19.1 to 15.4 cm{sup 2}/V ⋅ s with increasingmore » temperature, showing a metallic conduction. On the other hand, at V{sub TG} of - 20V, the mobility increases from 6.4 to 7.5cm{sup 2}/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.« less

Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

PubMed

Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

2015-01-14

Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

Side-gate modulation effects on high-quality BN-Graphene-BN nanoribbon capacitors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Yang; Chen, Xiaolong; Ye, Weiguang

High-quality BN-Graphene-BN nanoribbon capacitors with double side-gates of graphene have been experimentally realized. The double side-gates can effectively modulate the electronic properties of graphene nanoribbon capacitors. By applying anti-symmetric side-gate voltages, we observed significant upward shifting and flattening of the V-shaped capacitance curve near the charge neutrality point. Symmetric side-gate voltages, however, only resulted in tilted upward shifting along the opposite direction of applied gate voltages. These modulation effects followed the behavior of graphene nanoribbons predicted theoretically for metallic side-gate modulation. The negative quantum capacitance phenomenon predicted by numerical simulations for graphene nanoribbons modulated by graphene side-gates was not observed,more » possibly due to the weakened interactions between the graphene nanoribbon and side-gate electrodes caused by the Ga{sup +} beam etching process.« less

Comparison of level discrimination, increment detection, and comodulation masking release in the audio- and envelope-frequency domains

PubMed Central

Nelson, Paul C.; Ewert, Stephan D.; Carney, Laurel H.; Dau, Torsten

2008-01-01

In general, the temporal structure of stimuli must be considered to account for certain observations made in detection and masking experiments in the audio-frequency domain. Two such phenomena are (1) a heightened sensitivity to amplitude increments with a temporal fringe compared to gated level discrimination performance and (2) lower tone-in-noise detection thresholds using a modulated masker compared to those using an unmodulated masker. In the current study, translations of these two experiments were carried out to test the hypothesis that analogous cues might be used in the envelope-frequency domain. Pure-tone carrier amplitude-modulation (AM) depth-discrimination thresholds were found to be similar using both traditional gated stimuli and using a temporally modulated fringe for a fixed standard depth (ms=0.25) and a range of AM frequencies (4-64 Hz). In a second experiment, masked sinusoidal AM detection thresholds were compared in conditions with and without slow and regular fluctuations imposed on the instantaneous masker AM depth. Release from masking was obtained only for very slow masker fluctuations (less than 2 Hz). A physiologically motivated model that effectively acts as a first-order envelope change detector accounted for several, but not all, of the key aspects of the data. PMID:17471731

Unraveling the mechanism of ultraviolet-induced optical gating in Zn1-x Mg x O nanocrystal solid solution field effect transistors

NASA Astrophysics Data System (ADS)

Kim, Youngjun; Cho, Seongeun; Park, Byoungnam

2018-03-01

We report ultraviolet (UV)-induced optical gating in a Zn1-x Mg x O nanocrystal solid solution (NCSS) field effect transistor (FET) through a systematic study in which UV-induced charge transport properties are probed as a function of Mg composition. Change in the electrical properties of Zn1-x Mg x O NCSS associated with electronic traps is investigated by field effect-modulated current-voltage characteristic curves in the dark and under illumination. Under UV illumination, significant threshold voltage shift to a more negative value in an n-channel Zn1-x Mg x O NCSS FET is observed. Importantly, as the Mg composition increases, the effect of UV illumination on the threshold voltage shift is alleviated. We found that threshold voltage shift as a function of Mg composition in the dark and under illumination is due to difference in the deep trap density in the Zn1-x Mg x O NCSS. This is supported by Mg composition dependent photoluminescence intensity in the visible range and reduced FET mobility with Mg addition. The presence of the deep traps and the corresponding trap energy levels in the Zn1-x Mg x O NCSS are ensured by photoelectron spectroscopy in air.

Direct electronic probing of biological complexes formation

NASA Astrophysics Data System (ADS)

Macchia, Eleonora; Magliulo, Maria; Manoli, Kyriaki; Giordano, Francesco; Palazzo, Gerardo; Torsi, Luisa

2014-10-01

Functional bio-interlayer organic field - effect transistors (FBI-OFET), embedding streptavidin, avidin and neutravidin as bio-recognition element, have been studied to probe the electronic properties of protein complexes. The threshold voltage control has been achieved modifying the SiO2 gate diaelectric surface by means of the deposition of an interlayer of bio-recognition elements. A threshold voltage shift with respect to the unmodified dielectric surface toward more negative potential values has been found for the three different proteins, in agreement with their isoelectric points. The relative responses in terms of source - drain current, mobility and threshold voltage upon exposure to biotin of the FBI-OFET devices have been compared for the three bio-recognition elements.

Spin switches for compact implementation of neuron and synapse

NASA Astrophysics Data System (ADS)

Quang Diep, Vinh; Sutton, Brian; Behin-Aein, Behtash; Datta, Supriyo

2014-06-01

Nanomagnets driven by spin currents provide a natural implementation for a neuron and a synapse: currents allow convenient summation of multiple inputs, while the magnet provides the threshold function. The objective of this paper is to explore the possibility of a hardware neural network implementation using a spin switch (SS) as its basic building block. SS is a recently proposed device based on established technology with a transistor-like gain and input-output isolation. This allows neural networks to be constructed with purely passive interconnections without intervening clocks or amplifiers. The weights for the neural network are conveniently adjusted through analog voltages that can be stored in a non-volatile manner in an underlying CMOS layer using a floating gate low dropout voltage regulator. The operation of a multi-layer SS neural network designed for character recognition is demonstrated using a standard simulation model based on coupled Landau-Lifshitz-Gilbert equations, one for each magnet in the network.

Design of Energy Storage Management System Based on FPGA in Micro-Grid

NASA Astrophysics Data System (ADS)

Liang, Yafeng; Wang, Yanping; Han, Dexiao

2018-01-01

Energy storage system is the core to maintain the stable operation of smart micro-grid. Aiming at the existing problems of the energy storage management system in the micro-grid such as Low fault tolerance, easy to cause fluctuations in micro-grid, a new intelligent battery management system based on field programmable gate array is proposed : taking advantage of FPGA to combine the battery management system with the intelligent micro-grid control strategy. Finally, aiming at the problem that during estimation of battery charge State by neural network, initialization of weights and thresholds are not accurate leading to large errors in prediction results, the genetic algorithm is proposed to optimize the neural network method, and the experimental simulation is carried out. The experimental results show that the algorithm has high precision and provides guarantee for the stable operation of micro-grid.

Theoretical evaluation of two dimensional electron gas characteristics of quaternary AlxInyGa1-x-yN/GaN hetero-junctions

NASA Astrophysics Data System (ADS)

Rahbardar Mojaver, Hassan; Manouchehri, Farzin; Valizadeh, Pouya

2016-04-01

The two dimensional electron gas (2DEG) characteristics of gated metal-face wurtzite AlInGaN/GaN hetero-junctions including positions of subband energy levels, fermi energy level, and the 2DEG concentration as functions of physical and compositional properties of the hetero-junction (i.e., barrier thickness and metal mole-fractions) are theoretically evaluated using the variational method. The calculated values of the 2DEG concentration are in good agreement with the sparsely available experimental data reported in the literature. According to our simulation results, a considerable shift in the positive direction of threshold voltage of AlInGaN/GaN hetero-junction field-effect transistors can be achieved by engineering both the spontaneous and the piezoelectric polarizations using a quaternary AlInGaN barrier-layer of appropriate mole-fractions.

Investigation and statistical modeling of InAs-based double gate tunnel FETs for RF performance enhancement

NASA Astrophysics Data System (ADS)

Poorvasha, S.; Lakshmi, B.

2018-05-01

In this paper, RF performance analysis of InAs-based double gate (DG) tunnel field effect transistors (TFETs) is investigated in both qualitative and quantitative fashion. This investigation is carried out by varying the geometrical and doping parameters of TFETs to extract various RF parameters, unity gain cut-off frequency (f t), maximum oscillation frequency (f max), intrinsic gain and admittance (Y) parameters. An asymmetric gate oxide is introduced in the gate-drain overlap and compared with that of DG TFETs. Higher ON-current (I ON) of about 0.2 mA and less leakage current (I OFF) of 29 fA is achieved for DG TFET with gate-drain overlap. Due to increase in transconductance (g m), higher f t and intrinsic gain is attained for DG TFET with gate-drain overlap. Higher f max of 985 GHz is obtained for drain doping of 5 × 1017 cm‑3 because of the reduced gate-drain capacitance (C gd) with DG TFET with gate-drain overlap. In terms of Y-parameters, gate oxide thickness variation offers better performance due to the reduced values of C gd. A second order numerical polynomial model is generated for all the RF responses as a function of geometrical and doping parameters. The simulation results are compared with this numerical model where the predicted values match with the simulated values. Project supported by the Department of Science and Technology, Government of India under SERB Scheme (No. SERB/F/2660).

Advanced optical simulation of scintillation detectors in GATE V8.0: first implementation of a reflectance model based on measured data

NASA Astrophysics Data System (ADS)

Stockhoff, Mariele; Jan, Sebastien; Dubois, Albertine; Cherry, Simon R.; Roncali, Emilie

2017-06-01

Typical PET detectors are composed of a scintillator coupled to a photodetector that detects scintillation photons produced when high energy gamma photons interact with the crystal. A critical performance factor is the collection efficiency of these scintillation photons, which can be optimized through simulation. Accurate modelling of photon interactions with crystal surfaces is essential in optical simulations, but the existing UNIFIED model in GATE is often inaccurate, especially for rough surfaces. Previously a new approach for modelling surface reflections based on measured surfaces was validated using custom Monte Carlo code. In this work, the LUT Davis model is implemented and validated in GATE and GEANT4, and is made accessible for all users in the nuclear imaging research community. Look-up-tables (LUTs) from various crystal surfaces are calculated based on measured surfaces obtained by atomic force microscopy. The LUTs include photon reflection probabilities and directions depending on incidence angle. We provide LUTs for rough and polished surfaces with different reflectors and coupling media. Validation parameters include light output measured at different depths of interaction in the crystal and photon track lengths, as both parameters are strongly dependent on reflector characteristics and distinguish between models. Results from the GATE/GEANT4 beta version are compared to those from our custom code and experimental data, as well as the UNIFIED model. GATE simulations with the LUT Davis model show average variations in light output of  <2% from the custom code and excellent agreement for track lengths with R 2  >  0.99. Experimental data agree within 9% for relative light output. The new model also simplifies surface definition, as no complex input parameters are needed. The LUT Davis model makes optical simulations for nuclear imaging detectors much more precise, especially for studies with rough crystal surfaces. It will be available in GATE V8.0.

Characterization of high-dose and high-energy implanted gate and source diode and analysis of lateral spreading of p gate profile in high voltage SiC static induction transistors

NASA Astrophysics Data System (ADS)

Onose, Hidekatsu; Kobayashi, Yutaka; Onuki, Jin

2017-03-01

The effect of the p gate dose on the characteristics of the gate-source diode in SiC static induction transistors (SIT) was investigated. It was found that a dose of 1.5 × 1014 cm-2 yields a pn junction breakdown voltage higher than 60 V and good forward characteristics. A normally on SiC SIT was fabricated and demonstrated. A blocking voltage higher than 2.0 kV at a gate-source voltage of -50 V and on-resistance of 70 mΩ cm2 were obtained. Device simulations were performed to investigate the effect of the lateral spreading. By comparing the measured I-V curves with simulation results, the lateral spreading factor was estimated to be about 0.5. The lateral spreading detrimentally affected the electrical properties of the SIT made using implantations at energies higher than 1 MeV.

Validation of the SimSET simulation package for modeling the Siemens Biograph mCT PET scanner

NASA Astrophysics Data System (ADS)

Poon, Jonathan K.; Dahlbom, Magnus L.; Casey, Michael E.; Qi, Jinyi; Cherry, Simon R.; Badawi, Ramsey D.

2015-02-01

Monte Carlo simulation provides a valuable tool in performance assessment and optimization of system design parameters for PET scanners. SimSET is a popular Monte Carlo simulation toolkit that features fast simulation time, as well as variance reduction tools to further enhance computational efficiency. However, SimSET has lacked the ability to simulate block detectors until its most recent release. Our goal is to validate new features of SimSET by developing a simulation model of the Siemens Biograph mCT PET scanner and comparing the results to a simulation model developed in the GATE simulation suite and to experimental results. We used the NEMA NU-2 2007 scatter fraction, count rates, and spatial resolution protocols to validate the SimSET simulation model and its new features. The SimSET model overestimated the experimental results of the count rate tests by 11-23% and the spatial resolution test by 13-28%, which is comparable to previous validation studies of other PET scanners in the literature. The difference between the SimSET and GATE simulation was approximately 4-8% for the count rate test and approximately 3-11% for the spatial resolution test. In terms of computational time, SimSET performed simulations approximately 11 times faster than GATE simulations. The new block detector model in SimSET offers a fast and reasonably accurate simulation toolkit for PET imaging applications.

GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

2015-04-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

A novel thin-film transistor with step gate-overlapped lightly doped drain and raised source/drain design

NASA Astrophysics Data System (ADS)

Chien, Feng-Tso; Chen, Jian-Liang; Chen, Chien-Ming; Chen, Chii-Wen; Cheng, Ching-Hwa; Chiu, Hsien-Chin

2017-11-01

In this paper, a novel step gate-overlapped lightly doped drain (GOLDD) with raised source/drain (RSD) structure (SGORSD) is proposed for TFT electronic device application. The new SGORSD structure could obtain a low electric field at channel near the drain side owing to a step GOLDD design. Compared to the conventional device, the SGORSD TFT exhibits a better kink effect and higher breakdown performance due to the reduced drain electric field (D-EF). In addition, the leakage current also can be suppressed. Moreover, the device stability, such as the threshold voltage shift and drain current degradation under a high gate bias, is improved by the design of SGORSD structure. Therefore, this novel step GOLDD structure can be a promising design to be used in active-matrix flat panel electronics.

All-optical universal logic gates on nonlinear multimode interference coupler using tunable input intensity

NASA Astrophysics Data System (ADS)

Tajaldini, Mehdi; Jafri, Mohd Zubir Mat

2015-04-01

The theory of Nonlinear Modal Propagation Analysis Method (NMPA) have shown significant features of nonlinear multimode interference (MMI) coupler with compact dimension and when launched near the threshold of nonlinearity. Moreover, NMPA have the potential to allow studying the nonlinear MMI based the modal interference to explorer the phenomenon that what happen due to the natural of multimode region. Proposal of all-optical switch based NMPA has approved its capability to achieving the all-optical gates. All-optical gates have attracted increasing attention due to their practical utility in all-optical signal processing networks and systems. Nonlinear multimode interference devices could apply as universal all-optical gates due to significant features that NMPA introduce them. In this Paper, we present a novel Ultra-compact MMI coupler based on NMPA method in low intensity compared to last reports either as a novel design method and potential application for optical NAND, NOR as universal gates on single structure for Boolean logic signal processing devices and optimize their application via studding the contrast ratio between ON and OFF as a function of output width. We have applied NMPA for several applications so that the miniaturization in low nonlinear intensities is their main purpose.

Effect of nanocomposite gate-dielectric properties on pentacene microstructure and field-effect transistor characteristics.

PubMed

Lee, Wen-Hsi; Wang, Chun-Chieh

2010-02-01

In this study, the effect of surface energy and roughness of the nanocomposite gate dielectric on pentacene morphology and electrical properties of pentacene OTFT are reported. Nanoparticles TiO2 were added in the polyimide matrix to form a nanocomposite which has a significantly different surface characteristic from polyimide, leading to a discrepancy in the structural properties of pentacene growth. A growth mode of pentacene deposited on the nanocomposite is proposed to explain successfully the effect of surface properties of nanocomposite gate dielectric such as surface energy and roughness on the pentacene morphology and electrical properties of OTFT. To obtain the lower surface energy and smoother surface of nanocomposite gate dielectric that is responsible for the desired crystalline, microstructure of pentacene and electrical properties of device, a bottom contact OTFT-pentacene deposited on the double-layer nanocomposite gate dielectric consisting of top smoothing layer of the neat polyimide and bottom layer of (PI+ nano-TiO2 particles) nanocomposite has been successfully demonstrated to exhibit very promising performance including high current on to off ratio of about 6 x 10(5), threshold voltage of -10 V and moderately high filed mobility of 0.15 cm2V(-1)s(-1).

Factors responsible for remote-frequency masking in children and adultsa)

PubMed Central

Leibold, Lori J.; Buss, Emily

2016-01-01

Susceptibility to remote-frequency masking in children and adults was evaluated with respect to three stimulus features: (1) masker bandwidth, (2) spectral separation of the signal and masker, and (3) gated versus continuous masker presentation. Listeners were 4- to 6-year-olds, 7- to 10-year-olds, and adults. Detection thresholds for a 500-ms, 2000-Hz signal were estimated in quiet or presented with a band of noise in one of four frequency regions: 425–500 Hz, 4000–4075 Hz, 8000–8075 Hz, or 4000–10 000 Hz. In experiment 1, maskers were gated on in each 500-ms interval of a three-interval, forced-choice adaptive procedure. Masking was observed for all ages in all maskers, but the greatest masking was observed for the 4000–4075 Hz masker. These findings suggest that signal/masker spectral proximity plays an important role in remote-frequency masking, even when peripheral excitation associated with the signal and masker does not overlap. Younger children tended to have more masking than older children or adults, consistent with a reduced ability to segregate simultaneous sounds and/or listen in a frequency-selective manner. In experiment 2, detection thresholds were estimated in the same noises, but maskers were presented continuously. Masking was reduced for all ages relative to gated conditions, suggesting improved segregation and/or frequency-selective listening. PMID:28040030

Blending effect of 6,13-bis(triisopropylsilylethynyl) pentacene-graphene composite layers for flexible thin film transistors with a polymer gate dielectric.

PubMed

Basu, Sarbani; Adriyanto, Feri; Wang, Yeong-Her

2014-02-28

Solution processible poly(4-vinylphenol) is employed as a transistor dielectric material for low cost processing on flexible substrates at low temperatures. A 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene-graphene hybrid semiconductor is drop cast to fabricate bottom-gate and bottom-contact field-effect transistor devices on flexible and glass substrates under an ambient air environment. A few layers of graphene flakes increase the area in the conduction channel, and form bridge connections between the crystalline regions of the semiconductor layer which can change the surface morphology of TIPS pentacene films. The TIPS pentacene-graphene hybrid semiconductor-based organic thin film transistors (OTFTs) cross-linked with a poly(4-vinylphenol) gate dielectric exhibit an effective field-effect mobility of 0.076 cm(2) V(-1) s(-1) and a threshold voltage of -0.7 V at V(gs) = -40 V. By contrast, typical TIPS pentacene shows four times lower mobility of 0.019 cm(2) V(-1) s(-1) and a threshold voltage of 5 V. The graphene/TIPS pentacene hybrids presented in this paper can enhance the electrical characteristics of OTFTs due to their high crystallinity, uniform large-grain distribution, and effective reduction of crystal misorientation of the organic semiconductor layer, as confirmed by x-ray diffraction spectroscopy, atomic force microscopy, and optical microscopy studies.

Divalent cations potentiate TRPV1 channel by lowering the heat activation threshold

PubMed Central

Cao, Xu; Ma, Linlin; Yang, Fan

2014-01-01

Transient receptor potential vanilloid type 1 (TRPV1) channel responds to a wide spectrum of physical and chemical stimuli. In doing so, it serves as a polymodal cellular sensor for temperature change and pain. Many chemicals are known to strongly potentiate TRPV1 activation, though how this is achieved remains unclear. In this study we investigated the molecular mechanism underlying the gating effects of divalent cations Mg2+ and Ba2+. Using a combination of fluorescence imaging and patch-clamp analysis, we found that these cations potentiate TRPV1 gating by most likely promoting the heat activation process. Mg2+ substantially lowers the activation threshold temperature; as a result, a significant fraction of channels are heat-activated at room temperature. Although Mg2+ also potentiates capsaicin- and voltage-dependent activation, these processes were found either to be not required (in the case of capsaicin) or insufficient (in the case of voltage) to mediate the activating effect. In support of a selective effect on heat activation, Mg2+ and Ba2+ cause a Ca2+-independent desensitization that specifically prevents heat-induced channel activation but does not prevent capsaicin-induced activation. These results can be satisfactorily explained within an allosteric gating framework in which divalent cations strongly promote the heat-dependent conformational change or its coupling to channel activation, which is further coupled to the voltage- and capsaicin-dependent processes. PMID:24344247

Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

NASA Astrophysics Data System (ADS)

Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

2017-02-01

This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

Low-Voltage InGaZnO Thin Film Transistors with Small Sub-Threshold Swing.

PubMed

Cheng, C H; Chou, K I; Hsu, H H

2015-02-01

We demonstrate a low-voltage driven, indium-gallium-zinc oxide thin-film transistor using high-κ LaAlO3 gate dielectric. A low VT of 0.42 V, very small sub-threshold swing of 68 mV/dec, field-effect mobility of 4.1 cm2/Ns and low operation voltage of 1.4 V were reached simultaneously in LaAlO3/IGZO TFT device. This low-power and small SS TFT has the potential for fast switching speed and low power applications.

Realization of the three-qubit quantum controlled gate based on matching Hermitian generators

NASA Astrophysics Data System (ADS)

Gautam, Kumar; Rawat, Tarun Kumar; Parthasarathy, Harish; Sharma, Navneet; Upadhyaya, Varun

2017-05-01

This paper deals with the design of quantum unitary gate by matching the Hermitian generators. A given complicated quantum controlled gate is approximated by perturbing a simple quantum system with a small time-varying potential. The basic idea is to evaluate the generator H_φ of the perturbed system approximately using first-order perturbation theory in the interaction picture. H_φ depends on a modulating signal φ(t){:} 0≤t≤T which modulates a known potential V. The generator H_φ of the given gate U_g is evaluated using H_g=ι log U_g. The optimal modulating signal φ(t) is chosen so that \\Vert H_g - H_φ \\Vert is a minimum. The simple quantum system chosen for our simulation is harmonic oscillator with charge perturbed by an electric field that is a constant in space but time varying and is controlled externally. This is used to approximate the controlled unitary gate obtained by perturbing the oscillator with an anharmonic term proportional to q^3. Simulations results show significantly small noise-to-signal ratio. Finally, we discuss how the proposed method is particularly suitable for designing some commonly used unitary gates. Another example was chosen to illustrate this method of gate design is the ion-trap model.

An Integrated Gate Turnaround Management Concept Leveraging Big Data Analytics for NAS Performance Improvements

NASA Technical Reports Server (NTRS)

Chung, William W.; Ingram, Carla D.; Ahlquist, Douglas Kurt; Chachad, Girish H.

2016-01-01

"Gate Turnaround" plays a key role in the National Air Space (NAS) gate-to-gate performance by receiving aircraft when they reach their destination airport, and delivering aircraft into the NAS upon departing from the gate and subsequent takeoff. The time spent at the gate in meeting the planned departure time is influenced by many factors and often with considerable uncertainties. Uncertainties such as weather, early or late arrivals, disembarking and boarding passengers, unloading/reloading cargo, aircraft logistics/maintenance services and ground handling, traffic in ramp and movement areas for taxi-in and taxi-out, and departure queue management for takeoff are likely encountered on the daily basis. The Integrated Gate Turnaround Management (IGTM) concept is leveraging relevant historical data to support optimization of the gate operations, which include arrival, at the gate, departure based on constraints (e.g., available gates at the arrival, ground crew and equipment for the gate turnaround, and over capacity demand upon departure), and collaborative decision-making. The IGTM concept provides effective information services and decision tools to the stakeholders, such as airline dispatchers, gate agents, airport operators, ramp controllers, and air traffic control (ATC) traffic managers and ground controllers to mitigate uncertainties arising from both nominal and off-nominal airport gate operations. IGTM will provide NAS stakeholders customized decision making tools through a User Interface (UI) by leveraging historical data (Big Data), net-enabled Air Traffic Management (ATM) live data, and analytics according to dependencies among NAS parameters for the stakeholders to manage and optimize the NAS performance in the gate turnaround domain. The application will give stakeholders predictable results based on the past and current NAS performance according to selected decision trees through the UI. The predictable results are generated based on analysis of the unique airport attributes (e.g., runway, taxiway, terminal, and gate configurations and tenants), and combined statistics from past data and live data based on a specific set of ATM concept-of-operations (ConOps) and operational parameters via systems analysis using an analytic network learning model. The IGTM tool will then bound the uncertainties that arise from nominal and off-nominal operational conditions with direct assessment of the gate turnaround status and the impact of a certain operational decision on the NAS performance, and provide a set of recommended actions to optimize the NAS performance by allowing stakeholders to take mitigation actions to reduce uncertainty and time deviation of planned operational events. An IGTM prototype was developed at NASA Ames Simulation Laboratories (SimLabs) to demonstrate the benefits and applicability of the concept. A data network, using the System Wide Information Management (SWIM)-like messaging application using the ActiveMQ message service, was connected to the simulated data warehouse, scheduled flight plans, a fast-time airport simulator, and a graphic UI. A fast-time simulation was integrated with the data warehouse or Big Data/Analytics (BAI), scheduled flight plans from Aeronautical Operational Control AOC, IGTM Controller, and a UI via a SWIM-like data messaging network using the ActiveMQ message service, illustrated in Figure 1, to demonstrate selected use-cases showing the benefits of the IGTM concept on the NAS performance.

A modular design of molecular qubits to implement universal quantum gates

PubMed Central

Ferrando-Soria, Jesús; Moreno Pineda, Eufemio; Chiesa, Alessandro; Fernandez, Antonio; Magee, Samantha A.; Carretta, Stefano; Santini, Paolo; Vitorica-Yrezabal, Iñigo J.; Tuna, Floriana; Timco, Grigore A.; McInnes, Eric J.L.; Winpenny, Richard E.P.

2016-01-01

The physical implementation of quantum information processing relies on individual modules—qubits—and operations that modify such modules either individually or in groups—quantum gates. Two examples of gates that entangle pairs of qubits are the controlled NOT-gate (CNOT) gate, which flips the state of one qubit depending on the state of another, and the gate that brings a two-qubit product state into a superposition involving partially swapping the qubit states. Here we show that through supramolecular chemistry a single simple module, molecular {Cr7Ni} rings, which act as the qubits, can be assembled into structures suitable for either the CNOT or gate by choice of linker, and we characterize these structures by electron spin resonance spectroscopy. We introduce two schemes for implementing such gates with these supramolecular assemblies and perform detailed simulations, based on the measured parameters including decoherence, to demonstrate how the gates would operate. PMID:27109358

Hot-electron-induced hydrogen redistribution and defect generation in metal-oxide-semiconductor capacitors

NASA Astrophysics Data System (ADS)

Buchanan, D. A.; Marwick, A. D.; Dimaria, D. J.; Dori, L.

1994-09-01

Redistribution of hydrogen caused by hot-electron injection has been studied by hydrogen depth profiling with N-15 nuclear reaction analysis and electrical methods. Internal photoemission and Fowler-Nordheim injection were used for electron injection into large Al-gate and polysilicon-gate capacitors, respectively. A hydrogen-rich layer (about 10(exp 15) atoms/sq cm) observed at the Al/SiO2 interface was found to serve as the source of hydrogen during the hot-electron stress. A small fraction of the hydrogen released from this layer was found to be retrapped near the Si/SiO2 interface for large electron fluences in the Al-gate samples. Within the limit of detectability, about 10(exp 14)/sq cm, no hydrogen was measured using nuclear reaction analysis in the polysilicon-gate samples. The buildup of hydrogen at the Si/SiO2 interface exhibits a threshold at about 1 MV/cm, consistent with the threshold for electron heating in SiO2. In the 'wet' SiO2 films with purposely introduced excess hydrogen, the rate of hydrogen buildup at the Si/SiO2 interface is found to be significantly greater than that found in the 'dry' films. During electron injection, hydrogen redistribution was also confirmed via the deactivation of boron dopant in the silicon substrate. The generation rates of interface states, neutral electron traps, and anomalous positive charge are found to increase with increasing hydrogen buildup in the substrate and the initial hydrogen concentration in the film. It is concluded that the generation of defects is preceded by the hot-electron-induced release and transport of atomic hydrogen and it is the chemical reaction of this species within the metal-oxide-semiconductor structure that generates the electrically active defects.

Intermodulation distortion and linearity performance assessment of 50-nm gate length L-DUMGAC MOSFET for RFIC design

NASA Astrophysics Data System (ADS)

Chaujar, Rishu; Kaur, Ravneet; Saxena, Manoj; Gupta, Mridula; Gupta, R. S.

2008-08-01

The distortion and linearity behaviour of MOSFETs is imperative for low-noise applications and RFICs design. In this paper, an extensive study on the RF-distortion and linearity behaviour of Laterally Amalgamated DUal Material GAte Concave (L-DUMGAC) MOSFET is performed and the influence of technology variations such as gate length, negative junction depth (NJD), substrate bias, drain bias and gate material workfunction is explored using ATLAS device simulator. Simulation results reveal that L-DUMGAC MOSFET significantly enhances the linearity and intermodulation distortion performance in terms of figure of merit (FOM) metrics: V, V, IIP3, IMD3 and higher order transconductance coefficients: gm1, gm2, gm3, proving its efficacy for RFIC design. The work, thus, optimize the device's bias point for RFICs with higher efficiency and better linearity performance.

Optimal Dynamic Sub-Threshold Technique for Extreme Low Power Consumption for VLSI

NASA Technical Reports Server (NTRS)

Duong, Tuan A.

2012-01-01

For miniaturization of electronics systems, power consumption plays a key role in the realm of constraints. Considering the very large scale integration (VLSI) design aspect, as transistor feature size is decreased to 50 nm and below, there is sizable increase in the number of transistors as more functional building blocks are embedded in the same chip. However, the consequent increase in power consumption (dynamic and leakage) will serve as a key constraint to inhibit the advantages of transistor feature size reduction. Power consumption can be reduced by minimizing the voltage supply (for dynamic power consumption) and/or increasing threshold voltage (V(sub th), for reducing leakage power). When the feature size of the transistor is reduced, supply voltage (V(sub dd)) and threshold voltage (V(sub th)) are also reduced accordingly; then, the leakage current becomes a bigger factor of the total power consumption. To maintain low power consumption, operation of electronics at sub-threshold levels can be a potentially strong contender; however, there are two obstacles to be faced: more leakage current per transistor will cause more leakage power consumption, and slow response time when the transistor is operated in weak inversion region. To enable low power consumption and yet obtain high performance, the CMOS (complementary metal oxide semiconductor) transistor as a basic element is viewed and controlled as a four-terminal device: source, drain, gate, and body, as differentiated from the traditional approach with three terminals: i.e., source and body, drain, and gate. This technique features multiple voltage sources to supply the dynamic control, and uses dynamic control to enable low-threshold voltage when the channel (N or P) is active, for speed response enhancement and high threshold voltage, and when the transistor channel (N or P) is inactive, to reduce the leakage current for low-leakage power consumption.

niSWAP and NTCP gates realized in a circuit QED system

NASA Astrophysics Data System (ADS)

Essammouni, K.; Chouikh, A.; Said, T.; Bennai, M.

Based on superconducting qubit coupled to a resonator driven by a strong microwave field, we propose a method to implement two quantum logic gates (niSWAP and NTCP gates) of one qubit simultaneously controlling n qubits selected from N qubits in a circuit QED (1 < n < N) by introducing qubit-qubit interaction. The interaction between the qubits and the circuit QED can be achieved by tuning the gate voltage and the external flux. The operation times of the logic gates are much smaller than the decoherence time and dephasing time. Moreover, the numerical simulation under the influence of the gates operations shows that the scheme could be achieved efficiently with presently available techniques.

The use of dwell time cross-correlation functions to study single-ion channel gating kinetics.

PubMed Central

Ball, F G; Kerry, C J; Ramsey, R L; Sansom, M S; Usherwood, P N

1988-01-01

The derivation of cross-correlation functions from single-channel dwell (open and closed) times is described. Simulation of single-channel data for simple gating models, alongside theoretical treatment, is used to demonstrate the relationship of cross-correlation functions to underlying gating mechanisms. It is shown that time irreversibility of gating kinetics may be revealed in cross-correlation functions. Application of cross-correlation function analysis to data derived from the locust muscle glutamate receptor-channel provides evidence for multiple gateway states and time reversibility of gating. A model for the gating of this channel is used to show the effect of omission of brief channel events on cross-correlation functions. PMID:2462924

Respiratory gating during stereotactic body radiotherapy for lung cancer reduces tumor position variability.

PubMed

Saito, Tetsuo; Matsuyama, Tomohiko; Toya, Ryo; Fukugawa, Yoshiyuki; Toyofuku, Takamasa; Semba, Akiko; Oya, Natsuo

2014-01-01

We evaluated the effects of respiratory gating on treatment accuracy in lung cancer patients undergoing lung stereotactic body radiotherapy by using electronic portal imaging device (EPID) images. Our study population consisted of 30 lung cancer patients treated with stereotactic body radiotherapy (48 Gy/4 fractions/4 to 9 days). Of these, 14 were treated with- (group A) and 16 without gating (group B); typically the patients whose tumors showed three-dimensional respiratory motion ≧5 mm were selected for gating. Tumor respiratory motion was estimated using four-dimensional computed tomography images acquired during treatment simulation. Tumor position variability during all treatment sessions was assessed by measuring the standard deviation (SD) and range of tumor displacement on EPID images. The two groups were compared for tumor respiratory motion and position variability using the Mann-Whitney U test. The median three-dimensional tumor motion during simulation was greater in group A than group B (9 mm, range 3-30 mm vs. 2 mm, range 0-4 mm; p<0.001). In groups A and B the median SD of the tumor position was 1.1 mm and 0.9 mm in the craniocaudal- (p = 0.24) and 0.7 mm and 0.6 mm in the mediolateral direction (p = 0.89), respectively. The median range of the tumor position was 4.0 mm and 3.0 mm in the craniocaudal- (p = 0.21) and 2.0 mm and 1.5 mm in the mediolateral direction (p = 0.20), respectively. Although patients treated with respiratory gating exhibited greater respiratory tumor motion during treatment simulation, tumor position variability in the EPID images was low and comparable to patients treated without gating. This demonstrates the benefit of respiratory gating.

Positioning true coincidences that undergo inter-and intra-crystal scatter for a sub-mm resolution cadmium zinc telluride-based PET system

NASA Astrophysics Data System (ADS)

Abbaszadeh, Shiva; Chinn, Garry; Levin, Craig S.

2018-01-01

The kinematics of Compton scatter can be used to estimate the interaction sequence of inter-crystal scatter interactions in 3D position-sensitive cadmium zinc telluride (CZT) detectors. However, in the case of intra-crystal scatter in a ‘cross-strip’ CZT detector slab, multiple anode and cathode strips may be triggered, creating position ambiguity due to uncertainty in possible combinations of anode-cathode pairings. As a consequence, methods such as energy-weighted centroid are not applicable to position the interactions. In practice, since the event position is uncertain, these intra-crystal scatters events are discarded. In this work, we studied using Compton kinematics and a ‘direction difference angle’ to provide a method to correctly identify the anode-cathode pair corresponding to the first interaction position in an intra-crystal scatter event. GATE simulation studies of a NEMA NU4 image quality phantom in a small animal positron emission tomography under development composed of 192, 40~mm×40~mm×5 mm CZT crystals shows that 47% of total numbers of multiple-interaction photon events (MIPEs) are intra-crystal scatter with a 100 keV lower energy threshold per interaction. The sensitivity of the system increases from 0.6 to 4.10 (using 10 keV as system lower energy threshold) by including rather than discarding inter- and intra-crystal scatter. The contrast-to-noise ratio (CNR) also increases from 5.81+/-0.3 to 12.53+/-0.37 . It was shown that a higher energy threshold limits the capability of the system to detect MIPEs and reduces CNR. Results indicate a sensitivity increase (4.1 to 5.88) when raising the lower energy threshold (10 keV to 100 keV) for the case of only two-interaction events. In order to detect MIPEs accurately, a low noise system capable of a low energy threshold (10 keV) per interaction is desired.

Mutation of I696 and W697 in the TRP box of vanilloid receptor subtype I modulates allosteric channel activation.

PubMed

Gregorio-Teruel, Lucia; Valente, Pierluigi; González-Ros, José Manuel; Fernández-Ballester, Gregorio; Ferrer-Montiel, Antonio

2014-03-01

The transient receptor potential vanilloid receptor subtype I (TRPV1) channel acts as a polymodal sensory receptor gated by chemical and physical stimuli. Like other TRP channels, TRPV1 contains in its C terminus a short, conserved domain called the TRP box, which is necessary for channel gating. Substitution of two TRP box residues-I696 and W697-with Ala markedly affects TRPV1's response to all activating stimuli, which indicates that these two residues play a crucial role in channel gating. We systematically replaced I696 and W697 with 18 native l-amino acids (excluding cysteine) and evaluated the effect on voltage- and capsaicin-dependent gating. Mutation of I696 decreased channel activation by either voltage or capsaicin; furthermore, gating was only observed with substitution of hydrophobic amino acids. Substitution of W697 with any of the 18 amino acids abolished gating in response to depolarization alone, shifting the threshold to unreachable voltages, but not capsaicin-mediated gating. Moreover, vanilloid-activated responses of W697X mutants showed voltage-dependent gating along with a strong voltage-independent component. Analysis of the data using an allosteric model of activation indicates that mutation of I696 and W697 primarily affects the allosteric coupling constants of the ligand and voltage sensors to the channel pore. Together, our findings substantiate the notion that inter- and/or intrasubunit interactions at the level of the TRP box are critical for efficient coupling of stimulus sensing and gate opening. Perturbation of these interactions markedly reduces the efficacy and potency of the activating stimuli. Furthermore, our results identify these interactions as potential sites for pharmacological intervention.

Evaluation of stochastic differential equation approximation of ion channel gating models.

PubMed

Bruce, Ian C

2009-04-01

Fox and Lu derived an algorithm based on stochastic differential equations for approximating the kinetics of ion channel gating that is simpler and faster than "exact" algorithms for simulating Markov process models of channel gating. However, the approximation may not be sufficiently accurate to predict statistics of action potential generation in some cases. The objective of this study was to develop a framework for analyzing the inaccuracies and determining their origin. Simulations of a patch of membrane with voltage-gated sodium and potassium channels were performed using an exact algorithm for the kinetics of channel gating and the approximate algorithm of Fox & Lu. The Fox & Lu algorithm assumes that channel gating particle dynamics have a stochastic term that is uncorrelated, zero-mean Gaussian noise, whereas the results of this study demonstrate that in many cases the stochastic term in the Fox & Lu algorithm should be correlated and non-Gaussian noise with a non-zero mean. The results indicate that: (i) the source of the inaccuracy is that the Fox & Lu algorithm does not adequately describe the combined behavior of the multiple activation particles in each sodium and potassium channel, and (ii) the accuracy does not improve with increasing numbers of channels.

Thermally induced spin-dependent current based on Zigzag Germanene Nanoribbons

NASA Astrophysics Data System (ADS)

Majidi, Danial; Faez, Rahim

2017-02-01

In this paper, using first principle calculation and non-equilibrium Green's function, the thermally induced spin current in Hydrogen terminated Zigzag-edge Germanene Nanoribbon (ZGeNR-H) is investigated. In this model, because of the difference between the source and the drain temperature of ZGeNR device, the spin up and spin down currents flow in the opposite direction with two different threshold temperatures (Tth). Hence, a pure spin polarized current which belongs to spin down is obtained. It is shown that, for temperatures above the threshold temperature spin down current increases with the increasing temperature up to 75 K and then decreases. But spin up current rises steadily and in the high temperature we can obtain polarized spin up current. In addition, we show an acceptable spin current around the room temperature for ZGeNR. The transmission peaks in ZGeNR which are closer to the Fermi level rather than Zigzag Graphene Nanoribbon (ZGNRS) which causes ZGeNR to have spin current at higher temperatures. Finally, it is indicated that by tuning the back gate voltage, the spin current can be completely modulated and polarized. Simulation results verify the Zigzag Germanene Nanoribbon as a promising candidate for spin caloritronics devices, which can be applied in future low power consumption technology.

An adaptive tracker for ShipIR/NTCS

NASA Astrophysics Data System (ADS)

Ramaswamy, Srinivasan; Vaitekunas, David A.

2015-05-01

A key component in any image-based tracking system is the adaptive tracking algorithm used to segment the image into potential targets, rank-and-select the best candidate target, and the gating of the selected target to further improve tracker performance. This paper will describe a new adaptive tracker algorithm added to the naval threat countermeasure simulator (NTCS) of the NATO-standard ship signature model (ShipIR). The new adaptive tracking algorithm is an optional feature used with any of the existing internal NTCS or user-defined seeker algorithms (e.g., binary centroid, intensity centroid, and threshold intensity centroid). The algorithm segments the detected pixels into clusters, and the smallest set of clusters that meet the detection criterion is obtained by using a knapsack algorithm to identify the set of clusters that should not be used. The rectangular area containing the chosen clusters defines an inner boundary, from which a weighted centroid is calculated as the aim-point. A track-gate is then positioned around the clusters, taking into account the rate of change of the bounding area and compensating for any gimbal displacement. A sequence of scenarios is used to test the new tracking algorithm on a generic unclassified DDG ShipIR model, with and without flares, and demonstrate how some of the key seeker signals are impacted by both the ship and flare intrinsic signatures.

CADAT network translator

NASA Technical Reports Server (NTRS)

Pitts, E. R.

1981-01-01

Program converts cell-net data into logic-gate models for use in test and simulation programs. Input consists of either Place, Route, and Fold (PRF) or Place-and-Route-in-Two-Dimensions (PR2D) layout data deck. Output consists of either Test Pattern Generator (TPG) or Logic-Simulation (LOGSIM) logic circuitry data deck. Designer needs to build only logic-gate-model circuit description since program acts as translator. Language is FORTRAN IV.

Locating Anomalies in Complex Data Sets Using Visualization and Simulation

NASA Technical Reports Server (NTRS)

Panetta, Karen

2001-01-01

The research goals are to create a simulation framework that can accept any combination of models written at the gate or behavioral level. The framework provides the ability to fault simulate and create scenarios of experiments using concurrent simulation. In order to meet these goals we have had to fulfill the following requirements. The ability to accept models written in VHDL, Verilog or the C languages. The ability to propagate faults through any model type. The ability to create experiment scenarios efficiently without generating every possible combination of variables. The ability to accept adversity of fault models beyond the single stuck-at model. Major development has been done to develop a parser that can accept models written in various languages. This work has generated considerable attention from other universities and industry for its flexibility and usefulness. The parser uses LEXX and YACC to parse Verilog and C. We have also utilized our industrial partnership with Alternative System's Inc. to import vhdl into our simulator. For multilevel simulation, we needed to modify the simulator architecture to accept models that contained multiple outputs. This enabled us to accept behavioral components. The next major accomplishment was the addition of "functional fault models". Functional fault models change the behavior of a gate or model. For example, a bridging fault can make an OR gate behave like an AND gate. This has applications beyond fault simulation. This modeling flexibility will make the simulator more useful for doing verification and model comparison. For instance, two or more versions of an ALU can be comparatively simulated in a single execution. The results will show where and how the models differed so that the performance and correctness of the models may be evaluated. A considerable amount of time has been dedicated to validating the simulator performance on larger models provided by industry and other universities.

Cardiac-gated parametric images from 82 Rb PET from dynamic frames and direct 4D reconstruction.

PubMed

Germino, Mary; Carson, Richard E

2018-02-01

Cardiac perfusion PET data can be reconstructed as a dynamic sequence and kinetic modeling performed to quantify myocardial blood flow, or reconstructed as static gated images to quantify function. Parametric images from dynamic PET are conventionally not gated, to allow use of all events with lower noise. An alternative method for dynamic PET is to incorporate the kinetic model into the reconstruction algorithm itself, bypassing the generation of a time series of emission images and directly producing parametric images. So-called "direct reconstruction" can produce parametric images with lower noise than the conventional method because the noise distribution is more easily modeled in projection space than in image space. In this work, we develop direct reconstruction of cardiac-gated parametric images for 82 Rb PET with an extension of the Parametric Motion compensation OSEM List mode Algorithm for Resolution-recovery reconstruction for the one tissue model (PMOLAR-1T). PMOLAR-1T was extended to accommodate model terms to account for spillover from the left and right ventricles into the myocardium. The algorithm was evaluated on a 4D simulated 82 Rb dataset, including a perfusion defect, as well as a human 82 Rb list mode acquisition. The simulated list mode was subsampled into replicates, each with counts comparable to one gate of a gated acquisition. Parametric images were produced by the indirect (separate reconstructions and modeling) and direct methods for each of eight low-count and eight normal-count replicates of the simulated data, and each of eight cardiac gates for the human data. For the direct method, two initialization schemes were tested: uniform initialization, and initialization with the filtered iteration 1 result of the indirect method. For the human dataset, event-by-event respiratory motion compensation was included. The indirect and direct methods were compared for the simulated dataset in terms of bias and coefficient of variation as a function of iteration. Convergence of direct reconstruction was slow with uniform initialization; lower bias was achieved in fewer iterations by initializing with the filtered indirect iteration 1 images. For most parameters and regions evaluated, the direct method achieved the same or lower absolute bias at matched iteration as the indirect method, with 23%-65% lower noise. Additionally, the direct method gave better contrast between the perfusion defect and surrounding normal tissue than the indirect method. Gated parametric images from the human dataset had comparable relative performance of indirect and direct, in terms of mean parameter values per iteration. Changes in myocardial wall thickness and blood pool size across gates were readily visible in the gated parametric images, with higher contrast between myocardium and left ventricle blood pool in parametric images than gated SUV images. Direct reconstruction can produce parametric images with less noise than the indirect method, opening the potential utility of gated parametric imaging for perfusion PET. © 2017 American Association of Physicists in Medicine.

Unusual instability mode of transparent all oxide thin film transistor under dynamic bias condition

NASA Astrophysics Data System (ADS)

Oh, Himchan; Hwang, Chi-Sun; Pi, Jae-Eun; Ki Ryu, Min; Ko Park, Sang-Hee; Yong Chu, Hye

2013-09-01

We report a degradation behavior of fully transparent oxide thin film transistor under dynamic bias stress which is the condition similar to actual pixel switching operation in active matrix display. After the stress test, drain current increased while the threshold voltage was almost unchanged. We found that shortening of effective channel length is leading cause of increase in drain current. Electrons activate the neutral donor defects by colliding with them during short gate-on period. These ionized donors are stabilized during the subsequent gate-off period due to electron depletion. This local increase in doping density reduces the channel length.

Charge carrier mobility in thin films of organic semiconductors by the gated van der Pauw method

PubMed Central

Rolin, Cedric; Kang, Enpu; Lee, Jeong-Hwan; Borghs, Gustaaf; Heremans, Paul; Genoe, Jan

2017-01-01

Thin film transistors based on high-mobility organic semiconductors are prone to contact problems that complicate the interpretation of their electrical characteristics and the extraction of important material parameters such as the charge carrier mobility. Here we report on the gated van der Pauw method for the simple and accurate determination of the electrical characteristics of thin semiconducting films, independently from contact effects. We test our method on thin films of seven high-mobility organic semiconductors of both polarities: device fabrication is fully compatible with common transistor process flows and device measurements deliver consistent and precise values for the charge carrier mobility and threshold voltage in the high-charge carrier density regime that is representative of transistor operation. The gated van der Pauw method is broadly applicable to thin films of semiconductors and enables a simple and clean parameter extraction independent from contact effects. PMID:28397852

A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Edward Namkyu; Shin, Yong Hyeon; Yun, Ilgu, E-mail: iyun@yonsei.ac.kr

2014-11-07

A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulationmore » results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.« less

Electrostatic modulation of periodic potentials in a two-dimensional electron gas: From antidot lattice to quantum dot lattice

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goswami, Srijit; Aamir, Mohammed Ali; Shamim, Saquib

2013-12-04

We use a dual gated device structure to introduce a gate-tuneable periodic potential in a GaAs/AlGaAs two dimensional electron gas (2DEG). Using only a suitable choice of gate voltages we can controllably alter the potential landscape of the bare 2DEG, inducing either a periodic array of antidots or quantum dots. Antidots are artificial scattering centers, and therefore allow for a study of electron dynamics. In particular, we show that the thermovoltage of an antidot lattice is particularly sensitive to the relative positions of the Fermi level and the antidot potential. A quantum dot lattice, on the other hand, provides themore » opportunity to study correlated electron physics. We find that its current-voltage characteristics display a voltage threshold, as well as a power law scaling, indicative of collective Coulomb blockade in a disordered background.« less

Vacancy-fluorine complexes and their impact on the properties of metal-oxide transistors with high-k gate dielectrics studied using monoenergetic positron beams

NASA Astrophysics Data System (ADS)

Uedono, A.; Inumiya, S.; Matsuki, T.; Aoyama, T.; Nara, Y.; Ishibashi, S.; Ohdaira, T.; Suzuki, R.; Miyazaki, S.; Yamada, K.

2007-09-01

Vacancy-fluorine complexes in metal-oxide semiconductors (MOS) with high-k gate dielectrics were studied using a positron annihilation technique. F+ ions were implanted into Si substrates before the deposition of gate dielectrics (HfSiON). The shift of threshold voltage (Vth) in MOS capacitors and an increase in Fermi level position below the HfSiON/Si interface were observed after F+ implantation. Doppler broadening spectra of the annihilation radiation and positron lifetimes were measured before and after HfSiON fabrication processes. From a comparison between Doppler broadening spectra and those obtained by first-principles calculation, the major defect species in Si substrates after annealing treatment (1050 °C, 5 s) was identified as vacancy-fluorine complexes (V3F2). The origin of the Vth shift in the MOS capacitors was attributed to V3F2 located in channel regions.

Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

NASA Astrophysics Data System (ADS)

Liyana, V. P.; Stephania, A. M.; Shiju, K.; Predeep, P.

2015-06-01

Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (VT), on-off ratio (Ion/Ioff) and their comparative analysis is reported.

Interpreting anomalies observed in oxide semiconductor TFTs under negative and positive bias stress

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jin, Jong Woo; Nathan, Arokia, E-mail: an299@cam.ac.uk; Barquinha, Pedro

2016-08-15

Oxide semiconductor thin-film transistors can show anomalous behavior under bias stress. Two types of anomalies are discussed in this paper. The first is the shift in threshold voltage (V{sub TH}) in a direction opposite to the applied bias stress, and highly dependent on gate dielectric material. We attribute this to charge trapping/detrapping and charge migration within the gate dielectric. We emphasize the fundamental difference between trapping/detrapping events occurring at the semiconductor/dielectric interface and those occurring at gate/dielectric interface, and show that charge migration is essential to explain the first anomaly. We model charge migration in terms of the non-instantaneous polarizationmore » density. The second type of anomaly is negative V{sub TH} shift under high positive bias stress, with logarithmic evolution in time. This can be argued as electron-donating reactions involving H{sub 2}O molecules or derived species, with a reaction rate exponentially accelerated by positive gate bias and exponentially decreased by the number of reactions already occurred.« less

Gate insulator effects on the electrical performance of ZnO thin film transistor on a polyethersulphone substrate.

PubMed

Lee, Jae-Kyu; Choi, Duck-Kyun

2012-07-01

Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.

Protonic/electronic hybrid oxide transistor gated by chitosan and its full-swing low voltage inverter applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chao, Jin Yu; Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201; Zhu, Li Qiang, E-mail: lqzhu@nimte.ac.cn

Modulation of charge carrier density in condensed materials based on ionic/electronic interaction has attracted much attention. Here, protonic/electronic hybrid indium-zinc-oxide (IZO) transistors gated by chitosan based electrolyte were obtained. The chitosan-based electrolyte illustrates a high proton conductivity and an extremely strong proton gating behavior. The transistor illustrates good electrical performances at a low operating voltage of ∼1.0 V such as on/off ratio of ∼3 × 10{sup 7}, subthreshold swing of ∼65 mV/dec, threshold voltage of ∼0.3 V, and mobility of ∼7 cm{sup 2}/V s. Good positive gate bias stress stabilities are obtained. Furthermore, a low voltage driven resistor-loaded inverter was built by using an IZO transistor inmore » series with a load resistor, exhibiting a linear relationship between the voltage gain and the supplied voltage. The inverter is also used for decreasing noises of input signals. The protonic/electronic hybrid IZO transistors have potential applications in biochemical sensors and portable electronics.« less

TMEM150C/Tentonin3 Is a Regulator of Mechano-gated Ion Channels.

PubMed

Anderson, Evan O; Schneider, Eve R; Matson, Jon D; Gracheva, Elena O; Bagriantsev, Sviatoslav N

2018-04-17

Neuronal mechano-sensitivity relies on mechano-gated ion channels, but pathways regulating their activity remain poorly understood. TMEM150C was proposed to mediate mechano-activated current in proprioceptive neurons. Here, we studied functional interaction of TMEM150C with mechano-gated ion channels from different classes (Piezo2, Piezo1, and the potassium channel TREK-1) using two independent methods of mechanical stimulation. We found that TMEM150C significantly prolongs the duration of the mechano-current produced by all three channels, decreases apparent activation threshold in Piezo2, and induces persistent current in Piezo1. We also show that TMEM150C is co-expressed with Piezo2 in trigeminal neurons, expanding its role beyond proprioceptors. Finally, we cloned TMEM150C from the trigeminal neurons of the tactile-foraging domestic duck and showed that it functions similarly to the mouse ortholog, demonstrating evolutionary conservation among vertebrates. Our studies reveal TMEM150C as a general regulator of mechano-gated ion channels from different classes. Copyright © 2018 The Author(s). Published by Elsevier Inc. All rights reserved.

Ambipolar nonvolatile memory based on a quantum-dot transistor with a nanoscale floating gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Che, Yongli; Zhang, Yating, E-mail: yating@tju.edu.cn; Song, Xiaoxian

2016-07-04

Using only solution processing methods, we developed ambipolar quantum-dot (QD) transistor floating-gate memory (FGM) that uses Au nanoparticles as a floating gate. Because of the bipolarity of the active channel of PbSe QDs, the memory could easily trap holes or electrons in the floating gate by programming/erasing (P/E) operations, which could shift the threshold voltage both up and down. As a result, the memory exhibited good programmable memory characteristics: a large memory window (ΔV{sub th} ∼ 15 V) and a long retention time (>10{sup 5 }s). The magnitude of ΔV{sub th} depended on both P/E voltages and the bias voltage (V{sub DS}): ΔV{sub th}more » was a cubic function to V{sub P/E} and linearly depended on V{sub DS}. Therefore, this FGM based on a QD transistor is a promising alternative to its inorganic counterparts owing to its advantages of bipolarity, high mobility, low cost, and large-area production.« less

AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors using Sc2O3 as the gate oxide and surface passivation

NASA Astrophysics Data System (ADS)

Mehandru, R.; Luo, B.; Kim, J.; Ren, F.; Gila, B. P.; Onstine, A. H.; Abernathy, C. R.; Pearton, S. J.; Gotthold, D.; Birkhahn, R.; Peres, B.; Fitch, R.; Gillespie, J.; Jenkins, T.; Sewell, J.; Via, D.; Crespo, A.

2003-04-01

We demonstrated that Sc2O3 thin films deposited by plasma-assisted molecular-beam epitaxy can be used simultaneously as a gate oxide and as a surface passivation layer on AlGaN/GaN high electron mobility transistors (HEMTs). The maximum drain source current, IDS, reaches a value of over 0.8 A/mm and is ˜40% higher on Sc2O3/AlGaN/GaN transistors relative to conventional HEMTs fabricated on the same wafer. The metal-oxide-semiconductor HEMTs (MOS-HEMTs) threshold voltage is in good agreement with the theoretical value, indicating that Sc2O3 retains a low surface state density on the AlGaN/GaN structures and effectively eliminates the collapse in drain current seen in unpassivated devices. The MOS-HEMTs can be modulated to +6 V of gate voltage. In particular, Sc2O3 is a very promising candidate as a gate dielectric and surface passivant because it is more stable on GaN than is MgO.

A fluorescent combinatorial logic gate with Na+, H+-enabled OR and H+-driven low-medium-high ternary logic functions.

PubMed

Spiteri, Jasmine M A; Mallia, Carl J; Scerri, Glenn J; Magri, David C

2017-12-06

A novel fluorescent molecular logic gate with a 'fluorophore-spacer 1 -receptor 1 -spacer 2 -receptor 2 ' format is demonstrated in 1 : 1 (v/v) methanol/water. The molecule consists of an anthracene fluorophore, and tertiary alkyl amine and N-(2-methoxyphenyl)aza-15-crown-5 ether receptors. In the presence of threshold concentrations of H + and Na + , the molecule switches 'on' as an AND logic gate with a fluorescence quantum yield of 0.21 with proton and sodium binding constants of log β H+ = 9.0 and log β Na+ = 3.2, respectively. At higher proton levels, protonation also occurs at the anilinic nitrogen atom ether with a log β H+ = 4.2, which allows for Na + , H + -enabled OR (OR + AND circuit) and H + -driven ternary logic functions. The reported molecule is compared and contrasted to classic anthracene-based Na + and H + logic gates. We propose that such logic-based molecules could be useful tools for probing the vicinity of Na + , H + antiporters in biological systems.

Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.

PubMed

Bahar, Ali Newaz; Rahman, Mohammad Maksudur; Nahid, Nur Mohammad; Hassan, Md Kamrul

2017-02-01

This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T =2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.

Integrating respiratory gating into a megavoltage cone-beam CT system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang Jenghwa; Sillanpaa, Jussi; Ling, Clifton C.

2006-07-15

We have previously described a low-dose megavoltage cone beam computed tomography (MV CBCT) system capable of producing projection image using one beam pulse. In this study, we report on its integration with respiratory gating for gated radiotherapy. The respiratory gating system tracks a reflective marker on the patient's abdomen midway between the xiphoid and umbilicus, and disables radiation delivery when the marker position is outside predefined thresholds. We investigate two strategies for acquiring gated scans. In the continuous rotation-gated acquisition, the linear accelerator (LINAC) is set to the fixed x-ray mode and the gantry makes a 5 min, 360 deg.continuousmore » rotation, during which the gating system turns the radiation beam on and off, resulting in projection images with an uneven distribution of projection angles (e.g., in 70 arcs each covering 2 deg.). In the gated rotation-continuous acquisition, the LINAC is set to the dynamic arc mode, which suspends the gantry rotation when the gating system inhibits the beam, leading to a slightly longer (6-7 min) scan time, but yielding projection images with more evenly distributed projection angles (e.g., {approx}0.8 deg.between two consecutive projection angles). We have tested both data acquisition schemes on stationary (a contrast detail and a thoracic) phantoms and protocol lung patients. For stationary phantoms, a separate motion phantom not visible in the images is used to trigger the RPM system. Frame rate is adjusted so that approximately 450 images (13 MU) are acquired for each scan and three-dimensional tomographic images reconstructed using a Feldkamp filtered backprojection algorithm. The gated rotation-continuous acquisition yield reconstructions free of breathing artifacts. The tumor in parenchymal lung and normal tissues are easily discernible and the boundary between the diaphragm and the lung sharply defined. Contrast-to-noise ratio (CNR) is not degraded relative to nongated scans of stationary phantoms. The continuous rotation-gated acquisition scan also yields tomographic images with discernible anatomic features; however, streak artifacts are observed and CNR is reduced by approximately a factor of 4. In conclusion, we have successfully developed a gated MV CBCT system to verify the patient positioning for gated radiotherapy.« less

Anomalous radiation effects in fully depleted SOI MOSFETs fabricated on SIMOX

NASA Astrophysics Data System (ADS)

Li, Ying; Niu, Guofu; Cressler, J. D.; Patel, J.; Marshall, C. J.; Marshall, P. W.; Kim, H. S.; Reed, R. A.; Palmer, M. J.

2001-12-01

We investigate the proton tolerance of fully depleted silicon-on-insulator (SOI) MOSFETs with H-gate and regular-gate structural configurations. For the front-gate characteristics, the H-gate does not show the edge leakage observed in the regular-gate transistor. An anomalous kink in the back-gate linear I/sub D/-V/sub GS/ characteristics of the fully depleted SOI nFETs has been observed at high radiation doses. This kink is attributed to charged traps generated in the bandgap at the buried oxide/silicon film interface during irradiation. Extensive two-dimensional simulations with MEDICI were used to understand the physical origin of this kink. We also report unusual self-annealing effects in the devices when they are cooled to liquid nitrogen temperature.

Qubit Architecture with High Coherence and Fast Tunable Coupling.

PubMed

Chen, Yu; Neill, C; Roushan, P; Leung, N; Fang, M; Barends, R; Kelly, J; Campbell, B; Chen, Z; Chiaro, B; Dunsworth, A; Jeffrey, E; Megrant, A; Mutus, J Y; O'Malley, P J J; Quintana, C M; Sank, D; Vainsencher, A; Wenner, J; White, T C; Geller, Michael R; Cleland, A N; Martinis, John M

2014-11-28

We introduce a superconducting qubit architecture that combines high-coherence qubits and tunable qubit-qubit coupling. With the ability to set the coupling to zero, we demonstrate that this architecture is protected from the frequency crowding problems that arise from fixed coupling. More importantly, the coupling can be tuned dynamically with nanosecond resolution, making this architecture a versatile platform with applications ranging from quantum logic gates to quantum simulation. We illustrate the advantages of dynamical coupling by implementing a novel adiabatic controlled-z gate, with a speed approaching that of single-qubit gates. Integrating coherence and scalable control, the introduced qubit architecture provides a promising path towards large-scale quantum computation and simulation.

Improved scatterer property estimates from ultrasound backscatter for small gate lengths using a gate-edge correction factor

NASA Astrophysics Data System (ADS)

Oelze, Michael L.; O'Brien, William D.

2004-11-01

Backscattered rf signals used to construct conventional ultrasound B-mode images contain frequency-dependent information that can be examined through the backscattered power spectrum. The backscattered power spectrum is found by taking the magnitude squared of the Fourier transform of a gated time segment corresponding to a region in the scattering volume. When a time segment is gated, the edges of the gated regions change the frequency content of the backscattered power spectrum due to truncating of the waveform. Tapered windows, like the Hanning window, and longer gate lengths reduce the relative contribution of the gate-edge effects. A new gate-edge correction factor was developed that partially accounted for the edge effects. The gate-edge correction factor gave more accurate estimates of scatterer properties at small gate lengths compared to conventional windowing functions. The gate-edge correction factor gave estimates of scatterer properties within 5% of actual values at very small gate lengths (less than 5 spatial pulse lengths) in both simulations and from measurements on glass-bead phantoms. While the gate-edge correction factor gave higher accuracy of estimates at smaller gate lengths, the precision of estimates was not improved at small gate lengths over conventional windowing functions. .

Response of pMOS dosemeters on gamma-ray irradiation during its re-use.

PubMed

Pejovic, Milic M; Pejovic, Momcilo M; Jaksic, Aleksandar B

2013-08-01

Response of pMOS dosemeters during two successive irradiations with gamma-ray irradiation to a dose of 35 Gy and annealing at room and elevated temperature has been studied. The response was followed on the basis of threshold voltage shift, determined from transfer characteristics, as a function of absorbed dose or annealing time. It was shown that the threshold voltage shifts during first and second irradiation for the gate bias during irradiation of 5 and 2.5 V insignificantly differ although complete fading was not achieved after the first cycle of annealing. In order to analyse the defects formed in oxide and at the interface during irradiation and annealing, which are responsible for threshold voltage shift, midgap and charge-pumping techniques were used. It was shown that during first irradiation and annealing a dominant influence to threshold voltage shift is made by fixed oxide traps, while at the beginning of the second annealing cycle, threshold voltage shift is a consequence of both fixed oxide traps and slow switching traps.

Application of pentacene thin-film transistors with controlled threshold voltages to enhancement/depletion inverters

NASA Astrophysics Data System (ADS)

Takahashi, Hajime; Hanafusa, Yuki; Kimura, Yoshinari; Kitamura, Masatoshi

2018-03-01

Oxygen plasma treatment has been carried out to control the threshold voltage in organic thin-film transistors (TFTs) having a SiO2 gate dielectric prepared by rf sputtering. The threshold voltage linearly changed in the range of -3.7 to 3.1 V with the increase in plasma treatment time. Although the amount of change is smaller than that for organic TFTs having thermally grown SiO2, the tendency of the change was similar to that for thermally grown SiO2. To realize different plasma treatment times on the same substrate, a certain region on the SiO2 surface was selected using a shadow mask, and was treated with oxygen plasma. Using the process, organic TFTs with negative threshold voltages and those with positive threshold voltages were fabricated on the same substrate. As a result, enhancement/depletion inverters consisting of the organic TFTs operated at supply voltages of 5 to 15 V.

A combined coarse-grained and all-atom simulation of TRPV1 channel gating and heat activation

PubMed Central

Qin, Feng

2015-01-01

The transient receptor potential (TRP) channels act as key sensors of various chemical and physical stimuli in eukaryotic cells. Despite years of study, the molecular mechanisms of TRP channel activation remain unclear. To elucidate the structural, dynamic, and energetic basis of gating in TRPV1 (a founding member of the TRPV subfamily), we performed coarse-grained modeling and all-atom molecular dynamics (MD) simulation based on the recently solved high resolution structures of the open and closed form of TRPV1. Our coarse-grained normal mode analysis captures two key modes of collective motions involved in the TRPV1 gating transition, featuring a quaternary twist motion of the transmembrane domains (TMDs) relative to the intracellular domains (ICDs). Our transition pathway modeling predicts a sequence of structural movements that propagate from the ICDs to the TMDs via key interface domains (including the membrane proximal domain and the C-terminal domain), leading to sequential opening of the selectivity filter followed by the lower gate in the channel pore (confirmed by modeling conformational changes induced by the activation of ICDs). The above findings of coarse-grained modeling are robust to perturbation by lipids. Finally, our MD simulation of the ICD identifies key residues that contribute differently to the nonpolar energy of the open and closed state, and these residues are predicted to control the temperature sensitivity of TRPV1 gating. These computational predictions offer new insights to the mechanism for heat activation of TRPV1 gating, and will guide our future electrophysiology and mutagenesis studies. PMID:25918362

A new approach for design and investigation of junction-less tunnel FET using electrically doped mechanism

NASA Astrophysics Data System (ADS)

Nigam, Kaushal; Kondekar, Pravin; Sharma, Dheeraj; Raad, Bhagwan Ram

2016-10-01

For the first time, a distinctive approach based on electrically doped concept is used for the formation of novel double gate tunnel field effect transistor (TFET). For this, the initially heavily doped n+ substrate is converted into n+-i-n+-i (Drain-Channel-Source) by the selection of appropriate work functions of control gate (CG) and polarity gate (PG) as 4.7 eV. Further, the formation of p+ region for source is performed by applying -1.2 V at PG. Hence, the structure behave like a n+-i-n+-p+ gated TFET, whereas, the control gate is used to modulate the effective tunneling barrier width. The physical realization of delta doped n+ layer near to source region is a challenging task for improving the device performance in terms of ON current and subthreshold slope. So, the proposed work will provide a better platform for fabrication of n+-i-n+-p+ TFET with low cost and suppressed random dopant fluctuation (RDF) effects. ATLAS TCAD device simulator is used to carry out the simulation work.

Factors Affecting the Processing of Intensity in School-Aged Children

ERIC Educational Resources Information Center

Buss, Emily; Hall, Joseph W., III; Grose, John H.

2013-01-01

Purpose: Thresholds of school-aged children are elevated relative to those of adults for intensity discrimination and amplitude modulation (AM) detection. It is unclear how these findings are related or what role stimulus gating and dynamic envelope cues play in these results. Two experiments assessed the development of sensitivity to intensity…

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistors

NASA Technical Reports Server (NTRS)

Yamada, Toshishige; Biegel, Bryan (Technical Monitor)

2002-01-01

The threshold voltages of a carbon nanotube (CNT) field-effect transistor (FET) are derived and compared with those of the metal oxide-semiconductor (MOS) FETs. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, which is the CNT diameter direction, and this makes the CNTFET characteristics quite different from those in MOSFETs. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and it is shown that the familiar relations are still valid because of the macroscopic number of states available in the CNTs. This is in sharp contrast to the cases of quantum dots. Using these relations, we derive an inversion threshold voltage V(sub Ti) and an accumulation threshold voltage V(sub Ta) as a function of the Fermi level E(sub F) in the channel, where E(sub F) is a measure of channel doping. V(sub Ti) of the CNTFETs has a much stronger dependence than that of MOSFETs, while V(sub Ta)s of both CNTFETs and MOSFETs depend quite weakly on E(sub F) with the same functional form. This means the transition from normally-off mode to normally-on mode is much sharper in CNTFETs as the doping increases, and this property has to be taken into account in circuit design.

Units of rotational information

NASA Astrophysics Data System (ADS)

Yang, Yuxiang; Chiribella, Giulio; Hu, Qinheping

2017-12-01

Entanglement in angular momentum degrees of freedom is a precious resource for quantum metrology and control. Here we study the conversions of this resource, focusing on Bell pairs of spin-J particles, where one particle is used to probe unknown rotations and the other particle is used as reference. When a large number of pairs are given, we show that every rotated spin-J Bell state can be reversibly converted into an equivalent number of rotated spin one-half Bell states, at a rate determined by the quantum Fisher information. This result provides the foundation for the definition of an elementary unit of information about rotations in space, which we call the Cartesian refbit. In the finite copy scenario, we design machines that approximately break down Bell states of higher spins into Cartesian refbits, as well as machines that approximately implement the inverse process. In addition, we establish a quantitative link between the conversion of Bell states and the simulation of unitary gates, showing that the fidelity of probabilistic state conversion provides upper and lower bounds on the fidelity of deterministic gate simulation. The result holds not only for rotation gates, but also to all sets of gates that form finite-dimensional representations of compact groups. For rotation gates, we show how rotations on a system of given spin can simulate rotations on a system of different spin.

Single Event Effects Test Results for Advanced Field Programmable Gate Arrays

NASA Technical Reports Server (NTRS)

Allen, Gregory R.; Swift, Gary M.

2006-01-01

Reconfigurable Field Programmable Gate Arrays (FPGAs) from Altera and Actel and an FPGA-based quick-turnApplication Specific Integrated Circuit (ASIC) from Altera were subjected to single-event testing using heavy ions. Both Altera devices (Stratix II and HardCopy II) exhibited a low latchup threshold (below an LET of 3 MeV-cm2/mg) and thus are not recommended for applications in the space radiation environment. The flash-based Actel ProASIC Plus device did not exhibit latchup to an effective LET of 75 MeV-cm2/mg at room temperature. In addition, these tests did not show flash cell charge loss (upset) or retention damage. Upset characterization of the design-level flip-flops yielded an LET threshold below 10 MeV-cm2/mg and a high LET cross section of about lxlO-6 cm2/bit for storing ones and about lxl0-7 cm2/bit for storing zeros . Thus, the ProASIC device may be suitable for critical flight applications with appropriate triple modular redundancy mitigation techniques.

Tuning Piezo ion channels to detect molecular-scale movements relevant for fine touch

PubMed Central

Poole, Kate; Herget, Regina; Lapatsina, Liudmila; Ngo, Ha-Duong; Lewin, Gary R.

2014-01-01

In sensory neurons, mechanotransduction is sensitive, fast and requires mechanosensitive ion channels. Here we develop a new method to directly monitor mechanotransduction at defined regions of the cell-substrate interface. We show that molecular-scale (~13 nm) displacements are sufficient to gate mechanosensitive currents in mouse touch receptors. Using neurons from knockout mice, we show that displacement thresholds increase by one order of magnitude in the absence of stomatin-like protein 3 (STOML3). Piezo1 is the founding member of a class of mammalian stretch-activated ion channels, and we show that STOML3, but not other stomatin-domain proteins, brings the activation threshold for Piezo1 and Piezo2 currents down to ~10 nm. Structure–function experiments localize the Piezo modulatory activity of STOML3 to the stomatin domain, and higher-order scaffolds are a prerequisite for function. STOML3 is the first potent modulator of Piezo channels that tunes the sensitivity of mechanically gated channels to detect molecular-scale stimuli relevant for fine touch. PMID:24662763

Development and Validation of a Monte Carlo Simulation Tool for Multi-Pinhole SPECT

PubMed Central

Mok, Greta S. P.; Du, Yong; Wang, Yuchuan; Frey, Eric C.; Tsui, Benjamin M. W.

2011-01-01

Purpose In this work, we developed and validated a Monte Carlo simulation (MCS) tool for investigation and evaluation of multi-pinhole (MPH) SPECT imaging. Procedures This tool was based on a combination of the SimSET and MCNP codes. Photon attenuation and scatter in the object, as well as penetration and scatter through the collimator detector, are modeled in this tool. It allows accurate and efficient simulation of MPH SPECT with focused pinhole apertures and user-specified photon energy, aperture material, and imaging geometry. The MCS method was validated by comparing the point response function (PRF), detection efficiency (DE), and image profiles obtained from point sources and phantom experiments. A prototype single-pinhole collimator and focused four- and five-pinhole collimators fitted on a small animal imager were used for the experimental validations. We have also compared computational speed among various simulation tools for MPH SPECT, including SimSET-MCNP, MCNP, SimSET-GATE, and GATE for simulating projections of a hot sphere phantom. Results We found good agreement between the MCS and experimental results for PRF, DE, and image profiles, indicating the validity of the simulation method. The relative computational speeds for SimSET-MCNP, MCNP, SimSET-GATE, and GATE are 1: 2.73: 3.54: 7.34, respectively, for 120-view simulations. We also demonstrated the application of this MCS tool in small animal imaging by generating a set of low-noise MPH projection data of a 3D digital mouse whole body phantom. Conclusions The new method is useful for studying MPH collimator designs, data acquisition protocols, image reconstructions, and compensation techniques. It also has great potential to be applied for modeling the collimator-detector response with penetration and scatter effects for MPH in the quantitative reconstruction method. PMID:19779896

A parallel computational model for GATE simulations.

PubMed

Rannou, F R; Vega-Acevedo, N; El Bitar, Z

2013-12-01

GATE/Geant4 Monte Carlo simulations are computationally demanding applications, requiring thousands of processor hours to produce realistic results. The classical strategy of distributing the simulation of individual events does not apply efficiently for Positron Emission Tomography (PET) experiments, because it requires a centralized coincidence processing and large communication overheads. We propose a parallel computational model for GATE that handles event generation and coincidence processing in a simple and efficient way by decentralizing event generation and processing but maintaining a centralized event and time coordinator. The model is implemented with the inclusion of a new set of factory classes that can run the same executable in sequential or parallel mode. A Mann-Whitney test shows that the output produced by this parallel model in terms of number of tallies is equivalent (but not equal) to its sequential counterpart. Computational performance evaluation shows that the software is scalable and well balanced. Copyright © 2013 Elsevier Ireland Ltd. All rights reserved.

Simulating the Activation of Voltage Sensing Domain for a Voltage-Gated Sodium Channel Using Polarizable Force Field.

PubMed

Sun, Rui-Ning; Gong, Haipeng

2017-03-02

Voltage-gated sodium (Na V ) channels play vital roles in the signal transduction of excitable cells. Upon activation of a Na V channel, the change of transmembrane voltage triggers conformational change of the voltage sensing domain, which then elicits opening of the pore domain and thus allows an influx of Na + ions. Description of this process with atomistic details is in urgent demand. In this work, we simulated the partial activation process of the voltage sensing domain of a prokaryotic Na V channel using a polarizable force field. We not only observed the conformational change of the voltage sensing domain from resting to preactive state, but also rigorously estimated the free energy profile along the identified reaction pathway. Comparison with the control simulation using an additive force field indicates that voltage-gating thermodynamics of Na V channels may be inaccurately described without considering the electrostatic polarization effect.

Photocurrent Suppression of Transparent Organic Thin Film Transistors

NASA Astrophysics Data System (ADS)

Chuang, Chiao-Shun; Tsai, Shu-Ting; Lin, Yung-Sheng; Chen, Fang-Chung; Shieh, Hang-Ping D.

2007-12-01

Organic thin-film transistors (OTFTs) with high transmittance and low photosensitivity have been demonstrated. By using titanium dioxide nanoparticles as the additives in the polymer gate insulators, the level of device photoresponse has been reduced. The device shows simultaneously a high transparence and a minimal threshold voltage shift under white light illumination. It is inferred that the localized energy levels deep in the energy gap of pentacene behave as the recombination centers, enhancing substantially the recombination process in the conducting channel of the OTFTs. Therefore, the electron trapping is relieved and the shift of threshold voltage is reduced upon illumination.

SU-E-T-254: Optimization of GATE and PHITS Monte Carlo Code Parameters for Uniform Scanning Proton Beam Based On Simulation with FLUKA General-Purpose Code

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kurosu, K; Department of Medical Physics ' Engineering, Osaka University Graduate School of Medicine, Osaka; Takashina, M

Purpose: Monte Carlo codes are becoming important tools for proton beam dosimetry. However, the relationships between the customizing parameters and percentage depth dose (PDD) of GATE and PHITS codes have not been reported which are studied for PDD and proton range compared to the FLUKA code and the experimental data. Methods: The beam delivery system of the Indiana University Health Proton Therapy Center was modeled for the uniform scanning beam in FLUKA and transferred identically into GATE and PHITS. This computational model was built from the blue print and validated with the commissioning data. Three parameters evaluated are the maximummore » step size, cut off energy and physical and transport model. The dependence of the PDDs on the customizing parameters was compared with the published results of previous studies. Results: The optimal parameters for the simulation of the whole beam delivery system were defined by referring to the calculation results obtained with each parameter. Although the PDDs from FLUKA and the experimental data show a good agreement, those of GATE and PHITS obtained with our optimal parameters show a minor discrepancy. The measured proton range R90 was 269.37 mm, compared to the calculated range of 269.63 mm, 268.96 mm, and 270.85 mm with FLUKA, GATE and PHITS, respectively. Conclusion: We evaluated the dependence of the results for PDDs obtained with GATE and PHITS Monte Carlo generalpurpose codes on the customizing parameters by using the whole computational model of the treatment nozzle. The optimal parameters for the simulation were then defined by referring to the calculation results. The physical model, particle transport mechanics and the different geometrybased descriptions need accurate customization in three simulation codes to agree with experimental data for artifact-free Monte Carlo simulation. This study was supported by Grants-in Aid for Cancer Research (H22-3rd Term Cancer Control-General-043) from the Ministry of Health, Labor and Welfare of Japan, Grants-in-Aid for Scientific Research (No. 23791419), and JSPS Core-to-Core program (No. 23003). The authors have no conflict of interest.« less

Interplay between low threshold voltage-gated K+ channels and synaptic inhibition in neurons of the chicken nucleus laminaris along its frequency axis

PubMed Central

Hamlet, William R.; Liu, Yu-Wei; Tang, Zheng-Quan; Lu, Yong

2014-01-01

Central auditory neurons that localize sound in horizontal space have specialized intrinsic and synaptic cellular mechanisms to tightly control the threshold and timing for action potential generation. However, the critical interplay between intrinsic voltage-gated conductances and extrinsic synaptic conductances in determining neuronal output are not well understood. In chicken, neurons in the nucleus laminaris (NL) encode sound location using interaural time difference (ITD) as a cue. Along the tonotopic axis of NL, there exist robust differences among low, middle, and high frequency (LF, MF, and HF, respectively) neurons in a variety of neuronal properties such as low threshold voltage-gated K+ (LTK) channels and depolarizing inhibition. This establishes NL as an ideal model to examine the interactions between LTK currents and synaptic inhibition across the tonotopic axis. Using whole-cell patch clamp recordings prepared from chicken embryos (E17–E18), we found that LTK currents were larger in MF and HF neurons than in LF neurons. Kinetic analysis revealed that LTK currents in MF neurons activated at lower voltages than in LF and HF neurons, whereas the inactivation of the currents was similar across the tonotopic axis. Surprisingly, blockade of LTK currents using dendrotoxin-I (DTX) tended to broaden the duration and increase the amplitude of the depolarizing inhibitory postsynaptic potentials (IPSPs) in NL neurons without dependence on coding frequency regions. Analyses of the effects of DTX on inhibitory postsynaptic currents led us to interpret this unexpected observation as a result of primarily postsynaptic effects of LTK currents on MF and HF neurons, and combined presynaptic and postsynaptic effects in LF neurons. Furthermore, DTX transferred subthreshold IPSPs to spikes. Taken together, the results suggest a critical role for LTK currents in regulating inhibitory synaptic strength in ITD-coding neurons at various frequencies. PMID:24904297

Interplay between low threshold voltage-gated K(+) channels and synaptic inhibition in neurons of the chicken nucleus laminaris along its frequency axis.

PubMed

Hamlet, William R; Liu, Yu-Wei; Tang, Zheng-Quan; Lu, Yong

2014-01-01

Central auditory neurons that localize sound in horizontal space have specialized intrinsic and synaptic cellular mechanisms to tightly control the threshold and timing for action potential generation. However, the critical interplay between intrinsic voltage-gated conductances and extrinsic synaptic conductances in determining neuronal output are not well understood. In chicken, neurons in the nucleus laminaris (NL) encode sound location using interaural time difference (ITD) as a cue. Along the tonotopic axis of NL, there exist robust differences among low, middle, and high frequency (LF, MF, and HF, respectively) neurons in a variety of neuronal properties such as low threshold voltage-gated K(+) (LTK) channels and depolarizing inhibition. This establishes NL as an ideal model to examine the interactions between LTK currents and synaptic inhibition across the tonotopic axis. Using whole-cell patch clamp recordings prepared from chicken embryos (E17-E18), we found that LTK currents were larger in MF and HF neurons than in LF neurons. Kinetic analysis revealed that LTK currents in MF neurons activated at lower voltages than in LF and HF neurons, whereas the inactivation of the currents was similar across the tonotopic axis. Surprisingly, blockade of LTK currents using dendrotoxin-I (DTX) tended to broaden the duration and increase the amplitude of the depolarizing inhibitory postsynaptic potentials (IPSPs) in NL neurons without dependence on coding frequency regions. Analyses of the effects of DTX on inhibitory postsynaptic currents led us to interpret this unexpected observation as a result of primarily postsynaptic effects of LTK currents on MF and HF neurons, and combined presynaptic and postsynaptic effects in LF neurons. Furthermore, DTX transferred subthreshold IPSPs to spikes. Taken together, the results suggest a critical role for LTK currents in regulating inhibitory synaptic strength in ITD-coding neurons at various frequencies.

Analysis of low-offset CTIA amplifier for small-size-pixel infrared focal plane array

NASA Astrophysics Data System (ADS)

Zhang, Xue; Huang, Zhangcheng; Shao, Xiumei

2014-11-01

The design of input stage amplifier becomes more and more difficult as the expansion of format arrays and reduction of pixel size. A design method of low-offset amplifier based on 0.18-μm process used in small-size pixel is analyzed in order to decrease the dark signal of extended wavelength InGaAs infrared focal plane arrays (IRFPA). Based on an example of a cascode operational amplifier (op-amp), the relationship between input offset voltage and size of each transistor is discussed through theoretical analysis and Monte Carlo simulation. The results indicate that input transistors and load transistors have great influence on the input offset voltage while common-gate transistors are negligible. Furthermore, the offset voltage begins to increase slightly when the width and length of transistors decrease along with the diminution of pixel size, and raises rapidly when the size is smaller than a proximate threshold value. The offset voltage of preamplifiers with differential architecture and single-shared architecture in small pitch pixel are studied. After optimization under same conditions, simulation results show that single-shared architecture has smaller offset voltage than differential architecture.

Polarization-mediated Debye-screening of surface potential fluctuations in dual-channel AlN/GaN high electron mobility transistors

NASA Astrophysics Data System (ADS)

Deen, David A.; Miller, Ross A.; Osinsky, Andrei V.; Downey, Brian P.; Storm, David F.; Meyer, David J.; Scott Katzer, D.; Nepal, Neeraj

2016-12-01

A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed, simulated, and demonstrated that suppresses gate lag due to surface-originated trapped charge. Dual two-dimensional electron gas (2DEG) channels are utilized such that the top 2DEG serves as an equipotential that screens potential fluctuations resulting from surface trapped charge. The bottom channel serves as the transistor's modulated channel. Two device modeling approaches have been performed as a means to guide the device design and to elucidate the relationship between the design and performance metrics. The modeling efforts include a self-consistent Poisson-Schrodinger solution for electrostatic simulation as well as hydrodynamic three-dimensional device modeling for three-dimensional electrostatics, steady-state, and transient simulations. Experimental results validated the HEMT design whereby homo-epitaxial growth on free-standing GaN substrates and fabrication of the same-wafer dual-channel and recessed-gate AlN/GaN HEMTs have been demonstrated. Notable pulsed-gate performance has been achieved by the fabricated HEMTs through a gate lag ratio of 0.86 with minimal drain current collapse while maintaining high levels of dc and rf performance.

Note: The design of thin gap chamber simulation signal source based on field programmable gate array.

PubMed

Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Liang, Futian; Jin, Ge

2015-01-01

The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability.

Note: The design of thin gap chamber simulation signal source based on field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hu, Kun; Wang, Xu; Li, Feng

The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability.

Characteristics Of Ferroelectric Logic Gates Using a Spice-Based Model

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2005-01-01

A SPICE-based model of an n-channel ferroelectric field effect transistor has been developed based on both theoretical and empirical data. This model was used to generate the I-V characteristic of several logic gates. The use of ferroelectric field effect transistors in memory circuits is being developed by several organizations. The use of FFETs in other circuits, both analog and digital needs to be better understood. The ability of FFETs to have different characteristics depending on the initial polarization can be used to create logic gates. These gates can have properties not available to standard CMOS logic gates, such as memory, reconfigurability and memory. This paper investigates basic properties of FFET logic gates. It models FFET inverter, NAND gate and multi-input NAND gate. The I-V characteristics of the gates are presented as well as transfer characteristics and timing. The model used is a SPICE-based model developed from empirical data from actual Ferroelectric transistors. It simulates all major characteristics of the ferroelectric transistor, including polarization, hysteresis and decay. Contrasts are made of the differences between FFET logic gates and CMOS logic gates. FFET parameters are varied to show the effect on the overall gate. A recodigurable gate is investigated which is not possible with CMOS circuits. The paper concludes that FFETs can be used in logic gates and have several advantages over standard CMOS gates.

Analysis of real-time numerical integration methods applied to dynamic clamp experiments.

PubMed

Butera, Robert J; McCarthy, Maeve L

2004-12-01

Real-time systems are frequently used as an experimental tool, whereby simulated models interact in real time with neurophysiological experiments. The most demanding of these techniques is known as the dynamic clamp, where simulated ion channel conductances are artificially injected into a neuron via intracellular electrodes for measurement and stimulation. Methodologies for implementing the numerical integration of the gating variables in real time typically employ first-order numerical methods, either Euler or exponential Euler (EE). EE is often used for rapidly integrating ion channel gating variables. We find via simulation studies that for small time steps, both methods are comparable, but at larger time steps, EE performs worse than Euler. We derive error bounds for both methods, and find that the error can be characterized in terms of two ratios: time step over time constant, and voltage measurement error over the slope factor of the steady-state activation curve of the voltage-dependent gating variable. These ratios reliably bound the simulation error and yield results consistent with the simulation analysis. Our bounds quantitatively illustrate how measurement error restricts the accuracy that can be obtained by using smaller step sizes. Finally, we demonstrate that Euler can be computed with identical computational efficiency as EE.

NUMERICAL SIMULATION OF NANOINDENTATION AND PATCH CLAMP EXPERIMENTS ON MECHANOSENSITIVE CHANNELS OF LARGE CONDUCTANCE IN ESCHERICHIA COLI

PubMed Central

Tang, Yuye; Chen, Xi; Yoo, Jejoong; Yethiraj, Arun; Cui, Qiang

2010-01-01

A hierarchical simulation framework that integrates information from all-atom simulations into a finite element model at the continuum level is established to study the mechanical response of a mechanosensitive channel of large conductance (MscL) in bacteria Escherichia Coli (E.coli) embedded in a vesicle formed by the dipalmitoylphosphatidycholine (DPPC) lipid bilayer. Sufficient structural details of the protein are built into the continuum model, with key parameters and material properties derived from molecular mechanics simulations. The multi-scale framework is used to analyze the gating of MscL when the lipid vesicle is subjective to nanoindentation and patch clamp experiments, and the detailed structural transitions of the protein are obtained explicitly as a function of external load; it is currently impossible to derive such information based solely on all-atom simulations. The gating pathways of E.coli-MscL qualitatively agree with results from previous patch clamp experiments. The gating mechanisms under complex indentation-induced deformation are also predicted. This versatile hierarchical multi-scale framework may be further extended to study the mechanical behaviors of cells and biomolecules, as well as to guide and stimulate biomechanics experiments. PMID:21874098

ZnO thin film transistor immunosensor with high sensitivity and selectivity

NASA Astrophysics Data System (ADS)

Reyes, Pavel Ivanoff; Ku, Chieh-Jen; Duan, Ziqing; Lu, Yicheng; Solanki, Aniruddh; Lee, Ki-Bum

2011-04-01

A zinc oxide thin film transistor-based immunosensor (ZnO-bioTFT) is presented. The back-gate TFT has an on-off ratio of 108 and a threshold voltage of 4.25 V. The ZnO channel surface is biofunctionalized with primary monoclonal antibodies that selectively bind with epidermal growth factor receptor (EGFR). Detection of the antibody-antigen reaction is achieved through channel carrier modulation via pseudo double-gating field effect caused by the biochemical reaction. The sensitivity of 10 fM detection of pure EGFR proteins is achieved. The ZnO-bioTFT immunosensor also enables selectively detecting 10 fM of EGFR in a 5 mg/ml goat serum solution containing various other proteins.

Maximizing the value of gate capacitance in field-effect devices using an organic interface layer

NASA Astrophysics Data System (ADS)

Kwok, H. L.

2015-12-01

Past research has confirmed the existence of negative capacitance in organics such as tris (8-Hydroxyquinoline) Aluminum (Alq3). This work explored using such an organic interface layer to enhance the channel voltage in the field-effect transistor (FET) thereby lowering the sub-threshold swing. In particular, if the values of the positive and negative gate capacitances are approximately equal, the composite negative capacitance will increase by orders of magnitude. One concern is the upper frequency limit (∼100 Hz) over which negative capacitance has been observed. Nonetheless, this frequency limit can be raised to kHz when the organic layer is subjected to a DC bias.

Trapped Ion Qubits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Maunz, Peter; Wilhelm, Lukas

Qubits can be encoded in clock states of trapped ions. These states are well isolated from the environment resulting in long coherence times [1] while enabling efficient high-fidelity qubit interactions mediated by the Coulomb coupled motion of the ions in the trap. Quantum states can be prepared with high fidelity and measured efficiently using fluorescence detection. State preparation and detection with 99.93% fidelity have been realized in multiple systems [1,2]. Single qubit gates have been demonstrated below rigorous fault-tolerance thresholds [1,3]. Two qubit gates have been realized with more than 99.9% fidelity [4,5]. Quantum algorithms have been demonstrated on systemsmore » of 5 to 15 qubits [6–8].« less

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.