Thermal Radiometer Signal Processing using Radiation Hard CMOS Application Specific Integrated Circuits for use in Harsh Planetary Environments

NASA Astrophysics Data System (ADS)

Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

2015-10-01

Thermal radiometers such as proposed for the Europa Clipper flyby mission [1] require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-cm2/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection.

PubMed

Liang, Li; Oline, Stefan N; Kirk, Justin C; Schmitt, Lukas Ian; Komorowski, Robert W; Remondes, Miguel; Halassa, Michael M

2017-01-01

Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1-3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits.

Effective algorithm for routing integral structures with twolayer switching

NASA Astrophysics Data System (ADS)

Nazarov, A. V.; Shakhnov, V. A.; Vlasov, A. I.; Novikov, A. N.

2018-05-01

The paper presents an algorithm for routing switching objects such as large-scale integrated circuits (LSICs) with two layers of metallization, embossed printed circuit boards, microboards with pairs of wiring layers on each side, and other similar constructs. The algorithm allows eliminating the effect of mutual blocking of routes in the classical wave algorithm by implementing a special circuit of digital wave motion in two layers of metallization, allowing direct intersections of all circuit conductors in a combined layer. However, information about the belonging of the topology elements to the circuits is sufficient for layering and minimizing the number of contact holes. In addition, the paper presents a specific example which shows that, in contrast to the known routing algorithms using a wave model, just one byte of memory per discrete of the work field is sufficient to implement the proposed algorithm.

Defense Industrial Base Assessment: U.S. Integrated Circuit Design and Fabrication Capability

DTIC Science & Technology

2009-05-01

in the U.S for the period 2003-2006, with projections to 2011.6 The resulting draft OTE survey was field tested for accuracy and usability with a...custom application specific integrated circuits (ASICs) to field programmable gate arrays (FPGAs). Companies of all sizes can manufacture these IC...able to design one-time Electronically Programmable Gate Arrays (EPGAs) while nine are able to design Field Programmable Gate Arrays (FPGAs). Eight

Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

NASA Astrophysics Data System (ADS)

Geier, Michael

Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and symmetric threshold voltages. Additionally, a novel n-type doping procedure for SWCNT TFTs was also developed utilizing a solution-processed organometallic small molecule to demonstrate the first network top-gated n-type SWCNT TFTs. Lastly, new doping and encapsulation layers were incorporated to stabilize both p-type and n-type SWCNT TFT electronic properties, which enabled the fabrication of large-scale memory circuits. Employing these materials and processing advances has addressed many application specific barriers to commercialization. For instance, the first thin-film SWCNT complementary metal-oxide-semi-conductor (CMOS) logic devices are demonstrated with sub-nanowatt static power consumption and full rail-to-rail voltage transfer characteristics. With the introduction of a new n-type Rh-based molecular dopant, the first SWCNT TFTs are fabricated in top-gate geometries over large areas with high yield. Then by utilizing robust encapsulation methods, stable and uniform electronic performance of both p-type and n-type SWCNT TFTs has been achieved. Based on these complementary SWCNT TFTs, it is possible to simulate, design, and fabricate arrays of low-power static random access memory (SRAM) circuits, achieving large-scale integration for the first time based on solution-processed semiconductors. Together, this work provides a direct pathway for solution processable, large scale, power-efficient advanced integrated logic circuits and systems.

SiGe Integrated Circuit Developments for SQUID/TES Readout

NASA Astrophysics Data System (ADS)

Prêle, D.; Voisin, F.; Beillimaz, C.; Chen, S.; Piat, M.; Goldwurm, A.; Laurent, P.

2018-03-01

SiGe integrated circuits dedicated to the readout of superconducting bolometer arrays for astrophysics have been developed since more than 10 years at APC. Whether for Cosmic Microwave Background (CMB) observations with the QUBIC ground-based experiment (Aumont et al. in astro-ph.IM, 2016. arXiv:1609.04372) or for the Hot and Energetic Universe science theme with the X-IFU instrument on-board of the ATHENA space mission (Barret et al. in SPIE 9905, space telescopes & instrumentation 2016: UV to γ Ray, 2016. https://doi.org/10.1117/12.2232432), several kinds of Transition Edge Sensor (TES) (Irwin and Hilton, in ENSS (ed) Cryogenic particle detection, Springer, Berlin, 2005) arrays have been investigated. To readout such superconducting detector arrays, we use time or frequency domain multiplexers (TDM, FDM) (Prêle in JINST 10:C08015, 2016. https://doi.org/10.1088/1748-0221/10/08/C08015) with Superconducting QUantum Interference Devices (SQUID). In addition to the SQUID devices, low-noise biasing and amplification are needed. These last functions can be obtained by using BiCMOS SiGe technology in an Application Specific Integrated Circuit (ASIC). ASIC technology allows integration of highly optimised circuits specifically designed for a unique application. Moreover, we could reach very low-noise and wide band amplification using SiGe bipolar transistor either at room or cryogenic temperatures (Cressler in J Phys IV 04(C6):C6-101, 1994. https://doi.org/10.1051/jp4:1994616). This paper discusses the use of SiGe integrated circuits for SQUID/TES readout and gives an update of the last developments dedicated to the QUBIC telescope and to the X-IFU instrument. Both ASIC called SQmux128 and AwaXe are described showing the interest of such SiGe technology for SQUID multiplexer controls.

Smart Power: New power integrated circuit technologies and their applications

NASA Astrophysics Data System (ADS)

Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

1992-05-01

Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

A platform for rapid prototyping of synthetic gene networks in mammalian cells

PubMed Central

Duportet, Xavier; Wroblewska, Liliana; Guye, Patrick; Li, Yinqing; Eyquem, Justin; Rieders, Julianne; Rimchala, Tharathorn; Batt, Gregory; Weiss, Ron

2014-01-01

Mammalian synthetic biology may provide novel therapeutic strategies, help decipher new paths for drug discovery and facilitate synthesis of valuable molecules. Yet, our capacity to genetically program cells is currently hampered by the lack of efficient approaches to streamline the design, construction and screening of synthetic gene networks. To address this problem, here we present a framework for modular and combinatorial assembly of functional (multi)gene expression vectors and their efficient and specific targeted integration into a well-defined chromosomal context in mammalian cells. We demonstrate the potential of this framework by assembling and integrating different functional mammalian regulatory networks including the largest gene circuit built and chromosomally integrated to date (6 transcription units, 27kb) encoding an inducible memory device. Using a library of 18 different circuits as a proof of concept, we also demonstrate that our method enables one-pot/single-flask chromosomal integration and screening of circuit libraries. This rapid and powerful prototyping platform is well suited for comparative studies of genetic regulatory elements, genes and multi-gene circuits as well as facile development of libraries of isogenic engineered cell lines. PMID:25378321

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

NASA Astrophysics Data System (ADS)

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm.

PubMed

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

The misnomer of attention-deficit hyperactivity disorder.

PubMed

Wasserman, Theodore; Wasserman, Lori Drucker

2015-01-01

We propose that attention-deficit disorder represents an inefficiency of an integrated system designed to allocate working memory to designated tasks rather than the absence or dysfunction of a particular form of attention. A significant portion of this inefficiency in the allocation of working memory represents poor engagement of the reward circuit with distinct circuits of learning and performance that control instrumental conditioning (learning). Efficient attention requires the interaction of these circuits. For a significant percentage of individuals who present with attention-deficit disorder, their problems represent the engagement, or lack thereof, of the motivational and reward circuit as opposed to problems, or disorders of attention traditionally defined as problems with orienting, focusing, and sustaining. We demonstrate that there is an integrated system of working-memory allocation that responds by recruiting relevant aspects of both cortex and subcortex to the demands of the task being encountered. In this model, attention is viewed as a gating function determined by novelty, flight-or-fight response, and reward history/valence affecting motivation. We view the traditional models of attention, rather than describe specific types of attention per se, as representing the description of the behavioral output of this integrated orienting and engagement system designed to allocate working memory to task-specific stimuli.

Afferent specific role of NMDA receptors for the circuit integration of hippocampal neurogliaform cells.

PubMed

Chittajallu, R; Wester, J C; Craig, M T; Barksdale, E; Yuan, X Q; Akgül, G; Fang, C; Collins, D; Hunt, S; Pelkey, K A; McBain, C J

2017-07-28

Appropriate integration of GABAergic interneurons into nascent cortical circuits is critical for ensuring normal information processing within the brain. Network and cognitive deficits associated with neurological disorders, such as schizophrenia, that result from NMDA receptor-hypofunction have been mainly attributed to dysfunction of parvalbumin-expressing interneurons that paradoxically express low levels of synaptic NMDA receptors. Here, we reveal that throughout postnatal development, thalamic, and entorhinal cortical inputs onto hippocampal neurogliaform cells are characterized by a large NMDA receptor-mediated component. This NMDA receptor-signaling is prerequisite for developmental programs ultimately responsible for the appropriate long-range AMPAR-mediated recruitment of neurogliaform cells. In contrast, AMPAR-mediated input at local Schaffer-collateral synapses on neurogliaform cells remains normal following NMDA receptor-ablation. These afferent specific deficits potentially impact neurogliaform cell mediated inhibition within the hippocampus and our findings reveal circuit loci implicating this relatively understudied interneuron subtype in the etiology of neurodevelopmental disorders characterized by NMDA receptor-hypofunction.Proper brain function depends on the correct assembly of excitatory and inhibitory neurons into neural circuits. Here the authors show that during early postnatal development in mice, NMDAR signaling via activity of long-range synaptic inputs onto neurogliaform cells is required for their appropriate integration into the hippocampal circuitry.

Genetically identified spinal interneurons integrating tactile afferents for motor control

PubMed Central

Panek, Izabela; Farah, Carl

2015-01-01

Our movements are shaped by our perception of the world as communicated by our senses. Perception of sensory information has been largely attributed to cortical activity. However, a prior level of sensory processing occurs in the spinal cord. Indeed, sensory inputs directly project to many spinal circuits, some of which communicate with motor circuits within the spinal cord. Therefore, the processing of sensory information for the purpose of ensuring proper movements is distributed between spinal and supraspinal circuits. The mechanisms underlying the integration of sensory information for motor control at the level of the spinal cord have yet to be fully described. Recent research has led to the characterization of spinal neuron populations that share common molecular identities. Identification of molecular markers that define specific populations of spinal neurons is a prerequisite to the application of genetic techniques devised to both delineate the function of these spinal neurons and their connectivity. This strategy has been used in the study of spinal neurons that receive tactile inputs from sensory neurons innervating the skin. As a result, the circuits that include these spinal neurons have been revealed to play important roles in specific aspects of motor function. We describe these genetically identified spinal neurons that integrate tactile information and the contribution of these studies to our understanding of how tactile information shapes motor output. Furthermore, we describe future opportunities that these circuits present for shedding light on the neural mechanisms of tactile processing. PMID:26445867

Note: A 102 dB dynamic-range charge-sampling readout for ionizing particle/radiation detectors based on an application-specific integrated circuit (ASIC)

NASA Astrophysics Data System (ADS)

Pullia, A.; Zocca, F.; Capra, S.

2018-02-01

An original technique for the measurement of charge signals from ionizing particle/radiation detectors has been implemented in an application-specific integrated circuit form. The device performs linear measurements of the charge both within and beyond its output voltage swing. The device features an unprecedented spectroscopic dynamic range of 102 dB and is suitable for high-resolution ion and X-γ ray spectroscopy. We believe that this approach may change a widespread paradigm according to which no high-resolution spectroscopy is possible when working close to or beyond the limit of the preamplifier's output voltage swing.

Note: A 102 dB dynamic-range charge-sampling readout for ionizing particle/radiation detectors based on an application-specific integrated circuit (ASIC).

PubMed

Pullia, A; Zocca, F; Capra, S

2018-02-01

An original technique for the measurement of charge signals from ionizing particle/radiation detectors has been implemented in an application-specific integrated circuit form. The device performs linear measurements of the charge both within and beyond its output voltage swing. The device features an unprecedented spectroscopic dynamic range of 102 dB and is suitable for high-resolution ion and X-γ ray spectroscopy. We believe that this approach may change a widespread paradigm according to which no high-resolution spectroscopy is possible when working close to or beyond the limit of the preamplifier's output voltage swing.

The future of automation for high-volume wafer fabrication and ASIC manufacturing

NASA Astrophysics Data System (ADS)

Hughes, Randall A.; Shott, John D.

1986-12-01

A framework is given to analyze the future trends in semiconductor manufacturing automation systems, focusing specifically on the needs of ASIC (application-specific integrated circuit) or custom integrated circuit manufacturing. Advances in technologies such as gate arrays and standard cells now make it significantly easier to obtain system cost and performance advantages by integrating nonstandard functions on silicon. ASICs are attractive to U.S. manufacturers because they place a premium on sophisticated design tools, familiarity with customer needs and applications, and fast turn-around fabrication. These are areas where U.S. manufacturers believe they have an advantage and, consequently, will not suffer from the severe price/manufacturing competition encountered in conventional high-volume semiconductor products. Previously, automation was often considered viable only for high-volume manufacturing, but automation becomes a necessity in the new ASIC environment.

Solid State Technology Branch of NASA Lewis Research Center

NASA Technical Reports Server (NTRS)

1991-01-01

Reprints of one year's production of research publications (June 1990 to June 1991) are presented. These are organized into three major sections: microwave circuits, both hybrid and monolithic microwave integrated circuits (MMICs); materials and device work; and superconductivity. The included papers also cover more specific topics involving waveguides, phase array antennas, dielectrics, and high temperature superconductors.

Micromachined Integrated Quantum Circuit Containing a Superconducting Qubit

NASA Astrophysics Data System (ADS)

Brecht, T.; Chu, Y.; Axline, C.; Pfaff, W.; Blumoff, J. Z.; Chou, K.; Krayzman, L.; Frunzio, L.; Schoelkopf, R. J.

2017-04-01

We present a device demonstrating a lithographically patterned transmon integrated with a micromachined cavity resonator. Our two-cavity, one-qubit device is a multilayer microwave-integrated quantum circuit (MMIQC), comprising a basic unit capable of performing circuit-QED operations. We describe the qubit-cavity coupling mechanism of a specialized geometry using an electric-field picture and a circuit model, and obtain specific system parameters using simulations. Fabrication of the MMIQC includes lithography, etching, and metallic bonding of silicon wafers. Superconducting wafer bonding is a critical capability that is demonstrated by a micromachined storage-cavity lifetime of 34.3 μ s , corresponding to a quality factor of 2 ×106 at single-photon energies. The transmon coherence times are T1=6.4 μ s , and T2echo=11.7 μ s . We measure qubit-cavity dispersive coupling with a rate χq μ/2 π =-1.17 MHz , constituting a Jaynes-Cummings system with an interaction strength g /2 π =49 MHz . With these parameters we are able to demonstrate circuit-QED operations in the strong dispersive regime with ease. Finally, we highlight several improvements and anticipated extensions of the technology to complex MMIQCs.

Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

PubMed

Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

On-chip enzymatic microbiofuel cell-powered integrated circuits.

PubMed

Mark, Andrew G; Suraniti, Emmanuel; Roche, Jérôme; Richter, Harald; Kuhn, Alexander; Mano, Nicolas; Fischer, Peer

2017-05-16

A variety of diagnostic and therapeutic medical technologies rely on long term implantation of an electronic device to monitor or regulate a patient's condition. One proposed approach to powering these devices is to use a biofuel cell to convert the chemical energy from blood nutrients into electrical current to supply the electronics. We present here an enzymatic microbiofuel cell whose electrodes are directly integrated into a digital electronic circuit. Glucose oxidizing and oxygen reducing enzymes are immobilized on microelectrodes of an application specific integrated circuit (ASIC) using redox hydrogels to produce an enzymatic biofuel cell, capable of harvesting electrical power from just a single droplet of 5 mM glucose solution. Optimisation of the fuel cell voltage and power to match the requirements of the electronics allow self-powered operation of the on-board digital circuitry. This study represents a step towards implantable self-powered electronic devices that gather their energy from physiological fluids.

Hit and go CAS9 delivered through a lentiviral based self-limiting circuit.

PubMed

Petris, Gianluca; Casini, Antonio; Montagna, Claudia; Lorenzin, Francesca; Prandi, Davide; Romanel, Alessandro; Zasso, Jacopo; Conti, Luciano; Demichelis, Francesca; Cereseto, Anna

2017-05-22

In vivo application of the CRISPR-Cas9 technology is still limited by unwanted Cas9 genomic cleavages. Long-term expression of Cas9 increases the number of genomic loci non-specifically cleaved by the nuclease. Here we develop a Self-Limiting Cas9 circuit for Enhanced Safety and specificity (SLiCES) which consists of an expression unit for Streptococcus pyogenes Cas9 (SpCas9), a self-targeting sgRNA and a second sgRNA targeting a chosen genomic locus. The self-limiting circuit results in increased genome editing specificity by controlling Cas9 levels. For its in vivo utilization, we next integrate SLiCES into a lentiviral delivery system (lentiSLiCES) via circuit inhibition to achieve viral particle production. Upon delivery into target cells, the lentiSLiCES circuit switches on to edit the intended genomic locus while simultaneously stepping up its own neutralization through SpCas9 inactivation. By preserving target cells from residual nuclease activity, our hit and go system increases safety margins for genome editing.

Performance of an optical encoder based on a nondiffractive beam implemented with a specific photodetection integrated circuit and a diffractive optical element.

PubMed

Quintián, Fernando Perez; Calarco, Nicolás; Lutenberg, Ariel; Lipovetzky, José

2015-09-01

In this paper, we study the incremental signal produced by an optical encoder based on a nondiffractive beam (NDB). The NDB is generated by means of a diffractive optical element (DOE). The detection system is composed by an application specific integrated circuit (ASIC) sensor. The sensor consists of an array of eight concentric annular photodiodes, each one provided with a programmable gain amplifier. In this way, the system is able to synthesize a nonuniform detectivity. The contrast, amplitude, and harmonic content of the sinusoidal output signal are analyzed. The influence of the cross talk among the annular photodiodes is placed in evidence through the dependence of the signal contrast on the wavelength.

An application specific integrated circuit based multi-anode microchannel array readout system

NASA Technical Reports Server (NTRS)

Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

1991-01-01

Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

Evolution of Courtship Songs in Xenopus : Vocal Pattern Generation and Sound Production.

PubMed

Leininger, Elizabeth C; Kelley, Darcy B

2015-01-01

The extant species of African clawed frogs (Xenopus and Silurana) provide an opportunity to link the evolution of vocal characters to changes in the responsible cellular and molecular mechanisms. In this review, we integrate several robust lines of research: evolutionary trajectories of Xenopus vocalizations, cellular and circuit-level mechanisms of vocalization in selected Xenopus model species, and Xenopus evolutionary history and speciation mechanisms. Integrating recent findings allows us to generate and test specific hypotheses about the evolution of Xenopus vocal circuits. We propose that reduced vocal sex differences in some Xenopus species result from species-specific losses of sexually differentiated neural and neuromuscular features. Modification of sex-hormone-regulated developmental mechanisms is a strong candidate mechanism for reduced vocal sex differences.

Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

NASA Technical Reports Server (NTRS)

Alt, Shannon

2016-01-01

Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

Integrating anatomy and function for zebrafish circuit analysis.

PubMed

Arrenberg, Aristides B; Driever, Wolfgang

2013-01-01

Due to its transparency, virtually every brain structure of the larval zebrafish is accessible to light-based interrogation of circuit function. Advanced stimulation techniques allow the activation of optogenetic actuators at different resolution levels, and genetically encoded calcium indicators report the activity of a large proportion of neurons in the CNS. Large datasets result and need to be analyzed to identify cells that have specific properties-e.g., activity correlation to sensory stimulation or behavior. Advances in three-dimensional (3D) functional mapping in zebrafish are promising; however, the mere coordinates of implicated neurons are not sufficient. To comprehensively understand circuit function, these functional maps need to be placed into the proper context of morphological features and projection patterns, neurotransmitter phenotypes, and key anatomical landmarks. We discuss the prospect of merging functional and anatomical data in an integrated atlas from the perspective of our work on long-range dopaminergic neuromodulation and the oculomotor system. We propose that such a resource would help researchers to surpass current hurdles in circuit analysis to achieve an integrated understanding of anatomy and function.

The Topographical Mapping in Drosophila Central Complex Network and Its Signal Routing

PubMed Central

Chang, Po-Yen; Su, Ta-Shun; Shih, Chi-Tin; Lo, Chung-Chuan

2017-01-01

Neural networks regulate brain functions by routing signals. Therefore, investigating the detailed organization of a neural circuit at the cellular levels is a crucial step toward understanding the neural mechanisms of brain functions. To study how a complicated neural circuit is organized, we analyzed recently published data on the neural circuit of the Drosophila central complex, a brain structure associated with a variety of functions including sensory integration and coordination of locomotion. We discovered that, except for a small number of “atypical” neuron types, the network structure formed by the identified 194 neuron types can be described by only a few simple mathematical rules. Specifically, the topological mapping formed by these neurons can be reconstructed by applying a generation matrix on a small set of initial neurons. By analyzing how information flows propagate with or without the atypical neurons, we found that while the general pattern of signal propagation in the central complex follows the simple topological mapping formed by the “typical” neurons, some atypical neurons can substantially re-route the signal pathways, implying specific roles of these neurons in sensory signal integration. The present study provides insights into the organization principle and signal integration in the central complex. PMID:28443014

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

A ROIC for Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET sensitive to histamine.

PubMed

Samah, N L M A; Lee, Khuan Y; Sulaiman, S A; Jarmin, R

2017-07-01

Intolerance of histamine could lead to scombroid poisoning with fatal consequences. Current detection methods for histamine are wet laboratory techniques which employ expensive equipment that depends on skills of seasoned technicians and produces delayed test analysis result. Previous works from our group has established that ISFETs can be adapted for detecting histamine with the use of a novel membrane. However, work to integrate ISFETs with a readout interfacing circuit (ROIC) circuit to display the histamine concentration has not been reported so far. This paper concerns the development of a ROIC specifically to integrate with a Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET to display the histamine concentration. It embodies the design of constant voltage constant current (CVCC) circuit, amplification circuit and micro-controller based display circuit. A DC millivolt source is used to substitute the membrane modified ISFET as preliminary work. Input is histamine concentration corresponding to the safety level designated by the Food and Drugs Administration (FDA). Results show the CVCC circuit makes the output follows the input and keeps VDS constant. The amplification circuit amplifies the output from the CVCC circuit to the range 2.406-4.888V to integrate with the microcontroller, which is programmed to classify and display the histamine safety level and its corresponding voltage on a LCD panel. The ROIC could be used to produce direct output voltages corresponding to histamine concentrations, for in-situ applications.

Soldering Tool for Integrated Circuits

NASA Technical Reports Server (NTRS)

Takahashi, Ted H.

1987-01-01

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Thermally-isolated silicon-based integrated circuits and related methods

DOEpatents

Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

2017-05-09

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Integrated Cryogenic Electronics Testbed (ICE-T) for Evaluation of Superconductor and Cryo-Semiconductor Integrated Circuits

NASA Astrophysics Data System (ADS)

Dotsenko, V. V.; Sahu, A.; Chonigman, B.; Tang, J.; Lehmann, A. E.; Gupta, V.; Talalevskii, A.; Ruotolo, S.; Sarwana, S.; Webber, R. J.; Gupta, D.

2017-02-01

Research and development of cryogenic application-specific integrated circuits (ASICs), such as high-frequency (tens of GHz) semiconductor and superconductor mixed-signal circuits and large-scale (>10,000 Josephson Junctions) superconductor digital circuits, have long been hindered by the absence of specialized cryogenic test apparatus. During their iterative development phase, most ASICs require many additional input-output lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. We are developing a full suite of modular test apparatus based on cryocoolers that do not consume liquid helium, and support extensive electrical interfaces to standard and custom test equipment. Our design separates the cryogenics from electrical connections, allowing even inexperienced users to conduct testing by simply mounting their ASIC on a removable electrical insert. Thermal connections between the cold stages and the inserts are made with robust thermal links. ICE-T accommodates two independent electrical inserts at the same time. We have designed various inserts, such as universal ones with all 40 or 80 coaxial cables and those with customized wiring and temperature-controlled stages. ICE-T features fast thermal cycling for rapid testing, enables detailed testing over long periods (days to months, if necessary), and even supports automated testing of digital ICs with modular additions.

19 CFR 10.14 - Fabricated components subject to the exemption.

Code of Federal Regulations, 2010 CFR

2010-04-01

... assembled, such as transistors, diodes, integrated circuits, machinery parts, or precut parts of wearing..., or integrated circuit wafers containing individual integrated circuit dice which have been scribed or... resulted in a substantial transformation of the foreign copper ingots. Example 2. An integrated circuit...

An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks.

PubMed

Chen, Huan-Yuan; Chen, Chih-Chang; Hwang, Wen-Jyi

2017-09-28

This study aims to present an effective VLSI circuit for multi-channel spike sorting. The circuit supports the spike detection, feature extraction and classification operations. The detection circuit is implemented in accordance with the nonlinear energy operator algorithm. Both the peak detection and area computation operations are adopted for the realization of the hardware architecture for feature extraction. The resulting feature vectors are classified by a circuit for competitive learning (CL) neural networks. The CL circuit supports both online training and classification. In the proposed architecture, all the channels share the same detection, feature extraction, learning and classification circuits for a low area cost hardware implementation. The clock-gating technique is also employed for reducing the power dissipation. To evaluate the performance of the architecture, an application-specific integrated circuit (ASIC) implementation is presented. Experimental results demonstrate that the proposed circuit exhibits the advantages of a low chip area, a low power dissipation and a high classification success rate for spike sorting.

An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks

PubMed Central

Chen, Huan-Yuan; Chen, Chih-Chang

2017-01-01

This study aims to present an effective VLSI circuit for multi-channel spike sorting. The circuit supports the spike detection, feature extraction and classification operations. The detection circuit is implemented in accordance with the nonlinear energy operator algorithm. Both the peak detection and area computation operations are adopted for the realization of the hardware architecture for feature extraction. The resulting feature vectors are classified by a circuit for competitive learning (CL) neural networks. The CL circuit supports both online training and classification. In the proposed architecture, all the channels share the same detection, feature extraction, learning and classification circuits for a low area cost hardware implementation. The clock-gating technique is also employed for reducing the power dissipation. To evaluate the performance of the architecture, an application-specific integrated circuit (ASIC) implementation is presented. Experimental results demonstrate that the proposed circuit exhibits the advantages of a low chip area, a low power dissipation and a high classification success rate for spike sorting. PMID:28956859

Arrays of Carbon Nanotubes as RF Filters in Waveguides

NASA Technical Reports Server (NTRS)

Hoppe, Daniel; Hunt, Brian; Hoenk, Michael; Noca, Flavio; Xu, Jimmy

2003-01-01

Brushlike arrays of carbon nanotubes embedded in microstrip waveguides provide highly efficient (high-Q) mechanical resonators that will enable ultraminiature radio-frequency (RF) integrated circuits. In its basic form, this invention is an RF filter based on a carbon nanotube array embedded in a microstrip (or coplanar) waveguide, as shown in Figure 1. In addition, arrays of these nanotube-based RF filters can be used as an RF filter bank. Applications of this new nanotube array device include a variety of communications and signal-processing technologies. High-Q resonators are essential for stable, low-noise communications, and radar applications. Mechanical oscillators can exhibit orders of magnitude higher Qs than electronic resonant circuits, which are limited by resistive losses. This has motivated the development of a variety of mechanical resonators, including bulk acoustic wave (BAW) resonators, surface acoustic wave (SAW) resonators, and Si and SiC micromachined resonators (known as microelectromechanical systems or MEMS). There is also a strong push to extend the resonant frequencies of these oscillators into the GHz regime of state-of-the-art electronics. Unfortunately, the BAW and SAW devices tend to be large and are not easily integrated into electronic circuits. MEMS structures have been integrated into circuits, but efforts to extend MEMS resonant frequencies into the GHz regime have been difficult because of scaling problems with the capacitively-coupled drive and readout. In contrast, the proposed devices would be much smaller and hence could be more readily incorporated into advanced RF (more specifically, microwave) integrated circuits.

Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors

PubMed Central

Graham, Anthony H. D.; Robbins, Jon; Bowen, Chris R.; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented. PMID:22163884

Genetically increased cell-intrinsic excitability enhances neuronal integration into adult brain circuits

PubMed Central

Lin, Chia-Wei; Sim, Shuyin; Ainsworth, Alice; Okada, Masayoshi; Kelsch, Wolfgang; Lois, Carlos

2009-01-01

New neurons are added to the adult brain throughout life, but only half ultimately integrate into existing circuits. Sensory experience is an important regulator of the selection of new neurons but it remains unknown whether experience provides specific patterns of synaptic input, or simply a minimum level of overall membrane depolarization critical for integration. To investigate this issue, we genetically modified intrinsic electrical properties of adult-generated neurons in the mammalian olfactory bulb. First, we observed that suppressing levels of cell-intrinsic neuronal activity via expression of ESKir2.1 potassium channels decreases, whereas enhancing activity via expression of NaChBac sodium channels increases survival of new neurons. Neither of these modulations affects synaptic formation. Furthermore, even when neurons are induced to fire dramatically altered patterns of action potentials, increased levels of cell-intrinsic activity completely blocks cell death triggered by NMDA receptor deletion. These findings demonstrate that overall levels of cell-intrinsic activity govern survival of new neurons and precise firing patterns are not essential for neuronal integration into existing brain circuits. PMID:20152111

InP-based three-dimensional photonic integrated circuits

NASA Astrophysics Data System (ADS)

Tsou, Diana; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volumes require high data communication bandwidth over longer distances than short wavelength (850 nm) multi-mode fiber systems can provide. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low cost, high-speed laser modules at 1310 and 1550 nm wavelengths are required. The great success of GaAs 850 nm VCSELs for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with available intrinsic materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits, which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits (PICs) have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform for fabricating InP-based photonic integrated circuits compatible with surface-emitting laser technology. Employing InP transparency at 1310 and 1550 nm wavelengths, we have created 3-D photonic integrated circuits (PICs) by utilizing light beams in both surface normal and in-plane directions within the InP-based structure. This additional beam routing flexibility allows significant size reduction and process simplification without sacrificing device performance. This innovative 3-D PIC technology platform can be easily extended to create surface-emitting lasers integrated with power monitoring detectors, micro-lenses, external modulators, amplifiers, and other passive and active components. Such added functionality can produce cost--effective solutions for the highest-end laser transmitters required for datacom and short range telecom networks, as well as fiber channels and other cost and performance sensitive applications. We present results for 1310 nm photonic IC surface-emitting laser transmitters operating at 2.5 Gbps without active thermal electric cooling.

Synthetic biology: applying biological circuits beyond novel therapies.

PubMed

Dobrin, Anton; Saxena, Pratik; Fussenegger, Martin

2016-04-18

Synthetic biology, an engineering, circuit-driven approach to biology, has developed whole new classes of therapeutics. Unfortunately, these advances have thus far been undercapitalized upon by basic researchers. As discussed herein, using synthetic circuits, one can undertake exhaustive investigations of the endogenous circuitry found in nature, develop novel detectors and better temporally and spatially controlled inducers. One could detect changes in DNA, RNA, protein or even transient signaling events, in cell-based systems, in live mice, and in humans. Synthetic biology has also developed inducible systems that can be induced chemically, optically or using radio waves. This induction has been re-wired to lead to changes in gene expression, RNA stability and splicing, protein stability and splicing, and signaling via endogenous pathways. Beyond simple detectors and inducible systems, one can combine these modalities and develop novel signal integration circuits that can react to a very precise pre-programmed set of conditions or even to multiple sets of precise conditions. In this review, we highlight some tools that were developed in which these circuits were combined such that the detection of a particular event automatically triggered a specific output. Furthermore, using novel circuit-design strategies, circuits have been developed that can integrate multiple inputs together in Boolean logic gates composed of up to 6 inputs. We highlight the tools available and what has been developed thus far, and highlight how some clinical tools can be very useful in basic science. Most of the systems that are presented can be integrated together; and the possibilities far exceed the number of currently developed strategies.

Multipurpose silicon photonics signal processor core.

PubMed

Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

2017-09-21

Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

Neuronal Calcium Signaling in Metabolic Regulation and Adaptation to Nutrient Stress.

PubMed

Jayakumar, Siddharth; Hasan, Gaiti

2018-01-01

All organisms can respond physiologically and behaviorally to environmental fluxes in nutrient levels. Different nutrient sensing pathways exist for specific metabolites, and their inputs ultimately define appropriate nutrient uptake and metabolic homeostasis. Nutrient sensing mechanisms at the cellular level require pathways such as insulin and target of rapamycin (TOR) signaling that integrates information from different organ systems like the fat body and the gut. Such integration is essential for coordinating growth with development. Here we review the role of a newly identified set of integrative interneurons and the role of intracellular calcium signaling within these neurons, in regulating nutrient sensing under conditions of nutrient stress. A comparison of the identified Drosophila circuit and cellular mechanisms employed in this circuit, with vertebrate systems, suggests that the identified cell signaling mechanisms may be conserved for neural circuit function related to nutrient sensing by central neurons. The ideas proposed are potentially relevant for understanding the molecular basis of metabolic disorders, because these are frequently linked to nutritional stress.

Integrating DNA strand-displacement circuitry with DNA tile self-assembly

PubMed Central

Zhang, David Yu; Hariadi, Rizal F.; Choi, Harry M.T.; Winfree, Erik

2013-01-01

DNA nanotechnology has emerged as a reliable and programmable way of controlling matter at the nanoscale through the specificity of Watson–Crick base pairing, allowing both complex self-assembled structures with nanometer precision and complex reaction networks implementing digital and analog behaviors. Here we show how two well-developed frameworks, DNA tile self-assembly and DNA strand-displacement circuits, can be systematically integrated to provide programmable kinetic control of self-assembly. We demonstrate the triggered and catalytic isothermal self-assembly of DNA nanotubes over 10 μm long from precursor DNA double-crossover tiles activated by an upstream DNA catalyst network. Integrating more sophisticated control circuits and tile systems could enable precise spatial and temporal organization of dynamic molecular structures. PMID:23756381

A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS

NASA Astrophysics Data System (ADS)

Kawamoto, Kazunori; Mizuno, Shoji; Abe, Hirofumi; Higuchi, Yasushi; Ishihara, Hideaki; Fukumoto, Harutsugu; Watanabe, Takamoto; Fujino, Seiji; Shirakawa, Isao

2001-04-01

Using the example of an air bag controller, a single chip solution for automotive sub-control systems is investigated, by using a technological combination of improved circuits, bipolar complimentary metal oxide silicon double-diffused metal oxide silicon (BiCDMOS) and thick silicon on insulator (SOI). For circuits, an automotive specific reduced instruction set computer (RISC) center processing unit (CPU), and a novel, all integrated system clock generator, dividing digital phase-locked loop (DDPLL) are proposed. For the device technologies, the authors use SOI-BiCDMOS with trench dielectric-isolation (TD) which enables integration of various devices in an integrated circuit (IC) while avoiding parasitic miss operations by ideal isolation. The structures of the SOI layer and TD, are optimized for obtaining desired device characteristics and high electromagnetic interference (EMI) immunity. While performing all the air bag system functions over a wide range of supply voltage, and ambient temperature, the resulting single chip reduces the electronic parts to about a half of those in the conventional air bags. The combination of single chip oriented circuits and thick SOI-BiCDMOS technologies offered in this work is valuable for size reduction and improved reliability of automotive electronic control units (ECUs).

Selective positioning and integration of individual single-walled carbon nanotubes.

PubMed

Jiao, Liying; Xian, Xiaojun; Wu, Zhongyun; Zhang, Jin; Liu, Zhongfan

2009-01-01

We present a general selective positioning and integration technique for fabricating single-walled carbon nanotube (SWNT) circuits with preselected individual SWNTs as building blocks by utilizing poly(methyl methacrylate) (PMMA) thin film as a macroscopically handlable mediator. The transparency and marker-replicating capability of PMMA mediator allow the selective placement of chirality-specific nanotubes onto predesigned patterned surfaces with a resolution of ca. 1 mum. This technique is compatible with multiple operations and p-n conversion by chemical doping, which enables the construction of complex and logic circuits. As demonstrations of building SWNTs circuits, we fabricated a field effect inverter, a 2 x 2 all-SWNT crossbar field effect transistor (FET), and flexible FETs on plastic with this technique. This selective positioning approach can also be extended to construct purpose-directed architecture with various nanoscale building blocks.

Automatic visual inspection system for microelectronics

NASA Technical Reports Server (NTRS)

Micka, E. Z. (Inventor)

1975-01-01

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

Visual Circuit Development Requires Patterned Activity Mediated by Retinal Acetylcholine Receptors

PubMed Central

Burbridge, Timothy J.; Xu, Hong-Ping; Ackman, James B.; Ge, Xinxin; Zhang, Yueyi; Ye, Mei-Jun; Zhou, Z. Jimmy; Xu, Jian; Contractor, Anis; Crair, Michael C.

2014-01-01

SUMMARY The elaboration of nascent synaptic connections into highly ordered neural circuits is an integral feature of the developing vertebrate nervous system. In sensory systems, patterned spontaneous activity before the onset of sensation is thought to influence this process, but this conclusion remains controversial largely due to the inherent difficulty recording neural activity in early development. Here, we describe novel genetic and pharmacological manipulations of spontaneous retinal activity, assayed in vivo, that demonstrate a causal link between retinal waves and visual circuit refinement. We also report a de-coupling of downstream activity in retinorecipient regions of the developing brain after retinal wave disruption. Significantly, we show that the spatiotemporal characteristics of retinal waves affect the development of specific visual circuits. These results conclusively establish retinal waves as necessary and instructive for circuit refinement in the developing nervous system and reveal how neural circuits adjust to altered patterns of activity prior to experience. PMID:25466916

System-on-Chip Considerations for Heterogeneous Integration of CMOS and Fluidic Bio-Interfaces.

PubMed

Datta-Chaudhuri, Timir; Smela, Elisabeth; Abshire, Pamela A

2016-12-01

CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. While many biosensing systems have successfully combined CMOS chips for readout and signal processing with passive sensing arrays, systems that co-locate sensing with active circuits on a single chip offer significant advantages in size and performance but increase the complexity of multi-domain design and heterogeneous integration. This emerging class of lab-on-CMOS systems also poses distinct and vexing technical challenges that arise from the disparate requirements of biosensors and integrated circuits (ICs). Modeling these systems must address not only circuit design, but also the behavior of biological components on the surface of the IC and any physical structures. Existing tools do not support the cross-domain simulation of heterogeneous lab-on-CMOS systems, so we recommend a two-step modeling approach: using circuit simulation to inform physics-based simulation, and vice versa. We review the primary lab-on-CMOS implementation challenges and discuss practical approaches to overcome them. Issues include new versions of classical challenges in system-on-chip integration, such as thermal effects, floor-planning, and signal coupling, as well as new challenges that are specifically attributable to biological and fluidic domains, such as electrochemical effects, non-standard packaging, surface treatments, sterilization, microfabrication of surface structures, and microfluidic integration. We describe these concerns as they arise in lab-on-CMOS systems and discuss solutions that have been experimentally demonstrated.

Design of micro-ring optical sensors and circuits for integration on optical printed circuit boards (O-PCBs)

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, Hyun S.; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.

2007-05-01

We report on the design of micro-ring resonator optical sensors for integration on what we call optical printed circuit boards (O-PCBs). The objective is to realize application-specific O-PCBs, either on hard board or on flexible board, by integrating micro/nano-scale optical sensors for compact, light-weight, low-energy, high-speed, intelligent, and environmentally friendly processing of information. The O-PCBs consist of two-dimensional planar arrays of micro/nano-scale optical wires, circuits and devices that are interconnected and integrated to perform the functions of sensing and then storing, transporting, processing, switching, routing and distributing optical signals that have been collected by means of sensors. For fabrication, the polymer and organic optical wires and waveguides are first fabricated on a board and are used to interconnect and integrate sensors and other micro/ nano-scale photonic devices. Here, in our study, we focus on the sensors based on the micro-ring structures. We designed bio-sensors using silicon based micro-ring resonator. We investigate the characteristics such as sensitivity and selectivity (or quality factor) of micro-ring resonator for their use in bio-sensing application. We performed simulation studies on the quality factor of micro-ring resonators by varying the radius of the ring resonators and the separation between adjacent waveguides. We introduce the effective coupling coefficient as a realistic value to describe the strength of the coupling in micro-ring resonators.

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

High-voltage integrated active quenching circuit for single photon count rate up to 80 Mcounts/s.

PubMed

Acconcia, Giulia; Rech, Ivan; Gulinatti, Angelo; Ghioni, Massimo

2016-08-08

Single photon avalanche diodes (SPADs) have been subject to a fast improvement in recent years. In particular, custom technologies specifically developed to fabricate SPAD devices give the designer the freedom to pursue the best detector performance required by applications. A significant breakthrough in this field is represented by the recent introduction of a red enhanced SPAD (RE-SPAD) technology, capable of attaining a good photon detection efficiency in the near infrared range (e.g. 40% at a wavelength of 800 nm) while maintaining a remarkable timing resolution of about 100ps full width at half maximum. Being planar, the RE-SPAD custom technology opened the way to the development of SPAD arrays particularly suited for demanding applications in the field of life sciences. However, to achieve such excellent performance custom SPAD detectors must be operated with an external active quenching circuit (AQC) designed on purpose. Next steps toward the development of compact and practical multichannel systems will require a new generation of monolithically integrated AQC arrays. In this paper we present a new, fully integrated AQC fabricated in a high-voltage 0.18 µm CMOS technology able to provide quenching pulses up to 50 Volts with fast leading and trailing edges. Although specifically designed for optimal operation of RE-SPAD devices, the new AQC is quite versatile: it can be used with any SPAD detector, regardless its fabrication technology, reaching remarkable count rates up to 80 Mcounts/s and generating a photon detection pulse with a timing jitter as low as 119 ps full width at half maximum. The compact design of our circuit has been specifically laid out to make this IC a suitable building block for monolithically integrated AQC arrays.

Immobilized rolling circle amplification on extended-gate field-effect transistors with integrated readout circuits for early detection of platelet-derived growth factor.

PubMed

Lin, Ming-Yu; Hsu, Wen-Yang; Yang, Yuh-Shyong; Huang, Jo-Wen; Chung, Yueh-Lin; Chen, Hsin

2016-07-01

Detection of tumor-related proteins with high specificity and sensitivity is important for early diagnosis and prognosis of cancers. While protein sensors based on antibodies are not easy to keep for a long time, aptamers (single-stranded DNA) are found to be a good alternative for recognizing tumor-related protein specifically. This study investigates the feasibility of employing aptamers to recognize the platelet-derived growth factor (PDGF) specifically and subsequently triggering rolling circle amplification (RCA) of DNAs on extended-gate field-effect transistors (EGFETs) to enhance the sensitivity. The EGFETs are fabricated by the standard CMOS technology and integrated with readout circuits monolithically. The monolithic integration not only avoids the wiring complexity for a large sensor array but also enhances the sensor reliability and facilitates massive production for commercialization. With the RCA primers immobilized on the sensory surface, the protein signal is amplified as the elongation of DNA, allowing the EGFET to achieve a sensitivity of 8.8 pM, more than three orders better than that achieved by conventional EGFETs. Moreover, the responses of EGFETs are able to indicate quantitatively the reaction rates of RCA, facilitating the estimation on the protein concentration. Our experimental results demonstrate that immobilized RCA on EGFETs is a useful, label-free method for early diagnosis of diseases related to low-concentrated tumor makers (e.g., PDGF) for serum sample, as well as for monitoring the synthesis of various DNA nanostructures in real time. Graphical Abstract The tumor-related protein, PDGF, is detected by immobilizing rolling circle amplification on an EGFET with integrated readout circuit.

Robustness, evolvability, and the logic of genetic regulation.

PubMed

Payne, Joshua L; Moore, Jason H; Wagner, Andreas

2014-01-01

In gene regulatory circuits, the expression of individual genes is commonly modulated by a set of regulating gene products, which bind to a gene's cis-regulatory region. This region encodes an input-output function, referred to as signal-integration logic, that maps a specific combination of regulatory signals (inputs) to a particular expression state (output) of a gene. The space of all possible signal-integration functions is vast and the mapping from input to output is many-to-one: For the same set of inputs, many functions (genotypes) yield the same expression output (phenotype). Here, we exhaustively enumerate the set of signal-integration functions that yield identical gene expression patterns within a computational model of gene regulatory circuits. Our goal is to characterize the relationship between robustness and evolvability in the signal-integration space of regulatory circuits, and to understand how these properties vary between the genotypic and phenotypic scales. Among other results, we find that the distributions of genotypic robustness are skewed, so that the majority of signal-integration functions are robust to perturbation. We show that the connected set of genotypes that make up a given phenotype are constrained to specific regions of the space of all possible signal-integration functions, but that as the distance between genotypes increases, so does their capacity for unique innovations. In addition, we find that robust phenotypes are (i) evolvable, (ii) easily identified by random mutation, and (iii) mutationally biased toward other robust phenotypes. We explore the implications of these latter observations for mutation-based evolution by conducting random walks between randomly chosen source and target phenotypes. We demonstrate that the time required to identify the target phenotype is independent of the properties of the source phenotype.

Robustness, Evolvability, and the Logic of Genetic Regulation

PubMed Central

Moore, Jason H.; Wagner, Andreas

2014-01-01

In gene regulatory circuits, the expression of individual genes is commonly modulated by a set of regulating gene products, which bind to a gene’s cis-regulatory region. This region encodes an input-output function, referred to as signal-integration logic, that maps a specific combination of regulatory signals (inputs) to a particular expression state (output) of a gene. The space of all possible signal-integration functions is vast and the mapping from input to output is many-to-one: for the same set of inputs, many functions (genotypes) yield the same expression output (phenotype). Here, we exhaustively enumerate the set of signal-integration functions that yield idential gene expression patterns within a computational model of gene regulatory circuits. Our goal is to characterize the relationship between robustness and evolvability in the signal-integration space of regulatory circuits, and to understand how these properties vary between the genotypic and phenotypic scales. Among other results, we find that the distributions of genotypic robustness are skewed, such that the majority of signal-integration functions are robust to perturbation. We show that the connected set of genotypes that make up a given phenotype are constrained to specific regions of the space of all possible signal-integration functions, but that as the distance between genotypes increases, so does their capacity for unique innovations. In addition, we find that robust phenotypes are (i) evolvable, (ii) easily identified by random mutation, and (iii) mutationally biased toward other robust phenotypes. We explore the implications of these latter observations for mutation-based evolution by conducting random walks between randomly chosen source and target phenotypes. We demonstrate that the time required to identify the target phenotype is independent of the properties of the source phenotype. PMID:23373974

Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

NASA Astrophysics Data System (ADS)

Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

2015-03-01

This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

Photo-Spectrometer Realized In A Standard Cmos Ic Process

DOEpatents

Simpson, Michael L.; Ericson, M. Nance; Dress, William B.; Jellison, Gerald E.; Sitter, Jr., David N.; Wintenberg, Alan L.

1999-10-12

A spectrometer, comprises: a semiconductor having a silicon substrate, the substrate having integrally formed thereon a plurality of layers forming photo diodes, each of the photo diodes having an independent spectral response to an input spectra within a spectral range of the semiconductor and each of the photo diodes formed only from at least one of the plurality of layers of the semiconductor above the substrate; and, a signal processing circuit for modifying signals from the photo diodes with respective weights, the weighted signals being representative of a specific spectral response. The photo diodes have different junction depths and different polycrystalline silicon and oxide coverings. The signal processing circuit applies the respective weights and sums the weighted signals. In a corresponding method, a spectrometer is manufactured by manipulating only the standard masks, materials and fabrication steps of standard semiconductor processing, and integrating the spectrometer with a signal processing circuit.

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

NASA Astrophysics Data System (ADS)

Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

2016-11-01

Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

Electro-optical Probing Of Terahertz Integrated Circuits

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Romanofsky, R.; Whitaker, J. F.; Valdmanis, J. A.; Mourou, G.; Jackson, T. A.

1990-01-01

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

NASA Astrophysics Data System (ADS)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Wide-band polarization controller for Si photonic integrated circuits.

PubMed

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Integrated plasticity at inhibitory and excitatory synapses in the cerebellar circuit.

PubMed

Mapelli, Lisa; Pagani, Martina; Garrido, Jesus A; D'Angelo, Egidio

2015-01-01

The way long-term potentiation (LTP) and depression (LTD) are integrated within the different synapses of brain neuronal circuits is poorly understood. In order to progress beyond the identification of specific molecular mechanisms, a system in which multiple forms of plasticity can be correlated with large-scale neural processing is required. In this paper we take as an example the cerebellar network, in which extensive investigations have revealed LTP and LTD at several excitatory and inhibitory synapses. Cerebellar LTP and LTD occur in all three main cerebellar subcircuits (granular layer, molecular layer, deep cerebellar nuclei) and correspondingly regulate the function of their three main neurons: granule cells (GrCs), Purkinje cells (PCs) and deep cerebellar nuclear (DCN) cells. All these neurons, in addition to be excited, are reached by feed-forward and feed-back inhibitory connections, in which LTP and LTD may either operate synergistically or homeostatically in order to control information flow through the circuit. Although the investigation of individual synaptic plasticities in vitro is essential to prove their existence and mechanisms, it is insufficient to generate a coherent view of their impact on network functioning in vivo. Recent computational models and cell-specific genetic mutations in mice are shedding light on how plasticity at multiple excitatory and inhibitory synapses might regulate neuronal activities in the cerebellar circuit and contribute to learning and memory and behavioral control.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Front-end ASICs for high-energy astrophysics in space

NASA Astrophysics Data System (ADS)

Gevin, O.; Limousin, O.; Meuris, A.

2016-07-01

In most of embedded imaging systems for space applications, high granularity and increasing size of focal planes justify an almost systematic use of integrated circuits. . To fulfill challenging requirements for excellent spatial and energy resolution, integrated circuits must fit the sensors perfectly and interface the system such a way to optimize simultaneously noise, geometry and architecture. Moreover, very low power consumption and radiation tolerance are mandatory to envision a use onboard a payload in space. Consequently, being part of an optimized detection system for space, the integrated circuit is specifically designed for each application and becomes an Application Specific Integrated Circuits (ASIC). The paper focuses on mixed analog and digital signal ASICs for spectro-imaging systems in the keVMeV energy band. The first part of the paper summarizes the main advantages conferred by the use of front-end ASICs for highenergy astrophysics instruments in space mission. Space qualification of ASICs requires the chip to be radiation hard. The paper will shortly describe some of the typical hardening techniques and give some guidelines that an ASIC designer should follow to choose the most efficient technology for his project. The first task of the front-end electronics is to convert the charge coming from the detector into a voltage. For most of the Silicon detectors (CCD, DEPFET, SDD) this is conversion happens in the detector itself. For other sensor materials, charge preamplifiers operate the conversion. The paper shortly describes the different key parameters of charge preamplifiers and the binding parameters for the design. Filtering is generally mandatory in order to increase the signal to noise ratio or to reduce the duration of the signal. After a brief review on the main noise sources, the paper reviews noise-filtering techniques that are commonly used in Integrated circuits designs. The way sensors and ASICs are interconnected together plays a major role in the noise performances of the detection systems. The geometry of a sensor is therefore critical and drives the ASIC design. The second part of the paper takes the geometry of the detector as a story line to explore different kinds of ASIC structures and architectures. From the simple single-channel ASIC for CCDs to the most advanced 3D ASIC prototypes used to build dead-zone free imaging systems, the paper reports on different families of circuits for spectro-imaging systems. It emphasizes a variety of designer choices, all around the word, in different space missions.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Stability of the Baseline Holder in Readout Circuits For Radiation Detectors

PubMed Central

Chen, Y.; Cui, Y.; O’Connor, P.; Seo, Y.; Camarda, G. S.; Hossain, A.; Roy, U.; Yang, G.; James, R. B.

2016-01-01

Baseline holder (BLH) circuits are used widely to stabilize the analog output of application-specific integrated circuits (ASICs) for high-count-rate applications. The careful design of BLH circuits is vital to the overall stability of the analog-signal-processing chain in ASICs. Recently, we observed self-triggered fluctuations in an ASIC in which the shaping circuits have a BLH circuit in the feedback loop. In fact, further investigations showed that methods of enhancing small-signal stabilities cause an even worse situation. To resolve this problem, we used large-signal analyses to study the circuit’s stability. We found that a relatively small gain for the error amplifier and a small current in the non-linear stage of the BLH are required to enhance stability in large-signal analysis, which will compromise the properties of the BLH. These findings were verified by SPICE simulations. In this paper, we present our detailed analysis of the BLH circuits, and propose an improved version of them that have only minimal self-triggered fluctuations. We summarize the design considerations both for the stability and the properties of the BLH circuits. PMID:27182081

Reusable vibration resistant integrated circuit mounting socket

DOEpatents

Evans, Craig N.

1995-01-01

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Integrated coherent matter wave circuits

DOE PAGES

Ryu, C.; Boshier, M. G.

2015-09-21

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore » electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

A microarchitecture for resource-limited superscalar microprocessors

NASA Astrophysics Data System (ADS)

Basso, Todd David

1999-11-01

Microelectronic components in space and satellite systems must be resistant to total dose radiation, single-even upset, and latchup in order to accomplish their missions. The demand for inexpensive, high-volume, radiation hardened (rad-hard) integrated circuits (ICs) is expected to increase dramatically as the communication market continues to expand. Motorola's Complementary Gallium Arsenide (CGaAsTM) technology offers superior radiation tolerance compared to traditional CMOS processes, while being more economical than dedicated rad-hard CMOS processes. The goals of this dissertation are to optimize a superscalar microarchitecture suitable for CGaAsTM microprocessors, develop circuit techniques for such applications, and evaluate the potential of CGaAsTM for the development of digital VLSI circuits. Motorola's 0.5 mum CGaAsTM process is summarized and circuit techniques applicable to digital CGaAsTM are developed. Direct coupled FET, complementary, and domino logic circuits are compared based on speed, power, area, and noise margins. These circuit techniques are employed in the design of a 600 MHz PowerPCTM arithmetic logic unit. The dissertation emphasizes CGaASTM-specific design considerations, specifically, low integration level. A baseline superscalar microarchitecture is defined and SPEC95 integer benchmark simulations are used to evaluate the applicability of advanced architectural features to microprocessors having low integration levels. The performance simulations center around the optimization of a simple superscalar core, small-scale branch prediction, instruction prefetching, and an off-chip primary data cache. The simulation results are used to develop a superscalar microarchitecture capable of outperforming a comparable sequential pipeline, while using only 500,000 transistors. The architecture, running at 200 MHz, is capable of achieving an estimated 153 MIPS, translating to a 27% performance increase over a comparable traditional pipelined microprocessor. The proposed microarchitecture is process independent and can be applied to low-cost, or transistor-limited applications. The proposed microarchitecture is implemented in the design of a 0.35 mum CMOS microprocessor, and the design of a 0.5 mum CGaAsTM micro-processor. The two technologies and designs are compared to ascertain the state of CGaAsTM for digital VLSI applications.

A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

NASA Technical Reports Server (NTRS)

DuMonthier, Jeffrey; Suarez, George

2013-01-01

Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the new process specific device models. The system has been used in the design of time to digital converters for laser ranging and time-of-flight mass spectrometry to optimize analog, mixed signal and digital circuits such as charge sensitive amplifiers, comparators, delay elements, radiation tolerant dual interlocked (DICE) flip-flops and two of three voter gates.

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

PubMed

Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

2015-07-01

We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

Goals, achievements of microelectronics program

NASA Astrophysics Data System (ADS)

Schronk, L.

1985-05-01

Besides reviewing the objectives of the government's microelectronics program, the Microelectronics Enterprise, the production of metal oxide semiconductors and bipolar integrated-circuit chips, specific research and development results to date, and the plans for future activity are discussed. Marketing and domestic demand are discussed.

On-chip passive three-port circuit of all-optical ordered-route transmission.

PubMed

Liu, Li; Dong, Jianji; Gao, Dingshan; Zheng, Aoling; Zhang, Xinliang

2015-05-13

On-chip photonic circuits of different specific functions are highly desirable and becoming significant demands in all-optical communication network. Especially, the function to control the transmission directions of the optical signals in integrated circuits is a fundamental research. Previous schemes, such as on-chip optical circulators, are mostly realized by Faraday effect which suffers from material incompatibilities between semiconductors and magneto-optical materials. Achieving highly functional circuits in which light circulates in a particular direction with satisfied performances are still difficult in pure silicon photonics platform. Here, we propose and experimentally demonstrate a three-port passive device supporting optical ordered-route transmission based on silicon thermo-optic effect for the first time. By injecting strong power from only one port, the light could transmit through the three ports in a strict order (1→2, 2→3, 3→1) while be blocked in the opposite order (1→3, 3→2, 2→1). The blocking extinction ratios and operation bandwidths have been investigated in this paper. Moreover, with compact size, economic fabrication process and great extensibility, this proposed photonic integrated circuit is competitive to be applied in on-chip all-optical information processing systems, such as path priority selector.

On-chip passive three-port circuit of all-optical ordered-route transmission

PubMed Central

Liu, Li; Dong, Jianji; Gao, Dingshan; Zheng, Aoling; Zhang, Xinliang

2015-01-01

On-chip photonic circuits of different specific functions are highly desirable and becoming significant demands in all-optical communication network. Especially, the function to control the transmission directions of the optical signals in integrated circuits is a fundamental research. Previous schemes, such as on-chip optical circulators, are mostly realized by Faraday effect which suffers from material incompatibilities between semiconductors and magneto-optical materials. Achieving highly functional circuits in which light circulates in a particular direction with satisfied performances are still difficult in pure silicon photonics platform. Here, we propose and experimentally demonstrate a three-port passive device supporting optical ordered-route transmission based on silicon thermo-optic effect for the first time. By injecting strong power from only one port, the light could transmit through the three ports in a strict order (1→2, 2→3, 3→1) while be blocked in the opposite order (1→3, 3→2, 2→1). The blocking extinction ratios and operation bandwidths have been investigated in this paper. Moreover, with compact size, economic fabrication process and great extensibility, this proposed photonic integrated circuit is competitive to be applied in on-chip all-optical information processing systems, such as path priority selector. PMID:25970855

Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

Specification of select hypothalamic circuits and innate behaviors by the embryonic patterning gene Dbx1

PubMed Central

Sokolowski, Katie; Esumi, Shigeyuki; Hirata, Tsutomu; Kamal, Yasman; Tran, Tuyen; Lam, Andrew; Oboti, Livio; Brighthaupt, Sherri-Chanelle; Zaghlula, Manar; Martinez, Jennifer; Ghimbovschi, Svetlana; Knoblach, Susan; Pierani, Alessandra; Tamamaki, Nobuaki; Shah, Nirao M; Jones, Kevin S; Corbin, Joshua G

2015-01-01

SUMMARY The hypothalamus integrates information required for the production of a variety of innate behaviors such as feeding, mating, aggression and predator avoidance. Despite an extensive knowledge of hypothalamic function, how embryonic genetic programs specify circuits that regulate these behaviors remains unknown. Here, we find that in the hypothalamus the developmentally regulated homeodomain-containing transcription factor Dbx1 is required for the generation of specific subclasses of neurons within the lateral hypothalamic area/zona incerta (LH) and the arcuate (Arc) nucleus. Consistent with this specific developmental role, Dbx1 hypothalamic-specific conditional-knockout mice display attenuated responses to predator odor and feeding stressors but do not display deficits in other innate behaviors such as mating or conspecific aggression. Thus, activity of a single developmentally regulated gene, Dbx1, is a shared requirement for the specification of hypothalamic nuclei governing a subset of innate behaviors. PMID:25864637

A photonic circuit for complementary frequency shifting, in-phase quadrature/single sideband modulation and frequency multiplication: analysis and integration feasibility

NASA Astrophysics Data System (ADS)

Hasan, Mehedi; Hu, Jianqi; Nikkhah, Hamdam; Hall, Trevor

2017-08-01

A novel photonic integrated circuit architecture for implementing orthogonal frequency division multiplexing by means of photonic generation of phase-correlated sub-carriers is proposed. The circuit can also be used for implementing complex modulation, frequency up-conversion of the electrical signal to the optical domain and frequency multiplication. The principles of operation of the circuit are expounded using transmission matrices and the predictions of the analysis are verified by computer simulation using an industry-standard software tool. Non-ideal scenarios that may affect the correct function of the circuit are taken into consideration and quantified. The discussion of integration feasibility is illustrated by a photonic integrated circuit that has been fabricated using 'library' components and which features most of the elements of the proposed circuit architecture. The circuit is found to be practical and may be fabricated in any material platform that offers a linear electro-optic modulator such as organic or ferroelectric thin films hybridized with silicon photonics.

The design of radiation-hardened ICs for space - A compendium of approaches

NASA Technical Reports Server (NTRS)

Kerns, Sherra E.; Shafer, B. D; Rockett, L. R., Jr.; Pridmore, J. S.; Berndt, D. F.

1988-01-01

Several technologies, including bulk and epi CMOS, CMOS/SOI-SOS (silicon-on-insulator-silicon-on-sapphire), CML (current-mode logic), ECL (emitter-coupled logic), analog bipolar (JI, single-poly DI, and SOI) and GaAs E/D (enhancement/depletion) heterojunction MESFET, are discussed. The discussion includes the direct effects of space radiation on microelectronic materials and devices, how these effects are evidenced in circuit and device design parameter variations, the particular effects of most significance to each functional class of circuit, specific techniques for hardening high-speed circuits, design examples for integrated systems, including operational amplifiers and A/D (analog/digital) converters, and the computer simulation of radiation effects on microelectronic ISs.

GaAs Optoelectronic Integrated-Circuit Neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H.; Kim, Jae H.; Psaltis, Demetri

1992-01-01

Monolithic GaAs optoelectronic integrated circuits developed for use as artificial neurons. Neural-network computer contains planar arrays of optoelectronic neurons, and variable synaptic connections between neurons effected by diffraction of light from volume hologram in photorefractive material. Basic principles of neural-network computers explained more fully in "Optoelectronic Integrated Circuits For Neural Networks" (NPO-17652). In present circuits, devices replaced by metal/semiconductor field effect transistors (MESFET's), which consume less power.

Monolithic integration of GMR sensors for standard CMOS-IC current sensing

NASA Astrophysics Data System (ADS)

De Marcellis, A.; Reig, C.; Cubells-Beltrán, M.-D.; Madrenas, J.; Santos, J. D.; Cardoso, S.; Freitas, P. P.

2017-09-01

In this work we report on the development of Giant Magnetoresistive (GMR) sensors for off-line current measurements in standard integrated circuits. An ASIC has been specifically designed and fabricated in the well-known AMS-0.35 μm CMOS technology, including the electronic circuitry for sensor interfacing. It implements an oscillating circuit performing a voltage-to-frequency conversion. Subsequently, a fully CMOS-compatible low temperature post-process has been applied for depositing the GMR sensing devices in a full-bridge configuration onto the buried current straps. Sensitivity and resolution of these sensors have been investigated achieving experimental results that show a detection sensitivity of about 100 Hz/mA, with a resolution of about 5 μA.

High-efficiency solid state power amplifier

NASA Technical Reports Server (NTRS)

Wallis, Robert E. (Inventor); Cheng, Sheng (Inventor)

2005-01-01

A high-efficiency solid state power amplifier (SSPA) for specific use in a spacecraft is provided. The SSPA has a mass of less than 850 g and includes two different X-band power amplifier sections, i.e., a lumped power amplifier with a single 11-W output and a distributed power amplifier with eight 2.75-W outputs. These two amplifier sections provide output power that is scalable from 11 to 15 watts without major design changes. Five different hybrid microcircuits, including high-efficiency Heterostructure Field Effect Transistor (HFET) amplifiers and Monolithic Microwave Integrated Circuit (MMIC) phase shifters have been developed for use within the SSPA. A highly efficient packaging approach enables the integration of a large number of hybrid circuits into the SSPA.

Hippocampal-medial prefrontal circuit supports memory updating during learning and post-encoding rest

PubMed Central

Schlichting, Margaret L.; Preston, Alison R.

2015-01-01

Learning occurs in the context of existing memories. Encountering new information that relates to prior knowledge may trigger integration, whereby established memories are updated to incorporate new content. Here, we provide a critical test of recent theories suggesting hippocampal (HPC) and medial prefrontal (MPFC) involvement in integration, both during and immediately following encoding. Human participants with established memories for a set of initial (AB) associations underwent fMRI scanning during passive rest and encoding of new related (BC) and unrelated (XY) pairs. We show that HPC-MPFC functional coupling during learning was more predictive of trial-by-trial memory for associations related to prior knowledge relative to unrelated associations. Moreover, the degree to which HPC-MPFC functional coupling was enhanced following overlapping encoding was related to memory integration behavior across participants. We observed a dissociation between anterior and posterior MPFC, with integration signatures during post-encoding rest specifically in the posterior subregion. These results highlight the persistence of integration signatures into post-encoding periods, indicating continued processing of interrelated memories during rest. We also interrogated the coherence of white matter tracts to assess the hypothesis that integration behavior would be related to the integrity of the underlying anatomical pathways. Consistent with our predictions, more coherent HPC-MPFC white matter structure was associated with better performance across participants. This HPC-MPFC circuit also interacted with content-sensitive visual cortex during learning and rest, consistent with reinstatement of prior knowledge to enable updating. These results show that the HPC-MPFC circuit supports on- and offline integration of new content into memory. PMID:26608407

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Semicustom integrated circuits and the standard transistor array radix (STAR)

NASA Technical Reports Server (NTRS)

Edge, T. M.

1977-01-01

The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.

Subsurface microscopy of interconnect layers of an integrated circuit.

PubMed

Köklü, F Hakan; Unlü, M Selim

2010-01-15

We apply the NA-increasing lens technique to confocal and wide-field backside microscopy of integrated circuits. We demonstrate 325 nm (lambda(0)/4) lateral spatial resolution while imaging metal structures located inside the interconnect layer of an integrated circuit. Vectorial field calculations are presented justifying our findings.

Postirradiation Effects In Integrated Circuits

NASA Technical Reports Server (NTRS)

Shaw, David C.; Barnes, Charles E.

1993-01-01

Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-06

... INTERNATIONAL TRADE COMMISSION [Docket No. 2899] Certain Integrated Circuit Packages Provided With... complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and..., telephone (202) 205-2000. The public version of the complaint can be accessed on the Commission's electronic...

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

Performance evaluation of an architecture for the characterisation of photo-devices: design, fabrication and test on a CMOS technology

NASA Astrophysics Data System (ADS)

Castillo-Cabrera, G.; García-Lamont, J.; Reyes-Barranca, M. A.; Moreno-Cadenas, J. A.; Escobosa-Echavarría, A.

2011-03-01

In this report, the performance of a particular pixel's architecture is evaluated. It consists mainly of an optical sensor coupled to an amplifier. The circuit contains photoreceptors such as phototransistors and photodiodes. The circuit integrates two main blocks: (a) the pixel architecture, containing four p-channel transistors and a photoreceptor, and (b) a current source for biasing the signal conditioning amplifier. The generated photocurrent is integrated through the gate capacitance of the input p-channel MOS transistor, then converted to voltage and amplified. Both input transistor and current source are implemented as a voltage amplifier having variable gain (between 10dB and 32dB). Considering characterisation purposes, this last fact is relevant since it gives a degree of freedom to the measurement of different kinds of photo-devices and is not limited to either a single operating point of the circuit or one kind and size of photo-sensor. The gain of the amplifier can be adjusted with an external DC power supply that also sets the DC quiescent point of the circuit. Design of the row-select transistor's aspect ratio used in the matrix array is critical for the pixel's amplifier performance. Based on circuit design data such as capacitance magnitude, time and voltage integration, and amplifier gain, characterisation of all the architecture can be readily carried out and evaluated. For the specific technology used in this work, the spectral response of photo-sensors reveals performance differences between phototransistors and photodiodes. Good approximation between simulation and measurement was obtained.

Transforming Ordinary Buildings into Smart Buildings via Low-Cost, Self-Powering Wireless Sensors & Sensor Networks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, Philip

The research objective of this project is to design and demonstrate a low-cost, compact, easy-to-deploy, maintenance-free sensor node technology, and a network of such sensors, which enable the monitoring of multiphysical parameters and can transform today’s ordinary buildings into smart buildings with environmental awareness. We develop the sensor node and network via engineering and integration of existing technologies, including high-efficiency mechanical energy harvesting, and ultralow-power integrated circuits (ICs) for sensing and wireless communication. Through integration and innovative power management via specifically designed low-power control circuits for wireless sensing applications, and tailoring energy-harvesting components to indoor applications, the target products willmore » have smaller volume, higher efficiency, and much lower cost (in both manufacturing and maintenance) than the baseline technology. Our development and commercialization objective is to create prototypes for our target products under the CWRU-Intwine collaboration.« less

New readout integrated circuit using continuous time fixed pattern noise correction

NASA Astrophysics Data System (ADS)

Dupont, Bertrand; Chammings, G.; Rapellin, G.; Mandier, C.; Tchagaspanian, M.; Dupont, Benoit; Peizerat, A.; Yon, J. J.

2008-04-01

LETI has been involved in IRFPA development since 1978; the design department (LETI/DCIS) has focused its work on new ROIC architecture since many years. The trend is to integrate advanced functions into the CMOS design to achieve cost efficient sensors production. Thermal imaging market is today more and more demanding of systems with instant ON capability and low power consumption. The purpose of this paper is to present the latest developments of fixed pattern noise continuous time correction. Several architectures are proposed, some are based on hardwired digital processing and some are purely analog. Both are using scene based algorithms. Moreover a new method is proposed for simultaneous correction of pixel offsets and sensitivities. In this scope, a new architecture of readout integrated circuit has been implemented; this architecture is developed with 0.18μm CMOS technology. The specification and the application of the ROIC are discussed in details.

Oscillatory integration windows in neurons

PubMed Central

Gupta, Nitin; Singh, Swikriti Saran; Stopfer, Mark

2016-01-01

Oscillatory synchrony among neurons occurs in many species and brain areas, and has been proposed to help neural circuits process information. One hypothesis states that oscillatory input creates cyclic integration windows: specific times in each oscillatory cycle when postsynaptic neurons become especially responsive to inputs. With paired local field potential (LFP) and intracellular recordings and controlled stimulus manipulations we directly test this idea in the locust olfactory system. We find that inputs arriving in Kenyon cells (KCs) sum most effectively in a preferred window of the oscillation cycle. With a computational model, we show that the non-uniform structure of noise in the membrane potential helps mediate this process. Further experiments performed in vivo demonstrate that integration windows can form in the absence of inhibition and at a broad range of oscillation frequencies. Our results reveal how a fundamental coincidence-detection mechanism in a neural circuit functions to decode temporally organized spiking. PMID:27976720

Method for producing a hybridization of detector array and integrated circuit for readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Grunthaner, Frank J. (Inventor)

1993-01-01

A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1987-08-01

This interim technical report presents results of research on the computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems. A specific objective is to extend the state-of-the-art of the Computer Aided Design (CAD) of the monolithic microwave and millimeter wave integrated circuits (MIMIC). In this reporting period, we have derived a new model for the high electron mobility transistor (HEMT) based on a nonlinear charge control formulation which takes into consideration the variation of the 2DEG distance offset from the heterointerface as a function of bias. Pseudomorphic InGaAs/GaAs HEMT devices have been successfully fabricated at UCSD. For a 1 micron gate length, a maximum transconductance of 320 mS/mm was obtained. In cooperation with TRW, devices with 0.15 micron and 0.25 micron gate lengths have been successfully fabricated and tested. New results on the design of ultra-wideband distributed amplifiers using 0.15 micron pseudomorphic InGaAs/GaAs HEMT's have also been obtained. In addition, two-dimensional models of the submicron MESFET's, HEMT's and HBT's are currently being developed for the CRAY X-MP/48 supercomputer. Preliminary results obtained are also presented in this report.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

PubMed

Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

Microprocessor Seminar, phase 2

NASA Technical Reports Server (NTRS)

Scott, W. R.

1977-01-01

Workshop sessions and papers were devoted to various aspects of microprocessor and large scale integrated circuit technology. Presentations were made on advanced LSI developments for high reliability military and NASA applications. Microprocessor testing techniques were discussed, and test data were presented. High reliability procurement specifications were also discussed.

Neural Circuit to Integrate Opposing Motions in the Visual Field.

PubMed

Mauss, Alex S; Pankova, Katarina; Arenz, Alexander; Nern, Aljoscha; Rubin, Gerald M; Borst, Alexander

2015-07-16

When navigating in their environment, animals use visual motion cues as feedback signals that are elicited by their own motion. Such signals are provided by wide-field neurons sampling motion directions at multiple image points as the animal maneuvers. Each one of these neurons responds selectively to a specific optic flow-field representing the spatial distribution of motion vectors on the retina. Here, we describe the discovery of a group of local, inhibitory interneurons in the fruit fly Drosophila key for filtering these cues. Using anatomy, molecular characterization, activity manipulation, and physiological recordings, we demonstrate that these interneurons convey direction-selective inhibition to wide-field neurons with opposite preferred direction and provide evidence for how their connectivity enables the computation required for integrating opposing motions. Our results indicate that, rather than sharpening directional selectivity per se, these circuit elements reduce noise by eliminating non-specific responses to complex visual information. Copyright © 2015 Elsevier Inc. All rights reserved.

Prototyping and implementing flight qualifiable semicustom CMOS P-well bulk integrated circuits in the JPL environment

NASA Technical Reports Server (NTRS)

Olson, E. M.

1986-01-01

Presently, there are many difficulties associated with implementing application specific custom or semi-custom (standard cell based) integrated circuits (ICs) into JPL flight projects. One of the primary difficulties is developing prototype semi-custom integrated circuits for use and evaluation in engineering prototype flight hardware. The prototype semi-custom ICs must be extremely cost-effective and yet still representative of flight qualifiable versions of the design. A second difficulty is encountered in the transport of the design from engineering prototype quality to flight quality. Normally, flight quality integrated circuits have stringent quality standards, must be radiation resistant and should consume minimal power. It is often not necessary or cost effective, however, to impose such stringent quality standards on engineering models developed for systems analysis in controlled lab environments. This article presents work originally initiated for ground based applications that also addresses these two problems. Furthermore, this article suggests a method that has been shown successful in prototyping flight quality semi-custom ICs through the Metal Oxide Semiconductor Implementation Service (MOSIS) program run by the University of Southern California's Information Sciences Institute. The method has been used successfully to design and fabricate through the MOSIS three different semi-custom prototype CMOS p-well chips. The three designs make use of the work presented and were designed consistent with design techniques and structures that are flight qualifiable, allowing one hour transfer of the design from engineering model status to flight qualifiable foundry-ready status through methods outlined in this article.

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... that there exists a domestic industry with respect to each of the asserted patents. The complaint named...

How Small Is Too Small? Technology into 2035

DTIC Science & Technology

2010-12-01

by Arrayed Polyimide Joint Actuators,” Journal of Micromechanics and Microengineering 10, no. 3 [2000]: 337–49.) 6 A more integrated microrobot is...application-specific in- tegrated circuit used for overall control; three piezoelectric legs used for forward, reverse, and z-axis rotation move- ments...a piezoelectric touch sensor; and power storage Figure 3. Captured video image of an integrated and autonomous micro- robot. (Reproduced from Seth

Carbon nanotube-based three-dimensional monolithic optoelectronic integrated system

NASA Astrophysics Data System (ADS)

Liu, Yang; Wang, Sheng; Liu, Huaping; Peng, Lian-Mao

2017-06-01

Single material-based monolithic optoelectronic integration with complementary metal oxide semiconductor-compatible signal processing circuits is one of the most pursued approaches in the post-Moore era to realize rapid data communication and functional diversification in a limited three-dimensional space. Here, we report an electrically driven carbon nanotube-based on-chip three-dimensional optoelectronic integrated circuit. We demonstrate that photovoltaic receivers, electrically driven transmitters and on-chip electronic circuits can all be fabricated using carbon nanotubes via a complementary metal oxide semiconductor-compatible low-temperature process, providing a seamless integration platform for realizing monolithic three-dimensional optoelectronic integrated circuits with diversified functionality such as the heterogeneous AND gates. These circuits can be vertically scaled down to sub-30 nm and operates in photovoltaic mode at room temperature. Parallel optical communication between functional layers, for example, bottom-layer digital circuits and top-layer memory, has been demonstrated by mapping data using a 2 × 2 transmitter/receiver array, which could be extended as the next generation energy-efficient signal processing paradigm.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Multichannel, Active Low-Pass Filters

NASA Technical Reports Server (NTRS)

Lev, James J.

1989-01-01

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

Olfactory Cued Learning Paradigm.

PubMed

Liu, Gary; McClard, Cynthia K; Tepe, Burak; Swanson, Jessica; Pekarek, Brandon; Panneerselvam, Sugi; Arenkiel, Benjamin R

2017-05-05

Sensory stimulation leads to structural changes within the CNS (Central Nervous System), thus providing the fundamental mechanism for learning and memory. The olfactory circuit offers a unique model for studying experience-dependent plasticity, partly due to a continuous supply of integrating adult born neurons. Our lab has recently implemented an olfactory cued learning paradigm in which specific odor pairs are coupled to either a reward or punishment to study downstream circuit changes. The following protocol outlines the basic set up for our learning paradigm. Here, we describe the equipment setup, programming of software, and method of behavioral training.

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1993-12-31

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and hold it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components.« less

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1995-08-29

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components. 11 figs.« less

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Optogenetic interrogation of neural circuits: technology for probing mammalian brain structures

PubMed Central

Zhang, Feng; Gradinaru, Viviana; Adamantidis, Antoine R; Durand, Remy; Airan, Raag D; de Lecea, Luis; Deisseroth, Karl

2015-01-01

Elucidation of the neural substrates underlying complex animal behaviors depends on precise activity control tools, as well as compatible readout methods. Recent developments in optogenetics have addressed this need, opening up new possibilities for systems neuroscience. Interrogation of even deep neural circuits can be conducted by directly probing the necessity and sufficiency of defined circuit elements with millisecond-scale, cell type-specific optical perturbations, coupled with suitable readouts such as electrophysiology, optical circuit dynamics measures and freely moving behavior in mammals. Here we collect in detail our strategies for delivering microbial opsin genes to deep mammalian brain structures in vivo, along with protocols for integrating the resulting optical control with compatible readouts (electrophysiological, optical and behavioral). The procedures described here, from initial virus preparation to systems-level functional readout, can be completed within 4–5 weeks. Together, these methods may help in providing circuit-level insight into the dynamics underlying complex mammalian behaviors in health and disease. PMID:20203662

From Whole-Brain Data to Functional Circuit Models: The Zebrafish Optomotor Response.

PubMed

Naumann, Eva A; Fitzgerald, James E; Dunn, Timothy W; Rihel, Jason; Sompolinsky, Haim; Engert, Florian

2016-11-03

Detailed descriptions of brain-scale sensorimotor circuits underlying vertebrate behavior remain elusive. Recent advances in zebrafish neuroscience offer new opportunities to dissect such circuits via whole-brain imaging, behavioral analysis, functional perturbations, and network modeling. Here, we harness these tools to generate a brain-scale circuit model of the optomotor response, an orienting behavior evoked by visual motion. We show that such motion is processed by diverse neural response types distributed across multiple brain regions. To transform sensory input into action, these regions sequentially integrate eye- and direction-specific sensory streams, refine representations via interhemispheric inhibition, and demix locomotor instructions to independently drive turning and forward swimming. While experiments revealed many neural response types throughout the brain, modeling identified the dimensions of functional connectivity most critical for the behavior. We thus reveal how distributed neurons collaborate to generate behavior and illustrate a paradigm for distilling functional circuit models from whole-brain data. Copyright © 2016 Elsevier Inc. All rights reserved.

HDL to verification logic translator

NASA Technical Reports Server (NTRS)

Gambles, J. W.; Windley, P. J.

1992-01-01

The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

NASA Technical Reports Server (NTRS)

Baranauskas, Gytis (Inventor); Lim, Boon H. (Inventor); Baranauskas, Dalius (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor)

2017-01-01

According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

System and Method for Multi-Wavelength Optical Signal Detection

NASA Technical Reports Server (NTRS)

McGlone, Thomas D. (Inventor)

2017-01-01

The system and method for multi-wavelength optical signal detection enables the detection of optical signal levels significantly below those processed at the discrete circuit level by the use of mixed-signal processing methods implemented with integrated circuit technologies. The present invention is configured to detect and process small signals, which enables the reduction of the optical power required to stimulate detection networks, and lowers the required laser power to make specific measurements. The present invention provides an adaptation of active pixel networks combined with mixed-signal processing methods to provide an integer representation of the received signal as an output. The present invention also provides multi-wavelength laser detection circuits for use in various systems, such as a differential absorption light detection and ranging system.

Advanced On-Board Processor (AOP). [for future spacecraft applications

NASA Technical Reports Server (NTRS)

1973-01-01

Advanced On-board Processor the (AOP) uses large scale integration throughout and is the most advanced space qualified computer of its class in existence today. It was designed to satisfy most spacecraft requirements which are anticipated over the next several years. The AOP design utilizes custom metallized multigate arrays (CMMA) which have been designed specifically for this computer. This approach provides the most efficient use of circuits, reduces volume, weight, assembly costs and provides for a significant increase in reliability by the significant reduction in conventional circuit interconnections. The required 69 CMMA packages are assembled on a single multilayer printed circuit board which together with associated connectors constitutes the complete AOP. This approach also reduces conventional interconnections thus further reducing weight, volume and assembly costs.

Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits

PubMed Central

Khuri-Yakub, B. (Pierre) T.; Oralkan, Ömer; Nikoozadeh, Amin; Wygant, Ira O.; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N.; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O’Donnell, Matthew; Truong, Uyen; Sahn, David J.

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics. PMID:21097106

Simple photometer circuits using modular electronic components

NASA Technical Reports Server (NTRS)

Wampler, J. E.

1975-01-01

Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.

Region-specific spike frequency acceleration in Layer 5 pyramidal neurons mediated by Kv1 subunits

PubMed Central

Miller, Mark N; Okaty, Benjamin W; Nelson, Sacha B

2009-01-01

Separation of the cortical sheet into functionally distinct regions is a hallmark of neocortical organization. Cortical circuit function emerges from afferent and efferent connectivity, local connectivity within the cortical microcircuit, and the intrinsic membrane properties of neurons that comprise the circuit. While localization of functions to particular cortical areas can be partially accounted for by regional differences in both long range and local connectivity, it is unknown whether the intrinsic membrane properties of cortical cell-types differ between cortical regions. Here we report the first example of a region-specific firing type in layer 5 pyramidal neurons, and show that the intrinsic membrane and integrative properties of a discrete subtype of layer 5 pyramidal neurons differ between primary motor and somatosensory cortices due to region and cell-type-specific Kv1 subunit expression. PMID:19091962

Integrated circuits and logic operations based on single-layer MoS2.

PubMed

Radisavljevic, Branimir; Whitwick, Michael Brian; Kis, Andras

2011-12-27

Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS(2) represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS(2). Our integrated circuits are capable of operating as inverters, converting logical "1" into logical "0", with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS(2) transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.

LEC GaAs for integrated circuit applications

NASA Technical Reports Server (NTRS)

Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

1984-01-01

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

Microwave GaAs Integrated Circuits On Quartz Substrates

NASA Technical Reports Server (NTRS)

Siegel, Peter H.; Mehdi, Imran; Wilson, Barbara

1994-01-01

Integrated circuits for use in detecting electromagnetic radiation at millimeter and submillimeter wavelengths constructed by bonding GaAs-based integrated circuits onto quartz-substrate-based stripline circuits. Approach offers combined advantages of high-speed semiconductor active devices made only on epitaxially deposited GaAs substrates with low-dielectric-loss, mechanically rugged quartz substrates. Other potential applications include integration of antenna elements with active devices, using carrier substrates other than quartz to meet particular requirements using lifted-off GaAs layer in membrane configuration with quartz substrate supporting edges only, and using lift-off technique to fabricate ultrathin discrete devices diced separately and inserted into predefined larger circuits. In different device concept, quartz substrate utilized as transparent support for GaAs devices excited from back side by optical radiation.

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

PubMed

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

A closed-loop compressive-sensing-based neural recording system.

PubMed

Zhang, Jie; Mitra, Srinjoy; Suo, Yuanming; Cheng, Andrew; Xiong, Tao; Michon, Frederic; Welkenhuysen, Marleen; Kloosterman, Fabian; Chin, Peter S; Hsiao, Steven; Tran, Trac D; Yazicioglu, Firat; Etienne-Cummings, Ralph

2015-06-01

This paper describes a low power closed-loop compressive sensing (CS) based neural recording system. This system provides an efficient method to reduce data transmission bandwidth for implantable neural recording devices. By doing so, this technique reduces a majority of system power consumption which is dissipated at data readout interface. The design of the system is scalable and is a viable option for large scale integration of electrodes or recording sites onto a single device. The entire system consists of an application-specific integrated circuit (ASIC) with 4 recording readout channels with CS circuits, a real time off-chip CS recovery block and a recovery quality evaluation block that provides a closed feedback to adaptively adjust compression rate. Since CS performance is strongly signal dependent, the ASIC has been tested in vivo and with standard public neural databases. Implemented using efficient digital circuit, this system is able to achieve >10 times data compression on the entire neural spike band (500-6KHz) while consuming only 0.83uW (0.53 V voltage supply) additional digital power per electrode. When only the spikes are desired, the system is able to further compress the detected spikes by around 16 times. Unlike other similar systems, the characteristic spikes and inter-spike data can both be recovered which guarantes a >95% spike classification success rate. The compression circuit occupied 0.11mm(2)/electrode in a 180nm CMOS process. The complete signal processing circuit consumes <16uW/electrode. Power and area efficiency demonstrated by the system make it an ideal candidate for integration into large recording arrays containing thousands of electrode. Closed-loop recording and reconstruction performance evaluation further improves the robustness of the compression method, thus making the system more practical for long term recording.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

PubMed

Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

MAGIA2: from miRNA and genes expression data integrative analysis to microRNA–transcription factor mixed regulatory circuits (2012 update)

PubMed Central

Bisognin, Andrea; Sales, Gabriele; Coppe, Alessandro; Bortoluzzi, Stefania; Romualdi, Chiara

2012-01-01

MAGIA2 (http://gencomp.bio.unipd.it/magia2) is an update, extension and evolution of the MAGIA web tool. It is dedicated to the integrated analysis of in silico target prediction, microRNA (miRNA) and gene expression data for the reconstruction of post-transcriptional regulatory networks. miRNAs are fundamental post-transcriptional regulators of several key biological and pathological processes. As miRNAs act prevalently through target degradation, their expression profiles are expected to be inversely correlated to those of the target genes. Low specificity of target prediction algorithms makes integration approaches an interesting solution for target prediction refinement. MAGIA2 performs this integrative approach supporting different association measures, multiple organisms and almost all target predictions algorithms. Nevertheless, miRNAs activity should be viewed as part of a more complex scenario where regulatory elements and their interactors generate a highly connected network and where gene expression profiles are the result of different levels of regulation. The updated MAGIA2 tries to dissect this complexity by reconstructing mixed regulatory circuits involving either miRNA or transcription factor (TF) as regulators. Two types of circuits are identified: (i) a TF that regulates both a miRNA and its target and (ii) a miRNA that regulates both a TF and its target. PMID:22618880

Implantable neurotechnologies: a review of integrated circuit neural amplifiers

PubMed Central

Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V.

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification. PMID:26798055

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

Optimization of digital designs

NASA Technical Reports Server (NTRS)

Miles, Lowell H. (Inventor); Whitaker, Sterling R. (Inventor)

2009-01-01

An application specific integrated circuit is optimized by translating a first representation of its digital design to a second representation. The second representation includes multiple syntactic expressions that admit a representation of a higher-order function of base Boolean values. The syntactic expressions are manipulated to form a third representation of the digital design.

Technical Reliability Studies. EOS/ESD Technology Abstracts

DTIC Science & Technology

1982-01-01

RESISTANT BIPOLAR TRANSISTOR DESIGN AND ITS APPLICATIONS TO LINEAR INTEGRATED CIRCUITS 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR 15786 SOME...T.M. 16476 STATIC DISCHARGE MODELING TECHNIQUES FOR EVALUATION OF INTEGRATED (FET) CIRCUIT DESTRUCTION 16145 MODULE ELECTAOSTATIC DISCHARGE SIMULATOR...PLASTIC LSI CIRCUITS PRklE, L.A., II 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR PRICE, R.D. 13455 EVALUATION OF PLASTIC LSI CIRCUITS PSHAENICH, A

Silicon millimetre-wave integrated-circuit (SIMMWIC) SPST switch

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-10-01

The first silicon millimetre-wave integrated circuit (SIMMWIC) has been successfully fabricated. This circuit is a monolithic SPST switch with a 3 dB bandwidth of 20 percent and a minimum isolation of 21.6 dB across the band (centre frequency is 36.75 GHz). This monolithic circuit is a low-cost reproducible building block for all millimetre-wave control applications.

Demonstration of Inexact Computing Implemented in the JPEG Compression Algorithm using Probabilistic Boolean Logic applied to CMOS Components

DTIC Science & Technology

2015-12-24

Signal to Noise Ratio SPICE Simulation Program with Integrated Circuit Emphasis TIFF Tagged Image File Format USC University of Southern California xvii...sources can create errors in digital circuits. These effects can be simulated using Simulation Program with Integrated Circuit Emphasis ( SPICE ) or...compute summary statistics. 4.1 Circuit Simulations Noisy analog circuits can be simulated in SPICE or Cadence SpectreTM software via noisy voltage

Optical printed circuit board (O-PCB) and VLSI photonic integrated circuits: visions, challenges, and progresses

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Noh, H. S.; Kim, K. H.; Song, S. H.

2006-09-01

A collective overview and review is presented on the original work conducted on the theory, design, fabrication, and in-tegration of micro/nano-scale optical wires and photonic devices for applications in a newly-conceived photonic systems called "optical printed circuit board" (O-PCBs) and "VLSI photonic integrated circuits" (VLSI-PIC). These are aimed for compact, high-speed, multi-functional, intelligent, light-weight, low-energy and environmentally friendly, low-cost, and high-volume applications to complement or surpass the capabilities of electrical PCBs (E-PCBs) and/or VLSI electronic integrated circuit (VLSI-IC) systems. These consist of 2-dimensional or 3-dimensional planar arrays of micro/nano-optical wires and circuits to perform the functions of all-optical sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards or substrates. The integrated optical devices include micro/nano-scale waveguides, lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices, made of polymer, silicon and other semiconductor materials. For VLSI photonic integration, photonic crystals and plasmonic structures have been used. Scientific and technological issues concerning the processes of miniaturization, interconnection and integration of these systems as applicable to board-to-board, chip-to-chip, and intra-chip integration, are discussed along with applications for future computers, telecommunications, and sensor-systems. Visions and challenges toward these goals are also discussed.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ryu, C.; Boshier, M. G.

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore » electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

International Conference on Integrated Optical Circuit Engineering, 1st, Cambridge, MA, October 23-25, 1984, Proceedings

NASA Astrophysics Data System (ADS)

Ostrowsky, D. B.; Sriram, S.

Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

Design and fabrication of an infrared optical pyrometer ASIC as a diagnostic for shock physics experiments

NASA Astrophysics Data System (ADS)

Gordon, Jared

Optical pyrometry is the sensing of thermal radiation emitted from an object using a photoconductive device to convert photons into electrons, and is an important diagnostic tool in shock physics experiments. Data obtained from an optical pyrometer can be used to generate a blackbody curve of the material prior to and after being shocked by a high speed projectile. The sensing element consists of an InGaAs photodiode array, biasing circuitry, and multiple transimpedance amplifiers to boost the weak photocurrent from the noisy dark current into a signal that can eventually be digitized. Once the circuit elements have been defined, more often than not commercial-off-the-shelf (COTS) components are inadequate to satisfy every requirement for the diagnostic, and therefore a custom application specific design has to be considered. This thesis outlines the initial challenges with integrating the photodiode array block with multiple COTS transimpedance amplifiers onto a single chip, and offers a solution to a comparable optical pyrometer that uses the same type of photodiodes in conjunction with a re-designed transimpedance amplifier integrated onto a single chip. The final design includes a thorough analysis of the transimpedance amplifier along with modeling the circuit behavior which entails schematics, simulations, and layout. An alternative circuit is also investigated that incorporates an approach to multiplex the signals from each photodiode onto one data line and not only increases the viable real estate on the chip, but also improves the behavior of the photodiodes as they are subjected to less thermal load. The optical pyrometer application specific integrated circuit (ASIC) for shock physic experiments includes a transimpedance amplifier (TIA) with a 100 kΩ gain operating at bandwidth of 30 MHz, and an input-referred noise RMS current of 50 nA that is capable of driving a 50 Ω load.

Process development of beam-lead silicon-gate COS/MOS integrated circuits

NASA Technical Reports Server (NTRS)

Baptiste, B.; Boesenberg, W.

1974-01-01

Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.

Optimization Methods for Spiking Neurons and Networks

PubMed Central

Russell, Alexander; Orchard, Garrick; Dong, Yi; Mihalaş, Ştefan; Niebur, Ernst; Tapson, Jonathan; Etienne-Cummings, Ralph

2011-01-01

Spiking neurons and spiking neural circuits are finding uses in a multitude of tasks such as robotic locomotion control, neuroprosthetics, visual sensory processing, and audition. The desired neural output is achieved through the use of complex neuron models, or by combining multiple simple neurons into a network. In either case, a means for configuring the neuron or neural circuit is required. Manual manipulation of parameters is both time consuming and non-intuitive due to the nonlinear relationship between parameters and the neuron’s output. The complexity rises even further as the neurons are networked and the systems often become mathematically intractable. In large circuits, the desired behavior and timing of action potential trains may be known but the timing of the individual action potentials is unknown and unimportant, whereas in single neuron systems the timing of individual action potentials is critical. In this paper, we automate the process of finding parameters. To configure a single neuron we derive a maximum likelihood method for configuring a neuron model, specifically the Mihalas–Niebur Neuron. Similarly, to configure neural circuits, we show how we use genetic algorithms (GAs) to configure parameters for a network of simple integrate and fire with adaptation neurons. The GA approach is demonstrated both in software simulation and hardware implementation on a reconfigurable custom very large scale integration chip. PMID:20959265

The Effects of Space Radiation on Linear Integrated Circuit

NASA Technical Reports Server (NTRS)

Johnston, A.

2000-01-01

Permanent and transient effects are discussed that are induced in linear integrated circuits by space radiation. Recent developments include enhanced damage at low dose rate, increased damage from protons due to displacement effects, and transients in digital comparators that can cause circuit malfunctions.

35 GHz integrated circuit rectifying antenna with 33 percent efficiency

NASA Technical Reports Server (NTRS)

Yoo, T.-W.; Chang, K.

1991-01-01

A 35 GHz integrated circuit rectifying antenna (rectenna) has been developed using a microstrip dipole antenna and beam-lead mixer diode. Greater than 33 percent conversion efficiency has been achieved. The circuit should have applications in microwave/millimeter-wave power transmission and detection.

Advanced testing of the DEPFET minimatrix particle detector

NASA Astrophysics Data System (ADS)

Andricek, L.; Kodyš, P.; Koffmane, C.; Ninkovic, J.; Oswald, C.; Richter, R.; Ritter, A.; Rummel, S.; Scheirich, J.; Wassatsch, A.

2012-01-01

The DEPFET (DEPleted Field Effect Transistor) is an active pixel particle detector with a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) integrated in each pixel, providing first amplification stage of readout electronics. Excellent signal over noise performance is gained this way. The DEPFET sensor will be used as a vertex detector in the Belle II experiment at SuperKEKB, electron-positron collider in Japan. The vertex detector will be composed of two layers of pixel detectors (DEPFET) and four layers of strip detectors. The DEPFET sensor requires switching and current readout circuits for its operation. These circuits have been designed as ASICs (Application Specific Integrated Circuits) in several different versions, but they provide insufficient flexibility for precise detector testing. Therefore, a test system with a flexible control cycle range and minimal noise has been designed for testing and characterizing of small detector prototypes (Minimatrices). Sensors with different design layouts and thicknesses are produced in order to evaluate and select the one with the best performance for the Belle II application. Description of the test system as well as measurement results are presented.

Open Circuit Resonant Sensors for Composite Damage Detection and Diagnosis

NASA Technical Reports Server (NTRS)

Mielnik, John J., Jr.

2011-01-01

Under the Integrated Vehicle Health Management (IVHM) program work was begun to investigate the feasibility of sensor systems for detecting and diagnosing damage to aircraft composite structures and materials. Specific interest for this study was in damage initiated by environmental storm hazards and the direct effect of lightning strikes on the material structures of a composite aircraft in flight. A series of open circuit resonant sensors was designed, fabricated, characterized, and determined to be a potentially viable means for damage detection and diagnosis of composite materials. The results of this research and development effort are documented in this report.

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

NASA Technical Reports Server (NTRS)

Vasile, Stefan; Lipson, Jerold

2012-01-01

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Dictionary-based image reconstruction for superresolution in integrated circuit imaging.

PubMed

Cilingiroglu, T Berkin; Uyar, Aydan; Tuysuzoglu, Ahmet; Karl, W Clem; Konrad, Janusz; Goldberg, Bennett B; Ünlü, M Selim

2015-06-01

Resolution improvement through signal processing techniques for integrated circuit imaging is becoming more crucial as the rapid decrease in integrated circuit dimensions continues. Although there is a significant effort to push the limits of optical resolution for backside fault analysis through the use of solid immersion lenses, higher order laser beams, and beam apodization, signal processing techniques are required for additional improvement. In this work, we propose a sparse image reconstruction framework which couples overcomplete dictionary-based representation with a physics-based forward model to improve resolution and localization accuracy in high numerical aperture confocal microscopy systems for backside optical integrated circuit analysis. The effectiveness of the framework is demonstrated on experimental data.

Genetic programs constructed from layered logic gates in single cells

PubMed Central

Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

2014-01-01

Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

Study of switching electric circuits with DC hybrid breaker, one stage

NASA Astrophysics Data System (ADS)

Niculescu, T.; Marcu, M.; Popescu, F. G.

2016-06-01

The paper presents a method of extinguishing the electric arc that occurs between the contacts of direct current breakers. The method consists of using an LC type extinguishing group to be optimally sized. From this point of view is presented a theoretical approach to the phenomena that occurs immediately after disconnecting the load and the specific diagrams are drawn. Using these, the elements extinguishing group we can choose. At the second part of the paper there is presented an analyses of the circuit switching process by decomposing the process in particular time sequences. For every time interval there was conceived a numerical simulation model in MATLAB-SIMULINK medium which integrates the characteristic differential equation and plots the capacitor voltage variation diagram and the circuit dumping current diagram.

Neuromorphic Silicon Neuron Circuits

PubMed Central

Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

2011-01-01

Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

PDF-1 neuropeptide signaling modulates a neural circuit for mate-searching behavior in C. elegans.

PubMed

Barrios, Arantza; Ghosh, Rajarshi; Fang, Chunhui; Emmons, Scott W; Barr, Maureen M

2012-12-01

Appetitive behaviors require complex decision making that involves the integration of environmental stimuli and physiological needs. C. elegans mate searching is a male-specific exploratory behavior regulated by two competing needs: food and reproductive appetite. We found that the pigment dispersing factor receptor (PDFR-1) modulates the circuit that encodes the male reproductive drive that promotes male exploration following mate deprivation. PDFR-1 and its ligand, PDF-1, stimulated mate searching in the male, but not in the hermaphrodite. pdf-1 was required in the gender-shared interneuron AIM, and the receptor acted in internal and external environment-sensing neurons of the shared nervous system (URY, PQR and PHA) to produce mate-searching behavior. Thus, the pdf-1 and pdfr-1 pathway functions in non-sex-specific neurons to produce a male-specific, goal-oriented exploratory behavior. Our results indicate that secretin neuropeptidergic signaling is involved in regulating motivational internal states.

Technology CAD for integrated circuit fabrication technology development and technology transfer

NASA Astrophysics Data System (ADS)

Saha, Samar

2003-07-01

In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are used to optimize the device and process parameters to develop a new generation of IC manufacturing technology by reverse engineering from the target product specifications. While in technology transfer to manufacturing co-location, TCAD is used for process centering with respect to high-volume manufacturing equipment of the target manufacturing equipment of the target manufacturing facility. A quantitative model is developed to demonstrate the potential benefits of the simulation-based methodology in reducing the cycle time and cost of typical technology development and technology transfer projects over the traditional practices. The strategy for predictive simulation to improve the effectiveness of a TCAD-based project, is also discussed.

A front end readout electronics ASIC chip for position sensitive solid state detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kravis, S.D.; Tuemer, T.O.; Visser, G.J.

1998-12-31

A mixed signal Application Specific Integrated Circuit (ASIC) chip for front end readout electronics of position sensitive solid state detectors has been manufactured. It is called RENA (Readout Electronics for Nuclear Applications). This chip can be used for both medical and industrial imaging of X-rays and gamma rays. The RENA chip is a monolithic integrated circuit and has 32 channels with low noise high input impedance charge sensitive amplifiers. It works in pulse counting mode with good energy resolution. It also has a self triggering output which is essential for nuclear applications when the incident radiation arrives at random. Different,more » externally selectable, operational modes that includes a sparse readout mode is available to increase data throughput. It also has externally selectable shaping (peaking) times.« less

Force-controlled inorganic crystallization lithography.

PubMed

Cheng, Chao-Min; LeDuc, Philip R

2006-09-20

Lithography plays a key role in integrated circuits, optics, information technology, biomedical applications, catalysis, and separation technologies. However, inorganic lithography techniques remain of limited utility for applications outside of the typical foci of integrated circuit manufacturing. In this communication, we have developed a novel stamping method that applies pressure on the upper surface of the stamp to regulate the dewetting process of the inorganic buffer and the evaporation rate of the solvent in this buffer between the substrate and the surface of the stamp. We focused on generating inorganic microstructures with specific locations and also on enabling the ability to pattern gradients during the crystallization of the inorganic salts. This approach utilized a combination of lithography with bottom-up growth and assembly of inorganic crystals. This work has potential applications in a variety of fields, including studying inorganic material patterning and small-scale fabrication technology.

Microbatteries for Combinatorial Studies of Conventional Lithium-Ion Batteries

NASA Technical Reports Server (NTRS)

West, William; Whitacre, Jay; Bugga, Ratnakumar

2003-01-01

Integrated arrays of microscopic solid-state batteries have been demonstrated in a continuing effort to develop microscopic sources of power and of voltage reference circuits to be incorporated into low-power integrated circuits. Perhaps even more importantly, arrays of microscopic batteries can be fabricated and tested in combinatorial experiments directed toward optimization and discovery of battery materials. The value of the combinatorial approach to optimization and discovery has been proven in the optoelectronic, pharmaceutical, and bioengineering industries. Depending on the specific application, the combinatorial approach can involve the investigation of hundreds or even thousands of different combinations; hence, it is time-consuming and expensive to attempt to implement the combinatorial approach by building and testing full-size, discrete cells and batteries. The conception of microbattery arrays makes it practical to bring the advantages of the combinatorial approach to the development of batteries.

Operational considerations of the Advanced Photovoltaic Solar Array

NASA Technical Reports Server (NTRS)

Stella, Paul M.; Kurland, Richard M.

1992-01-01

Issues affecting the long-term operational performance of the Advanced Photovoltaic Solar Array (APSA) are discussed, with particular attention given to circuit electrical integrity from shadowed and cracked cell modules. The successful integration of individual advanced array components provides a doubling of array specific performance from the previous NASA-developed advanced array (SAFE). Flight test modules both recently fabricated and under fabrication are described. The development of advanced high-performance blanket technology for future APSA enhancement is presented.

Three Dimensional Integration and On-Wafer Packaging for Heterogeneous Wafer-Scale Circuit Architectures

DTIC Science & Technology

2006-11-01

Chip Level CMOS Chip High resistivity Si Metal Interconnect 25μm 24GHz fully integrated receiver CMOS transimpedance Amplifier (13GHz BW, 52dBΩ...power of a high-resistivity SiGe power amplifier chip with the wide operating frequency range and compactness of a CMOS mixed signal chip operating...With good RF channel selectivity, system specifications such as the linearity of the low noise amplifier (LNA), the phase noise of the voltage

Operational considerations of the Advanced Photovoltaic Solar Array

NASA Astrophysics Data System (ADS)

Stella, Paul M.; Kurland, Richard M.

Issues affecting the long-term operational performance of the Advanced Photovoltaic Solar Array (APSA) are discussed, with particular attention given to circuit electrical integrity from shadowed and cracked cell modules. The successful integration of individual advanced array components provides a doubling of array specific performance from the previous NASA-developed advanced array (SAFE). Flight test modules both recently fabricated and under fabrication are described. The development of advanced high-performance blanket technology for future APSA enhancement is presented.

Recent advances in integrated photonic sensors.

PubMed

Passaro, Vittorio M N; de Tullio, Corrado; Troia, Benedetto; La Notte, Mario; Giannoccaro, Giovanni; De Leonardis, Francesco

2012-11-09

Nowadays, optical devices and circuits are becoming fundamental components in several application fields such as medicine, biotechnology, automotive, aerospace, food quality control, chemistry, to name a few. In this context, we propose a complete review on integrated photonic sensors, with specific attention to materials, technologies, architectures and optical sensing principles. To this aim, sensing principles commonly used in optical detection are presented, focusing on sensor performance features such as sensitivity, selectivity and rangeability. Since photonic sensors provide substantial benefits regarding compatibility with CMOS technology and integration on chips characterized by micrometric footprints, design and optimization strategies of photonic devices are widely discussed for sensing applications. In addition, several numerical methods employed in photonic circuits and devices, simulations and design are presented, focusing on their advantages and drawbacks. Finally, recent developments in the field of photonic sensing are reviewed, considering advanced photonic sensor architectures based on linear and non-linear optical effects and to be employed in chemical/biochemical sensing, angular velocity and electric field detection.

Recent Advances in Integrated Photonic Sensors

PubMed Central

Passaro, Vittorio M. N.; de Tullio, Corrado; Troia, Benedetto; La Notte, Mario; Giannoccaro, Giovanni; De Leonardis, Francesco

2012-01-01

Nowadays, optical devices and circuits are becoming fundamental components in several application fields such as medicine, biotechnology, automotive, aerospace, food quality control, chemistry, to name a few. In this context, we propose a complete review on integrated photonic sensors, with specific attention to materials, technologies, architectures and optical sensing principles. To this aim, sensing principles commonly used in optical detection are presented, focusing on sensor performance features such as sensitivity, selectivity and rangeability. Since photonic sensors provide substantial benefits regarding compatibility with CMOS technology and integration on chips characterized by micrometric footprints, design and optimization strategies of photonic devices are widely discussed for sensing applications. In addition, several numerical methods employed in photonic circuits and devices, simulations and design are presented, focusing on their advantages and drawbacks. Finally, recent developments in the field of photonic sensing are reviewed, considering advanced photonic sensor architectures based on linear and non-linear optical effects and to be employed in chemical/biochemical sensing, angular velocity and electric field detection. PMID:23202223

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit

PubMed Central

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed

2017-01-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for −4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz. PMID:28763043

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit.

PubMed

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed; Kanaya, Haruichi

2017-08-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for -4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

Micromachined integrated quantum circuit containing a superconducting qubit

NASA Astrophysics Data System (ADS)

Brecht, Teresa; Chu, Yiwen; Axline, Christopher; Pfaff, Wolfgang; Blumoff, Jacob; Chou, Kevin; Krayzman, Lev; Frunzio, Luigi; Schoelkopf, Robert

We demonstrate a functional multilayer microwave integrated quantum circuit (MMIQC). This novel hardware architecture combines the high coherence and isolation of three-dimensional structures with the advantages of integrated circuits made with lithographic techniques. We present fabrication and measurement of a two-cavity/one-qubit prototype, including a transmon coupled to a three-dimensional microwave cavity micromachined in a silicon wafer. It comprises a simple MMIQC with competitive lifetimes and the ability to perform circuit QED operations in the strong dispersive regime. Furthermore, the design and fabrication techniques that we have developed are extensible to more complex quantum information processing devices.

Innovative applications of artificial intelligence

NASA Astrophysics Data System (ADS)

Schorr, Herbert; Rappaport, Alain

Papers concerning applications of artificial intelligence are presented, covering applications in aerospace technology, banking and finance, biotechnology, emergency services, law, media planning, music, the military, operations management, personnel management, retail packaging, and manufacturing assembly and design. Specific topics include Space Shuttle telemetry monitoring, an intelligent training system for Space Shuttle flight controllers, an expert system for the diagnostics of manufacturing equipment, a logistics management system, a cooling systems design assistant, and a knowledge-based integrated circuit design critic. Additional topics include a hydraulic circuit design assistant, the use of a connector assembly specification expert system to harness detailed assembly process knowledge, a mixed initiative approach to airlift planning, naval battle management decision aids, an inventory simulation tool, a peptide synthesis expert system, and a system for planning the discharging and loading of container ships.

Power system with an integrated lubrication circuit

DOEpatents

Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

2009-11-10

A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

Low-power integrated-circuit driver for ferrite-memory word lines

NASA Technical Reports Server (NTRS)

Katz, S.

1970-01-01

Composite circuit uses both n-p-n bipolar and p-channel MOS transistors /BIMOS/. The BIMOS driver provides 1/ ease of integrated circuit construction, 2/ low standby power consumption, 3/ bidirectional current pulses, and 4/ current-pulse amplitudes and rise times independent of active device parameters.

Aluminum heat sink enables power transistors to be mounted integrally with printed circuit board

NASA Technical Reports Server (NTRS)

Seaward, R. C.

1967-01-01

Power transistor is provided with an integral flat plate aluminum heat sink which mounts directly on a printed circuit board containing associated circuitry. Standoff spacers are used to attach the heat sink to the printed circuit board containing the remainder of the circuitry.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

Multi-lead heat sink

DOEpatents

Roose, L.D.

1984-07-03

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again. 4 figs.

Multi-lead heat sink

DOEpatents

Roose, Lars D.

1984-01-01

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

Multi-lead heat sink

DOEpatents

Roose, L.D.

1982-08-25

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

NASA Astrophysics Data System (ADS)

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-02-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design.

ASIC For Complex Fixed-Point Arithmetic

NASA Technical Reports Server (NTRS)

Petilli, Stephen G.; Grimm, Michael J.; Olson, Erlend M.

1995-01-01

Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.

An Analysis of Heavy-Ion Single Event Effects for a Variety of Finite State-Machine Mitigation Strategies

NASA Technical Reports Server (NTRS)

Berg, Melanie D.; Label, Kenneth A.; Kim, Hak; Phan, Anthony; Seidleck, Christina

2014-01-01

Finite state-machines (FSMs) are used to control operational flow in application specific integrated circuits (ASICs) and field programmable gate array (FPGA) devices. Because of their ease of interpretation, FSMs simplify the design and verification process and consequently are significant components in a synchronous design.

Photonic emitters and circuits based on colloidal quantum dot composites

NASA Astrophysics Data System (ADS)

Menon, Vinod M.; Husaini, Saima; Valappil, Nikesh; Luberto, Matthew

2009-02-01

We discuss our work on light emitters and photonic circuits realized using colloidal quantum dot composites. Specifically we will report our recent work on flexible microcavity laser, microdisk emitters and integrated active - passive waveguides. The entire microcavity laser structure was realized using spin coating and consisted of an all-polymer distributed Bragg reflector with a poly-vinyl carbazole cavity layer embedded with InGaP/ZnS colloidal quantum dots. These microcavities can be peeled off the substrate yielding a flexible structure that can conform to any shape and whose emission spectra can be mechanically tuned. The microdisk emitters and the integrated waveguide structures were realized using soft lithography and photo-lithography, respectively and were fabricated using a composite consisting of quantum dots embedded in SU8 matrix. Finally, we will discuss the effect of the host matrix on the optical properties of the quantum dots using results of steady-state and time-resolved luminescence measurements. In addition to their specific functionalities, these novel device demonstrations and their development present a low cost alternative to the traditional photonic device fabrication techniques.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Oler, Kiri J.; Miller, Carl H.

In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

Directly writing resistor, inductor and capacitor to composite functional circuits: a super-simple way for alternative electronics.

PubMed

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics.

Directly Writing Resistor, Inductor and Capacitor to Composite Functional Circuits: A Super-Simple Way for Alternative Electronics

PubMed Central

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

Background The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Methods Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Results Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. Conclusions The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics. PMID:23936349

Targeting circuits

PubMed Central

Rajasethupathy, Priyamvada; Ferenczi, Emily; Deisseroth, Karl

2017-01-01

Current optogenetic methodology enables precise inhibition or excitation of neural circuits, spanning timescales as needed from the acute (milliseconds) to the chronic (many days or more), for experimental modulation of network activity and animal behavior. Such broad temporal versatility, unique to optogenetic control, is particularly powerful when combined with brain activity measurements that span both acute and chronic timescales as well. This enables, for instance, the study of adaptive circuit dynamics across the intact brain, and tuning interventions to match activity patterns naturally observed during behavior in the same individual. Although the impact of this approach has been greater on basic research than on clinical translation, it is natural to ask if specific neural circuit activity patterns discovered to be involved in controlling adaptive or maladaptive behaviors could become targets for treatment of neuropsychiatric diseases. Here we consider the landscape of such ideas related to therapeutic targeting of circuit dynamics, taking note of developments not only in optical but also in ultrasonic, magnetic, and thermal methods. We note the recent emergence of first-in-kind optogenetically-guided clinical outcomes, as well as opportunities related to the integration of interventions and readouts spanning diverse circuit-physiology, molecular, and behavioral modalities. PMID:27104976

Artificial immune system algorithm in VLSI circuit configuration

NASA Astrophysics Data System (ADS)

Mansor, Mohd. Asyraf; Sathasivam, Saratha; Kasihmuddin, Mohd Shareduwan Mohd

2017-08-01

In artificial intelligence, the artificial immune system is a robust bio-inspired heuristic method, extensively used in solving many constraint optimization problems, anomaly detection, and pattern recognition. This paper discusses the implementation and performance of artificial immune system (AIS) algorithm integrated with Hopfield neural networks for VLSI circuit configuration based on 3-Satisfiability problems. Specifically, we emphasized on the clonal selection technique in our binary artificial immune system algorithm. We restrict our logic construction to 3-Satisfiability (3-SAT) clauses in order to outfit with the transistor configuration in VLSI circuit. The core impetus of this research is to find an ideal hybrid model to assist in the VLSI circuit configuration. In this paper, we compared the artificial immune system (AIS) algorithm (HNN-3SATAIS) with the brute force algorithm incorporated with Hopfield neural network (HNN-3SATBF). Microsoft Visual C++ 2013 was used as a platform for training, simulating and validating the performances of the proposed network. The results depict that the HNN-3SATAIS outperformed HNN-3SATBF in terms of circuit accuracy and CPU time. Thus, HNN-3SATAIS can be used to detect an early error in the VLSI circuit design.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

System-Level Integrated Circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

System-level integrated circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

Free-world microelectronic manufacturing equipment

NASA Astrophysics Data System (ADS)

Kilby, J. S.; Arnold, W. H.; Booth, W. T.; Cunningham, J. A.; Hutcheson, J. D.; Owen, R. W.; Runyan, W. R.; McKenney, Barbara L.; McGrain, Moira; Taub, Renee G.

1988-12-01

Equipment is examined and evaluated for the manufacture of microelectronic integrated circuit devices and sources for that equipment within the Free World. Equipment suitable for the following are examined: single-crystal silicon slice manufacturing and processing; required lithographic processes; wafer processing; device packaging; and test of digital integrated circuits. Availability of the equipment is also discussed, now and in the near future. Very adequate equipment for most stages of the integrated circuit manufacturing process is available from several sources, in different countries, although the best and most widely used versions of most manufacturing equipment are made in the United States or Japan. There is also an active market in used equipment, suitable for manufacture of capable integrated circuits with performance somewhat short of the present state of the art.

Chemical sensors fabricated by a photonic integrated circuit foundry

NASA Astrophysics Data System (ADS)

Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

2018-02-01

We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

Hybrid stretchable circuits on silicone substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk; Liu, Q.

When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

An Electronics Course Emphasizing Circuit Design

ERIC Educational Resources Information Center

Bergeson, Haven E.

1975-01-01

Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

Prototype Parts of a Digital Beam-Forming Wide-Band Receiver

NASA Technical Reports Server (NTRS)

Kaplan, Steven B.; Pylov, Sergey V.; Pambianchi, Michael

2003-01-01

Some prototype parts of a digital beamforming (DBF) receiver that would operate at multigigahertz carrier frequencies have been developed. The beam-forming algorithm in a DBF receiver processes signals from multiple antenna elements with appropriate time delays and weighting factors chosen to enhance the reception of signals from a specific direction while suppressing signals from other directions. Such a receiver would be used in the directional reception of weak wideband signals -- for example, spread-spectrum signals from a low-power transmitter on an Earth-orbiting spacecraft or other distant source. The prototype parts include superconducting components on integrated-circuit chips, and a multichip module (MCM), within which the chips are to be packaged and connected via special inter-chip-communication circuits. The design and the underlying principle of operation are based on the use of the rapid single-flux quantum (RSFQ) family of logic circuits to obtain the required processing speed and signal-to-noise ratio. RSFQ circuits are superconducting circuits that exploit the Josephson effect. They are well suited for this application, having been proven to perform well in some circuits at frequencies above 100 GHz. In order to maintain the superconductivity needed for proper functioning of the RSFQ circuits, the MCM must be kept in a cryogenic environment during operation.

Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

PubMed

Cao, Qing; Kim, Hoon-sik; Pimparkar, Ninad; Kulkarni, Jaydeep P; Wang, Congjun; Shim, Moonsub; Roy, Kaushik; Alam, Muhammad A; Rogers, John A

2008-07-24

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm(2) V(-1) s(-1), subthreshold slopes as low as 140 m V dec(-1), operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 10(5), switching speeds in the kilohertz range even for coarse (approximately 100-microm) device geometries, and good mechanical flexibility-all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Integrated-Circuit Pseudorandom-Number Generator

NASA Technical Reports Server (NTRS)

Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

1992-01-01

Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

Long life assurance study for manned spacecraft long life hardware. Volume 2: Long life assurance studies of EEE parts and packaging

NASA Technical Reports Server (NTRS)

1972-01-01

Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.

Asymmetric Memory Circuit Would Resist Soft Errors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Perlman, Marvin

1990-01-01

Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities.

Radiation damage in MOS integrated circuits, Part 1

NASA Technical Reports Server (NTRS)

Danchenko, V.

1971-01-01

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

NASA Technical Reports Server (NTRS)

Leonard, Regis F. (Editor); Bhasin, Kul B. (Editor)

1991-01-01

Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure.

Integrated Electrode Arrays for Neuro-Prosthetic Implants

NASA Technical Reports Server (NTRS)

Brandon, Erik; Mojarradi, Mohammede

2003-01-01

Arrays of electrodes integrated with chip-scale packages and silicon-based integrated circuits have been proposed for use as medical electronic implants, including neuro-prosthetic devices that might be implanted in brains of patients who suffer from strokes, spinal-cord injuries, or amyotrophic lateral sclerosis. The electrodes of such a device would pick up signals from neurons in the cerebral cortex, and the integrated circuit would perform acquisition and preprocessing of signal data. The output of the integrated circuit could be used to generate, for example, commands for a robotic arm. Electrode arrays capable of acquiring electrical signals from neurons already exist, but heretofore, there has been no convenient means to integrate these arrays with integrated-circuit chips. Such integration is needed in order to eliminate the need for the extensive cabling now used to pass neural signals to data-acquisition and -processing equipment outside the body. The proposed integration would enable progress toward neuro-prostheses that would be less restrictive of patients mobility. An array of electrodes would comprise a set of thin wires of suitable length and composition protruding from and supported by a fine-pitch micro-ball grid array or chip-scale package (see figure). The associated integrated circuit would be mounted on the package face opposite the probe face, using the solder bumps (the balls of the ball grid array) to make the electrical connections between the probes and the input terminals of the integrated circuit. The key innovation is the insertion of probe wires of the appropriate length and material into the solder bumps through a reflow process, thereby fixing the probes in place and electrically connecting them with the integrated circuit. The probes could be tailored to any distribution of lengths and made of any suitable metal that could be drawn into fine wires. Furthermore, the wires could be coated with an insulating layer using anodization or other processes, to achieve the correct electrical impedance. The probe wires and the packaging materials must be biocompatible using such materials as lead-free solders. For protection, the chip and package can be coated with parylene.

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array—Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique

PubMed Central

Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-01-01

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array—application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384. PMID:28672813

Defective sensorimotor integration in preparation for reaction time tasks in patients with multiple sclerosis.

PubMed

Cabib, Christopher; Llufriu, Sara; Casanova-Molla, Jordi; Saiz, Albert; Valls-Solé, Josep

2015-03-01

Slowness of voluntary movements in patients with multiple sclerosis (MS) may be due to various factors, including attentional and cognitive deficits, delays in motor conduction time, and impairment of specific central nervous system circuits. In 13 healthy volunteers and 20 mildly disabled, relapsing-remitting MS patients, we examined simple reaction time (SRT) tasks requiring sensorimotor integration in circuits involving the corpus callosum and the brain stem. A somatosensory stimulus was used as the imperative signal (IS), and subjects were requested to react with either the ipsilateral or the contralateral hand (uncrossed vs. crossed SRT). In 33% of trials, a startling auditory stimulus was presented together with the IS, and the percentage reaction time change with respect to baseline SRT trials was measured (StartReact effect). The difference between crossed and uncrossed SRT, which requires interhemispheric conduction, was significantly larger in patients than in healthy subjects (P = 0.021). The StartReact effect, which involves activation of brain stem motor pathways, was reduced significantly in patients with respect to healthy subjects (uncrossed trials: P = 0.015; crossed trials: P = 0.005). In patients, a barely significant correlation was found between SRT delay and conduction abnormalities in motor and sensory pathways (P = 0.02 and P = 0.04, respectively). The abnormalities found specifically in trials reflecting interhemispheric transfer of information, as well as the evidence for reduced subcortical motor preparation, indicate that a delay in reaction time execution in MS patients cannot be explained solely by conduction slowing in motor and sensory pathways but suggest, instead, defective sensorimotor integration mechanisms in at least the two circuits examined. Copyright © 2015 The American Physiological Society.

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

PubMed

Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-06-24

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

PubMed Central

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-01-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design. PMID:28145438

Column-parallel correlated multiple sampling circuits for CMOS image sensors and their noise reduction effects.

PubMed

Suh, Sungho; Itoh, Shinya; Aoyama, Satoshi; Kawahito, Shoji

2010-01-01

For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and their noise reduction effects. In the CMS, the gain of the noise cancelling is controlled by the number of samplings. It has a similar effect to that of an amplified CDS for the thermal noise but is a little more effective for 1/f and RTS noises. Two types of the CMS with simple integration and folding integration are proposed. In the folding integration, the output signal swing is suppressed by a negative feedback using a comparator and one-bit D-to-A converter. The CMS circuit using the folding integration technique allows to realize a very low-noise level while maintaining a wide dynamic range. The noise reduction effects of their circuits have been investigated with a noise analysis and an implementation of a 1Mpixel pinned photodiode CMOS image sensor. Using 16 samplings, dynamic range of 59.4 dB and noise level of 1.9 e(-) for the simple integration CMS and 75 dB and 2.2 e(-) for the folding integration CMS, respectively, are obtained.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.

Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

NASA Astrophysics Data System (ADS)

Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

2017-04-01

A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

Cerebro-cerebellar circuits in autism spectrum disorder.

PubMed

D'Mello, Anila M; Stoodley, Catherine J

2015-01-01

The cerebellum is one of the most consistent sites of abnormality in autism spectrum disorder (ASD) and cerebellar damage is associated with an increased risk of ASD symptoms, suggesting that cerebellar dysfunction may play a crucial role in the etiology of ASD. The cerebellum forms multiple closed-loop circuits with cerebral cortical regions that underpin movement, language, and social processing. Through these circuits, cerebellar dysfunction could impact the core ASD symptoms of social and communication deficits and repetitive and stereotyped behaviors. The emerging topography of sensorimotor, cognitive, and affective subregions in the cerebellum provides a new framework for interpreting the significance of regional cerebellar findings in ASD and their relationship to broader cerebro-cerebellar circuits. Further, recent research supports the idea that the integrity of cerebro-cerebellar loops might be important for early cortical development; disruptions in specific cerebro-cerebellar loops in ASD might impede the specialization of cortical regions involved in motor control, language, and social interaction, leading to impairments in these domains. Consistent with this concept, structural, and functional differences in sensorimotor regions of the cerebellum and sensorimotor cerebro-cerebellar circuits are associated with deficits in motor control and increased repetitive and stereotyped behaviors in ASD. Further, communication and social impairments are associated with atypical activation and structure in cerebro-cerebellar loops underpinning language and social cognition. Finally, there is converging evidence from structural, functional, and connectivity neuroimaging studies that cerebellar right Crus I/II abnormalities are related to more severe ASD impairments in all domains. We propose that cerebellar abnormalities may disrupt optimization of both structure and function in specific cerebro-cerebellar circuits in ASD.

Cerebro-cerebellar circuits in autism spectrum disorder

PubMed Central

D'Mello, Anila M.; Stoodley, Catherine J.

2015-01-01

The cerebellum is one of the most consistent sites of abnormality in autism spectrum disorder (ASD) and cerebellar damage is associated with an increased risk of ASD symptoms, suggesting that cerebellar dysfunction may play a crucial role in the etiology of ASD. The cerebellum forms multiple closed-loop circuits with cerebral cortical regions that underpin movement, language, and social processing. Through these circuits, cerebellar dysfunction could impact the core ASD symptoms of social and communication deficits and repetitive and stereotyped behaviors. The emerging topography of sensorimotor, cognitive, and affective subregions in the cerebellum provides a new framework for interpreting the significance of regional cerebellar findings in ASD and their relationship to broader cerebro-cerebellar circuits. Further, recent research supports the idea that the integrity of cerebro-cerebellar loops might be important for early cortical development; disruptions in specific cerebro-cerebellar loops in ASD might impede the specialization of cortical regions involved in motor control, language, and social interaction, leading to impairments in these domains. Consistent with this concept, structural, and functional differences in sensorimotor regions of the cerebellum and sensorimotor cerebro-cerebellar circuits are associated with deficits in motor control and increased repetitive and stereotyped behaviors in ASD. Further, communication and social impairments are associated with atypical activation and structure in cerebro-cerebellar loops underpinning language and social cognition. Finally, there is converging evidence from structural, functional, and connectivity neuroimaging studies that cerebellar right Crus I/II abnormalities are related to more severe ASD impairments in all domains. We propose that cerebellar abnormalities may disrupt optimization of both structure and function in specific cerebro-cerebellar circuits in ASD. PMID:26594140

Hybrid integrated biological-solid-state system powered with adenosine triphosphate.

PubMed

Roseman, Jared M; Lin, Jianxun; Ramakrishnan, Siddharth; Rosenstein, Jacob K; Shepard, Kenneth L

2015-12-07

There is enormous potential in combining the capabilities of the biological and the solid state to create hybrid engineered systems. While there have been recent efforts to harness power from naturally occurring potentials in living systems in plants and animals to power complementary metal-oxide-semiconductor integrated circuits, here we report the first successful effort to isolate the energetics of an electrogenic ion pump in an engineered in vitro environment to power such an artificial system. An integrated circuit is powered by adenosine triphosphate through the action of Na(+)/K(+) adenosine triphosphatases in an integrated in vitro lipid bilayer membrane. The ion pumps (active in the membrane at numbers exceeding 2 × 10(6) mm(-2)) are able to sustain a short-circuit current of 32.6 pA mm(-2) and an open-circuit voltage of 78 mV, providing for a maximum power transfer of 1.27 pW mm(-2) from a single bilayer. Two series-stacked bilayers provide a voltage sufficient to operate an integrated circuit with a conversion efficiency of chemical to electrical energy of 14.9%.

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, A.D.; Haigh, R.E.; Hugenberg, K.F.

1995-09-26

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place. 7 figs.

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, Alan D.; Haigh, Ronald E.; Hugenberg, Keith F.

1995-01-01

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place.

Cost optimization in low volume VLSI circuits

NASA Technical Reports Server (NTRS)

Cook, K. B., Jr.; Kerns, D. V., Jr.

1982-01-01

The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

Selective Manipulation of Neural Circuits.

PubMed

Park, Hong Geun; Carmel, Jason B

2016-04-01

Unraveling the complex network of neural circuits that form the nervous system demands tools that can manipulate specific circuits. The recent evolution of genetic tools to target neural circuits allows an unprecedented precision in elucidating their function. Here we describe two general approaches for achieving circuit specificity. The first uses the genetic identity of a cell, such as a transcription factor unique to a circuit, to drive expression of a molecule that can manipulate cell function. The second uses the spatial connectivity of a circuit to achieve specificity: one genetic element is introduced at the origin of a circuit and the other at its termination. When the two genetic elements combine within a neuron, they can alter its function. These two general approaches can be combined to allow manipulation of neurons with a specific genetic identity by introducing a regulatory gene into the origin or termination of the circuit. We consider the advantages and disadvantages of both these general approaches with regard to specificity and efficacy of the manipulations. We also review the genetic techniques that allow gain- and loss-of-function within specific neural circuits. These approaches introduce light-sensitive channels (optogenetic) or drug sensitive channels (chemogenetic) into neurons that form specific circuits. We compare these tools with others developed for circuit-specific manipulation and describe the advantages of each. Finally, we discuss how these tools might be applied for identification of the neural circuits that mediate behavior and for repair of neural connections.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, X.

1996-12-17

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window. 5 figs.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, Xucheng

1996-01-01

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window.

Disposable photonic integrated circuits for evanescent wave sensors by ultra-high volume roll-to-roll method.

PubMed

Aikio, Sanna; Hiltunen, Jussi; Hiitola-Keinänen, Johanna; Hiltunen, Marianne; Kontturi, Ville; Siitonen, Samuli; Puustinen, Jarkko; Karioja, Pentti

2016-02-08

Flexible photonic integrated circuit technology is an emerging field expanding the usage possibilities of photonics, particularly in sensor applications, by enabling the realization of conformable devices and introduction of new alternative production methods. Here, we demonstrate that disposable polymeric photonic integrated circuit devices can be produced in lengths of hundreds of meters by ultra-high volume roll-to-roll methods on a flexible carrier. Attenuation properties of hundreds of individual devices were measured confirming that waveguides with good and repeatable performance were fabricated. We also demonstrate the applicability of the devices for the evanescent wave sensing of ambient refractive index. The production of integrated photonic devices using ultra-high volume fabrication, in a similar manner as paper is produced, may inherently expand methods of manufacturing low-cost disposable photonic integrated circuits for a wide range of sensor applications.

Package for integrated optic circuit and method

DOEpatents

Kravitz, Stanley H.; Hadley, G. Ronald; Warren, Mial E.; Carson, Richard F.; Armendariz, Marcelino G.

1998-01-01

A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-29

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-08

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc B.; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Ouellette, Michael R.; Strissel, Scott A.

2007-12-18

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Package for integrated optic circuit and method

DOEpatents

Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

1998-08-04

A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

Silica Integrated Optical Circuits Based on Glass Photosensitivity

NASA Technical Reports Server (NTRS)

Abushagur, Mustafa A. G.

1999-01-01

Integrated optical circuits play a major rule in the new photonics technology both in communication and sensing due to their small size and compatibility with integrated circuits. Currently integrated optical circuits (IOCs) are fabricated using similar manufacturing to those used in the semiconductor industry. In this study we are considering a new technique to fabricate IOCs which does not require layers of photolithography, depositing and etching. This method is based on the photosensitivity of germanosilicate glasses. Waveguides and other IOC devises can be patterned in these glasses by exposing them using UV lasers. This exposure by UV light changes the index of refraction of the germanosilicate glass. This technique enjoys both the simplicity and flexibility of design and fabrication with also the potential of being fast and low cost.

Long-wavelength photonic integrated circuits and avalanche photodetectors

NASA Astrophysics Data System (ADS)

Tsou, Yi-Jen D.; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volume require high data communication bandwidth over longer distances. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low-cost, high-speed laser modules at 1310 to 1550 nm wavelengths and avalanche photodetectors are required. The great success of GaAs 850nm VCSEls for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits (PICs), which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform of InP-based PICs compatible with surface-emitting laser technology, as well as a high data rate externally modulated laser module. Avalanche photodetectors (APDs) are the key component in the receiver to achieve high data rate over long transmission distance because of their high sensitivity and large gain- bandwidth product. We have used wafer fusion technology to achieve InGaAs/Si APDs with much greater potential than the traditional InGaAs/InP APDs. Preliminary results on their performance will be presented.

Millimeter-wave technology advances since 1985 and future trends

NASA Astrophysics Data System (ADS)

Meinel, Holger H.

1991-05-01

The author focuses on finline or E-plane technology. Several examples, including AVES, a 61.5-GHz radar sensor for traffic data acquisition, are included. Monolithic integrated 60- and 94-GHz receiver circuits composed of a mixer and IF amplifier in compatible FET technology on GaAs are presented to show the state of the art in this area. A promising approach to the use of silicon technology for monolithic millimeter-wave integrated circuits, called SIMMWIC, is described as well. As millimeter-wave technology has matured, increased interest has been generated for very specific applications: (1) commercial automotive applications such as intelligent cruise control and enhanced vision have attracted great interest, calling for a low-cost design approach; and (2) an almost classical application of millimeter-wave techniques is the field of radar seekers, e.g., for intelligent ammunitions, calling for high performance under extreme environmental conditions. Two examples fulfilling these requirements are described.

Plasmonic nanopatch array for optical integrated circuit applications.

PubMed

Qu, Shi-Wei; Nie, Zai-Ping

2013-11-08

Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle.

Comparison of immersed liquid and air cooling of NASA's Airborne Information Management System

NASA Technical Reports Server (NTRS)

Hoadley, A. W.; Porter, A. J.

1992-01-01

The Airborne Information Management System (AIMS) is currently under development at NASA Dryden Flight Research Facility. The AIMS is designed as a modular system utilizing surface mounted integrated circuits in a high-density configuration. To maintain the temperature of the integrated circuits within manufacturer's specifications, the modules are to be filled with Fluorinert FC-72. Unlike ground based liquid cooled computers, the extreme range of the ambient pressures experienced by the AIMS requires the FC-72 be contained in a closed system. This forces the latent heat absorbed during the boiling to be released during the condensation that must take within the closed module system. Natural convection and/or pumping carries the heat to the outer surface of the AIMS module where the heat transfers to the ambient air. This paper will present an evaluation of the relative effectiveness of immersed liquid cooling and air cooling of the Airborne Information Management System.

Synthetic Biology Platform for Sensing and Integrating Endogenous Transcriptional Inputs in Mammalian Cells.

PubMed

Angelici, Bartolomeo; Mailand, Erik; Haefliger, Benjamin; Benenson, Yaakov

2016-08-30

One of the goals of synthetic biology is to develop programmable artificial gene networks that can transduce multiple endogenous molecular cues to precisely control cell behavior. Realizing this vision requires interfacing natural molecular inputs with synthetic components that generate functional molecular outputs. Interfacing synthetic circuits with endogenous mammalian transcription factors has been particularly difficult. Here, we describe a systematic approach that enables integration and transduction of multiple mammalian transcription factor inputs by a synthetic network. The approach is facilitated by a proportional amplifier sensor based on synergistic positive autoregulation. The circuits efficiently transduce endogenous transcription factor levels into RNAi, transcriptional transactivation, and site-specific recombination. They also enable AND logic between pairs of arbitrary transcription factors. The results establish a framework for developing synthetic gene networks that interface with cellular processes through transcriptional regulators. Copyright © 2016 The Author(s). Published by Elsevier Inc. All rights reserved.

Comparison of immersed liquid and air cooling of NASA's Airborne Information Management System

NASA Astrophysics Data System (ADS)

Hoadley, A. W.; Porter, A. J.

1992-07-01

The Airborne Information Management System (AIMS) is currently under development at NASA Dryden Flight Research Facility. The AIMS is designed as a modular system utilizing surface mounted integrated circuits in a high-density configuration. To maintain the temperature of the integrated circuits within manufacturer's specifications, the modules are to be filled with Fluorinert FC-72. Unlike ground based liquid cooled computers, the extreme range of the ambient pressures experienced by the AIMS requires the FC-72 be contained in a closed system. This forces the latent heat absorbed during the boiling to be released during the condensation that must take within the closed module system. Natural convection and/or pumping carries the heat to the outer surface of the AIMS module where the heat transfers to the ambient air. This paper will present an evaluation of the relative effectiveness of immersed liquid cooling and air cooling of the Airborne Information Management System.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

Circuit Architecture of VTA Dopamine Neurons Revealed by Systematic Input-Output Mapping.

PubMed

Beier, Kevin T; Steinberg, Elizabeth E; DeLoach, Katherine E; Xie, Stanley; Miyamichi, Kazunari; Schwarz, Lindsay; Gao, Xiaojing J; Kremer, Eric J; Malenka, Robert C; Luo, Liqun

2015-07-30

Dopamine (DA) neurons in the midbrain ventral tegmental area (VTA) integrate complex inputs to encode multiple signals that influence motivated behaviors via diverse projections. Here, we combine axon-initiated viral transduction with rabies-mediated trans-synaptic tracing and Cre-based cell-type-specific targeting to systematically map input-output relationships of VTA-DA neurons. We found that VTA-DA (and VTA-GABA) neurons receive excitatory, inhibitory, and modulatory input from diverse sources. VTA-DA neurons projecting to different forebrain regions exhibit specific biases in their input selection. VTA-DA neurons projecting to lateral and medial nucleus accumbens innervate largely non-overlapping striatal targets, with the latter also sending extensive extra-striatal axon collaterals. Using electrophysiology and behavior, we validated new circuits identified in our tracing studies, including a previously unappreciated top-down reinforcing circuit from anterior cortex to lateral nucleus accumbens via VTA-DA neurons. This study highlights the utility of our viral-genetic tracing strategies to elucidate the complex neural substrates that underlie motivated behaviors. Copyright © 2015 Elsevier Inc. All rights reserved.

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

Exchange circuits for FASTBUS slaves

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bratskii, A.A.; Matseev, M.Y.; Rybakov, V.G.

1985-09-01

This paper describes general-purpose circuits for FASTBUS interfacing of the functional part of a slave device. The circuits contain buffered receivers and transmitters, addressrecognition and data-transfer logic, and the required control/status registers. The described circuits are implemented with series-K500 integrated circuits.

A demonstration of CMOS VLSI circuit prototyping in support of the site facility using the 1.2 micron standard cell library developed by National Security Agency

NASA Technical Reports Server (NTRS)

Smith, Edwyn D.

1991-01-01

Two silicon CMOS application specific integrated circuits (ASICs), a data generation chip, and a data checker chip were designed. The conversion of the data generator circuitry into a pair of CMOS ASIC chips using the 1.2 micron standard cell library is documented. The logic design of the data checker is discussed. The functions of the control circuitry is described. An accurate estimate of timing relationships is essential to make sure that the logic design performs correctly under practical conditions. Timing and delay information are examined.

In situ fabricated 3D micro-lenses for photonic integrated circuits.

PubMed

Thomas, R; Li, J; Ladak, Sam; Barrow, D; Smowton, P M

2018-05-14

Aspheric astigmatic polymer micro-lenses were fabricated directly onto photonic integrated circuits using two-photon lithography. We observed a 12.6 dB improvement in the free space coupling efficiency between integrated ridge laser pairs with micro-lenses to those without.

Molecular Electronic Shift Registers

NASA Technical Reports Server (NTRS)

Beratan, David N.; Onuchic, Jose N.

1990-01-01

Molecular-scale shift registers eventually constructed as parts of high-density integrated memory circuits. In principle, variety of organic molecules makes possible large number of different configurations and modes of operation for such shift-register devices. Several classes of devices and implementations in some specific types of molecules proposed. All based on transfer of electrons or holes along chains of repeating molecular units.

Tool for a configurable integrated circuit that uses determination of dynamic power consumption

NASA Technical Reports Server (NTRS)

Davoodi, Azadeh (Inventor); French, Matthew C. (Inventor); Agarwal, Deepak (Inventor); Wang, Li (Inventor)

2011-01-01

A configurable logic tool that allows minimization of dynamic power within an FPGA design without changing user-entered specifications. The minimization of power may use minimized clock nets as a first order operation, and a second order operation that minimizes other factors, such as area of placement, area of clocks and/or slack.

Multipurpose instrumentation cable provides integral thermocouple circuit

NASA Technical Reports Server (NTRS)

Zellner, G.

1967-01-01

Multipurpose cable with an integral thermocouple circuit measures strain, vibration, pressure, throughout a wide temperature range. This cable reduces bulky and complex circuitry by eliminating separate thermocouples for each transducer.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection

PubMed Central

Bhaumik, Basabi

2016-01-01

A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm2. The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection.

PubMed

Jain, Sanjeev Kumar; Bhaumik, Basabi

2016-03-01

A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm(2). The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system.

Fault tolerant system based on IDDQ testing

NASA Astrophysics Data System (ADS)

Guibane, Badi; Hamdi, Belgacem; Mtibaa, Abdellatif; Bensalem, Brahim

2018-06-01

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.

Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

PubMed

LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

2014-06-02

We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

End-of-fabrication CMOS process monitor

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hannaman, D. J.; Lieneweg, U.; Lin, Y.-S.; Sayah, H. R.

1990-01-01

A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

NASA Astrophysics Data System (ADS)

Arefin, Md Shamsul; Bulut Coskun, M.; Alan, Tuncay; Redoute, Jean-Michel; Neild, Adrian; Rasit Yuce, Mehmet

2014-06-01

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0-5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

Multislice imaging of integrated circuits by precession X-ray ptychography.

PubMed

Shimomura, Kei; Hirose, Makoto; Takahashi, Yukio

2018-01-01

A method for nondestructively visualizing multisection nanostructures of integrated circuits by X-ray ptychography with a multislice approach is proposed. In this study, tilt-series ptychographic diffraction data sets of a two-layered circuit with a ∼1.4 µm gap at nine incident angles are collected in a wide Q range and then artifact-reduced phase images of each layer are successfully reconstructed at ∼10 nm resolution. The present method has great potential for the three-dimensional observation of flat specimens with thickness on the order of 100 µm, such as three-dimensional stacked integrated circuits based on through-silicon vias, without laborious sample preparation.

On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

PubMed

He, Li; Li, Mo

2014-05-01

The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

The Management of Cognitive Load During Complex Cognitive Skill Acquisition by Means of Computer-Simulated Problem Solving

ERIC Educational Resources Information Center

Kester, Liesbeth; Kirschner, Paul A.; van Merrienboer, Jeroen J.G.

2005-01-01

This study compared the effects of two information presentation formats on learning to solve problems in electrical circuits. In one condition, the split-source format, information relating to procedural aspects of the functioning of an electrical circuit was not integrated in a circuit diagram, while information in the integrated format condition…

The C. elegans male exercises directional control during mating through cholinergic regulation of sex-shared command interneurons.

PubMed

Sherlekar, Amrita L; Janssen, Abbey; Siehr, Meagan S; Koo, Pamela K; Caflisch, Laura; Boggess, May; Lints, Robyn

2013-01-01

Mating behaviors in simple invertebrate model organisms represent tractable paradigms for understanding the neural bases of sex-specific behaviors, decision-making and sensorimotor integration. However, there are few examples where such neural circuits have been defined at high resolution or interrogated. Here we exploit the simplicity of the nematode Caenorhabditis elegans to define the neural circuits underlying the male's decision to initiate mating in response to contact with a mate. Mate contact is sensed by male-specific sensilla of the tail, the rays, which subsequently induce and guide a contact-based search of the hermaphrodite's surface for the vulva (the vulva search). Atypically, search locomotion has a backward directional bias so its implementation requires overcoming an intrinsic bias for forward movement, set by activity of the sex-shared locomotory system. Using optogenetics, cell-specific ablation- and mutant behavioral analyses, we show that the male makes this shift by manipulating the activity of command cells within this sex-shared locomotory system. The rays control the command interneurons through the male-specific, decision-making interneuron PVY and its auxiliary cell PVX. Unlike many sex-shared pathways, PVY/PVX regulate the command cells via cholinergic, rather than glutamatergic transmission, a feature that likely contributes to response specificity and coordinates directional movement with other cholinergic-dependent motor behaviors of the mating sequence. PVY/PVX preferentially activate the backward, and not forward, command cells because of a bias in synaptic inputs and the distribution of key cholinergic receptors (encoded by the genes acr-18, acr-16 and unc-29) in favor of the backward command cells. Our interrogation of male neural circuits reveals that a sex-specific response to the opposite sex is conferred by a male-specific pathway that renders subordinate, sex-shared motor programs responsive to mate cues. Circuit modifications of these types may make prominent contributions to natural variations in behavior that ultimately bring about speciation.

The C. elegans Male Exercises Directional Control during Mating through Cholinergic Regulation of Sex-Shared Command Interneurons

PubMed Central

Sherlekar, Amrita L.; Janssen, Abbey; Siehr, Meagan S.; Koo, Pamela K.; Caflisch, Laura; Boggess, May; Lints, Robyn

2013-01-01

Background Mating behaviors in simple invertebrate model organisms represent tractable paradigms for understanding the neural bases of sex-specific behaviors, decision-making and sensorimotor integration. However, there are few examples where such neural circuits have been defined at high resolution or interrogated. Methodology/Principal Findings Here we exploit the simplicity of the nematode Caenorhabditis elegans to define the neural circuits underlying the male’s decision to initiate mating in response to contact with a mate. Mate contact is sensed by male-specific sensilla of the tail, the rays, which subsequently induce and guide a contact-based search of the hermaphrodite’s surface for the vulva (the vulva search). Atypically, search locomotion has a backward directional bias so its implementation requires overcoming an intrinsic bias for forward movement, set by activity of the sex-shared locomotory system. Using optogenetics, cell-specific ablation- and mutant behavioral analyses, we show that the male makes this shift by manipulating the activity of command cells within this sex-shared locomotory system. The rays control the command interneurons through the male-specific, decision-making interneuron PVY and its auxiliary cell PVX. Unlike many sex-shared pathways, PVY/PVX regulate the command cells via cholinergic, rather than glutamatergic transmission, a feature that likely contributes to response specificity and coordinates directional movement with other cholinergic-dependent motor behaviors of the mating sequence. PVY/PVX preferentially activate the backward, and not forward, command cells because of a bias in synaptic inputs and the distribution of key cholinergic receptors (encoded by the genes acr-18, acr-16 and unc-29) in favor of the backward command cells. Conclusion/Significance Our interrogation of male neural circuits reveals that a sex-specific response to the opposite sex is conferred by a male-specific pathway that renders subordinate, sex-shared motor programs responsive to mate cues. Circuit modifications of these types may make prominent contributions to natural variations in behavior that ultimately bring about speciation. PMID:23577128

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability. For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

PubMed

Hasan, Mehedi; Hall, Trevor

2015-11-01

A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

PubMed Central

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

Dual-function photonic integrated circuit for frequency octo-tupling or single-side-band modulation.

PubMed

Hasan, Mehedi; Maldonado-Basilio, Ramón; Hall, Trevor J

2015-06-01

A dual-function photonic integrated circuit for microwave photonic applications is proposed. The circuit consists of four linear electro-optic phase modulators connected optically in parallel within a generalized Mach-Zehnder interferometer architecture. The photonic circuit is arranged to have two separate output ports. A first port provides frequency up-conversion of a microwave signal from the electrical to the optical domain; equivalently single-side-band modulation. A second port provides tunable millimeter wave carriers by frequency octo-tupling of an appropriate amplitude RF carrier. The circuit exploits the intrinsic relative phases between the ports of multi-mode interference couplers to provide substantially all the static optical phases needed. The operation of the proposed dual-function photonic integrated circuit is verified by computer simulations. The performance of the frequency octo-tupling and up-conversion functions is analyzed in terms of the electrical signal to harmonic distortion ratio and the optical single side band to unwanted harmonics ratio, respectively.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, David M.

1996-01-01

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, D.M.

1996-11-05

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

Serotoninergic and dopaminergic modulation of cortico-striatal circuit in executive and attention deficits induced by NMDA receptor hypofunction in the 5-choice serial reaction time task

PubMed Central

Carli, Mirjana; Invernizzi, Roberto W.

2014-01-01

Executive functions are an emerging propriety of neuronal processing in circuits encompassing frontal cortex and other cortical and subcortical brain regions such as basal ganglia and thalamus. Glutamate serves as the major neurotrasmitter in these circuits where glutamate receptors of NMDA type play key role. Serotonin and dopamine afferents are in position to modulate intrinsic glutamate neurotransmission along these circuits and in turn to optimize circuit performance for specific aspects of executive control over behavior. In this review, we focus on the 5-choice serial reaction time task which is able to provide various measures of attention and executive control over performance in rodents and the ability of prefrontocortical and striatal serotonin 5-HT1A, 5-HT2A, and 5-HT2C as well as dopamine D1- and D2-like receptors to modulate different aspects of executive and attention disturbances induced by NMDA receptor hypofunction in the prefrontal cortex. These behavioral studies are integrated with findings from microdialysis studies. These studies illustrate the control of attention selectivity by serotonin 5-HT1A, 5-HT2A, 5-HT2C, and dopamine D1- but not D2-like receptors and a distinct contribution of these cortical and striatal serotonin and dopamine receptors to the control of different aspects of executive control over performance such as impulsivity and compulsivity. An association between NMDA antagonist-induced increase in glutamate release in the prefrontal cortex and attention is suggested. Collectively, this review highlights the functional interaction of serotonin and dopamine with NMDA dependent glutamate neurotransmission in the cortico-striatal circuitry for specific cognitive demands and may shed some light on how dysregulation of neuronal processing in these circuits may be implicated in specific neuropsychiatric disorders. PMID:24966814

An integrated circuit switch

NASA Technical Reports Server (NTRS)

Bonin, E. L.

1969-01-01

Multi-chip integrated circuit switch consists of a GaAs photon-emitting diode in close proximity with S1 phototransistor. A high current gain is obtained when the transistor has a high forward common-emitter current gain.

Chemical etching for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1981-01-01

Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and loading from a receiving air track into automatic furnaces and unloading onto a sending air track are included.

Multiple network interface core apparatus and method

DOEpatents

Underwood, Keith D [Albuquerque, NM; Hemmert, Karl Scott [Albuquerque, NM

2011-04-26

A network interface controller and network interface control method comprising providing a single integrated circuit as a network interface controller and employing a plurality of network interface cores on the single integrated circuit.

Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

New ultraportable display technology and applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Lewis, Nancy D.

1998-08-01

MicroDisplay devices are based on a combination of technologies rooted in the extreme integration capability of conventionally fabricated CMOS active-matrix liquid crystal display substrates. Customized diffraction grating and optical distortion correction technology for lens-system compensation allow the elimination of many lenses and systems-level components. The MicroDisplay Corporation's miniature integrated information display technology is rapidly leading to many new defense and commercial applications. There are no moving parts in MicroDisplay substrates, and the fabrication of the color generating gratings, already part of the CMOS circuit fabrication process, is effectively cost and manufacturing process-free. The entire suite of the MicroDisplay Corporation's technologies was devised to create a line of application- specific integrated circuit single-chip display systems with integrated computing, memory, and communication circuitry. Next-generation portable communication, computer, and consumer electronic devices such as truly portable monitor and TV projectors, eyeglass and head mounted displays, pagers and Personal Communication Services hand-sets, and wristwatch-mounted video phones are among the may target commercial markets for MicroDisplay technology. Defense applications range from Maintenance and Repair support, to night-vision systems, to portable projectors for mobile command and control centers.

Producibility of Vertically Integrated Photodiode (VIP)tm scanning focal plane arrays

NASA Astrophysics Data System (ADS)

Turner, Arthur M.; Teherani, Towfik; Ehmke, John C.; Pettitt, Cindy; Conlon, Peggy; Beck, Jeffrey D.; McCormack, Kent; Colombo, Luigi; Lahutsky, Tom; Murphy, Terry; Williams, Robert L.

1994-07-01

Vertically integrated photodiode, VIPTM, technology is now being used to produce second generation infrared focal plane arrays with high yields and performance. The VIPTM process employs planar, ion implanted, n on p diodes in HgCdTe which is epoxy hybridized directly to the read out integrated circuits on 100 mm Si wafers. The process parameters that are critical for high performance and yield include: HgCdTe dislocation density and thickness, backside passivation, frontside passivation, and junction formation. Producibility of infrared focal plane arrays (IRFPAs) is also significantly enhanced by read out integrated circuits (ROICs) which have the ability to deselect defective pixels. Cold probe screening before lab dewar assembly reduces costs and improves cycle times. The 240 X 1 and 240 X 2 scanning array formats are used to demonstrate the effect of process optimization, deselect, and cold probe screening on yield and cycle time. The versatility of the VIPTM technology and its extension to large area arrays is demonstrated using 240/288 X 4 and 480 X 5 TDI formats. Finally, the high performance of VIPTM IRFPAs is demonstrated by comparing data from a 480 X 5 to the SADA-II specification.

Characterization of the VEGA ASIC coupled to large area position-sensitive Silicon Drift Detectors

NASA Astrophysics Data System (ADS)

Campana, R.; Evangelista, Y.; Fuschino, F.; Ahangarianabhari, M.; Macera, D.; Bertuccio, G.; Grassi, M.; Labanti, C.; Marisaldi, M.; Malcovati, P.; Rachevski, A.; Zampa, G.; Zampa, N.; Andreani, L.; Baldazzi, G.; Del Monte, E.; Favre, Y.; Feroci, M.; Muleri, F.; Rashevskaya, I.; Vacchi, A.; Ficorella, F.; Giacomini, G.; Picciotto, A.; Zuffa, M.

2014-08-01

Low-noise, position-sensitive Silicon Drift Detectors (SDDs) are particularly useful for experiments in which a good energy resolution combined with a large sensitive area is required, as in the case of X-ray astronomy space missions and medical applications. This paper presents the experimental characterization of VEGA, a custom Application Specific Integrated Circuit (ASIC) used as the front-end electronics for XDXL-2, a large-area (30.5 cm2) SDD prototype. The ASICs were integrated on a specifically developed PCB hosting also the detector. Results on the ASIC noise performances, both stand-alone and bonded to the large area SDD, are presented and discussed.

Convergence of circuit dysfunction in ASD: a common bridge between diverse genetic and environmental risk factors and common clinical electrophysiology.

PubMed

Port, Russell G; Gandal, Michael J; Roberts, Timothy P L; Siegel, Steven J; Carlson, Gregory C

2014-01-01

Most recent estimates indicate that 1 in 68 children are affected by an autism spectrum disorder (ASD). Though decades of research have uncovered much about these disorders, the pathological mechanism remains unknown. Hampering efforts is the seeming inability to integrate findings over the micro to macro scales of study, from changes in molecular, synaptic and cellular function to large-scale brain dysfunction impacting sensory, communicative, motor and cognitive activity. In this review, we describe how studies focusing on neuronal circuit function provide unique context for identifying common neurobiological disease mechanisms of ASD. We discuss how recent EEG and MEG studies in subjects with ASD have repeatedly shown alterations in ensemble population recordings (both in simple evoked related potential latencies and specific frequency subcomponents). Because these disease-associated electrophysiological abnormalities have been recapitulated in rodent models, studying circuit differences in these models may provide access to abnormal circuit function found in ASD. We then identify emerging in vivo and ex vivo techniques, focusing on how these assays can characterize circuit level dysfunction and determine if these abnormalities underlie abnormal clinical electrophysiology. Such circuit level study in animal models may help us understand how diverse genetic and environmental risks can produce a common set of EEG, MEG and anatomical abnormalities found in ASD.

A Low Noise CMOS Readout Based on a Polymer-Coated SAW Array for Miniature Electronic Nose

PubMed Central

Wu, Cheng-Chun; Liu, Szu-Chieh; Chiu, Shih-Wen; Tang, Kea-Tiong

2016-01-01

An electronic nose (E-Nose) is one of the applications for surface acoustic wave (SAW) sensors. In this paper, we present a low-noise complementary metal–oxide–semiconductor (CMOS) readout application-specific integrated circuit (ASIC) based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of interference between the sensors, we designed a low-noise CMOS frequency readout circuit to enable the SAW sensor to obtain frequency variation. The proposed circuit was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm 1P6M CMOS process technology. The total chip size was nearly 1203 × 1203 μm2. The chip was operated at a supply voltage of 1 V for a digital circuit and 1.8 V for an analog circuit. The least measurable difference between frequencies was 4 Hz. The detection limit of the system, when estimated using methanol and ethanol, was 0.1 ppm. Their linearity was in the range of 0.1 to 26,000 ppm. The power consumption levels of the analog and digital circuits were 1.742 mW and 761 μW, respectively. PMID:27792131

A Low Noise CMOS Readout Based on a Polymer-Coated SAW Array for Miniature Electronic Nose.

PubMed

Wu, Cheng-Chun; Liu, Szu-Chieh; Chiu, Shih-Wen; Tang, Kea-Tiong

2016-10-25

An electronic nose (E-Nose) is one of the applications for surface acoustic wave (SAW) sensors. In this paper, we present a low-noise complementary metal-oxide-semiconductor (CMOS) readout application-specific integrated circuit (ASIC) based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of interference between the sensors, we designed a low-noise CMOS frequency readout circuit to enable the SAW sensor to obtain frequency variation. The proposed circuit was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm 1P6M CMOS process technology. The total chip size was nearly 1203 × 1203 μm². The chip was operated at a supply voltage of 1 V for a digital circuit and 1.8 V for an analog circuit. The least measurable difference between frequencies was 4 Hz. The detection limit of the system, when estimated using methanol and ethanol, was 0.1 ppm. Their linearity was in the range of 0.1 to 26,000 ppm. The power consumption levels of the analog and digital circuits were 1.742 mW and 761 μW, respectively.

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Process control systems: integrated for future process technologies

NASA Astrophysics Data System (ADS)

Botros, Youssry; Hajj, Hazem M.

2003-06-01

Process Control Systems (PCS) are becoming more crucial to the success of Integrated Circuit makers due to their direct impact on product quality, cost, and Fab output. The primary objective of PCS is to minimize variability by detecting and correcting non optimal performance. Current PCS implementations are considered disparate, where each PCS application is designed, deployed and supported separately. Each implementation targets a specific area of control such as equipment performance, wafer manufacturing, and process health monitoring. With Intel entering the nanometer technology era, tighter process specifications are required for higher yields and lower cost. This requires areas of control to be tightly coupled and integrated to achieve the optimal performance. This requirement can be achieved via consistent design and deployment of the integrated PCS. PCS integration will result in several benefits such as leveraging commonalities, avoiding redundancy, and facilitating sharing between implementations. This paper will address PCS implementations and focus on benefits and requirements of the integrated PCS. Intel integrated PCS Architecture will be then presented and its components will be briefly discussed. Finally, industry direction and efforts to standardize PCS interfaces that enable PCS integration will be presented.

Path programmable logic: A structured design method for digital and/or mixed analog integrated circuits

NASA Technical Reports Server (NTRS)

Taylor, B.

1990-01-01

The design of Integrated Circuits has evolved past the black art practiced by a few semiconductor companies to a world wide community of users. This was basically accomplished by the development of computer aided design tools which were made available to this community. As the tools matured into different components of the design task they were accepted into the community at large. However, the next step in this evolution is being ignored by the large tool vendors hindering the continuation of this process. With system level definition and simulation through the logic specification well understood, why is the physical generation so blatantly ignored. This portion of the development is still treated as an isolated task with information being passed from the designer to the layout function. Some form of result given back but it severely lacks full definition of what has transpired. The level of integration in I.C.'s for tomorrow, whether through new processes or applications will require higher speeds, increased transistor density, and non-digital performance which can only be achieved through attention to the physical implementation.

PUZZLE - A program for computer-aided design of printed circuit artwork

NASA Technical Reports Server (NTRS)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Integrated circuit cooled turbine blade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.

A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channelmore » connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.« less

Development of standardized specifications for screening space level integrated circuits and semiconductors

NASA Technical Reports Server (NTRS)

1984-01-01

Standardized methods are established for screening of JAN B microcircuits and JANTXV semiconductor components for space mission or other critical applications when JAN S devices are not available. General specifications are provided which outline the DPA (destructive physical analysis), environmental, electrical, and data requirements for screening of various component technologies. This standard was developed for Air Force Space Division, and is available for use by other DOD agencies, NASA, and space systems contractors for establishing common screening methods for electronic components.

Xyce Parallel Electronic Simulator : users' guide, version 2.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hoekstra, Robert John; Waters, Lon J.; Rankin, Eric Lamont

2004-06-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator capable of simulating electrical circuits at a variety of abstraction levels. Primarily, Xyce has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability the current state-of-the-art in the following areas: {sm_bullet} Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers. {sm_bullet} Improved performance for allmore » numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-art algorithms and novel techniques. {sm_bullet} Device models which are specifically tailored to meet Sandia's needs, including many radiation-aware devices. {sm_bullet} A client-server or multi-tiered operating model wherein the numerical kernel can operate independently of the graphical user interface (GUI). {sm_bullet} Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing of computing platforms. These include serial, shared-memory and distributed-memory parallel implementation - which allows it to run efficiently on the widest possible number parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. One feature required by designers is the ability to add device models, many specific to the needs of Sandia, to the code. To this end, the device package in the Xyce These input formats include standard analytical models, behavioral models look-up Parallel Electronic Simulator is designed to support a variety of device model inputs. tables, and mesh-level PDE device models. Combined with this flexible interface is an architectural design that greatly simplifies the addition of circuit models. One of the most important feature of Xyce is in providing a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia now has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods) research and development can be performed. Ultimately, these capabilities are migrated to end users.« less

Magnetophoretic circuits for digital control of single particles and cells

NASA Astrophysics Data System (ADS)

Lim, Byeonghwa; Reddy, Venu; Hu, Xinghao; Kim, Kunwoo; Jadhav, Mital; Abedini-Nassab, Roozbeh; Noh, Young-Woock; Lim, Yong Taik; Yellen, Benjamin B.; Kim, Cheolgi

2014-05-01

The ability to manipulate small fluid droplets, colloidal particles and single cells with the precision and parallelization of modern-day computer hardware has profound applications for biochemical detection, gene sequencing, chemical synthesis and highly parallel analysis of single cells. Drawing inspiration from general circuit theory and magnetic bubble technology, here we demonstrate a class of integrated circuits for executing sequential and parallel, timed operations on an ensemble of single particles and cells. The integrated circuits are constructed from lithographically defined, overlaid patterns of magnetic film and current lines. The magnetic patterns passively control particles similar to electrical conductors, diodes and capacitors. The current lines actively switch particles between different tracks similar to gated electrical transistors. When combined into arrays and driven by a rotating magnetic field clock, these integrated circuits have general multiplexing properties and enable the precise control of magnetizable objects.

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit.

PubMed

Bougioukos, M; Kouloumentas, Ch; Spyropoulou, M; Giannoulis, G; Kalavrouziotis, D; Maziotis, A; Bakopoulos, P; Harmon, R; Rogers, D; Harrison, J; Poustie, A; Maxwell, G; Avramopoulos, H

2011-06-06

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

High performance genetic algorithm for VLSI circuit partitioning

NASA Astrophysics Data System (ADS)

Dinu, Simona

2016-12-01

Partitioning is one of the biggest challenges in computer-aided design for VLSI circuits (very large-scale integrated circuits). This work address the min-cut balanced circuit partitioning problem- dividing the graph that models the circuit into almost equal sized k sub-graphs while minimizing the number of edges cut i.e. minimizing the number of edges connecting the sub-graphs. The problem may be formulated as a combinatorial optimization problem. Experimental studies in the literature have shown the problem to be NP-hard and thus it is important to design an efficient heuristic algorithm to solve it. The approach proposed in this study is a parallel implementation of a genetic algorithm, namely an island model. The information exchange between the evolving subpopulations is modeled using a fuzzy controller, which determines an optimal balance between exploration and exploitation of the solution space. The results of simulations show that the proposed algorithm outperforms the standard sequential genetic algorithm both in terms of solution quality and convergence speed. As a direction for future study, this research can be further extended to incorporate local search operators which should include problem-specific knowledge. In addition, the adaptive configuration of mutation and crossover rates is another guidance for future research.

System and method for interfacing large-area electronics with integrated circuit devices

DOEpatents

Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

2016-07-12

A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

Insulator photocurrents: Application to dose rate hardening of CMOS/SOI integrated circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dupont-Nivet, E.; Coiec, Y.M.; Flament, O.

1998-06-01

Irradiation of insulators with a pulse of high energy x-rays can induce photocurrents in the interconnections of integrated circuits. The authors present, here, a new method to measure and analyze this effect together with a simple model. They also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. They show that it explains some of the upsets observed in a SRAM embedded in an ASIC.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

Activity-Induced Remodeling of Olfactory Bulb Microcircuits Revealed by Monosynaptic Tracing

PubMed Central

Arenkiel, Benjamin R.; Hasegawa, Hiroshi; Yi, Jason J.; Larsen, Rylan S.; Wallace, Michael L.; Philpot, Benjamin D.; Wang, Fan; Ehlers, Michael D.

2011-01-01

The continued addition of new neurons to mature olfactory circuits represents a remarkable mode of cellular and structural brain plasticity. However, the anatomical configuration of newly established circuits, the types and numbers of neurons that form new synaptic connections, and the effect of sensory experience on synaptic connectivity in the olfactory bulb remain poorly understood. Using in vivo electroporation and monosynaptic tracing, we show that postnatal-born granule cells form synaptic connections with centrifugal inputs and mitral/tufted cells in the mouse olfactory bulb. In addition, newly born granule cells receive extensive input from local inhibitory short axon cells, a poorly understood cell population. The connectivity of short axon cells shows clustered organization, and their synaptic input onto newborn granule cells dramatically and selectively expands with odor stimulation. Our findings suggest that sensory experience promotes the synaptic integration of new neurons into cell type-specific olfactory circuits. PMID:22216277

Experimental study of an adaptive elastic metamaterial controlled by electric circuits

NASA Astrophysics Data System (ADS)

Zhu, R.; Chen, Y. Y.; Barnhart, M. V.; Hu, G. K.; Sun, C. T.; Huang, G. L.

2016-01-01

The ability to control elastic wave propagation at a deep subwavelength scale makes locally resonant elastic metamaterials very relevant. A number of abilities have been demonstrated such as frequency filtering, wave guiding, and negative refraction. Unfortunately, few metamaterials develop into practical devices due to their lack of tunability for specific frequencies. With the help of multi-physics numerical modeling, experimental validation of an adaptive elastic metamaterial integrated with shunted piezoelectric patches has been performed in a deep subwavelength scale. The tunable bandgap capacity, as high as 45%, is physically realized by using both hardening and softening shunted circuits. It is also demonstrated that the effective mass density of the metamaterial can be fully tailored by adjusting parameters of the shunted electric circuits. Finally, to illustrate a practical application, transient wave propagation tests of the adaptive metamaterial subjected to impact loads are conducted to validate their tunable wave mitigation abilities in real-time.

Antibody-controlled actuation of DNA-based molecular circuits.

PubMed

Engelen, Wouter; Meijer, Lenny H H; Somers, Bram; de Greef, Tom F A; Merkx, Maarten

2017-02-17

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

Antibody-controlled actuation of DNA-based molecular circuits

NASA Astrophysics Data System (ADS)

Engelen, Wouter; Meijer, Lenny H. H.; Somers, Bram; de Greef, Tom F. A.; Merkx, Maarten

2017-02-01

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

DSB Task Force on Cyber Supply Chain

DTIC Science & Technology

2017-04-01

seeking to exploit a maliciously inserted vulnerability must execute each step in the kill chain:  Intelligence and planning: gathering...are intended to take a comprehensive approach in considering all aspects of system security, including cybersecurity , and address initial steps to...specific integrated circuits (ASICs). That need is likely to grow for systems that support intelligent or autonomous capabilities. The current

Rad-Hard Structured ASIC Body of Knowledge

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2013-01-01

Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between traditional ASICs and Field-Programmable Gate Arrays (FPGA). The motivation behind structured ASICs is to combine the low nonrecurring engineering costs (NRE) costs of FPGAs with the high performance of ASICs. This report provides an overview of the structured ASIC platforms that are radiation-hardened and intended for space application

Optical Neural Interfaces

PubMed Central

Warden, Melissa R.; Cardin, Jessica A.; Deisseroth, Karl

2014-01-01

Genetically encoded optical actuators and indicators have changed the landscape of neuroscience, enabling targetable control and readout of specific components of intact neural circuits in behaving animals. Here, we review the development of optical neural interfaces, focusing on hardware designed for optical control of neural activity, integrated optical control and electrical readout, and optical readout of population and single-cell neural activity in freely moving mammals. PMID:25014785

vPELS: An E-Learning Social Environment for VLSI Design with Content Security Using DRM

ERIC Educational Resources Information Center

Dewan, Jahangir; Chowdhury, Morshed; Batten, Lynn

2014-01-01

This article provides a proposal for personal e-learning system (vPELS [where "v" stands for VLSI: very large scale integrated circuit])) architecture in the context of social network environment for VLSI Design. The main objective of vPELS is to develop individual skills on a specific subject--say, VLSI--and share resources with peers.…

Progress in knowledge representation research

NASA Technical Reports Server (NTRS)

Lum, Henry

1985-01-01

Brief descriptions are given of research being carried out in the field of knowledge representation. Dynamic simulation and modelling of planning systems with real-time sensor inputs; development of domain-independent knowledge representation tools which can be used in the development of application-specific expert and planning systems; and development of a space-borne very high speed integrated circuit processor are among the projects discussed.

Photolithography-Based Patterning of Liquid Metal Interconnects for Monolithically Integrated Stretchable Circuits.

PubMed

Park, Chan Woo; Moon, Yu Gyeong; Seong, Hyejeong; Jung, Soon Won; Oh, Ji-Young; Na, Bock Soon; Park, Nae-Man; Lee, Sang Seok; Im, Sung Gap; Koo, Jae Bon

2016-06-22

We demonstrate a new patterning technique for gallium-based liquid metals on flat substrates, which can provide both high pattern resolution (∼20 μm) and alignment precision as required for highly integrated circuits. In a very similar manner as in the patterning of solid metal films by photolithography and lift-off processes, the liquid metal layer painted over the whole substrate area can be selectively removed by dissolving the underlying photoresist layer, leaving behind robust liquid patterns as defined by the photolithography. This quick and simple method makes it possible to integrate fine-scale interconnects with preformed devices precisely, which is indispensable for realizing monolithically integrated stretchable circuits. As a way for constructing stretchable integrated circuits, we propose a hybrid configuration composed of rigid device regions and liquid interconnects, which is constructed on a rigid substrate first but highly stretchable after being transferred onto an elastomeric substrate. This new method can be useful in various applications requiring both high-resolution and precisely aligned patterning of gallium-based liquid metals.

Monolithic optical integrated control circuitry for GaAs MMIC-based phased arrays

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Ponchak, G. E.; Kascak, T. J.

1985-01-01

Gallium arsenide (GaAs) monolithic microwave integrated circuits (MMIC's) show promise in phased-array antenna applications for future space communications systems. Their efficient usage will depend on the control of amplitude and phase signals for each MMIC element in the phased array and in the low-loss radiofrequency feed. For a phased array contining several MMIC elements a complex system is required to control and feed each element. The characteristics of GaAs MMIC's for 20/30-GHz phased-array systems are discussed. The optical/MMIC interface and the desired characteristics of optical integrated circuits (OIC's) for such an interface are described. Anticipated fabrication considerations for eventual full monolithic integration of optical integrated circuits with MMIC's on a GaAs substrate are presented.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

An Integrated-Circuit Temperature Sensor for Calorimetry and Differential Temperature Measurement.

ERIC Educational Resources Information Center

Muyskens, Mark A.

1997-01-01

Describes the application of an integrated-circuit (IC) chip which provides an easy-to-use, inexpensive, rugged, computer-interfaceable temperature sensor for calorimetry and differential temperature measurement. Discusses its design and advantages. (JRH)

Magnet-wire wrapping tool for integrated circuits

NASA Technical Reports Server (NTRS)

Takahashi, T. H.

1972-01-01

Wire-dispensing tool which resembles mechanical pencil is used to wrap magnet wire around integrated circuit terminals uniformly and securely without damaging insulative coating on wire. Tool is hand-held and easily manipulated to execute wire wrapping movements.

A zirconium dioxide ammonia microsensor integrated with a readout circuit manufactured using the 0.18 μm CMOS process.

PubMed

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-03-15

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits.

PubMed

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-12-24

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less

Electromechanical modeling of a honeycomb core integrated vibration energy converter with increased specific power for energy harvesting applications

NASA Astrophysics Data System (ADS)

Chandrasekharan, Nataraj

Innovation in integrated circuit technology along with improved manufacturing processes has resulted in considerable reduction in power consumption of electromechanical devices. Majority of these devices are currently powered by batteries. However, the issues posed by batteries, including the need for frequent battery recharge/replacement has resulted in a compelling need for alternate energy to achieve self-sufficient device operation or to supplement battery power. Vibration based energy harvesting methods through piezoelectric transduction provides with a promising potential towards replacing or supplementing battery power source. However, current piezoelectric energy harvesters generate low specific power (power-to-weight ratio) when compared to batteries that the harvesters seek to replace or supplement. In this study, the potential of integrating lightweight cellular honeycomb structures with existing piezoelectric device configurations (bimorph) to achieve higher specific power is investigated. It is shown in this study that at low excitation frequency ranges, replacing the solid continuous substrate of a conventional piezoelectric bimorph with honeycomb structures of the same material results in a significant increase in power-to-weight ratio of the piezoelectric harvester. In order to maximize the electrical response of vibration based power harvesters, the natural frequency of these harvesters is designed to match the input driving frequency. The commonly used technique of adding a tip mass is employed to lower the natural frequency (to match driving frequency) of both, solid and honeycomb substrate bimorphs. At higher excitation frequency, the natural frequency of the traditional solid substrate bimorph can only be altered (to match driving frequency) through a change in global geometric design parameters, typically achieved by increasing the thickness of the harvester. As a result, the size of the harvester is increased and can be disadvantageous especially if the application imposes a space/size constraint. Moreover, the bimorph with increased thickness will now require a larger mechanical force to deform the structure which can fall outside the input ambient excitation amplitude range. In contrast, the honeycomb core bimorph offers an advantage in terms of preserving the global geometric dimensions. The natural frequency of the honeycomb core bimorph can be altered by manipulating honeycomb cell design parameters, such as cell angle, cell wall thickness, vertical cell height and inclined cell length. This results in a change in the mass and stiffness properties of the substrate and hence the bimorph, thereby altering the natural frequency of the harvester. Design flexibility of honeycomb core bimorphs is demonstrated by varying honeycomb cell parameters to alter mass and stiffness properties for power harvesting. The influence of honeycomb cell parameters on power generation is examined to evaluate optimum design to attain highest specific power. In addition, the more compliant nature of a honeycomb core bimorph decreases susceptibility towards fatigue and can increase the operating lifetime of the harvester. The second component of this dissertation analyses an uncoupled equivalent circuit model for piezoelectric energy harvesting. Open circuit voltage developed on the piezoelectric materials can be easily computed either through analytical or finite element models. The efficacy of a method to determine power developed across a resistive load, by representing the coupled piezoelectric electromechanical problem with an external load as an open circuit voltage driven equivalent circuit, is evaluated. The lack of backward feedback at finite resistive loads resulting from such an equivalent representation is examined by comparing the equivalent circuit model to the governing equations of a fully coupled circuit model for the electromechanical problem. It is found that the backward feedback is insignificant for weakly coupled systems typically seen in micro electromechanical systems and other energy harvesting device configurations with low coupling. For moderate to high coupling systems, a correction factor based on a calibrated resistance is presented which can be used to evaluate power generation at a specific resistive load.

Electronic readout system for the Belle II imaging Time-Of-Propagation detector

NASA Astrophysics Data System (ADS)

Kotchetkov, Dmitri

2017-07-01

The imaging Time-Of-Propagation (iTOP) detector, constructed for the Belle II experiment at the SuperKEKB e+e- collider, is an 8192-channel high precision Cherenkov particle identification detector with timing resolution below 50 ps. To acquire data from the iTOP, a novel front-end electronic readout system was designed, built, and integrated. Switched-capacitor array application-specific integrated circuits are used to sample analog signals. Triggering, digitization, readout, and data transfer are controlled by Xilinx Zynq-7000 system on a chip devices.

Merging photonics with nanoelectronics (Conference Presentation)

NASA Astrophysics Data System (ADS)

Liehr, Michael

2016-02-01

The recently established American Institute for Manufacturing Photonics (AIM Photonics) is a manufacturing consortium headquartered in New York, with funding from the US Department of Defense (DoD), New York State, and industrial partners to advance the state of the art in the design, manufacture, testing, assembly, and packaging of integrated photonic devices. Dr. Michael Liehr, CEO of AIM Photonics, will describe the technical goals, operational framework, near-term milestones, and opportunities for the broader photonics community. The Institute intends to organize a currently fragmented domestic capability in integrated photonics. AIM Photonics will develop and demonstrate innovative manufacturing technologies for a number of key application sectors for integrated photonics devices. The Institute will furthermore specifically focus on establishing and building out an infrastructure in key areas required to accelerate the further adoption of integrated photonics. Specifically, we will enhance the available hardware development capability to include Si-based Multi-Project Wafer runs, InP-based Photonic Integrated Circuits, first and second level packaging, test and assembly.

Switching modes in corticogenesis: mechanisms of neuronal subtype transitions and integration in the cerebral cortex

PubMed Central

Toma, Kenichi; Hanashima, Carina

2015-01-01

Information processing in the cerebral cortex requires the activation of diverse neurons across layers and columns, which are established through the coordinated production of distinct neuronal subtypes and their placement along the three-dimensional axis. Over recent years, our knowledge of the regulatory mechanisms of the specification and integration of neuronal subtypes in the cerebral cortex has progressed rapidly. In this review, we address how the unique cytoarchitecture of the neocortex is established from a limited number of progenitors featuring neuronal identity transitions during development. We further illuminate the molecular mechanisms of the subtype-specific integration of these neurons into the cerebral cortex along the radial and tangential axis, and we discuss these key features to exemplify how neocortical circuit formation accomplishes economical connectivity while maintaining plasticity and evolvability to adapt to environmental changes. PMID:26321900

Flagellar region 3b supports strong expression of integrated DNA and the highest chromosomal integration efficiency of the Escherichia coli flagellar regions.

PubMed

Juhas, Mario; Ajioka, James W

2015-07-01

The Gram-negative bacterium Escherichia coli is routinely used as the chassis for a variety of biotechnology and synthetic biology applications. Identification and analysis of reliable chromosomal integration and expression target loci is crucial for E. coli engineering. Chromosomal loci differ significantly in their ability to support integration and expression of the integrated genetic circuits. In this study, we investigate E. coli K12 MG1655 flagellar regions 2 and 3b. Integration of the genetic circuit into seven and nine highly conserved genes of the flagellar regions 2 (motA, motB, flhD, flhE, cheW, cheY and cheZ) and 3b (fliE, F, G, J, K, L, M, P, R), respectively, showed significant variation in their ability to support chromosomal integration and expression of the integrated genetic circuit. While not reducing the growth of the engineered strains, the integrations into all 16 target sites led to the loss of motility. In addition to high expression, the flagellar region 3b supports the highest efficiency of integration of all E. coli K12 MG1655 flagellar regions and is therefore potentially the most suitable for the integration of synthetic genetic circuits. © 2015 The Authors. Microbial Biotechnology published by John Wiley & Sons Ltd and Society for Applied Microbiology.

Photonic Integrated Circuits

NASA Technical Reports Server (NTRS)

Krainak, Michael; Merritt, Scott

2016-01-01

Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

Waveshaping electronic circuit

NASA Technical Reports Server (NTRS)

Harper, T. P.

1971-01-01

Circuit provides output signal with sinusoidal function in response to bipolar transition of input signal. Instantaneous transition shapes into linear rate of change and linear rate of change shapes into sinusoidal rate of change. Circuit contains only active components; therefore, compatibility with integrated circuit techniques is assured.

Conception et realisation d'un echantillonneur de grande vitesse en technologie HIGFET (transistor a effet de champ avec heterostructure et grille isolee)

NASA Astrophysics Data System (ADS)

Tazlauanu, Mihai

The research work reported in this thesis details a new fabrication technology for high speed integrated circuits in the broadest sense, including original contributions to device modeling, circuit simulation, integrated circuit design, wafer fabrication, micro-physical and electrical characterization, process flow and final device testing as part of an electrical system. The primary building block of this technology is the heterostructure insulated gate field effect transistor, HIGFET. We used an InP/InGaAs epitaxial heterostructure to ensure a high charge carrier mobility and hence obtain a higher operating frequency than that currently possible for silicon devices. We designed and built integrated circuits with two system architectures. The first architecture integrates the clock signal generator with the sample and hold circuitry on the InP die, while the second is a hybrid architecture of an InP sample and hold assembled with an external clock signal generator made with ECL circuits on GaAs. To generate the clock signals on the same die with the sample and hold circuits, we developed a digital circuit family based on an original inverter, appropriate for depletion mode NMOS technology. We used this circuit to design buffer amplifiers and ring oscillators. Four mask sets produced in a Cadence environment, have permitted the fabrication of test and working devices. Each new mask generation has reflected the previous achievements and has implemented new structures and circuit techniques. The fabrication technology has undergone successive modifications and refinements to optimize device manufacturing. Particular attention has been paid to the technological robustness. The plasma enhanced etching process (RIE) had been used for an exhaustive study for the statistical simulation of the technological steps. Electrical measurements, performed on the experimental samples, have permitted the modeling of the devices, technological processing to be adjusted and circuit design improved. Electrical measurements performed on dedicated test structures, during the fabrication cycle, allowed the identification and correction of some technological problems (ohmic contacts, current leakage, interconnection integrity, and thermal instabilities). Feedback corrections were validated by dedicated experiments with the experimental effort optimized by statistical techniques (factorial fractional design). (Abstract shortened by UMI.)

Contextual signals in visual cortex.

PubMed

Khan, Adil G; Hofer, Sonja B

2018-06-05

Vision is an active process. What we perceive strongly depends on our actions, intentions and expectations. During visual processing, these internal signals therefore need to be integrated with the visual information from the retina. The mechanisms of how this is achieved by the visual system are still poorly understood. Advances in recording and manipulating neuronal activity in specific cell types and axonal projections together with tools for circuit tracing are beginning to shed light on the neuronal circuit mechanisms of how internal, contextual signals shape sensory representations. Here we review recent work, primarily in mice, that has advanced our understanding of these processes, focusing on contextual signals related to locomotion, behavioural relevance and predictions. Copyright © 2018 Elsevier Ltd. All rights reserved.

Monolithic 3D CMOS Using Layered Semiconductors.

PubMed

Sachid, Angada B; Tosun, Mahmut; Desai, Sujay B; Hsu, Ching-Yi; Lien, Der-Hsien; Madhvapathy, Surabhi R; Chen, Yu-Ze; Hettick, Mark; Kang, Jeong Seuk; Zeng, Yuping; He, Jr-Hau; Chang, Edward Yi; Chueh, Yu-Lun; Javey, Ali; Hu, Chenming

2016-04-06

Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low-temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high-density, ultralow-voltage, and ultralow-power applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Study of Piezoelectric Vibration Energy Harvester with non-linear conditioning circuit using an integrated model

NASA Astrophysics Data System (ADS)

Manzoor, Ali; Rafique, Sajid; Usman Iftikhar, Muhammad; Mahmood Ul Hassan, Khalid; Nasir, Ali

2017-08-01

Piezoelectric vibration energy harvester (PVEH) consists of a cantilever bimorph with piezoelectric layers pasted on its top and bottom, which can harvest power from vibrations and feed to low power wireless sensor nodes through some power conditioning circuit. In this paper, a non-linear conditioning circuit, consisting of a full-bridge rectifier followed by a buck-boost converter, is employed to investigate the issues of electrical side of the energy harvesting system. An integrated mathematical model of complete electromechanical system has been developed. Previously, researchers have studied PVEH with sophisticated piezo-beam models but employed simplistic linear circuits, such as resistor, as electrical load. In contrast, other researchers have worked on more complex non-linear circuits but with over-simplified piezo-beam models. Such models neglect different aspects of the system which result from complex interactions of its electrical and mechanical subsystems. In this work, authors have integrated the distributed parameter-based model of piezo-beam presented in literature with a real world non-linear electrical load. Then, the developed integrated model is employed to analyse the stability of complete energy harvesting system. This work provides a more realistic and useful electromechanical model having realistic non-linear electrical load unlike the simplistic linear circuit elements employed by many researchers.

Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

NASA Astrophysics Data System (ADS)

Takeda, Kotaro; Honda, Kentaro; Takeya, Tsutomu; Okazaki, Kota; Hiraki, Tatsurou; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Fukuda, Hiroshi; Usui, Mitsuo; Nosaka, Hideyuki; Yamamoto, Tsuyoshi; Yamada, Koji

2015-01-01

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.

Interface For MIL-STD-1553B Data Bus

NASA Technical Reports Server (NTRS)

Davies, Bryan L.; Osborn, Stephen H.; Sullender, Craig C.

1993-01-01

Electronic control-logic subsystem acts as interface between microcontroller and MIL-STD-1553B data bus. Subsystem made of relatively small number of integrated circuits. Advantages include low power, few integrated-circuit chips, and little need for control signals.

Package Holds Five Monolithic Microwave Integrated Circuits

NASA Technical Reports Server (NTRS)

Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

1996-01-01

Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

Integrated neuron circuit for implementing neuromorphic system with synaptic device

NASA Astrophysics Data System (ADS)

Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

2018-02-01

In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

Assessment of Durable SiC JFET Technology for +600 C to -125 C Integrated Circuit Operation

NASA Technical Reports Server (NTRS)

Neudeck, P. G.; Krasowski, M. J.; Prokop, N. F.

2011-01-01

Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 C to +600 C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 C ICs for combustion engine sensing and control, deep-well drilling, and other harsh-environment applications.

Nonlinear system analysis in bipolar integrated circuits

NASA Astrophysics Data System (ADS)

Fang, T. F.; Whalen, J. J.

1980-01-01

Since analog bipolar integrated circuits (IC's) have become important components in modern communication systems, the study of the Radio Frequency Interference (RFI) effects in bipolar IC amplifiers is an important subject for electromagnetic compatibility (EMC) engineering. The investigation has focused on using the nonlinear circuit analysis program (NCAP) to predict RF demodulation effects in broadband bipolar IC amplifiers. The audio frequency (AF) voltage at the IC amplifier output terminal caused by an amplitude modulated (AM) RF signal at the IC amplifier input terminal was calculated and compared to measured values. Two broadband IC amplifiers were investigated: (1) a cascode circuit using a CA3026 dual differential pair; (2) a unity gain voltage follower circuit using a micro A741 operational amplifier (op amp). Before using NCAP for RFI analysis, the model parameters for each bipolar junction transistor (BJT) in the integrated circuit were determined. Probe measurement techniques, manufacturer's data, and other researcher's data were used to obtain the required NCAP BJT model parameter values. An important contribution included in this effort is a complete set of NCAP BJT model parameters for most of the transistor types used in linear IC's.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, E.I. Jr.; Peterson, K.A.; Barton, D.L.

1998-07-14

An electron beam apparatus and method for testing a circuit are disclosed. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 {micro}m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits. 7 figs.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, Jr., Edward I.; Peterson, Kenneth A.; Barton, Daniel L.

1998-01-01

An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.

High stability amplifier

NASA Technical Reports Server (NTRS)

Adams, W. A.; Reinhardt, V. S. (Inventor)

1983-01-01

An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator, a single transistor, and an integrated circuit operational amplifier mounted on a circuit board such that passive circuit elements are located on side of the circuit board while the active circuit elements are located on the other side is described. The active circuit elements are embedded in a common heat sink so that a common temperature reference is provided for changes in ambient temperature. The single transistor and operational amplifier are connected together to form a feedback amplifier powered from the voltage regulator with transistor implementing primarily the desired signal gain while the operational amplifier implements signal isolation. Further RF isolation is provided by the voltage regulator which inhibits cross-talk from other like amplifiers powered from a common power supply. Input and output terminals consisting of coaxial connectors are located on the sides of a housing in which all the circuit components and heat sink are located.

Two integrator loop quadrature oscillators: A review.

PubMed

Soliman, Ahmed M

2013-01-01

A review of the two integrator loop oscillator circuits providing two quadrature sinusoidal output voltages is given. All the circuits considered employ the minimum number of capacitors namely two except one circuit which uses three capacitors. The circuits considered are classified to four different classes. The first class includes floating capacitors and floating resistors and the active building blocks realizing these circuits are the Op Amp or the OTRA. The second class employs grounded capacitors and includes floating resistors and the active building blocks realizing these circuits are the DCVC or the unity gain cells or the CFOA. The third class employs grounded capacitors and grounded resistors and the active building blocks realizing these circuits are the CCII. The fourth class employs grounded capacitors and no resistors and the active building blocks realizing these circuits are the TA. Transformation methods showing the generation of different classes from each other is given in details and this is one of the main objectives of this paper.

On-chip continuous-variable quantum entanglement

NASA Astrophysics Data System (ADS)

Masada, Genta; Furusawa, Akira

2016-09-01

Entanglement is an essential feature of quantum theory and the core of the majority of quantum information science and technologies. Quantum computing is one of the most important fruits of quantum entanglement and requires not only a bipartite entangled state but also more complicated multipartite entanglement. In previous experimental works to demonstrate various entanglement-based quantum information processing, light has been extensively used. Experiments utilizing such a complicated state need highly complex optical circuits to propagate optical beams and a high level of spatial interference between different light beams to generate quantum entanglement or to efficiently perform balanced homodyne measurement. Current experiments have been performed in conventional free-space optics with large numbers of optical components and a relatively large-sized optical setup. Therefore, they are limited in stability and scalability. Integrated photonics offer new tools and additional capabilities for manipulating light in quantum information technology. Owing to integrated waveguide circuits, it is possible to stabilize and miniaturize complex optical circuits and achieve high interference of light beams. The integrated circuits have been firstly developed for discrete-variable systems and then applied to continuous-variable systems. In this article, we review the currently developed scheme for generation and verification of continuous-variable quantum entanglement such as Einstein-Podolsky-Rosen beams using a photonic chip where waveguide circuits are integrated. This includes balanced homodyne measurement of a squeezed state of light. As a simple example, we also review an experiment for generating discrete-variable quantum entanglement using integrated waveguide circuits.

Method for Evaluating the Corrosion Resistance of Aluminum Metallization of Integrated Circuits under Multifactorial Influence

NASA Astrophysics Data System (ADS)

Kolomiets, V. I.

2018-03-01

The influence of complex influence of climatic factors (temperature, humidity) and electric mode (supply voltage) on the corrosion resistance of metallization of integrated circuits has been considered. The regression dependence of the average time of trouble-free operation t on the mentioned factors has been established in the form of a modified Arrhenius equation that is adequate in a wide range of factor values and is suitable for selecting accelerated test modes. A technique for evaluating the corrosion resistance of aluminum metallization of depressurized CMOS integrated circuits has been proposed.

Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, Ann. N.; Anderson, Richard E.; Cole, Jr., Edward I.

1995-01-01

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.

Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, A.N.; Anderson, R.E.; Cole, E.I. Jr.

1995-11-07

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits are disclosed. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits. 17 figs.

A SPICE2 Model for the M732 Analog Timer Integrated Circuit.

DTIC Science & Technology

1982-06-01

I AD-All? 019 ARMY ARMAMENT RESEARCH AND DEVELOPMENT C01MAND DOVER-ETC F/ S 1/ I A SPICES MODEL FOR THE M739 ANALOG TIMER INTEGRATED CIRCUIT. (U) I...JUN $I .J P TOBAK UNCLASSIFIED AR ID-20Di S I-AD-E06 3 NL ADI- A SPICE2 MODEL FOR THE M3 ANALOG TIMR INTERNATED CIRCIT, JOHN P. TOMA DTIC JUNE 1992 13...ARrIID-TR-82001 -;AZ/ 4 " 4. TITLE (and Subtitle) S . TYPE OF REPORT & PERIOD COVERED A SPICE2 MODEL FOR THE M732 ANALOG TIMER Final INTEGRATED CIRCUIT

Understanding in an instant: neurophysiological evidence for mechanistic language circuits in the brain.

PubMed

Pulvermüller, Friedemann; Shtyrov, Yury; Hauk, Olaf

2009-08-01

How long does it take the human mind to grasp the idea when hearing or reading a sentence? Neurophysiological methods looking directly at the time course of brain activity indexes of comprehension are critical for finding the answer to this question. As the dominant cognitive approaches, models of serial/cascaded and parallel processing, make conflicting predictions on the time course of psycholinguistic information access, they can be tested using neurophysiological brain activation recorded in MEG and EEG experiments. Seriality and cascading of lexical, semantic and syntactic processes receives support from late (latency approximately 1/2s) sequential neurophysiological responses, especially N400 and P600. However, parallelism is substantiated by early near-simultaneous brain indexes of a range of psycholinguistic processes, up to the level of semantic access and context integration, emerging already 100-250ms after critical stimulus information is present. Crucially, however, there are reliable latency differences of 20-50ms between early cortical area activations reflecting lexical, semantic and syntactic processes, which are left unexplained by current serial and parallel brain models of language. We here offer a mechanistic model grounded in cortical nerve cell circuits that builds upon neuroanatomical and neurophysiological knowledge and explains both near-simultaneous activations and fine-grained delays. A key concept is that of discrete distributed cortical circuits with specific inter-area topographies. The full activation, or ignition, of specifically distributed binding circuits explains the near-simultaneity of early neurophysiological indexes of lexical, syntactic and semantic processing. Activity spreading within circuits determined by between-area conduction delays accounts for comprehension-related regional activation differences in the millisecond range.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

The multi-instrumentalist hippocampus. Comment on "The quartet theory of human emotions: An integrative and neurofunctional model" by S. Koelsch et al.

NASA Astrophysics Data System (ADS)

Strange, Bryan A.; Yebra, Mar

2015-06-01

Characterizing the neural circuitry of emotion is important not only from a basic science perspective, but also for understanding how these circuits may malfunction in psychiatric disease. A fundamental question for affective neuroscience is whether there are specialised neuroanatomical areas, or "modules", dedicated to the processing of emotional stimuli. In their review, Koelsch and colleagues [1] argue for the existence of a quartet of neuroanatomically distinct cerebral systems involved in the generation of a specific class of affects. Intriguingly, all four systems (brainstem-, diencephalon-, hippocampus-, and orbitofrontal-centred) comprise brain areas whose role in emotional processing is in addition to mediating other specific aspects of cognition. One member of the quartet in which this is particularly apparent is the hippocampus, a structure known to be critical for episodic memory and navigation. If areas involved in emotion also mediate other brain functions, this raises an issue of whether these multiple functions are executed by segregated circuits within each structure - i.e., a "module" for emotion residing in a sub-division of a brain structure - or whether these circuits are superimposed.

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

PubMed

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Auditory-motor interaction revealed by fMRI: speech, music, and working memory in area Spt.

PubMed

Hickok, Gregory; Buchsbaum, Bradley; Humphries, Colin; Muftuler, Tugan

2003-07-01

The concept of auditory-motor interaction pervades speech science research, yet the cortical systems supporting this interface have not been elucidated. Drawing on experimental designs used in recent work in sensory-motor integration in the cortical visual system, we used fMRI in an effort to identify human auditory regions with both sensory and motor response properties, analogous to single-unit responses in known visuomotor integration areas. The sensory phase of the task involved listening to speech (nonsense sentences) or music (novel piano melodies); the "motor" phase of the task involved covert rehearsal/humming of the auditory stimuli. A small set of areas in the superior temporal and temporal-parietal cortex responded both during the listening phase and the rehearsal/humming phase. A left lateralized region in the posterior Sylvian fissure at the parietal-temporal boundary, area Spt, showed particularly robust responses to both phases of the task. Frontal areas also showed combined auditory + rehearsal responsivity consistent with the claim that the posterior activations are part of a larger auditory-motor integration circuit. We hypothesize that this circuit plays an important role in speech development as part of the network that enables acoustic-phonetic input to guide the acquisition of language-specific articulatory-phonetic gestures; this circuit may play a role in analogous musical abilities. In the adult, this system continues to support aspects of speech production, and, we suggest, supports verbal working memory.

Quartz/fused silica chip carriers

NASA Technical Reports Server (NTRS)

1992-01-01

The primary objective of this research and development effort was to develop monolithic microwave integrated circuit (MMIC) packaging which will operate efficiently at millimeter-wave frequencies. The packages incorporated fused silica as the substrate material which was selected due to its favorable electrical properties and potential performance improvement over more conventional materials for Ka-band operation. The first step towards meeting this objective is to develop a package that meets standard mechanical and thermal requirements using fused silica and to be compatible with semiconductor devices operating up to at least 44 GHz. The second step is to modify the package design and add multilayer and multicavity capacity to allow for application specific integrated circuits (ASIC's) to control multiple phase shifters. The final step is to adapt the package design to a phased array module with integral radiating elements. The first task was a continuation of the SBIR Phase 1 work. Phase 1 identified fused silica as a viable substrate material by demonstrating various plating, machining, and adhesion properties. In Phase 2 Task 1, a package was designed and fabricated to validate these findings. Task 2 was to take the next step in packaging and fabricate a multilayer, multichip module (MCM). This package is the predecessor to the phased array module and demonstrates the ability to via fill, circuit print, laminate, and to form vertical interconnects. The final task was to build a phased array module. The radiating elements were to be incorporated into the package instead of connecting to it with wire or ribbon bonds.

Multilevel Regulation of Bacterial Gene Expression with the Combined STAR and Antisense RNA System.

PubMed

Lee, Young Je; Kim, Soo-Jung; Moon, Tae Seok

2018-03-16

Synthetic small RNA regulators have emerged as a versatile tool to predictably control bacterial gene expression. Owing to their simple design principles, small size, and highly orthogonal behavior, these engineered genetic parts have been incorporated into genetic circuits. However, efforts to achieve more sophisticated cellular functions using RNA regulators have been hindered by our limited ability to integrate different RNA regulators into complex circuits. Here, we present a combined RNA regulatory system in Escherichia coli that uses small transcription activating RNA (STAR) and antisense RNA (asRNA) to activate or deactivate target gene expression in a programmable manner. Specifically, we demonstrated that the activated target output by the STAR system can be deactivated by expressing two different types of asRNAs: one binds to and sequesters the STAR regulator, affecting the transcription process, while the other binds to the target mRNA, affecting the translation process. We improved deactivation efficiencies (up to 96%) by optimizing each type of asRNA and then integrating the two optimized asRNAs into a single circuit. Furthermore, we demonstrated that the combined STAR and asRNA system can control gene expression in a reversible way and can regulate expression of a gene in the genome. Lastly, we constructed and simultaneously tested two A AND NOT B logic gates in the same cell to show sophisticated multigene regulation by the combined system. Our approach establishes a methodology for integrating multiple RNA regulators to rationally control multiple genes.

Viral-genetic tracing of the input-output organization of a central noradrenaline circuit.

PubMed

Schwarz, Lindsay A; Miyamichi, Kazunari; Gao, Xiaojing J; Beier, Kevin T; Weissbourd, Brandon; DeLoach, Katherine E; Ren, Jing; Ibanes, Sandy; Malenka, Robert C; Kremer, Eric J; Luo, Liqun

2015-08-06

Deciphering how neural circuits are anatomically organized with regard to input and output is instrumental in understanding how the brain processes information. For example, locus coeruleus noradrenaline (also known as norepinephrine) (LC-NE) neurons receive input from and send output to broad regions of the brain and spinal cord, and regulate diverse functions including arousal, attention, mood and sensory gating. However, it is unclear how LC-NE neurons divide up their brain-wide projection patterns and whether different LC-NE neurons receive differential input. Here we developed a set of viral-genetic tools to quantitatively analyse the input-output relationship of neural circuits, and applied these tools to dissect the LC-NE circuit in mice. Rabies-virus-based input mapping indicated that LC-NE neurons receive convergent synaptic input from many regions previously identified as sending axons to the locus coeruleus, as well as from newly identified presynaptic partners, including cerebellar Purkinje cells. The 'tracing the relationship between input and output' method (or TRIO method) enables trans-synaptic input tracing from specific subsets of neurons based on their projection and cell type. We found that LC-NE neurons projecting to diverse output regions receive mostly similar input. Projection-based viral labelling revealed that LC-NE neurons projecting to one output region also project to all brain regions we examined. Thus, the LC-NE circuit overall integrates information from, and broadcasts to, many brain regions, consistent with its primary role in regulating brain states. At the same time, we uncovered several levels of specificity in certain LC-NE sub-circuits. These tools for mapping output architecture and input-output relationship are applicable to other neuronal circuits and organisms. More broadly, our viral-genetic approaches provide an efficient intersectional means to target neuronal populations based on cell type and projection pattern.

Evidence for a Specific Integrative Mechanism for Episodic Memory Mediated by AMPA/kainate Receptors in a Circuit Involving Medial Prefrontal Cortex and Hippocampal CA3 Region.

PubMed

de Souza Silva, Maria A; Huston, Joseph P; Wang, An-Li; Petri, David; Chao, Owen Yuan-Hsin

2016-07-01

We asked whether episodic-like memory requires neural mechanisms independent of those that mediate its component memories for "what," "when," and "where," and if neuronal connectivity between the medial prefrontal cortex (mPFC) and the hippocampus (HPC) CA3 subregion is essential for episodic-like memory. Unilateral lesion of the mPFC was combined with unilateral lesion of the CA3 in the ipsi- or contralateral hemispheres in rats. Episodic-like memory was tested using a task, which assesses the integration of memories for "what, where, and when" concomitantly. Tests for novel object recognition (what), object place (where), and temporal order memory (when) were also applied. Bilateral disconnection of the mPFC-CA3 circuit by N-methyl-d-aspartate (NMDA) lesions disrupted episodic-like memory, but left the component memories for object, place, and temporal order, per se, intact. Furthermore, unilateral NMDA lesion of the CA3 plus injection of (6-cyano-7-nitroquinoxaline-2,3-dione) (CNQX) (AMPA/kainate receptor antagonist), but not AP-5 (NMDA receptor antagonist), into the contralateral mPFC also disrupted episodic-like memory, indicating the mPFC AMPA/kainate receptors as critical for this circuit. These results argue for a selective neural system that specifically subserves episodic memory, as it is not critically involved in the control of its component memories for object, place, and time. © The Author 2015. Published by Oxford University Press. All rights reserved. For Permissions, please e-mail: journals.permissions@oup.com.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

Slow-wave propagation on monolithic microwave integrated circuits with layered and non-layered structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tzuang, C.K.C.

1986-01-01

Various MMIC (monolithic microwave integrated circuit) planar waveguides have shown possible existence of a slow-wave propagation. In many practical applications of these slow-wave circuits, the semiconductor devices have nonuniform material properties that may affect the slow-wave propagation. In the first part of the dissertation, the effects of the nonuniform material properties are studied by a finite-element method. In addition, the transient pulse excitations of these slow-wave circuits also have great theoretical and practical interests. In the second part, the time-domain analysis of a slow-wave coplanar waveguide is presented.

Radome Positioner for the RFSS (Radio Frequency Simulation System).

DTIC Science & Technology

1978-02-27

its associated circuits contained on the Motorola M68MM01A-I micro- module (See Drawing 64). This board contains the 6800 microprocessor. Ik bytes of...D 00 1~ 0 41 + C.) ) -44 208 g. Small encoder diameter achieved by using integrated circuit modules . h. Stainless steel case. U...to the 30 integrated circuits which actually comprise the heart of the-microcomputer. This dramatic reduction in parts count re- sults in a similar

Artificial Muscle (AM) Cilia Array for Underwater Systems

DTIC Science & Technology

2016-12-15

structures, including cilia-like structures. Specifically, a custom 3D printer was created that utilizes custom-made Nafion filament for 30 printing of custom... printing ) of IPMC material to create custom-shaped AM structures, including cilia-like structures. Various custom-shaped AM structures were fabricated via...integrating square cross-section IPMC actuators with a printed circuit board power delivery system. IV. Concise Accomplishments Performance

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G. (Inventor)

1985-01-01

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

VLSI technology for smaller, cheaper, faster return link systems

NASA Technical Reports Server (NTRS)

Nanzetta, Kathy; Ghuman, Parminder; Bennett, Toby; Solomon, Jeff; Dowling, Jason; Welling, John

1994-01-01

Very Large Scale Integration (VLSI) Application-specific Integrated Circuit (ASIC) technology has enabled substantially smaller, cheaper, and more capable telemetry data systems. However, the rapid growth in available ASIC fabrication densities has far outpaced the application of this technology to telemetry systems. Available densities have grown by well over an order magnitude since NASA's Goddard Space Flight Center (GSFC) first began developing ASIC's for ground telemetry systems in 1985. To take advantage of these higher integration levels, a new generation of ASIC's for return link telemetry processing is under development. These new submicron devices are designed to further reduce the cost and size of NASA return link processing systems while improving performance. This paper describes these highly integrated processing components.

Integrated Circuits in the Introductory Electronics Laboratory

ERIC Educational Resources Information Center

English, Thomas C.; Lind, David A.

1973-01-01

Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

Chemical vapor deposition for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1980-01-01

Chemical vapor deposition for automatic processing of integrated circuits including the wafer carrier and loading from a receiving air track into automatic furnaces and unloading on to a sending air track is discussed. Passivation using electron beam deposited quartz is also considered.

75 FR 75694 - Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-06

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-648] Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing Same; Notice of Commission Decision To Dismiss the Investigation as Moot AGENCY: U.S. International Trade Commission. ACTION: Notice. SUMMARY...

Optoelectronic Integrated Circuits For Neural Networks

NASA Technical Reports Server (NTRS)

Psaltis, D.; Katz, J.; Kim, Jae-Hoon; Lin, S. H.; Nouhi, A.

1990-01-01

Many threshold devices placed on single substrate. Integrated circuits containing optoelectronic threshold elements developed for use as planar arrays of artificial neurons in research on neural-network computers. Mounted with volume holograms recorded in photorefractive crystals serving as dense arrays of variable interconnections between neurons.

A Program in Semiconductor Processing.

ERIC Educational Resources Information Center

McConica, Carol M.

1984-01-01

A graduate program at Colorado State University which focuses on integrated circuit processing is described. The program utilizes courses from several departments while allowing students to apply chemical engineering techniques to an integrated circuit fabrication research topic. Information on employment of chemical engineers by electronics…

AIN-Based Packaging for SiC High-Temperature Electronics

NASA Technical Reports Server (NTRS)

Savrun, Ender

2004-01-01

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

PubMed

Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

2016-08-10

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Inspecting Engineering Samples

NASA Image and Video Library

2017-12-08

Goddard's Ritsko Wins 2011 SAVE Award The winner of the 2011 SAVE Award is Matthew Ritsko, a Goddard financial manager. His tool lending library would track and enable sharing of expensive space-flight tools and hardware after projects no longer need them. This set of images represents the types of tools used at NASA. To read more go to: www.nasa.gov/topics/people/features/ritsko-save.html Dr. Doug Rabin (Code 671) and PI La Vida Cooper (Code 564) inspect engineering samples of the HAS-2 imager which will be tested and readout using a custom ASIC with a 16-bit ADC (analog to digital converter) and CDS (correlated double sampling) circuit designed by the Code 564 ASIC group as a part of an FY10 IRAD. The purpose of the IRAD was to develop and high resolution digitizer for Heliophysics applications such as imaging. Future goals for the collaboration include characterization testing and eventually a sounding rocket flight of the integrated system. *ASIC= Application Specific Integrated Circuit NASA/GSFC/Chris Gunn

High-performance indium gallium phosphide/gallium arsenide heterojunction bipolar transistors

NASA Astrophysics Data System (ADS)

Ahmari, David Abbas

Heterojunction bipolar transistors (HBTs) have demonstrated the high-frequency characteristics as well as the high linearity, gain, and power efficiency necessary to make them attractive for a variety of applications. Specific applications for which HBTs are well suited include amplifiers, analog-to-digital converters, current sources, and optoelectronic integrated circuits. Currently, most commercially available HBT-based integrated circuits employ the AlGaAs/GaAs material system in applications such as a 4-GHz gain block used in wireless phones. As modern systems require higher-performance and lower-cost devices, HBTs utilizing the newer, InGaP/GaAs and InP/InGaAs material systems will begin to dominate the HBT market. To enable the widespread use of InGaP/GaAs HBTs, much research on the fabrication, performance, and characterization of these devices is required. This dissertation will discuss the design and implementation of high-performance InGaP/GaAs HBTs as well as study HBT device physics and characterization.

Readout circuit with novel background suppression for long wavelength infrared focal plane arrays

NASA Astrophysics Data System (ADS)

Xie, L.; Xia, X. J.; Zhou, Y. F.; Wen, Y.; Sun, W. F.; Shi, L. X.

2011-02-01

In this article, a novel pixel readout circuit using a switched-capacitor integrator mode background suppression technique is presented for long wavelength infrared focal plane arrays. This circuit can improve dynamic range and signal-to-noise ratio by suppressing the large background current during integration. Compared with other background suppression techniques, the new background suppression technique is less sensitive to the process mismatch and has no additional shot noise. The proposed circuit is theoretically analysed and simulated while taking into account the non-ideal characteristics. The result shows that the background suppression non-uniformity is ultra-low even for a large process mismatch. The background suppression non-uniformity of the proposed circuit can also remain very small with technology scaling.

Low energy switching driver for printed electrochromic displays

NASA Astrophysics Data System (ADS)

Ionescu, Ciprian; Dobre, Robert Alexandru

2016-12-01

This paper continues our investigations in relatively new developed printed electrochromic displays (ECDs). There are some advantages of ECDs that recommend them for specific low end and short time disposable display applications, for instance the ECD devices present low power consumption (they are non-emissive, reflective, i.e. passive) and have a good viewing angle, looking like ink on paper. It is to note that these displays are still in research, and partly present on the market. There are a lot of papers regarding the chemistry and electro-chemistry of the device, but very few about concrete schematics for driving these displays. Due to their low penetration in applications, and due to lack of standardization, there are not yet realized custom drivers in form of integrated circuits. The driving of these circuits is not at all so simple. These are very sensitive devices in what it concerns exceeding the drive pulse duration and voltage level. In order to take full advantage of the low power consumption of this device, a good driver circuitry needs to be realized also in the "low power" class. We propose in this paper an original driving circuit, that has very low consumption and that can be even supplied by a supercapacitor or by a printed battery. The whole structure can be further integrated as a system on foil.

V-band integrated quadriphase modulator

NASA Technical Reports Server (NTRS)

Grote, A.; Chang, K.

1983-01-01

A V-band integrated circuit quadriphase shift keyed modulator/exciter for space communications systems was developed. Intersatellite communications systems require direct modulation at 60 GHz to enhance signal processing capability. For most systems, particularly space applications, small and lightweight components are essential to alleviate severe system design constraints. Thus to achieve wideband, high data rate systems, direct modulation techniques at millimeter waves using solid state integrated circuit technology are an integral part of the overall technology developments.

Industrial Electronics II for ICT. Student's Manual.

ERIC Educational Resources Information Center

Snider, Bob

This student manual contains the following six units for classroom and laboratory experiences in high school industrial electronics: (1) introduction and review of DC and AC circuits; (2) semiconductors; (3) integrated circuits; (4) digital basics; (5) complex digital circuits; and (6) computer circuits. The units include unit objectives, specific…

Fully chip-embedded automation of a multi-step lab-on-a-chip process using a modularized timer circuit.

PubMed

Kang, Junsu; Lee, Donghyeon; Heo, Young Jin; Chung, Wan Kyun

2017-11-07

For highly-integrated microfluidic systems, an actuation system is necessary to control the flow; however, the bulk of actuation devices including pumps or valves has impeded the broad application of integrated microfluidic systems. Here, we suggest a microfluidic process control method based on built-in microfluidic circuits. The circuit is composed of a fluidic timer circuit and a pneumatic logic circuit. The fluidic timer circuit is a serial connection of modularized timer units, which sequentially pass high pressure to the pneumatic logic circuit. The pneumatic logic circuit is a NOR gate array designed to control the liquid-controlling process. By using the timer circuit as a built-in signal generator, multi-step processes could be done totally inside the microchip without any external controller. The timer circuit uses only two valves per unit, and the number of process steps can be extended without limitation by adding timer units. As a demonstration, an automation chip has been designed for a six-step droplet treatment, which entails 1) loading, 2) separation, 3) reagent injection, 4) incubation, 5) clearing and 6) unloading. Each process was successfully performed for a pre-defined step-time without any external control device.

Convergence of circuit dysfunction in ASD: a common bridge between diverse genetic and environmental risk factors and common clinical electrophysiology

PubMed Central

Port, Russell G.; Gandal, Michael J.; Roberts, Timothy P. L.; Siegel, Steven J.; Carlson, Gregory C.

2014-01-01

Most recent estimates indicate that 1 in 68 children are affected by an autism spectrum disorder (ASD). Though decades of research have uncovered much about these disorders, the pathological mechanism remains unknown. Hampering efforts is the seeming inability to integrate findings over the micro to macro scales of study, from changes in molecular, synaptic and cellular function to large-scale brain dysfunction impacting sensory, communicative, motor and cognitive activity. In this review, we describe how studies focusing on neuronal circuit function provide unique context for identifying common neurobiological disease mechanisms of ASD. We discuss how recent EEG and MEG studies in subjects with ASD have repeatedly shown alterations in ensemble population recordings (both in simple evoked related potential latencies and specific frequency subcomponents). Because these disease-associated electrophysiological abnormalities have been recapitulated in rodent models, studying circuit differences in these models may provide access to abnormal circuit function found in ASD. We then identify emerging in vivo and ex vivo techniques, focusing on how these assays can characterize circuit level dysfunction and determine if these abnormalities underlie abnormal clinical electrophysiology. Such circuit level study in animal models may help us understand how diverse genetic and environmental risks can produce a common set of EEG, MEG and anatomical abnormalities found in ASD. PMID:25538564

Circuit for Communication Over Power Lines

NASA Technical Reports Server (NTRS)

Krasowski, Michael J.; Prokop, Normal F.; Greer, Lawrence C., III; Nappier, Jennifer

2011-01-01

Many distributed systems share common sensors and instruments along with a common power line supplying current to the system. A communication technique and circuit has been developed that allows for the simple inclusion of an instrument, sensor, or actuator node within any system containing a common power bus. Wherever power is available, a node can be added, which can then draw power for itself, its associated sensors, and actuators from the power bus all while communicating with other nodes on the power bus. The technique modulates a DC power bus through capacitive coupling using on-off keying (OOK), and receives and demodulates the signal from the DC power bus through the same capacitive coupling. The circuit acts as serial modem for the physical power line communication. The circuit and technique can be made of commercially available components or included in an application specific integrated circuit (ASIC) design, which allows for the circuit to be included in current designs with additional circuitry or embedded into new designs. This device and technique moves computational, sensing, and actuation abilities closer to the source, and allows for the networking of multiple similar nodes to each other and to a central processor. This technique also allows for reconfigurable systems by adding or removing nodes at any time. It can do so using nothing more than the in situ power wiring of the system.

System-on-chip-centric unattended embedded sensors in homeland security and defense applications

NASA Astrophysics Data System (ADS)

Jannson, Tomasz; Forrester, Thomas; Degrood, Kevin; Shih, Min-Yi; Walter, Kevin; Lee, Kang; Gans, Eric; Esterkin, Vladimir

2009-05-01

System-on-chip (SoC) single-die electronic integrated circuit (IC) integration has recently been attracting a great deal of attention, due to its high modularity, universality, and relatively low fabrication cost. The SoC also has low power consumption and it is naturally suited to being a base for integration of embedded sensors. Such sensors can run unattended, and can be either commercial off-the-shelf (COTS) electronic, COTS microelectromechanical systems (MEMS), or optical-COTS or produced in house (i.e., at Physical Optics Corporation, POC). In the version with the simplest electronic packaging, they can be integrated with low-power wireless RF that can communicate with a central processing unit (CPU) integrated in-house and installed on the specific platform of interest. Such a platform can be a human body (for e-clothing), unmanned aerial vehicle (UAV), unmanned ground vehicle (UGV), or many others. In this paper we discuss SoC-centric embedded unattended sensors in Homeland Security and military applications, including specific application scenarios (or CONOPS). In one specific example, we analyze an embedded polarization optical sensor produced in house, including generalized Lambertian light-emitting diode (LED) sources and secondary nonimaging optics (NIO).

Millimeter-wave and terahertz integrated circuit antennas

NASA Technical Reports Server (NTRS)

Rebeiz, Gabriel M.

1992-01-01

This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

A scalable neural chip with synaptic electronics using CMOS integrated memristors.

PubMed

Cruz-Albrecht, Jose M; Derosier, Timothy; Srinivasa, Narayan

2013-09-27

The design and simulation of a scalable neural chip with synaptic electronics using nanoscale memristors fully integrated with complementary metal-oxide-semiconductor (CMOS) is presented. The circuit consists of integrate-and-fire neurons and synapses with spike-timing dependent plasticity (STDP). The synaptic conductance values can be stored in memristors with eight levels, and the topology of connections between neurons is reconfigurable. The circuit has been designed using a 90 nm CMOS process with via connections to on-chip post-processed memristor arrays. The design has about 16 million CMOS transistors and 73 728 integrated memristors. We provide circuit level simulations of the entire chip performing neuronal and synaptic computations that result in biologically realistic functional behavior.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, David R.

1989-01-01

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1989-09-12

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits

PubMed Central

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-01-01

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits. DOI: http://dx.doi.org/10.7554/eLife.10056.001 PMID:26705334

5A Zirconium Dioxide Ammonia Microsensor Integrated with a Readout Circuit Manufactured Using the 0.18 μm CMOS Process

PubMed Central

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-01-01

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm. PMID:23503294

An assessment of the impact of the Department of Defense very high speed integrated circuit program

NASA Astrophysics Data System (ADS)

1982-01-01

The technical and economic effects of the Department of Defense's (DoD) development program for very-high-speed integrated circuits (VHSIC) are examined. The probable effects of this program on the domestic aspects and international position of the integrated-circuit (IC) industry as they relate to the interests of the general public and the DoD are considered. The report presents a review of the unique DoD needs that motivate VHSIC research and development; an estimate of the degree of which these needs are likely to be met by the VHSIC program; a discussion of the effects of the program's demands for manpower, materials, and design and processing technologies; the problems connected with the program's technology export controls; and an assessment of the impact of the program on the structure of the U.S. integrated-circuit industry, its continued development and production of civilian consumer products, and its international competitive position.

Identifying the integrated neural networks involved in capsaicin-induced pain using fMRI in awake TRPV1 knockout and wild-type rats

PubMed Central

Yee, Jason R.; Kenkel, William; Caccaviello, John C.; Gamber, Kevin; Simmons, Phil; Nedelman, Mark; Kulkarni, Praveen; Ferris, Craig F.

2015-01-01

In the present study, we used functional MRI in awake rats to investigate the pain response that accompanies intradermal injection of capsaicin into the hindpaw. To this end, we used BOLD imaging together with a 3D segmented, annotated rat atlas and computational analysis to identify the integrated neural circuits involved in capsaicin-induced pain. The specificity of the pain response to capsaicin was tested in a transgenic model that contains a biallelic deletion of the gene encoding for the transient receptor potential cation channel subfamily V member 1 (TRPV1). Capsaicin is an exogenous ligand for the TRPV1 receptor, and in wild-type rats, activated the putative pain neural circuit. In addition, capsaicin-treated wild-type rats exhibited activation in brain regions comprising the Papez circuit and habenular system, systems that play important roles in the integration of emotional information, and learning and memory of aversive information, respectively. As expected, capsaicin administration to TRPV1-KO rats failed to elicit the robust BOLD activation pattern observed in wild-type controls. However, the intradermal injection of formalin elicited a significant activation of the putative pain pathway as represented by such areas as the anterior cingulate, somatosensory cortex, parabrachial nucleus, and periaqueductal gray. Notably, comparison of neural responses to capsaicin in wild-type vs. knock-out rats uncovered evidence that capsaicin may function in an antinociceptive capacity independent of TRPV1 signaling. Our data suggest that neuroimaging of pain in awake, conscious animals has the potential to inform the neurobiological basis of full and integrated perceptions of pain. PMID:25745388

Development of a physically-based planar inductors VHDL-AMS model for integrated power converter design

NASA Astrophysics Data System (ADS)

Ammouri, Aymen; Ben Salah, Walid; Khachroumi, Sofiane; Ben Salah, Tarek; Kourda, Ferid; Morel, Hervé

2014-05-01

Design of integrated power converters needs prototype-less approaches. Specific simulations are required for investigation and validation process. Simulation relies on active and passive device models. Models of planar devices, for instance, are still not available in power simulator tools. There is, thus, a specific limitation during the simulation process of integrated power systems. The paper focuses on the development of a physically-based planar inductor model and its validation inside a power converter during transient switching. The planar inductor model remains a complex device to model, particularly when the skin, the proximity and the parasitic capacitances effects are taken into account. Heterogeneous simulation scheme, including circuit and device models, is successfully implemented in VHDL-AMS language and simulated in Simplorer platform. The mixed simulation results has been favorably tested and compared with practical measurements. It is found that the multi-domain simulation results and measurements data are in close agreement.

Analysis of the possibility of a PGA309 integrated circuit application in pressure sensors

NASA Astrophysics Data System (ADS)

Walendziuk, Wojciech; Baczewski, Michal; Idzkowski, Adam

2016-09-01

This article present the results of research concerning the analysis of the possibilities of applying a PGA309 integrated circuit in transducers used for pressure measurement. The experiments were done with the use of a PGA309EVM-USB evaluation circuit with a BD|SENSORS pressure sensor. A specially prepared MATLAB script was used in the process of the calibration setting choice and the results analysis. The article discusses the worked out algorithm that processes the measurement results, i.e. the algorithm which calculates the desired gain and the offset adjustment voltage of the transducer measurement bridge in relation to the input signal range of the integrated circuit and the temperature of the environment (temperature compensation). The checking procedure was conducted in a measurement laboratory and the obtained result were analyzed and discussed.

Microwave integrated circuit for Josephson voltage standards

NASA Technical Reports Server (NTRS)

Holdeman, L. B.; Toots, J.; Chang, C. C. (Inventor)

1980-01-01

A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.

Recent progress in low-temperature-process monolithic three dimension technology

NASA Astrophysics Data System (ADS)

Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Shen, Chang-Hong; Shieh, Jia-Min; Yeh, Wen-Kuan; Wu, Meng-Chyi

2018-04-01

Monolithic three-dimension (3D) integration is an ultimate alternative method of fabricating high density, high performance, and multi-functional integrated circuits. It offers the promise of being a new approach to increase system performance. How to manage the thermal impact of multi-tiered processes, such as dopant activation, source/drain silicidation, and channel formation, and to prevent the degradation of pre-existing devices/circuits become key challenges. In this paper, we provide updates on several important monolithic 3D works, particularly in sequentially stackable channels, and our recent achievements in monolithic 3D integrated circuit (3D-IC). These results indicate that the advanced 3D architecture with novel design tools enables ultrahigh-density stackable circuits to have superior performance and low power consumption for future artificial intelligence (AI) and internet of things (IoTs) application.

Electronic plants

PubMed Central

Stavrinidou, Eleni; Gabrielsson, Roger; Gomez, Eliot; Crispin, Xavier; Nilsson, Ove; Simon, Daniel T.; Berggren, Magnus

2015-01-01

The roots, stems, leaves, and vascular circuitry of higher plants are responsible for conveying the chemical signals that regulate growth and functions. From a certain perspective, these features are analogous to the contacts, interconnections, devices, and wires of discrete and integrated electronic circuits. Although many attempts have been made to augment plant function with electroactive materials, plants’ “circuitry” has never been directly merged with electronics. We report analog and digital organic electronic circuits and devices manufactured in living plants. The four key components of a circuit have been achieved using the xylem, leaves, veins, and signals of the plant as the template and integral part of the circuit elements and functions. With integrated and distributed electronics in plants, one can envisage a range of applications including precision recording and regulation of physiology, energy harvesting from photosynthesis, and alternatives to genetic modification for plant optimization. PMID:26702448

Spacecraft optical disk recorder memory buffer control

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1992-01-01

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

PubMed Central

Kazior, Thomas E.

2014-01-01

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications. PMID:24567473

Beyond CMOS: heterogeneous integration of III-V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems.

PubMed

Kazior, Thomas E

2014-03-28

Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

An X-Band SOS Resistive Gate-Insulator-Semiconductor /RIS/ switch

NASA Astrophysics Data System (ADS)

Kwok, S. P.

1980-02-01

The new X-Band Resistive Gate-Insulator-Semiconductor (RIS) switch has been fabricated on silicon-on-sapphire, and its equivalent circuit model characterized. An RIS SPST switch with 20-dB on/off isolation, 1.2-dB insertion loss, and power handling capacity in excess of 20-W peak has been achieved at X band. The device switching time is on the order of 600 ns, and it requires negligible control holding current in both on and off states. The device is compatible with monolithic integrated-circuit technology and thus is suitable for integration into low-cost monolithic phase shifters or other microwave integrated circuits.

Test Structures For Bumpy Integrated Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Laboratory experiments in integrated circuit fabrication

NASA Technical Reports Server (NTRS)

Jenkins, Thomas J.; Kolesar, Edward S.

1993-01-01

The objectives of the experiment are fourfold: to provide practical experience implementing the fundamental processes and technology associated with the science and art of integrated circuit (IC) fabrication; to afford the opportunity for the student to apply the theory associated with IC fabrication and semiconductor device operation; to motivate the student to exercise engineering decisions associated with fabricating integrated circuits; and to complement the theory of n-channel MOS and diffused devices that are presented in the classroom by actually fabricating and testing them. Therefore, a balance between theory and practice can be realized in the education of young engineers, whose education is often criticized as lacking sufficient design and practical content.

Amplifier improvement circuit

NASA Technical Reports Server (NTRS)

Sturman, J.

1968-01-01

Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.

Free-space coherent optical communication with orbital angular, momentum multiplexing/demultiplexing using a hybrid 3D photonic integrated circuit.

PubMed

Guan, Binbin; Scott, Ryan P; Qin, Chuan; Fontaine, Nicolas K; Su, Tiehui; Ferrari, Carlo; Cappuzzo, Mark; Klemens, Fred; Keller, Bob; Earnshaw, Mark; Yoo, S J B

2014-01-13

We demonstrate free-space space-division-multiplexing (SDM) with 15 orbital angular momentum (OAM) states using a three-dimensional (3D) photonic integrated circuit (PIC). The hybrid device consists of a silica planar lightwave circuit (PLC) coupled to a 3D waveguide circuit to multiplex/demultiplex OAM states. The low excess loss hybrid device is used in individual and two simultaneous OAM states multiplexing and demultiplexing link experiments with a 20 Gb/s, 1.67 b/s/Hz quadrature phase shift keyed (QPSK) signal, which shows error-free performance for 379,960 tested bits for all OAM states.

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1980-01-01

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.

Flow sensor based on monolithic integration of organic light-emitting diodes (OLEDs) and CMOS circuits

NASA Astrophysics Data System (ADS)

Reckziegel, S.; Kreye, D.; Puegner, T.; Vogel, U.; Scholles, M.; Grillberger, C.; Fehse, K.

2009-02-01

In this paper we present an optoelectronic integrated circuit (OEIC) based on monolithic integration of organic lightemitting diodes (OLEDs) and CMOS technology. By the use of integrated circuits, photodetectors and highly efficient OLEDs on the same silicon chip, novel OEICs with combined sensors and actuating elements can be realized. The OLEDs are directly deposited on the CMOS top metal. The metal layer serves as OLED bottom electrode and determines the bright area. Furthermore, the area below the OLED electrodes can be used for integrated circuits. The monolithic integration of actuators, sensors and electronics on a common silicon substrate brings significant advantages in most sensory applications. The developed OEIC combines three different types of sensors: a reflective sensor, a color sensor and a particle flow sensor and is configured with an orange (597nm) emitting p-i-n OLED. We describe the architecture of such a monolithic OEIC and demonstrate a method to determine the velocity of a fluid being conveyed pneumatically in a transparent capillary. The integrated OLEDs illuminate the capillary with the flowing fluid. The fluid has a random reflection profile. Depending on the velocity and a random contrast difference, more or less light is reflected back to the substrate. The integrated photodiodes located at different fixed points detect the reflected light and using crosscorrelation, the velocity is calculated from the time in which contrast differences move over a fixed distance.

Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

NASA Technical Reports Server (NTRS)

1972-01-01

Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

Pressure-Sensor Assembly Technique

NASA Technical Reports Server (NTRS)

Pruzan, Daniel A.

2003-01-01

Nielsen Engineering & Research (NEAR) recently developed an ultrathin data acquisition system for use in turbomachinery testing at NASA Glenn Research Center. This system integrates a microelectromechanical- systems- (MEMS-) based absolute pressure sensor [0 to 50 psia (0 to 345 kPa)], temperature sensor, signal-conditioning application-specific integrated circuit (ASIC), microprocessor, and digital memory into a package which is roughly 2.8 in. (7.1 cm) long by 0.75 in. (1.9 cm) wide. Each of these components is flip-chip attached to a thin, flexible circuit board and subsequently ground and polished to achieve a total system thickness of 0.006 in. (0.15 mm). Because this instrument is so thin, it can be quickly adhered to any surface of interest where data can be collected without disrupting the flow being investigated. One issue in the development of the ultrathin data acquisition system was how to attach the MEMS pressure sensor to the circuit board in a manner which allowed the sensor s diaphragm to communicate with the ambient fluid while providing enough support for the chip to survive the grinding and polishing operations. The technique, developed by NEAR and Jabil Technology Services Group (San Jose, CA), is described below. In the approach developed, the sensor is attached to the specially designed circuit board, see Figure 1, using a modified flip-chip technique. The circular diaphragm on the left side of the sensor is used to actively measure the ambient pressure, while the diaphragm on the right is used to compensate for changes in output due to temperature variations. The circuit board is fabricated with an access hole through it so that when the completed system is installed onto a wind tunnel model (chip side down), the active diaphragm is exposed to the environment. After the sensor is flip-chip attached to the circuit board, the die is underfilled to support the chip during the subsequent grinding and polishing operations. To prevent this underfill material from getting onto the sensor s diaphragms, the circuit board is fabricated with two 25- micrometer-tall polymer rings, sized so that the diaphragms fit inside the rings once the chip is attached.

GaAs optoelectronic neuron arrays

NASA Technical Reports Server (NTRS)

Lin, Steven; Grot, Annette; Luo, Jiafu; Psaltis, Demetri

1993-01-01

A simple optoelectronic circuit integrated monolithically in GaAs to implement sigmoidal neuron responses is presented. The circuit integrates a light-emitting diode with one or two transistors and one or two photodetectors. The design considerations for building arrays with densities of up to 10,000/sq cm are discussed.

77 FR 66481 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-11-05

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-822] Certain Integrated Circuits.... International Trade Commission. ACTION: Notice. SUMMARY: Notice is hereby given that the U.S. International... the General Counsel, U.S. International Trade Commission, 500 E Street SW., Washington, DC 20436...

Nanoporous Silicon Ignition of JA2 Propellant

DTIC Science & Technology

2014-06-01

signals that would satisfy the hazard of electromagnetic radiation to ordnance (HERO) requirements of modern munitions. Such integrated circuits can...NUMBER (Include area code) 410-278-6098 Standard Form 298 (Rev. 8/98) Prescribed by ANSI Std. Z39.18 iii Contents List of Figures iv 1...fabricated as an integral element of a silicon chip. Integrated circuits that filter the firing command signal could remove extraneous electromagnetic

A Serial Bus Architecture for Parallel Processing Systems

DTIC Science & Technology

1986-09-01

pins are needed to effect the data transfer. As Integrated Circuits grow in computational power, more communication capacity is needed, pushing...chip. The wider the communication path the more pins are needed to effect the data transfer. As Integrated Circuits grow in computational power, more...13 2. A Suitable Architecture Sought 14 II. OPTIMUM ARCHITECTURE OF LARGE INTEGRATED A. PARTIONING SILICON FOR MAXIMUM 1? 1. Transistor

Analysis of shielded CPW discontinuities with air-bridges

NASA Technical Reports Server (NTRS)

Dib, N. I.; Katehi, P. B.; Ponchak, George E.

1992-01-01

The effect of air-bridges on the performance of various coplanar waveguides (CPW) discontinuities is studied. Specifically, the coupled open-end CPW's and the short-end shunt CPW stub discontinuities are considered. The high frequency effect of the air-bridge is evaluated using a hybrid technique. At first, the frequency dependent equivalent circuit of the planar discontinuity without the air-bridge is derived using the Space Domain Integral Equation (SDIE) method. Then, the circuit is modified by incorporating the air-bridge's parasitic inductance and capacitance which are evaluated using a simple quasi-static model. The frequency response of each discontinuity with and without the air-bridge is studied and the scattering parameters are plotted in the frequency range 30-50 GHz for typical CPW dimensions.

Integrated low power digital gyro control electronics

NASA Technical Reports Server (NTRS)

M'Closkey, Robert (Inventor); Grayver, Eugene (Inventor); Challoner, A. Dorian (Inventor); Hayworth, Ken J. (Inventor)

2005-01-01

Embodiments of the invention generally encompass a digital, application specific integrated circuit (ASIC) has been designed to perform excitation of a selected mode within a vibratory rate gyroscope, damping, or force-rebalance, of other modes within the sensor, and signal demodulation of the in-phase and quadrature components of the signal containing the angular rate information. The ASIC filters dedicated to each channel may be individually programmed to accommodate different rate sensor designs/technology or variations within the same class of sensors. The ASIC architecture employs a low-power design, making the ASIC, particularly suitable for use in power-sensitive applications.

Application of software technology to a future spacecraft computer design

NASA Technical Reports Server (NTRS)

Labaugh, R. J.

1980-01-01

A study was conducted to determine how major improvements in spacecraft computer systems can be obtained from recent advances in hardware and software technology. Investigations into integrated circuit technology indicated that the CMOS/SOS chip set being developed for the Air Force Avionics Laboratory at Wright Patterson had the best potential for improving the performance of spaceborne computer systems. An integral part of the chip set is the bit slice arithmetic and logic unit. The flexibility allowed by microprogramming, combined with the software investigations, led to the specification of a baseline architecture and instruction set.

Thermally-induced voltage alteration for integrated circuit analysis

DOEpatents

Cole, Jr., Edward I.

2000-01-01

A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

Electro-optical backplane demonstrator with integrated multimode gradient-index thin glass waveguide panel

NASA Astrophysics Data System (ADS)

Schröder, Henning; Brusberg, Lars; Pitwon, Richard; Whalley, Simon; Wang, Kai; Miller, Allen; Herbst, Christian; Weber, Daniel; Lang, Klaus-Dieter

2015-03-01

Optical interconnects for data transmission at board level offer increased energy efficiency, system density, and bandwidth scalability compared to purely copper driven systems. We present recent results on manufacturing of electrooptical printed circuit board (PCB) with integrated planar glass waveguides. The graded index multi-mode waveguides are patterned inside commercially available thin-glass panels by performing a specific ion-exchange process. The glass waveguide panel is embedded within the layer stack-up of a PCB using proven industrial processes. This paper describes the design, manufacture, assembly and characterization of the first electro-optical backplane demonstrator based on integrated planar glass waveguides. The electro-optical backplane in question is created by laminating the glass waveguide panel into a conventional multi-layer electronic printed circuit board stack-up. High precision ferrule mounts are automatically assembled, which will enable MT compliant connectors to be plugged accurately to the embedded waveguide interfaces on the glass panel edges. The demonstration platform comprises a standardized sub-rack chassis and five pluggable test cards each housing optical engines and pluggable optical connectors. The test cards support a variety of different data interfaces and can support data rates of up to 32 Gb/s per channel.

Micro-miniature radio frequency transmitter for communication and tracking applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Crutcher, R.I.; Emery, M.S.; Falter, K.G.

1996-12-31

A micro-miniature radio frequency (rf) transmitter has been developed and demonstrated by the Oak Ridge National Laboratory. The objective of the rf transmitter development was to maximize the transmission distance while drastically shrinking the overall transmitter size, including antenna. Based on analysis and testing, an application-specific integrated circuit (ASIC) with a 16-GHz gallium arsenide (GaAs) oscillator and integrated on-chip antenna was designed and fabricated using microwave monolithic integrated circuit (MMIC) technology. Details of the development and the results of various field tests will be discussed. The rf transmitter is applicable to covert surveillance and tracking scenarios due to its smallmore » size of 2.2 x 2.2 mm, including the antenna. Additionally, the 16-GHz frequency is well above the operational range of consumer-grade radio scanners, providing a degree of protection from unauthorized interception. Variations of the transmitter design have been demonstrated for tracking and tagging beacons, transmission of digital data, and transmission of real-time analog video from a surveillance camera. Preliminary laboratory measurements indicate adaptability to direct-sequence spread-spectrum transmission, providing a low probability of intercept and/or detection. Concepts related to law enforcement applications will be presented.« less

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

NASA Astrophysics Data System (ADS)

Shulaker, Max M.; Hills, Gage; Park, Rebecca S.; Howe, Roger T.; Saraswat, Krishna; Wong, H.-S. Philip; Mitra, Subhasish

2017-07-01

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors—promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage—fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip.

PubMed

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish

2017-07-05

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage-fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce 'highly processed' information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Product assurance technology for custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Blaes, B. R.; Jennings, G. A.; Moore, B. T.; Nixon, R. H.; Pina, C. A.; Sayah, H. R.; Sievers, M. W.; Stahlberg, N. F.

1985-01-01

The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification.

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, E.I. Jr.

1996-06-04

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs. 5 figs.

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, Jr., Edward I.

1996-01-01

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs.

Quantum dot rolled-up microtube optoelectronic integrated circuit.

PubMed

Bhowmick, Sishir; Frost, Thomas; Bhattacharya, Pallab

2013-05-15

A rolled-up microtube optoelectronic integrated circuit operating as a phototransceiver is demonstrated. The microtube is made of a InGaAs/GaAs strained bilayer with InAs self-organized quantum dots inserted in the GaAs layer. The phototransceiver consists of an optically pumped microtube laser and a microtube photoconductive detector connected by an a-Si/SiO2 waveguide. The loss in the waveguide and responsivity of the entire phototransceiver circuit are 7.96 dB/cm and 34 mA/W, respectively.

Monolithic microwave integrated circuits: Interconnections and packaging considerations

NASA Astrophysics Data System (ADS)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

PubMed

Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

2015-10-14

We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

Monolithic microwave integrated circuits: Interconnections and packaging considerations

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

1984-01-01

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

Very High Speed Integrated Circuits (VHSIC).

DTIC Science & Technology

1987-12-31

types with minor modification. The module has been designed both in the SEM-E format and the 3/4 Air Transport Regulation (ATR) format for new...a step that ensures that VHSIC designs ’ ’, documented in the VHDL will be readily transportable throughout the commercial and military IC design...maintain high reliability specifications in a standardized, transportable , andI:compiter-accessible format and to automatically generate test programs. This

Management of Microcircuit Obsolescence in a Pre-Production ACAT-ID Missile Program

DTIC Science & Technology

2002-12-01

and Engineering Center ASIC Application Specific Integrated Circuit AVCOM Avionics Component Obsolescence Management BRU Battery Replaceable Unit...then just a paper qualification, e.g. Board or Battery Replaceable Unit ( BRU ) testing. 5 After-market Package The Die is Available and Can Be...Encapsulated Microcircuits (PEM), speed change, failure rate) 8 Emulation Manufacture or re-engineering of a FFF Replacement 9 CCA or BRU Redesign Board

Displacement Damage in Bipolar Linear Integrated Circuits

NASA Technical Reports Server (NTRS)

Rax, B. G.; Johnston, A. H.; Miyahira, T.

2000-01-01

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

77 FR 74027 - Certain Integrated Circuit Packages Provided with Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-12-12

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-851] Certain Integrated Circuit Packages Provided with Multiple Heat- Conducting Paths and Products Containing Same; Commission Determination Not To... provided with multiple heat-conducting paths and products containing same by reason of infringement of...

Healing Voids In Interconnections In Integrated Circuits

NASA Technical Reports Server (NTRS)

Cuddihy, Edward F.; Lawton, Russell A.; Gavin, Thomas

1989-01-01

Unusual heat treatment heals voids in aluminum interconnections on integrated circuits (IC's). Treatment consists of heating IC to temperature between 200 degrees C and 400 degrees C, holding it at that temperature, and then plunging IC immediately into liquid nitrogen. Typical holding time at evaluated temperature is 30 minutes.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1988-04-20

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissipative layer of silicon nitride between a silicon substrate and the active device. Free carriers generated in the substrate are dissipated by the layer before they can build up charge on the active device. 1 fig.

Metallization failures

NASA Technical Reports Server (NTRS)

Beatty, R.

1971-01-01

Metallization-related failure mechanisms were shown to be a major cause of integrated circuit failures under accelerated stress conditions, as well as in actual use under field operation. The integrated circuit industry is aware of the problem and is attempting to solve it in one of two ways: (1) better understanding of the aluminum system, which is the most widely used metallization material for silicon integrated circuits both as a single level and multilevel metallization, or (2) evaluating alternative metal systems. Aluminum metallization offers many advantages, but also has limitations particularly at elevated temperatures and high current densities. As an alternative, multilayer systems of the general form, silicon device-metal-inorganic insulator-metal, are being considered to produce large scale integrated arrays. The merits and restrictions of metallization systems in current usage and systems under development are defined.

Pubertally born neurons and glia are functionally integrated into limbic and hypothalamic circuits of the male Syrian hamster.

PubMed

Mohr, Margaret A; Sisk, Cheryl L

2013-03-19

During puberty, the brain goes through extensive remodeling, involving the addition of new neurons and glia to brain regions beyond the canonical neurogenic regions (i.e., dentate gyrus and olfactory bulb), including limbic and hypothalamic cell groups associated with sex-typical behavior. Whether these pubertally born cells become functionally integrated into neural circuits remains unknown. To address this question, we gave male Syrian hamsters daily injections of the cell birthdate marker bromodeoxyuridine throughout puberty (postnatal day 28-49). Half of the animals were housed in enriched environments with access to a running wheel to determine whether enrichment increased the survival of pubertally born cells compared with the control environment. At 4 wk after the last BrdU injection, animals were allowed to interact with a receptive female and were then killed 1 h later. Triple-label immunofluorescence for BrdU, the mature neuron marker neuronal nuclear antigen, and the astrocytic marker glial fibrillary acidic protein revealed that a proportion of pubertally born cells in the medial preoptic area, arcuate nucleus, and medial amygdala differentiate into either mature neurons or astrocytes. Double-label immunofluorescence for BrdU and the protein Fos revealed that a subset of pubertally born cells in these regions is activated during sociosexual behavior, indicative of their functional incorporation into neural circuits. Enrichment affected the survival and activation of pubertally born cells in a brain region-specific manner. These results demonstrate that pubertally born cells located outside of the traditional neurogenic regions differentiate into neurons and glia and become functionally incorporated into neural circuits that subserve sex-typical behaviors.

An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm

PubMed Central

Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

2015-01-01

A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction. PMID:26287193

Cryogenic applications of commercial electronic components

NASA Astrophysics Data System (ADS)

Buchanan, Ernest D.; Benford, Dominic J.; Forgione, Joshua B.; Harvey Moseley, S.; Wollack, Edward J.

2012-10-01

We have developed a range of techniques useful for constructing analog and digital circuits for operation in a liquid Helium environment (4.2 K), using commercially available low power components. The challenges encountered in designing cryogenic electronics include finding components that can function usefully in the cold and possess low enough power dissipation so as not to heat the systems they are designed to measure. From design, test, and integration perspectives it is useful for components to operate similarly at room and cryogenic temperatures; however this is not a necessity. Some of the circuits presented here have been used successfully in the MUSTANG [1] and in the GISMO [2] camera to build a complete digital to analog multiplexer (which will be referred to as the Cryogenic Address Driver board). Many of the circuit elements described are of a more general nature rather than specific to the Cryogenic Address Driver board, and were studied as a part of a more comprehensive approach to addressing a larger set of cryogenic electronic needs.

Implementation of olfactory bulb glomerular-layer computations in a digital neurosynaptic core.

PubMed

Imam, Nabil; Cleland, Thomas A; Manohar, Rajit; Merolla, Paul A; Arthur, John V; Akopyan, Filipp; Modha, Dharmendra S

2012-01-01

We present a biomimetic system that captures essential functional properties of the glomerular layer of the mammalian olfactory bulb, specifically including its capacity to decorrelate similar odor representations without foreknowledge of the statistical distributions of analyte features. Our system is based on a digital neuromorphic chip consisting of 256 leaky-integrate-and-fire neurons, 1024 × 256 crossbar synapses, and address-event representation communication circuits. The neural circuits configured in the chip reflect established connections among mitral cells, periglomerular cells, external tufted cells, and superficial short-axon cells within the olfactory bulb, and accept input from convergent sets of sensors configured as olfactory sensory neurons. This configuration generates functional transformations comparable to those observed in the glomerular layer of the mammalian olfactory bulb. Our circuits, consuming only 45 pJ of active power per spike with a power supply of 0.85 V, can be used as the first stage of processing in low-power artificial chemical sensing devices inspired by natural olfactory systems.

Cryogenic Applications of Commercial Electronic Components

NASA Technical Reports Server (NTRS)

Buchanan, Ernest D.; Benford, Dominic J.; Forgione, Joshua B.; Moseley, S. Harvey; Wollack, Edward J.

2012-01-01

We have developed a range of techniques useful for constructing analog and digital circuits for operation in a liquid Helium environment (4.2K), using commercially available low power components. The challenges encountered in designing cryogenic electronics include finding components that can function usefully in the cold and possess low enough power dissipation so as not to heat the systems they are designed to measure. From design, test, and integration perspectives it is useful for components to operate similarly at room and cryogenic temperatures; however this is not a necessity. Some of the circuits presented here have been used successfully in the MUSTANG and in the GISMO camera to build a complete digital to analog multiplexer (which will be referred to as the Cryogenic Address Driver board). Many of the circuit elements described are of a more general nature rather than specific to the Cryogenic Address Driver board, and were studied as a part of a more comprehensive approach to addressing a larger set of cryogenic electronic needs.

An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm.

PubMed

Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

2015-08-13

A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.

Intrasystem Analysis Program (IAP) code summaries

NASA Astrophysics Data System (ADS)

Dobmeier, J. J.; Drozd, A. L. S.; Surace, J. A.

1983-05-01

This report contains detailed descriptions and capabilities of the codes that comprise the Intrasystem Analysis Program. The four codes are: Intrasystem Electromagnetic Compatibility Analysis Program (IEMCAP), General Electromagnetic Model for the Analysis of Complex Systems (GEMACS), Nonlinear Circuit Analysis Program (NCAP), and Wire Coupling Prediction Models (WIRE). IEMCAP is used for computer-aided evaluation of electromagnetic compatibility (ECM) at all stages of an Air Force system's life cycle, applicable to aircraft, space/missile, and ground-based systems. GEMACS utilizes a Method of Moments (MOM) formalism with the Electric Field Integral Equation (EFIE) for the solution of electromagnetic radiation and scattering problems. The code employs both full matrix decomposition and Banded Matrix Iteration solution techniques and is expressly designed for large problems. NCAP is a circuit analysis code which uses the Volterra approach to solve for the transfer functions and node voltage of weakly nonlinear circuits. The Wire Programs deal with the Application of Multiconductor Transmission Line Theory to the Prediction of Cable Coupling for specific classes of problems.

Neural representations of relevant and irrelevant features in perceptual decision making

PubMed Central

Kayser, Andrew S.; Erickson, Drew T.; Buchsbaum, Bradley R.; D'Esposito, Mark

2010-01-01

Although perceptual decision-making activates a network of brain areas involved in sensory, integrative, and motor functions, circuit activity can clearly be modulated by factors beyond the stimulus. Of particular interest is to understand how the network is modulated by top-down factors such as attention. Here we demonstrate in a motion coherence task that selective attention produces marked changes in the BOLD response in a subset of regions within a human perceptual decision-making circuit. Specifically, when motion is attended, the BOLD response decreases with increasing motion coherence in many regions, including the motion-sensitive area MT+, the intraparietal sulcus (IPS), and the inferior frontal sulcus (IFS). However, when motion is ignored, the negative parametric response in a subset of this circuit becomes positive. Through both modeling and connectivity analyses, we demonstrate that this inversion both reflects a top-down influence and segregates attentional from accumulation regions, thereby permitting us to further delineate the contributions of different regions to the perceptual decision. PMID:21106817

Cross-contact chain

NASA Technical Reports Server (NTRS)

Lieneweg, Udo (Inventor)

1988-01-01

A system is provided for use with wafers that include multiple integrated circuits that include two conductive layers in contact at multiple interfaces. Contact chains are formed beside the integrated circuits, each contact chain formed of the same two layers as the circuits, in the form of conductive segments alternating between the upper and lower layers and with the ends of the segments connected in series through interfaces. A current source passes a current through the series-connected segments, by way of a pair of current tabs connected to opposite ends of the series of segments. While the current flows, voltage measurements are taken between each of a plurality of pairs of voltage tabs, the two tabs of each pair connected to opposite ends of an interface that lies along the series-connected segments. A plot of interface conductances on a normal probability chart, enables prediction of the yield of good integrated circuits from the wafer.

Cross-contact chain

NASA Technical Reports Server (NTRS)

Lieneweg, U. (Inventor)

1986-01-01

A system is provided for use with wafers that include multiple integrated circuits that include two conductive layers in contact at multiple interfaces. Contact chains are formed beside the integrated circuits, each contact chain formed of the same two layers as the circuits, in the form of conductive segments alternating between the upper and lower layers and with the ends of the segments connected in series through interfaces. A current source passes a current through the series-connected segments, by way of a pair of current tabs connected to opposite ends of the series of segments. While the current flows, voltage measurements are taken between each of a plurality of pairs of voltage tabs, the two tabs of each pair connected to opposite ends of an interface that lies along the series-connected segments. A plot of interface conductances on normal probability chart enables prediction of the yield of good integrated circuits from the wafer.

Integrated optical circuit engineering IV; Proceedings of the Meeting, Cambridge, MA, Sept. 16, 17, 1986

NASA Astrophysics Data System (ADS)

Mentzer, Mark A.; Sriram, S.

The design and implementation of integrated optical circuits are discussed in reviews and reports. Topics addressed include lithium niobate devices, silicon integrated optics, waveguide phenomena, coupling considerations, processing technology, nonlinear guided-wave optics, integrated optics for fiber systems, and systems considerations and applications. Also included are eight papers and a panel discussion from an SPIE conference on the processing of guided-wave optoelectronic materials (held in Los Angeles, CA, on January 21-22, 1986).

Photonic integrated circuits based on silica and polymer PLC

NASA Astrophysics Data System (ADS)

Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

2013-03-01

Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

Protective Socket For Integrated Circuits

NASA Technical Reports Server (NTRS)

Wilkinson, Chris; Henegar, Greg

1988-01-01

Socket for intergrated circuits (IC's) protects from excessive voltages and currents or from application of voltages and currents in wrong sequence during insertion or removal. Contains built-in switch that opens as IC removed, disconnecting leads from signals and power. Also protects other components on circuit board from transients produced by insertion and removal of IC. Makes unnecessary to turn off power to entire circuit board so other circuits on board continue to function.

Sequential circuit design for radiation hardened multiple voltage integrated circuits

DOEpatents

Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

2009-11-24

The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

Simple circuit for pacing hearts of experimental animals.

PubMed

Freeman, G L; Colston, J T

1992-06-01

In this paper we describe a simple pacing circuit which can be used to drive the heart over a wide range of rates. The circuit is an astable multivibrator, based on an LM555 integrated circuit. It is powered by a 9-V battery and is small enough for use in rabbits. The circuit is easily constructed and inexpensive, making it attractive for numerous applications in cardiovascular research.

Integrated CMOS photodetectors and signal processing for very low-level chemical sensing with the bioluminescent bioreporter integrated circuit

NASA Technical Reports Server (NTRS)

Bolton, Eric K.; Sayler, Gary S.; Nivens, David E.; Rochelle, James M.; Ripp, Steven; Simpson, Michael L.

2002-01-01

We report an integrated CMOS microluminometer optimized for the detection of low-level bioluminescence as part of the bioluminescent bioreporter integrated circuit (BBIC). This microluminometer improves on previous devices through careful management of the sub-femtoampere currents, both signal and leakage, that flow in the front-end processing circuitry. In particular, the photodiode is operated with a reverse bias of only a few mV, requiring special attention to the reset circuitry of the current-to-frequency converter (CFC) that forms the front-end circuit. We report a sub-femtoampere leakage current and a minimum detectable signal (MDS) of 0.15 fA (1510 s integration time) using a room temperature 1.47 mm2 CMOS photodiode. This microluminometer can detect luminescence from as few as 5000 fully induced Pseudomonas fluorescens 5RL bacterial cells. c2002 Elsevier Science B.V. All rights reserved.

Wireless Data Transmission at Terahertz Carrier Waves Generated from a Hybrid InP-Polymer Dual Tunable DBR Laser Photonic Integrated Circuit.

PubMed

Carpintero, Guillermo; Hisatake, Shintaro; de Felipe, David; Guzman, Robinson; Nagatsuma, Tadao; Keil, Norbert

2018-02-14

We report for the first time the successful wavelength stabilization of two hybrid integrated InP/Polymer DBR lasers through optical injection. The two InP/Polymer DBR lasers are integrated into a photonic integrated circuit, providing an ideal source for millimeter and Terahertz wave generation by optical heterodyne technique. These lasers offer the widest tuning range of the carrier wave demonstrated to date up into the Terahertz range, about 20 nm (2.5 THz) on a single photonic integrated circuit. We demonstrate the application of this source to generate a carrier wave at 330 GHz to establish a wireless data transmission link at a data rate up to 18 Gbit/s. Using a coherent detection scheme we increase the sensitivity by more than 10 dB over direct detection.

Foundry fabricated photonic integrated circuit optical phase lock loop.

PubMed

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

Gallium Arsenide Monolithic Optoelectronic Circuits

NASA Astrophysics Data System (ADS)

Bar-Chaim, N.; Katz, J.; Margalit, S.; Ury, I.; Wilt, D.; Yariv, A.

1981-07-01

The optical properties of GaAs make it a very useful material for the fabrication of optical emitters and detectors. GaAs also possesses electronic properties which allow the fabrication of high speed electronic devices which are superior to conventional silicon devices. Monolithic optoelectronic circuits are formed by the integration of optical and electronic devices on a single GaAs substrate. Integration of many devices is most easily accomplished on a semi-insulating (SI) sub-strate. Several laser structures have been fabricated on SI GaAs substrates. Some of these lasers have been integrated with Gunn diodes and with metal semiconductor field effect transistors (MESFETs). An integrated optical repeater has been demonstrated in which MESFETs are used for optical detection and electronic amplification, and a laser is used to regenerate the optical signal. Monolithic optoelectronic circuits have also been constructed on conducting substrates. A heterojunction bipolar transistor driver has been integrated with a laser on an n-type GaAs substrate.

The latency validation of the optical link for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade

NASA Astrophysics Data System (ADS)

Deng, B.; Xiao, L.; Zhao, X.; Baker, E.; Gong, D.; Guo, D.; He, H.; Hou, S.; Liu, C.; Liu, T.; Sun, Q.; Thomas, J.; Wang, J.; Xiang, A. C.; Yang, D.; Ye, J.; Zhou, W.

2018-05-01

Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and measurements validates the ASIC latency characterization.

Development of Nanomechanical Sensors for Breast Cancer Biomarkers

DTIC Science & Technology

2008-06-01

semiconductor industry in developing large scale integrated circuits at very lost cost can lead to similar breakthroughs in array sensors for biomolecules of...insulated from the serum or buffer. The entire device is mounted onto a semiconductor chip carrier, for easy integration with electronics. Figure 3...Keithley 2400 source meter. The ac modulation and the dc bias are added by a noninverting summing circuit, which is integrated with the preamplifier

Xyce parallel electronic simulator : users' guide.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mei, Ting; Rankin, Eric Lamont; Thornquist, Heidi K.

2011-05-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: (1) Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers; (2) Improved performance for all numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-artmore » algorithms and novel techniques. (3) Device models which are specifically tailored to meet Sandia's needs, including some radiation-aware devices (for Sandia users only); and (4) Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing parallel implementation - which allows it to run efficiently on the widest possible number of computing platforms. These include serial, shared-memory and distributed-memory parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The development of Xyce provides a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods, parallel solver algorithms) research and development can be performed. As a result, Xyce is a unique electrical simulation capability, designed to meet the unique needs of the laboratory.« less

Cooling/grounding mount for hybrid circuits

NASA Technical Reports Server (NTRS)

Bagstad, B.; Estrada, R.; Mandel, H.

1981-01-01

Extremely short input and output connections, adequate grounding, and efficient heat removal for hybrid integrated circuits are possible with mounting. Rectangular clamp holds hybrid on printed-circuit board, in contact with heat-conductive ground plate. Clamp is attached to ground plane by bolts.

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

PubMed

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

Microphotonic devices for compact planar lightwave circuits and sensor systems

NASA Astrophysics Data System (ADS)

Cardenas Gonzalez, Jaime

2005-07-01

Higher levels of integration in planar lightwave circuits and sensor systems can reduce fabrication costs and broaden viable applications for optical network and sensor systems. For example, increased integration and functionality can lead to sensor systems that are compact enough for easy transport, rugged enough for field applications, and sensitive enough even for laboratory applications. On the other hand, more functional and compact planar lightwave circuits can make optical networks components less expensive for the metro and access markets in urban areas and allow penetration of fiber to the home. Thus, there is an important area of opportunity for increased integration to provide low cost, compact solutions in both network components and sensor systems. In this dissertation, a novel splitting structure for microcantilever deflection detection is introduced. The splitting structure is designed so that its splitting ratio is dependent on the vertical position of the microcantilever. With this structure, microcantilevers sensitized to detect different analytes or biological agents can be integrated into an array on a single chip. Additionally, the integration of a depolarizer into the optoelectronic integrated circuit in an interferometric fiber optic gyroscope is presented as a means for cost reduction. The savings come in avoiding labor intensive fiber pigtailing steps by permitting batch fabrication of these components. In particular, this dissertation focuses on the design of the waveguides and polarization rotator, and the impact of imperfect components on the performance of the depolarizer. In the area of planar lightwave circuits, this dissertation presents the development of a fabrication process for single air interface bends (SAIBs). SAIBs can increase integration by reducing the area necessary to make a waveguide bend. Fabrication and measurement of a 45° SAIB with a bend efficiency of 93.4% for TM polarization and 92.7% for TE polarization are presented.

Neural integrators for decision making: a favorable tradeoff between robustness and sensitivity

PubMed Central

Cain, Nicholas; Barreiro, Andrea K.; Shadlen, Michael

2013-01-01

A key step in many perceptual decision tasks is the integration of sensory inputs over time, but a fundamental questions remain about how this is accomplished in neural circuits. One possibility is to balance decay modes of membranes and synapses with recurrent excitation. To allow integration over long timescales, however, this balance must be exceedingly precise. The need for fine tuning can be overcome via a “robust integrator” mechanism in which momentary inputs must be above a preset limit to be registered by the circuit. The degree of this limiting embodies a tradeoff between sensitivity to the input stream and robustness against parameter mistuning. Here, we analyze the consequences of this tradeoff for decision-making performance. For concreteness, we focus on the well-studied random dot motion discrimination task and constrain stimulus parameters by experimental data. We show that mistuning feedback in an integrator circuit decreases decision performance but that the robust integrator mechanism can limit this loss. Intriguingly, even for perfectly tuned circuits with no immediate need for a robustness mechanism, including one often does not impose a substantial penalty for decision-making performance. The implication is that robust integrators may be well suited to subserve the basic function of evidence integration in many cognitive tasks. We develop these ideas using simulations of coupled neural units and the mathematics of sequential analysis. PMID:23446688

The CRF Family of Neuropeptides and their Receptors - Mediators of the Central Stress Response

PubMed Central

Dedic, Nina; Chen, Alon; Deussing, Jan M.

2018-01-01

Background: Dysregulated stress neurocircuits, caused by genetic and/or environmental changes, underlie the development of many neuropsychiatric disorders. Corticotropin-releasing factor (CRF) is the major physiological activator of the hypothalamic-pituitary-adrenal (HPA) axis and conse-quently a primary regulator of the mammalian stress response. Together with its three family members, urocortins (UCNs) 1, 2, and 3, CRF integrates the neuroendocrine, autonomic, metabolic and behavioral responses to stress by activating its cognate receptors CRFR1 and CRFR2. Objective: Here we review the past and current state of the CRF/CRFR field, ranging from pharmacologi-cal studies to genetic mouse models and virus-mediated manipulations. Results: Although it is well established that CRF/CRFR1 signaling mediates aversive responses, includ-ing anxiety and depression-like behaviors, a number of recent studies have challenged this viewpoint by revealing anxiolytic and appetitive properties of specific CRF/CRFR1 circuits. In contrast, the UCN/CRFR2 system is less well understood and may possibly also exert divergent functions on physiol-ogy and behavior depending on the brain region, underlying circuit, and/or experienced stress conditions. Conclusion: A plethora of available genetic tools, including conventional and conditional mouse mutants targeting CRF system components, has greatly advanced our understanding about the endogenous mecha-nisms underlying HPA system regulation and CRF/UCN-related neuronal circuits involved in stress-related behaviors. Yet, the detailed pathways and molecular mechanisms by which the CRF/UCN-system translates negative or positive stimuli into the final, integrated biological response are not completely un-derstood. The utilization of future complementary methodologies, such as cell-type specific Cre-driver lines, viral and optogenetic tools will help to further dissect the function of genetically defined CRF/UCN neurocircuits in the context of adaptive and maladaptive stress responses. PMID:28260504

Integrated circuit package with lead structure and method of preparing the same

NASA Technical Reports Server (NTRS)

Kennedy, B. W. (Inventor)

1973-01-01

A beam-lead integrated circuit package assembly including a beam-lead integrated circuit chip, a lead frame array bonded to projecting fingers of the chip, a rubber potting compound disposed around the chip, and an encapsulating molded plastic is described. The lead frame array is prepared by photographically printing a lead pattern on a base metal sheet, selectively etching to remove metal between leads, and plating with gold. Joining of the chip to the lead frame array is carried out by thermocompression bonding of mating goldplated surfaces. A small amount of silicone rubber is then applied to cover the chip and bonded joints, and the package is encapsulated with epoxy resin, applied by molding.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Temporal integration and 1/f power scaling in a circuit model of cerebellar interneurons.

PubMed

Maex, Reinoud; Gutkin, Boris

2017-07-01

Inhibitory interneurons interconnected via electrical and chemical (GABA A receptor) synapses form extensive circuits in several brain regions. They are thought to be involved in timing and synchronization through fast feedforward control of principal neurons. Theoretical studies have shown, however, that whereas self-inhibition does indeed reduce response duration, lateral inhibition, in contrast, may generate slow response components through a process of gradual disinhibition. Here we simulated a circuit of interneurons (stellate and basket cells) of the molecular layer of the cerebellar cortex and observed circuit time constants that could rise, depending on parameter values, to >1 s. The integration time scaled both with the strength of inhibition, vanishing completely when inhibition was blocked, and with the average connection distance, which determined the balance between lateral and self-inhibition. Electrical synapses could further enhance the integration time by limiting heterogeneity among the interneurons and by introducing a slow capacitive current. The model can explain several observations, such as the slow time course of OFF-beam inhibition, the phase lag of interneurons during vestibular rotation, or the phase lead of Purkinje cells. Interestingly, the interneuron spike trains displayed power that scaled approximately as 1/ f at low frequencies. In conclusion, stellate and basket cells in cerebellar cortex, and interneuron circuits in general, may not only provide fast inhibition to principal cells but also act as temporal integrators that build a very short-term memory. NEW & NOTEWORTHY The most common function attributed to inhibitory interneurons is feedforward control of principal neurons. In many brain regions, however, the interneurons are densely interconnected via both chemical and electrical synapses but the function of this coupling is largely unknown. Based on large-scale simulations of an interneuron circuit of cerebellar cortex, we propose that this coupling enhances the integration time constant, and hence the memory trace, of the circuit. Copyright © 2017 the American Physiological Society.

Organic printed photonics: From microring lasers to integrated circuits

PubMed Central

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-01-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 105, which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices. PMID:26601256

Organic printed photonics: From microring lasers to integrated circuits.

PubMed

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-09-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

A megahertz-frequency tunable piecewise-linear electromechanical resonator realized via nonlinear feedback

NASA Astrophysics Data System (ADS)

Bajaj, Nikhil; Chiu, George T.-C.; Rhoads, Jeffrey F.

2018-07-01

Vibration-based sensing modalities traditionally have relied upon monitoring small shifts in natural frequency in order to detect structural changes (such as those in mass or stiffness). In contrast, bifurcation-based sensing schemes rely on the detection of a qualitative change in the behavior of a system as a parameter is varied. This can produce easy-to-detect changes in response amplitude with high sensitivity to structural change, but requires resonant devices with specific dynamic behavior which is not always easily reproduced. Desirable behavior for such devices can be produced reliably via nonlinear feedback circuitry, but has in past efforts been largely limited to sub-MHz operation, partially due to the time delay limitations present in certain nonlinear feedback circuits, such as multipliers. This work demonstrates the design and implementation of a piecewise-linear resonator realized via diode- and integrated circuit-based feedback electronics and a quartz crystal resonator. The proposed system is fabricated and characterized, and the creation and selective placement of the bifurcation points of the overall electromechanical system is demonstrated by tuning the circuit gains. The demonstrated circuit operates at 16 MHz. Preliminary modeling and analysis is presented that qualitatively agrees with the experimentally-observed behavior.

Crosstalk-free operation of multielement superconducting nanowire single-photon detector array integrated with single-flux-quantum circuit in a 0.1 W Gifford-McMahon cryocooler.

PubMed

Yamashita, Taro; Miki, Shigehito; Terai, Hirotaka; Makise, Kazumasa; Wang, Zhen

2012-07-15

We demonstrate the successful operation of a multielement superconducting nanowire single-photon detector (SSPD) array integrated with a single-flux-quantum (SFQ) readout circuit in a compact 0.1 W Gifford-McMahon cryocooler. A time-resolved readout technique, where output signals from each element enter the SFQ readout circuit with finite time intervals, revealed crosstalk-free operation of the four-element SSPD array connected with the SFQ readout circuit. The timing jitter and the system detection efficiency were measured to be 50 ps and 11.4%, respectively, which were comparable to the performance of practical single-pixel SSPD systems.

Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

NASA Technical Reports Server (NTRS)

Simons, Rainee N.; Goverdhanam, Kavita; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

2001-01-01

In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Genetic dissection of GABAergic neural circuits in mouse neocortex

PubMed Central

Taniguchi, Hiroki

2014-01-01

Diverse and flexible cortical functions rely on the ability of neural circuits to perform multiple types of neuronal computations. GABAergic inhibitory interneurons significantly contribute to this task by regulating the balance of activity, synaptic integration, spiking, synchrony, and oscillation in a neural ensemble. GABAergic interneurons display a high degree of cellular diversity in morphology, physiology, connectivity, and gene expression. A considerable number of subtypes of GABAergic interneurons diversify modes of cortical inhibition, enabling various types of information processing in the cortex. Thus, comprehensively understanding fate specification, circuit assembly, and physiological function of GABAergic interneurons is a key to elucidate the principles of cortical wiring and function. Recent advances in genetically encoded molecular tools have made a breakthrough to systematically study cortical circuitry at the molecular, cellular, circuit, and whole animal levels. However, the biggest obstacle to fully applying the power of these to analysis of GABAergic circuits was that there were no efficient and reliable methods to express them in subtypes of GABAergic interneurons. Here, I first summarize cortical interneuron diversity and current understanding of mechanisms, by which distinct classes of GABAergic interneurons are generated. I then review recent development in genetically encoded molecular tools for neural circuit research, and genetic targeting of GABAergic interneuron subtypes, particularly focusing on our recent effort to develop and characterize Cre/CreER knockin lines. Finally, I highlight recent success in genetic targeting of chandelier cells, the most unique and distinct GABAergic interneuron subtype, and discuss what kind of questions need to be addressed to understand development and function of cortical inhibitory circuits. PMID:24478631

High-Voltage-Input Level Translator Using Standard CMOS

NASA Technical Reports Server (NTRS)

Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

2011-01-01

proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors, which, by virtue of being identical to the input transistors, would reproduce the input differential potential at the output

Active quench and reset integrated circuit with novel hold-off time control logic for Geiger-mode avalanche photodiodes.

PubMed

Deng, Shijie; Morrison, Alan P

2012-09-15

This Letter presents an active quench-and-reset circuit for Geiger-mode avalanche photodiodes (GM-APDs). The integrated circuit was fabricated using a conventional 0.35 μm complementary metal oxide semiconductor process. Experimental results show that the circuit is capable of linearly setting the hold-off time from several nanoseconds to microseconds with a resolution of 6.5 ns. This allows the selection of the optimal afterpulse-free hold-off time for the GM-APD via external digital inputs or additional signal processing circuitry. Moreover, this circuit resets the APD automatically following the end of the hold-off period, thus simplifying the control for the end user. Results also show that a minimum dead time of 28.4 ns is achieved, demonstrating a saturated photon-counting rate of 35.2 Mcounts/s.

Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators.

PubMed

Qiu, Ciyuan; Gao, Weilu; Soref, Richard; Robinson, Jacob T; Xu, Qianfan

2014-12-15

Here we demonstrate a reconfigurable electro-optical directed-logic circuit based on a regular array of integrated optical switches. Each 1×1 optical switch consists of a micro-ring resonator with an embedded lateral p-n junction and a micro-heater. We achieve high-speed on-off switching by applying electrical logic signals to the p-n junction. We can configure the operation mode of each switch by thermal tuning the resonance wavelength. The result is an integrated optical circuit that can be reconfigured to perform any combinational logic operation. As a proof-of-principle, we fabricated a multi-spectral directed-logic circuit based on a fourfold array of switches and showed that this circuit can be reconfigured to perform arbitrary two-input logic functions with speeds up to 3  GB/s.

Microwave integrated circuits for space applications

NASA Technical Reports Server (NTRS)

Leonard, Regis F.; Romanofsky, Robert R.

1991-01-01

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

Computer-aided design of large-scale integrated circuits - A concept

NASA Technical Reports Server (NTRS)

Schansman, T. T.

1971-01-01

Circuit design and mask development sequence are improved by using general purpose computer with interactive graphics capability establishing efficient two way communications link between design engineer and system. Interactive graphics capability places design engineer in direct control of circuit development.

Heart-Rate and Breath-Rate Monitor

NASA Technical Reports Server (NTRS)

Cooper, T. G.

1983-01-01

Circuit requiring only four integrated circuits (IC's) measures both heart rate and breath rate. Phase-locked loops lock on heart-rate and respiration-rate input signals. Each loop IC contains two phase comparators. Positive-edge-triggered circuit used in making monitors insensitive to dutycycle variations.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Scott, Jeffrey Wayne

An RFID backscatter interrogator for transmitting data to an RFID tag, generating a carrier for the tag, and receiving data from the tag modulated onto the carrier, the interrogator including a single grounded-coplanar wave-guide circuit board and at least one surface mount integrated circuit supported by the circuit board.

Pathway and Cell-Specific Kappa-Opioid Receptor Modulation of Excitatory-Inhibitory Balance Differentially Gates D1 and D2 Accumbens Neuron Activity

PubMed Central

Tejeda, Hugo A.; Wu, Jocelyn; Kornspun, Alana R.; Pignatelli, Marco; Kashtelyan, Vadim; Krashes, Michael J.; Lowell, Brad B.; Carlezon, William A.; Bonci, Antonello

2018-01-01

Endogenous dynorphin signaling via the kappa-opioid receptor (KOR) in the nucleus accumbens (NAcc) powerfully mediates negative affective states and stress reactivity. Excitatory inputs from the hippocampus and amygdala play a fundamental role in shaping the activity of both NAcc D1 and D2 MSNs, which encode positive and negative motivational valences, respectively. However, a circuit-based mechanism by which KOR modulation of excitation-inhibition balance modifies D1 and D2 MSN activity is lacking. Here, we provide a comprehensive synaptic framework wherein presynaptic KOR inhibition decreases excitatory drive of D1 MSN activity by the amygdala, but not hippocampus. Conversely, presynaptic inhibition by KORs of inhibitory synapses on D2 MSNs enhances integration of excitatory drive by the amygdala and hippocampus. In conclusion, we describe a circuit-based mechanism showing differential gating of afferent control of D1 and D2 MSN activity by KORs in a pathway specific manner. PMID:28056342

Making A D-Latch Sensitive To Alpha Particles

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Nixon, Robert H.

1994-01-01

Standard complementary metal oxide/semiconductor (CMOS) D-latch integrated circuit modified to increase susceptibility to single-event upsets (SEU's) (changes in logic state) caused by impacts of energetic alpha particles. Suitable for use in relatively inexpensive bench-scale SEU tests of itself and of related integrated circuits like static random-access memories.

The Design and Assessment of a Hypermedia Course on Semiconductor Manufacturing.

ERIC Educational Resources Information Center

Schank, Patrick K.; Rowe, Lawrence A.

1993-01-01

Describes the design and evaluation of a multimedia course on integrated circuit manufacturing that was developed at the University of California at Berkeley using IC-HIP (Integrated Circuit-Hypermedia in PICASSO), a hypermedia-based instructional system. Learning effects based on prior knowledge, methods of navigation, and other factors are…

Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools

ERIC Educational Resources Information Center

Aziz, Syed Mahfuzul; Sicard, Etienne; Ben Dhia, Sonia

2010-01-01

This paper presents the strategies used for effective teaching and skill development in integrated circuit (IC) design using project-based learning (PBL) methodologies. It presents the contexts in which these strategies are applied to IC design courses at the University of South Australia, Adelaide, Australia, and the National Institute of Applied…

Bioluminescent bioreporter integrated circuit detection methods

DOEpatents

Simpson, Michael L.; Paulus, Michael J.; Sayler, Gary S.; Applegate, Bruce M.; Ripp, Steven A.

2005-06-14

Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for detection of particular analytes, including ammonia and estrogen compounds.

Integrated semiconductor-magnetic random access memory system

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

2001-01-01

The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

PubMed

Aull, Brian

2016-04-08

This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.