Substrate solder barriers for semiconductor epilayer growth

DOEpatents

Drummond, T.J.; Ginley, D.S.; Zipperian, T.E.

1987-10-23

During the growth of compound semiconductors by epitaxial processes, substrates are typically mounted to a support. In molecular beam epitaxy, mounting is done using indium as a solder. This method has two drawbacks: the indium reacts with the substrate, and it is difficult to uniformly wet the back of a large diameter substrate. Both of these problems have been successfully overcome by sputter coating the back of the substrate with a thin layer of tungsten carbide or tungsten carbide and gold. In addition to being compatible with the growth of high quality semiconductor epilayers this coating is also inert in all standard substate cleaning etchants used for compound semiconductors, and provides uniform distribution of energy in radiant heating. 1 tab.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

High-energy side-peak emission of exciton-polariton condensates in high density regime

PubMed Central

Horikiri, Tomoyuki; Yamaguchi, Makoto; Kamide, Kenji; Matsuo, Yasuhiro; Byrnes, Tim; Ishida, Natsuko; Löffler, Andreas; Höfling, Sven; Shikano, Yutaka; Ogawa, Tetsuo; Forchel, Alfred; Yamamoto, Yoshihisa

2016-01-01

In a standard semiconductor laser, electrons and holes recombine via stimulated emission to emit coherent light, in a process that is far from thermal equilibrium. Exciton-polariton condensates–sharing the same basic device structure as a semiconductor laser, consisting of quantum wells coupled to a microcavity–have been investigated primarily at densities far below the Mott density for signatures of Bose-Einstein condensation. At high densities approaching the Mott density, exciton-polariton condensates are generally thought to revert to a standard semiconductor laser, with the loss of strong coupling. Here, we report the observation of a photoluminescence sideband at high densities that cannot be accounted for by conventional semiconductor lasing. This also differs from an upper-polariton peak by the observation of the excitation power dependence in the peak-energy separation. Our interpretation as a persistent coherent electron-hole-photon coupling captures several features of this sideband, although a complete understanding of the experimental data is lacking. A full understanding of the observations should lead to a development in non-equilibrium many-body physics. PMID:27193700

CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

NASA Astrophysics Data System (ADS)

Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

2008-05-01

A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

Differential-Mode Biosensor Using Dual Extended-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Choi, Jinhyeon; Lee, Hee Ho; Ahn, Jungil; Seo, Sang-Ho; Shin, Jang-Kyoo

2012-06-01

In this paper, we present a differential-mode biosensor using dual extended-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), which possesses the advantages of both the extended-gate structure and the differential-mode operation. The extended-gate MOSFET was fabricated using a 0.6 µm standard complementary metal oxide semiconductor (CMOS) process. The Au extended gate is the sensing gate on which biomolecules are immobilized, while the Pt extended gate is the dummy gate for use in the differential-mode detection circuit. The differential-mode operation offers many advantages such as insensitivity to the variation of temperature and light, as well as low noise. The outputs were measured using a semiconductor parameter analyzer in a phosphate buffered saline (PBS; pH 7.4) solution. A standard Ag/AgCl reference electrode was used to apply the gate bias. We measured the variation of output voltage with time, temperature, and light intensity. The bindings of self-assembled monolayer (SAM), streptavidin, and biotin caused a variation in the output voltage of the differential-mode detection circuit and this was confirmed by surface plasmon resonance (SPR) experiment. Biotin molecules could be detected up to a concentration of as low as 0.001 µg/ml.

A study for safety and health management problem of semiconductor industry in Taiwan.

PubMed

Chao, Chin-Jung; Wang, Hui-Ming; Feng, Wen-Yang; Tseng, Feng-Yi

2008-12-01

The main purpose of this study is to discuss and explore the safety and health management in semiconductor industry. The researcher practically investigates and interviews the input, process and output of the safety and health management of semiconductor industry by using the questionnaires and the interview method which is developed according to the framework of the OHSAS 18001. The result shows that there are six important factors for the safety and health management in Taiwan semiconductor industry. 1. The company should make employee clearly understand the safety and health laws and standards. 2. The company should make the safety and health management policy known to the public. 3. The company should put emphasis on the pursuance of the safety and health management laws. 4. The company should prevent the accidents. 5. The safety and health message should be communicated sufficiently. 6. The company should consider safety and health norm completely.

40 CFR 469.17 - New source performance standards (NSPS).

Code of Federal Regulations, 2010 CFR

2010-07-01

... GUIDELINES AND STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor Subcategory... the following new source performance standards (NSPS). Subpart A—Semiconductor NSPS Effluent... organics. 2 Not applicable. 3 Within the range of 6.0 to 9.0. ...

40 CFR 469.17 - New source performance standards (NSPS).

Code of Federal Regulations, 2011 CFR

2011-07-01

... GUIDELINES AND STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor Subcategory... the following new source performance standards (NSPS). Subpart A—Semiconductor NSPS Effluent... organics. 2 Not applicable. 3 Within the range of 6.0 to 9.0. ...

Methods of producing strain in a semiconductor waveguide and related devices

DOEpatents

Cox, Johathan Albert; Rakich, Peter Thomas

2016-02-16

Quasi-phase matched (QPM), semiconductor photonic waveguides include periodically-poled alternating first and second sections. The first sections exhibit a high degree of optical coupling (abbreviated "X.sup.2"), while the second sections have a low X.sup.2. The alternating first and second sections may comprise high-strain and low-strain sections made of different material states (such as crystalline and amorphous material states) that exhibit high and low X.sup.2 properties when formed on a particular substrate, and/or strained corrugated sections of different widths. The QPM semiconductor waveguides may be implemented as silicon-on-insulator (SOI), or germanium-on-silicon structures compatible with standard CMOS processes, or as silicon-on-sapphire (SOS) structures.

Radiation tolerant 1 micron CMOS technology

NASA Astrophysics Data System (ADS)

Crevel, P.; Rodde, K.

1991-03-01

Starting from a standard one micron Complementary Metal Oxide Semiconductor (CMOS) for high density, low power memory applications, the degree of radiation tolerance of the baseline process is evaluated. Implemented process modifications to improve latchup sensitivity under heavy ion irradiation as well as total dose effects without changing layout rules are described. By changing doping profiles in Metal Nitride Oxide Semiconductors (MNOS) and P-channel MOS (PMOS) device regions, it is possible to guarantee data sheet specification of a 64 K low power static RAM for total gamma dose up to 35 krad (Si) (and even higher values for the gate array family) without latch up for Linear Energy Transfer LET up to 115 MeV/(mg/cm squared).

40 CFR 63.7180 - What is the purpose of this subpart?

Code of Federal Regulations, 2011 CFR

2011-07-01

... (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing What... emission standards for hazardous air pollutants (NESHAP) for semiconductor manufacturing facilities. This...

40 CFR 63.7180 - What is the purpose of this subpart?

Code of Federal Regulations, 2010 CFR

2010-07-01

... (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing What... emission standards for hazardous air pollutants (NESHAP) for semiconductor manufacturing facilities. This...

Exposure Characteristics of Nanoparticles as Process By-products for the Semiconductor Manufacturing Industry.

PubMed

Choi, Kwang-Min; Kim, Jin-Ho; Park, Ju-Hyun; Kim, Kwan-Sick; Bae, Gwi-Nam

2015-01-01

This study aims to elucidate the exposure properties of nanoparticles (NPs; <100 nm in diameter) in semiconductor manufacturing processes. The measurements of airborne NPs were mainly performed around process equipment during fabrication processes and during maintenance. The number concentrations of NPs were measured using a water-based condensation particle counter having a size range of 10-3,000 nm. The chemical composition, size, and shape of NPs were determined by scanning electron microscopy and transmission electron microscopy techniques equipped with energy dispersive spectroscopy. The resulting concentrations of NPs ranged from 0.00-11.47 particles/cm(3). The concentration of NPs measured during maintenance showed a tendency to increase, albeit incrementally, compared to that measured during normal conditions (under typical process conditions without maintenance). However, the increment was small. When comparing the mean number concentration and standard deviation (n ± σ) of NPs, the chemical mechanical polishing (CMP) process was the highest (3.45 ± 3.65 particles/cm(3)), and the dry etch (ETCH) process was the lowest (0.11 ± 0.22 particles/cm(3)). The major NPs observed were silica (SiO2) and titania (TiO2) particles, which were mainly spherical agglomerates ranging in size from 25-280 nm. Sampling of semiconductor processes in CMP, chemical vapor deposition, and ETCH reveled NPs were <100 nm in those areas. On the other hand, particle size exceeded 100 nm in diffusion, metallization, ion implantation, and wet cleaning/etching process. The results show that the SiO2 and TiO2 are the major NPs present in semiconductor cleanroom environments.

Suppression of compensating native defect formation during semiconductor processing via excess carriers

NASA Astrophysics Data System (ADS)

Alberi, K.; Scarpulla, M. A.

2016-06-01

In many semiconductors, compensating defects set doping limits, decrease carrier mobility, and reduce minority carrier lifetime thus limiting their utility in devices. Native defects are often responsible. Suppressing the concentrations of compensating defects during processing close to thermal equilibrium is difficult because formation enthalpies are lowered as the Fermi level moves towards the majority band edge. Excess carriers, introduced for example by photogeneration, modify the formation enthalpy of semiconductor defects and thus can be harnessed during crystal growth or annealing to suppress defect populations. Herein we develop a rigorous and general model for defect formation in the presence of steady-state excess carrier concentrations by combining the standard quasi-chemical formalism with a detailed-balance description that is applicable for any defect state in the bandgap. Considering the quasi-Fermi levels as chemical potentials, we demonstrate that increasing the minority carrier concentration increases the formation enthalpy for typical compensating centers, thus suppressing their formation. This effect is illustrated for the specific example of GaSb. While our treatment is generalized for excess carrier injection or generation in semiconductors by any means, we provide a set of guidelines for applying the concept in photoassisted physical vapor deposition.

Abatement of waste gases and water during the processes of semiconductor fabrication.

PubMed

Wen, Rui-mei; Liang, Jun-wu

2002-10-01

The purpose of this article is to examine the methods and equipment for abating waste gases and water produced during the manufacture of semiconductor materials and devices. Three separating methods and equipment are used to control three different groups of electronic wastes. The first group includes arsine and phosphine emitted during the processes of semiconductor materials manufacture. The abatement procedure for this group of pollutants consists of adding iodates, cupric and manganese salts to a multiple shower tower (MST) structure. The second group includes pollutants containing arsenic, phosphorus, HF, HCl, NO2, and SO3 emitted during the manufacture of semiconductor materials and devices. The abatement procedure involves mixing oxidants and bases in an oval column with a separator in the middle. The third group consists of the ions of As, P and heavy metals contained in the waste water. The abatement procedure includes adding CaCO3 and ferric salts in a flocculation-sedimentation compact device equipment. Test results showed that all waste gases and water after the abatement procedures presented in this article passed the discharge standards set by the State Environmental Protection Administration of China.

Suppression of compensating native defect formation during semiconductor processing via excess carriers

DOE PAGES

Alberi, Kirstin; Scarpulla, M. A.

2016-06-21

In many semiconductors, compensating defects set doping limits, decrease carrier mobility, and reduce minority carrier lifetime thus limiting their utility in devices. Native defects are often responsible. Suppressing the concentrations of compensating defects during processing close to thermal equilibrium is difficult because formation enthalpies are lowered as the Fermi level moves towards the majority band edge. Excess carriers, introduced for example by photogeneration, modify the formation enthalpy of semiconductor defects and thus can be harnessed during crystal growth or annealing to suppress defect populations. Herein we develop a rigorous and general model for defect formation in the presence of steady-statemore » excess carrier concentrations by combining the standard quasi-chemical formalism with a detailed-balance description that is applicable for any defect state in the bandgap. Considering the quasi-Fermi levels as chemical potentials, we demonstrate that increasing the minority carrier concentration increases the formation enthalpy for typical compensating centers, thus suppressing their formation. Furthermore, this effect is illustrated for the specific example of GaSb. While our treatment is generalized for excess carrier injection or generation in semiconductors by any means, we provide a set of guidelines for applying the concept in photoassisted physical vapor deposition.« less

Micrometer-scale fabrication of complex three dimensional lattice + basis structures in silicon

DOE PAGES

Burckel, D. Bruce; Resnick, Paul J.; Finnegan, Patrick S.; ...

2015-01-01

A complementary metal oxide semiconductor (CMOS) compatible version of membrane projection lithography (MPL) for fabrication of micrometer-scale three-dimensional structures is presented. The approach uses all inorganic materials and standard CMOS processing equipment. In a single layer, MPL is capable of creating all 5 2D-Bravais lattices. Furthermore, standard semiconductor processing steps can be used in a layer-by-layer approach to create fully three dimensional structures with any of the 14 3D-Bravais lattices. The unit cell basis is determined by the projection of the membrane pattern, with many degrees of freedom for defining functional inclusions. Here we demonstrate several unique structural motifs, andmore » characterize 2D arrays of unit cells with split ring resonators in a silicon matrix. The structures exhibit strong polarization dependent resonances and, for properly oriented split ring resonators (SRRs), coupling to the magnetic field of a normally incident transverse electromagnetic wave, a response unique to 3D inclusions.« less

Solution Deposition Methods for Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2009-06-01

authorized documents. Citation of manufacturer’s or trade names does not constitute an official endorsement or approval of the use thereof. Destroy...processed into FETs using standard microelectronics processing techniques. The resulting devices were characterized using a semiconductor parameter...method will help to determine which conditions are useful for producing CNT devices for chemical sensing and electronic applications. 15. SUBJECT TERMS

Enhanced 10 Gb/s operations of directly modulated reflective semiconductor optical amplifiers without electronic equalization.

PubMed

Presi, M; Chiuchiarelli, A; Corsini, R; Choudury, P; Bottoni, F; Giorgi, L; Ciaramella, E

2012-12-10

We report enhanced 10 Gb/s operation of directly modulated bandwidth-limited reflective semiconductor optical amplifiers. By using a single suitable arrayed waveguide grating we achieve simultaneously WDM demultiplexing and optical equalization. Compared to previous approaches, the proposed system results significantly more tolerant to seeding wavelength drifts. This removes the need for wavelength lockers, additional electronic equalization or complex digital signal processing. Uniform C-band operations are obtained experimentally with < 2 dB power penalty within a wavelength drift of 10 GHz (which doubles the ITU-T standard recommendations).

40 CFR Table 1 to Subpart Bbbbb of... - Requirements for Performance Tests

Code of Federal Regulations, 2010 CFR

2010-07-01

... CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor... necessary. 2. Process vent stream a. Measure organic and inorganic HAP concentration (two method option) i... simultaneous sampling at inlet and outlet of control device and analyze for same organic and inorganic HAP at...

40 CFR Table 1 to Subpart Bbbbb of... - Requirements for Performance Tests

Code of Federal Regulations, 2011 CFR

2011-07-01

... CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor... necessary. 2. Process vent stream a. Measure organic and inorganic HAP concentration (two method option) i... simultaneous sampling at inlet and outlet of control device and analyze for same organic and inorganic HAP at...

Wafer-to-wafer bonding of nonplanarized MEMS surfaces using solder

NASA Astrophysics Data System (ADS)

Sparks, D.; Queen, G.; Weston, R.; Woodward, G.; Putty, M.; Jordan, L.; Zarabadi, S.; Jayakar, K.

2001-11-01

The fabrication and reliability of a solder wafer-to-wafer bonding process is discussed. Using a solder reflow process allows vacuum packaging to be accomplished with unplanarized complementary metal-oxide semiconductor (CMOS) surface topography. This capability enables standard CMOS processes, and integrated microelectromechanical systems devices to be packaged at the chip-level. Alloy variations give this process the ability to bond at lower temperatures than most alternatives. Factors affecting hermeticity, shorts, Q values, shifting cavity pressure, wafer saw cleanliness and corrosion resistance will be covered.

Process for forming shaped group III-V semiconductor nanocrystals, and product formed using process

DOEpatents

Alivisatos, A. Paul; Peng, Xiaogang; Manna, Liberato

2001-01-01

A process for the formation of shaped Group III-V semiconductor nanocrystals comprises contacting the semiconductor nanocrystal precursors with a liquid media comprising a binary mixture of phosphorus-containing organic surfactants capable of promoting the growth of either spherical semiconductor nanocrystals or rod-like semiconductor nanocrystals, whereby the shape of the semiconductor nanocrystals formed in said binary mixture of surfactants is controlled by adjusting the ratio of the surfactants in the binary mixture.

Process for forming shaped group II-VI semiconductor nanocrystals, and product formed using process

DOEpatents

Alivisatos, A. Paul; Peng, Xiaogang; Manna, Liberato

2001-01-01

A process for the formation of shaped Group II-VI semiconductor nanocrystals comprises contacting the semiconductor nanocrystal precursors with a liquid media comprising a binary mixture of phosphorus-containing organic surfactants capable of promoting the growth of either spherical semiconductor nanocrystals or rod-like semiconductor nanocrystals, whereby the shape of the semiconductor nanocrystals formed in said binary mixture of surfactants is controlled by adjusting the ratio of the surfactants in the binary mixture.

A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell.

PubMed

Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis

2014-03-28

Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

Adsorption treatment of oxide chemical mechanical polishing wastewater from a semiconductor manufacturing plant by electrocoagulation.

PubMed

Chou, Wei-Lung; Wang, Chih-Ta; Chang, Wen-Chun; Chang, Shih-Yu

2010-08-15

In this study, metal hydroxides generated during electrocoagulation (EC) were used to remove the chemical oxygen demand (COD) of oxide chemical mechanical polishing (oxide-CMP) wastewater from a semiconductor manufacturing plant by EC. Adsorption studies were conducted in a batch system for various current densities and temperatures. The COD concentration in the oxide-CMP wastewater was effectively removed and decreased by more than 90%, resulting in a final wastewater COD concentration that was below the Taiwan discharge standard (100 mg L(-1)). Since the processed wastewater quality exceeded the direct discharge standard, the effluent could be considered for reuse. The adsorption kinetic studies showed that the EC process was best described using the pseudo-second-order kinetic model at the various current densities and temperatures. The experimental data were also tested against different adsorption isotherm models to describe the EC process. The Freundlich adsorption isotherm model predictions matched satisfactorily with the experimental observations. Thermodynamic parameters, including the Gibbs free energy, enthalpy, and entropy, indicated that the COD adsorption of oxide-CMP wastewater on metal hydroxides was feasible, spontaneous and endothermic in the temperature range of 288-318 K. Copyright 2010 Elsevier B.V. All rights reserved.

40 CFR 469.18 - Pretreatment standards for new sources (PSNS).

Code of Federal Regulations, 2011 CFR

2011-07-01

...) EFFLUENT GUIDELINES AND STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor...): (a) Subpart A—Semiconductor PSNS Effluent Limitations Pollutant or pollutant property Maximum for any... Total toxic organics. 2 Not applicable. (b) A new source submitting a certification in lieu of...

40 CFR 469.16 - Pretreatment standards for existing sources (PSES).

Code of Federal Regulations, 2011 CFR

2011-07-01

...) EFFLUENT GUIDELINES AND STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor... for existing sources (PSES): (a) Subpart A—Semiconductor PSES Effluent Limitations Pollutant or... liter (mg/l) TTO 1 1.37 (2) 1 Total toxic organics. 2 Not applicable. (b) An existing source submitting...

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

NASA Astrophysics Data System (ADS)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

High-Performance Flexible Force and Temperature Sensing Array with a Robust Structure

NASA Astrophysics Data System (ADS)

Kim, Min-Seok; Song, Han-Wook; Park, Yon-Kyu

We have developed a flexible tactile sensor array capable of sensing physical quantities, e.g. force and temperature with high-performances and high spatial resolution. The fabricated tactile sensor consists of 8 × 8 force measuring array with 1 mm spacing and a thin metal (copper) temperature sensor. The flexible force sensing array consists of sub-millimetre-size bar-shaped semi-conductor strain gage array attached to a thin and flexible printed circuit board covered by stretchable elastomeric material on both sides. This design incorporates benefits of both materials; the semi-conductor's high performance and the polymer's mechanical flexibility and robustness, while overcoming their drawbacks of those two materials. Special fabrication processes, so called “dry-transfer technique” have been used to fabricate the tactile sensor along with standard micro-fabrication processes.

End-of-fabrication CMOS process monitor

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hannaman, D. J.; Lieneweg, U.; Lin, Y.-S.; Sayah, H. R.

1990-01-01

A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

1995-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Interface design for CMOS-integrated Electrochemical Impedance Spectroscopy (EIS) biosensors.

PubMed

Manickam, Arun; Johnson, Christopher Andrew; Kavusi, Sam; Hassibi, Arjang

2012-10-29

Electrochemical Impedance Spectroscopy (EIS) is a powerful electrochemical technique to detect biomolecules. EIS has the potential of carrying out label-free and real-time detection, and in addition, can be easily implemented using electronic integrated circuits (ICs) that are built through standard semiconductor fabrication processes. This paper focuses on the various design and optimization aspects of EIS ICs, particularly the bio-to-semiconductor interface design. We discuss, in detail, considerations such as the choice of the electrode surface in view of IC manufacturing, surface linkers, and development of optimal bio-molecular detection protocols. We also report experimental results, using both macro- and micro-electrodes to demonstrate the design trade-offs and ultimately validate our optimization procedures.

Method for depositing high-quality microcrystalline semiconductor materials

DOEpatents

Guha, Subhendu [Bloomfield Hills, MI; Yang, Chi C [Troy, MI; Yan, Baojie [Rochester Hills, MI

2011-03-08

A process for the plasma deposition of a layer of a microcrystalline semiconductor material is carried out by energizing a process gas which includes a precursor of the semiconductor material and a diluent with electromagnetic energy so as to create a plasma therefrom. The plasma deposits a layer of the microcrystalline semiconductor material onto the substrate. The concentration of the diluent in the process gas is varied as a function of the thickness of the layer of microcrystalline semiconductor material which has been deposited. Also disclosed is the use of the process for the preparation of an N-I-P type photovoltaic device.

Microwave-driven coherent operation of a semiconductor quantum dot charge qubit

DOE PAGES

Kim, Dohun; Ward, D. R.; Simmons, C. B.; ...

2015-02-16

An intuitive realization of a qubit is an electron charge at two well-defined positions of a double quantum dot. The qubit is simple and has the potential for high-speed operation because of its strong coupling to electric fields. But, charge noise also couples strongly to this qubit, resulting in rapid dephasing at all but one special operating point called the ‘sweet spot’. In previous studies d.c. voltage pulses have been used to manipulate semiconductor charge qubits but did not achieve high-fidelity control, because d.c. gating requires excursions away from the sweet spot. Here, by using resonant a.c. microwave driving wemore » achieve fast (greater than gigahertz) and universal single qubit rotations of a semiconductor charge qubit. The Z-axis rotations of the qubit are well protected at the sweet spot, and we demonstrate the same protection for rotations about arbitrary axes in the X–Y plane of the qubit Bloch sphere. We characterize the qubit operation using two tomographic approaches: standard process tomography and gate set tomography. Moreover, both methods consistently yield process fidelities greater than 86% with respect to a universal set of unitary single-qubit operations.« less

JESD57 Test Standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation Revision Update

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2016-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.

Rapid disinfection of E-Coliform contaminated water using WO3 semiconductor catalyst by laser-induced photo-catalytic process.

PubMed

Gondal, Mohammed A; Khalil, Amjad

2008-04-01

Laser-induced photo-catalysis process using WO(3) semiconductor catalyst was applied for the study of disinfection effectiveness of E-coliform-contaminated water. For this purpose, wastewater polluted with E-coliform bacteria was exposed to 355 nm UV radiations generated by third harmonic of Nd: YAG laser in special glass cell with and without WO(3) catalyst. E-Coliform quantification was performed by direct plating method to obtain the efficiency of each disinfection treatment. The dependence of disinfection process on laser irradiation energy, amount of catalyst and duration of laser irradiation was also investigated. The disinfection with WO(3) was quite efficient inactivating E-coliforms. For inactivation of E-coliforms, less than 8 minutes' laser irradiation was required, so that, the treated water complies with the microbial standards for drinking water. This study opens the possibility of application of this simple method in rural areas of developing countries using solar radiation.

Semiconductor structure and recess formation etch technique

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Bin; Sun, Min; Palacios, Tomas Apostol

2017-02-14

A semiconductor structure has a first layer that includes a first semiconductor material and a second layer that includes a second semiconductor material. The first semiconductor material is selectively etchable over the second semiconductor material using a first etching process. The first layer is disposed over the second layer. A recess is disposed at least in the first layer. Also described is a method of forming a semiconductor structure that includes a recess. The method includes etching a region in a first layer using a first etching process. The first layer includes a first semiconductor material. The first etching processmore » stops at a second layer beneath the first layer. The second layer includes a second semiconductor material.« less

Organo luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon [Pinole, CA; Bruchez, Jr., Marcel; Alivisatos, Paul [Oakland, CA

2008-01-01

A semiconductor nanocrystal compound is described capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source or a particle beam; and (2) an affinity molecule linked to the semiconductor nanocrystal. The semiconductor nanocrystal is linked to an affinity molecule to form a semiconductor nanocrystal probe capable of bonding with a detectable substance. Exposure of the semiconductor nanocrystal to excitation energy will excite the semiconductor nanocrystal causing the emission of electromagnetic radiation. Further described are processes for respectively: making the luminescent semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and using the probe to determine the presence of a detectable substance in a material.

Progress in ion torrent semiconductor chip based sequencing.

PubMed

Merriman, Barry; Rothberg, Jonathan M

2012-12-01

In order for next-generation sequencing to become widely used as a diagnostic in the healthcare industry, sequencing instrumentation will need to be mass produced with a high degree of quality and economy. One way to achieve this is to recast DNA sequencing in a format that fully leverages the manufacturing base created for computer chips, complementary metal-oxide semiconductor chip fabrication, which is the current pinnacle of large scale, high quality, low-cost manufacturing of high technology. To achieve this, ideally the entire sensory apparatus of the sequencer would be embodied in a standard semiconductor chip, manufactured in the same fab facilities used for logic and memory chips. Recently, such a sequencing chip, and the associated sequencing platform, has been developed and commercialized by Ion Torrent, a division of Life Technologies, Inc. Here we provide an overview of this semiconductor chip based sequencing technology, and summarize the progress made since its commercial introduction. We described in detail the progress in chip scaling, sequencing throughput, read length, and accuracy. We also summarize the enhancements in the associated platform, including sample preparation, data processing, and engagement of the broader development community through open source and crowdsourcing initiatives. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Thermal Property Measurement of Semiconductor Melt using Modified Laser Flash Method

NASA Technical Reports Server (NTRS)

Lin, Bochuan; Zhu, Shen; Ban, Heng; Li, Chao; Scripa, Rosalla N.; Su, Ching-Hua; Lehoczky, Sandor L.

2003-01-01

This study further developed standard laser flash method to measure multiple thermal properties of semiconductor melts. The modified method can determine thermal diffusivity, thermal conductivity, and specific heat capacity of the melt simultaneously. The transient heat transfer process in the melt and its quartz container was numerically studied in detail. A fitting procedure based on numerical simulation results and the least root-mean-square error fitting to the experimental data was used to extract the values of specific heat capacity, thermal conductivity and thermal diffusivity. This modified method is a step forward from the standard laser flash method, which is usually used to measure thermal diffusivity of solids. The result for tellurium (Te) at 873 K: specific heat capacity 300.2 Joules per kilogram K, thermal conductivity 3.50 Watts per meter K, thermal diffusivity 2.04 x 10(exp -6) square meters per second, are within the range reported in literature. The uncertainty analysis showed the quantitative effect of sample geometry, transient temperature measured, and the energy of the laser pulse.

A miniature electronic nose system based on an MWNT-polymer microsensor array and a low-power signal-processing chip.

PubMed

Chiu, Shih-Wen; Wu, Hsiang-Chiu; Chou, Ting-I; Chen, Hsin; Tang, Kea-Tiong

2014-06-01

This article introduces a power-efficient, miniature electronic nose (e-nose) system. The e-nose system primarily comprises two self-developed chips, a multiple-walled carbon nanotube (MWNT)-polymer based microsensor array, and a low-power signal-processing chip. The microsensor array was fabricated on a silicon wafer by using standard photolithography technology. The microsensor array comprised eight interdigitated electrodes surrounded by SU-8 "walls," which restrained the material-solvent liquid in a defined area of 650 × 760 μm(2). To achieve a reliable sensor-manufacturing process, we used a two-layer deposition method, coating the MWNTs and polymer film as the first and second layers, respectively. The low-power signal-processing chip included array data acquisition circuits and a signal-processing core. The MWNT-polymer microsensor array can directly connect with array data acquisition circuits, which comprise sensor interface circuitry and an analog-to-digital converter; the signal-processing core consists of memory and a microprocessor. The core executes the program, classifying the odor data received from the array data acquisition circuits. The low-power signal-processing chip was designed and fabricated using the Taiwan Semiconductor Manufacturing Company 0.18-μm 1P6M standard complementary metal oxide semiconductor process. The chip consumes only 1.05 mW of power at supply voltages of 1 and 1.8 V for the array data acquisition circuits and the signal-processing core, respectively. The miniature e-nose system, which used a microsensor array, a low-power signal-processing chip, and an embedded k-nearest-neighbor-based pattern recognition algorithm, was developed as a prototype that successfully recognized the complex odors of tincture, sorghum wine, sake, whisky, and vodka.

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2006-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Development of standardized specifications for screening space level integrated circuits and semiconductors

NASA Technical Reports Server (NTRS)

1984-01-01

Standardized methods are established for screening of JAN B microcircuits and JANTXV semiconductor components for space mission or other critical applications when JAN S devices are not available. General specifications are provided which outline the DPA (destructive physical analysis), environmental, electrical, and data requirements for screening of various component technologies. This standard was developed for Air Force Space Division, and is available for use by other DOD agencies, NASA, and space systems contractors for establishing common screening methods for electronic components.

Sub-ppb Oxygen Contaminant Detection in Semi-Conductor Processing

NASA Technical Reports Server (NTRS)

Man, K. F.

1995-01-01

Gaseous contaminants such as oxygen, water vapor, nitrogen and hydrocarbons are often present in the processing environment in semiconductor device fabrication and in containerless materials processing. The contaminants arise as a result of outgassing from hot surfaces or they may be part of the impurities in commercial ultra-high purity gases. Among these gaseous contaminants, oxygen is the most reactive and, therefore, has the most adverse effects on the end product. There has been an intense effort at the Jet Propulsion Laboratory to develop different types of oxygen sorbents to reduce oxygen concentration in a microgravity processing environment to sub-ppb (parts-per-billion) levels. Higher concentrations can lead to rapid surface oxide formation, hence reducing the quality of semiconductor devices. If the concentration of oxygen in a processing chamber at 1000oC is in the ppb level, it will only take approximately 10 seconds for an oxide layer to form on the surface of a sample. The interaction of oxygen with the water surface can lead to the formation of localized defects in semi-conductor devices, hence decreasing the manufacturing yield. For example, efficient production of 64 Mb RAM chips requires contaminations below ppb levels. This paper describes a technique for measuring trace quantities of oxygen contaminants by recording the monoatomic negative ions, O-, using mass spectrometry. The O- formation from the e--O2 interaction utilizes the electron dissociative attachment method that is greatly enhanced at the resonant energy (6.8 eV). The device combines a small gridded electron ionizer with a compact mass spectrometer. The concentrations of oxygen have been measured using the method of standard additions by diluting O2 in N2. The lowest detection limit obtained was 1.2 kHz (O- count rate) at a concentration of 10-10, corresponding to 0.1 ppb.

Thermoelectric generator and method for the fabrication thereof

DOEpatents

Benson, David K.; Tracy, C. Edwin

1987-01-01

A thermoelectric generator using semiconductor elements for responding to a temperature gradient to produce electrical energy with all of the semiconductor elements being of the same type is disclosed. A continuous process for forming substrates on which the semiconductor elements and superstrates are deposited and a process for forming the semiconductor elements on the substrates are also disclosed. The substrates with the semiconductor elements thereon are combined with superstrates to form modules for use thermoelectric generators.

Thermoelectric generator and method for the fabrication thereof

DOEpatents

Benson, D.K.; Tracy, C.E.

1984-08-01

A thermoelectric generator using semiconductor elements for responding to a temperature gradient to produce electrical energy with all of the semiconductor elements being of the same type is disclosed. A continuous process for forming substrates on which the semiconductor elements and superstrates are deposited and a process for forming the semiconductor elements on the substrates are also disclosed. The substrates with the semiconductor elements thereon are combined with superstrates to form modules for use as thermoelectric generators.

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Abstracts of the International Conference (INFOS 83) on Insulating Films on Semiconductors Held at the University of Technology. Eindhoven (The Netherlands) on 11-13 April 1983.

DTIC Science & Technology

1983-04-13

progressed at the same pace. Initially the analogy with conventional well-known ion sensors, such as the glass membrane electrode, led to the...chemical and physical treatments. The standard etching processing using bromine in methanol can deplete cations and produce a surface layer of TeO2 .(l

Integrated Broadband Quantum Cascade Laser

NASA Technical Reports Server (NTRS)

Mansour, Kamjou (Inventor); Soibel, Alexander (Inventor)

2016-01-01

A broadband, integrated quantum cascade laser is disclosed, comprising ridge waveguide quantum cascade lasers formed by applying standard semiconductor process techniques to a monolithic structure of alternating layers of claddings and active region layers. The resulting ridge waveguide quantum cascade lasers may be individually controlled by independent voltage potentials, resulting in control of the overall spectrum of the integrated quantum cascade laser source. Other embodiments are described and claimed.

Generic process for preparing a crystalline oxide upon a group IV semiconductor substrate

DOEpatents

McKee, Rodney A.; Walker, Frederick J.; Chisholm, Matthew F.

2000-01-01

A process for growing a crystalline oxide epitaxially upon the surface of a Group IV semiconductor, as well as a structure constructed by the process, is described. The semiconductor can be germanium or silicon, and the crystalline oxide can generally be represented by the formula (AO).sub.n (A'BO.sub.3).sub.m in which "n" and "m" are non-negative integer repeats of planes of the alkaline earth oxides or the alkaline earth-containing perovskite oxides. With atomic level control of interfacial thermodynamics in a multicomponent semiconductor/oxide system, a highly perfect interface between a semiconductor and a crystalline oxide can be obtained.

Stable surface passivation process for compound semiconductors

DOEpatents

Ashby, Carol I. H.

2001-01-01

A passivation process for a previously sulfided, selenided or tellurated III-V compound semiconductor surface. The concentration of undesired mid-gap surface states on a compound semiconductor surface is reduced by the formation of a near-monolayer of metal-(sulfur and/or selenium and/or tellurium)-semiconductor that is effective for long term passivation of the underlying semiconductor surface. Starting with the III-V compound semiconductor surface, any oxidation present thereon is substantially removed and the surface is then treated with sulfur, selenium or tellurium to form a near-monolayer of chalcogen-semiconductor of the surface in an oxygen-free atmosphere. This chalcogenated surface is then contacted with a solution of a metal that will form a low solubility chalcogenide to form a near-monolayer of metal-chalcogen-semiconductor. The resulting passivating layer provides long term protection for the underlying surface at or above the level achieved by a freshly chalcogenated compound semiconductor surface in an oxygen free atmosphere.

Modeling time-coincident ultrafast electron transfer and solvation processes at molecule-semiconductor interfaces

NASA Astrophysics Data System (ADS)

Li, Lesheng; Giokas, Paul G.; Kanai, Yosuke; Moran, Andrew M.

2014-06-01

Kinetic models based on Fermi's Golden Rule are commonly employed to understand photoinduced electron transfer dynamics at molecule-semiconductor interfaces. Implicit in such second-order perturbative descriptions is the assumption that nuclear relaxation of the photoexcited electron donor is fast compared to electron injection into the semiconductor. This approximation breaks down in systems where electron transfer transitions occur on 100-fs time scale. Here, we present a fourth-order perturbative model that captures the interplay between time-coincident electron transfer and nuclear relaxation processes initiated by light absorption. The model consists of a fairly small number of parameters, which can be derived from standard spectroscopic measurements (e.g., linear absorbance, fluorescence) and/or first-principles electronic structure calculations. Insights provided by the model are illustrated for a two-level donor molecule coupled to both (i) a single acceptor level and (ii) a density of states (DOS) calculated for TiO2 using a first-principles electronic structure theory. These numerical calculations show that second-order kinetic theories fail to capture basic physical effects when the DOS exhibits narrow maxima near the energy of the molecular excited state. Overall, we conclude that the present fourth-order rate formula constitutes a rigorous and intuitive framework for understanding photoinduced electron transfer dynamics that occur on the 100-fs time scale.

Plasma Processing of Metallic and Semiconductor Thin Films in the Fisk Plasma Source

NASA Technical Reports Server (NTRS)

Lampkin, Gregory; Thomas, Edward, Jr.; Watson, Michael; Wallace, Kent; Chen, Henry; Burger, Arnold

1998-01-01

The use of plasmas to process materials has become widespread throughout the semiconductor industry. Plasmas are used to modify the morphology and chemistry of surfaces. We report on initial plasma processing experiments using the Fisk Plasma Source. Metallic and semiconductor thin films deposited on a silicon substrate have been exposed to argon plasmas. Results of microscopy and chemical analyses of processed materials are presented.

Test Standard Revision Update: JESD57, "Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation"

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2015-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. In this talk, we place this test standard into context with other relevant radiation test standards to show its importance for single-event effect radiation testing for space applications. We show the range of industry, government, and end-user party involvement in the revision. Finally, we highlight some of the key changes being made and discuss the trade-space in which setting standards must be made to be both useful and broadly adopted.

Metrologies for quantitative nanomechanical testing and quality control in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Pratt, Jon R.; Kramar, John A.; Newell, David B.; Smith, Douglas T.

2005-05-01

If nanomechanical testing is to evolve into a tool for process and quality control in semiconductor fabrication, great advances in throughput, repeatability, and accuracy of the associated instruments and measurements will be required. A recent grant awarded by the NIST Advanced Technology Program seeks to address the throughput issue by developing a high-speed AFM-based platform for quantitative nanomechanical measurements. The following paper speaks to the issue of quantitative accuracy by presenting an overview of various standards and techniques under development at NIST and other national metrology institutes (NMIs) that can provide a metrological basis for nanomechanical testing. The infrastructure we describe places firm emphasis on traceability to the International System of Units, paving the way for truly quantitative, rather than qualitative, physical property testing.

Quantitative analysis of valence photoemission spectra and quasiparticle excitations at chromophore-semiconductor interfaces.

PubMed

Patrick, Christopher E; Giustino, Feliciano

2012-09-14

Investigating quasiparticle excitations of molecules on surfaces through photoemission spectroscopy forms a major part of nanotechnology research. Resolving spectral features at these interfaces requires a comprehensive theory of electron removal and addition processes in molecules and solids which captures the complex interplay of image charges, thermal effects, and configurational disorder. Here, we develop such a theory and calculate the quasiparticle energy-level alignment and the valence photoemission spectrum for the prototype biomimetic solar cell interface between anatase TiO(2) and the N3 chromophore. By directly matching our calculated photoemission spectrum to experimental data, we clarify the atomistic origin of the chromophore peak at low binding energy. This case study sets a new standard in the interpretation of photoemission spectroscopy at complex chromophore-semiconductor interfaces.

Preparation of a semiconductor thin film

DOEpatents

Pehnt, Martin; Schulz, Douglas L.; Curtis, Calvin J.; Ginley, David S.

1998-01-01

A process for the preparation of a semiconductor film. The process comprises depositing nanoparticles of a semiconductor material onto a substrate whose surface temperature during nanoparticle deposition thereon is sufficient to cause substantially simultaneous fusion of the nanoparticles to thereby coalesce with each other and effectuate film growth.

Organo luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon; Bruchez, Jr., Marcel; Alivisatos, Paul

2006-09-05

A semiconductor nanocrystal compound is described capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source or a particle beam; and (2) at least one linking agent, having a first portion linked to the semiconductor nanocrystal and a second portion capable of linking to an affinity molecule. The compound is linked to an affinity molecule to form a semiconductor nanocrystal probe capable of bonding with a detectable substance. subsequent exposure to excitation energy will excite the semiconductor nanocrystal in the probe causing the emission of electromagnetic radiation. Further described are processes for respectively: making the luminescent semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and using the probe to determine the presence of a detectable substance in a material.

Organo luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon [Pinole, CA; Bruchez, Jr., Marcel; Alivisatos, Paul [Oakland, CA

2004-03-02

A semiconductor nanocrystal compound is described capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source or a particle beam; and (2) at least one linking agent, having a first portion linked to the semiconductor nanocrystal and a second portion capable of linking to an affinity molecule. The compound is linked to an affinity molecule to form a semiconductor nanocrystal probe capable of bonding with a detectable substance. Subsequent exposure to excitation energy will excite the semiconductor nanocrystal in the probe, causing the emission of electromagnetic radiation. Further described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and using the probe to determine the presence of a detectable substance in a material.

Organo luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon; Bruchez, Jr., Marcel; Alivisatos, Paul

2005-08-09

A semiconductor nanocrystal compound is described capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source or a particle beam; and (2) at least one linking agent, having a first portion linked to the semiconductor nanocrystal and a second portion capable of linking to an affinity molecule. The compound is linked to an affinity molecule to form a semiconductor nanocrystal probe capable of bonding with a detectable substance. Subsequent exposure to excitation energy will excite the semiconductor nanocrystal in the probe causing the emission of electromagnetic radiation. Further described are processes for respectively: making the luminescent semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and using the probe to determine the presence of a detectable substance in a material.

Organo luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon; Bruchez, Jr., Marcel; Alivisatos, Paul

2002-01-01

A semiconductor nanocrystal compound is described capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source or a particle beam; and (2) at least one linking agent, having a first portion linked to the semiconductor nanocrystal and a second portion capable of linking to an affity molecule. The compound is linked to an affinity molecule to form a semiconductor nanocrystal probe capable of bonding with a detectable substance. Subsequent exposure to excitation energy will excite the semiconductor nanocrystal in he probe, causing the emission of electromagnetic radiation. Further described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and using the probe to determine the presence of a detectable substance in a material.

Semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon; Bruchez, Marcel; Alivisatos, Paul

2014-01-28

A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents, having a first portion linked to the one or more semiconductor nanocrystals and a second portion capable of linking to one or more affinity molecules. One or more semiconductor nanocrystal compounds are linked to one or more affinity molecules to form a semiconductor nanocrystal probe capable of bonding with one or more detectable substances in a material being analyzed, and capable of, in response to exposure to a first energy, providing a second energy. Also described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and treating materials with the probe.

Semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Weiss, Shimon; Bruchez, Marcel; Alivisatos, Paul A.

2016-12-27

A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents, having a first portion linked to the one or more semiconductor nanocrystals and a second portion capable of linking to one or more affinity molecules. One or more semiconductor nanocrystal compounds are linked to one or more affinity molecules to form a semiconductor nanocrystal probe capable of bonding with onemore » or more detectable substances in a material being analyzed, and capable of, in response to exposure to a first energy, providing a second energy. Also described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and treating materials with the probe.« less

Advanced lithographic filtration and contamination control for 14nm node and beyond semiconductor processes

NASA Astrophysics Data System (ADS)

Varanasi, Rao; Mesawich, Michael; Connor, Patrick; Johnson, Lawrence

2017-03-01

Two versions of a specific 2nm rated filter containing filtration medium and all other components produced from high density polyethylene (HDPE), one subjected to standard cleaning, the other to specialized ultra-cleaning, were evaluated in terms of their cleanliness characteristics, and also defectivity of wafers processed with photoresist filtered through each. With respect to inherent cleanliness, the ultraclean version exhibited a 70% reduction in total metal extractables and 90% reduction in organics extractables compared to the standard clean version. In terms of particulate cleanliness, the ultraclean version achieved stability of effluent particles 30nm and larger in about half the time required by the standard clean version, also exhibiting effluent levels at stability almost 90% lower. In evaluating defectivity of blanket wafers processed with photoresist filtered through either version, initial defect density while using the ultraclean version was about half that observed when the standard clean version was in service, with defectivity also falling more rapidly during subsequent usage of the ultraclean version compared to the standard clean version. Similar behavior was observed for patterned wafers, where the enhanced defect reduction was primarily of bridging defects. The filter evaluation and actual process-oriented results demonstrate the extreme value in using filtration designed possessing the optimal intrinsic characteristics, but with further improvements possible through enhanced cleaning processes

Preparation of a semiconductor thin film

DOEpatents

Pehnt, M.; Schulz, D.L.; Curtis, C.J.; Ginley, D.S.

1998-01-27

A process is disclosed for the preparation of a semiconductor film. The process comprises depositing nanoparticles of a semiconductor material onto a substrate whose surface temperature during nanoparticle deposition thereon is sufficient to cause substantially simultaneous fusion of the nanoparticles to thereby coalesce with each other and effectuate film growth.

Photoacoustic Techniques for Trace Gas Sensing Based on Semiconductor Laser Sources

PubMed Central

Elia, Angela; Lugarà, Pietro Mario; Di Franco, Cinzia; Spagnolo, Vincenzo

2009-01-01

The paper provides an overview on the use of photoacoustic sensors based on semiconductor laser sources for the detection of trace gases. We review the results obtained using standard, differential and quartz enhanced photoacoustic techniques. PMID:22303143

Context-based automated defect classification system using multiple morphological masks

DOEpatents

Gleason, Shaun S.; Hunt, Martin A.; Sari-Sarraf, Hamed

2002-01-01

Automatic detection of defects during the fabrication of semiconductor wafers is largely automated, but the classification of those defects is still performed manually by technicians. This invention includes novel digital image analysis techniques that generate unique feature vector descriptions of semiconductor defects as well as classifiers that use these descriptions to automatically categorize the defects into one of a set of pre-defined classes. Feature extraction techniques based on multiple-focus images, multiple-defect mask images, and segmented semiconductor wafer images are used to create unique feature-based descriptions of the semiconductor defects. These feature-based defect descriptions are subsequently classified by a defect classifier into categories that depend on defect characteristics and defect contextual information, that is, the semiconductor process layer(s) with which the defect comes in contact. At the heart of the system is a knowledge database that stores and distributes historical semiconductor wafer and defect data to guide the feature extraction and classification processes. In summary, this invention takes as its input a set of images containing semiconductor defect information, and generates as its output a classification for the defect that describes not only the defect itself, but also the location of that defect with respect to the semiconductor process layers.

a Study of Oxygen Precipitation in Heavily Doped Silicon.

NASA Astrophysics Data System (ADS)

Graupner, Robert Kurt

Gettering of impurities with oxygen precipitates is widely used during the fabrication of semiconductors to improve the performance and yield of the devices. Since the effectiveness of the gettering process is largely dependent on the initial interstitial oxygen concentration, accurate measurements of this parameter are of considerable importance. Measurements of interstitial oxygen following thermal cycles are required for development of semiconductor fabrication processes and for research into the mechanisms of oxygen precipitate nucleation and growth. Efforts by industrial associations have led to the development of standard procedures for the measurement of interstitial oxygen in wafers. However practical oxygen measurements often do not satisfy the requirements of such standard procedures. An additional difficulty arises when the silicon wafer has a low resitivity (high dopant concentration). In such cases the infrared light used for the measurement is severely attenuated by the electrons of holes introduced by the dopant. Since such wafers are the substrates used for the production of widely used epitaxial wafers, this measurement problem is economically important. Alternative methods such as Secondary Ion Mass Spectroscopy or Gas Fusion Analysis have been developed to measure oxygen in these cases. However, neither of these methods is capable of distinguishing interstitial oxygen from precipitated oxygen as required for precipitation studies. In addition to the commercial interest in heavily doped silicon substrates, they are also of interest for research into the role of point defects in nucleation and precipitation processes. Despite considerable research effort, there is still disagreement concerning the type of point defect and its role in semiconductor processes. Studies of changes in the interstitial oxygen concentration of heavily doped and lightly doped silicon wafers could help clarify the role of point defects in oxygen nucleation and precipitation processes. This could lead to more effective control and use of oxygen precipitation for gettering. One of the principal purposes of this thesis is the extension of the infrared interstitial oxygen measurement technique to situations outside the measurement capacities of the standard technique. These situations include silicon slices exhibiting interfering precipitate absorption bands and heavily doped n-type silicon wafers. A new method is presented for correcting for the effect of multiple reflections in silicon wafers with optically rough surfaces. The technique for the measurement of interstitial oxygen in heavily doped n-type wafers is then used to perform a comparative study of oxygen precipitation in heavily antimony doped (.035 ohm-cm) silicon and lightly doped p-type silicon. A model is presented to quantitatively explain the observed suppression of defect formation in heavily doped n-type wafers.

Emission factors of air toxics from semiconductor manufacturing in Korea.

PubMed

Eom, Yun-Sung; Hong, Ji-Hyung; Lee, Suk-Jo; Lee, Eun-Jung; Cha, Jun-Seok; Lee, Dae-Gyun; Bang, Sun-Ae

2006-11-01

The development of local, accurate emission factors is very important for the estimation of reliable national emissions and air quality management. For that, this study is performed for pollutants released to the atmosphere with source-specific emission tests from the semiconductor manufacturing industry. The semiconductor manufacturing industry is one of the major sources of air toxics or hazardous air pollutants (HAPs); thus, understanding the emission characteristics of the emission source is a very important factor in the development of a control strategy. However, in Korea, there is a general lack of information available on air emissions from the semiconductor industry. The major emission sources of air toxics examined from the semiconductor manufacturing industry were wet chemical stations, coating applications, gaseous operations, photolithography, and miscellaneous devices in the wafer fabrication and semiconductor packaging processes. In this study, analyses of emission characteristics, and the estimations of emission data and factors for air toxics, such as acids, bases, heavy metals, and volatile organic compounds from the semiconductor manufacturing process have been performed. The concentration of hydrogen chloride from the packaging process was the highest among all of the processes. In addition, the emission factor of total volatile organic compounds (TVOCs) for the packaging process was higher than that of the wafer fabrication process. Emission factors estimated in this study were compared with those of Taiwan for evaluation, and they were found to be of similar level in the case of TVOCs and fluorine compounds.

SRAM As An Array Of Energetic-Ion Detectors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Lieneweg, Udo; Nixon, Robert H.

1993-01-01

Static random-access memory (SRAM) designed for use as array of energetic-ion detectors. Exploits well-known tendency of incident energetic ions to cause bit flips in cells of electronic memories. Design of ion-detector SRAM involves modifications of standard SRAM design to increase sensitivity to ions. Device fabricated by use of conventional complementary metal oxide/semiconductor (CMOS) processes. Potential uses include gas densimetry, position sensing, and measurement of cosmic-ray spectrum.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

PubMed Central

Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

2016-01-01

Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

Progress in mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Selinidis, Kosta S.; Brooks, Cynthia B.; Doyle, Gary F.; Brown, Laura; Jones, Chris; Imhof, Joseph; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2011-04-01

The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality "master" mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools and processes specifically for semiconductor applications. The requirements needed for semiconductors dictate the need for a well defined form factor for both master and replica masks which is also compatible with the existing mask infrastructure established for the 6025 semi standard, 6" x 6" x 0.25" photomasks. Complying with this standard provides the necessary tooling needed for mask fabrication processes, cleaning, metrology, and inspection. The replica form factor has additional features specific to imprinting such as a pre-patterned mesa. A PerfectaTM MR5000 mask replication tool has been developed specifically to pattern replica masks from an e-beam written master. The system specifications include a throughput of four replicas per hour with an added image placement component of 5nm, 3sigma and a critical dimension uniformity error of less than 1nm, 3sigma. A new process has been developed to fabricate replicas with high contrast alignment marks so that designs for imprint can fit within current device layouts and maximize the usable printed area on the wafer. Initial performance results of this marks are comparable to the baseline fused silica align marks.

Method of physical vapor deposition of metal oxides on semiconductors

DOEpatents

Norton, David P.

2001-01-01

A process for growing a metal oxide thin film upon a semiconductor surface with a physical vapor deposition technique in a high-vacuum environment and a structure formed with the process involves the steps of heating the semiconductor surface and introducing hydrogen gas into the high-vacuum environment to develop conditions at the semiconductor surface which are favorable for growing the desired metal oxide upon the semiconductor surface yet is unfavorable for the formation of any native oxides upon the semiconductor. More specifically, the temperature of the semiconductor surface and the ratio of hydrogen partial pressure to water pressure within the vacuum environment are high enough to render the formation of native oxides on the semiconductor surface thermodynamically unstable yet are not so high that the formation of the desired metal oxide on the semiconductor surface is thermodynamically unstable. Having established these conditions, constituent atoms of the metal oxide to be deposited upon the semiconductor surface are directed toward the surface of the semiconductor by a physical vapor deposition technique so that the atoms come to rest upon the semiconductor surface as a thin film of metal oxide with no native oxide at the semiconductor surface/thin film interface. An example of a structure formed by this method includes an epitaxial thin film of (001)-oriented CeO.sub.2 overlying a substrate of (001) Ge.

Semiconductor photoelectrochemistry

NASA Technical Reports Server (NTRS)

Buoncristiani, A. M.; Byvik, C. E.

1983-01-01

Semiconductor photoelectrochemical reactions are investigated. A model of the charge transport processes in the semiconductor, based on semiconductor device theory, is presented. It incorporates the nonlinear processes characterizing the diffusion and reaction of charge carriers in the semiconductor. The model is used to study conditions limiting useful energy conversion, specifically the saturation of current flow due to high light intensity. Numerical results describing charge distributions in the semiconductor and its effects on the electrolyte are obtained. Experimental results include: an estimate rate at which a semiconductor photoelectrode is capable of converting electromagnetic energy into chemical energy; the effect of cell temperature on the efficiency; a method for determining the point of zero zeta potential for macroscopic semiconductor samples; a technique using platinized titanium dioxide powders and ultraviolet radiation to produce chlorine, bromine, and iodine from solutions containing their respective ions; the photoelectrochemical properties of a class of layered compounds called transition metal thiophosphates; and a technique used to produce high conversion efficiency from laser radiation to chemical energy.

Unitary lens semiconductor device

DOEpatents

Lear, Kevin L.

1997-01-01

A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2000-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Organo Luminescent semiconductor nanocrystal probes for biological applications and process for making and using such probes

DOEpatents

Weiss, Shimon; Bruchez, Jr., Marcel; Alivisatos, Paul

1999-01-01

A luminescent semiconductor nanocrystal compound is described which is capable of linking to an affinity molecule. The compound comprises (1) a semiconductor nanocrystal capable of emitting electromagnetic radiation (luminescing) in a narrow wavelength band and/or absorbing energy, and/or scattering or diffracting electromagnetic radiation--when excited by an electromagnetic radiation source (of narrow or broad bandwidth) or a particle beam; and (2) at least one linking agent, having a first portion linked to the semiconductor nanocrystal and a second portion capable of linking to an affinity molecule. The luminescent semiconductor nanocrystal compound is linked to an affinity molecule to form an organo luminescent semiconductor nanocrystal probe capable of bonding with a detectable substance in a material being analyzed, and capable of emitting electromagnetic radiation in a narrow wavelength band and/or absorbing, scattering, or diffracting energy when excited by an electromagnetic radiation source (of narrow or broad bandwidth) or a particle beam. The probe is stable to repeated exposure to light in the presence of oxygen and/or other radicals. Further described is a process for making the luminescent semiconductor nanocrystal compound and for making the organo luminescent semiconductor nanocrystal probe comprising the luminescent semiconductor nanocrystal compound linked to an affinity molecule capable of bonding to a detectable substance. A process is also described for using the probe to determine the presence of a detectable substance in a material.

Suppressing molecular vibrations in organic semiconductors by inducing strain

PubMed Central

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-01-01

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501

Suppressing molecular vibrations in organic semiconductors by inducing strain.

PubMed

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-04-04

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dahal, Rajendra P.; Bhat, Ishwara B.; Chow, Tat-Sing

Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.

The relationship between spontaneous abortion and female workers in the semiconductor industry.

PubMed

Kim, Heechan; Kwon, Ho-Jang; Rhie, Jeongbae; Lim, Sinye; Kang, Yun-Dan; Eom, Sang-Yong; Lim, Hyungryul; Myong, Jun-Pyo; Roh, Sangchul

2017-01-01

This study investigated the relationship between job type and the risk for spontaneous abortion to assess the reproductive toxicity of female workers in the semiconductor industry. A questionnaire survey was administered to current female workers of two semiconductor manufacturing plants in Korea. We included female workers who became pregnant at least 6 months after the start of their employment with the company. The pregnancy outcomes of 2,242 female workers who experienced 4,037 pregnancies were investigated. Personnel records were used to assign the subjects to one of three groups: fabrication process workers, packaging process workers, and clerical workers. To adjust for within-person correlations between pregnancies, a generalized estimating equation was used. The logistic regression analysis was limited to the first pregnancy after joining the company to satisfy the assumption of independence among pregnancies. Moreover, we stratified the analysis by time period (pregnancy in the years prior to 2008 vs. after 2009) to reflect differences in occupational exposure based on semiconductor production periods. The risk for spontaneous abortion in female semiconductor workers was not significantly higher for fabrication and packaging process workers than for clerical workers. However, when we stratified by time period, the odds ratio for spontaneous abortion was significantly higher for packaging process workers who became pregnant prior to 2008 when compared with clerical workers (odds ratio: 2.21; 95% confidence interval: 1.01-4.81). When examining the pregnancies of female semiconductor workers that occurred prior to 2008, packaging process workers showed a significantly higher risk for spontaneous abortions than did clerical workers. The two semiconductor production periods in our study (prior to 2008 vs. after 2009) had different automated processes, chemical exposure levels, and working environments. Thus, the conditions prior to 2008 may have increased the risk for spontaneous abortions in packaging process workers in the semiconductor industry.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors.

PubMed

Fluegel, Brian; Mialitsin, Aleksej V; Beaton, Daniel A; Reno, John L; Mascarenhas, Angelo

2015-05-28

Semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10(-4). Comparing our strain sensitivity and signal strength in Al(x)Ga(1-x)As with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 10(3), thus obviating key constraints in semiconductor strain metrology.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors

PubMed Central

Fluegel, Brian; Mialitsin, Aleksej V.; Beaton, Daniel A.; Reno, John L.; Mascarenhas, Angelo

2015-01-01

Semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10−4. Comparing our strain sensitivity and signal strength in AlxGa1−xAs with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 103, thus obviating key constraints in semiconductor strain metrology. PMID:26017853

Assessing Conceptual Knowledge for the Physics of Semiconductors

ERIC Educational Resources Information Center

Ene, Emanuela

2013-01-01

Following the trend in science and engineering education generated by the visible impact created by the Force Concept Inventory (FCI), the investigator developed a Physics of Semiconductors Concept Inventory (PSCI). PSCI fills the need of standardized concept tests for undergraduate education in photonics and electrical engineering. The structure…

Surface passivation process of compound semiconductor material using UV photosulfidation

DOEpatents

Ashby, Carol I. H.

1995-01-01

A method for passivating compound semiconductor surfaces by photolytically disrupting molecular sulfur vapor with ultraviolet radiation to form reactive sulfur which then reacts with and passivates the surface of compound semiconductors.

Isolated molecular dopants in pentacene observed by scanning tunneling microscopy

NASA Astrophysics Data System (ADS)

Ha, Sieu D.; Kahn, Antoine

2009-11-01

Doping is essential to the control of electronic structure and conductivity of semiconductor materials. Whereas doping of inorganic semiconductors is well established, doping of organic molecular semiconductors is still relatively poorly understood. Using scanning tunneling microscopy, we investigate, at the molecular scale, surface and subsurface tetrafluoro-tetracyanoquinodimethane p -dopants in the prototypical molecular semiconductor pentacene. Surface dopants diffuse to pentacene vacancies and appear as negatively charged centers, consistent with the standard picture of an ionized acceptor. Subsurface dopants, however, have the effect of a positive charge, evidence that the donated hole is localized by the parent acceptor counterion, in contrast to the model of doping in inorganic semiconductors. Scanning tunneling spectroscopy shows that the electron potential energy is locally lowered near a subsurface dopant feature, in agreement with the localized hole model.

Electronic Materials and Processing: Proceedings of the First Electronic Materials and Processing Congress Held in Conjunction with the 1988 World Materials Congress, Chicago, Illinois, USA, 24-30 September 1988

DTIC Science & Technology

1988-01-01

usually be traced to a combination of new semiconductors one on top of the other, then concepts, materials, and device principles, the process is called...example, growth techniques. New combinations of compound semiconductors such as GaAs have an materials called heterostructures can be made intrinsically...of combinations of metals, have direct energy band gaps that facilitate semiconductor, and insulators. Quantum the efficient recombination of

Continuous replenishment of molten semiconductor in a Czochralski-process, single-crystal-growing furnace

NASA Technical Reports Server (NTRS)

Fiegl, George (Inventor); Torbet, Walter (Inventor)

1981-01-01

A replenishment crucible is mounted adjacent the usual drawing crucible, from which a monocrystalline boule is drawn according to the Czochralski method. A siphon tube for molten semiconductor transfer extends from the replenishment crucible to the drawing crucible. Each crucible is enclosed within its own hermetic shell and is provided with its own heater. The siphon tube is initially filled with molten semiconductor by raising the inert atmospheric pressure in the shell surrounding the replenishment crucible above that surrounding the drawing crucible. Thereafter, adjustment of the level of molten semiconductor in the drawing crucible may be achieved by adjusting the level in either crucible, since the siphon tube will establish the same level in both crucibles. For continuous processing, solid semiconductor may be added to and melted in the replenishment crucible during the process of drawing crystals from the drawing crucible. A constant liquid level of melted semiconductor is maintained in the system by an optical monitoring device and any of several electromechanical controls of the rate of replenishment or crucible height.

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology

PubMed Central

Vollebregt, Sten; Ishihara, Ryoichi

2015-01-01

We demonstrate a method for the low temperature growth (350 °C) of vertically-aligned carbon nanotubes (CNT) bundles on electrically conductive thin-films. Due to the low growth temperature, the process allows integration with modern low-κ dielectrics and some flexible substrates. The process is compatible with standard semiconductor fabrication, and a method for the fabrication of electrical 4-point probe test structures for vertical interconnect test structures is presented. Using scanning electron microscopy the morphology of the CNT bundles is investigated, which demonstrates vertical alignment of the CNT and can be used to tune the CNT growth time. With Raman spectroscopy the crystallinity of the CNT is investigated. It was found that the CNT have many defects, due to the low growth temperature. The electrical current-voltage measurements of the test vertical interconnects displays a linear response, indicating good ohmic contact was achieved between the CNT bundle and the top and bottom metal electrodes. The obtained resistivities of the CNT bundle are among the average values in the literature, while a record-low CNT growth temperature was used. PMID:26709530

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Research and Design on a Product Data Definition System of Semiconductor Packaging Industry

NASA Astrophysics Data System (ADS)

Shi, Jinfei; Ma, Qingyao; Zhou, Yifan; Chen, Ruwen

2017-12-01

This paper develops a product data definition (PDD) system for a semiconductor packaging and testing company with independent intellectual property rights. The new PDD system can solve the problems such as, the effective control of production plans, the timely feedback of production processes, and the efficient schedule of resources. Firstly, this paper introduces the general requirements of the PDD system and depicts the operation flow and the data flow of the PDD system. Secondly, the overall design scheme of the PDD system is put forward. After that, the physical data model is developed using the Power Designer15.0 tool, and the database system is built. Finally, the function realization and running effects of the PDD system are analysed. The successful operation of the PDD system can realize the information flow among various production departments of the enterprise to meet the standard of the enterprise manufacturing integration and improve the efficiency of production management.

Sensors for process control Focus Team report

NASA Astrophysics Data System (ADS)

At the Semiconductor Technology Workshop, held in November 1992, the Semiconductor Industry Association (SIA) convened 179 semiconductor technology experts to assess the 15-year outlook for the semiconductor manufacturing industry. The output of the Workshop, a document entitled 'Semiconductor Technology: Workshop Working Group Reports,' contained an overall roadmap for the technology characteristics envisioned in integrated circuits (IC's) for the period 1992-2007. In addition, the document contained individual roadmaps for numerous key areas in IC manufacturing, such as film deposition, thermal processing, manufacturing systems, exposure technology, etc. The SIA Report did not contain a separate roadmap for contamination free manufacturing (CFM). A key component of CFM for the next 15 years is the use of sensors for (1) defect reduction, (2) improved product quality, (3) improved yield, (4) improved tool utilization through contamination reduction, and (5) real time process control in semiconductor fabrication. The objective of this Focus Team is to generate a Sensors for Process Control Roadmap. Implicit in this objective is the identification of gaps in current sensor technology so that research and development activity in the sensor industry can be stimulated to develop sensor systems capable of meeting the projected roadmap needs. Sensor performance features of interest include detection limit, specificity, sensitivity, ease of installation and maintenance, range, response time, accuracy, precision, ease and frequency of calibration, degree of automation, and adaptability to in-line process control applications.

A compact semiconductor digital interferometer and its applications

NASA Astrophysics Data System (ADS)

Britsky, Oleksander I.; Gorbov, Ivan V.; Petrov, Viacheslav V.; Balagura, Iryna V.

2015-05-01

The possibility of using semiconductor laser interferometers to measure displacements at the nanometer scale was demonstrated. The creation principles of miniature digital Michelson interferometers based on semiconductor lasers were proposed. The advanced processing algorithm for the interferometer quadrature signals was designed. It enabled to reduce restrictions on speed of measured movements. A miniature semiconductor digital Michelson interferometer was developed. Designing of the precision temperature stability system for miniature low-cost semiconductor laser with 0.01ºС accuracy enabled to use it for creation of compact interferometer rather than a helium-neon one. Proper firmware and software was designed for the interferometer signals real-time processing and conversion in to respective shifts. In the result the relative displacement between 0-500 mm was measured with a resolution of better than 1 nm. Advantages and disadvantages of practical use of the compact semiconductor digital interferometer in seismometers for the measurement of shifts were shown.

Solid-state-based analog of optomechanics

DOE PAGES

Naumann, Nicolas L.; Droenner, Leon; Carmele, Alexander; ...

2016-09-01

In this study, we investigate a semiconductor quantum dot as a microscopic analog of a basic optomechanical setup. We show that optomechanical features can be reproduced by the solid-state platform, arising from parallels of the underlying interaction processes, which in the optomechanical case is the radiation pressure coupling and in the semiconductor case the electron–phonon coupling. We discuss bistabilities, lasing, and phonon damping, and recover the same qualitative behaviors for the semiconductor and the optomechanical cases expected for low driving strengths. However, in contrast to the optomechanical case, distinct signatures of higher order processes arise in the semiconductor model.

Nanoband array electrode as a platform for high sensitivity enzyme-based glucose biosensing.

PubMed

Falk, Magnus; Sultana, Reshma; Swann, Marcus J; Mount, Andrew R; Freeman, Neville J

2016-12-01

We describe a novel glucose biosensor based on a nanoband array electrode design, manufactured using standard semiconductor processing techniques, and bio-modified with glucose oxidase immobilized at the nanoband electrode surface. The nanoband array architecture allows for efficient diffusion of glucose and oxygen to the electrode, resulting in a thousand-fold improvement in sensitivity and wide linear range compared to a conventional electrode. The electrode constitutes a robust and manufacturable sensing platform. Copyright © 2016 Elsevier B.V. All rights reserved.

Nonvolatile programmable neural network synaptic array

NASA Technical Reports Server (NTRS)

Tawel, Raoul (Inventor)

1994-01-01

A floating-gate metal oxide semiconductor (MOS) transistor is implemented for use as a nonvolatile analog storage element of a synaptic cell used to implement an array of processing synaptic cells. These cells are based on a four-quadrant analog multiplier requiring both X and Y differential inputs, where one Y input is UV programmable. These nonvolatile synaptic cells are disclosed fully connected in a 32 x 32 synaptic cell array using standard very large scale integration (VLSI) complementary MOS (CMOS) technology.

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

Multifunctional Organic-Semiconductor Interfacial Layers for Solution-Processed Oxide-Semiconductor Thin-Film Transistor.

PubMed

Kwon, Guhyun; Kim, Keetae; Choi, Byung Doo; Roh, Jeongkyun; Lee, Changhee; Noh, Yong-Young; Seo, SungYong; Kim, Myung-Gil; Kim, Choongik

2017-06-01

The stabilization and control of the electrical properties in solution-processed amorphous-oxide semiconductors (AOSs) is crucial for the realization of cost-effective, high-performance, large-area electronics. In particular, impurity diffusion, electrical instability, and the lack of a general substitutional doping strategy for the active layer hinder the industrial implementation of copper electrodes and the fine tuning of the electrical parameters of AOS-based thin-film transistors (TFTs). In this study, the authors employ a multifunctional organic-semiconductor (OSC) interlayer as a solution-processed thin-film passivation layer and a charge-transfer dopant. As an electrically active impurity blocking layer, the OSC interlayer enhances the electrical stability of AOS TFTs by suppressing the adsorption of environmental gas species and copper-ion diffusion. Moreover, charge transfer between the organic interlayer and the AOS allows the fine tuning of the electrical properties and the passivation of the electrical defects in the AOS TFTs. The development of a multifunctional solution-processed organic interlayer enables the production of low-cost, high-performance oxide semiconductor-based circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fabrication of Metallic Hollow Nanoparticles

NASA Technical Reports Server (NTRS)

Lillehei, Peter T. (Inventor); Chu, Sang-Hyon (Inventor); Park, Yeonjoon (Inventor); Kim, Jae-Woo (Inventor); Choi, Sr., Sang H. (Inventor); King, Glen C. (Inventor); Elliott, James R. (Inventor)

2016-01-01

Metal and semiconductor nanoshells, particularly transition metal nanoshells, are fabricated using dendrimer molecules. Metallic colloids, metallic ions or semiconductors are attached to amine groups on the dendrimer surface in stabilized solution for the surface seeding method and the surface seedless method, respectively. Subsequently, the process is repeated with additional metallic ions or semiconductor, a stabilizer, and NaBH.sub.4 to increase the wall thickness of the metallic or semiconductor lining on the dendrimer surface. Metallic or semiconductor ions are automatically reduced on the metallic or semiconductor nanoparticles causing the formation of hollow metallic or semiconductor nanoparticles. The void size of the formed hollow nanoparticles depends on the dendrimer generation. The thickness of the metallic or semiconductor thin film around the dendrimer depends on the repetition times and the size of initial metallic or semiconductor seeds.

Ambipolar Small-Molecule:Polymer Blend Semiconductors for Solution-Processable Organic Field-Effect Transistors.

PubMed

Kang, Minji; Hwang, Hansu; Park, Won-Tae; Khim, Dongyoon; Yeo, Jun-Seok; Kim, Yunseul; Kim, Yeon-Ju; Noh, Yong-Young; Kim, Dong-Yu

2017-01-25

We report on the fabrication of an organic thin-film semiconductor formed using a blend solution of soluble ambipolar small molecules and an insulating polymer binder that exhibits vertical phase separation and uniform film formation. The semiconductor thin films are produced in a single step from a mixture containing a small molecular semiconductor, namely, quinoidal biselenophene (QBS), and a binder polymer, namely, poly(2-vinylnaphthalene) (PVN). Organic field-effect transistors (OFETs) based on QBS/PVN blend semiconductor are then assembled using top-gate/bottom-contact device configuration, which achieve almost four times higher mobility than the neat QBS semiconductor. Depth profile via secondary ion mass spectrometry and atomic force microscopy images indicate that the QBS domains in the films made from the blend are evenly distributed with a smooth morphology at the bottom of the PVN layer. Bias stress test and variable-temperature measurements on QBS-based OFETs reveal that the QBS/PVN blend semiconductor remarkably reduces the number of trap sites at the gate dielectric/semiconductor interface and the activation energy in the transistor channel. This work provides a one-step solution processing technique, which makes use of soluble ambipolar small molecules to form a thin-film semiconductor for application in high-performance OFETs.

Origin of poor doping efficiency in solution processed organic semiconductors.

PubMed

Jha, Ajay; Duan, Hong-Guang; Tiwari, Vandana; Thorwart, Michael; Miller, R J Dwayne

2018-05-21

Doping is an extremely important process where intentional insertion of impurities in semiconductors controls their electronic properties. In organic semiconductors, one of the convenient, but inefficient, ways of doping is the spin casting of a precursor mixture of components in solution, followed by solvent evaporation. Active control over this process holds the key to significant improvements over current poor doping efficiencies. Yet, an optimized control can only come from a detailed understanding of electronic interactions responsible for the low doping efficiencies. Here, we use two-dimensional nonlinear optical spectroscopy to examine these interactions in the course of the doping process by probing the solution mixture of doped organic semiconductors. A dopant accepts an electron from the semiconductor and the two ions form a duplex of interacting charges known as ion-pair complexes. Well-resolved off-diagonal peaks in the two-dimensional spectra clearly demonstrate the electronic connectivity among the ions in solution. This electronic interaction represents a well resolved electrostatically bound state, as opposed to a random distribution of ions. We developed a theoretical model to recover the experimental data, which reveals an unexpectedly strong electronic coupling of ∼250 cm -1 with an intermolecular distance of ∼4.5 Å between ions in solution, which is approximately the expected distance in processed films. The fact that this relationship persists from solution to the processed film gives direct evidence that Coulomb interactions are retained from the precursor solution to the processed films. This memory effect renders the charge carriers equally bound also in the film and, hence, results in poor doping efficiencies. This new insight will help pave the way towards rational tailoring of the electronic interactions to improve doping efficiencies in processed organic semiconductor thin films.

Process waste assessment: Petroleum jelly removal from semiconductor die using trichloroethylene

DOE Office of Scientific and Technical Information (OSTI.GOV)

Curtin, D.P.

The process analyzed involves non-production, laboratory environment use of trichloroethylene for the cleaning of semiconductor devices. The option selection centered on the replacement of the trichloroethylene with a non-hazardous material. This process waste assessment was performed as part of a pilot project.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors

DOE PAGES

Fluegel., Brian; Mialitsin, Aleksej V.; Beaton, Daniel A.; ...

2015-05-28

In this study, the semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10 –4. Comparing our strain sensitivity andmore » signal strength in Al xGa 1–xAs with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 10 3, thus obviating key constraints in semiconductor strain metrology.« less

REDUCTION OF ARSENIC WASTES IN THE SEMICONDUCTOR INDUSTRY

EPA Science Inventory

The research described in this report was aimed at initiating and developing processes and process modifications that could be incorporated into semiconductor manufacturing operations to accomplish pollution prevention, especially to accomplish significant reduction in the quanti...

Real time quantitative imaging for semiconductor crystal growth, control and characterization

NASA Technical Reports Server (NTRS)

Wargo, Michael J.

1991-01-01

A quantitative real time image processing system has been developed which can be software-reconfigured for semiconductor processing and characterization tasks. In thermal imager mode, 2D temperature distributions of semiconductor melt surfaces (900-1600 C) can be obtained with temperature and spatial resolutions better than 0.5 C and 0.5 mm, respectively, as demonstrated by analysis of melt surface thermal distributions. Temporal and spatial image processing techniques and multitasking computational capabilities convert such thermal imaging into a multimode sensor for crystal growth control. A second configuration of the image processing engine in conjunction with bright and dark field transmission optics is used to nonintrusively determine the microdistribution of free charge carriers and submicron sized crystalline defects in semiconductors. The IR absorption characteristics of wafers are determined with 10-micron spatial resolution and, after calibration, are converted into charge carrier density.

Thermoreflectance spectroscopy—Analysis of thermal processes in semiconductor lasers

NASA Astrophysics Data System (ADS)

Pierścińska, D.

2018-01-01

This review focuses on theoretical foundations, experimental implementation and an overview of experimental results of the thermoreflectance spectroscopy as a powerful technique for temperature monitoring and analysis of thermal processes in semiconductor lasers. This is an optical, non-contact, high spatial resolution technique providing high temperature resolution and mapping capabilities. Thermoreflectance is a thermometric technique based on measuring of relative change of reflectivity of the surface of laser facet, which provides thermal images useful in hot spot detection and reliability studies. In this paper, principles and experimental implementation of the technique as a thermography tool is discussed. Some exemplary applications of TR to various types of lasers are presented, proving that thermoreflectance technique provides new insight into heat management problems in semiconductor lasers and in particular, that it allows studying thermal degradation processes occurring at laser facets. Additionally, thermal processes and basic mechanisms of degradation of the semiconductor laser are discussed.

Design for manufacturability production management activity report

NASA Astrophysics Data System (ADS)

Miyazaki, Norihiko; Sato, T.; Honma, M.; Yoshioka, N.; Hosono, K.; Onodera, T.; Itoh, H.; Suzuki, H.; Uga, T.; Kadota, K.; Iriki, N.

2006-05-01

Design For Manufacturability Production Management (DFM-PM) Subcommittee has been started in succession to Reticle Management Subcommittee (RMS) in Semiconductor Manufacturing Technology Committee for Japan (SMTCJ) from 2005. Our activity focuses on the SoC (System On Chip) Business, and it pursues the improvement of communication in manufacturing technique. The first theme of activity is the investigation and examination of the new trends about production (manufacturer) technology and related information, and proposals of business solution. The second theme is the standardization activity about manufacture technology and the cooperation with related semiconductors' organizations. And the third theme is holding workshop and support for promotion and spread of the standardization technology throughout semiconductor companies. We expand a range of scope from design technology to wafer pattern reliability and we will propose the competition domain, the collaboration area and the standardization technology on DFM. Furthermore, we will be able to make up a SoC business model as the 45nm node technology beyond manufacturing platform in cooperating with the design information and the production information by utilizing EDA technology.

Computational Material Processing in Microgravity

NASA Technical Reports Server (NTRS)

2005-01-01

Working with Professor David Matthiesen at Case Western Reserve University (CWRU) a computer model of the DPIMS (Diffusion Processes in Molten Semiconductors) space experiment was developed that is able to predict the thermal field, flow field and concentration profile within a molten germanium capillary under both ground-based and microgravity conditions as illustrated. These models are coupled with a novel nonlinear statistical methodology for estimating the diffusion coefficient from measured concentration values after a given time that yields a more accurate estimate than traditional methods. This code was integrated into a web-based application that has become a standard tool used by engineers in the Materials Science Department at CWRU.

Biochips: A fruitful product of solid state physics and molecular biology

NASA Astrophysics Data System (ADS)

Mendoza-Alvarez, Julio G.

1998-08-01

The application of the standard high resolution photolithography techniques used in the semiconductor device industry to the growth of a chain of nucleotides with a precise and well known sequence, has made possible the fabrication of a new kind of device, the so called biochips. At the National Polytechnic Institute in Mexico we have joined a multidisciplinary scientific group, and we are in the process of developing the technical capabilities in order to set up a processing lab to fabricate biochips focused to very specific applications in the area of cancer detection. We present here the main lines along which this project is being developed.

SEMICONDUCTOR TECHNOLOGY Supercritical carbon dioxide process for releasing stuck cantilever beams

NASA Astrophysics Data System (ADS)

Yu, Hui; Chaoqun, Gao; Lei, Wang; Yupeng, Jing

2010-10-01

The multi-SCCO2 (supercritical carbon dioxide) release and dry process based on our specialized SCCO2 semiconductor process equipment is investigated and the releasing mechanism is discussed. The experiment results show that stuck cantilever beams were held up again under SCCO2 high pressure treatment and the repeatability of this process is nearly 100%.

Plasma Processes for Semiconductor Fabrication

NASA Astrophysics Data System (ADS)

Hitchon, W. N. G.

1999-01-01

Plasma processing is a central technique in the fabrication of semiconductor devices. This self-contained book provides an up-to-date description of plasma etching and deposition in semiconductor fabrication. It presents the basic physics and chemistry of these processes, and shows how they can be accurately modeled. The author begins with an overview of plasma reactors and discusses the various models for understanding plasma processes. He then covers plasma chemistry, addressing the effects of different chemicals on the features being etched. Having presented the relevant background material, he then describes in detail the modeling of complex plasma systems, with reference to experimental results. The book closes with a useful glossary of technical terms. No prior knowledge of plasma physics is assumed in the book. It contains many homework exercises and serves as an ideal introduction to plasma processing and technology for graduate students of electrical engineering and materials science. It will also be a useful reference for practicing engineers in the semiconductor industry.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, C.I.H.; Myers, D.R.; Vook, F.L.

1988-06-16

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.

1989-01-01

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Intelligent monitoring and control of semiconductor manufacturing equipment

NASA Technical Reports Server (NTRS)

Murdock, Janet L.; Hayes-Roth, Barbara

1991-01-01

The use of AI methods to monitor and control semiconductor fabrication in a state-of-the-art manufacturing environment called the Rapid Thermal Multiprocessor is described. Semiconductor fabrication involves many complex processing steps with limited opportunities to measure process and product properties. By applying additional process and product knowledge to that limited data, AI methods augment classical control methods by detecting abnormalities and trends, predicting failures, diagnosing, planning corrective action sequences, explaining diagnoses or predictions, and reacting to anomalous conditions that classical control systems typically would not correct. Research methodology and issues are discussed, and two diagnosis scenarios are examined.

Diagnostic for Plasma Enhanced Chemical Vapor Deposition and Etch Systems

NASA Technical Reports Server (NTRS)

Cappelli, Mark A.

1999-01-01

In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies ion the processing of semiconductor materials arising from understanding etch chemistries are being developed through a research collaboration between Stanford University and NASA-Ames Research Center, Although a great deal of laboratory-scale research has been performed on many of materials processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. In addition, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. The research described involves the study of plasmas used in semiconductor processes. An inductively coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics and chemistries. This ICP source generates plasmas with higher electron densities (approximately 10(exp 12)/cu cm) and lower operating pressures (approximately 7 mTorr) than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The motivation for this study is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas-phase and surface reaction rates. species concentration, temperature, ion energy distribution, and electron number density. A wide variety of diagnostic techniques are under development through this consortium grant to measure these parameters. including molecular beam mass spectrometry (MBMS). Fourier transform infrared (FTIR) spectroscopy, broadband ultraviolet (UV) absorption spectroscopy, a compensated Langmuir probe. Additional diagnostics. Such as microwave interferometry and microwave absorption for measurements of plasma density and radical concentrations are also planned.

Submillimeter Spectroscopic Diagnostics in Semiconductor Processing Plasmas

NASA Astrophysics Data System (ADS)

Helal, Yaser H.; Neese, Christopher F.; De Lucia, Frank C.; Ewing, Paul R.; Stout, Phillip J.; Walker, Quentin; Armacost, Michael D.

2014-06-01

Submillimeter absorption spectroscopy was used to study semiconductor processing plasmas. Abundances and temperatures of molecules, radicals, and ions can be determined without altering any of the properties of the plasma. The behavior of these measurements provides useful applications in monitoring process steps. A summary of such applications will be presented, including etching and cleaning endpoint detection.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

DOEpatents

Norman, Andrew

2016-08-23

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

A Summary of Lightpipe Radiation Thermometry Research at NIST

PubMed Central

Tsai, Benjamin K.

2006-01-01

During the last 10 years, research in light-pipe radiation thermometry has significantly reduced the uncertainties for temperature measurements in semiconductor processing. The National Institute of Standards and Technology (NIST) has improved the calibration of lightpipe radiation thermometers (LPRTs), the characterization procedures for LPRTs, the in situ calibration of LPRTs using thin-film thermocouple (TFTC) test wafers, and the application of model-based corrections to improve LPRT spectral radiance temperatures. Collaboration with industry on implementing techniques and ideas established at NIST has led to improvements in temperature measurements in semiconductor processing. LPRTs have been successfully calibrated at NIST for rapid thermal processing (RTP) applications using a sodium heat-pipe blackbody between 700 °C and 900 °C with an uncertainty of about 0.3 °C (k = 1) traceable to the International Temperature Scale of 1990. Employing appropriate effective emissivity models, LPRTs have been used to determine the wafer temperature in the NIST RTP Test Bed with an uncertainty of 3.5 °C. Using a TFTC wafer for calibration, the LPRT can measure the wafer temperature in the NIST RTP Test Bed with an uncertainty of 2.3 °C. Collaborations with industry in characterizing and calibrating LPRTs will be summarized, and future directions for LPRT research will be discussed. PMID:27274914

A Summary of Lightpipe Radiation Thermometry Research at NIST.

PubMed

Tsai, Benjamin K

2006-01-01

During the last 10 years, research in light-pipe radiation thermometry has significantly reduced the uncertainties for temperature measurements in semiconductor processing. The National Institute of Standards and Technology (NIST) has improved the calibration of lightpipe radiation thermometers (LPRTs), the characterization procedures for LPRTs, the in situ calibration of LPRTs using thin-film thermocouple (TFTC) test wafers, and the application of model-based corrections to improve LPRT spectral radiance temperatures. Collaboration with industry on implementing techniques and ideas established at NIST has led to improvements in temperature measurements in semiconductor processing. LPRTs have been successfully calibrated at NIST for rapid thermal processing (RTP) applications using a sodium heat-pipe blackbody between 700 °C and 900 °C with an uncertainty of about 0.3 °C (k = 1) traceable to the International Temperature Scale of 1990. Employing appropriate effective emissivity models, LPRTs have been used to determine the wafer temperature in the NIST RTP Test Bed with an uncertainty of 3.5 °C. Using a TFTC wafer for calibration, the LPRT can measure the wafer temperature in the NIST RTP Test Bed with an uncertainty of 2.3 °C. Collaborations with industry in characterizing and calibrating LPRTs will be summarized, and future directions for LPRT research will be discussed.

The Impact of Standard Semiconductor Fabrication Processes on Polycrystalline Nb Thin Film Surfaces

NASA Technical Reports Server (NTRS)

Brown, Ari David; Barrentine, Emily M.; Moseley, Samuel H.; Noroozian, Omid; Stevenson, Thomas

2011-01-01

Polycrystalline superconducting Nb thin films are extensively used for submillimeter and millimeter transmission line applications and, less commonly, used in microwave kinetic inductance detector (MKID) applications. The microwave and mm-wave loss in these films is impacted, in part, by the presence of surface nitrides and oxides. In this study, glancing incidence x-ray diffraction was used to identify the presence of niobium nitride and niobium monoxide surface layers on Nb thin films which had been exposed to chemicals used in standard photolithographic processing. A method of mitigating the presence of ordered niobium monoxide surface layers is presented. Furthermore, we discuss the possibility of using glancing incidence x-ray diffraction as a non-destructive diagnostic tool for evaluating the quality of Nb thin films used in MKIDs and transmission lines. For a given fabrication process, we have both the x-ray diffraction data of the surface chemistry and a measure of the mm-wave and microwave loss, the latter being made in superconducting resonators.

The Impact of Standard Semiconductor Fabrication Processes on Polycrystalline Nb Thin Film Surfaces

NASA Technical Reports Server (NTRS)

Brown, Ari David; Barrentine, Emily M.; Moseley, Samuel H.; Noroozian, Omid; Stevenson, Thomas

2016-01-01

Polycrystalline Nb thin films are extensively used for microwave kinetic inductance detectors (MKIDs) and superconducting transmission line applications. The microwave and mm-wave loss in these films is impacted, in part, by the presence of surface nitrides and oxides. In this study, glancing incidence x-ray diffraction was used to identify the presence of niobium nitride and niobium monoxide surface layers on Nb thin films which had been exposed to chemicals used in standard photolithographic processing. A method of mitigating the presence of ordered niobium monoxide surface layers is presented. Furthermore, we discuss the possibility of using glancing incidence x-ray diffraction as a non-destructive diagnostic tool for evaluating the quality of Nb thin films used in MKIDs and transmission lines. For a given fabrication process, we have both the X-ray diffraction data of the surface chemistry and a measure of the mm-wave and microwave loss, the latter being made in superconducting resonators.

Improving atomic displacement and replacement calculations with physically realistic damage models

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nordlund, Kai; Zinkle, Steven J.; Sand, Andrea E.

Atomic collision processes are fundamental to numerous advanced materials technologies such as electron microscopy, semiconductor processing and nuclear power generation. Extensive experimental and computer simulation studies over the past several decades provide the physical basis for understanding the atomic-scale processes occurring during primary displacement events. The current international standard for quantifying this energetic particle damage, the Norgett-Robinson-Torrens displacements per atom (NRT-dpa) model, has nowadays several well-known limitations. In particular, the number of radiation defects produced in energetic cascades in metals is only ~1/3 the NRT-dpa prediction, while the number of atoms involved in atomic mixing is about a factor ofmore » 30 larger than the dpa value. Here we propose two new complementary displacement production estimators (athermal recombination corrected dpa, arc-dpa) and atomic mixing (replacements per atom, rpa) functions that extend the NRT-dpa by providing more physically realistic descriptions of primary defect creation in materials and may become additional standard measures for radiation damage quantification.« less

Improving atomic displacement and replacement calculations with physically realistic damage models

DOE PAGES

Nordlund, Kai; Zinkle, Steven J.; Sand, Andrea E.; ...

2018-03-14

Atomic collision processes are fundamental to numerous advanced materials technologies such as electron microscopy, semiconductor processing and nuclear power generation. Extensive experimental and computer simulation studies over the past several decades provide the physical basis for understanding the atomic-scale processes occurring during primary displacement events. The current international standard for quantifying this energetic particle damage, the Norgett-Robinson-Torrens displacements per atom (NRT-dpa) model, has nowadays several well-known limitations. In particular, the number of radiation defects produced in energetic cascades in metals is only ~1/3 the NRT-dpa prediction, while the number of atoms involved in atomic mixing is about a factor ofmore » 30 larger than the dpa value. Here we propose two new complementary displacement production estimators (athermal recombination corrected dpa, arc-dpa) and atomic mixing (replacements per atom, rpa) functions that extend the NRT-dpa by providing more physically realistic descriptions of primary defect creation in materials and may become additional standard measures for radiation damage quantification.« less

Improving atomic displacement and replacement calculations with physically realistic damage models.

PubMed

Nordlund, Kai; Zinkle, Steven J; Sand, Andrea E; Granberg, Fredric; Averback, Robert S; Stoller, Roger; Suzudo, Tomoaki; Malerba, Lorenzo; Banhart, Florian; Weber, William J; Willaime, Francois; Dudarev, Sergei L; Simeone, David

2018-03-14

Atomic collision processes are fundamental to numerous advanced materials technologies such as electron microscopy, semiconductor processing and nuclear power generation. Extensive experimental and computer simulation studies over the past several decades provide the physical basis for understanding the atomic-scale processes occurring during primary displacement events. The current international standard for quantifying this energetic particle damage, the Norgett-Robinson-Torrens displacements per atom (NRT-dpa) model, has nowadays several well-known limitations. In particular, the number of radiation defects produced in energetic cascades in metals is only ~1/3 the NRT-dpa prediction, while the number of atoms involved in atomic mixing is about a factor of 30 larger than the dpa value. Here we propose two new complementary displacement production estimators (athermal recombination corrected dpa, arc-dpa) and atomic mixing (replacements per atom, rpa) functions that extend the NRT-dpa by providing more physically realistic descriptions of primary defect creation in materials and may become additional standard measures for radiation damage quantification.

Roadmap on semiconductor-cell biointerfaces

NASA Astrophysics Data System (ADS)

Tian, Bozhi; Xu, Shuai; Rogers, John A.; Cestellos-Blanco, Stefano; Yang, Peidong; Carvalho-de-Souza, João L.; Bezanilla, Francisco; Liu, Jia; Bao, Zhenan; Hjort, Martin; Cao, Yuhong; Melosh, Nicholas; Lanzani, Guglielmo; Benfenati, Fabio; Galli, Giulia; Gygi, Francois; Kautz, Rylan; Gorodetsky, Alon A.; Kim, Samuel S.; Lu, Timothy K.; Anikeeva, Polina; Cifra, Michal; Krivosudský, Ondrej; Havelka, Daniel; Jiang, Yuanwen

2018-05-01

This roadmap outlines the role semiconductor-based materials play in understanding the complex biophysical dynamics at multiple length scales, as well as the design and implementation of next-generation electronic, optoelectronic, and mechanical devices for biointerfaces. The roadmap emphasizes the advantages of semiconductor building blocks in interfacing, monitoring, and manipulating the activity of biological components, and discusses the possibility of using active semiconductor-cell interfaces for discovering new signaling processes in the biological world.

Methods for enhancing P-type doping in III-V semiconductor films

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Feng; Stringfellow, Gerald; Zhu, Junyi

2017-08-01

Methods of doping a semiconductor film are provided. The methods comprise epitaxially growing the III-V semiconductor film in the presence of a dopant, a surfactant capable of acting as an electron reservoir, and hydrogen, under conditions that promote the formation of a III-V semiconductor film doped with the p-type dopant. In some embodiments of the methods, the epitaxial growth of the doped III-V semiconductor film is initiated at a first hydrogen partial pressure which is increased to a second hydrogen partial pressure during the epitaxial growth process.

Temperature control of power semiconductor devices in traction applications

NASA Astrophysics Data System (ADS)

Pugachev, A. A.; Strekalov, N. N.

2017-02-01

The peculiarity of thermal management of traction frequency converters of a railway rolling stock is highlighted. The topology and the operation principle of the automatic temperature control system of power semiconductor modules of the traction frequency converter are designed and discussed. The features of semiconductors as an object of temperature control are considered; the equivalent circuit of thermal processes in the semiconductors is suggested, the power losses in the two-level voltage source inverters are evaluated and analyzed. The dynamic properties and characteristics of the cooling fan induction motor electric drive with the scalar control are presented. The results of simulation in Matlab are shown for the steady state of thermal processes.

Producing Silicon Carbide for Semiconductor Devices

NASA Technical Reports Server (NTRS)

Hsu, G. C.; Rohatgi, N. K.

1986-01-01

Processes proposed for production of SiC crystals for use in semiconductors operating at temperatures as high as 900 degrees C. Combination of new processes produce silicon carbide chips containing epitaxial layers. Chips of SiC first grown on porous carbon matrices, then placed in fluidized bed, where additional layer of SiC grows. Processes combined to yield complete process. Liquid crystallization process used to make SiC particles or chips for fluidized-bed process.

CMOS compatible IR sensors by cytochrome c protein

NASA Astrophysics Data System (ADS)

Liao, Chien-Jen; Su, Guo-Dung

2013-09-01

In recent years, due to the progression of the semiconductor industrial, the uncooled Infrared sensor - microbolometer has opened the opportunity for achieving low cost infrared imaging systems for both military and commercial applications. Therefore, various fabrication processes and different materials based microbolometer have been developed sequentially. The cytochrome c (protein) thin film has be reported high temperature coefficient of resistance (TCR), which is related to the performance of microbolometer directly. Hence the superior TCR value will increase the performance of microbolometer. In this paper, we introduced a novel fabrication process using aluminum which is compatible with the Taiwan Semiconductor Manufacture Company (TSMC) D35 2P4M process as the main structure material, which benefits the device to integrate with readout integrated circuit (ROIC).The aluminum split structure is suspended by sacrificial layer utilizing the standard photolithography technology and chemical etching. The height and thickness of the structure are already considered. Besides, cytochrome c solutions were ink-jetted onto the aluminum structure by using the inkjet printer, applying precise control of the Infrared absorbing layer. In measurement, incident Infrared radiation can be detected and later the heat can be transmitted to adjacent pads to readout the signal. This approach applies an inexpensive and simple fabrication process and makes the device suitable for integration. In addition, the performance can be further improved with low noise readout circuits.

Controlling Molecular Doping in Organic Semiconductors.

PubMed

Jacobs, Ian E; Moulé, Adam J

2017-11-01

The field of organic electronics thrives on the hope of enabling low-cost, solution-processed electronic devices with mechanical, optoelectronic, and chemical properties not available from inorganic semiconductors. A key to the success of these aspirations is the ability to controllably dope organic semiconductors with high spatial resolution. Here, recent progress in molecular doping of organic semiconductors is summarized, with an emphasis on solution-processed p-type doped polymeric semiconductors. Highlighted topics include how solution-processing techniques can control the distribution, diffusion, and density of dopants within the organic semiconductor, and, in turn, affect the electronic properties of the material. Research in these areas has recently intensified, thanks to advances in chemical synthesis, improved understanding of charged states in organic materials, and a focus on relating fabrication techniques to morphology. Significant disorder in these systems, along with complex interactions between doping and film morphology, is often responsible for charge trapping and low doping efficiency. However, the strong coupling between doping, solubility, and morphology can be harnessed to control crystallinity, create doping gradients, and pattern polymers. These breakthroughs suggest a role for molecular doping not only in device function but also in fabrication-applications beyond those directly analogous to inorganic doping. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Application of laser spot cutting on spring contact probe for semiconductor package inspection

NASA Astrophysics Data System (ADS)

Lee, Dongkyoung; Cho, Jungdon; Kim, Chan Ho; Lee, Seung Hwan

2017-12-01

A packaged semiconductor has to be electrically tested to make sure they are free of any manufacturing defects. The test interface, typically employed between a Printed Circuit Board and the semiconductor devices, consists of densely populated Spring Contact Probe (SCP). A standard SCP typically consists of a plunger, a barrel, and an internal spring. Among these components, plungers are manufactured by a stamping process. After stamping, plunger connecting arms need to be cut into pieces. Currently, mechanical cutting has been used. However, it may damage to the body of plungers due to the mechanical force engaged at the cutting point. Therefore, laser spot cutting is considered to solve this problem. The plunger arm is in the shape of a rectangular beam, 50 μm (H) × 90 μm (W). The plunger material used for this research is gold coated beryllium copper. Laser parameters, such as power and elapsed time, have been selected to study laser spot cutting. Laser material interaction characteristics such as a crater size, material removal zone, ablation depth, ablation threshold, and full penetration are observed. Furthermore, a carefully chosen laser parameter (Etotal = 1000mJ) to test feasibility of laser spot cutting are applied. The result show that laser spot cutting can be applied to cut SCP.

A cyano-terminated dithienyldiketopyrrolopyrrole dimer as a solution processable ambipolar semiconductor under ambient conditions.

PubMed

Wang, Li; Zhang, Xiaojie; Tian, Hongkun; Lu, Yunfeng; Geng, Yanhou; Wang, Fosong

2013-12-14

A cyano-terminated dimer of dithienyldiketopyrrolopyrrole (TDPP), DPP2-CN, is a solution processable ambipolar semiconductor with field-effect hole and electron mobilities of 0.066 and 0.033 cm(2) V(-1) s(-1), respectively, under ambient conditions.

A hybrid life cycle inventory of nano-scale semiconductor manufacturing.

PubMed

Krishnan, Nikhil; Boyd, Sarah; Somani, Ajay; Raoux, Sebastien; Clark, Daniel; Dornfeld, David

2008-04-15

The manufacturing of modern semiconductor devices involves a complex set of nanoscale fabrication processes that are energy and resource intensive, and generate significant waste. It is important to understand and reduce the environmental impacts of semiconductor manufacturing because these devices are ubiquitous components in electronics. Furthermore, the fabrication processes used in the semiconductor industry are finding increasing application in other products, such as microelectromechanical systems (MEMS), flat panel displays, and photovoltaics. In this work we develop a library of typical gate-to-gate materials and energy requirements, as well as emissions associated with a complete set of fabrication process models used in manufacturing a modern microprocessor. In addition, we evaluate upstream energy requirements associated with chemicals and materials using both existing process life cycle assessment (LCA) databases and an economic input-output (EIO) model. The result is a comprehensive data set and methodology that may be used to estimate and improve the environmental performance of a broad range of electronics and other emerging applications that involve nano and micro fabrication.

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

NASA Technical Reports Server (NTRS)

Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

1979-01-01

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

The AMOS cell - An improved metal-semiconductor solar cell. [Antireflection coated Metal Oxide Semiconductor

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y.-C. M.

1975-01-01

A new fabrication process is being developed which significantly improves the efficiency of metal-semiconductor solar cells. The resultant effect, a marked increase in the open-circuit voltage, is produced by the addition of an interfacial layer oxide on the semiconductor. Cells using gold on n-type gallium arsenide have been made in small areas (0.17 sq cm) with conversion efficiencies of 15% in terrestrial sunlight.

Current–Voltage Characterization of Individual As-Grown Nanowires Using a Scanning Tunneling Microscope

PubMed Central

2013-01-01

Utilizing semiconductor nanowires for (opto)electronics requires exact knowledge of their current–voltage properties. We report accurate on-top imaging and I–V characterization of individual as-grown nanowires, using a subnanometer resolution scanning tunneling microscope with no need for additional microscopy tools, thus allowing versatile application. We form Ohmic contacts to InP and InAs nanowires without any sample processing, followed by quantitative measurements of diameter dependent I–V properties with a very small spread in measured values compared to standard techniques. PMID:24059470

A Thermally Activated Solid State Reaction Process for Fabricating Ohmic Contacts to Semiconducting Diamond

DTIC Science & Technology

1990-09-01

due to Ken Regan. Dr. Howard Rast, Dr. Carl Zeisse, Maureen O * Brien , Dr. Don Mullin, Richard Nguyen, Paul Thibado. Dr. Charlesý Kewett, and Dr. Alan...Standard form 298 (FRONT) 1!NCL-ASSIFIED 21a. NAME OF RESPONS’OLL NOWVfOUAý J. R. Zeidler 69)55" 1 - I~ C( 7 ci) NMH 7540-01 .2$ O -8600 SIA,~afre tO~m...boron nitride could extend the operating temperature of devices to temperatures in excess of 1000*C. TABLE I. Selected properties of semiconductors

Current-voltage characterization of individual as-grown nanowires using a scanning tunneling microscope.

PubMed

Timm, Rainer; Persson, Olof; Engberg, David L J; Fian, Alexander; Webb, James L; Wallentin, Jesper; Jönsson, Andreas; Borgström, Magnus T; Samuelson, Lars; Mikkelsen, Anders

2013-11-13

Utilizing semiconductor nanowires for (opto)electronics requires exact knowledge of their current-voltage properties. We report accurate on-top imaging and I-V characterization of individual as-grown nanowires, using a subnanometer resolution scanning tunneling microscope with no need for additional microscopy tools, thus allowing versatile application. We form Ohmic contacts to InP and InAs nanowires without any sample processing, followed by quantitative measurements of diameter dependent I-V properties with a very small spread in measured values compared to standard techniques.

Cryogenic transimpedance amplifier for micromechanical capacitive sensors.

PubMed

Antonio, D; Pastoriza, H; Julián, P; Mandolesi, P

2008-08-01

We developed a cryogenic transimpedance amplifier that works at a broad range of temperatures, from room temperature down to 4 K. The device was realized with a standard complementary metal oxide semiconductor 1.5 mum process. Measurements of current-voltage characteristics, open-loop gain, input referred noise current, and power consumption are presented as a function of temperature. The transimpedance amplifier has been successfully applied to sense the motion of a polysilicon micromechanical oscillator at low temperatures. The whole device is intended to serve as a magnetometer for microscopic superconducting samples.

40 CFR 63.7191 - What records must I keep?

Code of Federal Regulations, 2011 CFR

2011-07-01

... Section 63.7191 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL EMISSION STANDARDS FOR HAZARDOUS AIR POLLUTANTS FOR SOURCE CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing Applications...

Support apparatus for semiconductor wafer processing

DOEpatents

Griffiths, Stewart K.; Nilson, Robert H.; Torres, Kenneth J.

2003-06-10

A support apparatus for minimizing gravitational stress in semiconductor wafers, and particularly silicon wafers, during thermal processing. The support apparatus comprises two concentric circular support structures disposed on a common support fixture. The two concentric circular support structures, located generally at between 10 and 70% and 70 and 100% and preferably at 35 and 82.3% of the semiconductor wafer radius, can be either solid rings or a plurality of spaced support points spaced apart from each other in a substantially uniform manner. Further, the support structures can have segments removed to facilitate wafer loading and unloading. In order to withstand the elevated temperatures encountered during semiconductor wafer processing, the support apparatus, including the concentric circular support structures and support fixture can be fabricated from refractory materials, such as silicon carbide, quartz and graphite. The claimed wafer support apparatus can be readily adapted for use in either batch or single-wafer processors.

A novel approach for the fabrication of all-inorganic nanocrystal solids: Semiconductor matrix encapsulated nanocrystal arrays

NASA Astrophysics Data System (ADS)

Moroz, Pavel

Growing fossil fuels consumption compels researchers to find new alternative pathways to produce energy. Along with new materials for the conversion of different types of energy into electricity innovative methods for efficient processing of energy sources are also introduced. The main criteria for the success of such materials and methods are the low cost and compelling performance. Among different types of materials semiconductor nanocrystals are considered as promising candidates for the role of the efficient and cheap absorbers for solar energy applications. In addition to the anticipated cost reduction, the integration of nanocrystals (NC) into device architectures is inspired by the possibility of tuning the energy of electrical charges in NCs via nanoparticle size. However, the stability of nanocrystals in photovoltaic devices is limited by the stability of organic ligands which passivate the surface of semiconductors to preserve quantum confinement. The present work introduces a new strategy for low-temperature processing of colloidal nanocrystals into all-inorganic films: semiconductor matrix encapsulated nanocrystal arrays (SMENA). This methodology goes beyond the traditional ligand-interlinking scheme and relies on the encapsulation of morphologically-defined nanocrystal arrays into a matrix of a wide-band gap semiconductor, which preserves optoelectronic properties of individual nanoparticles. Fabricated solids exhibit excellent thermal stability, which is attributed to the heteroepitaxial structure of nanocrystal-matrix interfaces. The main characteristics and properties of these solids were investigated and compared with ones of traditionally fabricated nanocrystal films using standard spectroscopic, optoelectronic and electronic techniques. As a proof of concept, we. We also characterized electron transport phenomena in different types of nanocrystal films using all-optical approach. By measuring excited carrier lifetimes in either ligand-linked or matrix-encapsulated PbS nanocrystal films containing a tunable fraction of insulating ZnS domains, we uniquely distinguish the dynamics of charge scattering on defects from other processes of exciton dissociation. The measured times are subsequently used to estimate the diffusion length and the carrier mobility for each film type within hopping transport regime. It is demonstrated that nanocrystal films encapsulated into semiconductor matrices exhibit a lower probability of charge scattering than nanocrystal solids cross-linked with either 3-mercaptopropionic acid or 1,2-ethanedithiol molecular linkers. The suppression of carrier scattering in matrix-encapsulated nanocrystal films is attributed to a relatively low density of surface defects at nanocrystal/matrix interfaces. High stability and low density of defects made it possible to fabricate infrared-emitting nanocrystal solids. Presently, an important challenge facing the development of nanocrystal infrared emitters concerns the fact that both the emission quantum yield and the stability of colloidal nanoparticles become compromised when nanoparticle solutions are processed into solids. Here, we address this issue by developing an assembly technique that encapsulates infrared-emitting PbS NCs into crystalline CdS matrices, designed to preserve NC emission characteristics upon film processing. Here, the morphology of these matrices was designed to suppress the nonradiative carrier decay, whereby increasing the exciton lifetime up to 1 mus, and boosting the emission quantum yield to an unprecedented 3.7% for inorganically encapsulated PbS NC solids.

Reticle writer for next-generation SEMI mask standard: mask handling and exposure

NASA Astrophysics Data System (ADS)

Ehrlich, Christian

1998-12-01

The world semiconductor industry is currently preparing itself for the next evolutionary step in the ongoing development of the integrated circuit, characterized by the 0.18 to 0.15 micrometer technology. The already complex engineering task for the mask tool makers is furthermore complicated by the introduction of the new SEMI reticle standard with a 230 mm by 230 mm large and 9 mm thick quartz glass blank that will have a weight of more than one kilogram. The production of these advanced masks is already identified as a key enabling technology which will stretch the capabilities of the manufacturing process, and its equipment, to the limit. The mask making e-beam system Leica ZBA320, capable of exposing a 230 mm reticle and featuring the variable shaped beam approach with a 20 kV accelerating voltage has been introduced recently. Now the first results of e-beam exposures with this new type of mask writer are presented. Enhancements form the previous generation system include improved deflection systems, stage metrology, pattern data handling, and an address grid down to 10 nanometers. This system's specified performance enables it to produce reticles designed to support semiconductor fabrication utilizing 180 nanometer design rules, and beyond, with high accuracy and productivity.

Wireless Low-Power Integrated Basal-Body-Temperature Detection Systems Using Teeth Antennas in the MedRadio Band.

PubMed

Yang, Chin-Lung; Zheng, Gou-Tsun

2015-11-20

This study proposes using wireless low power thermal sensors for basal-body-temperature detection using frequency modulated telemetry devices. A long-term monitoring sensor requires low-power circuits including a sampling circuit and oscillator. Moreover, temperature compensated technologies are necessary because the modulated frequency might have additional frequency deviations caused by the varying temperature. The temperature compensated oscillator is composed of a ring oscillator and a controlled-steering current source with temperature compensation, so the output frequency of the oscillator does not drift with temperature variations. The chip is fabricated in a standard Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-μm complementary metal oxide semiconductor (CMOS) process, and the chip area is 0.9 mm². The power consumption of the sampling amplifier is 128 µW. The power consumption of the voltage controlled oscillator (VCO) core is less than 40 µW, and the output is -3.04 dBm with a buffer stage. The output voltage of the bandgap reference circuit is 1 V. For temperature measurements, the maximum error is 0.18 °C with a standard deviation of ±0.061 °C, which is superior to the required specification of 0.1 °C.

Design and evaluation of basic standard encryption algorithm modules using nanosized complementary metal oxide semiconductor molecular circuits

NASA Astrophysics Data System (ADS)

Masoumi, Massoud; Raissi, Farshid; Ahmadian, Mahmoud; Keshavarzi, Parviz

2006-01-01

We are proposing that the recently proposed semiconductor-nanowire-molecular architecture (CMOL) is an optimum platform to realize encryption algorithms. The basic modules for the advanced encryption standard algorithm (Rijndael) have been designed using CMOL architecture. The performance of this design has been evaluated with respect to chip area and speed. It is observed that CMOL provides considerable improvement over implementation with regular CMOS architecture even with a 20% defect rate. Pseudo-optimum gate placement and routing are provided for Rijndael building blocks and the possibility of designing high speed, attack tolerant and long key encryptions are discussed.

Screenable contact structure and method for semiconductor devices

DOEpatents

Ross, Bernd

1980-08-26

An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.

High-temperature electronics

NASA Technical Reports Server (NTRS)

Seng, Gary T.

1987-01-01

In recent years, there was a growing need for electronics capable of sustained high-temperature operation for aerospace propulsion system instrumentation, control and condition monitoring, and integrated sensors. The desired operating temperature in some applications exceeds 600 C, which is well beyond the capability of currently available semiconductor devices. Silicon carbide displays a number of properties which make it very attractive as a semiconductor material, one of which is the ability to retain its electronic integrity at temperatures well above 600 C. An IR-100 award was presented to NASA Lewis in 1983 for developing a chemical vapor deposition process to grow single crystals of this material on standard silicon wafers. Silicon carbide devices were demonstrated above 400 C, but much work remains in the areas of crystal growth, characterization, and device fabrication before the full potential of silicon carbide can be realized. The presentation will conclude with current and future high-temperature electronics program plans. Although the development of silicon carbide falls into the category of high-risk research, the future looks promising, and the potential payoffs are tremendous.

Quantum theory of the electronic and optical properties of low-dimensional semiconductor systems

NASA Astrophysics Data System (ADS)

Lau, Wayne Heung

This thesis examines the electronic and optical properties of low-dimensional semiconductor systems. A theory is developed to study the electron-hole generation-recombination process of type-II semimetallic semiconductor heterojunctions based on a 3 x 3 k·p matrix Hamiltonian (three-band model) and an 8 x 8 k·p matrix Hamiltonian (eight-band model). A novel electron-hole generation and recombination process, which is called activationless generation-recombination process, is predicted. It is demonstrated that the current through the type-II semimetallic semiconductor heterojunctions is governed by the activationless electron-hole generation-recombination process at the heterointerfaces, and that the current-voltage characteristics are essentially linear. A qualitative agreement between theory and experiments is observed. The numerical results of the eight-band model are compared with those of the threeband model. Based on a lattice gas model, a theory is developed to study the influence of a random potential on the ionization equilibrium conditions for bound electron-hole pairs (excitons) in III--V semiconductor heterostructures. It is demonstrated that ionization equilibrium conditions for bound electron-hole pairs change drastically in the presence of strong disorder. It is predicted that strong disorder promotes dissociation of excitons in III--V semiconductor heterostructures. A theory of polariton (photon dressed by phonon) spontaneous emission in a III--V semiconductor doped with semiconductor quantum dots (QDs) or quantum wells (QWs) is developed. For the first time, superradiant and subradiant polariton spontaneous emission phenomena in a polariton-QD (QW) coupled system are predicted when the resonance energies of the two identical QDs (QWs) lie outside the polaritonic energy gap. It is also predicted that when the resonance energies of the two identical QDs (QWs) lie inside the polaritonic energy gap, spontaneous emission of polariton in the polariton-QD (QW) coupled system is inhibited and polariton bound states are formed within the polaritonic energy gap. A theory is also developed to study the polariton eigenenergy spectrum, polariton effective mass, and polariton spectral density of N identical semiconductor QDs (QWs) or a superlattice (SL) placed inside a III--V semiconductor. A polariton-impurity band lying within the polaritonic energy gap of the III--V semiconductor is predicted when the resonance energies of the QDs (QWs) lie inside the polaritonic energy gap. Hole-like polariton effective mass of the polariton-impurity band is predicted. It is also predicted that the spectral density of the polariton has a Lorentzian shape if the resonance energies of the QDs (QWs) lie outside the polaritonic gap.

Electron-phonon interaction, transport and ultrafast processes in semiconductor microstructures

NASA Astrophysics Data System (ADS)

Sarma, Sankar D.

1992-08-01

We have fulfilled our contract obligations completely by doing theoretical research on electron-phonon interaction and transport properties in submicron semiconductor structures with the emphasis on ultrafast processes and many-body effects. Fifty-five papers have been published based on our research during the contract period.

Centro-Apical Self-Organization of Organic Semiconductors in a Line-Printed Organic Semiconductor: Polymer Blend for One-Step Printing Fabrication of Organic Field-Effect Transistors

PubMed Central

Jin Lee, Su; Kim, Yong-Jae; Young Yeo, So; Lee, Eunji; Sun Lim, Ho; Kim, Min; Song, Yong-Won; Cho, Jinhan; Ah Lim, Jung

2015-01-01

Here we report the first demonstration for centro-apical self-organization of organic semiconductors in a line-printed organic semiconductor: polymer blend. Key feature of this work is that organic semiconductor molecules were vertically segregated on top of the polymer phase and simultaneously crystallized at the center of the printed line pattern after solvent evaporation without an additive process. The thickness and width of the centro-apically segregated organic semiconductor crystalline stripe in the printed blend pattern were controlled by varying the relative content of the organic semiconductors, printing speed, and solution concentrations. The centro-apical self-organization of organic semiconductor molecules in a printed polymer blend may be attributed to the combination of an energetically favorable vertical phase-separation and hydrodynamic fluids inside the droplet during solvent evaporation. Finally, a centro-apically phase-separated bilayer structure of organic semiconductor: polymer blend was successfully demonstrated as a facile method to form the semiconductor and dielectric layer for OFETs in one- step. PMID:26359068

Centro-Apical Self-Organization of Organic Semiconductors in a Line-Printed Organic Semiconductor: Polymer Blend for One-Step Printing Fabrication of Organic Field-Effect Transistors.

PubMed

Lee, Su Jin; Kim, Yong-Jae; Yeo, So Young; Lee, Eunji; Lim, Ho Sun; Kim, Min; Song, Yong-Won; Cho, Jinhan; Lim, Jung Ah

2015-09-11

Here we report the first demonstration for centro-apical self-organization of organic semiconductors in a line-printed organic semiconductor: polymer blend. Key feature of this work is that organic semiconductor molecules were vertically segregated on top of the polymer phase and simultaneously crystallized at the center of the printed line pattern after solvent evaporation without an additive process. The thickness and width of the centro-apically segregated organic semiconductor crystalline stripe in the printed blend pattern were controlled by varying the relative content of the organic semiconductors, printing speed, and solution concentrations. The centro-apical self-organization of organic semiconductor molecules in a printed polymer blend may be attributed to the combination of an energetically favorable vertical phase-separation and hydrodynamic fluids inside the droplet during solvent evaporation. Finally, a centro-apically phase-separated bilayer structure of organic semiconductor: polymer blend was successfully demonstrated as a facile method to form the semiconductor and dielectric layer for OFETs in one- step.

Regulation of occupational health and safety in the semiconductor industry: enforcement problems and solutions.

PubMed

Watterson, Andrew

2006-01-01

Reports of high incidences of occupational illnesses in the semiconductor industry should have triggered global investigations and rigorous inspection of the industry. Yet semiconductor plants remain essentially unregulated. Health and safety standards are inadequate and enforcement is lax. Roles for stakeholders in laying down good practice, monitoring, and regulating are proposed, and obstacles are described. Effective regulation has advantages for the industry as well as workers. Conditions for best practice include education at all levels, protection and support for labor inspectors, government commitment to enforcing laws, recognition of the right of workers to organize, and recognition of their rights.

Cascadable all-optical inverter based on a nonlinear vertical-cavity semiconductor optical amplifier.

PubMed

Zhang, Haijiang; Wen, Pengyue; Esener, Sadik

2007-07-01

We report, for the first time to our knowledge, the operation of a cascadable, low-optical-switching-power(~10 microW) small-area (~100 microm(2)) high-speed (80 ps fall time) all-optical inverter. This inverter employs cross-gain modulation, polarization gain anisotropy, and highly nonlinear gain characteristics of an electrically pumped vertical-cavity semiconductor optical amplifier (VCSOA). The measured transfer characteristics of such an optical inverter resemble those of standard electronic metal-oxide semiconductor field-effect transistor-based inverters exhibiting high noise margin and high extinction ratio (~9.3 dB), making VCSOAs an ideal building block for all-optical logic and memory.

Electrical characterization of organic thin film transistors and alternative device architectures

NASA Astrophysics Data System (ADS)

Newman, Christopher R.

In the last 10--15 years, organic semiconductors have evolved from experimental curiosities into viable alternatives for practical applications involving large-area and low-cost electronics such as display backplanes, electronic paper, radio frequency identification (RFID) tags, and solar cells. Many of the initially-stated goals in this field have been achieved; organic semconductors have demonstrated performance comparable to or greater than amorphous silicon (a-Si), the entrenched technology for most of the applications listed above. At present, the major obstacles remaining to commercialization of devices based on organic semiconductors involve material stability, processing considerations and optimization of the other device components (e.g. metal contacts and dielectric materials). Despite these technical achievements, significant gaps remain in our understanding of the underlying transport physics in these devices. This thesis summarizes experiments performed on organic field-effect transistors (OFETs) in an attempt to address some of these knowledge gaps. The FET, in addition to being a very useful device for practical applications (such as the driving elements in pixel backplanes), is also a very flexible architecture from an experimental standpoint. The presence of a capacitively-coupled gate electrode allows the investigation of transport physics as a function of carrier concentration. For devices in which non-idealities (i.e. carrier traps) largely dictate the observed characteristics, this is a very useful feature. Although practical OFETs are fabricated as conventional single-gate structures on an organic thin film (OTFTs), more exotic structures can often provide insights that standard OTFTs cannot. Specifically, single-crystal OFETs allow the investigation of carrier transport in the absence of grain boundaries, and double-gated OTFTs facilitate the investigation and comparison of properties across two discrete interfaces. One of the remaining challenges in terms of achieving stability inorganic semiconductors involves understanding, and hopefully minimizing, the bias stress effect of operating OTFTs. Largely ignored during the years in which research groups sought to optimize the standard device metrics of field-effect mobility, current on/off ratio, and threshold voltage, operational stability is emerging as a dominant consideration in these materials. Experiments performed with the goal of quantifying and understanding the bias-stress effect in organic semiconductors are described at the end of this thesis.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

European roadmap on superconductive electronics - status and perspectives

NASA Astrophysics Data System (ADS)

Anders, S.; Blamire, M. G.; Buchholz, F.-Im.; Crété, D.-G.; Cristiano, R.; Febvre, P.; Fritzsch, L.; Herr, A.; Il'ichev, E.; Kohlmann, J.; Kunert, J.; Meyer, H.-G.; Niemeyer, J.; Ortlepp, T.; Rogalla, H.; Schurig, T.; Siegel, M.; Stolz, R.; Tarte, E.; ter Brake, H. J. M.; Toepfer, H.; Villegier, J.-C.; Zagoskin, A. M.; Zorin, A. B.

2010-12-01

Executive SummaryFor four decades semiconductor electronics has followed Moore’s law: with each generation of integration the circuit features became smaller, more complex and faster. This development is now reaching a wall so that smaller is no longer any faster. The clock rate has saturated at about 3-5 GHz and the parallel processor approach will soon reach its limit. The prime reason for the limitation the semiconductor electronics experiences is not the switching speed of the individual transistor, but its power dissipation and thus heat. Digital superconductive electronics is a circuit- and device-technology that is inherently faster at much less power dissipation than semiconductor electronics. It makes use of superconductors and Josephson junctions as circuit elements, which can provide extremely fast digital devices in a frequency range - dependent on the material - of hundreds of GHz: for example a flip-flop has been demonstrated that operated at 750 GHz. This digital technique is scalable and follows similar design rules as semiconductor devices. Its very low power dissipation of only 0.1 μW per gate at 100 GHz opens the possibility of three-dimensional integration. Circuits like microprocessors and analogue-to-digital converters for commercial and military applications have been demonstrated. In contrast to semiconductor circuits, the operation of superconducting circuits is based on naturally standardized digital pulses the area of which is exactly the flux quantum Φ0. The flux quantum is also the natural quantization unit for digital-to-analogue and analogue-to-digital converters. The latter application is so precise, that it is being used as voltage standard and that the physical unit ‘Volt’ is defined by means of this standard. Apart from its outstanding features for digital electronics, superconductive electronics provides also the most sensitive sensor for magnetic fields: the Superconducting Quantum Interference Device (SQUID). Amongst many other applications SQUIDs are used as sensors for magnetic heart and brain signals in medical applications, as sensor for geological surveying and food-processing and for non-destructive testing. As amplifiers of electrical signals, SQUIDs can nearly reach the theoretical limit given by Quantum Mechanics. A further important field of application is the detection of very weak signals by ‘transition-edge’ bolometers, superconducting nanowire single-photon detectors, and superconductive tunnel junctions. Their application as radiation detectors in a wide frequency range, from microwaves to X-rays is now standard. The very low losses of superconductors have led to commercial microwave filter designs that are now widely used in the USA in base stations for cellular phones and in military communication applications. The number of demonstrated applications is continuously increasing and there is no area in professional electronics, in which superconductive electronics cannot be applied and surpasses the performance of classical devices. Superconductive electronics has to be cooled to very low temperatures. Whereas this was a bottleneck in the past, cooling techniques have made a huge step forward in recent years: very compact systems with high reliability and a wide range of cooling power are available commercially, from microcoolers of match-box size with milli-Watt cooling power to high-reliability coolers of many Watts of cooling power for satellite applications. Superconductive electronics will not replace semiconductor electronics and similar room-temperature techniques in standard applications, but for those applications which require very high speed, low-power consumption, extreme sensitivity or extremely high precision, superconductive electronics is superior to all other available techniques. To strengthen the European competitiveness in superconductor electronics research projects have to be set-up in the following field: Ultra-sensitive sensing and imaging. Quantum measurement instrumentation. Advanced analogue-to-digital converters. Superconductive electronics technology.

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE PAGES

Wang, Lei; Yan, Danhua; Shaffer, David W.; ...

2017-12-27

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Lei; Yan, Danhua; Shaffer, David W.

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

2008-11-01

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

Rapid Thermal Processing (RTP) of semiconductors in space

NASA Technical Reports Server (NTRS)

Anderson, T. J.; Jones, K. S.

1993-01-01

The progress achieved on the project entitled 'Rapid Thermal Processing of Semiconductors in Space' for a 12 month period of activity ending March 31, 1993 is summarized. The activity of this group is being performed under the direct auspices of the ROMPS program. The main objective of this program is to develop and demonstrate the use of advanced robotics in space with rapid thermal process (RTP) of semiconductors providing the test technology. Rapid thermal processing is an ideal processing step for demonstration purposes since it encompasses many of the characteristics of other processes used in solid state device manufacturing. Furthermore, a low thermal budget is becoming more important in existing manufacturing practice, while a low thermal budget is critical to successful processing in space. A secondary objective of this project is to determine the influence of microgravity on the rapid thermal process for a variety of operating modes. In many instances, this involves one or more fluid phases. The advancement of microgravity processing science is an important ancillary objective.

Low temperature junction growth using hot-wire chemical vapor deposition

DOEpatents

Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa

2014-02-04

A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.

Semiconductors: In Situ Processing of Photovoltaic Devices

NASA Technical Reports Server (NTRS)

Curreri, Peter A.

1998-01-01

The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.

Patterned arrays of lateral heterojunctions within monolayer two-dimensional semiconductors

DOE PAGES

Mahjouri-Samani, Masoud; Lin, Ming-Wei; Wang, Kai; ...

2015-07-22

The formation of semiconductor heterojunctions and their high density integration are foundations of modern electronics and optoelectronics. To enable two-dimensional (2D) crystalline semiconductors as building blocks in next generation electronics, developing methods to deterministically form lateral heterojunctions is crucial. Here we demonstrate a process strategy for the formation of lithographically-patterned lateral semiconducting heterojunctions within a single 2D crystal. E-beam lithography is used to pattern MoSe 2 monolayer crystals with SiO 2, and the exposed locations are selectively and totally converted to MoS 2 using pulsed laser deposition (PLD) of sulfur in order to form MoSe 2/MoS 2 heterojunctions in predefinedmore » patterns. The junctions and conversion process are characterized by atomically resolved scanning transmission electron microscopy, photoluminescence, and Raman spectroscopy. This demonstration of lateral semiconductor heterojunction arrays within a single 2D crystal is an essential step for the lateral integration of 2D semiconductor building blocks with different electronic and optoelectronic properties for high-density, ultrathin circuitry.« less

Characterization and Modeling Analysis for Metal-Semiconductor-Metal GaAs Diodes with Pd/SiO2 Mixture Electrode

PubMed Central

Tan, Shih-Wei; Lai, Shih-Wen

2012-01-01

Characterization and modeling of metal-semiconductor-metal (MSM) GaAs diodes using to evaporate SiO2 and Pd simultaneously as a mixture electrode (called M-MSM diodes) compared with similar to evaporate Pd as the electrode (called Pd-MSM diodes) were reported. The barrier height (φ b) and the Richardson constant (A*) were carried out for the thermionic-emission process to describe well the current transport for Pd-MSM diodes in the consideration of the carrier over the metal-semiconductor barrier. In addition, in the consideration of the carrier over both the metal-semiconductor barrier and the insulator-semiconductor barrier simultaneously, thus the thermionic-emission process can be used to describe well the current transport for M-MSM diodes. Furthermore, in the higher applied voltage, the carrier recombination will be taken into discussion. Besides, a composite-current (CC) model is developed to evidence the concepts. Our calculated results are in good agreement with the experimental ones. PMID:23226352

Flat-plate solar array project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

NASA Technical Reports Server (NTRS)

1983-01-01

The process technology for the manufacture of semiconductor-grade silicon in a large commercial plant by 1986, at a price less than $14 per kilogram of silicon based on 1975 dollars is discussed. The engineering design, installation, checkout, and operation of an Experimental Process System Development unit was discussed. Quality control of scaling-up the process and an economic analysis of product and production costs are discussed.

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Electronic Raman Scattering as an Ultra-Sensitive Probe of Strain Effects in Semiconductors

NASA Astrophysics Data System (ADS)

Mascarenhas, Angelo; Fluegel, Brian; Beaton, Dan

Semiconductor strain engineering has become a critical feature of high-performance electronics due to the significant device performance enhancements it enables. These improvements that emerge from strain induced modifications to the electronic band structure necessitate new ultra-sensitive tools for probing strain in semiconductors. Using electronic Raman scattering, we recently showed that it is possible to measure minute amounts of strain in thin semiconductor epilayers. We applied this strain measurement technique to two different semiconductor alloy systems, using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10-4. Comparing our strain sensitivity and signal strength in AlxGa1-xAs with those obtained using the industry-standard technique of phonon Raman scattering we found a sensitivity improvement of ×200, and a signal enhancement of 4 ×103 thus obviating key constraints in semiconductor strain metrology. The sensitivity of this approach rivals that of contemporary techniques and opens up a new realm for optically probing strain effects on electronic band structure. We acknowledge the financial support of the DOE Office of Science, BES under DE-AC36-80GO28308.

Ion traps fabricated in a CMOS foundry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mehta, K. K.; Ram, R. J.; Eltony, A. M.

2014-07-28

We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size.more » This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.« less

Design and test of data acquisition systems for the Medipix2 chip based on PC standard interfaces

NASA Astrophysics Data System (ADS)

Fanti, Viviana; Marzeddu, Roberto; Piredda, Giuseppina; Randaccio, Paolo

2005-07-01

We describe two readout systems for hybrid detectors using the Medipix2 single photon counting chip, developed within the Medipix Collaboration. The Medipix2 chip (256×256 pixels, 55 μm pitch) has an active area of about 2 cm 2 and is bump-bonded to a pixel semiconductor array of silicon or other semiconductor material. The readout systems we are developing are based on two widespread standard PC interfaces: parallel port and USB (Universal Serial Bus) version 1.1. The parallel port is the simplest PC interface even if slow and the USB is a serial bus interface present nowadays on all PCs and offering good performances.

Temperature dependence of Coulomb oscillations in a few-layer two-dimensional WS2 quantum dot.

PubMed

Song, Xiang-Xiang; Zhang, Zhuo-Zhi; You, Jie; Liu, Di; Li, Hai-Ou; Cao, Gang; Xiao, Ming; Guo, Guo-Ping

2015-11-05

Standard semiconductor fabrication techniques are used to fabricate a quantum dot (QD) made of WS2, where Coulomb oscillations were found. The full-width-at-half-maximum of the Coulomb peaks increases linearly with temperature while the height of the peaks remains almost independent of temperature, which is consistent with standard semiconductor QD theory. Unlike graphene etched QDs, where Coulomb peaks belonging to the same QD can have different temperature dependences, these results indicate the absence of the disordered confining potential. This difference in the potential-forming mechanism between graphene etched QDs and WS2 QDs may be the reason for the larger potential fluctuation found in graphene QDs.

Temperature dependence of Coulomb oscillations in a few-layer two-dimensional WS2 quantum dot

PubMed Central

Song, Xiang-Xiang; Zhang, Zhuo-Zhi; You, Jie; Liu, Di; Li, Hai-Ou; Cao, Gang; Xiao, Ming; Guo, Guo-Ping

2015-01-01

Standard semiconductor fabrication techniques are used to fabricate a quantum dot (QD) made of WS2, where Coulomb oscillations were found. The full-width-at-half-maximum of the Coulomb peaks increases linearly with temperature while the height of the peaks remains almost independent of temperature, which is consistent with standard semiconductor QD theory. Unlike graphene etched QDs, where Coulomb peaks belonging to the same QD can have different temperature dependences, these results indicate the absence of the disordered confining potential. This difference in the potential-forming mechanism between graphene etched QDs and WS2 QDs may be the reason for the larger potential fluctuation found in graphene QDs. PMID:26538164

40 CFR 63.7189 - What applications and notifications must I submit and when?

Code of Federal Regulations, 2011 CFR

2011-07-01

... AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL EMISSION STANDARDS FOR HAZARDOUS AIR POLLUTANTS FOR SOURCE CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing Applications, Notifications, Reports, and Records § 63.7189 What applications and notifications...

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nam, Chang-Yong; Stein, Aaron

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE PAGES

Nam, Chang-Yong; Stein, Aaron

2017-11-15

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Plasma Deposited SiO2 for Planar Self-Aligned Gate Metal-Insulator-Semiconductor Field Effect Transistors on Semi-Insulating InP

NASA Technical Reports Server (NTRS)

Tabory, Charles N.; Young, Paul G.; Smith, Edwyn D.; Alterovitz, Samuel A.

1994-01-01

Metal-insulator-semiconductor (MIS) field effect transistors were fabricated on InP substrates using a planar self-aligned gate process. A 700-1000 A gate insulator of Si02 doped with phosphorus was deposited by a direct plasma enhanced chemical vapor deposition at 400 mTorr, 275 C, 5 W, and power density of 8.5 MW/sq cm. High frequency capacitance-voltage measurements were taken on MIS capacitors which have been subjected to a 700 C anneal and an interface state density of lxl0(exp 11)/eV/cq cm was found. Current-voltage measurements of the capacitors show a breakdown voltage of 107 V/cm and a insulator resistivity of 10(exp 14) omega cm. Transistors were fabricated on semi-insulating InP using a standard planar self-aligned gate process in which the gate insulator was subjected to an ion implantation activation anneal of 700 C. MIS field effect transistors gave a maximum extrinsic transconductance of 23 mS/mm for a gate length of 3 microns. The drain current drift saturated at 87.5% of the initial current, while reaching to within 1% of the saturated value after only 1x10(exp 3). This is the first reported viable planar InP self-aligned gate transistor process reported to date.

Binary CMOS image sensor with a gate/body-tied MOSFET-type photodetector for high-speed operation

NASA Astrophysics Data System (ADS)

Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Kim, Sang-Hwan; Shin, Jang-Kyoo

2016-05-01

In this paper, a binary complementary metal oxide semiconductor (CMOS) image sensor with a gate/body-tied (GBT) metal oxide semiconductor field effect transistor (MOSFET)-type photodetector is presented. The sensitivity of the GBT MOSFET-type photodetector, which was fabricated using the standard CMOS 0.35-μm process, is higher than the sensitivity of the p-n junction photodiode, because the output signal of the photodetector is amplified by the MOSFET. A binary image sensor becomes more efficient when using this photodetector. Lower power consumptions and higher speeds of operation are possible, compared to the conventional image sensors using multi-bit analog to digital converters (ADCs). The frame rate of the proposed image sensor is over 2000 frames per second, which is higher than those of the conventional CMOS image sensors. The output signal of an active pixel sensor is applied to a comparator and compared with a reference level. The 1-bit output data of the binary process is determined by this level. To obtain a video signal, the 1-bit output data is stored in the memory and is read out by horizontal scanning. The proposed chip is composed of a GBT pixel array (144 × 100), binary-process circuit, vertical scanner, horizontal scanner, and readout circuit. The operation mode can be selected from between binary mode and multi-bit mode.

Concept Maps as Expressions of Teachers' Meaning-Making While Beginning to Teach Semiconductors

ERIC Educational Resources Information Center

Rollnick, Marissa; Mundalamo, Fhatuwani; Booth, Shirley

2013-01-01

The challenge of teaching new subject matter is a familiar one for most teachers. This paper investigates the content knowledge gains made by seven teachers as they learn to teach the topic of semiconductors through a process of self-study. "Semiconductors" is a new topic in the curriculum which looks at the sub-microscopic properties of…

Self-cleaning and surface chemical reactions during hafnium dioxide atomic layer deposition on indium arsenide.

PubMed

Timm, Rainer; Head, Ashley R; Yngman, Sofie; Knutsson, Johan V; Hjort, Martin; McKibbin, Sarah R; Troian, Andrea; Persson, Olof; Urpelainen, Samuli; Knudsen, Jan; Schnadt, Joachim; Mikkelsen, Anders

2018-04-12

Atomic layer deposition (ALD) enables the ultrathin high-quality oxide layers that are central to all modern metal-oxide-semiconductor circuits. Crucial to achieving superior device performance are the chemical reactions during the first deposition cycle, which could ultimately result in atomic-scale perfection of the semiconductor-oxide interface. Here, we directly observe the chemical reactions at the surface during the first cycle of hafnium dioxide deposition on indium arsenide under realistic synthesis conditions using photoelectron spectroscopy. We find that the widely used ligand exchange model of the ALD process for the removal of native oxide on the semiconductor and the simultaneous formation of the first hafnium dioxide layer must be significantly revised. Our study provides substantial evidence that the efficiency of the self-cleaning process and the quality of the resulting semiconductor-oxide interface can be controlled by the molecular adsorption process of the ALD precursors, rather than the subsequent oxide formation.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1996-07-16

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1995-11-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1993-09-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Space processing of crystalline materials: A study of known methods of electrical characterization of semiconductors

NASA Technical Reports Server (NTRS)

Castle, J. G.

1976-01-01

A literature survey is presented covering nondestructive methods of electrical characterization of semiconductors. A synopsis of each technique deals with the applicability of the techniques to various device parameters and to potential in-flight use before, during, and after growth experiments on space flights. It is concluded that the very recent surge in the commercial production of large scale integrated circuitry and other semiconductor arrays requiring uniformity on the scale of a few microns, involves nondestructive test procedures which could well be useful to NASA for in-flight use in space processing.

TiOx-based thin-film transistors prepared by femtosecond laser pre-annealing

NASA Astrophysics Data System (ADS)

Shan, Fei; Kim, Sung-Jin

2018-02-01

We report on thin-film transistors (TFTs) based on titanium oxide (TiOx) prepared using femtosecond laser pre-annealing for electrical application of n-type channel oxide transparent TFTs. Amorphous TFTs using TiOx semiconductors as an active layer have a low-temperature process and show remarkable electrical performance. And the femtosecond laser pre-annealing process has greater flexibility and development space for semiconductor production activity, with a fast preparation method. TFTs with a TiOx semiconductor pre-annealed via femtosecond laser at 3 W have a pinhole-free and smooth surface without crystal grains.

EPE analysis of sub-N10 BEoL flow with and without fully self-aligned via using Coventor SEMulator3D

NASA Astrophysics Data System (ADS)

Franke, Joern-Holger; Gallagher, Matt; Murdoch, Gayle; Halder, Sandip; Juncker, Aurelie; Clark, William

2017-03-01

During the last few decades, the semiconductor industry has been able to scale device performance up while driving costs down. What started off as simple geometrical scaling, driven mostly by advances in lithography, has recently been accompanied by advances in processing techniques and in device architectures. The trend to combine efforts using process technology and lithography is expected to intensify, as further scaling becomes ever more difficult. One promising component of future nodes are "scaling boosters", i.e. processing techniques that enable further scaling. An indispensable component in developing these ever more complex processing techniques is semiconductor process modeling software. Visualization of complex 3D structures in SEMulator3D, along with budget analysis on film thicknesses, CD and etch budgets, allow process integrators to compare flows before any physical wafers are run. Hundreds of "virtual" wafers allow comparison of different processing approaches, along with EUV or DUV patterning options for defined layers and different overlay schemes. This "virtual fabrication" technology produces massively parallel process variation studies that would be highly time-consuming or expensive in experiment. Here, we focus on one particular scaling booster, the fully self-aligned via (FSAV). We compare metal-via-metal (mevia-me) chains with self-aligned and fully-self-aligned via's using a calibrated model for imec's N7 BEoL flow. To model overall variability, 3D Monte Carlo modeling of as many variability sources as possible is critical. We use Coventor SEMulator3D to extract minimum me-me distances and contact areas and show how fully self-aligned vias allow a better me-via distance control and tighter via-me contact area variability compared with the standard self-aligned via (SAV) approach.

Where the chips fall: environmental health in the semiconductor industry.

PubMed

Chepesiuk, R

1999-09-01

Three recent lawsuits are focusing public attention on the environmental and occupational health effects of the world's largest and fastest growing manufacturing sector-the $150 billion semiconductor industry. The suits allege that exposure to toxic chemicals in semiconductor manufacturing plants led to adverse health effects such as miscarriage and cancer among workers. To manufacture computer components, the semiconductor industry uses large amounts of hazardous chemicals including hydrochloric acid, toxic metals and gases, and volatile solvents. Little is known about the long-term health consequences of exposure to chemicals by semiconductor workers. According to industry critics, the semiconductor industry also adversely impacts the environment, causing groundwater and air pollution and generating toxic waste as a by-product of the semiconductor manufacturing process. In contrast, the U.S. Bureau of Statistics shows the semiconductor industry as having a worker illness rate of about one-third of the average of all manufacturers, and advocates defend the industry, pointing to recent research collaborations and product replacement as proof that semiconductor manufacturers adequately protect both their employees and the environment.

Where the chips fall: environmental health in the semiconductor industry.

PubMed Central

Chepesiuk, R

1999-01-01

Three recent lawsuits are focusing public attention on the environmental and occupational health effects of the world's largest and fastest growing manufacturing sector-the $150 billion semiconductor industry. The suits allege that exposure to toxic chemicals in semiconductor manufacturing plants led to adverse health effects such as miscarriage and cancer among workers. To manufacture computer components, the semiconductor industry uses large amounts of hazardous chemicals including hydrochloric acid, toxic metals and gases, and volatile solvents. Little is known about the long-term health consequences of exposure to chemicals by semiconductor workers. According to industry critics, the semiconductor industry also adversely impacts the environment, causing groundwater and air pollution and generating toxic waste as a by-product of the semiconductor manufacturing process. In contrast, the U.S. Bureau of Statistics shows the semiconductor industry as having a worker illness rate of about one-third of the average of all manufacturers, and advocates defend the industry, pointing to recent research collaborations and product replacement as proof that semiconductor manufacturers adequately protect both their employees and the environment. PMID:10464084

Casimir Pressure in Mds-Structures

NASA Astrophysics Data System (ADS)

Yurova, V. A.; Bukina, M. N.; Churkin, Yu. V.; Fedortsov, A. B.; Klimchitskaya, G. L.

2012-07-01

The Casimir pressure on the dielectric layer in metal-dielectric-semiconductor (MDS) structures is calculated in the framework of the Lifshitz theory at nonzero temperature. In this calculation the standard parameters of semiconductor devices with a thin dielectric layer are used. We consider the thickness of a layer decreasing from 40 to 1 nm. At the shortest thickness the Casimir pressure achieves 8 MPa. At small thicknesses the results are compared with the predictions of nonrelativistic theory.

Recent Advances of Solution-Processed Metal Oxide Thin-Film Transistors.

PubMed

Xu, Wangying; Li, Hao; Xu, Jian-Bin; Wang, Lei

2018-03-06

Solution-processed metal oxide thin-film transistors (TFTs) are considered as one of the most promising transistor technologies for future large-area flexible electronics. This review surveys the recent advances in solution-based oxide TFTs, including n-type oxide semiconductors, oxide dielectrics and p-type oxide semiconductors. Firstly, we provide an introduction on oxide TFTs and the TFT configurations and operating principles. Secondly, we present the recent progress in solution-processed n-type transistors, with a special focus on low-temperature and large-area solution processed approaches as well as novel non-display applications. Thirdly, we give a detailed analysis of the state-of-the-art solution-processed oxide dielectrics for low-voltage electronics. Fourthly, we discuss the recent progress in solution-based p-type oxide semiconductors, which will enable the highly desirable future low-cost large-area complementary circuits. Finally, we draw the conclusions and outline the perspectives over the research field.

Spontaneous and strong multi-layer graphene n-doping on soda-lime glass and its application in graphene-semiconductor junctions

DOE PAGES

Dissanayake, D. M. N. M.; Ashraf, A.; Dwyer, D.; ...

2016-02-12

Scalable and low-cost doping of graphene could improve technologies in a wide range of fields such as microelectronics, optoelectronics, and energy storage. While achieving strong p-doping is relatively straightforward, non-electrostatic approaches to n-dope graphene, such as chemical doping, have yielded electron densities of 9.5 × 10 12 e/cm 2 or below. Furthermore, chemical doping is susceptible to degradation and can adversely affect intrinsic graphene’s properties. Here we demonstrate strong (1.33 × 10 13 e/cm 2), robust, and spontaneous graphene n-doping on a soda-lime-glass substrate via surface-transfer doping from Na without any external chemical, high-temperature, or vacuum processes. Remarkably, the n-dopingmore » reaches 2.11 × 10 13 e/cm 2 when graphene is transferred onto a p-type copper indium gallium diselenide (CIGS) semiconductor that itself has been deposited onto soda-lime-glass, via surface-transfer doping from Na atoms that diffuse to the CIGS surface. Using this effect, we demonstrate an n-graphene/p-semiconductor Schottky junction with ideality factor of 1.21 and strong photo-response. As a result, the ability to achieve strong and persistent graphene n-doping on low-cost, industry-standard materials paves the way toward an entirely new class of graphene-based devices such as photodetectors, photovoltaics, sensors, batteries, and supercapacitors.« less

Cameras for semiconductor process control

NASA Technical Reports Server (NTRS)

Porter, W. A.; Parker, D. L.

1977-01-01

The application of X-ray topography to semiconductor process control is described, considering the novel features of the high speed camera and the difficulties associated with this technique. The most significant results on the effects of material defects on device performance are presented, including results obtained using wafers processed entirely within this institute. Defects were identified using the X-ray camera and correlations made with probe data. Also included are temperature dependent effects of material defects. Recent applications and improvements of X-ray topographs of silicon-on-sapphire and gallium arsenide are presented with a description of a real time TV system prototype and of the most recent vacuum chuck design. Discussion is included of our promotion of the use of the camera by various semiconductor manufacturers.

In Situ Electrochemical Deposition of Microscopic Wires

NASA Technical Reports Server (NTRS)

Yun, Minhee; Myung, Nosang; Vasquez, Richard

2005-01-01

A method of fabrication of wires having micron and submicron dimensions is built around electrochemical deposition of the wires in their final positions between electrodes in integrated circuits or other devices in which the wires are to be used. Heretofore, nanowires have been fabricated by a variety of techniques characterized by low degrees of controllability and low throughput rates, and it has been necessary to align and electrically connect the wires in their final positions by use of sophisticated equipment in expensive and tedious post-growth assembly processes. The present method is more economical, offers higher yields, enables control of wire widths, and eliminates the need for post-growth assembly. The wires fabricated by this method could be used as simple electrical conductors or as transducers in sensors. Depending upon electrodeposition conditions and the compositions of the electroplating solutions in specific applications, the wires could be made of metals, alloys, metal oxides, semiconductors, or electrically conductive polymers. In this method, one uses fabrication processes that are standard in the semiconductor industry. These include cleaning, dry etching, low-pressure chemical vapor deposition, lithography, dielectric deposition, electron-beam lithography, and metallization processes as well as the electrochemical deposition process used to form the wires. In a typical case of fabrication of a circuit that includes electrodes between which microscopic wires are to be formed on a silicon substrate, the fabrication processes follow a standard sequence until just before the fabrication of the microscopic wires. Then, by use of a thermal SiO-deposition technique, the electrodes and the substrate surface areas in the gaps between them are covered with SiO. Next, the SiO is electron-beam patterned, then reactive-ion etched to form channels having specified widths (typically about 1 m or less) that define the widths of the wires to be formed. Drops of an electroplating solution are placed on the substrate in the regions containing the channels thus formed, then the wires are electrodeposited from the solution onto the exposed portions of the electrodes and into the channels. The electrodeposition is a room-temperature, atmospheric-pressure process. The figure shows an example of palladium wires that were electrodeposited into 1-mm-wide channels between gold electrodes.

All-optical reservoir computing.

PubMed

Duport, François; Schneider, Bendix; Smerieri, Anteo; Haelterman, Marc; Massar, Serge

2012-09-24

Reservoir Computing is a novel computing paradigm that uses a nonlinear recurrent dynamical system to carry out information processing. Recent electronic and optoelectronic Reservoir Computers based on an architecture with a single nonlinear node and a delay loop have shown performance on standardized tasks comparable to state-of-the-art digital implementations. Here we report an all-optical implementation of a Reservoir Computer, made of off-the-shelf components for optical telecommunications. It uses the saturation of a semiconductor optical amplifier as nonlinearity. The present work shows that, within the Reservoir Computing paradigm, all-optical computing with state-of-the-art performance is possible.

Theory of thermionic emission from a two-dimensional conductor and its application to a graphene-semiconductor Schottky junction

NASA Astrophysics Data System (ADS)

Trushin, Maxim

2018-04-01

The standard theory of thermionic emission developed for three-dimensional semiconductors does not apply to two-dimensional materials even for making qualitative predictions because of the vanishing out-of-plane quasiparticle velocity. This study reveals the fundamental origin of the out-of-plane charge carrier motion in a two-dimensional conductor due to the finite quasiparticle lifetime and huge uncertainty of the out-of-plane momentum. The theory is applied to a Schottky junction between graphene and a bulk semiconductor to derive a thermionic constant, which, in contrast to the conventional Richardson constant, is determined by the Schottky barrier height and Fermi level in graphene.

Semiconductor technology in protein kinase research and drug discovery: sensing a revolution.

PubMed

Bhalla, Nikhil; Di Lorenzo, Mirella; Estrela, Pedro; Pula, Giordano

2017-02-01

Since the discovery of protein kinase activity in 1954, close to 600 kinases have been discovered that have crucial roles in cell physiology. In several pathological conditions, aberrant protein kinase activity leads to abnormal cell and tissue physiology. Therefore, protein kinase inhibitors are investigated as potential treatments for several diseases, including dementia, diabetes, cancer and autoimmune and cardiovascular disease. Modern semiconductor technology has recently been applied to accelerate the discovery of novel protein kinase inhibitors that could become the standard-of-care drugs of tomorrow. Here, we describe current techniques and novel applications of semiconductor technologies in protein kinase inhibitor drug discovery. Copyright © 2016 Elsevier Ltd. All rights reserved.

Controlled Growth of Ultrathin Film of Organic Semiconductors by Balancing the Competitive Processes in Dip-Coating for Organic Transistors.

PubMed

Wu, Kunjie; Li, Hongwei; Li, Liqiang; Zhang, Suna; Chen, Xiaosong; Xu, Zeyang; Zhang, Xi; Hu, Wenping; Chi, Lifeng; Gao, Xike; Meng, Yancheng

2016-06-28

Ultrathin film with thickness below 15 nm of organic semiconductors provides excellent platform for some fundamental research and practical applications in the field of organic electronics. However, it is quite challenging to develop a general principle for the growth of uniform and continuous ultrathin film over large area. Dip-coating is a useful technique to prepare diverse structures of organic semiconductors, but the assembly of organic semiconductors in dip-coating is quite complicated, and there are no reports about the core rules for the growth of ultrathin film via dip-coating until now. In this work, we develop a general strategy for the growth of ultrathin film of organic semiconductor via dip-coating, which provides a relatively facile model to analyze the growth behavior. The balance between the three direct factors (nucleation rate, assembly rate, and recession rate) is the key to determine the growth of ultrathin film. Under the direction of this rule, ultrathin films of four organic semiconductors are obtained. The field-effect transistors constructed on the ultrathin film show good field-effect property. This work provides a general principle and systematic guideline to prepare ultrathin film of organic semiconductors via dip-coating, which would be highly meaningful for organic electronics as well as for the assembly of other materials via solution processes.

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Ergonomic risk factors of work processes in the semiconductor industry in Peninsular Malaysia.

PubMed

Chee, Heng-Leng; Rampal, Krishna Gopal; Chandrasakaran, Abherhame

2004-07-01

A cross-sectional survey of semiconductor factories was conducted to identify the ergonomic risk factors in the work processes, the prevalence of body pain among workers, and the relationship between body pain and work processes. A total of 906 women semiconductor workers took part in the study. In wafer preparation and polishing, a combination of lifting weights and prolonged standing might have led to high pain prevalences in the low back (35.0% wafer preparation, 41.7% wafer polishing) and lower limbs (90.0% wafer preparation, 66.7% wafer polishing). Semiconductor front of line workers, who mostly walked around to operate machines in clean rooms, had the lowest prevalences of body pain. Semiconductor assembly middle of line workers, especially the molding workers, who did frequent lifting, had high pain prevalences in the neck/shoulders (54.8%) and upper back (43.5 %). In the semiconductor assembly end of line work section, chip inspection workers who were exposed to prolonged sitting without back support had high prevalences of neck/shoulder (62.2%) and upper back pain (50.0%), while chip testing workers who had to climb steps to load units had a high prevalence of lower limb pain (68.0%). Workers in the assembly of electronic components, carrying out repetitive tasks with hands and fingers, and standing in awkward postures had high pain prevalences in the neck/shoulders (61.5%), arms (38.5%), and hands/wrists (30.8%).

40 CFR 469.18 - Pretreatment standards for new sources (PSNS).

Code of Federal Regulations, 2010 CFR

2010-07-01

... (PSNS). 469.18 Section 469.18 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) EFFLUENT GUIDELINES AND STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor... monitoring pursuant to § 469.13 (c) and (d) of this regulation must implement the solvent management plan...

40 CFR 63.7190 - What reports must I submit and when?

Code of Federal Regulations, 2011 CFR

2011-07-01

... PROGRAMS (CONTINUED) NATIONAL EMISSION STANDARDS FOR HAZARDOUS AIR POLLUTANTS FOR SOURCE CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing... 40 Protection of Environment 13 2011-07-01 2011-07-01 false What reports must I submit and when...

Vapor-Liquid-Solid Etch of Semiconductor Surface Channels by Running Gold Nanodroplets.

PubMed

Nikoobakht, Babak; Herzing, Andrew; Muramoto, Shin; Tersoff, Jerry

2015-12-09

We show that Au nanoparticles spontaneously move across the (001) surface of InP, InAs, and GaP when heated in the presence of water vapor. As they move, the particles etch crystallographically aligned grooves into the surface. We show that this process is a negative analogue of the vapor-liquid-solid (VLS) growth of semiconductor nanowires: the semiconductor dissolves into the catalyst and reacts with water vapor at the catalyst surface to create volatile oxides, depleting the dissolved cations and anions and thus sustaining the dissolution process. This VLS etching process provides a new tool for directed assembly of structures with sublithographic dimensions, as small as a few nanometers in diameter. Au particles above 100 nm in size do not exhibit this process but remain stationary, with oxide accumulating around the particles.

Narrow band gap amorphous silicon semiconductors

DOEpatents

Madan, A.; Mahan, A.H.

1985-01-10

Disclosed is a narrow band gap amorphous silicon semiconductor comprising an alloy of amorphous silicon and a band gap narrowing element selected from the group consisting of Sn, Ge, and Pb, with an electron donor dopant selected from the group consisting of P, As, Sb, Bi and N. The process for producing the narrow band gap amorphous silicon semiconductor comprises the steps of forming an alloy comprising amorphous silicon and at least one of the aforesaid band gap narrowing elements in amount sufficient to narrow the band gap of the silicon semiconductor alloy below that of amorphous silicon, and also utilizing sufficient amounts of the aforesaid electron donor dopant to maintain the amorphous silicon alloy as an n-type semiconductor.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang; , Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2013-03-12

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G [Champaign, IL; Rogers, John A [Champaign, IL; Menard, Etienne [Durham, NC; Lee, Keon Jae [Tokyo, JP; Khang, Dahl-Young [Urbana, IL; Sun, Yugang [Westmont, IL; Meitl, Matthew [Raleigh, NC; Zhu, Zhengtao [Rapid City, SD; Ko, Heung Cho [Urbana, IL; Mack, Shawn [Goleta, CA

2011-10-18

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2010-09-21

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Artifacts for Calibration of Submicron Width Measurements

NASA Technical Reports Server (NTRS)

Grunthaner, Frank; Grunthaner, Paula; Bryson, Charles, III

2003-01-01

Artifacts that are fabricated with the help of molecular-beam epitaxy (MBE) are undergoing development for use as dimensional calibration standards with submicron widths. Such standards are needed for calibrating instruments (principally, scanning electron microscopes and scanning probe microscopes) for measuring the widths of features in advanced integrated circuits. Dimensional calibration standards fabricated by an older process that involves lithography and etching of trenches in (110) surfaces of single-crystal silicon are generally reproducible to within dimensional tolerances of about 15 nm. It is anticipated that when the artifacts of the present type are fully developed, their critical dimensions will be reproducible to within 1 nm. These artifacts are expected to find increasing use in the semiconductor-device and integrated- circuit industries as the width tolerances on semiconductor devices shrink to a few nanometers during the next few years. Unlike in the older process, one does not rely on lithography and etching to define the critical dimensions. Instead, one relies on the inherent smoothness and flatness of MBE layers deposited under controlled conditions and defines the critical dimensions as the thicknesses of such layers. An artifact of the present type is fabricated in two stages (see figure): In the first stage, a multilayer epitaxial wafer is grown on a very flat substrate. In the second stage, the wafer is cleaved to expose the layers, then the exposed layers are differentially etched (taking advantage of large differences between the etch rates of the different epitaxial layer materials). The resulting structure includes narrow and well-defined trenches and a shelf with thicknesses determined by the thicknesses of the epitaxial layers from which they were etched. Eventually, it should be possible to add a third fabrication stage in which durable, electronically inert artifacts could be replicated in diamondlike carbon from a master made by MBE and etching as described above.

Low cost solar array project: Experimental process system development unit for producing semiconductor-grade silicon using silane-to-silicon process

NASA Technical Reports Server (NTRS)

1980-01-01

The design, fabrication, and installation of an experimental process system development unit (EPSDU) were analyzed. Supporting research and development were performed to provide an information data base usable for the EPSDU and for technological design and economical analysis for potential scale-up of the process. Iterative economic analyses were conducted for the estimated product cost for the production of semiconductor grade silicon in a facility capable of producing 1000-MT/Yr.

Mapping quantum yield for (Fe-Zn-Sn-Ti)Ox photoabsorbers using a high throughput photoelectrochemical screening system.

PubMed

Xiang, Chengxiang; Haber, Joel; Marcin, Martin; Mitrovic, Slobodan; Jin, Jian; Gregoire, John M

2014-03-10

Combinatorial synthesis and screening of light absorbers are critical to material discoveries for photovoltaic and photoelectrochemical applications. One of the most effective ways to evaluate the energy-conversion properties of a semiconducting light absorber is to form an asymmetric junction and investigate the photogeneration, transport and recombination processes at the semiconductor interface. This standard photoelectrochemical measurement is readily made on a semiconductor sample with a back-side metallic contact (working electrode) and front-side solution contact. In a typical combinatorial material library, each sample shares a common back contact, requiring novel instrumentation to provide spatially resolved and thus sample-resolved measurements. We developed a multiplexing counter electrode with a thin layer assembly, in which a rectifying semiconductor/liquid junction was formed and the short-circuit photocurrent was measured under chopped illumination for each sample in a material library. The multiplexing counter electrode assembly demonstrated a photocurrent sensitivity of sub-10 μA cm(-2) with an external quantum yield sensitivity of 0.5% for each semiconductor sample under a monochromatic ultraviolet illumination source. The combination of cell architecture and multiplexing allows high-throughput modes of operation, including both fast-serial and parallel measurements. To demonstrate the performance of the instrument, the external quantum yields of 1819 different compositions from a pseudoquaternary metal oxide library, (Fe-Zn-Sn-Ti)Ox, at 385 nm were collected in scanning serial mode with a throughput of as fast as 1 s per sample. Preliminary screening results identified a promising ternary composition region centered at Fe0.894Sn0.103Ti0.0034Ox, with an external quantum yield of 6.7% at 385 nm.

Thermally insensitive determination of the linewidth broadening factor in nanostructured semiconductor lasers using optical injection locking

PubMed Central

Wang, Cheng; Schires, Kevin; Osiński, Marek; Poole, Philip J.; Grillot, Frédéric

2016-01-01

In semiconductor lasers, current injection not only provides the optical gain, but also induces variation of the refractive index, as governed by the Kramers-Krönig relation. The linear coupling between the changes of the effective refractive index and the modal gain is described by the linewidth broadening factor, which is responsible for many static and dynamic features of semiconductor lasers. Intensive efforts have been made to characterize this factor in the past three decades. In this paper, we propose a simple, flexible technique for measuring the linewidth broadening factor of semiconductor lasers. It relies on the stable optical injection locking of semiconductor lasers, and the linewidth broadening factor is extracted from the residual side-modes, which are supported by the amplified spontaneous emission. This new technique has great advantages of insensitivity to thermal effects, the bias current, and the choice of injection-locked mode. In addition, it does not require the explicit knowledge of optical injection conditions, including the injection strength and the frequency detuning. The standard deviation of the measurements is less than 15%. PMID:27302301

Extended vertical range roughness measurements in non-ideal environments

NASA Astrophysics Data System (ADS)

Creath, Katherine

2011-09-01

This paper describes recent research into developing an extended range dynamic interferometry technique where the range is extended vertically to enhance surface roughness measurements made in non-ideal environments. Utilizing short pulses from two sources on either side of a frame transfer in a CCD sensor, data can be taken fast enough in noisy shop environments to make measurements in the presence of vibration, and air turbulence. A key application of this technique is monitoring of surface roughness of large optics during the polishing process by making in situ measurements from fine grind through to the final polish. It is anticipated that this monitoring can help speed up what is now a very lengthy process. This same technique is applicable to many other types of measurements including MEMS devices, as it is not affected by dispersion in windows covering devices, and for measuring features on flat panel display glass or semiconductor wafers. This paper describes the technique, and presents results of a variety of sample measurements including: bare glass in various states of polish from fine grind to final polish, scratches and pits in a roughened semiconductor wafer, a DMD MEMS device, and various calibration standards. Performance in terms of repeatabilitity of step heights and roughness for this proof of concept is in the +/-2% range.

Flat-plate solar array project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

NASA Technical Reports Server (NTRS)

1981-01-01

The engineering design, fabrication, assembly, operation, economic analysis, and process support research and development for an Experimental Process System Development Unit for producing semiconductor-grade silicon using the slane-to-silicon process are reported. The design activity was completed. About 95% of purchased equipment was received. The draft of the operations manual was about 50% complete and the design of the free-space system continued. The system using silicon power transfer, melting, and shotting on a psuedocontinuous basis was demonstrated.

40 CFR 63.7188 - What are my monitoring installation, operation, and maintenance requirements?

Code of Federal Regulations, 2011 CFR

2011-07-01

... Semiconductor Manufacturing Compliance Requirements § 63.7188 What are my monitoring installation, operation... emissions of your semiconductor process vent through a closed vent system to a control device, you must...

40 CFR 63.7188 - What are my monitoring installation, operation, and maintenance requirements?

Code of Federal Regulations, 2010 CFR

2010-07-01

... Semiconductor Manufacturing Compliance Requirements § 63.7188 What are my monitoring installation, operation... emissions of your semiconductor process vent through a closed vent system to a control device, you must...

Architectures for Improved Organic Semiconductor Devices

NASA Astrophysics Data System (ADS)

Beck, Jonathan H.

Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.

Semiconductor quantum dot scintillation under gamma-ray irradiation.

PubMed

Létant, S E; Wang, T-F

2006-12-01

We recently demonstrated the ability of semiconductor quantum dots to convert alpha radiation into visible photons. In this letter, we report on the scintillation of quantum dots under gamma irradiation and compare the energy resolution of the 59 keV line of americium-241 obtained with our quantum dot-glass nanocomposite to that of a standard sodium iodide scintillator. A factor 2 improvement is demonstrated experimentally and interpreted theoretically using a combination of energy-loss and photon-transport models.

A novel multi-level IC-compatible surface microfabrication technology for MEMS with independently controlled lateral and vertical submicron transduction gaps

NASA Astrophysics Data System (ADS)

Cicek, Paul-Vahe; Elsayed, Mohannad; Nabki, Frederic; El-Gamal, Mourad

2017-11-01

An above-IC compatible multi-level MEMS surface microfabrication technology based on a silicon carbide structural layer is presented. The fabrication process flow provides optimal electrostatic transduction by allowing the creation of independently controlled submicron vertical and lateral gaps without the need for high resolution lithography. Adopting silicon carbide as the structural material, the technology ensures material, chemical and thermal compatibility with modern semiconductor nodes, reporting the lowest peak processing temperature (i.e. 200 °C) of all comparable works. This makes this process ideally suited for integrating capacitive-based MEMS directly above standard CMOS substrates. Process flow design and optimization are presented in the context of bulk-mode disk resonators, devices that are shown to exhibit improved performance with respect to previous generation flexural beam resonators, and that represent relatively complex MEMS structures. The impact of impending improvements to the fabrication technology is discussed.

Detection of Short-Waved Spin Waves in Individual Microscopic Spin-Wave Waveguides Using the Inverse Spin Hall Effect.

PubMed

Brächer, T; Fabre, M; Meyer, T; Fischer, T; Auffret, S; Boulle, O; Ebels, U; Pirro, P; Gaudin, G

2017-12-13

The miniaturization of complementary metal-oxide-semiconductor (CMOS) devices becomes increasingly difficult due to fundamental limitations and the increase of leakage currents. Large research efforts are devoted to find alternative concepts that allow for a larger data-density and lower power consumption than conventional semiconductor approaches. Spin waves have been identified as a potential technology that can complement and outperform CMOS in complex logic applications, profiting from the fact that these waves enable wave computing on the nanoscale. The practical application of spin waves, however, requires the demonstration of scalable, CMOS compatible spin-wave detection schemes in material systems compatible with standard spintronics as well as semiconductor circuitry. Here, we report on the wave-vector independent detection of short-waved spin waves with wavelengths down to 150 nm by the inverse spin Hall effect in spin-wave waveguides made from ultrathin Ta/Co 8 Fe 72 B 20 /MgO. These findings open up the path for miniaturized scalable interconnects between spin waves and CMOS and the use of ultrathin films made from standard spintronic materials in magnonics.

Gas-phase synthesis of semiconductor nanocrystals and its applications

NASA Astrophysics Data System (ADS)

Mandal, Rajib

Luminescent nanomaterials is a newly emerging field that provides challenges not only to fundamental research but also to innovative technology in several areas such as electronics, photonics, nanotechnology, display, lighting, biomedical engineering and environmental control. These nanomaterials come in various forms, shapes and comprises of semiconductors, metals, oxides, and inorganic and organic polymers. Most importantly, these luminescent nanomaterials can have different properties owing to their size as compared to their bulk counterparts. Here we describe the use of plasmas in synthesis, modification, and deposition of semiconductor nanomaterials for luminescence applications. Nanocrystalline silicon is widely known as an efficient and tunable optical emitter and is attracting great interest for applications in several areas. To date, however, luminescent silicon nanocrystals (NCs) have been used exclusively in traditional rigid devices. For the field to advance towards new and versatile applications for nanocrystal-based devices, there is a need to investigate whether these NCs can be used in flexible and stretchable devices. We show how the optical and structural/morphological properties of plasma-synthesized silicon nanocrystals (Si NCs) change when they are deposited on stretchable substrates made of polydimethylsiloxane (PDMS). Synthesis of these NCs was performed in a nonthermal, low-pressure gas phase plasma reactor. To our knowledge, this is the first demonstration of direct deposition of NCs onto stretchable substrates. Additionally, in order to prevent oxidation and enhance the luminescence properties, a silicon nitride shell was grown around Si NCs. We have demonstrated surface nitridation of Si NCs in a single step process using non?thermal plasma in several schemes including a novel dual-plasma synthesis/shell growth process. These coated NCs exhibit SiNx shells with composition depending on process parameters. While measurements including photoluminescence (PL), surface analysis, and defect identification indicate the shell is protective against oxidation compared to Si NCs without any shell growth. Gallium Nitride (GaN) is one of the most well-known semiconductor material and the industry standard for fabricating LEDs. The problem is that epitaxial growth of high-quality GaN requires costly substrates (e.g. sapphire), high temperatures, and long processing times. Synthesizing freestanding NCs of GaN, on the other hand, could enable these novel device morphologies, as the NCs could be incorporated into devices without the requirements imposed by epitaxial GaN growth. Synthesis of GaN NCs was performed using a fully gas-phase process. Different sizes of crystalline GaN nanoparticles were produced indicating versatility of this gas-phase process. Elemental analysis using X-ray photoelectron spectroscopy (XPS) indicated a possible nitrogen deficiency in the NCs; addition of secondary plasma for surface treatment indicates improving stoichiometric ratio and points towards a unique method for creating high-quality GaN NCs with ultimate alloying and doping for full-spectrum luminescence.

Enhanced adhesion of films to semiconductors or metals by high energy bombardment

NASA Technical Reports Server (NTRS)

Tombrello, Thomas A. (Inventor); Qiu, Yuanxun (Inventor); Mendenhall, Marcus H. (Inventor)

1985-01-01

Films (12) of a metal such as gold or other non-insulator materials are firmly bonded to other non-insulators such as semiconductor substrates (10), suitably silicon or gallium arsenide by irradiating the interface with high energy ions. The process results in improved adhesion without excessive doping and provides a low resistance contact to the semiconductor. Thick layers can be bonded by depositing or doping the interfacial surfaces with fissionable elements or alpha emitters. The process can be utilized to apply very small, low resistance electrodes (78) to light-emitting solid state laser diodes (60) to form a laser device 70.

Quantum dynamical simulation of photoinduced electron transfer processes in dye-semiconductor systems: theory and application to coumarin 343 at TiO₂.

PubMed

Li, Jingrui; Kondov, Ivan; Wang, Haobin; Thoss, Michael

2015-04-10

A recently developed methodology to simulate photoinduced electron transfer processes at dye-semiconductor interfaces is outlined. The methodology employs a first-principles-based model Hamiltonian and accurate quantum dynamics simulations using the multilayer multiconfiguration time-dependent Hartree approach. This method is applied to study electron injection in the dye-semiconductor system coumarin 343-TiO2. Specifically, the influence of electronic-vibrational coupling is analyzed. Extending previous work, we consider the influence of Dushinsky rotation of the normal modes as well as anharmonicities of the potential energy surfaces on the electron transfer dynamics.

Kinetics of surfactant-mediated epitaxy of III-V semiconductors

NASA Astrophysics Data System (ADS)

Grandjean, N.; Massies, J.

1996-05-01

Surfactant-mediated epitaxy (SME) of III-V semiconductors is studied in the case of the GaAs(001) growth using Te as surfactant. To account for the strong surface segregation of Te, a phenomenological exchange mechanism is used. This process explains the reduction of the surface diffusion length evidenced by scanning tunneling microscopy (STM). However, this kinetics effect is observed only for restricted growth conditions: the As surface coverage should be sufficient to allow the exchange process. STM results as well as Monte Carlo simulations clearly show that the group-V element surface coverage plays a key role in the kinetics of SME of III-V semiconductors.

Mechanisms of Current Transfer in Electrodeposited Layers of Submicron Semiconductor Particles

NASA Astrophysics Data System (ADS)

Zhukov, N. D.; Mosiyash, D. S.; Sinev, I. V.; Khazanov, A. A.; Smirnov, A. V.; Lapshin, I. V.

2017-12-01

Current-voltage ( I- V) characteristics of conductance in multigrain layers of submicron particles of silicon, gallium arsenide, indium arsenide, and indium antimonide have been studied. Nanoparticles of all semiconductors were obtained by processing initial single crystals in a ball mill and applied after sedimentation onto substrates by means of electrodeposition. Detailed analysis of the I- V curves of electrodeposited layers shows that their behavior is determined by the mechanism of intergranular tunneling emission from near-surface electron states of submicron particles. Parameters of this emission process have been determined. The proposed multigrain semiconductor structures can be used in gas sensors, optical detectors, IR imagers, etc.

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Progress in piezo-phototronic effect modulated photovoltaics.

PubMed

Que, Miaoling; Zhou, Ranran; Wang, Xiandi; Yuan, Zuqing; Hu, Guofeng; Pan, Caofeng

2016-11-02

Wurtzite structured materials, like ZnO, GaN, CdS, and InN, simultaneously possess semiconductor and piezoelectric properties. The inner-crystal piezopotential induced by external strain can effectively tune/control the carrier generation, transport and separation/combination processes at the metal-semiconductor contact or p-n junction, which is called the piezo-phototronic effect. This effect can efficiently enhance the performance of photovoltaic devices based on piezoelectric semiconductor materials by utilizing the piezo-polarization charges at the junction induced by straining, which can modulate the energy band of the piezoelectric material and then accelerate or prevent the separation process of the photon-generated electrons and vacancies. This paper introduces the fundamental physics principles of the piezo-phototronic effect, and reviews recent progress in piezo-phototronic effect enhanced solar cells, including solar cells based on semiconductor nanowire, organic/inorganic materials, quantum dots, and perovskite. The piezo-phototronic effect is suggested as a suitable basis for the development of an innovative method to enhance the performance of solar cells based on piezoelectric semiconductors by applied extrinsic strains, which might be appropriate for fundamental research and potential applications in various areas of optoelectronics.

Progress in piezo-phototronic effect modulated photovoltaics

NASA Astrophysics Data System (ADS)

Que, Miaoling; Zhou, Ranran; Wang, Xiandi; Yuan, Zuqing; Hu, Guofeng; Pan, Caofeng

2016-11-01

Wurtzite structured materials, like ZnO, GaN, CdS, and InN, simultaneously possess semiconductor and piezoelectric properties. The inner-crystal piezopotential induced by external strain can effectively tune/control the carrier generation, transport and separation/combination processes at the metal-semiconductor contact or p-n junction, which is called the piezo-phototronic effect. This effect can efficiently enhance the performance of photovoltaic devices based on piezoelectric semiconductor materials by utilizing the piezo-polarization charges at the junction induced by straining, which can modulate the energy band of the piezoelectric material and then accelerate or prevent the separation process of the photon-generated electrons and vacancies. This paper introduces the fundamental physics principles of the piezo-phototronic effect, and reviews recent progress in piezo-phototronic effect enhanced solar cells, including solar cells based on semiconductor nanowire, organic/inorganic materials, quantum dots, and perovskite. The piezo-phototronic effect is suggested as a suitable basis for the development of an innovative method to enhance the performance of solar cells based on piezoelectric semiconductors by applied extrinsic strains, which might be appropriate for fundamental research and potential applications in various areas of optoelectronics.

Size-tunable Lateral Confinement in Monolayer Semiconductors

DOE PAGES

Wei, Guohua; Czaplewski, David A.; Lenferink, Erik J.; ...

2017-06-12

Three-dimensional confinement allows semiconductor quantum dots to exhibit size-tunable electronic and optical properties that enable a wide range of opto-electronic applications from displays, solar cells and bio-medical imaging to single-electron devices. Additional modalities such as spin and valley properties in monolayer transition metal dichalcogenides provide further degrees of freedom requisite for information processing and spintronics. In nanostructures, however, spatial confinement can cause hybridization that inhibits the robustness of these emergent properties. Here in this paper, we show that laterally-confined excitons in monolayer MoS 2 nanodots can be created through top-down nanopatterning with controlled size tunability. Unlike chemically-exfoliated monolayer nanoparticles, themore » lithographically patterned monolayer semiconductor nanodots down to a radius of 15 nm exhibit the same valley polarization as in a continuous monolayer sheet. The inherited bulk spin and valley properties, the size dependence of excitonic energies, and the ability to fabricate MoS 2 nanostructures using semiconductor-compatible processing suggest that monolayer semiconductor nanodots have potential to be multimodal building blocks of integrated optoelectronics and spintronics systems« less

Selective epitaxy using the gild process

DOEpatents

Weiner, Kurt H.

1992-01-01

The present invention comprises a method of selective epitaxy on a semiconductor substrate. The present invention provides a method of selectively forming high quality, thin GeSi layers in a silicon circuit, and a method for fabricating smaller semiconductor chips with a greater yield (more error free chips) at a lower cost. The method comprises forming an upper layer over a substrate, and depositing a reflectivity mask which is then removed over selected sections. Using a laser to melt the unmasked sections of the upper layer, the semiconductor material in the upper layer is heated and diffused into the substrate semiconductor material. By varying the amount of laser radiation, the epitaxial layer is formed to a controlled depth which may be very thin. When cooled, a single crystal epitaxial layer is formed over the patterned substrate. The present invention provides the ability to selectively grow layers of mixed semiconductors over patterned substrates such as a layer of Ge.sub.x Si.sub.1-x grown over silicon. Such a process may be used to manufacture small transistors that have a narrow base, heavy doping, and high gain. The narrowness allows a faster transistor, and the heavy doping reduces the resistance of the narrow layer. The process does not require high temperature annealing; therefore materials such as aluminum can be used. Furthermore, the process may be used to fabricate diodes that have a high reverse breakdown voltage and a low reverse leakage current.

Process for leveling film surfaces and products thereof

DOEpatents

Birkmire, R.W.; McCandless, B.E.

1990-03-20

Semiconductor films and photovoltaic devices prepared therefrom are provided wherein the semiconductor films have a specular surface with a texture less than about 0.25 micron greater than the average planar film surface and wherein the semiconductor films are surface modified by exposing the surface to an aqueous solution of bromine containing an acid or salt and continuing such exposure for a time sufficient to etch the surface. 8 figs.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

SALUTE Grid Application using Message-Oriented Middleware

NASA Astrophysics Data System (ADS)

Atanassov, E.; Dimitrov, D. Sl.; Gurov, T.

2009-10-01

Stochastic ALgorithms for Ultra-fast Transport in sEmiconductors (SALUTE) is a grid application developed for solving various computationally intensive problems which describe ultra-fast carrier transport in semiconductors. SALUTE studies memory and quantum effects during the relaxation process due to electronphonon interaction in one-band semiconductors or quantum wires. Formally, SALUTE integrates a set of novel Monte Carlo, quasi-Monte Carlo and hybrid algorithms for solving various computationally intensive problems which describe the femtosecond relaxation process of optically excited carriers in one-band semiconductors or quantum wires. In this paper we present application-specific job submission and reservation management tool named a Job Track Server (JTS). It is developed using Message-Oriented middleware to implement robust, versatile job submission and tracing mechanism, which can be tailored to application specific failover and quality of service requirements. Experience from using the JTS for submission of SALUTE jobs is presented.

Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

A new constituent of electrostatic energy in semiconductors. An attempt to reformulate electrostatic energy in matter

NASA Astrophysics Data System (ADS)

Sallese, Jean-Michel

2016-06-01

The concept of electric energy is revisited in detail for semiconductors. We come to the conclusion that the main relationship used to calculate the energy related to the penetration of the electric field in semiconductors is missing a fundamental term. For instance, spatial derivate of the electrostatic energy using the traditional formula fails at giving the correct electrostatic force between semiconductor based capacitor plates, and reveals unambiguously the existence of an extra contribution to the standard electrostatic free energy. The additional term is found to be related to the generation of space charge regions which are predicted when combining electrostatics with semiconductor physics laws, such as for accumulation and inversion layers. On the contrary, no such energy is needed when relying on electrostatics only, as for instance when adopting the so-called full depletion approximation. The same holds for neutral and charged insulators that are still consistent with the customary definition, but these two examples are in fact singular cases. In semiconductors for instance, this additional energy can largely exceed the energy gained by the dipoles, thus becoming the dominant term. This unexpected result clearly asks for a generalization of electrostatic energy in matter in order to reconcile basic concepts of electrostatic energy in the framework of classical physics.

Electrostatic separation for recycling conductors, semiconductors, and nonconductors from electronic waste.

PubMed

Xue, Mianqiang; Yan, Guoqing; Li, Jia; Xu, Zhenming

2012-10-02

Electrostatic separation has been widely used to separate conductors and nonconductors for recycling e-waste. However, the components of e-waste are complex, which can be classified as conductors, semiconductors, and nonconductors according to their conducting properties. In this work, we made a novel attempt to recover the mixtures containing conductors (copper), semiconductors (extrinsic silicon), and nonconductors (woven glass reinforced resin) by electrostatic separation. The results of binary mixtures separation show that the separation of conductor and nonconductor, semiconductor and nonconductor need a higher voltage level while the separation of conductor and semiconductor needs a higher roll speed. Furthermore, the semiconductor separation efficiency is more sensitive to the high voltage level and the roll speed than the conductor separation efficiency. An integrated process was proposed for the multiple mixtures separation. The separation efficiency of conductors and semiconductors can reach 82.5% and 88%, respectively. This study contributes to the efficient recycling of valuable resources from e-waste.

Diluted magnetic semiconductor nanowires exhibiting magnetoresistance

DOEpatents

Yang, Peidong [El Cerrito, CA; Choi, Heonjin [Seoul, KR; Lee, Sangkwon [Daejeon, KR; He, Rongrui [Albany, CA; Zhang, Yanfeng [El Cerrito, CA; Kuykendal, Tevye [Berkeley, CA; Pauzauskie, Peter [Berkeley, CA

2011-08-23

A method for is disclosed for fabricating diluted magnetic semiconductor (DMS) nanowires by providing a catalyst-coated substrate and subjecting at least a portion of the substrate to a semiconductor, and dopant via chloride-based vapor transport to synthesize the nanowires. Using this novel chloride-based chemical vapor transport process, single crystalline diluted magnetic semiconductor nanowires Ga.sub.1-xMn.sub.xN (x=0.07) were synthesized. The nanowires, which have diameters of .about.10 nm to 100 nm and lengths of up to tens of micrometers, show ferromagnetism with Curie temperature above room temperature, and magnetoresistance up to 250 Kelvin.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

Method of plasma etching Ga-based compound semiconductors

DOEpatents

Qiu, Weibin; Goddard, Lynford L.

2012-12-25

A method of plasma etching Ga-based compound semiconductors includes providing a process chamber and a source electrode adjacent to the process chamber. The process chamber contains a sample comprising a Ga-based compound semiconductor. The sample is in contact with a platen which is electrically connected to a first power supply, and the source electrode is electrically connected to a second power supply. The method includes flowing SiCl.sub.4 gas into the chamber, flowing Ar gas into the chamber, and flowing H.sub.2 gas into the chamber. RF power is supplied independently to the source electrode and the platen. A plasma is generated based on the gases in the process chamber, and regions of a surface of the sample adjacent to one or more masked portions of the surface are etched to create a substantially smooth etched surface including features having substantially vertical walls beneath the masked portions.

A Computational Chemistry Database for Semiconductor Processing

NASA Technical Reports Server (NTRS)

Jaffe, R.; Meyyappan, M.; Arnold, J. O. (Technical Monitor)

1998-01-01

The concept of 'virtual reactor' or 'virtual prototyping' has received much attention recently in the semiconductor industry. Commercial codes to simulate thermal CVD and plasma processes have become available to aid in equipment and process design efforts, The virtual prototyping effort would go nowhere if codes do not come with a reliable database of chemical and physical properties of gases involved in semiconductor processing. Commercial code vendors have no capabilities to generate such a database, rather leave the task to the user of finding whatever is needed. While individual investigations of interesting chemical systems continue at Universities, there has not been any large scale effort to create a database. In this presentation, we outline our efforts in this area. Our effort focuses on the following five areas: 1. Thermal CVD reaction mechanism and rate constants. 2. Thermochemical properties. 3. Transport properties.4. Electron-molecule collision cross sections. and 5. Gas-surface interactions.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Experimental study on the monomer structure of solar semiconductor cold wall

NASA Astrophysics Data System (ADS)

Fu, Yuanyuan; Liu, Qiuxin; Chen, Tianshou

2018-06-01

In this paper, solar semiconductor cold wall structure was adopted in the net-zero energy buildings, NZEB for short. The heat transfer and refrigeration effect of the monomer structure of semiconductor cold wall were tested, we get that the monomer structure of semiconductor cold wall has certain cooling effect. However, the heat exchange effect is not good of the cold and hot aluminum plate only through natural convection and radiation heat transfer. It is necessary to further study the process of semiconductor refrigeration and heat transfer and the factors that affect the cooling effect. At the same time, it put forward a series of suggestions and improvement opinion for NZEB in hot summer and cold winter areas.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

40 CFR 63.7192 - In what form and how long must I keep my records?

Code of Federal Regulations, 2011 CFR

2011-07-01

... (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL EMISSION STANDARDS FOR HAZARDOUS AIR POLLUTANTS FOR SOURCE CATEGORIES (CONTINUED) National Emission Standards for Hazardous Air Pollutants for Semiconductor Manufacturing Applications, Notifications, Reports, and Records § 63.7192 In what form and how long must I keep...

Strong Influence of Humidity on Low-Temperature Thin-Film Fabrication via Metal Aqua Complex for High Performance Oxide Semiconductor Thin-Film Transistors.

PubMed

Lim, Keon-Hee; Huh, Jae-Eun; Lee, Jinwon; Cho, Nam-Kwang; Park, Jun-Woo; Nam, Bu-Il; Lee, Eungkyu; Kim, Youn Sang

2017-01-11

Oxide semiconductors thin film transistors (OS TFTs) with good transparency and electrical performance have great potential for future display technology. In particular, solution-processed OS TFTs have been attracted much attention due to many advantages such as continuous, large scale, and low cost processability. Recently, OS TFTs fabricated with a metal aqua complex have been focused because they have low temperature processability for deposition on flexible substrate as well as high field-effect mobility for application of advanced display. However, despite some remarkable results, important factors to optimize their electrical performance with reproducibility and uniformity have not yet been achieved. Here, we newly introduce the strong effects of humidity to enhance the electrical performance of OS TFTs fabricated with the metal aqua complex. Through humidity control during the spin-coating process and annealing process, we successfully demonstrate solution-processed InO x /SiO 2 TFTs with a good electrical uniformity of ∼5% standard deviation, showing high average field-effect mobility of 2.76 cm 2 V -1 s -1 and 15.28 cm 2 V -1 s -1 fabricated at 200 and 250 °C, respectively. Also, on the basis of the systematic analyses, we demonstrate the mechanism for the change in electrical properties of InO x TFTs depending on the humidity control. Finally, on the basis of the mechanism, we extended the humidity control to the fabrication of the AlO x insulator. Subsequently, we successfully achieved humidity-controlled InO x /AlO x TFTs fabricated at 200 °C showing high average field-effect mobility of 9.5 cm 2 V -1 s -1 .

High- and Reproducible-Performance Graphene/II-VI Semiconductor Film Hybrid Photodetectors

PubMed Central

Huang, Fan; Jia, Feixiang; Cai, Caoyuan; Xu, Zhihao; Wu, Congjun; Ma, Yang; Fei, Guangtao; Wang, Min

2016-01-01

High- and reproducible-performance photodetectors are critical to the development of many technologies, which mainly include one-dimensional (1D) nanostructure based and film based photodetectors. The former suffer from a huge performance variation because the performance is quite sensitive to the synthesis microenvironment of 1D nanostructure. Herein, we show that the graphene/semiconductor film hybrid photodetectors not only possess a high performance but also have a reproducible performance. As a demo, the as-produced graphene/ZnS film hybrid photodetector shows a high responsivity of 1.7 × 107 A/W and a fast response speed of 50 ms, and shows a highly reproducible performance, in terms of narrow distribution of photocurrent (38–65 μA) and response speed (40–60 ms) for 20 devices. Graphene/ZnSe film and graphene/CdSe film hybrid photodetectors fabricated by this method also show a high and reproducible performance. The general method is compatible with the conventional planar process, and would be easily standardized and thus pay a way for the photodetector applications. PMID:27349692

Correlated electron-hole mechanism for molecular doping in organic semiconductors

NASA Astrophysics Data System (ADS)

Li, Jing; D'Avino, Gabriele; Pershin, Anton; Jacquemin, Denis; Duchemin, Ivan; Beljonne, David; Blase, Xavier

2017-07-01

The electronic and optical properties of the paradigmatic F4TCNQ-doped pentacene in the low-doping limit are investigated by a combination of state-of-the-art many-body ab initio methods accounting for environmental screening effects, and a carefully parametrized model Hamiltonian. We demonstrate that while the acceptor level lies very deep in the gap, the inclusion of electron-hole interactions strongly stabilizes dopant-semiconductor charge transfer states and, together with spin statistics and structural relaxation effects, rationalize the possibility for room-temperature dopant ionization. Our findings reconcile available experimental data, shedding light on the partial vs. full charge transfer scenario discussed in the literature, and question the relevance of the standard classification in shallow or deep impurity levels prevailing for inorganic semiconductors.

New integration concept of PIN photodiodes in 0.35μm CMOS technologies

NASA Astrophysics Data System (ADS)

Jonak-Auer, I.; Teva, J.; Park, J. M.; Jessenig, S.; Rohrbacher, M.; Wachmann, E.

2012-06-01

We report on a new and very cost effective way to integrate PIN photo detectors into a standard CMOS process. Starting with lowly p-doped (intrinsic) EPI we need just one additional mask and ion implantation in order to provide doping concentrations very similar to standard CMOS substrates to areas outside the photoactive regions. Thus full functionality of the standard CMOS logic can be guaranteed while the photo detectors highly benefit from the low doping concentrations of the intrinsic EPI. The major advantage of this integration concept is that complete modularity of the CMOS process remains untouched by the implementation of PIN photodiodes. Functionality of the implanted region as host of logic components was confirmed by electrical measurements of relevant standard transistor as well as ESD protection devices. We also succeeded in establishing an EPI deposition process in austriamicrosystems 200mm wafer fabrication which guarantees the formation of very lowly p-doped intrinsic layers, which major semiconductor vendors could not provide. With our EPI deposition process we acquire doping levels as low as 1•1012/cm3. In order to maintain those doping levels during CMOS processing we employed special surface protection techniques. After complete CMOS processing doping concentrations were about 4•1013/cm3 at the EPI surface while the bulk EPI kept its original low doping concentrations. Photodiode parameters could further be improved by bottom antireflective coatings and a special implant to reduce dark currents. For 100×100μm2 photodiodes in 20μm thick intrinsic EPI on highly p-doped substrates we achieved responsivities of 0.57A/W at λ=675nm, capacitances of 0.066pF and dark currents of 0.8pA at 2V reverse voltage.

Using the scanning electron microscope on the production line to assure quality semiconductors

NASA Technical Reports Server (NTRS)

Adolphsen, J. W.; Anstead, R. J.

1972-01-01

The use of the scanning electron microscope to detect metallization defects introduced during batch processing of semiconductor devices is discussed. A method of determining metallization integrity was developed which culminates in a procurement specification using the scanning microscope on the production line as a quality control tool. Batch process control of the metallization operation is monitored early in the manufacturing cycle.

Magnetic filter apparatus and method for generating cold plasma in semiconductor processing

DOEpatents

Vella, M.C.

1996-08-13

Disclosed herein is a system and method for providing a plasma flood having a low electron temperature to a semiconductor target region during an ion implantation process. The plasma generator providing the plasma is coupled to a magnetic filter which allows ions and low energy electrons to pass therethrough while retaining captive the primary or high energy electrons. The ions and low energy electrons form a ``cold plasma`` which is diffused in the region of the process surface while the ion implantation process takes place. 15 figs.

Hydrogen ion microlithography

DOEpatents

Tsuo, Y. Simon; Deb, Satyen K.

1990-01-01

Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Gyeong Won; Shim, Jong-In; Shin, Dong-Soo, E-mail: dshin@hanyang.ac.kr

While there have been many discussions on the standard Si pn-diodes, little attention has been paid and confusion still arises on the ideality factor of the radiative recombination current in semiconductor light-emitting diodes (LEDs). In this letter, we theoretically demonstrate and experimentally confirm by using blue and infrared semiconductor LEDs that the ideality factor of the radiative recombination current is unity especially for low-current-density ranges. We utilize the data of internal quantum efficiency measured by the temperature-dependent electroluminescence to separate the radiative current component from the total current.

Low-Cost and Large-Area Electronics, Roll-to-Roll Processing and Beyond

NASA Astrophysics Data System (ADS)

Wiesenhütter, Katarzyna; Skorupa, Wolfgang

In the following chapter, the authors conduct a literature survey of current advances in state-of-the-art low-cost, flexible electronics. A new emerging trend in the design of modern semiconductor devices dedicated to scaling-up, rather than reducing, their dimensions is presented. To realize volume manufacturing, alternative semiconductor materials with superior performance, fabricated by innovative processing methods, are essential. This review provides readers with a general overview of the material and technology evolution in the area of macroelectronics. Herein, the term macroelectronics (MEs) refers to electronic systems that can cover a large area of flexible media. In stark contrast to well-established micro- and nano-scale semiconductor devices, where property improvement is associated with downscaling the dimensions of the functional elements, in macroelectronic systems their overall size defines the ultimate performance (Sun and Rogers in Adv. Mater. 19:1897-1916, 2007). The major challenges of large-scale production are discussed. Particular attention has been focused on describing advanced, short-term heat treatment approaches, which offer a range of advantages compared to conventional annealing methods. There is no doubt that large-area, flexible electronic systems constitute an important research topic for the semiconductor industry. The ability to fabricate highly efficient macroelectronics by inexpensive processes will have a significant impact on a range of diverse technology sectors. A new era "towards semiconductor volume manufacturing…" has begun.

Batch-processed semiconductor gas sensor array for the selective detection of NOx in automotive exhaust gas

NASA Astrophysics Data System (ADS)

Jang, Hani; Kim, Minki; Kim, Yongjun

2016-12-01

This paper reports on a semiconductor gas sensor array to detect nitrogen oxides (NOx) in automotive exhaust gas. The proposed semiconductor gas sensor array consisted of one common electrode and three individual electrodes to minimize the size of the sensor array, and three sensing layers [TiO2 + SnO2 (15 wt%), SnO2, and Ga2O3] were deposited using screen printing. In addition, sensing materials were sintered under the same conditions in order to take advantage of batch processing. The sensing properties of the proposed sensor array were verified by experimental measurements, and the selectivity improved by using pattern recognition.

Metal-Insulator-Semiconductor Photodetectors

PubMed Central

Lin, Chu-Hsuan; Liu, Chee Wee

2010-01-01

The major radiation of the Sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III–V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows. PMID:22163382

Silicon Photonics Transmitter with SOA and Semiconductor Mode-Locked Laser.

PubMed

Moscoso-Mártir, Alvaro; Müller, Juliana; Hauck, Johannes; Chimot, Nicolas; Setter, Rony; Badihi, Avner; Rasmussen, Daniel E; Garreau, Alexandre; Nielsen, Mads; Islamova, Elmira; Romero-García, Sebastián; Shen, Bin; Sandomirsky, Anna; Rockman, Sylvie; Li, Chao; Sharif Azadeh, Saeed; Lo, Guo-Qiang; Mentovich, Elad; Merget, Florian; Lelarge, François; Witzens, Jeremy

2017-10-24

We experimentally investigate an optical link relying on silicon photonics transmitter and receiver components as well as a single section semiconductor mode-locked laser as a light source and a semiconductor optical amplifier for signal amplification. A transmitter based on a silicon photonics resonant ring modulator, an external single section mode-locked laser and an external semiconductor optical amplifier operated together with a standard receiver reliably supports 14 Gbps on-off keying signaling with a signal quality factor better than 7 for 8 consecutive comb lines, as well as 25 Gbps signaling with a signal quality factor better than 7 for one isolated comb line, both without forward error correction. Resonant ring modulators and Germanium waveguide photodetectors are further hybridly integrated with chip scale driver and receiver electronics, and their co-operability tested. These experiments will serve as the basis for assessing the feasibility of a silicon photonics wavelength division multiplexed link relying on a single section mode-locked laser as a multi-carrier light source.

Transportable GPU (General Processor Units) chip set technology for standard computer architectures

NASA Astrophysics Data System (ADS)

Fosdick, R. E.; Denison, H. C.

1982-11-01

The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

Doped polymer semiconductors with ultrahigh and ultralow work functions for ohmic contacts.

PubMed

Tang, Cindy G; Ang, Mervin C Y; Choo, Kim-Kian; Keerthi, Venu; Tan, Jun-Kai; Syafiqah, Mazlan Nur; Kugler, Thomas; Burroughes, Jeremy H; Png, Rui-Qi; Chua, Lay-Lay; Ho, Peter K H

2016-11-24

To make high-performance semiconductor devices, a good ohmic contact between the electrode and the semiconductor layer is required to inject the maximum current density across the contact. Achieving ohmic contacts requires electrodes with high and low work functions to inject holes and electrons respectively, where the work function is the minimum energy required to remove an electron from the Fermi level of the electrode to the vacuum level. However, it is challenging to produce electrically conducting films with sufficiently high or low work functions, especially for solution-processed semiconductor devices. Hole-doped polymer organic semiconductors are available in a limited work-function range, but hole-doped materials with ultrahigh work functions and, especially, electron-doped materials with low to ultralow work functions are not yet available. The key challenges are stabilizing the thin films against de-doping and suppressing dopant migration. Here we report a general strategy to overcome these limitations and achieve solution-processed doped films over a wide range of work functions (3.0-5.8 electronvolts), by charge-doping of conjugated polyelectrolytes and then internal ion-exchange to give self-compensated heavily doped polymers. Mobile carriers on the polymer backbone in these materials are compensated by covalently bonded counter-ions. Although our self-compensated doped polymers superficially resemble self-doped polymers, they are generated by separate charge-carrier doping and compensation steps, which enables the use of strong dopants to access extreme work functions. We demonstrate solution-processed ohmic contacts for high-performance organic light-emitting diodes, solar cells, photodiodes and transistors, including ohmic injection of both carrier types into polyfluorene-the benchmark wide-bandgap blue-light-emitting polymer organic semiconductor. We also show that metal electrodes can be transformed into highly efficient hole- and electron-injection contacts via the self-assembly of these doped polyelectrolytes. This consequently allows ambipolar field-effect transistors to be transformed into high-performance p- and n-channel transistors. Our strategy provides a method for producing ohmic contacts not only for organic semiconductors, but potentially for other advanced semiconductors as well, including perovskites, quantum dots, nanotubes and two-dimensional materials.

Electrochemical impedance spectroscopy for quantitative interface state characterization of planar and nanostructured semiconductor-dielectric interfaces

NASA Astrophysics Data System (ADS)

Meng, Andrew C.; Tang, Kechao; Braun, Michael R.; Zhang, Liangliang; McIntyre, Paul C.

2017-10-01

The performance of nanostructured semiconductors is frequently limited by interface defects that trap electronic carriers. In particular, high aspect ratio geometries dramatically increase the difficulty of using typical solid-state electrical measurements (multifrequency capacitance- and conductance-voltage testing) to quantify interface trap densities (D it). We report on electrochemical impedance spectroscopy (EIS) to characterize the energy distribution of interface traps at metal oxide/semiconductor interfaces. This method takes advantage of liquid electrolytes, which provide conformal electrical contacts. Planar Al2O3/p-Si and Al2O3/p-Si0.55Ge0.45 interfaces are used to benchmark the EIS data against results obtained from standard electrical testing methods. We find that the solid state and EIS data agree very well, leading to the extraction of consistent D it energy distributions. Measurements carried out on pyramid-nanostructured p-Si obtained by KOH etching followed by deposition of a 10 nm ALD-Al2O3 demonstrate the application of EIS to trap characterization of a nanostructured dielectric/semiconductor interface. These results show the promise of this methodology to measure interface state densities for a broad range of semiconductor nanostructures such as nanowires, nanofins, and porous structures.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, Bhushan L.

1995-01-01

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.

Performance of Geant4 in simulating semiconductor particle detector response in the energy range below 1 MeV

NASA Astrophysics Data System (ADS)

Soti, G.; Wauters, F.; Breitenfeldt, M.; Finlay, P.; Kraev, I. S.; Knecht, A.; Porobić, T.; Zákoucký, D.; Severijns, N.

2013-11-01

Geant4 simulations play a crucial role in the analysis and interpretation of experiments providing low energy precision tests of the Standard Model. This paper focuses on the accuracy of the description of the electron processes in the energy range between 100 and 1000 keV. The effect of the different simulation parameters and multiple scattering models on the backscattering coefficients is investigated. Simulations of the response of HPGe and passivated implanted planar Si detectors to β particles are compared to experimental results. An overall good agreement is found between Geant4 simulations and experimental data.

Verilog-A Device Models for Cryogenic Temperature Operation of Bulk Silicon CMOS Devices

NASA Technical Reports Server (NTRS)

Akturk, Akin; Potbhare, Siddharth; Goldsman, Neil; Holloway, Michael

2012-01-01

Verilog-A based cryogenic bulk CMOS (complementary metal oxide semiconductor) compact models are built for state-of-the-art silicon CMOS processes. These models accurately predict device operation at cryogenic temperatures down to 4 K. The models are compatible with commercial circuit simulators. The models extend the standard BSIM4 [Berkeley Short-channel IGFET (insulated-gate field-effect transistor ) Model] type compact models by re-parameterizing existing equations, as well as adding new equations that capture the physics of device operation at cryogenic temperatures. These models will allow circuit designers to create optimized, reliable, and robust circuits operating at cryogenic temperatures.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

In Situ Chemical Modification of Schottky Barrier in Solution-Processed Zinc Tin Oxide Diode.

PubMed

Son, Youngbae; Li, Jiabo; Peterson, Rebecca L

2016-09-14

Here we present a novel in situ chemical modification process to form vertical Schottky diodes using palladium (Pd) rectifying bottom contacts, amorphous zinc tin oxide (Zn-Sn-O) semiconductor made via acetate-based solution process, and molybdenum top ohmic contacts. Using X-ray photoelectron spectroscopy depth profiling, we show that oxygen plasma treatment of Pd creates a PdOx interface layer, which is then reduced back to metallic Pd by in situ reactions during Zn-Sn-O film annealing. The plasma treatment ensures an oxygen-rich environment in the semiconductor near the Schottky barrier, reducing the level of oxygen-deficiency-related defects and improving the rectifying contact. Using this process, we achieve diodes with high forward current density exceeding 10(3)A cm(-2) at 1 V, rectification ratios of >10(2), and ideality factors of around 1.9. The measured diode current-voltage characteristics are compared to numerical simulations of thermionic field emission with sub-bandgap states in the semiconductor, which we attribute to spatial variations in metal stoichiometry of amorphous Zn-Sn-O. To the best of our knowledge, this is the first demonstration of vertical Schottky diodes using solution-processed amorphous metal oxide semiconductor. Furthermore, the in situ chemical modification method developed here can be adapted to tune interface properties in many other oxide devices.

40 CFR 469.11 - Compliance dates.

Code of Federal Regulations, 2010 CFR

2010-07-01

... STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor Subcategory § 469.11... BCT limitations for total toxic organics (TTO) and pH, respectively, is as soon as possible as...

40 CFR 469.11 - Compliance dates.

Code of Federal Regulations, 2011 CFR

2011-07-01

... STANDARDS ELECTRICAL AND ELECTRONIC COMPONENTS POINT SOURCE CATEGORY Semiconductor Subcategory § 469.11... BCT limitations for total toxic organics (TTO) and pH, respectively, is as soon as possible as...

Thermal-Error Regime in High-Accuracy Gigahertz Single-Electron Pumping

NASA Astrophysics Data System (ADS)

Zhao, R.; Rossi, A.; Giblin, S. P.; Fletcher, J. D.; Hudson, F. E.; Möttönen, M.; Kataoka, M.; Dzurak, A. S.

2017-10-01

Single-electron pumps based on semiconductor quantum dots are promising candidates for the emerging quantum standard of electrical current. They can transfer discrete charges with part-per-million (ppm) precision in nanosecond time scales. Here, we employ a metal-oxide-semiconductor silicon quantum dot to experimentally demonstrate high-accuracy gigahertz single-electron pumping in the regime where the number of electrons trapped in the dot is determined by the thermal distribution in the reservoir leads. In a measurement with traceability to primary voltage and resistance standards, the averaged pump current over the quantized plateau, driven by a 1-GHz sinusoidal wave in the absence of a magnetic field, is equal to the ideal value of e f within a measurement uncertainty as low as 0.27 ppm.

X-ray topography as a process control tool in semiconductor and microcircuit manufacture

NASA Technical Reports Server (NTRS)

Parker, D. L.; Porter, W. A.

1977-01-01

A bent wafer camera, designed to identify crystal lattice defects in semiconductor materials, was investigated. The camera makes use of conventional X-ray topographs and an innovative slightly bent wafer which allows rays from the point source to strike all portions of the wafer simultaneously. In addition to being utilized in solving production process control problems, this camera design substantially reduces the cost per topograph.

Asymptotic Analysis of Melt Growth for Antimonide-Based Compound Semiconductor Crystals in Magnetic and Electric Fields

DTIC Science & Technology

2006-10-01

F. Bliss, Gerald W. Iseler and Piotr Becla, "Combining static and rotating magnetic fields during modified vertical Bridgman crystal growth ," AIAA...Wang and Nancy Ma, "Semiconductor crystal growth by the vertical Bridgman process with rotating magnetic fields," ASME Journal of Heat Transfer...2005. 15. Stephen J. LaPointe, Nancy Ma and Donald W. Mueller, Jr., " Growth of binary alloyed semiconductor crystals by the vertical Bridgman

Control of GaAs Microwave Schottky Diode Electrical Characteristics by Contact Geometry: The Gap Diode.

DTIC Science & Technology

1982-05-01

semiconductor Schottky-barrier contacts are used in many semiconductor devices, including switches, rectifiers, varactors , IMPATTs, mixer and detector...ionic materials such as most of the II-VI compound semiconductors (e.g. ZnS and ZnO) and the transition-metal oxides , the barrier height is strongly...the alloying process described above is nonuniformity, due to the incomplete removal of residual surface oxides prior to the evaporation of the metal

A semiconductor bridge ignited hot gas piston ejector

NASA Technical Reports Server (NTRS)

Grubelich, M. C.; Bickes, Robert W., Jr.

1993-01-01

The topics are presented in viewgraph form and include the following: semiconductor bridge technology (SCB); SCB philosophy; technology transfer; simplified sketch of SCB; SCB processing; SCB design; SCB test assembly; 5 mJ SCB burst based on a polaroid photograph; micro-convective heat transfer hypothesis; SCB fire set; comparison of SCB and hot-wire actuators; satellite firing sets; logic fire set; SCB smart component; SCB smart firing set; semiconductor design considerations; and the adjustable actuator system.

Chemically Derivatized Semiconductor Photoelectrodes.

ERIC Educational Resources Information Center

Wrighton, Mark S.

1983-01-01

Deliberate modification of semiconductor photoelectrodes to improve durability and enhance rate of desirable interfacial redox processes is discussed for a variety of systems. Modification with molecular-based systems or with metals/metal oxides yields results indicating an important role for surface modification in devices for fundamental study…

Transparent megahertz circuits from solution-processed composite thin films.

PubMed

Liu, Xingqiang; Wan, Da; Wu, Yun; Xiao, Xiangheng; Guo, Shishang; Jiang, Changzhong; Li, Jinchai; Chen, Tangsheng; Duan, Xiangfeng; Fan, Zhiyong; Liao, Lei

2016-04-21

Solution-processed amorphous oxide semiconductors have attracted considerable interest in large-area transparent electronics. However, due to its relative low carrier mobility (∼10 cm(2) V(-1) s(-1)), the demonstrated circuit performance has been limited to 800 kHz or less. Herein, we report solution-processed high-speed thin-film transistors (TFTs) and integrated circuits with an operation frequency beyond the megahertz region on 4 inch glass. The TFTs can be fabricated from an amorphous indium gallium zinc oxide/single-walled carbon nanotube (a-IGZO/SWNT) composite thin film with high yield and high carrier mobility of >70 cm(2) V(-1) s(-1). On-chip microwave measurements demonstrate that these TFTs can deliver an unprecedented operation frequency in solution-processed semiconductors, including an extrinsic cut-off frequency (f(T) = 102 MHz) and a maximum oscillation frequency (f(max) = 122 MHz). Ring oscillators further demonstrated an oscillation frequency of 4.13 MHz, for the first time, realizing megahertz circuit operation from solution-processed semiconductors. Our studies represent an important step toward high-speed solution-processed thin film electronics.

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Environmentally benign semiconductor processing for dielectric etch

NASA Astrophysics Data System (ADS)

Liao, Marci Yi-Ting

Semiconductor processing requires intensive usage of chemicals, electricity, and water. Such intensive resource usage leaves a large impact on the environment. For instance, in Silicon Valley, the semiconductor industry is responsible for 80% of the hazardous waste sites contaminated enough to require government assistance. Research on environmentally benign semiconductor processing is needed to reduce the environmental impact of the semiconductor industry. The focus of this dissertation is on the environmental impact of one aspect of semiconductor processing: patterning of dielectric materials. Plasma etching of silicon dioxide emits perfluorocarbons (PFCs) gases, like C2F6 and CF4, into the atmosphere. These gases are super global warming/greenhouse gases because of their extremely long atmospheric lifetimes and excellent infrared absorption properties. We developed the first inductively coupled plasma (ICP) abatement device for destroying PFCs downstream of a plasma etcher. Destruction efficiencies of 99% and 94% can be obtained for the above mentioned PFCs, by using O 2 as an additive gas. Our results have lead to extensive modeling in academia as well as commercialization of the ICP abatement system. Dielectric patterning of hi-k materials for future device technology brings different environment challenges. The uncertainty of the hi-k material selection and the patterning method need to be addressed. We have evaluated the environmental impact of three different dielectric patterning methods (plasma etch, wet etch and chemical-mechanical polishing), as well as, the transistor device performances associated with the patterning methods. Plasma etching was found to be the most environmentally benign patterning method, which also gives the best device performance. However, the environmental concern for plasma etching is the possibility of cross-contamination from low volatility etch by-products. Therefore, mass transfer in a plasma etcher for a promising hi-k dielectric material, ZrO2, was studied. A novel cross-contamination sampling technique was developed, along with a mass transfer model.

Architecture for distributed design and fabrication

NASA Astrophysics Data System (ADS)

McIlrath, Michael B.; Boning, Duane S.; Troxel, Donald E.

1997-01-01

We describe a flexible, distributed system architecture capable of supporting collaborative design and fabrication of semi-conductor devices and integrated circuits. Such capabilities are of particular importance in the development of new technologies, where both equipment and expertise are limited. Distributed fabrication enables direct, remote, physical experimentation in the development of leading edge technology, where the necessary manufacturing resources are new, expensive, and scarce. Computational resources, software, processing equipment, and people may all be widely distributed; their effective integration is essential in order to achieve the realization of new technologies for specific product requirements. Our architecture leverages is essential in order to achieve the realization of new technologies for specific product requirements. Our architecture leverages current vendor and consortia developments to define software interfaces and infrastructure based on existing and merging networking, CIM, and CAD standards. Process engineers and product designers access processing and simulation results through a common interface and collaborate across the distributed manufacturing environment.

On Practical Charge Injection at the Metal/Organic Semiconductor Interface

PubMed Central

Kumatani, Akichika; Li, Yun; Darmawan, Peter; Minari, Takeo; Tsukagoshi, Kazuhito

2013-01-01

We have revealed practical charge injection at metal and organic semiconductor interface in organic field effect transistor configurations. We have developed a facile interface structure that consisted of double-layer electrodes in order to investigate the efficiency through contact metal dependence. The metal interlayer with few nanometers thickness between electrode and organic semiconductor drastically reduces the contact resistance at the interface. The improvement has clearly obtained when the interlayer is a metal with lower standard electrode potential of contact metals than large work function of the contact metals. The electrode potential also implies that the most dominant effect on the mechanism at the contact interface is induced by charge transfer. This mechanism represents a step forward towards understanding the fundamental physics of intrinsic charge injection in all organic devices. PMID:23293741

Absorption Coefficient of a Semiconductor Thin Film from Photoluminescence

NASA Astrophysics Data System (ADS)

Rey, G.; Spindler, C.; Babbe, F.; Rachad, W.; Siebentritt, S.; Nuys, M.; Carius, R.; Li, S.; Platzer-Björkman, C.

2018-06-01

The photoluminescence (PL) of semiconductors can be used to determine their absorption coefficient (α ) using Planck's generalized law. The standard method, suitable only for self-supported thick samples, like wafers, is extended to multilayer thin films by means of the transfer-matrix method to include the effect of the substrate and optional front layers. α values measured on various thin-film solar-cell absorbers by both PL and photothermal deflection spectroscopy (PDS) show good agreement. PL measurements are extremely sensitive to the semiconductor absorption and allow us to advantageously circumvent parasitic absorption from the substrate; thus, α can be accurately determined down to very low values, allowing us to investigate deep band tails with a higher dynamic range than in any other method, including spectrophotometry and PDS.

n-Channel semiconductor materials design for organic complementary circuits.

PubMed

Usta, Hakan; Facchetti, Antonio; Marks, Tobin J

2011-07-19

Organic semiconductors have unique properties compared to traditional inorganic materials such as amorphous or crystalline silicon. Some important advantages include their adaptability to low-temperature processing on flexible substrates, low cost, amenability to high-speed fabrication, and tunable electronic properties. These features are essential for a variety of next-generation electronic products, including low-power flexible displays, inexpensive radio frequency identification (RFID) tags, and printable sensors, among many other applications. Accordingly, the preparation of new materials based on π-conjugated organic molecules or polymers has been a central scientific and technological research focus over the past decade. Currently, p-channel (hole-transporting) materials are the leading class of organic semiconductors. In contrast, high-performance n-channel (electron-transporting) semiconductors are relatively rare, but they are of great significance for the development of plastic electronic devices such as organic field-effect transistors (OFETs). In this Account, we highlight the advances our team has made toward realizing moderately and highly electron-deficient n-channel oligomers and polymers based on oligothiophene, arylenediimide, and (bis)indenofluorene skeletons. We have synthesized and characterized a "library" of structurally related semiconductors, and we have investigated detailed structure-property relationships through optical, electrochemical, thermal, microstructural (both single-crystal and thin-film), and electrical measurements. Our results reveal highly informative correlations between structural parameters at various length scales and charge transport properties. We first discuss oligothiophenes functionalized with perfluoroalkyl and perfluoroarene substituents, which represent the initial examples of high-performance n-channel semiconductors developed in this project. The OFET characteristics of these compounds are presented with an emphasis on structure-property relationships. We then examine the synthesis and properties of carbonyl-functionalized oligomers, which constitute second-generation n-channel oligothiophenes, in both vacuum- and solution-processed FETs. These materials have high carrier mobilities and good air stability. In parallel, exceptionally electron-deficient cyano-functionalized arylenediimide derivatives are discussed as early examples of thermodynamically air-stable, high-performance n-channel semiconductors; they exhibit record electron mobilities of up to 0.64 cm(2)/V·s. Furthermore, we provide an overview of highly soluble ladder-type macromolecular semiconductors as OFET components, which combine ambient stability with solution processibility. A high electron mobility of 0.16 cm(2)/V·s is obtained under ambient conditions for solution-processed films. Finally, examples of polymeric n-channel semiconductors with electron mobilities as high as 0.85 cm(2)/V·s are discussed; these constitute an important advance toward fully printed polymeric electronic circuitry. Density functional theory (DFT) computations reveal important trends in molecular physicochemical and semiconducting properties, which, when combined with experimental data, shed new light on molecular charge transport characteristics. Our data provide the basis for a fundamental understanding of charge transport in high-performance n-channel organic semiconductors. Moreover, our results provide a road map for developing functional, complementary organic circuitry, which requires combining p- and n-channel transistors.

Hydrogen ion microlithography

DOEpatents

Tsuo, Y.S.; Deb, S.K.

1990-10-02

Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing. 6 figs.

Semiconductor nanowire thermoelectric materials and devices, and processes for producing same

DOEpatents

Lagally, Max G; Evans, Paul G; Ritz, Clark S

2013-09-17

The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic compositional longitudinal modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or "nanomembranes."

Semiconductor nanowire thermoelectric materials and devices, and processes for producing same

DOEpatents

Lagally, Max G.; Evans, Paul G.; Ritz, Clark S.

2015-11-17

The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic compositional longitudinal modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or "nanomembranes."

Apparatus for making photovoltaic devices

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1994-12-13

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Electrical Properties of Reactive Liquid Crystal Semiconductors

NASA Astrophysics Data System (ADS)

McCulloch, Iain; Coelle, Michael; Genevicius, Kristijonas; Hamilton, Rick; Heckmeier, Michael; Heeney, Martin; Kreouzis, Theo; Shkunov, Maxim; Zhang, Weimin

2008-01-01

Fabrication of display products by low cost printing technologies such as ink jet, gravure offset lithography and flexography requires solution processable semiconductors for the backplane electronics. The products will typically be of lower performance than polysilicon transistors, but comparable to amorphous silicon. A range of prototypes are under development, including rollable electrophoretic displays, active matrix liquid crystal displays (AMLCD's), and flexible organic light-emitting diode (OLED) displays. Organic semiconductors that offer both electrical performance and stability with respect to storage and operation under ambient conditions are required. This work describes the initial evaluation of reactive mesogen semiconductors, which can polymerise within mesophase temperatures, “freezing in” the order in crosslinked domains. These crosslinked domains offer mechanical stability and are inert to solvent exposure in further processing steps. Reactive mesogens containing conjugated aromatic cores, designed to facilitate charge transport and provide good oxidative stability, were prepared and their liquid crystalline properties evaluated. Both time-of-flight and field effect transistor devices were prepared and their electrical characterisation reported.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wei, Guohua; Czaplewski, David A.; Lenferink, Erik J.

Three-dimensional confinement allows semiconductor quantum dots to exhibit size-tunable electronic and optical properties that enable a wide range of opto-electronic applications from displays, solar cells and bio-medical imaging to single-electron devices. Additional modalities such as spin and valley properties in monolayer transition metal dichalcogenides provide further degrees of freedom requisite for information processing and spintronics. In nanostructures, however, spatial confinement can cause hybridization that inhibits the robustness of these emergent properties. Here in this paper, we show that laterally-confined excitons in monolayer MoS 2 nanodots can be created through top-down nanopatterning with controlled size tunability. Unlike chemically-exfoliated monolayer nanoparticles, themore » lithographically patterned monolayer semiconductor nanodots down to a radius of 15 nm exhibit the same valley polarization as in a continuous monolayer sheet. The inherited bulk spin and valley properties, the size dependence of excitonic energies, and the ability to fabricate MoS 2 nanostructures using semiconductor-compatible processing suggest that monolayer semiconductor nanodots have potential to be multimodal building blocks of integrated optoelectronics and spintronics systems« less

Quantifying resistances across nanoscale low- and high-angle interspherulite boundaries in solution-processed organic semiconductor thin films.

PubMed

Lee, Stephanie S; Mativetsky, Jeffrey M; Loth, Marsha A; Anthony, John E; Loo, Yueh-Lin

2012-11-27

The nanoscale boundaries formed when neighboring spherulites impinge in polycrystalline, solution-processed organic semiconductor thin films act as bottlenecks to charge transport, significantly reducing organic thin-film transistor mobility in devices comprising spherulitic thin films as the active layers. These interspherulite boundaries (ISBs) are structurally complex, with varying angles of molecular orientation mismatch along their lengths. We have successfully engineered exclusively low- and exclusively high-angle ISBs to elucidate how the angle of molecular orientation mismatch at ISBs affects their resistivities in triethylsilylethynyl anthradithiophene thin films. Conductive AFM and four-probe measurements reveal that current flow is unaffected by the presence of low-angle ISBs, whereas current flow is significantly disrupted across high-angle ISBs. In the latter case, we estimate the resistivity to be 22 MΩμm(2)/width of the ISB, only less than a quarter of the resistivity measured across low-angle grain boundaries in thermally evaporated sexithiophene thin films. This discrepancy in resistivities across ISBs in solution-processed organic semiconductor thin films and grain boundaries in thermally evaporated organic semiconductor thin films likely arises from inherent differences in the nature of film formation in the respective systems.

Spin Seebeck effect: Thinks globally but acts locally

NASA Astrophysics Data System (ADS)

Sinova, Jairo

2010-11-01

Experiments on magnetic insulators and semiconductors imply that the spin Seebeck effect is conceptually different from the standard thermoelectric effect, launching new challenges for both theorists and experimentalists in spintronics.

Method and apparatus for thermal processing of semiconductor substrates

DOEpatents

Griffiths, Stewart K.; Nilson, Robert H.; Mattson, Brad S.; Savas, Stephen E.

2002-01-01

An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls. Further, peak power requirements are very small compared to lamp-heated RTPs because the cavity temperature is not cycled and the thermal mass of the cavity is relatively large. Increased speeds of insertion and/or removal may also be used with non-isothermal furnaces.

Method and apparatus for thermal processing of semiconductor substrates

DOEpatents

Griffiths, Stewart K.; Nilson, Robert H.; Mattson, Brad S.; Savas, Stephen E.

2000-01-01

An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls. Further, peak power requirements are very small compared to lamp-heated RTPs because the cavity temperature is not cycled and the thermal mass of the cavity is relatively large. Increased speeds of insertion and/or removal may also be used with non-isothermal furnaces.

Influence of the Surface Layer on the Electrochemical Deposition of Metals and Semiconductors into Mesoporous Silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chubenko, E. B., E-mail: eugene.chubenko@gmail.com; Redko, S. V.; Sherstnyov, A. I.

2016-03-15

The influence of the surface layer on the process of the electrochemical deposition of metals and semiconductors into porous silicon is studied. It is shown that the surface layer differs in structure and electrical characteristics from the host porous silicon bulk. It is established that a decrease in the conductivity of silicon crystallites that form the surface layer of porous silicon has a positive effect on the process of the filling of porous silicon with metals and semiconductors. This is demonstrated by the example of nickel and zinc oxide. The effect can be used for the formation of nanocomposite materialsmore » on the basis of porous silicon and nanostructures with a high aspect ratio.« less

3D analysis of semiconductor devices: A combination of 3D imaging and 3D elemental analysis

NASA Astrophysics Data System (ADS)

Fu, Bianzhu; Gribelyuk, Michael A.

2018-04-01

3D analysis of semiconductor devices using a combination of scanning transmission electron microscopy (STEM) Z-contrast tomography and energy dispersive spectroscopy (EDS) elemental tomography is presented. 3D STEM Z-contrast tomography is useful in revealing the depth information of the sample. However, it suffers from contrast problems between materials with similar atomic numbers. Examples of EDS elemental tomography are presented using an automated EDS tomography system with batch data processing, which greatly reduces the data collection and processing time. 3D EDS elemental tomography reveals more in-depth information about the defect origin in semiconductor failure analysis. The influence of detector shadowing and X-rays absorption on the EDS tomography's result is also discussed.

Plasma Heating and Ultrafast Semiconductor Laser Modulation Through a Terahertz Heating Field

NASA Technical Reports Server (NTRS)

Li, Jian-Zhong; Ning, C. Z.

2000-01-01

Electron-hole plasma heating and ultrafast modulation in a semiconductor laser under a terahertz electrical field are investigated using a set of hydrodynamic equations derived from the semiconductor Bloch equations. The self-consistent treatment of lasing and heating processes leads to the prediction of a strong saturation and degradation of modulation depth even at moderate terahertz field intensity. This saturation places a severe limit to bandwidth achievable with such scheme in ultrafast modulation. Strategies for increasing modulation depth are discussed.

Method for making graded I-III-VI.sub.2 semiconductors and solar cell obtained thereby

DOEpatents

Devaney, Walter E.

1987-08-04

Improved cell photovoltaic conversion efficiencies are obtained by the simultaneous elemental reactive evaporation process of Mickelsen and Chen for making semiconductors by closer control of the evaporation rates and substrate temperature during formation of the near contact, bulk, and near junction regions of a graded I-III-VI.sub.2, thin film, semiconductor, such as CuInSe.sub.2 /(Zn,Cd)S or another I-III-VI.sub.2 /II-VI heterojunction.

Organic Single-Crystal Semiconductor Films on a Millimeter Domain Scale.

PubMed

Kwon, Sooncheol; Kim, Jehan; Kim, Geunjin; Yu, Kilho; Jo, Yong-Ryun; Kim, Bong-Joong; Kim, Junghwan; Kang, Hongkyu; Park, Byoungwook; Lee, Kwanghee

2015-11-18

Nucleation and growth processes can be effectively controlled in organic semiconductor films through a new concept of template-mediated molecular crystal seeds during the phase transition; the effective control of these processes ensures millimeter-scale crystal domains, as well as the performance of the resulting organic films with intrinsic hole mobility of 18 cm(2) V(-1) s(-1). © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Rapid Three-Dimensional Printing in Water Using Semiconductor-Metal Hybrid Nanoparticles as Photoinitiators.

PubMed

Pawar, Amol Ashok; Halivni, Shira; Waiskopf, Nir; Ben-Shahar, Yuval; Soreni-Harari, Michal; Bergbreiter, Sarah; Banin, Uri; Magdassi, Shlomo

2017-07-12

Additive manufacturing processes enable fabrication of complex and functional three-dimensional (3D) objects ranging from engine parts to artificial organs. Photopolymerization, which is the most versatile technology enabling such processes through 3D printing, utilizes photoinitiators that break into radicals upon light absorption. We report on a new family of photoinitiators for 3D printing based on hybrid semiconductor-metal nanoparticles. Unlike conventional photoinitiators that are consumed upon irradiation, these particles form radicals through a photocatalytic process. Light absorption by the semiconductor nanorod is followed by charge separation and electron transfer to the metal tip, enabling redox reactions to form radicals in aerobic conditions. In particular, we demonstrate their use in 3D printing in water, where they simultaneously form hydroxyl radicals for the polymerization and consume dissolved oxygen that is a known inhibitor. We also demonstrate their potential for two-photon polymerization due to their giant two-photon absorption cross section.

Cost of ownership for inspection equipment

NASA Astrophysics Data System (ADS)

Dance, Daren L.; Bryson, Phil

1993-08-01

Cost of Ownership (CoO) models are increasingly a part of the semiconductor equipment evaluation and selection process. These models enable semiconductor manufacturers and equipment suppliers to quantify a system in terms of dollars per wafer. Because of the complex nature of the semiconductor manufacturing process, there are several key attributes that must be considered in order to accurately reflect the true 'cost of ownership'. While most CoO work to date has been applied to production equipment, the need to understand cost of ownership for inspection and metrology equipment presents unique challenges. Critical parameters such as detection sensitivity as a function of size and type of defect are not included in current CoO models yet are, without question, major factors in the technical evaluation process and life-cycle cost. This paper illustrates the relationship between these parameters, as components of the alpha and beta risk, and cost of ownership.

Active layers of high-performance lead zirconate titanate at temperatures compatible with silicon nano- and microelecronic devices

PubMed Central

Bretos, Iñigo; Jiménez, Ricardo; Tomczyk, Monika; Rodríguez-Castellón, Enrique; Vilarinho, Paula M.; Calzada, M. Lourdes

2016-01-01

Applications of ferroelectric materials in modern microelectronics will be greatly encouraged if the thermal incompatibility between inorganic ferroelectrics and semiconductor devices is overcome. Here, solution-processable layers of the most commercial ferroelectric compound ─ morphotrophic phase boundary lead zirconate titanate, namely Pb(Zr0.52Ti0.48)O3 (PZT) ─ are grown on silicon substrates at temperatures well below the standard CMOS process of semiconductor technology. The method, potentially transferable to a broader range of Zr:Ti ratios, is based on the addition of crystalline nanoseeds to photosensitive solutions of PZT resulting in perovskite crystallization from only 350 °C after the enhanced decomposition of metal precursors in the films by UV irradiation. A remanent polarization of 10.0 μC cm−2 is obtained for these films that is in the order of the switching charge densities demanded for FeRAM devices. Also, a dielectric constant of ~90 is measured at zero voltage which exceeds that of current single-oxide candidates for capacitance applications. The multifunctionality of the films is additionally demonstrated by their pyroelectric and piezoelectric performance. The potential integration of PZT layers at such low fabrication temperatures may redefine the concept design of classical microelectronic devices, besides allowing inorganic ferroelectrics to enter the scene of the emerging large-area, flexible electronics. PMID:26837240

Active layers of high-performance lead zirconate titanate at temperatures compatible with silicon nano- and microeletronic [corrected] devices.

PubMed

Bretos, Iñigo; Jiménez, Ricardo; Tomczyk, Monika; Rodríguez-Castellón, Enrique; Vilarinho, Paula M; Calzada, M Lourdes

2016-02-03

Applications of ferroelectric materials in modern microelectronics will be greatly encouraged if the thermal incompatibility between inorganic ferroelectrics and semiconductor devices is overcome. Here, solution-processable layers of the most commercial ferroelectric compound--morphotrophic phase boundary lead zirconate titanate, namely Pb(Zr0.52Ti0.48)O3 (PZT)--are grown on silicon substrates at temperatures well below the standard CMOS process of semiconductor technology. The method, potentially transferable to a broader range of Zr:Ti ratios, is based on the addition of crystalline nanoseeds to photosensitive solutions of PZT resulting in perovskite crystallization from only 350 °C after the enhanced decomposition of metal precursors in the films by UV irradiation. A remanent polarization of 10.0 μC cm(-2) is obtained for these films that is in the order of the switching charge densities demanded for FeRAM devices. Also, a dielectric constant of ~90 is measured at zero voltage which exceeds that of current single-oxide candidates for capacitance applications. The multifunctionality of the films is additionally demonstrated by their pyroelectric and piezoelectric performance. The potential integration of PZT layers at such low fabrication temperatures may redefine the concept design of classical microelectronic devices, besides allowing inorganic ferroelectrics to enter the scene of the emerging large-area, flexible electronics.

Thermomechanical Stresses Analysis of a Single Event Burnout Process

NASA Astrophysics Data System (ADS)

Tais, Carlos E.; Romero, Eduardo; Demarco, Gustavo L.

2009-06-01

This work analyzes the thermal and mechanical effects arising in a power Diffusion Metal Oxide Semiconductor (DMOS) during a Single Event Burnout (SEB) process. For studying these effects we propose a more detailed simulation structure than the previously used by other authors, solving the mathematical models by means of the Finite Element Method. We use a cylindrical heat generation region, with 5 W, 10 W, 50 W and 100 W for emulating the thermal phenomena occurring during SEB processes, avoiding the complexity of the mathematical treatment of the ion-semiconductor interaction.

Experimental demonstration of distributed feedback semiconductor lasers based on reconstruction-equivalent-chirp technology.

PubMed

Li, Jingsi; Wang, Huan; Chen, Xiangfei; Yin, Zuowei; Shi, Yuechun; Lu, Yanqing; Dai, Yitang; Zhu, Hongliang

2009-03-30

In this paper we report, to the best of our knowledge, the first experimental realization of distributed feedback (DFB) semiconductor lasers based on reconstruction-equivalent-chirp (REC) technology. Lasers with different lasing wavelengths are achieved simultaneously on one chip, which shows a potential for the REC technology in combination with the photonic integrated circuits (PIC) technology to be a possible method for monolithic integration, in that its fabrication is as powerful as electron beam technology and the cost and time-consuming are almost the same as standard holographic technology.

Semiconductor technology program: Progress briefs

NASA Technical Reports Server (NTRS)

Galloway, K. F.; Scace, R. I.; Walters, E. J.

1981-01-01

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

SIMULTANEOUS WATER CONSERVATION/RECYCLING/REUSE AND WASTE REDUCTION IN SEMICONDUCTOR MANUFACTURING

EPA Science Inventory

The project was devoted to two separate arms of research.  The overall goals of this research was to reduce the water use in the semi-conductor industry through a comprehensive program to reduce water usage in manufacturing processes, to investigate opportunitie...

Testing the Standard Model with the Primordial Inflation Explorer

NASA Technical Reports Server (NTRS)

Kogut, Alan J.

2011-01-01

The Primordial Inflation Explorer is an Explorer-class mission to measure the gravity-wave signature of primordial inflation through its distinctive imprint on the linear polarization of the cosmic microwave background. PIXIE uses an innovative optical design to achieve background-limited sensitivity in 400 spectral channels spanning 2.5 decades in frequency from 30 GHz to 6 THz (1 cm to 50 micron wavelength). The principal science goal is the detection and characterization of linear polarization from an inflationary epoch in the early universe, with tensor-to-scalar ratio r < 10A{-3) at 5 standard deviations. The rich PIXIE data set will also constrain physical processes ranging from Big Bang cosmology to the nature of the first stars to physical conditions within the interstellar medium of the Galaxy. I describe the PIXIE instrument and mission architecture needed to detect the inflationary signature using only 4 semiconductor bolometers.

Split Bull's eye shaped aluminum antenna for plasmon-enhanced nanometer scale germanium photodetector.

PubMed

Ren, Fang-Fang; Ang, Kah-Wee; Ye, Jiandong; Yu, Mingbin; Lo, Guo-Qiang; Kwong, Dim-Lee

2011-03-09

Bull's eye antennas are capable of efficiently collecting and concentrating optical signals into an ultrasmall area, offering an excellent solution to break the bottleneck between speed and photoresponse in subwavelength photodetectors. Here, we exploit the idea of split bull's eye antenna for a nanometer germanium photodetector operating at a standard communication wavelength of 1310 nm. The nontraditional plasmonic metal aluminum has been implemented in the resonant antenna structure fabricated by standard complementary metal-oxide-semiconductor (CMOS) processing. A significant enhancement in photoresponse could be achieved over the conventional bull's eye scheme due to an increased optical near-field in the active region. Moreover, with this novel antenna design the effective grating area could be significantly reduced without sacrificing device performance. This work paves the way for the future development of low-cost, high-density, and high-speed CMOS-compatible germanium-based optoelectronic devices.

Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask

NASA Technical Reports Server (NTRS)

Morrison, Andrew D. (Inventor); Daud, Taher (Inventor)

1986-01-01

A method for growing a high purity, low defect layer of semiconductor is described. This method involves depositing a patterned mask of a material impervious to impurities of the semiconductor on a surface of a blank. When a layer of semiconductor is grown on the mask, the semiconductor will first grow from the surface portions exposed by the openings in the mask and will bridge the connecting portions of the mask to form a continuous layer having improved purity, since only the portions overlying the openings are exposed to defects and impurities. The process can be iterated and the mask translated to further improve the quality of grown layers.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, B.L.

1995-07-04

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.

VLSI design of lossless frame recompression using multi-orientation prediction

NASA Astrophysics Data System (ADS)

Lee, Yu-Hsuan; You, Yi-Lun; Chen, Yi-Guo

2016-01-01

Pursuing an experience of high-end visual quality drives human to demand a higher display resolution and a higher frame rate. Hence, a lot of powerful coding tools are aggregated together in emerging video coding standards to improve coding efficiency. This also makes video coding standards suffer from two design challenges: heavy computation and tremendous memory bandwidth. The first issue can be properly solved by a careful hardware architecture design with advanced semiconductor processes. Nevertheless, the second one becomes a critical design bottleneck for a modern video coding system. In this article, a lossless frame recompression using multi-orientation prediction technique is proposed to overcome this bottleneck. This work is realised into a silicon chip with the technology of TSMC 0.18 µm CMOS process. Its encoding capability can reach full-HD (1920 × 1080)@48 fps. The chip power consumption is 17.31 mW@100 MHz. Core area and chip area are 0.83 × 0.83 mm2 and 1.20 × 1.20 mm2, respectively. Experiment results demonstrate that this work exhibits an outstanding performance on lossless compression ratio with a competitive hardware performance.

Standardization of Schwarz-Christoffel transformation for engineering design of semiconductor and hybrid integrated-circuit elements

NASA Astrophysics Data System (ADS)

Yashin, A. A.

1985-04-01

A semiconductor or hybrid structure into a calculable two-dimensional region mapped by the Schwarz-Christoffel transformation and a universal algorithm can be constructed on the basis of Maxwell's electro-magnetic-thermal similarity principle for engineering design of integrated-circuit elements. The design procedure involves conformal mapping of the original region into a polygon and then the latter into a rectangle with uniform field distribution, where conductances and capacitances are calculated, using tabulated standard mapping functions. Subsequent synthesis of a device requires inverse conformal mapping. Devices adaptable as integrated-circuit elements are high-resistance film resistors with periodic serration, distributed-resistance film attenuators with high transformation ratio, coplanar microstrip lines, bipolar transistors, directional couplers with distributed coupling to microstrip lines for microwave bulk devices, and quasirregular smooth matching transitions from asymmetric to coplanar microstrip lines.

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

PubMed

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

The Impedance Response of Semiconductors: An Electrochemical Engineering Perspective.

ERIC Educational Resources Information Center

Orazem, Mark E.

1990-01-01

Shows that the principles learned in the study of mass transport, thermodynamics, and kinetics associated with electrochemical systems can be applied to the transport and reaction processes taking place within a semiconductor. Describes impedance techniques and provides several graphs illustrating impedance data for diverse circuit systems. (YP)

SPECIAL ISSUE ON OPTICAL PROCESSING OF INFORMATION: Semiconductor-laser Fourier processors of electric signals

NASA Astrophysics Data System (ADS)

Blok, A. S.; Bukhenskii, A. F.; Krupitskii, É. I.; Morozov, S. V.; Pelevin, V. Yu; Sergeenko, T. N.; Yakovlev, V. I.

1995-10-01

An investigation is reported of acousto-optical and fibre-optic Fourier processors of electric signals, based on semiconductor lasers. A description is given of practical acousto-optical processors with an analysis band 120 MHz wide, a resolution of 200 kHz, and 7 cm × 8 cm × 18 cm dimensions. Fibre-optic Fourier processors are considered: they represent a new class of devices which are promising for the processing of gigahertz signals.

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

Metal oxides for optoelectronic applications.

PubMed

Yu, Xinge; Marks, Tobin J; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Metal oxides for optoelectronic applications

NASA Astrophysics Data System (ADS)

Yu, Xinge; Marks, Tobin J.; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Compact, Interactive Electric Vehicle Charger: Gallium-Nitride Switch Technology for Bi-directional Battery-to-Grid Charger Applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

2010-10-01

ADEPT Project: HRL Laboratories is using gallium nitride (GaN) semiconductors to create battery chargers for electric vehicles (EVs) that are more compact and efficient than traditional EV chargers. Reducing the size and weight of the battery charger is important because it would help improve the overall performance of the EV. GaN semiconductors process electricity faster than the silicon semiconductors used in most conventional EV battery chargers. These high-speed semiconductors can be paired with lighter-weight electrical circuit components, which helps decrease the overall weight of the EV battery charger. HRL Laboratories is combining the performance advantages of GaN semiconductors with anmore » innovative, interactive battery-to-grid energy distribution design. This design would support 2-way power flow, enabling EV battery chargers to not only draw energy from the power grid, but also store and feed energy back into it.« less

Free-electron laser spectroscopy in biology, medicine, and materials science; Proceedings of the Meeting, Los Angeles, CA, Jan. 22, 1993

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schwettman, H.A.

1993-01-01

Various papers on FEL spectroscopy in biology, medicine, and materials science are presented. Individual topics addressed include: Vanderbilt University FEL Center, FIR FEL facility at the University of California/Santa Barbara, FEL research facilities and opportunities at Duke, facilities at the Stanford Picosecond FEL Center, FIR nonlinear response of electrons in semiconductor nanostructures, FIR harmonic generation from semiconductor heterostructures, intrinsic response times of double-barrier resonant tunneling diodes at tetrahertz frequencies, semiconductor spectroscopy and ablation processes with the Vanderbilt FEL. Also discussed are: picosecond nonlinear optics in semiconductor quantum wells with the SCA FEL, excitation spectroscopy of thin-film disordered semiconductors, biophysical applicationmore » of FELs, FEL investigation of energy transfer in condensed phase systems, probing protein photochemistry and dynamics with ultrafast infrared spectroscopy, plasma ablation of hard tissues by FEL, FEL irradiation of the cornea.« less

Piezo-Phototronic Matrix via a Nanowire Array.

PubMed

Zhang, Yang; Zhai, Junyi; Wang, Zhong Lin

2017-12-01

Piezoelectric semiconductors, such as ZnO and GaN, demonstrate multiproperty coupling effects toward various aspects of mechanical, electrical, and optical excitation. In particular, the three-way coupling among semiconducting, photoexcitation, and piezoelectric characteristics in wurtzite-structured semiconductors is established as a new field, which was first coined as piezo-phototronics by Wang in 2010. The piezo-phototronic effect can controllably modulate the charge-carrier generation, separation, transport, and/or recombination in optical-electronic processes by modifying the band structure at the metal-semiconductor or semiconductor-semiconductor heterojunction/interface. Here, the progress made in using the piezo-phototronic effect for enhancing photodetectors, pressure sensors, light-emitting diodes, and solar cells is reviewed. In comparison with previous works on a single piezoelectric semiconducting nanowire, piezo-phototronic nanodevices built using nanowire arrays provide a promising platform for fabricating integrated optoelectronics with the realization of high-spatial-resolution imaging and fast responsivity. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fundamental Limit of 1/f Frequency Noise in Semiconductor Lasers Due to Mechanical Thermal Noise

NASA Technical Reports Server (NTRS)

Numata, K.; Camp, J.

2011-01-01

So-called 1/f noise has power spectral density inversely proportional to frequency, and is observed in many physical processes. Single longitudinal-mode semiconductor lasers, used in variety of interferometric sensing applications, as well as coherent communications, exhibit 1/f frequency noise at low frequency (typically below 100kHz). Here we evaluate mechanical thermal noise due to mechanical dissipation in semiconductor laser components and give a plausible explanation for the widely-observed 1/f frequency noise, applying a methodology developed for fixed-spacer cavities for laser frequency stabilization. Semiconductor-laser's short cavity, small beam radius, and lossy components are expected to emphasize thermal-noise-limited frequency noise. Our simple model largely explains the different 1/f noise levels observed in various semiconductor lasers, and provides a framework where the noise may be reduced with proper design.

Electron beam pumped semiconductor laser

NASA Technical Reports Server (NTRS)

Hug, William F. (Inventor); Reid, Ray D. (Inventor)

2009-01-01

Electron-beam-pumped semiconductor ultra-violet optical sources (ESUVOSs) are disclosed that use ballistic electron pumped wide bandgap semiconductor materials. The sources may produce incoherent radiation and take the form of electron-beam-pumped light emitting triodes (ELETs). The sources may produce coherent radiation and take the form of electron-beam-pumped laser triodes (ELTs). The ELTs may take the form of electron-beam-pumped vertical cavity surface emitting lasers (EVCSEL) or edge emitting electron-beam-pumped lasers (EEELs). The semiconductor medium may take the form of an aluminum gallium nitride alloy that has a mole fraction of aluminum selected to give a desired emission wavelength, diamond, or diamond-like carbon (DLC). The sources may be produced from discrete components that are assembled after their individual formation or they may be produced using batch MEMS-type or semiconductor-type processing techniques to build them up in a whole or partial monolithic manner, or combination thereof.

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Semiconductors: Still a Wide Open Frontier for Scientists/Engineers

NASA Astrophysics Data System (ADS)

Seiler, David G.

1997-10-01

A 1995 Business Week article described several features of the explosive use of semiconductor chips today: ``Booming'' personal computer markets are driving high demand for microprocessors and memory chips; (2) New information superhighway markets will `ignite' sales of multimedia and communication chips; and (3) Demand for digital-signal-processing and data-compression chips, which speed up video and graphics, is `red hot.' A Washington Post article by Stan Hinden said that technology is creating an unstoppable demand for electronic elements. This ``digital pervasiveness'' means that a semiconductor chip is going into almost every high-tech product that people buy - cars, televisions, video recorders, telephones, radios, alarm clocks, coffee pots, etc. ``Semiconductors are everywhere.'' Silicon and compound semiconductors are absolutely essential and are pervasive enablers for DoD operations and systems. DoD's Critical Technologies Plan of 1991 says that ``Semiconductor materials and microelectronics are critically important and appropriately lead the list of critical defense technologies.'' These trends continue unabated. This talk describes some of the frontiers of semiconductors today and shows how scientists and engineers can effectively contribute to its advancement. Cooperative, multidisciplinary efforts are increasing. Specific examples will be given for scanning capacitance microscopy and thin-film metrology.

CMOS dot matrix microdisplay

NASA Astrophysics Data System (ADS)

Venter, Petrus J.; Bogalecki, Alfons W.; du Plessis, Monuko; Goosen, Marius E.; Nell, Ilse J.; Rademeyer, P.

2011-03-01

Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

Doping Polymer Semiconductors by Organic Salts: Toward High-Performance Solution-Processed Organic Field-Effect Transistors.

PubMed

Hu, Yuanyuan; Rengert, Zachary D; McDowell, Caitlin; Ford, Michael J; Wang, Ming; Karki, Akchheta; Lill, Alexander T; Bazan, Guillermo C; Nguyen, Thuc-Quyen

2018-04-24

Solution-processed organic field-effect transistors (OFETs) were fabricated with the addition of an organic salt, trityl tetrakis(pentafluorophenyl)borate (TrTPFB), into thin films of donor-acceptor copolymer semiconductors. The performance of OFETs is significantly enhanced after the organic salt is incorporated. TrTPFB is confirmed to p-dope the organic semiconductors used in this study, and the doping efficiency as well as doping physics was investigated. In addition, systematic electrical and structural characterizations reveal how the doping enhances the performance of OFETs. Furthermore, it is shown that this organic salt doping method is feasible for both p- and n-doping by using different organic salts and, thus, can be utilized to achieve high-performance OFETs and organic complementary circuits.

High-Performance Quantum Dot Thin-Film Transistors with Environmentally Benign Surface Functionalization and Robust Defect Passivation.

PubMed

Jung, Su Min; Kang, Han Lim; Won, Jong Kook; Kim, JaeHyun; Hwang, ChaHwan; Ahn, KyungHan; Chung, In; Ju, Byeong-Kwon; Kim, Myung-Gil; Park, Sung Kyu

2018-01-31

The recent development of high-performance colloidal quantum dot (QD) thin-film transistors (TFTs) has been achieved with removal of surface ligand, defect passivation, and facile electronic doping. Here, we report on high-performance solution-processed CdSe QD-TFTs with an optimized surface functionalization and robust defect passivation via hydrazine-free metal chalcogenide (MCC) ligands. The underlying mechanism of the ligand effects on CdSe QDs has been studied with hydrazine-free ex situ reaction derived MCC ligands, such as Sn 2 S 6 4- , Sn 2 Se 6 4- , and In 2 Se 4 2- , to allow benign solution-process available. Furthermore, the defect passivation and remote n-type doping effects have been investigated by incorporating indium nanoparticles over the QD layer. Strong electronic coupling and solid defect passivation of QDs could be achieved by introducing electronically active MCC capping and thermal diffusion of the indium nanoparticles, respectively. It is also noteworthy that the diffused indium nanoparticles facilitate charge injection not only inter-QDs but also between source/drain electrodes and the QD semiconductors, significantly reducing contact resistance. With benign organic solvents, the Sn 2 S 6 4- , Sn 2 Se 6 4- , and In 2 Se 4 2- ligand based QD-TFTs exhibited field-effect mobilities exceeding 4.8, 12.0, and 44.2 cm 2 /(V s), respectively. The results reported here imply that the incorporation of MCC ligands and appropriate dopants provide a general route to high-performance, extremely stable solution-processed QD-based electronic devices with marginal toxicity, offering compatibility with standard complementary metal oxide semiconductor processing and large-scale on-chip device applications.

Low energy positrons as probes of reconstructed semiconductor surfaces.

NASA Astrophysics Data System (ADS)

Fazleev, Nail G.; Weiss, Alex H.

2007-03-01

Positron probes of semiconductor surfaces that play a fundamental role in modern science and technology are capable to non-destructively provide information that is both unique to the probe and complimentary to that extracted using other more standard techniques. We discuss recent progress in studies of the reconstructed Si(100), Si(111), Ge(100), and Ge(111) surfaces, clean and exposed to hydrogen and oxygen, using a surface characterization technique, Positron-Annihilation-Induced Auger-Electron Spectroscopy (PAES). Experimental PAES results are analyzed by performing first-principles calculations of positron surface states and annihilation probabilities of surface-trapped positrons with relevant core electrons for the reconstructed surfaces, taking into account discrete lattice effects, the electronic reorganization due to bonding, and charge redistribution effects at the surface. Effects of the hydrogen and oxygen adsorption on semiconductor surfaces on localization of positron surface state wave functions and annihilation characteristics are also analyzed. Theoretical calculations confirm that PAES intensities, which are proportional to annihilation probabilities of the surface trapped positrons that results in a core hole, are sensitive to the crystal face, surface structure and elemental content of the semiconductors.

In-Line Detection and Measurement of Molecular Contamination in Semiconductor Process Solutions

NASA Astrophysics Data System (ADS)

Wang, Jason; West, Michael; Han, Ye; McDonald, Robert C.; Yang, Wenjing; Ormond, Bob; Saini, Harmesh

2005-09-01

This paper discusses a fully automated metrology tool for detection and quantitative measurement of contamination, including cationic, anionic, metallic, organic, and molecular species present in semiconductor process solutions. The instrument is based on an electrospray ionization time-of-flight mass spectrometer (ESI-TOF/MS) platform. The tool can be used in diagnostic or analytical modes to understand process problems in addition to enabling routine metrology functions. Metrology functions include in-line contamination measurement with near real-time trend analysis. This paper discusses representative organic and molecular contamination measurement results in production process problem solving efforts. The examples include the analysis and identification of organic compounds in SC-1 pre-gate clean solution; urea, NMP (N-Methyl-2-pyrrolidone) and phosphoric acid contamination in UPW; and plasticizer and an organic sulfur-containing compound found in isopropyl alcohol (IPA). It is expected that these unique analytical and metrology capabilities will improve the understanding of the effect of organic and molecular contamination on device performance and yield. This will permit the development of quantitative correlations between contamination levels and process degradation. It is also expected that the ability to perform routine process chemistry metrology will lead to corresponding improvements in manufacturing process control and yield, the ability to avoid excursions and will improve the overall cost effectiveness of the semiconductor manufacturing process.

Active pixel sensor array with multiresolution readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

1999-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

Structured-gate organic field-effect transistors

NASA Astrophysics Data System (ADS)

Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

2012-06-01

We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

Enhancement of ZnO-based flexible nano generators via a sol-gel technique for sensing and energy harvesting applications

NASA Astrophysics Data System (ADS)

Rajagopalan, P.; Singh, Vipul; Palani, I. A.

2018-03-01

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its properties have undesired limitations. Here we report a 5˜6 fold enhancement in piezoelectric features via chemical doping of copper matched to intrinsic ZnO. A flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating, with other advantages such as robustness, low-weight, improved adhesion, and low cost. The device was used to demonstrate energy harvesting from a standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10˜30 m s-1) and five different angles of attack (0˜180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved.

Enhancement of ZnO-based flexible nano generators via a sol-gel technique for sensing and energy harvesting applications.

PubMed

Rajagopalan, P; Singh, Vipul; Palani, I A

2018-02-01

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its properties have undesired limitations. Here we report a 5∼6 fold enhancement in piezoelectric features via chemical doping of copper matched to intrinsic ZnO. A flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating, with other advantages such as robustness, low-weight, improved adhesion, and low cost. The device was used to demonstrate energy harvesting from a standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10∼30 m s -1 ) and five different angles of attack (0∼180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved.

76 FR 66331 - Investigations Regarding Certifications of Eligibility To Apply for Worker Adjustment Assistance...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-26

... Subject Firm (petitioners) Location institution petition 80486 Lattice Semiconductor Bethlehem, PA.../11 80498 InterMetro Industries Fostoria, OH 10/07/11 10/05/11 (Company). 80499 Standard Insurance...

Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

DOEpatents

Mazur, Eric [Concord, MA; Shen, Mengyan [Arlington, MA

2008-10-28

The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

DOEpatents

Mazur, Eric; Shen, Mengyan

2015-09-15

The present invention generally provides semiconductor substrates having submicronsized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

DOEpatents

Mazur, Eric , Shen; Mengyan, [Belmont, MA

2011-02-08

The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

Selenium semiconductor core optical fibers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tang, G. W.; Qian, Q., E-mail: qianqi@scut.edu.cn; Peng, K. L.

2015-02-15

Phosphate glass-clad optical fibers containing selenium (Se) semiconductor core were fabricated using a molten core method. The cores were found to be amorphous as evidenced by X-ray diffraction and corroborated by Micro-Raman spectrum. Elemental analysis across the core/clad interface suggests that there is some diffusion of about 3 wt % oxygen in the core region. Phosphate glass-clad crystalline selenium core optical fibers were obtained by a postdrawing annealing process. A two-cm-long crystalline selenium semiconductor core optical fibers, electrically contacted to external circuitry through the fiber end facets, exhibit a three times change in conductivity between dark and illuminated states. Suchmore » crystalline selenium semiconductor core optical fibers have promising utility in optical switch and photoconductivity of optical fiber array.« less

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Semiconductor materials for high frequency solid state sources

NASA Astrophysics Data System (ADS)

Grubin, H. L.

1983-03-01

The broad goal of the subject contract is to suggest candidate materials for high frequency device operation. During the initial phase of the study, attention has been focused on defining the general role of the band structure and associated scattering processes in determining the response of semiconductors to transient high-speed electrical signals. Moments of the Boltzmann transport equation form the basis of the study, and the scattering rates define the semiconductor under study. The selection of semiconductor materials proceeds from a set of simple, yet significant, set of scaling principles. During the first quarter scaling was associated with what can formally be identified as velocity invariants, but which in more practical terms identifies the relative speed advantages of e.g., InP over GaAs.

Maskless wafer-level microfabrication of optical penetrating neural arrays out of soda-lime glass: Utah Optrode Array.

PubMed

Boutte, Ronald W; Blair, Steve

2016-12-01

Borrowing from the wafer-level fabrication techniques of the Utah Electrode Array, an optical array capable of delivering light for neural optogenetic studies is presented in this paper: the Utah Optrode Array. Utah Optrode Arrays are micromachined out of sheet soda-lime-silica glass using standard backend processes of the semiconductor and microelectronics packaging industries such as precision diamond grinding and wet etching. 9 × 9 arrays with 1100μ m × 100μ m optrodes and a 500μ m back-plane are repeatably reproduced on 2i n wafers 169 arrays at a time. This paper describes the steps and some of the common errors of optrode fabrication.

Economics of polysilicon processes

NASA Technical Reports Server (NTRS)

Yaws, C. L.; Li, K. Y.; Chou, S. M.

1986-01-01

Techniques are being developed to provide lower cost polysilicon material for solar cells. Existing technology which normally provides semiconductor industry polysilicon material is undergoing changes and also being used to provide polysilicon material for solar cells. Economics of new and existing technologies are presented for producing polysilicon. The economics are primarily based on the preliminary process design of a plant producing 1,000 metric tons/year of silicon. The polysilicon processes include: Siemen's process (hydrogen reduction of trichlorosilane); Union Carbide process (silane decomposition); and Hemlock Semiconductor process (hydrogen reduction of dichlorosilane). The economics include cost estimates of capital investment and product cost to produce polysilicon via the technology. Sensitivity analysis results are also presented to disclose the effect of major paramentes such as utilities, labor, raw materials and capital investment.

Neural manufacturing: a novel concept for processing modeling, monitoring, and control

NASA Astrophysics Data System (ADS)

Fu, Chi Y.; Petrich, Loren; Law, Benjamin

1995-09-01

Semiconductor fabrication lines have become extremely costly, and achieving a good return from such a high capital investment requires efficient utilization of these expensive facilities. It is highly desirable to shorten processing development time, increase fabrication yield, enhance flexibility, improve quality, and minimize downtime. We propose that these ends can be achieved by applying recent advances in the areas of artificial neural networks, fuzzy logic, machine learning, and genetic algorithms. We use the term neural manufacturing to describe such applications. This paper describes our use of artificial neural networks to improve the monitoring and control of semiconductor process.

Process Control in Production-Worthy Plasma Doping Technology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Winder, Edmund J.; Fang Ziwei; Arevalo, Edwin

2006-11-13

As the semiconductor industry continues to scale devices of smaller dimensions and improved performance, many ion implantation processes require lower energy and higher doses. Achieving these high doses (in some cases {approx}1x1016 ions/cm2) at low energies (<3 keV) while maintaining throughput is increasingly challenging for traditional beamline implant tools because of space-charge effects that limit achievable beam density at low energies. Plasma doping is recognized as a technology which can overcome this problem. In this paper, we highlight the technology available to achieve process control for all implant parameters associated with modem semiconductor manufacturing.

Highly soluble [1]benzothieno[3,2-b]benzothiophene (BTBT) derivatives for high-performance, solution-processed organic field-effect transistors.

PubMed

Ebata, Hideaki; Izawa, Takafumi; Miyazaki, Eigo; Takimiya, Kazuo; Ikeda, Masaaki; Kuwabara, Hirokazu; Yui, Tatsuto

2007-12-26

2,7-Dialkyl[1]benzothieno[3,2-b]benzothiophenes were tested as solution-processible molecular semiconductors. Thin films of the organic semiconductors deposited on Si/SiO2 substrates by spin coating have well-ordered structures as confirmed by XRD analysis. Evaluations of the devices under ambient conditions showed typical p-channel FET responses with the field-effect mobility higher than 1.0 cm2 V-1 s-1 and Ion/Ioff of approximately 10(7).

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1971-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is discussed. The following subjects are also presented: (1) demonstration of the high sensitivity of the infrared response technique by the identification of gold in a germanium diode, (2) verification that transient thermal response is significantly more sensitive to the presence of voids in die attachment than steady-state thermal resistance, and (3) development of equipment for determining susceptibility of transistors to hot spot formation by the current-gain technique.

Processing of insulators and semiconductors

DOEpatents

Quick, Nathaniel R.; Joshi, Pooran C.; Duty, Chad Edward; Jellison, Jr., Gerald Earle; Angelini, Joseph Attilio

2015-06-16

A method is disclosed for processing an insulator material or a semiconductor material. The method includes pulsing a plasma lamp onto the material to diffuse a doping substance into the material, to activate the doping substance in the material or to metallize a large area region of the material. The method may further include pulsing a laser onto a selected region of the material to diffuse a doping substance into the material, to activate the doping substance in the material or to metallize a selected region of the material.

Frequency-noise cancellation in semiconductor lasers by nonlinear heterodyne detection.

PubMed

Bondurant, R S; Welford, D; Alexander, S B; Chan, V W

1986-12-01

The bit-error-rate (BER) performance of conventional noncoherent, heterodyne frequency-shift-keyed (FSK) optical communications systems can be surpassed by the use of a differential FSK modulation format and nonlinear postdetection processing at the receiver. A BER floor exists for conventional frequency-shift keying because of the frequency noise of the transmitter and local oscillator. The use of differential frequency-shift keying with nonlinear postdetection processing suppresses this BER floor for the semiconductor laser system considered here.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Astronaut Peggy Whitson Installs SUBSA Experiment

NASA Technical Reports Server (NTRS)

2002-01-01

Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.

International Space Station (ISS)

NASA Image and Video Library

2002-07-05

Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.

Ultrafast dynamics of many-body processes and fundamental quantum mechanical phenomena in semiconductors

PubMed Central

Chemla, Daniel S.; Shah, Jagdeep

2000-01-01

The large dielectric constant and small effective mass in a semiconductor allows a description of its electronic states in terms of envelope wavefunctions whose energy, time, and length scales are mesoscopic, i.e., halfway between those of atomic and those of condensed matter systems. This property makes it possible to demonstrate and investigate many quantum mechanical, many-body, and quantum kinetic phenomena with tabletop experiments that would be nearly impossible in other systems. This, along with the ability to custom-design semiconductor nanostructures, makes semiconductors an ideal laboratory for experimental investigations. We present an overview of some of the most exciting results obtained in semiconductors in recent years using the technique of ultrafast nonlinear optical spectrocopy. These results show that Coulomb correlation plays a major role in semiconductors and makes them behave more like a strongly interacting system than like an atomic system. The results provide insights into the physics of strongly interacting systems that are relevant to other condensed matter systems, but not easily accessible in other materials. PMID:10716981

Semiconductor nanowire thermoelectric materials and devices, and processes for producing same

DOEpatents

Lagally, Max G [Madison, WI; Evans, Paul G [Madison, WI; Ritz, Clark S [Middleton, WI

2011-02-15

The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic longitudinal modulation, which may be a compositional modulation or a strain-induced modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or "nanomembranes."

Electrically driven deep ultraviolet MgZnO lasers at room temperature

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suja, Mohammad; Bashar, Sunayna Binte; Debnath, Bishwajit

Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. Here, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM)more » random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29-33 A/cm 2 are achieved. Furthermore, numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.« less

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Electrically driven deep ultraviolet MgZnO lasers at room temperature

DOE PAGES

Suja, Mohammad; Bashar, Sunayna Binte; Debnath, Bishwajit; ...

2017-06-01

Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. Here, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM)more » random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29-33 A/cm 2 are achieved. Furthermore, numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.« less

Photo-induced transformation process at gold clusters-semiconductor interface: Implications for the complexity of gold clusters-based photocatalysis

PubMed Central

Liu, Siqi; Xu, Yi-Jun

2016-01-01

The recent thrust in utilizing atomically precise organic ligands protected gold clusters (Au clusters) as photosensitizer coupled with semiconductors for nano-catalysts has led to the claims of improved efficiency in photocatalysis. Nonetheless, the influence of photo-stability of organic ligands protected-Au clusters at the Au/semiconductor interface on the photocatalytic properties remains rather elusive. Taking Au clusters–TiO2 composites as a prototype, we for the first time demonstrate the photo-induced transformation of small molecular-like Au clusters to larger metallic Au nanoparticles under different illumination conditions, which leads to the diverse photocatalytic reaction mechanism. This transformation process undergoes a diffusion/aggregation mechanism accompanied with the onslaught of Au clusters by active oxygen species and holes resulting from photo-excited TiO2 and Au clusters. However, such Au clusters aggregation can be efficiently inhibited by tuning reaction conditions. This work would trigger rational structural design and fine condition control of organic ligands protected-metal clusters-semiconductor composites for diverse photocatalytic applications with long-term photo-stability. PMID:26947754

Photo-induced transformation process at gold clusters-semiconductor interface: Implications for the complexity of gold clusters-based photocatalysis

NASA Astrophysics Data System (ADS)

Liu, Siqi; Xu, Yi-Jun

2016-03-01

The recent thrust in utilizing atomically precise organic ligands protected gold clusters (Au clusters) as photosensitizer coupled with semiconductors for nano-catalysts has led to the claims of improved efficiency in photocatalysis. Nonetheless, the influence of photo-stability of organic ligands protected-Au clusters at the Au/semiconductor interface on the photocatalytic properties remains rather elusive. Taking Au clusters-TiO2 composites as a prototype, we for the first time demonstrate the photo-induced transformation of small molecular-like Au clusters to larger metallic Au nanoparticles under different illumination conditions, which leads to the diverse photocatalytic reaction mechanism. This transformation process undergoes a diffusion/aggregation mechanism accompanied with the onslaught of Au clusters by active oxygen species and holes resulting from photo-excited TiO2 and Au clusters. However, such Au clusters aggregation can be efficiently inhibited by tuning reaction conditions. This work would trigger rational structural design and fine condition control of organic ligands protected-metal clusters-semiconductor composites for diverse photocatalytic applications with long-term photo-stability.

High Volume Manufacturing and Field Stability of MEMS Products

NASA Astrophysics Data System (ADS)

Martin, Jack

Low volume MEMS/NEMS production is practical when an attractive concept is implemented with business, manufacturing, packaging, and test support. Moving beyond this to high volume production adds requirements on design, process control, quality, product stability, market size, market maturity, capital investment, and business systems. In a broad sense, this chapter uses a case study approach: It describes and compares the silicon-based MEMS accelerometers, pressure sensors, image projection systems, and gyroscopes that are in high volume production. Although they serve several markets, these businesses have common characteristics. For example, the manufacturing lines use automated semiconductor equipment and standard material sets to make consistent products in large quantities. Standard, well controlled processes are sometimes modified for a MEMS product. However, novel processes that cannot run with standard equipment and material sets are avoided when possible. This reliance on semiconductor tools, as well as the organizational practices required to manufacture clean, particle-free products partially explains why the MEMS market leaders are integrated circuit manufacturers. There are other factors. MEMS and NEMS are enabling technologies, so it can take several years for high volume applications to develop. Indeed, market size is usually a strong function of price. This becomes a vicious circle, because low price requires low cost - a result that is normally achieved only after a product is in high volume production. During the early years, IC companies reduced cost and financial risk by using existing facilities for low volume MEMS production. As a result, product architectures are partially determined by capabilities developed for previous products. This chapter includes a discussion of MEMS product architecture with particular attention to the impact of electronic integration, packaging, and surfaces. Packaging and testing are critical, because they are significant factors in MEMS product cost. These devices have extremelyhigh surface/volume ratios, so performance and stability may depend on the control of surface characteristics after packaging. Looking into the future, the competitive advantage of IC suppliers will decrease as small companies learn to integrate MEMS/NEMS devices on CMOS foundry wafers. Packaging challenges still remain, because most MEMS/NEMS products must interact with the environment without degrading stability or reliability. Generic packaging solutions are unlikely. However, packaging subcontractors recognize that MEMS/NEMS is a growth opportunity. They will spread the overhead burden of high-capital-cost-facilities by developing flexible processes in order to package several types of moderate volume integrated MEMS/NEMS products on the same equipment.

High Volume Manufacturing and Field Stability of MEMS Products

NASA Astrophysics Data System (ADS)

Martin, Jack

Low volume MEMS/NEMS production is practical when an attractive concept is implemented with business, manufacturing, packaging, and test support. Moving beyond this to high volume production adds requirements on design, process control, quality, product stability, market size, market maturity, capital investment, and business systems. In a broad sense, this chapter uses a case study approach: It describes and compares the silicon-based MEMS accelerometers, pressure sensors, image projection systems, and gyroscopes that are in high volume production. Although they serve several markets, these businesses have common characteristics. For example, the manufacturing lines use automated semiconductor equipment and standard material sets to make consistent products in large quantities. Standard, well controlled processes are sometimes modified for a MEMS product. However, novel processes that cannot run with standard equipment and material sets are avoided when possible. This reliance on semiconductor tools, as well as the organizational practices required to manufacture clean, particle-free products partially explains why the MEMS market leaders are integrated circuit manufacturers. There are other factors. MEMS and NEMS are enabling technologies, so it can take several years for high volume applications to develop. Indeed, market size is usually a strong function of price. This becomes a vicious circle, because low price requires low cost - a result that is normally achieved only after a product is in high volume production. During the early years, IC companies reduced cost and financial risk by using existing facilities for low volume MEMS production. As a result, product architectures are partially determined by capabilities developed for previous products. This chapter includes a discussion of MEMS product architecture with particular attention to the impact of electronic integration, packaging, and surfaces. Packaging and testing are critical, because they are significant factors in MEMS product cost. These devices have extremely high surface/volume ratios, so performance and stability may depend on the control of surface characteristics after packaging. Looking into the future, the competitive advantage of IC suppliers will decrease as small companies learn to integrate MEMS/NEMS devices on CMOS foundry wafers. Packaging challenges still remain, because most MEMS/NEMS products must interact with the environment without degrading stability or reliability. Generic packaging solutions are unlikely. However, packaging subcontractors recognize that MEMS/NEMS is a growth opportunity. They will spread the overhead burden of high-capital-cost-facilities by developing flexible processes in order to package several types of moderate volume integrated MEMS/NEMS products on the same equipment.

Multiphoton microscopy in every lab: the promise of ultrafast semiconductor disk lasers

NASA Astrophysics Data System (ADS)

Emaury, Florian; Voigt, Fabian F.; Bethge, Philipp; Waldburger, Dominik; Link, Sandro M.; Carta, Stefano; van der Bourg, Alexander; Helmchen, Fritjof; Keller, Ursula

2017-07-01

We use an ultrafast diode-pumped semiconductor disk laser (SDL) to demonstrate several applications in multiphoton microscopy. The ultrafast SDL is based on an optically pumped Vertical External Cavity Surface Emitting Laser (VECSEL) passively mode-locked with a semiconductor saturable absorber mirror (SESAM) and generates 170-fs pulses at a center wavelength of 1027 nm with a repetition rate of 1.63 GHz. We demonstrate the suitability of this laser for structural and functional multiphoton in vivo imaging in both Drosophila larvae and mice for a variety of fluorophores (including mKate2, tdTomato, Texas Red, OGB-1, and R-CaMP1.07) and for endogenous second-harmonic generation in muscle cell sarcomeres. We can demonstrate equivalent signal levels compared to a standard 80-MHz Ti:Sapphire laser when we increase the average power by a factor of 4.5 as predicted by theory. In addition, we compare the bleaching properties of both laser systems in fixed Drosophila larvae and find similar bleaching kinetics despite the large difference in pulse repetition rates. Our results highlight the great potential of ultrafast diode-pumped SDLs for creating a cost-efficient and compact alternative light source compared to standard Ti:Sapphire lasers for multiphoton imaging.

Multiphoton in vivo imaging with a femtosecond semiconductor disk laser

PubMed Central

Voigt, Fabian F.; Emaury, Florian; Bethge, Philipp; Waldburger, Dominik; Link, Sandro M.; Carta, Stefano; van der Bourg, Alexander; Helmchen, Fritjof; Keller, Ursula

2017-01-01

We use an ultrafast diode-pumped semiconductor disk laser (SDL) to demonstrate several applications in multiphoton microscopy. The ultrafast SDL is based on an optically pumped Vertical External Cavity Surface Emitting Laser (VECSEL) passively mode-locked with a semiconductor saturable absorber mirror (SESAM) and generates 170-fs pulses at a center wavelength of 1027 nm with a repetition rate of 1.63 GHz. We demonstrate the suitability of this laser for structural and functional multiphoton in vivo imaging in both Drosophila larvae and mice for a variety of fluorophores (including mKate2, tdTomato, Texas Red, OGB-1, and R-CaMP1.07) and for endogenous second-harmonic generation in muscle cell sarcomeres. We can demonstrate equivalent signal levels compared to a standard 80-MHz Ti:Sapphire laser when we increase the average power by a factor of 4.5 as predicted by theory. In addition, we compare the bleaching properties of both laser systems in fixed Drosophila larvae and find similar bleaching kinetics despite the large difference in pulse repetition rates. Our results highlight the great potential of ultrafast diode-pumped SDLs for creating a cost-efficient and compact alternative light source compared to standard Ti:Sapphire lasers for multiphoton imaging. PMID:28717563

Performance issues for iterative solvers in device simulation

NASA Technical Reports Server (NTRS)

Fan, Qing; Forsyth, P. A.; Mcmacken, J. R. F.; Tang, Wei-Pai

1994-01-01

Due to memory limitations, iterative methods have become the method of choice for large scale semiconductor device simulation. However, it is well known that these methods still suffer from reliability problems. The linear systems which appear in numerical simulation of semiconductor devices are notoriously ill-conditioned. In order to produce robust algorithms for practical problems, careful attention must be given to many implementation issues. This paper concentrates on strategies for developing robust preconditioners. In addition, effective data structures and convergence check issues are also discussed. These algorithms are compared with a standard direct sparse matrix solver on a variety of problems.

Photoconductivity response time in amorphous semiconductors

NASA Astrophysics Data System (ADS)

Adriaenssens, G. J.; Baranovskii, S. D.; Fuhs, W.; Jansen, J.; Öktü, Ö.

1995-04-01

The photoconductivity response time of amorphous semiconductors is examined theoretically on the basis of standard definitions for free- and trapped-carrier lifetimes, and experimentally for a series of a-Si1-xCx:H alloys with x<0.1. Particular attention is paid to its dependence on carrier generation rate and temperature. As no satisfactory agreement between models and experiments emerges, a simple theory is developed that can account for the experimental observations on the basis of the usual multiple-trappping ideas, provided a small probability of direct free-carrier recombination is included. The theory leads to a stretched-exponential photocurrent decay.

Detection of X-ray photons by solution-processed organic-inorganic perovskites

PubMed Central

Yakunin, Sergii; Sytnyk, Mykhailo; Kriegner, Dominik; Shrestha, Shreetu; Richter, Moses; Matt, Gebhard J.; Azimi, Hamed; Brabec, Christoph J.; Stangl, Julian; Kovalenko, Maksym V.; Heiss, Wolfgang

2017-01-01

The evolution of real-time medical diagnostic tools such as angiography and computer tomography from radiography based on photographic plates was enabled by the development of integrated solid-state X-ray photon detectors, based on conventional solid-state semiconductors. Recently, for optoelectronic devices operating in the visible and near infrared spectral regions, solution-processed organic and inorganic semiconductors have also attracted immense attention. Here we demonstrate a possibility to use such inexpensive semiconductors for sensitive detection of X-ray photons by direct photon-to-current conversion. In particular, methylammonium lead iodide perovskite (CH3NH3PbI3) offers a compelling combination of fast photoresponse and a high absorption cross-section for X-rays, owing to the heavy Pb and I atoms. Solution processed photodiodes as well as photoconductors are presented, exhibiting high values of X-ray sensitivity (up to 25 µC mGyair-1 cm-3) and responsivity (1.9×104 carriers/photon), which are commensurate with those obtained by the current solid-state technology. PMID:28553368

Charge injection in solution-processed organic field-effect transistors: physics, models and characterization methods.

PubMed

Natali, Dario; Caironi, Mario

2012-03-15

A high-mobility organic semiconductor employed as the active material in a field-effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll-to-roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte-gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution-processed and where the most common architectures are adopted, are ∼10 kΩ·cm for transistors with a field effect mobility in the 0.1-1 cm(2)/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case-by-case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the field for a long time. Only recently, as the understanding of the rather complex physical processes at the metal/semiconductor interfaces has improved, more general approaches, with a validity that extends to several materials, are being proposed and successfully tested in the literature. Only a combined scientific and technological effort, on the one side to fully understand contact phenomena and on the other to completely master the tailoring of interfaces, will enable the development of advanced organic electronics applications and their widespread adoption in low-cost, large-area printed circuits. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

PubMed

Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

2014-10-20

In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.

Effect of top-down nanomachining on electrical conduction properties of TiO2 nanostructure-based chemical sensors.

PubMed

Francioso, L; De Pascali, C; Capone, S; Siciliano, P

2012-03-09

The present research was motivated by the growing interest of the scientific community towards the understanding of basic gas-surface interaction mechanisms in 1D nanostructured metal oxide semiconductors, whose significantly enhanced chemical detection sensitivity is known. In this work, impedance spectroscopy (IS) was used to evaluate how a top-down patterning of the sensitive layer can modulate the electrical properties of a gas sensor based on a fully integrated nanometric array of TiO(2) polycrystalline strips. The aim of the study was supported by comparative experimental activity carried out on different thin film gas sensors based on identical TiO(2) polycrystalline sensitive thin films. The impedance responses of the investigated devices under dry air (as the reference environment) and ethanol vapors (as the target gas) were fitted by a complex nonlinear least-squares method using LEVM software, in order to find an appropriate equivalent circuit describing the main conduction processes involved in the gas/semiconductor interactions. Two different equivalent circuit models were identified as completely representative of the TiO(2) thin film and the TiO(2) nanostructure-based gas sensors, respectively. All the circuit parameters were quantified and the related standard deviations were evaluated. The simulated results well approximated the experimental data as indicated by the small mean errors of the fits (in the range of 10(-4)) and the small standard deviations of the circuit parameters. In addition to the substrate capacitance, three different contributions to the overall conduction mechanism were identified for both equivalent circuits: bulk conductivity, intergrain contact and semiconductor-electrode contact, electrically represented by an ideal resistor R(g), a parallel R(gb)C(gb) block and a parallel R(c)-CPE(c) combination, respectively. In terms of equivalent circuit modeling, the sensitive layer patterning introduced an additional parameter in parallel connection with the whole circuit block. Such a circuit element (an ideal inductor, L) has an average value of about 125 μH and exhibits no direct dependence on the analyte gas concentration. Its presence could be due to complex mutual inductance effects occurring both between all the adjacent nanostrips (10 µm spaced) and between the nanostrips and the n-type-doped silicon substrate underneath the thermal oxide (wire/plate effect), where a two order of magnitude higher magnetic permeability of silicon can give L values comparable with those estimated by the fitting procedure. Slightly modified experimental models confirmed that the theoretical background, regulating thin film devices based on metal oxide semiconductors, is also valid for nanopatterned devices.

Thermally grown oxide and diffusions for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1979-01-01

A totally automated facility for semiconductor oxidation and diffusion was developed using a state-of-the-art diffusion furnace and high temperature grown oxides. Major innovations include: (1) a process controller specifically for semiconductor processing; (2) an automatic loading system to accept wafers from an air track, insert them into a quartz carrier and then place the carrier on a paddle for insertion into the furnace; (3) automatic unloading of the wafers back onto the air track, and (4) boron diffusion using diborane with plus or minus 5 percent uniformity. Processes demonstrated include Wet and dry oxidation for general use and for gate oxide, boron diffusion, phosphorous diffusion, and sintering.

GaN/NbN epitaxial semiconductor/superconductor heterostructures.

PubMed

Yan, Rusen; Khalsa, Guru; Vishwanath, Suresh; Han, Yimo; Wright, John; Rouvimov, Sergei; Katzer, D Scott; Nepal, Neeraj; Downey, Brian P; Muller, David A; Xing, Huili G; Meyer, David J; Jena, Debdeep

2018-03-07

Epitaxy is a process by which a thin layer of one crystal is deposited in an ordered fashion onto a substrate crystal. The direct epitaxial growth of semiconductor heterostructures on top of crystalline superconductors has proved challenging. Here, however, we report the successful use of molecular beam epitaxy to grow and integrate niobium nitride (NbN)-based superconductors with the wide-bandgap family of semiconductors-silicon carbide, gallium nitride (GaN) and aluminium gallium nitride (AlGaN). We apply molecular beam epitaxy to grow an AlGaN/GaN quantum-well heterostructure directly on top of an ultrathin crystalline NbN superconductor. The resulting high-mobility, two-dimensional electron gas in the semiconductor exhibits quantum oscillations, and thus enables a semiconductor transistor-an electronic gain element-to be grown and fabricated directly on a crystalline superconductor. Using the epitaxial superconductor as the source load of the transistor, we observe in the transistor output characteristics a negative differential resistance-a feature often used in amplifiers and oscillators. Our demonstration of the direct epitaxial growth of high-quality semiconductor heterostructures and devices on crystalline nitride superconductors opens up the possibility of combining the macroscopic quantum effects of superconductors with the electronic, photonic and piezoelectric properties of the group III/nitride semiconductor family.

Theory of raman scattering from molecules adsorbed at semiconductor surfaces

NASA Astrophysics Data System (ADS)

Ueba, H.

1983-09-01

A theory is presented to calculate the Raman polarizability of an adsorbed molecule at a semiconductor surface, where the electronic excitation in the molecular site interacts with excitons (elementary excitations in the semiconductor) through non-radiative energy transfer between them, in an intermediate state in the Raman scattering process. The Raman polarizability thus calculated is found to exhibit a peak at the energy corresponding to a resonant excitation of excitons, thereby suggesting the possibility of surface enhanced Raman scattering on semiconductor surfaces. The mechanism studied here can also give an explanation of a recent observation of the Raman excitation profiles of p-NDMA and p-DMAAB adsorbed on ZnO or TiO 2, where those profiles were best described by assuming a resonant intermediate state of the exciton transition in the semiconductors. It is also demonstrated that in addition to vibrational Raman scattering, excitonic Raman scattering of adsorbed molecules will occur in the coupled molecule-semiconductor system, where the molecular returns to its ground electronic state by leaving an exciton in the semiconductor. A spectrum of the excitonic Raman scattering is expected to appear in the background of the vibrational Raman band and to be characterized by the electronic structure of excitons. A desirable experiment is suggested for an examination of the theory.

Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

NASA Astrophysics Data System (ADS)

Singh, Anil; Agarwal, Alpana

2016-10-01

A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

Fast optical detecting media based on semiconductor nanostructures for recording images obtained using charges of free photocarriers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kasherininov, P. G., E-mail: peter.kasherininov@mail.ioffe.ru; Tomasov, A. A.; Beregulin, E. V.

2011-01-15

Available published data on the properties of optical recording media based on semiconductor structures are reviewed. The principles of operation, structure, parameters, and the range of application for optical recording media based on MIS structures formed of photorefractive crystals with a thick layer of insulator and MIS structures with a liquid crystal as the insulator (the MIS LC modulators), as well as the effect of optical bistability in semiconductor structures (semiconductor MIS structures with nanodimensionally thin insulator (TI) layer, M(TI)S nanostructures). Special attention is paid to recording media based on the M(TI)S nanostructures promising for fast processing of highly informativemore » images and to fabrication of optoelectronic correlators of images for noncoherent light.« less

Photocatalytic degradation of model textile dyes in wastewater using ZnO as semiconductor catalyst.

PubMed

Chakrabarti, Sampa; Dutta, Binay K

2004-08-30

Semiconductor photocatalysis often leads to partial or complete mineralization of organic pollutants. Upon irradiation with UV/visible light, semiconductors catalyze redox reactions in presence of air/O2 and water. Here, the potential of a common semiconductor, ZnO, has been explored as an effective catalyst for the photodegradation of two model dyes: Methylene Blue and Eosin Y. A 16 W lamp was the source of UV-radiation in a batch reactor. The effects of process parameters like, catalyst loading, initial dye concentration, airflow rate, UV-radiation intensity, and pH on the extent of photo degradation have been investigated. Substantial reduction of COD, besides removal of colour, was also achieved. A rate equation for the degradation based on Langmuir-Hinshelwood model has been proposed.

The rates of charge separation and energy destructive charge recombination processes within an organic dyad in presence of metal-semiconductor core shell nanocomposites.

PubMed

Mandal, Gopa; Bhattacharya, Sudeshna; Das, Subrata; Ganguly, Tapan

2012-01-01

Steady state and time resolved spectroscopic measurements were made at the ambient temperature on an organic dyad, 1-(4-Chloro-phenyl)-3-(4-methoxy-naphthalen-1-yl)-propenone (MNCA), where the donor 1-methoxynaphthalene (1 MNT) is connected with the acceptor p-chloroacetophenone (PCA) by an unsaturated olefinic bond, in presence of Ag@TiO2 nanoparticles. Time resolved fluorescence and absorption measurements reveal that the rate parameters associated with charge separation, k(CS), within the dyad increases whereas charge recombination rate k(CR) reduces significantly when the surrounding medium is changed from only chloroform to mixture of chloroform and Ag@TiO2 (noble metal-semiconductor) nanocomposites. The observed results indicate that the dyad being combined with core-shell nanocomposites may form organic-inorganic nanocomposite system useful for developing light energy conversion devices. Use of metal-semiconductor nanoparticles may provide thus new ways to modulate charge recombination processes in light energy conversion devices. From comparison with the results obtained in our earlier investigations with only TiO2 nanoparticles, it is inferred that much improved version of light energy conversion device, where charge-separated species could be protected for longer period of time of the order of millisecond, could be designed by using metal-semiconductor core-shell nanocomposites rather than semiconductor nanoparticles only.

Real-time trace ambient ammonia monitor for haze prevention

NASA Astrophysics Data System (ADS)

Nishimura, Katsumi; Sakaguchi, Yuhei; Crosson, Eric; Wahl, Edward; Rella, Chris

2007-05-01

In photolithography, haze prevention is of critical importance to integrated circuit chip manufacturers. Numerous studies have established that the presence of ammonia in the photolithography tool can cause haze to form on optical surfaces resulting in permanent damage to costly deep ultra-violet optics. Ammonia is emitted into wafer fab air by various semiconductor processes including coating steps in the track and CMP. The workers in the clean room also emit a significant amount of ammonia. Chemical filters are typically used to remove airborne contamination from critical locations but their lifetime and coverage cannot offer complete protection. Therefore, constant or periodic monitoring of airborne ammonia at parts-per-trillion (ppt) levels is critical to insure the integrity of the lithography process. Real time monitoring can insure that an accidental ammonia release in the clean room is detected before any optics is damaged. We have developed a transportable, highly accurate, highly specific, real-time trace gas monitor that detects ammonia using Cavity Ring-Down Spectroscopy (CRDS). The trace gas monitor requires no calibration gas standards, and can measure ammonia with 200 ppt sensitivity in five minutes with little or no baseline drift. In addition, the high spectral resolution of CRDS makes the analyzer less susceptible to interference from other gases when compared to other detection methods. In this paper we describe the monitor, focus on its performance, discuss the results of a careful comparison with ion chromatography (IC), and present field data measured inside the aligner and the reticule stocker at a semiconductor fab.

Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

DOEpatents

Mazur, Eric; Shen, Mengyan

2013-12-03

The present invention generally provides a semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

Emergence of transverse spin in optical modes of semiconductor nanowires

DOE PAGES

Alizadeh, M. H.; Reinhard, Bjorn M.

2016-04-11

The transverse spin angular momentum of light has recently received tremendous attention as it adds a new degree of freedom for controlling light-matter interactions. In this work we demonstrate the generation of transverse spin angular momentum by the weakly-guided mode of semiconductor nanowires. The evanescent field of these modes in combination with the transversality condition rigorously accounts for the occurrence of transverse spin angular momentum. Furthermore, the intriguing and nontrivial spin properties of optical modes in semiconductor nanowires are of high interest for a broad range of new applications including chiral optical trapping, quantum information processing, and nanophotonic circuitry.

Method for depositing layers of high quality semiconductor material

DOEpatents

Guha, Subhendu; Yang, Chi C.

2001-08-14

Plasma deposition of substantially amorphous semiconductor materials is carried out under a set of deposition parameters which are selected so that the process operates near the amorphous/microcrystalline threshold. This threshold varies as a function of the thickness of the depositing semiconductor layer; and, deposition parameters, such as diluent gas concentrations, must be adjusted as a function of layer thickness. Also, this threshold varies as a function of the composition of the depositing layer, and in those instances where the layer composition is profiled throughout its thickness, deposition parameters must be adjusted accordingly so as to maintain the amorphous/microcrystalline threshold.

Highly Sensitive Flexible Pressure Sensors Based on Printed Organic Transistors with Centro-Apically Self-Organized Organic Semiconductor Microstructures.

PubMed

Yeo, So Young; Park, Sangsik; Yi, Yeon Jin; Kim, Do Hwan; Lim, Jung Ah

2017-12-13

A highly sensitive pressure sensor based on printed organic transistors with three-dimensionally self-organized organic semiconductor microstructures (3D OSCs) was demonstrated. A unique organic transistor with semiconductor channels positioned at the highest summit of printed cylindrical microstructures was achieved simply by printing an organic semiconductor and polymer blend on the plastic substrate without the use of additional etching or replication processes. A combination of the printed organic semiconductor microstructure and an elastomeric top-gate dielectric resulted in a highly sensitive organic field-effect transistor (FET) pressure sensor with a high pressure sensitivity of 1.07 kPa -1 and a rapid response time of <20 ms with a high reliability over 1000 cycles. The flexibility and high performance of the 3D OSC FET pressure sensor were exploited in the successful application of our sensors to real-time monitoring of the radial artery pulse, which is useful for healthcare monitoring, and to touch sensing in the e-skin of a realistic prosthetic hand.

Efficient light emission from inorganic and organic semiconductor hybrid structures by energy-level tuning

PubMed Central

Schlesinger, R.; Bianchi, F.; Blumstengel, S.; Christodoulou, C.; Ovsyannikov, R.; Kobin, B.; Moudgil, K.; Barlow, S.; Hecht, S.; Marder, S.R.; Henneberger, F.; Koch, N.

2015-01-01

The fundamental limits of inorganic semiconductors for light emitting applications, such as holographic displays, biomedical imaging and ultrafast data processing and communication, might be overcome by hybridization with their organic counterparts, which feature enhanced frequency response and colour range. Innovative hybrid inorganic/organic structures exploit efficient electrical injection and high excitation density of inorganic semiconductors and subsequent energy transfer to the organic semiconductor, provided that the radiative emission yield is high. An inherent obstacle to that end is the unfavourable energy level offset at hybrid inorganic/organic structures, which rather facilitates charge transfer that quenches light emission. Here, we introduce a technologically relevant method to optimize the hybrid structure's energy levels, here comprising ZnO and a tailored ladder-type oligophenylene. The ZnO work function is substantially lowered with an organometallic donor monolayer, aligning the frontier levels of the inorganic and organic semiconductors. This increases the hybrid structure's radiative emission yield sevenfold, validating the relevance of our approach. PMID:25872919

Processing approach towards the formation of thin-film Cu(In,Ga)Se2

DOEpatents

Beck, Markus E.; Noufi, Rommel

2003-01-01

A two-stage method of producing thin-films of group IB-IIIA-VIA on a substrate for semiconductor device applications includes a first stage of depositing an amorphous group IB-IIIA-VIA precursor onto an unheated substrate, wherein the precursor contains all of the group IB and group IIIA constituents of the semiconductor thin-film to be produced in the stoichiometric amounts desired for the final product, and a second stage which involves subjecting the precursor to a short thermal treatment at 420.degree. C.-550.degree. C. in a vacuum or under an inert atmosphere to produce a single-phase, group IB-III-VIA film. Preferably the precursor also comprises the group VIA element in the stoichiometric amount desired for the final semiconductor thin-film. The group IB-IIIA-VIA semiconductor films may be, for example, Cu(In,Ga)(Se,S).sub.2 mixed-metal chalcogenides. The resultant supported group IB-IIIA-VIA semiconductor film is suitable for use in photovoltaic applications.

Absorption of light dark matter in semiconductors

DOE PAGES

Hochberg, Yonit; Lin, Tongyan; Zurek, Kathryn M.

2017-01-01

Semiconductors are by now well-established targets for direct detection of MeV to GeV dark matter via scattering off electrons. We show that semiconductor targets can also detect significantly lighter dark matter via an absorption process. When the dark matter mass is above the band gap of the semiconductor (around an eV), absorption proceeds by excitation of an electron into the conduction band. Below the band gap, multiphonon excitations enable absorption of dark matter in the 0.01 eV to eV mass range. Energetic dark matter particles emitted from the sun can also be probed for masses below an eV. We derivemore » the reach for absorption of a relic kinetically mixed dark photon or pseudoscalar in germanium and silicon, and show that existing direct detection results already probe new parameter space. Finally, with only a moderate exposure, low-threshold semiconductor target experiments can exceed current astrophysical and terrestrial constraints on sub-keV bosonic dark matter.« less

Plastic Deformation as a Means to Achieve Stretchable Polymer Semiconductors

NASA Astrophysics Data System (ADS)

O'Connor, Brendan

Developing intrinsically stretchable semiconductors will seamlessly transition traditional devices into a stretchable platform. Polymer semiconductors are inherently soft materials due to the weak van der Waal intermolecular bonding allowing for flexible devices. However, these materials are not typically stretchable and when large strains are applied they either crack or plastically deform. Here, we study the use of repeated plastic deformation as a means of achieving stretchable films. In this talk, critical aspects of polymer semiconductor material selection, morphology and interface properties will be discussed that enable this approach of achieving stretchable films. We show that one can employ high performance donor-acceptor polymer semiconductors that are typically brittle through proper polymer blending to significantly increase ductility to achieve stretchable films. We demonstrate a polymer blend film that can be repeatedly deformed over 65%, while maintaining charge mobility consistently above 0.15 cm2/Vs. During the stretching process we show that the films follow a well-controlled repeated deformation pattern for over 100 stretching cycles.

Efficient light emission from inorganic and organic semiconductor hybrid structures by energy-level tuning.

PubMed

Schlesinger, R; Bianchi, F; Blumstengel, S; Christodoulou, C; Ovsyannikov, R; Kobin, B; Moudgil, K; Barlow, S; Hecht, S; Marder, S R; Henneberger, F; Koch, N

2015-04-15

The fundamental limits of inorganic semiconductors for light emitting applications, such as holographic displays, biomedical imaging and ultrafast data processing and communication, might be overcome by hybridization with their organic counterparts, which feature enhanced frequency response and colour range. Innovative hybrid inorganic/organic structures exploit efficient electrical injection and high excitation density of inorganic semiconductors and subsequent energy transfer to the organic semiconductor, provided that the radiative emission yield is high. An inherent obstacle to that end is the unfavourable energy level offset at hybrid inorganic/organic structures, which rather facilitates charge transfer that quenches light emission. Here, we introduce a technologically relevant method to optimize the hybrid structure's energy levels, here comprising ZnO and a tailored ladder-type oligophenylene. The ZnO work function is substantially lowered with an organometallic donor monolayer, aligning the frontier levels of the inorganic and organic semiconductors. This increases the hybrid structure's radiative emission yield sevenfold, validating the relevance of our approach.

Induced Charge Fluctuations in Semiconductor Detectors with a Cylindrical Geometry

NASA Astrophysics Data System (ADS)

Samedov, Victor V.

2018-01-01

Now, compound semiconductors are very appealing for hard X-ray room-temperature detectors for medical and astrophysical applications. Despite the attractive properties of compound semiconductors, such as high atomic number, high density, wide band gap, low chemical reactivity and long-term stability, poor hole and electron mobility-lifetime products degrade the energy resolution of these detectors. The main objective of the present study is in development of a mathematical model of the process of the charge induction in a cylindrical geometry with accounting for the charge carrier trapping. The formulae for the moments of the distribution function of the induced charge and the formulae for the mean amplitude and the variance of the signal at the output of the semiconductor detector with a cylindrical geometry were derived. It was shown that the power series expansions of the detector amplitude and the variance in terms of the inverse bias voltage allow determining the Fano factor, electron mobility lifetime product, and the nonuniformity level of the trap density of the semiconductor material.

Shuttle Mission STS-50: Orbital Processing of High-Quality CdTe Compound Semiconductors Experiment: Final Flight Sample Characterization Report

NASA Technical Reports Server (NTRS)

Larson, David J.; Casagrande, Luis G.; DiMarzio, Don; Alexander, J. Iwan D.; Carlson, Fred; Lee, Taipo; Dudley, Michael; Raghathamachar, Balaji

1998-01-01

The Orbital Processing of High-Quality Doped and Alloyed CdTe Compound Semiconductors program was initiated to investigate, quantitatively, the influences of gravitationally dependent phenomena on the growth and quality of bulk compound semiconductors. The objective was to improve crystal quality (both structural and compositional) and to better understand and control the variables within the crystal growth production process. The empirical effort entailed the development of a terrestrial (one-g) experiment baseline for quantitative comparison with microgravity (mu-g) results. This effort was supported by the development of high-fidelity process models of heat transfer, fluid flow and solute redistribution, and thermo-mechanical stress occurring in the furnace, safety cartridge, ampoule, and crystal throughout the melting, seeding, crystal growth, and post-solidification processing. In addition, the sensitivity of the orbital experiments was analyzed with respect to the residual microgravity (mu-g) environment, both steady state and g-jitter. CdZnTe crystals were grown in one-g and in mu-g. Crystals processed terrestrially were grown at the NASA Ground Control Experiments Laboratory (GCEL) and at Grumman Aerospace Corporation (now Northrop Grumman Corporation). Two mu-g crystals were grown in the Crystal Growth Furnace (CGF) during the First United States Microgravity Laboratory Mission (USML-1), STS-50, June 24 - July 9, 1992.

Estimates of occupational safety and health impacts resulting from large-scale production of major photovoltaic technologies

DOE Office of Scientific and Technical Information (OSTI.GOV)

Owens, T.; Ungers, L.; Briggs, T.

1980-08-01

The purpose of this study is to estimate both quantitatively and qualitatively, the worker and societal risks attributable to four photovoltaic cell (solar cell) production processes. Quantitative risk values were determined by use of statistics from the California semiconductor industry. The qualitative risk assessment was performed using a variety of both governmental and private sources of data. The occupational health statistics derived from the semiconductor industry were used to predict injury and fatality levels associated with photovoltaic cell manufacturing. The use of these statistics to characterize the two silicon processes described herein is defensible from the standpoint that many ofmore » the same process steps and materials are used in both the semiconductor and photovoltaic industries. These health statistics are less applicable to the gallium arsenide and cadmium sulfide manufacturing processes, primarily because of differences in the materials utilized. Although such differences tend to discourage any absolute comparisons among the four photovoltaic cell production processes, certain relative comparisons are warranted. To facilitate a risk comparison of the four processes, the number and severity of process-related chemical hazards were assessed. This qualitative hazard assessment addresses both the relative toxicity and the exposure potential of substances in the workplace. In addition to the worker-related hazards, estimates of process-related emissions and wastes are also provided.« less

Work function characterization of solution-processed cobalt silicide

DOE PAGES

Ullah, Syed Shihab; Robinson, Matt; Hoey, Justin; ...

2012-05-08

Cobalt silicide thin films were prepared by spin-coating Si6H12-based inks onto various substrates followed by a thermal treatment. The work function of the solution processed Co-Si was determined by both capacitance-voltage (C-V) measurements of metal-oxide-semiconductor (MOS) structures as well as by ultraviolet photoelectron spectroscopy (UPS). The UPS-derived work function was 4.80 eV for a Co-Si film on Si (100) while C-V of MOS structures yielded a work function of 4.36 eV where the metal was solution-processed Co-Si, the oxide was SiO2 and the semiconductor was a B-doped Si wafer.

Semiconductor grade, solar silicon purification project

NASA Technical Reports Server (NTRS)

Ingle, W. M.; Rosler, R. R.; Thompson, S. W.; Chaney, R. E.

1979-01-01

Experimental apparatus and procedures used in the development of a 3-step SiF2(x) polymer transport purification process are described. Both S.S.M.S. and E.S. analysis demonstrated that major purification had occured and some samples were indistinguishable from semiconductor grade silicon (except possibly for phosphorus). Recent electrical analysis via crystal growth reveals that the product contains compensated phosphorus and boron. The low projected product cost and short energy payback time suggest that the economics of this process will result in a cost less than the goal of $10/Kg(1975 dollars). The process appears to be readily scalable to a major silicon purification facility.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

PubMed

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

Temperature-dependent mechanical behavior of silicon dioxide, gold and gold-vanadium thin films for VLSI integrated circuits and MicroElectroMechanical systems (MEMs)

NASA Astrophysics Data System (ADS)

Lin, Ming-Tzer

The Semiconductor Industry has grown rapidly in the last twenty years. The national technology roadmap for semiconductors plans for developing the complexity and packing density of semiconductor devices into the next decade, allowing ever smaller and more densely packed structures to be fabricated. Recently, MEMS (Micro-Electro-Mechanical Systems) have become important in modern technology. The goal of MEMs is to integrate many types of miniature devices on a single chip, creating a new micro-world. The oxidation of silicon is one of the most important processes in semiconductor technology. Producing high-quality IC's and MEMS devices requires an understanding of the basic oxidation mechanism. In addition, for the reliability of IC's and MEMS devices, the mechanical properties of the oxide play a critical role. There has been an apparent convergence of opinion on the relevant mechanism leading to the "standard computational model" for stress effects on silicon oxidation. This model has recently become suspect. Most of the reasonably direct experimental data on the flow properties of SiO 2 thin film do not support a stress-dependent viscosity of the sort envisioned by the model. Gold and gold vanadium alloys are used in electrical interconnections and in radio frequency switch contacts for the semiconductor industry, MEMs sensors for the aerospace industry and also in brain probes by the bioelectronics mechanical industry. Despite the strong potential usage of gold and gold vanadium thin films at the small scale, very little is known about their mechanical properties. Our goal was to experimentally investigate stress and its influence on SiO2 thin films and the mechanical properties of gold and gold vanadium thin films at room temperature and at elevated temperature of different vanadium concentration. We found that the application of relatively small amounts of bending to an oxidizing silicon substrate leads to significant decreases in oxide thickness in the ultrathin oxide regime. Both tensile and compressive bending retard oxide growth, although compressive bending results in somewhat thinner oxides than does tensile bending. We also determined the modulus of gold and gold vanadium, and discovered that there is some evidence for a vanadium concentration dependence of the mechanical properties.

Performance Management and Optimization of Semiconductor Design Projects

NASA Astrophysics Data System (ADS)

Hinrichs, Neele; Olbrich, Markus; Barke, Erich

2010-06-01

The semiconductor industry is characterized by fast technological changes and small time-to-market windows. Improving productivity is the key factor to stand up to the competitors and thus successfully persist in the market. In this paper a Performance Management System for analyzing, optimizing and evaluating chip design projects is presented. A task graph representation is used to optimize the design process regarding time, cost and workload of resources. Key Performance Indicators are defined in the main areas cost, profit, resources, process and technical output to appraise the project.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1979-01-01

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

A method to accelerate creation of plasma etch recipes using physics and Bayesian statistics

NASA Astrophysics Data System (ADS)

Chopra, Meghali J.; Verma, Rahul; Lane, Austin; Willson, C. G.; Bonnecaze, Roger T.

2017-03-01

Next generation semiconductor technologies like high density memory storage require precise 2D and 3D nanopatterns. Plasma etching processes are essential to achieving the nanoscale precision required for these structures. Current plasma process development methods rely primarily on iterative trial and error or factorial design of experiment (DOE) to define the plasma process space. Here we evaluate the efficacy of the software tool Recipe Optimization for Deposition and Etching (RODEo) against standard industry methods at determining the process parameters of a high density O2 plasma system with three case studies. In the first case study, we demonstrate that RODEo is able to predict etch rates more accurately than a regression model based on a full factorial design while using 40% fewer experiments. In the second case study, we demonstrate that RODEo performs significantly better than a full factorial DOE at identifying optimal process conditions to maximize anisotropy. In the third case study we experimentally show how RODEo maximizes etch rates while using half the experiments of a full factorial DOE method. With enhanced process predictions and more accurate maps of the process space, RODEo reduces the number of experiments required to develop and optimize plasma processes.

Process control of laser conduction welding by thermal imaging measurement with a color camera.

PubMed

Bardin, Fabrice; Morgan, Stephen; Williams, Stewart; McBride, Roy; Moore, Andrew J; Jones, Julian D C; Hand, Duncan P

2005-11-10

Conduction welding offers an alternative to keyhole welding. Compared with keyhole welding, it is an intrinsically stable process because vaporization phenomena are minimal. However, as with keyhole welding, an on-line process-monitoring system is advantageous for quality assurance to maintain the required penetration depth, which in conduction welding is more sensitive to changes in heat sinking. The maximum penetration is obtained when the surface temperature is just below the boiling point, and so we normally wish to maintain the temperature at this level. We describe a two-color optical system that we have developed for real-time temperature profile measurement of the conduction weld pool. The key feature of the system is the use of a complementary metal-oxide semiconductor standard color camera leading to a simplified low-cost optical setup. We present and discuss the real-time temperature measurement and control performance of the system when a defocused beam from a high power Nd:YAG laser is used on 5 mm thick stainless steel workpieces.

A small electron donor in cobalt complex electrolyte significantly improves efficiency in dye-sensitized solar cells

PubMed Central

Hao, Yan; Yang, Wenxing; Zhang, Lei; Jiang, Roger; Mijangos, Edgar; Saygili, Yasemin; Hammarström, Leif; Hagfeldt, Anders; Boschloo, Gerrit

2016-01-01

Photoelectrochemical approach to solar energy conversion demands a kinetic optimization of various light-induced electron transfer processes. Of great importance are the redox mediator systems accomplishing the electron transfer processes at the semiconductor/electrolyte interface, therefore affecting profoundly the performance of various photoelectrochemical cells. Here, we develop a strategy—by addition of a small organic electron donor, tris(4-methoxyphenyl)amine, into state-of-art cobalt tris(bipyridine) redox electrolyte—to significantly improve the efficiency of dye-sensitized solar cells. The developed solar cells exhibit efficiency of 11.7 and 10.5%, at 0.46 and one-sun illumination, respectively, corresponding to a 26% efficiency improvement compared with the standard electrolyte. Preliminary stability tests showed the solar cell retained 90% of its initial efficiency after 250 h continuous one-sun light soaking. Detailed mechanistic studies reveal the crucial role of the electron transfer cascade processes within the new redox system. PMID:28000672

A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. II. Spatio-temporal dynamics

NASA Astrophysics Data System (ADS)

Böhringer, Klaus; Hess, Ortwin

The spatio-temporal dynamics of novel semiconductor lasers is discussed on the basis of a space- and momentum-dependent full time-domain approach. To this means the space-, time-, and momentum-dependent Full-Time Domain Maxwell Semiconductor Bloch equations, derived and discussed in our preceding paper I [K. Böhringer, O. Hess, A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. I. Theoretical formulation], are solved by direct numerical integration. Focussing on the device physics of novel semiconductor lasers that profit, in particular, from recent advances in nanoscience and nanotechnology, we discuss the examples of photonic band edge surface emitting lasers (PBE-SEL) and semiconductor disc lasers (SDLs). It is demonstrated that photonic crystal effects can be obtained for finite crystal structures, and leading to a significant improvement in laser performance such as reduced lasing thresholds. In SDLs, a modern device concept designed to increase the power output of surface-emitters in combination with near-diffraction-limited beam quality, we explore the complex interplay between the intracavity optical fields and the quantum well gain material in SDL structures. Our simulations reveal the dynamical balance between carrier generation due to pumping into high energy states, momentum relaxation of carriers, and stimulated recombination from states near the band edge. Our full time-domain approach is shown to also be an excellent framework for the modelling of the interaction of high-intensity femtosecond and picosecond pulses with semiconductor nanostructures. It is demonstrated that group velocity dispersion, dynamical gain saturation and fast self-phase modulation (SPM) are the main causes for the induced changes and asymmetries in the amplified pulse shape and spectrum of an ultrashort high-intensity pulse. We attest that the time constants of the intraband scattering processes are critical to gain recovery. Moreover, we present new insight into the physics of nonlinear coherent pulse propagation phenomena in active (semiconductor) gain media. Our numerical full time-domain simulations are shown to generally agree well with analytical predictions, while in the case of optical pulses with large pulse areas or few-cycle pulses they reveal the limits of analytic approaches. Finally, it is demonstrated that coherent ultrafast nonlinear propagation effects become less distinctive if we apply a realistic model of the quantum well semiconductor gain material, consider characteristic loss channels and take into account de-phasing processes and homogeneous broadening.

Synthesis of Perylene Imide Diones as Platforms for the Development of Pyrazine Based Organic Semiconductors.

PubMed

de Echegaray, Paula; Mancheño, María J; Arrechea-Marcos, Iratxe; Juárez, Rafael; López-Espejo, Guzmán; López Navarrete, J Teodomiro; Ramos, María Mar; Seoane, Carlos; Ortiz, Rocío Ponce; Segura, José L

2016-11-18

There is a great interest in peryleneimide (PI)-containing compounds given their unique combination of good electron accepting ability, high abosorption in the visible region, and outstanding chemical, thermal, and photochemical stabilities. Thus, herein we report the synthesis of perylene imide derivatives endowed with a 1,2-diketone functionality (PIDs) as efficient intermediates to easily access peryleneimide (PI)-containing organic semiconductors with enhanced absorption cross-section for the design of tunable semiconductor organic materials. Three processable organic molecular semiconductors containing thiophene and terthiophene moieties, PITa, PITb, and PITT, have been prepared from the novel PIDs. The tendency of these semiconductors for molecular aggregation have been investigated by NMR spectroscopy and supported by quantum chemical calculations. 2D NMR experiments and theoretical calculations point to an antiparallel π-stacking interaction as the most stable conformation in the aggregates. Investigation of the optical and electrochemical properties of the materials is also reported and analyzed in combination with DFT calculations. Although the derivatives presented here show modest electron mobilities of ∼10 -4 cm 2 V -1 s -1 , these preliminary studies of their performance in organic field effect transistors (OFETs) indicate the potential of these new building blocks as n-type semiconductors.

Absorptivity of semiconductors used in the production of solar cell panels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kosyachenko, L. A., E-mail: lakos@chv.ukrpack.net; Grushko, E. V.; Mikityuk, T. I.

The dependence of the absorptivity of semiconductors on the thickness of the absorbing layer is studied for crystalline silicon (c-Si), amorphous silicon (a-Si), cadmium telluride (CdTe), copper indium diselenide (CuInSe{sub 2}, CIS), and copper gallium diselenide (CuGaSe{sub 2}, CGS). The calculations are performed with consideration for the spectral distribution of AM1.5 standard solar radiation and the absorption coefficients of the materials. It is shown that, in the region of wavelengths {lambda} = {lambda}{sub g} = hc/E{sub g}, almost total absorption of the photons in AM1.5 solar radiation is attained in c-Si at the thickness d = 7-8 mm, in a-Simore » at d = 30-60 {mu}m, in CdTe at d = 20-30 {mu}m, and in CIS and CGS at d = 3-4 {mu}m. The results differ from previously reported data for these materials (especially for c-Si). In previous publications, the thickness needed for the semiconductor to absorb solar radiation completely was identified with the effective light penetration depth at a certain wavelength in the region of fundamental absorption for the semiconductor.« less

Heterogeneous semiconductor photocatalysts for hydrogen production from aqueous solutions of electron donors

NASA Astrophysics Data System (ADS)

Kozlova, E. A.; Parmon, V. N.

2017-09-01

Current views on heterogeneous photocatalysts for visible- and near-UV-light-driven production of molecular hydrogen from water and aqueous solutions of inorganic and organic electron donors are analyzed and summarized. Main types of such photocatalysts and methods for their preparation are considered. Particular attention is paid to semiconductor photocatalysts based on sulfides that are known to be sensitive to visible light. The known methods for increasing the quantum efficiency of the target process are discussed, including design of the structure, composition and texture of semiconductor photocatalysts and variation of the medium pH and the substrate and photocatalyst concentrations. Some important aspects of the activation and deactivation of sulfide photocatalysts and the evolution of their properties in the course of hydrogen production processes in the presence of various types of electron donors are analyzed. The bibliography includes 276 references.

Growth and device processing of hexagonal boron nitride epilayers for thermal neutron and deep ultraviolet detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Doan, T. C.; Li, J.; Lin, J. Y.

2016-07-15

Solid-state neutron detectors with high performance are highly sought after for the detection of fissile materials. However, direct-conversion neutron detectors based on semiconductors with a measureable efficiency have not been realized. We report here the first successful demonstration of a direct-conversion semiconductor neutron detector with an overall detection efficiency for thermal neutrons of 4% and a charge collection efficiency as high as 83%. The detector is based on a 2.7 μm thick {sup 10}B-enriched hexagonal boron nitride (h-BN) epitaxial layer. The results represent a significant step towards the realization of practical neutron detectors based on h-BN epilayers. Neutron detectors basedmore » on h-BN are expected to possess all the advantages of semiconductor devices including wafer-scale processing, compact size, light weight, and ability to integrate with other functional devices.« less

Temperature Dependence of Density, Viscosity and Electrical Conductivity for Hg-Based II-VI Semiconductor Melts

NASA Technical Reports Server (NTRS)

Li, C.; Ban, H.; Lin, B.; Scripa, R. N.; Su, C.-H.; Lehoczky, S. L.

2004-01-01

The relaxation phenomenon of semiconductor melts, or the change of melt structure with time, impacts the crystal growth process and the eventual quality of the crystal. The thermophysical properties of the melt are good indicators of such changes in melt structure. Also, thermophysical properties are essential to the accurate predication of the crystal growth process by computational modeling. Currently, the temperature dependent thermophysical property data for the Hg-based II-VI semiconductor melts are scarce. This paper reports the results on the temperature dependence of melt density, viscosity and electrical conductivity of Hg-based II-VI compounds. The melt density was measured using a pycnometric method, and the viscosity and electrical conductivity were measured by a transient torque method. Results were compared with available published data and showed good agreement. The implication of the structural changes at different temperature ranges was also studied and discussed.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shi, Zhemin; Department of Physical Electronics, Tokyo Institute of Technology, 2-12-1 O-okayama, Meguro-ku, Tokyo 152-8552; Taguchi, Dai

The details of turnover process of spontaneous polarization and associated carrier motions in indium-tin oxide/poly-(vinylidene-trifluoroethylene)/pentacene/Au capacitor were analyzed by coupling displacement current measurement (DCM) and electric-field-induced optical second-harmonic generation (EFISHG) measurement. A model was set up from DCM results to depict the relationship between electric field in semiconductor layer and applied external voltage, proving that photo illumination effect on the spontaneous polarization process lied in variation of semiconductor conductivity. The EFISHG measurement directly and selectively probed the electric field distribution in semiconductor layer, modifying the model and revealing detailed carrier behaviors involving photo illumination effect, dipole reversal, and interfacial chargingmore » in the device. A further decrease of DCM current in the low voltage region under illumination was found as the result of illumination effect, and the result was argued based on the changing of the total capacitance of the double-layer capacitors.« less

Influence of the electron-cation interaction on electron mobility in dye-sensitized ZnO and TiO2 nanocrystals: a study using ultrafast terahertz spectroscopy.

PubMed

Nemec, H; Rochford, J; Taratula, O; Galoppini, E; Kuzel, P; Polívka, T; Yartsev, A; Sundström, V

2010-05-14

Charge transport and recombination in nanostructured semiconductors are poorly understood key processes in dye-sensitized solar cells. We have employed time-resolved spectroscopies in the terahertz and visible spectral regions supplemented with Monte Carlo simulations to obtain unique information on these processes. Our results show that charge transport in the active solar cell material can be very different from that in nonsensitized semiconductors, due to strong electrostatic interaction between injected electrons and dye cations at the surface of the semiconductor nanoparticle. For ZnO, this leads to formation of an electron-cation complex which causes fast charge recombination and dramatically decreases the electron mobility even after the dissociation of the complex. Sensitized TiO2 does not suffer from this problem due to its high permittivity efficiently screening the charges.

Engineering charge transport by heterostructuring solution-processed semiconductors

NASA Astrophysics Data System (ADS)

Voznyy, Oleksandr; Sutherland, Brandon R.; Ip, Alexander H.; Zhitomirsky, David; Sargent, Edward H.

2017-06-01

Solution-processed semiconductor devices are increasingly exploiting heterostructuring — an approach in which two or more materials with different energy landscapes are integrated into a composite system. Heterostructured materials offer an additional degree of freedom to control charge transport and recombination for more efficient optoelectronic devices. By exploiting energetic asymmetry, rationally engineered heterostructured materials can overcome weaknesses, augment strengths and introduce emergent physical phenomena that are otherwise inaccessible to single-material systems. These systems see benefit and application in two distinct branches of charge-carrier manipulation. First, they influence the balance between excitons and free charges to enhance electron extraction in solar cells and photodetectors. Second, they promote radiative recombination by spatially confining electrons and holes, which increases the quantum efficiency of light-emitting diodes. In this Review, we discuss advances in the design and composition of heterostructured materials, consider their implementation in semiconductor devices and examine unexplored paths for future advancement in the field.

Fabrication of ionic liquid electrodeposited Cu--Sn--Zn--S--Se thin films and method of making

DOEpatents

Bhattacharya, Raghu Nath

2016-01-12

A semiconductor thin-film and method for producing a semiconductor thin-films comprising a metallic salt, an ionic compound in a non-aqueous solution mixed with a solvent and processing the stacked layer in chalcogen that results in a CZTS/CZTSS thin films that may be deposited on a substrate is disclosed.

Reducing dislocations in semiconductors utilizing repeated thermal cycling during multistage epitaxial growth

DOEpatents

Fan, John C. C.; Tsaur, Bor-Yeu; Gale, Ronald P.; Davis, Frances M.

1992-02-25

Dislocation densities are reduced in growing semiconductors from the vapor phase by employing a technique of interrupting growth, cooling the layer so far deposited, and then repeating the process until a high quality active top layer is achieved. The method of interrupted growth, coupled with thermal cycling, permits dislocations to be trapped in the initial stages of epitaxial growth.

Reducing dislocations in semiconductors utilizing repeated thermal cycling during multistage epitaxial growth

DOEpatents

Fan, John C. C.; Tsaur, Bor-Yeu; Gale, Ronald P.; Davis, Frances M.

1986-12-30

Dislocation densities are reduced in growing semiconductors from the vapor phase by employing a technique of interrupting growth, cooling the layer so far deposited, and then repeating the process until a high quality active top layer is achieved. The method of interrupted growth, coupled with thermal cycling, permits dislocations to be trapped in the initial stages of epitaxial growth.

A Furan-Thiophene-Based Quinoidal Compound: A New Class of Solution-Processable High-Performance n-Type Organic Semiconductor.

PubMed

Xiong, Yu; Tao, Jingwei; Wang, Ruihao; Qiao, Xiaolan; Yang, Xiaodi; Wang, Deliang; Wu, Hongzhuo; Li, Hongxiang

2016-07-01

The furan-thiophene-based quinoidal organic semiconductor, TFT-CN, is designed and synthesized. TFT-CN displays a high electron mobility of 7.7 cm(2) V(-1) s(-1) , two orders of magnitude higher than the corresponding thiophene-based derivative. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Method of fabricating n-type and p-type microcrystalline semiconductor alloy material including band gap widening elements

DOEpatents

Guha, Subhendu; Ovshinsky, Stanford R.

1990-02-02

A method of fabricating doped microcrystalline semiconductor alloy material which includes a band gap widening element through a glow discharge deposition process by subjecting a precursor mixture which includes a diluent gas to an a.c. glow discharge in the absence of a magnetic field of sufficient strength to induce electron cyclotron resonance.

Theoretical treatment of the processes involving the dipole transitions to the lowest exciton states in hexagonal semiconductors

NASA Astrophysics Data System (ADS)

Semenova, L. E.

2018-04-01

The treatment of the two-photon transitions to the An=1 exciton level and the resonant Raman scattering of light by LO-phonons is given for the hexagonal semiconductors A2B6, taking into account the influence of the complex top valence band and anisotropy of the exciton effective mass.

Laser Cooling of 2-6 Semiconductors

DTIC Science & Technology

2016-08-12

practical optical refrigeration . The challenge is the stoichiometric defect in bulk crystal which introduces mid-gap states that manifest as broad-band...cooling in semiconductor has stimulated strong interest in further scaling up towards practical optical refrigeration . The challenge is the...energy. The upconversion process is facilitated by the annihilation of phonons and leads to cooling of the matter. The concept of optical refrigeration

Preface of 16th International conference on Defects, Recognition, Imaging and Physics in Semiconductors

NASA Astrophysics Data System (ADS)

Yang, Deren; Xu, Ke

2016-11-01

The 16th International conference on Defects-Recognition, Imaging and Physics in Semiconductors (DRIP-XVI) was held at the Worldhotel Grand Dushulake in Suzhou, China from 6th to 10th September 2015, around the 30th anniversary of the first DRIP conference. It was hosted by the Suzhou Institute of Nano-tech and Nano-bionics (SINANO), Chinese Academy of Sciences. On this occasion, about one hundred participants from nineteen countries attended the event. And a wide range of subjects were addressed during the conference: physics of point and extended defects in semiconductors: origin, electrical, optical and magnetic properties of defects; diagnostics techniques of crystal growth and processing of semiconductor materials (in-situ and process control); device imaging and mapping to evaluate performance and reliability; defect analysis in degraded optoelectronic and electronic devices; imaging techniques and instruments (proximity probe, x-ray, electron beam, non-contact electrical, optical and thermal imaging techniques, etc.); new frontiers of atomic-scale-defect assessment (STM, AFM, SNOM, ballistic electron energy microscopy, TEM, etc.); new approaches for multi-physic-parameter characterization with Nano-scale space resolution. Within these subjects, there were 58 talks, of which 18 invited, and 50 posters.

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Schwank, James R.; Fleetwood, Daniel M.; Shaneyfelt, Marty R.; Winokur, Peter S.; Devine, Roderick A. B.

1998-01-01

A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.

Tuning charge carrier transport and optical birefringence in liquid-crystalline thin films: A new design space for organic light-emitting diodes.

PubMed

Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn

2018-01-15

Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.

Ultrafast dynamics of photoexcited charge and spin currents in semiconductor nanostructures

NASA Astrophysics Data System (ADS)

Meier, Torsten; Pasenow, Bernhard; Duc, Huynh Thanh; Vu, Quang Tuyen; Haug, Hartmut; Koch, Stephan W.

2007-02-01

Employing the quantum interference among one- and two-photon excitations induced by ultrashort two-color laser pulses it is possible to generate charge and spin currents in semiconductors and semiconductor nanostructures on femtosecond time scales. Here, it is reviewed how the excitation process and the dynamics of such photocurrents can be described on the basis of a microscopic many-body theory. Numerical solutions of the semiconductor Bloch equations (SBE) provide a detailed description of the time-dependent material excitations. Applied to the case of photocurrents, numerical solutions of the SBE for a two-band model including many-body correlations on the second-Born Markov level predict an enhanced damping of the spin current relative to that of the charge current. Interesting effects are obtained when the scattering processes are computed beyond the Markovian limit. Whereas the overall decay of the currents is basically correctly described already within the Markov approximation, quantum-kinetic calculations show that memory effects may lead to additional oscillatory signatures in the current transients. When transitions to coupled heavy- and light-hole valence bands are incorporated into the SBE, additional charge and spin currents, which are not described by the two-band model, appear.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less

MBE growth and processing of III/V-nitride semiconductor thin film structures: Growth of gallium indium arsenic nitride and nano-machining with focused ion beam and electron beam

NASA Astrophysics Data System (ADS)

Park, Yeonjoon

The advanced semiconductor material InGaAsN was grown with nitrogen plasma assisted Molecular Beam Epitaxy (MBE). The InGaAsN layers were characterized with High Resolution X-ray Diffraction (HRXDF), Atomic Fore Microscope (AFM), X-ray Photoemission Spectroscopy (XPS) and Photo-Luminescence (PL). The reduction of the band gap energy was observed with the incorporation of nitrogen and the lattice matched condition to the GaAs substrate was achieved with the additional incorporation of indium. A detailed investigation was made for the growth mode changes from planar layer-by-layer growth to 3D faceted growth with a higher concentration of nitrogen. A new X-ray diffraction analysis was developed and applied to the MBE growth on GaAs(111)B, which is one of the facet planes of InGaAsN. As an effort to enhance the processing tools for advanced semiconductor materials, gas assisted Focused Ion Beam (FIB) vertical milling was performed on GaN. The FIB processed area shows an atomically flat surface, which is good enough for the fabrication of Double Bragg Reflector (DBR) mirrors for the Blue GaN Vertical Cavity Surface Emitting Laser (VCSEL) Diodes. An in-situ electron beam system was developed to combine the enhanced lithographic processing capability with the atomic layer growth capability by MBE. The electron beam system has a compensation capability against substrate vibration and thermal drift. In-situ electron beam lithography was performed with the low pressure assisting gas. The advanced processing and characterization methods developed in this thesis will assist the development of superior semiconductor materials for the future.

Performance improvement for solution-processed high-mobility ZnO thin-film transistors

NASA Astrophysics Data System (ADS)

Sha Li, Chen; Li, Yu Ning; Wu, Yi Liang; Ong, Beng S.; Loutfy, Rafik O.

2008-06-01

The fabrication technology of stable, non-toxic, transparent, high performance zinc oxide (ZnO) thin-film semiconductors via the solution process was investigated. Two methods, which were, respectively, annealing a spin-coated precursor solution and annealing a drop-coated precursor solution, were compared. The prepared ZnO thin-film semiconductor transistors have well-controlled, preferential crystal orientation and exhibit superior field-effect performance characteristics. But the ZnO thin-film transistor (TFT) fabricated by annealing a drop-coated precursor solution has a distinctly elevated linear mobility, which further approaches the saturated mobility, compared with that fabricated by annealing a spin-coated precursor solution. The performance of the solution-processed ZnO TFT was further improved when substituting the spin-coating process by the drop-coating process.

Spectroscopic characterization of III-V semiconductor nanomaterials

NASA Astrophysics Data System (ADS)

Crankshaw, Shanna Marie

III-V semiconductor materials form a broad basis for optoelectronic applications, including the broad basis of the telecom industry as well as smaller markets for high-mobility transistors. In a somewhat analogous manner as the traditional silicon logic industry has so heavily depended upon process manufacturing development, optoelectronics often relies instead on materials innovations. This thesis focuses particularly on III-V semiconductor nanomaterials, detailed characterization of which is invaluable for translating the exhibited behavior into useful applications. Specifically, the original research described in these thesis chapters is an investigation of semiconductors at a fundamental materials level, because the nanostructures in which they appear crystallize in quite atypical forms for the given semiconductors. Rather than restricting the experimental approaches to any one particular technique, many different types of optical spectroscopies are developed and applied where relevant to elucidate the connection between the crystalline structure and exhibited properties. In the first chapters, for example, a wurtzite crystalline form of the prototypical zincblende III-V binary semiconductor, GaAs, is explored through polarization-dependent Raman spectroscopy and temperature-dependent photoluminescence, as well as second-harmonic generation (SHG). The altered symmetry properties of the wurtzite crystalline structure are particularly evident in the Raman and SHG polarization dependences, all within a bulk material realm. A rather different but deeply elegant aspect of crystalline symmetry in GaAs is explored in a separate study on zincblende GaAs samples quantum-confined in one direction, i.e. quantum well structures, whose quantization direction corresponds to the (110) direction. The (110) orientation modifies the low-temperature electron spin relaxation mechanisms available compared to the usual (001) samples, leading to altered spin coherence times explored through a novel spectroscopic technique first formulated for the rather different purpose of dispersion engineering for slow-light schemes. The frequency-resolved technique combined with the unusual (110) quantum wells in a furthermore atypical waveguide experimental geometry has revealed fascinating behavior of electron spin splitting which points to the possibility of optically orienting electron spins with linearly polarized light---an experimental result supporting a theoretical description of the phenomenon itself only a few years old. Lastly, to explore a space of further-restricted dimensionality, the final chapters describe InP semiconductor nanowires with dimensions small enough to be considered truly one-dimensional. Like the bulk GaAs of the first few chapters, the InP nanowires here crystallize in a wurtzite structure. In the InP nanowire case, though, the experimental techniques explored for characterization are temperature-dependent time-integrated photoluminescence at the single-wire level (including samples with InAsP insertions) and time-resolved photoluminescence at the ensemble level. The carrier dynamics revealed through these time-resolved studies are the first of their kind for wurtzite InP nanowires. The chapters are thus ordered as a progression from three (bulk), to two (quantum well), to one (nanowire), to zero dimensions (axially-structured nanowire), with the uniting theme the emphasis on connecting the semiconductor nanomaterials' crystallinity to its exhibited properties by relevant experimental spectroscopic techniques, whether these are standard methods or effectively invented for the case at hand.

Growth of Gallium Nitride Nanowires: A Study Using In Situ Transmission Electron Microscopy

NASA Astrophysics Data System (ADS)

Diaz Rivas, Rosa Estela

Owing to their special characteristics, group III-Nitride semiconductors have attracted special attention for their application in a wide range of optoelectronic devices. Of particular interest are their direct and wide band gaps that span from ultraviolet to the infrared wavelengths. In addition, their stronger bonds relative to the other compound semiconductors makes them thermally more stable, which provides devices with longer life time. However, the lattice mismatch between these semiconductors and their substrates cause the as-grown films to have high dislocation densities, reducing the life time of devices that contain these materials. One possible solution for this problem is to substitute single crystal semiconductor nanowires for epitaxial films. Due to their dimensionality, semiconductor nanowires typically have stress-free surfaces and better physical properties. In order to employ semiconductor nanowires as building blocks for nanoscale devices, a precise control of the nanowires' crystallinity, morphology, and chemistry is necessary. This control can be achieved by first developing a deeper understanding of the processes involved in the synthesis of nanowires, and then by determining the effects of temperature and pressure on their growth. This dissertation focuses on understanding of the growth processes involved in the formation of GaN nanowires. Nucleation and growth events were observed in situ and controlled in real-time using an environmental transmission electron microscope. These observations provide a satisfactory elucidation of the underlying growth mechanism during the formation of GaN nanowires. Nucleation of these nanowires appears to follow the vapor-liquid-solid mechanism. However, nanowire growth is found to follow both the vapor-liquid-solid and vapor-solid-solid mechanisms. Direct evidence of the effects of III/V ratio on nanowire growth is also reported, which provides important information for tailoring the synthesis of GaN nanowires. These findings suggest in situ electron microscopy is a powerful tool to understand the growth of GaN nanowires and also that these experimental approach can be extended to study other binary semiconductor compound such as GaP, GaAs, and InP, or even ternary compounds such as InGaN. However, further experimental work is required to fully elucidate the kinetic effects on the growth process. A better control of the growth parameters is also recommended.

Solar cells with low cost substrates and process of making same

DOEpatents

Mitchell, Kim W.

1984-01-01

A solar cell having a substrate and an intermediate recrystallized film and a semiconductor material capable of absorbing light with the substrate being selected from one of a synthetic organic resin, graphite, glass and a crystalline material having a grain size less than about 1 micron.sup.2. The intermediate recrystallized film has a grain size in the range of from about 10 microns.sup.2 to about 10,000 microns.sup.2 and a lattice mismatch with the semiconductor material not greater than about 4%. The semiconductor material has a grain size not less than about 10 microns.sup.2. An anti-reflective layer and electrical contact means are provided. Also disclosed is a subcombination of substrate, intermediate recrystallized film and semiconductor material. Also, methods of formulating the solar cell and subcombination are disclosed.

Solar cells with low cost substrates, process of making same and article of manufacture

DOEpatents

Mitchell, K.W.

A solar cell is disclosed having a substrate and an intermediate recrystallized film and a semiconductor material capable of absorbing light with the substrate being selected from one of a synthetic organic resin, graphite, glass and a crystalline material having a grain size less than about 1 micron/sup 2/. The intermediate recrystallized film has a grain size in the range of from about 10 microns/sup 2/ to about 10,000 microns/sup 2/ and a lattice mismatch with the semiconductor material not greater than about 4%. The semiconductor material has a grain size not less than about 10 microns/sup 2/. An anti-reflective layer and electrical contact means are provided. Also disclosed is a subcombination of substrate, intermediate recrystallized film and semiconductor material. Also, methods of formulating the solar cell and subcombination are disclosed.

Molecular Electrical Doping of Organic Semiconductors: Fundamental Mechanisms and Emerging Dopant Design Rules.

PubMed

Salzmann, Ingo; Heimel, Georg; Oehzelt, Martin; Winkler, Stefanie; Koch, Norbert

2016-03-15

Today's information society depends on our ability to controllably dope inorganic semiconductors, such as silicon, thereby tuning their electrical properties to application-specific demands. For optoelectronic devices, organic semiconductors, that is, conjugated polymers and molecules, have emerged as superior alternative owing to the ease of tuning their optical gap through chemical variability and their potential for low-cost, large-area processing on flexible substrates. There, the potential of molecular electrical doping for improving the performance of, for example, organic light-emitting devices or organic solar cells has only recently been established. The doping efficiency, however, remains conspicuously low, highlighting the fact that the underlying mechanisms of molecular doping in organic semiconductors are only little understood compared with their inorganic counterparts. Here, we review the broad range of phenomena observed upon molecularly doping organic semiconductors and identify two distinctly different scenarios: the pairwise formation of both organic semiconductor and dopant ions on one hand and the emergence of ground state charge transfer complexes between organic semiconductor and dopant through supramolecular hybridization of their respective frontier molecular orbitals on the other hand. Evidence for the occurrence of these two scenarios is subsequently discussed on the basis of the characteristic and strikingly different signatures of the individual species involved in the respective doping processes in a variety of spectroscopic techniques. The critical importance of a statistical view of doping, rather than a bimolecular picture, is then highlighted by employing numerical simulations, which reveal one of the main differences between inorganic and organic semiconductors to be their respective density of electronic states and the doping induced changes thereof. Engineering the density of states of doped organic semiconductors, the Fermi-Dirac occupation of which ultimately determines the doping efficiency, thus emerges as key challenge. As a first step, the formation of charge transfer complexes is identified as being detrimental to the doping efficiency, which suggests sterically shielding the functional core of dopant molecules as an additional design rule to complement the requirement of low ionization energies or high electron affinities in efficient n-type or p-type dopants, respectively. In an extended outlook, we finally argue that, to fully meet this challenge, an improved understanding is required of just how the admixture of dopant molecules to organic semiconductors does affect the density of states: compared with their inorganic counterparts, traps for charge carriers are omnipresent in organic semiconductors due to structural and chemical imperfections, and Coulomb attraction between ionized dopants and free charge carriers is typically stronger in organic semiconductors owing to their lower dielectric constant. Nevertheless, encouraging progress is being made toward developing a unifying picture that captures the entire range of doping induced phenomena, from ion-pair to complex formation, in both conjugated polymers and molecules. Once completed, such a picture will provide viable guidelines for synthetic and supramolecular chemistry that will enable further technological advances in organic and hybrid organic/inorganic devices.

All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application

NASA Astrophysics Data System (ADS)

Tsai, Chih-Wei; Lo, Yu-Lung; Chang, Chia-Chen; Liu, Han-Ying; Yang, Wei-Bin; Cheng, Kuo-Hsing

2017-04-01

A synchronous and highly accurate all-digital duty-cycle corrector (ADDCC), which uses simplified dual-loop architecture, is presented in this paper. To explain the operational principle, a detailed circuit description and formula derivation are provided. To verify the proposed design, a chip was fabricated through the 0.18-µm standard complementary metal oxide semiconductor process with a core area of 0.091 mm2. The measurement results indicate that the proposed ADDCC can operate between 300 and 600 MHz with an input duty-cycle range of 40-60%, and that the output duty-cycle error is less than 1% with a root-mean-square jitter of 3.86 ps.

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

NASA Astrophysics Data System (ADS)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

Micropyrolyzer for chemical analysis of liquid and solid samples

DOEpatents

Mowry, Curtis D.; Morgan, Catherine H.; Manginell, Ronald P.; Frye-Mason, Gregory C.

2006-07-18

A micropyrolyzer has applications to pyrolysis, heated chemistry, and thermal desorption from liquid or solid samples. The micropyrolyzer can be fabricated from semiconductor materials and metals using standard integrated circuit technologies. The micropyrolyzer enables very small volume samples of less than 3 microliters and high sample heating rates of greater than 20.degree. C. per millisecond. A portable analyzer for the field analysis of liquid and solid samples can be realized when the micropyrolyzer is combined with a chemical preconcentrator, chemical separator, and chemical detector. Such a portable analyzer can be used in a variety of government and industrial applications, such as non-proliferation monitoring, chemical and biological warfare detection, industrial process control, water and air quality monitoring, and industrial hygiene.

Lightning Pin Injection Test: MOSFETS in "ON" State

NASA Technical Reports Server (NTRS)

Ely, Jay J.; Nguyen, Truong X.; Szatkowski, George N.; Koppen, Sandra V.; Mielnik, John J.; Vaughan, Roger K.; Saha, Sankalita; Wysocki, Philip F.; Celaya, Jose R.

2011-01-01

The test objective was to evaluate MOSFETs for induced fault modes caused by pin-injecting a standard lightning waveform into them while operating. Lightning Pin-Injection testing was performed at NASA LaRC. Subsequent fault-mode and aging studies were performed by NASA ARC researchers using the Aging and Characterization Platform for semiconductor components. This report documents the test process and results, to provide a basis for subsequent lightning tests. The ultimate IVHM goal is to apply prognostic and health management algorithms using the features extracted during aging to allow calculation of expected remaining useful life. A survey of damage assessment techniques based upon inspection is provided, and includes data for optical microscope and X-ray inspection. Preliminary damage assessments based upon electrical parameters are also provided.

Characterization of silicon-on-insulator wafers

NASA Astrophysics Data System (ADS)

Park, Ki Hoon

The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

The Fundamentals of Using the Digital Micromirror Device (DMD(TM)) for Projection Display

NASA Technical Reports Server (NTRS)

Yoder, Lars A.

1995-01-01

Developed by Texas Instruments (TI) the digital micromirror device (DMD(tm)) is a quickly emerging and highly useful micro-electro-mechanical structures (MEMS) device. Using standard semiconductor fabrication technology, the DMD's simplicity in concept and design will provide advantageous solutions for many different applications. At the rudimentary level, the DMD is a precision, semiconductor light switch. In the initial commercial development of DMD technology, TI has concentrated on projection display and hardcopy. This paper will focus on how the DMD is used for projection display. Other application areas are being explored and evaluated to find appropriate and beneficial uses for the DMD.

Enhanced performance of solution-processed organic thin-film transistors with a low-temperature-annealed alumina interlayer between the polyimide gate insulator and the semiconductor.

PubMed

Yoon, Jun-Young; Jeong, Sunho; Lee, Sun Sook; Kim, Yun Ho; Ka, Jae-Won; Yi, Mi Hye; Jang, Kwang-Suk

2013-06-12

We studied a low-temperature-annealed sol-gel-derived alumina interlayer between the organic semiconductor and the organic gate insulator for high-performance organic thin-film transistors. The alumina interlayer was deposited on the polyimide gate insulator by a simple spin-coating and 200 °C-annealing process. The leakage current density decreased by the interlayer deposition: at 1 MV/cm, the leakage current densities of the polyimide and the alumina/polyimide gate insulators were 7.64 × 10(-7) and 3.01 × 10(-9) A/cm(2), respectively. For the first time, enhancement of the organic thin-film transistor performance by introduction of an inorganic interlayer between the organic semiconductor and the organic gate insulator was demonstrated: by introducing the interlayer, the field-effect mobility of the solution-processed organic thin-film transistor increased from 0.35 ± 0.15 to 1.35 ± 0.28 cm(2)/V·s. Our results suggest that inorganic interlayer deposition could be a simple and efficient surface treatment of organic gate insulators for enhancing the performance of solution-processed organic thin-film transistors.

A review of the silicon material task

NASA Technical Reports Server (NTRS)

Lutwack, R.

1984-01-01

The Silicon Material Task of the Flat-Plate Solar Array Project was assigned the objective of developing the technology for low-cost processes for producing polysilicon suitable for terrestrial solar-cell applications. The Task program comprised sections for process developments for semiconductor-grade and solar-cell-grade products. To provide information for deciding upon process designs, extensive investigations of the effects of impurities on material properties and the performance of cells were conducted. The silane process of the Union Carbide Corporation was carried through several stages of technical and engineering development; a pilot plant was the culmination of this effort. The work to establish silane fluidized-bed technology for a low-cost process is continuing. The advantages of the use of dichlorosilane is a siemens-type were shown by Hemlock Semiconductor Corporation. The development of other processes is described.

A review of the silicon material task

NASA Astrophysics Data System (ADS)

Lutwack, R.

1984-02-01

The Silicon Material Task of the Flat-Plate Solar Array Project was assigned the objective of developing the technology for low-cost processes for producing polysilicon suitable for terrestrial solar-cell applications. The Task program comprised sections for process developments for semiconductor-grade and solar-cell-grade products. To provide information for deciding upon process designs, extensive investigations of the effects of impurities on material properties and the performance of cells were conducted. The silane process of the Union Carbide Corporation was carried through several stages of technical and engineering development; a pilot plant was the culmination of this effort. The work to establish silane fluidized-bed technology for a low-cost process is continuing. The advantages of the use of dichlorosilane is a siemens-type were shown by Hemlock Semiconductor Corporation. The development of other processes is described.

High efficiency, low cost, thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

2001-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

1999-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

Metrology needs for the semiconductor industry over the next decade

NASA Astrophysics Data System (ADS)

Melliar-Smith, Mark; Diebold, Alain C.

1998-11-01

Metrology will continue to be a key enabler for the development and manufacture of future generations of integrated circuits. During 1997, the Semiconductor Industry Association renewed the National Technology Roadmap for Semiconductors (NTRS) through the 50 nm technology generation and for the first time included a Metrology Roadmap (1). Meeting the needs described in the Metrology Roadmap will be both a technological and financial challenge. In an ideal world, metrology capability would be available at the start of process and tool development, and silicon suppliers would have 450 mm wafer capable metrology tools in time for development of that wafer size. Unfortunately, a majority of the metrology suppliers are small companies that typically can't afford the additional two to three year wait for return on R&D investment. Therefore, the success of the semiconductor industry demands that we expand cooperation between NIST, SEMATECH, the National Labs, SRC, and the entire community. In this paper, we will discuss several critical metrology topics including the role of sensor-based process control, in-line microscopy, focused measurements for transistor and interconnect fabrication, and development needs. Improvements in in-line microscopy must extend existing critical dimension measurements up to 100 nm generations and new methods may be required for sub 100 nm generations. Through development, existing metrology dielectric thickness and dopant dose and junction methods can be extended to 100 nm, but new and possibly in-situ methods are needed beyond 100 nm. Interconnect process control will undergo change before 100 nm due to the introduction of copper metallization, low dielectric constant interlevel dielectrics, and Damascene process flows.

Mechanism of amino acid interaction with silicon nitride surface during chemical mechanical planarization

NASA Astrophysics Data System (ADS)

America, William George

Chemical-Mechanical Planarization (CMP) has become an essential technology for making modern semiconductor devices. This technique was originally applied to overcome the depth of focus limitations of lithography tools during pattern development of metal and dielectric films. As features of the semiconductor device became smaller the lithographic process shifted to shorter exposure wavelengths and the useable depth of focus became smaller. The topography differences on the wafer's surface from all of the previous processing steps became greater than the exposure tools could properly project. CMP helped solve this problem by bringing the features of the wafer surface to the same plane. As semiconductor fabrication technology progressed further, CMP was applied to other areas of the process, including shallow trench isolation and metal line Damascene processing. In its simplest application, CMP polishes on features projecting upward and higher than the average surface. These projections experience more work and are polished faster. Given sufficient time the surface becomes essentially flat, on a micro-scale, and the lithographic projection tools has the same plane onto which to focus. Thus, the pattern is properly and uniformly exposed and subsequent reactive ion etching (RIE) steps are executed. This technique was initially applied to later steps in the wafer processing scheme to render a new flat surface at each metal layer. Building on this success, CMP has been applied to a broad range of steps in the wafer processing particularly where surface topography warrants and when RIE of dielectric or metallic films is not practical. CMP has seen its greatest application in semiconductor logic and memory devices and most recently, a Damascene processing for copper lines and shallow trench isolation. This pattern dependent CMP issue is explored in this thesis as it pertains primarily to shallow trench isolation CMP coupled with a highly selective slurry chemistry.

Application of EAP materials toward a refreshable Braille display

NASA Astrophysics Data System (ADS)

Di Spigna, N.; Chakraborti, P.; Yang, P.; Ghosh, T.; Franzon, P.

2009-03-01

The development of a multiline, refreshable Braille display will assist with the full inclusion and integration of blind people into society. The use of both polyvinylidene fluoride (PVDF) film planar bending mode actuators and silicone dielectric elastomer cylindrical tube actuators have been investigated for their potential use in a Braille cell. A liftoff process that allows for aggressive scaling of miniature bimorph actuators has been developed using standard semiconductor lithography techniques. The PVDF bimorphs have been demonstrated to provide enough displacement to raise a Braille dot using biases less than 1000V and operating at 10Hz. In addition, silicone tube actuators have also been demonstrated to achieve the necessary displacement, though requiring higher voltages. The choice of electrodes and prestrain conditions aimed at maximizing axial strain in tube actuators are discussed. Characterization techniques measuring actuation displacement and blocking forces appropriate for standard Braille cell specifications are presented. Finally, the integration of these materials into novel cell designs and the fabrication of a prototype Braille cell are discussed.

Integration of mask and silicon metrology in DFM

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

2009-03-01

We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based on the profiling method of the field proven CD metrology algorithm. The detected edges are then converted to GDSII format, which is a standard format for a design data, and utilized for various DFM systems such as simulation. Namely, by integrating pattern shapes of mask and silicon formed during a manufacturing process into GDSII format, it makes it possible to bridge highly accurate pattern profile information over to the design field of various EDA systems. These are fully integrated into design data and automated. Bi-directional cross probing between mask data and process control data is allowed by linking them. This method is a solution for total optimization that covers Design, MDP, mask production and silicon device producing. This method therefore is regarded as a strategic DFM approach in the semiconductor metrology.

40 CFR 63.5935 - What definitions apply to this subpart?

Code of Federal Regulations, 2010 CFR

2010-07-01

... plating; semiconductor manufacturing; petroleum production, refining, and storage; mining; textile... manufacture, it must be used for repair or replacement, and the manufacturing schedule must be based on the... National Emissions Standards for Hazardous Air Pollutants: Reinforced Plastic Composites Production Other...

Deposition of dopant impurities and pulsed energy drive-in

DOEpatents

Wickboldt, Paul; Carey, Paul G.; Smith, Patrick M.; Ellingboe, Albert R.

2008-01-01

A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.

Deposition of dopant impurities and pulsed energy drive-in

DOEpatents

Wickboldt, Paul; Carey, Paul G.; Smith, Patrick M.; Ellingboe, Albert R.

1999-01-01

A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.

Deposition of dopant impurities and pulsed energy drive-in

DOEpatents

Wickboldt, P.; Carey, P.G.; Smith, P.M.; Ellingboe, A.R.

1999-06-29

A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique is disclosed. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques. 2 figs.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Process for preparing group Ib-IIIa-VIa semiconducting films

DOEpatents

Birkmire, Robert W.; Schultz, Jerold M.; Marudachalam, Matheswaran; Hichri, Habib

1997-01-01

Methods are provided for the production of supported monophasic group I-III-VI semiconductor films. In the subject methods, a substrate is coated with group I and III elements and then contacted with a reactive group VI element containing atmosphere under conditions sufficient to produce a substrate coated with a composite of at least two different group I-III-IV alloys. The resultant composite coated substrate is then annealed in an inert atmosphere under conditions sufficient to convert the composite coating to a monophasic group I-III-VI semiconductor film. The resultant supported semiconductor films find use in photovoltaic applications, particularly as absorber layers in solar cells.

Superlattice photoelectrodes for photoelectrochemical cells

DOEpatents

Nozik, Arthur J.

1987-01-01

A superlattice or multiple-quantum-well semiconductor is used as a photoelectrode in a photoelectrochemical process for converting solar energy into useful fuels or chemicals. The quantum minibands of the superlattice or multiple-quantum-well semiconductor effectively capture hot-charge carriers at or near their discrete quantum energies and deliver them to drive a chemical reaction in an electrolyte. The hot-charge carries can be injected into the electrolyte at or near the various discrete multiple energy levels quantum minibands, or they can be equilibrated among themselves to a hot-carrier pool and then injected into the electrolyte at one average energy that is higher than the lowest quantum band gap in the semiconductor.

Process for preparing group Ib-IIIa-VIa semiconducting films

DOEpatents

Birkmire, R.W.; Schultz, J.M.; Marudachalam, M.; Hichri, H.

1997-10-07

Methods are provided for the production of supported monophasic group I-III-VI semiconductor films. In the subject methods, a substrate is coated with group I and III elements and then contacted with a reactive group VI element containing atmosphere under conditions sufficient to produce a substrate coated with a composite of at least two different group I-III-IV alloys. The resultant composite coated substrate is then annealed in an inert atmosphere under conditions sufficient to convert the composite coating to a monophasic group I-III-VI semiconductor film. The resultant supported semiconductor films find use in photovoltaic applications, particularly as absorber layers in solar cells. 4 figs.

Andreev reflection enhancement in semiconductor-superconductor structures

NASA Astrophysics Data System (ADS)

Bouscher, Shlomi; Winik, Roni; Hayat, Alex

2018-02-01

We develop a theoretical approach for modeling a wide range of semiconductor-superconductor structures with arbitrary potential barriers and a spatially dependent superconducting order parameter. We demonstrate asymmetry in the conductance spectrum as a result of a Schottky barrier shape. We further show that the Andreev reflection process can be significantly enhanced through resonant tunneling with appropriate barrier configuration, which can incorporate the Schottky barrier as a contributing component of the device. Moreover, we show that resonant tunneling can be achieved in superlattice structures as well. These theoretically demonstrated effects along with our modeling approach enable much more efficient Cooper pair injection into semiconductor-superconductor structures, including superconducting optoelectronic devices.

Assembling non-ferromagnetic materials to ferromagnetic architectures using metal-semiconductor interfaces

PubMed Central

Ma, Ji; Liu, Chunting; Chen, Kezheng

2016-01-01

In this work, a facile and versatile solution route was used to fabricate room-temperature ferromagnetic fish bone-like, pteridophyte-like, poplar flower-like, cotton-like Cu@Cu2O architectures and golfball-like Cu@ZnO architecture. The ferromagnetic origins in these architectures were found to be around metal-semiconductor interfaces and defects, and the root cause for their ferromagnetism lay in charge transfer processes from metal Cu to semiconductors Cu2O and ZnO. Owing to different metallization at their interfaces, these architectures exhibited different ferromagnetic behaviors, including coercivity, saturation magnetization as well as magnetic interactions. PMID:27680286

Structure and properties of small molecule-polymer blend semiconductors for organic thin film transistors.

PubMed

Kang, Jihoon; Shin, Nayool; Jang, Do Young; Prabhu, Vivek M; Yoon, Do Y

2008-09-17

A comprehensive structural and electrical characterization of solution-processed blend films of 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) semiconductor and poly(alpha-methylstyrene) (PalphaMS) insulator was performed to understand and optimize the blend semiconductor films, which are very attractive as the active layer in solution-processed organic thin-film transistors (OTFTs). Our study, based on careful measurements of specular neutron reflectivity and grazing-incidence X-ray diffraction, showed that the blends with a low molecular-mass PalphaMS exhibited a strong segregation of TIPS-pentacene only at the air interface, but surprisingly the blends with a high molecular-mass PalphaMS showed a strong segregation of TIPS-pentacene at both air and bottom substrate interfaces with high crystallinity and desired orientation. This finding led to the preparation of a TIPS-pentacene/PalphaMS blend active layer with superior performance characteristics (field-effect mobility, on/off ratio, and threshold voltage) over those of neat TIPS-pentacene, as well as the solution-processability of technologically attractive bottom-gate/bottom-contact OTFT devices.

Clean graphene electrodes on organic thin-film devices via orthogonal fluorinated chemistry.

PubMed

Beck, Jonathan H; Barton, Robert A; Cox, Marshall P; Alexandrou, Konstantinos; Petrone, Nicholas; Olivieri, Giorgia; Yang, Shyuan; Hone, James; Kymissis, Ioannis

2015-04-08

Graphene is a promising flexible, highly transparent, and elementally abundant electrode for organic electronics. Typical methods utilized to transfer large-area films of graphene synthesized by chemical vapor deposition on metal catalysts are not compatible with organic thin-films, limiting the integration of graphene into organic optoelectronic devices. This article describes a graphene transfer process onto chemically sensitive organic semiconductor thin-films. The process incorporates an elastomeric stamp with a fluorinated polymer release layer that can be removed, post-transfer, via a fluorinated solvent; neither fluorinated material adversely affects the organic semiconductor materials. We used Raman spectroscopy, atomic force microscopy, and scanning electron microscopy to show that chemical vapor deposition graphene can be successfully transferred without inducing defects in the graphene film. To demonstrate our transfer method's compatibility with organic semiconductors, we fabricate three classes of organic thin-film devices: graphene field effect transistors without additional cleaning processes, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices. These experiments demonstrate the potential of hybrid graphene/organic devices in which graphene is deposited directly onto underlying organic thin-film structures.

Solution-based electrical doping of semiconducting polymer films over a limited depth

NASA Astrophysics Data System (ADS)

Kolesov, Vladimir A.; Fuentes-Hernandez, Canek; Chou, Wen-Fang; Aizawa, Naoya; Larrain, Felipe A.; Wang, Ming; Perrotta, Alberto; Choi, Sangmoo; Graham, Samuel; Bazan, Guillermo C.; Nguyen, Thuc-Quyen; Marder, Seth R.; Kippelen, Bernard

2017-04-01

Solution-based electrical doping protocols may allow more versatility in the design of organic electronic devices; yet, controlling the diffusion of dopants in organic semiconductors and their stability has proven challenging. Here we present a solution-based approach for electrical p-doping of films of donor conjugated organic semiconductors and their blends with acceptors over a limited depth with a decay constant of 10-20 nm by post-process immersion into a polyoxometalate solution (phosphomolybdic acid, PMA) in nitromethane. PMA-doped films show increased electrical conductivity and work function, reduced solubility in the processing solvent, and improved photo-oxidative stability in air. This approach is applicable to a variety of organic semiconductors used in photovoltaics and field-effect transistors. PMA doping over a limited depth of bulk heterojunction polymeric films, in which amine-containing polymers were mixed in the solution used for film formation, enables single-layer organic photovoltaic devices, processed at room temperature, with power conversion efficiencies up to 5.9 +/- 0.2% and stable performance on shelf-lifetime studies at 60 °C for at least 280 h.

Manufacture of Micromirror Arrays Using a CMOS-MEMS Technique

PubMed Central

Kao, Pin-Hsu; Dai, Ching-Liang; Hsu, Cheng-Chih; Wu, Chyan-Chyi

2009-01-01

In this study we used the commercial 0.35 μm CMOS (complementary metal oxide semiconductor) process and simple maskless post-processing to fabricate an array of micromirrors exhibiting high natural frequency. The micromirrors were manufactured from aluminum; the sacrificial layer was silicon dioxide. Because we fabricated the micromirror arrays using the standard CMOS process, they have the potential to be integrated with circuitry on a chip. For post-processing we used an etchant to remove the sacrificial layer and thereby suspend the micromirrors. The micromirror array contained a circular membrane and four fixed beams set symmetrically around and below the circular mirror; these four fan-shaped electrodes controlled the tilting of the micromirror. A MEMS (microelectromechanical system) motion analysis system and a confocal 3D-surface topography were used to characterize the properties and configuration of the micromirror array. Each micromirror could be rotated in four independent directions. Experimentally, we found that the micromirror had a tilting angle of about 2.55° when applying a driving voltage of 40 V. The natural frequency of the micromirrors was 59.1 kHz. PMID:22454581

Manufacture of Micromirror Arrays Using a CMOS-MEMS Technique.

PubMed

Kao, Pin-Hsu; Dai, Ching-Liang; Hsu, Cheng-Chih; Wu, Chyan-Chyi

2009-01-01

In this study we used the commercial 0.35 μm CMOS (complementary metal oxide semiconductor) process and simple maskless post-processing to fabricate an array of micromirrors exhibiting high natural frequency. The micromirrors were manufactured from aluminum; the sacrificial layer was silicon dioxide. Because we fabricated the micromirror arrays using the standard CMOS process, they have the potential to be integrated with circuitry on a chip. For post-processing we used an etchant to remove the sacrificial layer and thereby suspend the micromirrors. The micromirror array contained a circular membrane and four fixed beams set symmetrically around and below the circular mirror; these four fan-shaped electrodes controlled the tilting of the micromirror. A MEMS (microelectromechanical system) motion analysis system and a confocal 3D-surface topography were used to characterize the properties and configuration of the micromirror array. Each micromirror could be rotated in four independent directions. Experimentally, we found that the micromirror had a tilting angle of about 2.55° when applying a driving voltage of 40 V. The natural frequency of the micromirrors was 59.1 kHz.

Lorentz factor determination for local electric fields in semiconductor devices utilizing hyper-thin dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

McPherson, J. W., E-mail: mcpherson.reliability@yahoo.com

The local electric field (the field that distorts, polarizes, and weakens polar molecular bonds in dielectrics) has been investigated for hyper-thin dielectrics. Hyper-thin dielectrics are currently required for advanced semiconductor devices. In the work presented, it is shown that the common practice of using a Lorentz factor of L = 1/3, to describe the local electric field in a dielectric layer, remains valid for hyper-thin dielectrics. However, at the very edge of device structures, a rise in the macroscopic/Maxwell electric field E{sub diel} occurs and this causes a sharp rise in the effective Lorentz factor L{sub eff}. At capacitor and transistor edges,more » L{sub eff} is found to increase to a value 2/3 < L{sub eff} < 1. The increase in L{sub eff} results in a local electric field, at device edge, that is 50%–100% greater than in the bulk of the dielectric. This increase in local electric field serves to weaken polar bonds thus making them more susceptible to breakage by standard Boltzmann and/or current-driven processes. This has important time-dependent dielectric breakdown (TDDB) implications for all electronic devices utilizing polar materials, including GaN devices that suffer from device-edge TDDB.« less

Gauge-invariant formulation of high-field transport in semiconductors

NASA Astrophysics Data System (ADS)

Ciancio, Emanuele; Iotti, Rita C.; Rossi, Fausto

2004-04-01

In this paper we revisit the conventional description of carrier-phonon scattering in the presence of high electric fields by means of a gauge-invariant density-matrix approach. The proposed formulation of the transport problem allows us, on the one hand, to provide a gauge-independent formulation of Fermi’s golden rule; on the other hand, our analysis clearly shows that in the standard treatments of high-field carrier-phonon scattering—also referred to as intracollisional field effect—the possible variation of the basis states has been usually neglected. This is recognized to be the origin of the apparent discrepancy between scalar- and vector-potential treatments of the problem; indeed, a proper account of such contributions leads, in general, to an ill-defined Markov limit in the carrier-phonon interaction process, assigning to the scalar-potential or Wannier-Stark picture a privileged role. The neglect of such Zener-like contributions in the transport equation leads to a wrong estimation of the high-field voltage-current characteristics, and may partially account for the surprisingly good agreement between semiclassical and rigorous quantum-transport calculations previously reported. This is confirmed by fully three-dimensional simulations of charge transport in state-of-the-art semiconductor superlattices, which show a significant current overestimation.

Enhancement of ZnO based flexible nano generators via sol gel technique for sensing and energy harvesting applications.

PubMed

Rajagopalan, Pandey; Singh, Vipul; I A, Palani

2018-01-10

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its features have undesired limitations. Here we report the 5~6 folds enhancement in the piezoelectric properties via chemical doping of copper matched to intrinsic ZnO. The flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating with other advantages like robust, low weight, improved adhesion, and low cost. The devices were used to demonstrate energy harvesting from a Standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10~30 m/s) and five different angles of attack (0~180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved in it. © 2018 IOP Publishing Ltd.

Semiconductor ring lasers subject to both on-chip filtered optical feedback and external conventional optical feedback

NASA Astrophysics Data System (ADS)

Khoder, Mulham; Van der Sande, Guy; Danckaert, Jan; Verschaffelt, Guy

2016-05-01

It is well known that the performance of semiconductor lasers is very sensitive to external optical feedback. This feedback can lead to changes in lasing characteristics and a variety of dynamical effects including chaos and coherence collapse. One way to avoid this external feedback is by using optical isolation, but these isolators and their packaging will increase the cost of the total system. Semiconductor ring lasers nowadays are promising sources in photonic integrated circuits because they do not require cleaved facets or mirrors to form a laser cavity. Recently, some of us proposed to combine semiconductor ring lasers with on chip filtered optical feedback to achieve tunable lasers. The feedback is realized by employing two arrayed waveguide gratings to split/recombine light into different wavelength channels. Semiconductor optical amplifier gates are used to control the feedback strength. In this work, we investigate how such lasers with filtered feedback are influenced by an external conventional optical feedback. The experimental results show intensity fluctuations in the time traces in both the clockwise and counterclockwise directions due to the conventional feedback. We quantify the strength of the conventional feedback induced dynamics be extracting the standard deviation of the intensity fluctuations in the time traces. By using filtered feedback, we can shift the onset of the conventional feedback induced dynamics to larger values of the feedback rate [ Khoder et al, IEEE Photon. Technol. Lett. DOI: 10.1109/LPT.2016.2522184]. The on-chip filtered optical feedback thus makes the semiconductor ring laser less senstive to the effect of (long) conventional optical feedback. We think these conclusions can be extended to other types of lasers.

The role of titanium aluminide in n-gallium nitride ohmic contact technology

NASA Astrophysics Data System (ADS)

Pelto, Christopher M.

Ohmic contacts are essential to the realization of efficient and affordable nitride-based electronic and optoelectronic devices. Currently, the most successful ohmic contact schemes to n-GaN are based on the Al/Ti bilayer structure, although the mechanism responsible for the low resistance in these contacts is not sufficiently understood. In this work, the intermetallic TiAl3 has been employed both as a model ohmic contact system to help understand the essential features of the Al/Ti standard contact, as well as a thermally stable oxidation cap for the bilayer structure. A quaternary isotherm of the Al-Ti-Ga-N system was calculated at 600°C, which showed that a sufficient phase topology was present to apply the exchange mechanism to the TiAl 3/GaN couple. The exchange mechanism rationalized the selection of the TiAl3 intermetallic by predicting that an Al-rich AlGaN layer will form at the metal/semiconductor interface. As part of the investigation of these novel contact systems, a thorough characterization was undertaken on both a standard Al/Ti and Au/Ni/Al/Ti contact to n-GaN in which the essential processing parameters and metallurgical properties were identified. The TiAl 3 contact was found to exhibit inferior electrical behavior compared to the Al/Ti bilayer, requiring significantly higher annealing temperatures to achieve comparable specific contact resistance. It is conjectured that this is due to the early formation of a TiN layer at the metal/semiconductor interface of the bilayer contact, even though both contacts are suspected to form the Al-rich nitride layer at higher temperature. As an oxidation cap, the TiAl3 metallization was found to provide much improved performance characteristics compared to the four-layer Au/Al/Ni/Ti standard. The TiAl 3/Al/Ti contact proved to achieve optimal performance at a much lower temperature than the standard, and furthermore showed complete insensitivity to the oxidation content of the annealing ambient. Reaction mechanisms for the TiAl3-capped and the four-layer contact metallizations are suggested that account for both the morphology and the expected interfacial phases of each system.

Materials processing in space: Early experiments

NASA Technical Reports Server (NTRS)

Naumann, R. J.; Herring, H. W.

1980-01-01

The characteristics of the space environment were reviewed. Potential applications of space processing are discussed and include metallurgical processing, and processing of semiconductor materials. The behavior of fluid in low gravity is described. The evolution of apparatus for materials processing in space was reviewed.

CMOS/SOS processing

NASA Technical Reports Server (NTRS)

Ramondetta, P.

1980-01-01

Report describes processes used in making complementary - metal - oxide - semiconductor/silicon-on-sapphire (CMOS/SOS) integrated circuits. Report lists processing steps ranging from initial preparation of sapphire wafers to final mapping of "good" and "bad" circuits on a wafer.

Assembly of mesoscale helices with near-unity enantiomeric excess and light-matter interactions for chiral semiconductors.

PubMed

Feng, Wenchun; Kim, Ji-Young; Wang, Xinzhi; Calcaterra, Heather A; Qu, Zhibei; Meshi, Louisa; Kotov, Nicholas A

2017-03-01

Semiconductors with chiral geometries at the nanoscale and mesoscale provide a rich materials platform for polarization optics, photocatalysis, and biomimetics. Unlike metallic and organic optical materials, the relationship between the geometry of chiral semiconductors and their chiroptical properties remains, however, vague. Homochiral ensembles of semiconductor helices with defined geometries open the road to understanding complex relationships between geometrical parameters and chiroptical properties of semiconductor materials. We show that semiconductor helices can be prepared with an absolute yield of ca 0.1% and an enantiomeric excess (e.e.) of 98% or above from cysteine-stabilized cadmium telluride nanoparticles (CdTe NPs) dispersed in methanol. This high e.e. for a spontaneously occurring chemical process is attributed to chiral self-sorting based on the thermodynamic preference of NPs to assemble with those of the same handedness. The dispersions of homochiral self-assembled helices display broadband visible and near-infrared (Vis-NIR) polarization rotation with anisotropy ( g ) factors approaching 0.01. Calculated circular dichroism (CD) spectra accurately reproduced experimental CD spectra and gave experimentally validated spectral predictions for different geometrical parameters enabling de novo design of chiroptical semiconductor materials. Unlike metallic, ceramic, and polymeric helices that serve predominantly as scatterers, chiroptical properties of semiconductor helices have nearly equal contribution of light absorption and scattering, which is essential for device-oriented, field-driven light modulation. Deconstruction of a helix into a series of nanorods provides a simple model for the light-matter interaction and chiroptical activity of helices. This study creates a framework for further development of polarization-based optics toward biomedical applications, telecommunications, and hyperspectral imaging.

All-vapor processing of p-type tellurium-containing II-VI semiconductor and ohmic contacts thereof

DOEpatents

McCandless, Brian E.

2001-06-26

An all dry method for producing solar cells is provided comprising first heat-annealing a II-VI semiconductor; enhancing the conductivity and grain size of the annealed layer; modifying the surface and depositing a tellurium layer onto the enhanced layer; and then depositing copper onto the tellurium layer so as to produce a copper tellurium compound on the layer.

Oxide semiconductor thin-film transistors: a review of recent advances.

PubMed

Fortunato, E; Barquinha, P; Martins, R

2012-06-12

Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Metal-core/semiconductor-shell nanocones for broadband solar absorption enhancement.

PubMed

Zhou, Lin; Yu, Xiaoqiang; Zhu, Jia

2014-02-12

Nanostructure-based photovoltaic devices have exhibited several advantages, such as reduced reflection, extraordinary light trapping, and so forth. In particular, semiconductor nanostructures provide optical modes that have strong dependence on the size and geometry. Metallic nanostructures also attract a lot of attention because of the appealing plasmonic effect on the near-field enhancement. In this study, we propose a novel design, the metal-core/semiconductor-shell nanocones with the core radius varying in a linearly gradient style. With a thin layer of semiconductor absorber coated on a metallic cone, such a design can lead to significant and broadband absorption enhancement across the entire visible and near-infrared solar spectrum. As an example of demonstration, a layer of 16 nm thick crystalline silicon (c-Si) coated on a silver nanocone can absorb 27% of standard solar radiation across a broad spectral range of 300-1100 nm, which is equivalent to a 700 nm thick flat c-Si film. Therefore, the absorption enhancement factor approaching the Yablonovitch limit is achieved with this design. The significant absorption enhancement can be ascribed to three types of optical modes, that is, Fabry-Perot modes, plasmonic modes, and hybrid modes that combine the features of the previous two. In addition, the unique nanocone geometry enables the linearly gradient radius of the semiconductor shell, which can support multiple optical resonances, critical for the broadband absorption. Our design may find general usage as elements for the low cost, high efficiency solar conversion and water-splitting devices.

Quantum Information Processing with Large Nuclear Spins in GaAs Semiconductors

NASA Astrophysics Data System (ADS)

Leuenberger, Michael N.; Loss, Daniel; Poggio, M.; Awschalom, D. D.

2002-10-01

We propose an implementation for quantum information processing based on coherent manipulations of nuclear spins I=3/2 in GaAs semiconductors. We describe theoretically an NMR method which involves multiphoton transitions and which exploits the nonequidistance of nuclear spin levels due to quadrupolar splittings. Starting from known spin anisotropies we derive effective Hamiltonians in a generalized rotating frame, valid for arbitrary I, which allow us to describe the nonperturbative time evolution of spin states generated by magnetic rf fields. We identify an experimentally observable regime for multiphoton Rabi oscillations. In the nonlinear regime, we find Berry phase interference.

Superconducting active impedance converter

DOEpatents

Ginley, David S.; Hietala, Vincent M.; Martens, Jon S.

1993-01-01

A transimpedance amplifier for use with high temperature superconducting, other superconducting, and conventional semiconductor allows for appropriate signal amplification and impedance matching to processing electronics. The amplifier incorporates the superconducting flux flow transistor into a differential amplifier configuration which allows for operation over a wide temperature range, and is characterized by high gain, relatively low noise, and response times less than 200 picoseconds over at least a 10-80 K. temperature range. The invention is particularly useful when a signal derived from either far-IR focal plane detectors or from Josephson junctions is to be processed by higher signal/higher impedance electronics, such as conventional semiconductor technology.

The Promoting Role of Different Carbon Allotropes Cocatalysts for Semiconductors in Photocatalytic Energy Generation and Pollutants Degradation

PubMed Central

Han, Weiwei; Li, Zhen; Li, Yang; Fan, Xiaobin; Zhang, Fengbao; Zhang, Guoliang; Peng, Wenchao

2017-01-01

Semiconductor based photocatalytic process is of great potential for solving the fossil fuels depletion and environmental pollution. Loading cocatalysts for the modification of semiconductors could increase the separation efficiency of the photogenerated hole-electron pairs, enhance the light absorption ability of semiconductors, and thus obtain new composite photocatalysts with high activities. Kinds of carbon allotropes, such as activated carbon, carbon nanotubes, graphene, and carbon quantum dots have been used as effective cocatalysts to enhance the photocatalytic activities of semiconductors, making them widely used for photocatalytic energy generation, and pollutants degradation. This review focuses on the loading of different carbon allotropes as cocatalysts in photocatalysis, and summarizes the recent progress of carbon materials based photocatalysts, including their synthesis methods, the typical applications, and the activity enhancement mechanism. Moreover, the cocatalytic effect among these carbon cocatalysts is also compared for different applications. We believe that our work can provide enriched information to harvest the excellent special properties of carbon materials as a platform to develop more efficient photocatalysts for solar energy utilization. PMID:29164101

The Promoting Role of Different Carbon Allotropes Cocatalysts for Semiconductors in Photocatalytic Energy Generation and Pollutants Degradation

NASA Astrophysics Data System (ADS)

Han, Weiwei; Li, Zhen; Li, Yang; Fan, Xiaobin; Zhang, Fengbao; Zhang, Guoliang; Peng, Wenchao

2017-10-01

Semiconductor based photocatalytic process is of great potential for solving the fossil fuels depletion and environmental pollution. Loading cocatalysts for the modification of semiconductors could increase the separation efficiency of the photogenerated hole-electron pairs, enhance the light absorption ability of semiconductors, and thus obtain new composite photocatalysts with high activities. Kinds of carbon allotropes, such as activated carbon, carbon nanotubes, graphene, and carbon quantum dots have been used as effective cocatalysts to enhance the photocatalytic activities of semiconductors, making them widely used for photocatalytic energy generation and pollutants degradation. This review focuses on the loading of different carbon allotropes as cocatalysts in photocatalysis, and summarizes the recent progress of carbon materials based photocatalysts, including their synthesis methods, the typical applications and the activity enhancement mechanism. Moreover, the cocatalytic effect among these carbon cocatalysts is also compared for different applications. We believe that our work can provide enriched information to harvest the excellent special properties of carbon materials as a platform to develop more efficient photocatalysts for solar energy utilization.

Leukemia and non-Hodgkin lymphoma in semiconductor industry workers in Korea.

PubMed

Kim, Inah; Kim, Hyun J; Lim, Sin Y; Kongyoo, Jungok

2012-01-01

Reports of leukemia and non-Hodgkin lymphoma (NHL), cancers known to have a similar pathophysiology, among workers in the semiconductor industry have generated much public concern in Korea. This paper describes cases reported to the NGO Supporters for the Health and Rights of People in the Semiconductor Industry (SHARPs). We identified demographic characteristics, occupational, and disease history, for 17 leukemia and NHL cases from the Giheung Samsung semiconductor plant, diagnosed from November 2007 to January 2011. Patients were relatively young (mean = 28·5 years, SD = 6·5) at the time of diagnosis and the mean latency period was 104·3 months (SD = 65·8). Majority of the cases were fabrication operators (11 workers among 17) and 12 were hired before 2000. Six cases worked in the etching or diffusion process. The evidence to confirm the causal relationship between exposures in the semiconductor industry and leukemia or NHL remains insufficient and a more formal, independent study of the exposure-disease relationship in this occupation is needed. However, workers should be protected from the potential exposures immediately.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Thermal Diffusivity for III-VI Semiconductor Melts at Different Temperatures

NASA Technical Reports Server (NTRS)

Ban, H.; Li, C.; Lin, B.; Emoto, K.; Scripa, R. N.; Su, C.-H.; Lehoczky, S. L.

2004-01-01

The change of the thermal properties of semiconductor melts reflects the structural changes inside the melts, and a fundamental understanding of this structural transformation is essential for high quality semiconductor crystal growth process. This paper focused on the technical development and the measurement of thermal properties of III-VI semiconductor melts at high temperatures. Our previous work has improved the laser flash method for the specialized quartz sample cell. In this paper, we reported the results of our recent progress in further improvements of the measurement system by minimizing the free convection of the melt, adding a front IR detector, and placing the sample cell in a vacuum environment. The results for tellurium and selenium based compounds, some of which have never been reported in the literature, were obtained at different temperatures as a function of time. The data were compared with other measured thermophysical properties to shed light on the structural transformations of the melt.

Determination of the density of surface states at the semiconductor-insulator interface in a metal-insulator-semiconductor structure

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gulyamov, G., E-mail: Gulyamov1949@rambler.ru; Sharibaev, N. U.

2011-02-15

The temporal dependence of thermal generation of electrons from occupied surface states at the semiconductor-insulator interface in a metal-insulator-semiconductor structure is studied. It is established that, at low temperatures, the derivative of the probability of depopulation of occupied surface states with respect to energy is represented by the Dirac {delta} function. It is shown that the density of states of a finite number of discrete energy levels under high-temperature measurements manifests itself as a continuous spectrum, whereas this spectrum appears discrete at low temperatures. A method for processing the continuous spectrum of the density of surface states is suggested thatmore » method makes it possible to determine the discrete energy spectrum. The obtained results may be conducive to an increase in resolution of the method of non-stationary spectroscopy of surface states.« less

Semiconductor-Based Photoelectrochemical Conversion of Carbon Dioxide: Stepping Towards Artificial Photosynthesis.

PubMed

Pang, Hong; Masuda, Takuya; Ye, Jinhua

2018-01-18

The photoelectrochemical (PEC) carbon dioxide reduction process stands out as a promising avenue for the conversion of solar energy into chemical feedstocks, among various methods available for carbon dioxide mitigation. Semiconductors derived from cheap and abundant elements are interesting candidates for catalysis. Whether employed as intrinsic semiconductors or hybridized with metallic cocatalysts, biocatalysts, and metal molecular complexes, semiconductor photocathodes exhibit good performance and low overpotential during carbon dioxide reduction. Apart from focusing on carbon dioxide reduction materials and chemistry, PEC cells towards standalone devices that use photohybrid electrodes or solar cells have also been a hot topic in recent research. An overview of the state-of-the-art progress in PEC carbon dioxide reduction is presented and a deep understanding of the catalysts of carbon dioxide reduction is also given. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.