Active pixel sensor array with multiresolution readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

1999-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

High density electronic circuit and process for making

DOEpatents

Morgan, William P.

1999-01-01

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.

Experimental and theoretical analysis of integrated circuit (IC) chips on flexible substrates subjected to bending

NASA Astrophysics Data System (ADS)

Chen, Ying; Yuan, Jianghong; Zhang, Yingchao; Huang, Yonggang; Feng, Xue

2017-10-01

The interfacial failure of integrated circuit (IC) chips integrated on flexible substrates under bending deformation has been studied theoretically and experimentally. A compressive buckling test is used to impose the bending deformation onto the interface between the IC chip and the flexible substrate quantitatively, after which the failed interface is investigated using scanning electron microscopy. A theoretical model is established based on the beam theory and a bi-layer interface model, from which an analytical expression of the critical curvature in relation to the interfacial failure is obtained. The relationships between the critical curvature, the material, and the geometric parameters of the device are discussed in detail, providing guidance for future optimization flexible circuits based on IC chips.

SPICE Modeling of Body Bias Effect in 4H-SiC Integrated Circuit Resistors

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Cross-guide Moreno directional coupler in empty substrate integrated waveguide

NASA Astrophysics Data System (ADS)

Miralles, E.; Belenguer, A.; Esteban, H.; Boria, V.

2017-05-01

Substrate integrated waveguides (SIWs) combine the advantages of rectangular waveguides (low losses) and planar circuits (low cost and low profile). Empty substrate integrated waveguide (ESIW) has been proposed as a novel configuration in SIWs recently. This technology significantly reduces the losses of conventional SIW by removing its inner dielectric. The cross-guide directional coupler is a well-known low-profile design for having a broadband waveguide coupler. In this paper a cross-guide coupler with ESIW technique is proposed. In such a manner, the device can be integrated with microwave circuits and other printed circuit board components. It is the first time that a cross-guide coupler is implemented in ESIW technology. The designed, fabricated, and measured device presents good results as a matter of insertion loss of 1 dB (including transitions), reflection under 20 dB, coupling between 19.5 and 21.5 dB, and directivity higher than 15 dB over targeted frequency range from 12.4 GHz to 18 GHz. The coupler implemented in ESIW improves the directivity when compared to similar solutions in other empty substrate integrated waveguide solutions.

High density electronic circuit and process for making

DOEpatents

Morgan, W.P.

1999-06-29

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

Vacuum die attach for integrated circuits

DOEpatents

Schmitt, E.H.; Tuckerman, D.B.

1991-09-10

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required. 1 figure.

Vacuum die attach for integrated circuits

DOEpatents

Schmitt, Edward H.; Tuckerman, David B.

1991-01-01

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required.

Method for deposition of a conductor in integrated circuits

DOEpatents

Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

1997-01-01

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

Inclusion of Body Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 degrees Celsius durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Inclusion of Body-Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

PubMed

Cao, Qing; Kim, Hoon-sik; Pimparkar, Ninad; Kulkarni, Jaydeep P; Wang, Congjun; Shim, Moonsub; Roy, Kaushik; Alam, Muhammad A; Rogers, John A

2008-07-24

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm(2) V(-1) s(-1), subthreshold slopes as low as 140 m V dec(-1), operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 10(5), switching speeds in the kilohertz range even for coarse (approximately 100-microm) device geometries, and good mechanical flexibility-all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

Millimeter-wave and terahertz integrated circuit antennas

NASA Technical Reports Server (NTRS)

Rebeiz, Gabriel M.

1992-01-01

This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

Method for deposition of a conductor in integrated circuits

DOEpatents

Creighton, J.R.; Dominguez, F.; Johnson, A.W.; Omstead, T.R.

1997-09-02

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten. 2 figs.

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Optoelectronic Integrated Circuits For Neural Networks

NASA Technical Reports Server (NTRS)

Psaltis, D.; Katz, J.; Kim, Jae-Hoon; Lin, S. H.; Nouhi, A.

1990-01-01

Many threshold devices placed on single substrate. Integrated circuits containing optoelectronic threshold elements developed for use as planar arrays of artificial neurons in research on neural-network computers. Mounted with volume holograms recorded in photorefractive crystals serving as dense arrays of variable interconnections between neurons.

Integration of InGaAs MOSFETs and GaAs/ AlGaAs lasers on Si Substrate for advanced opto-electronic integrated circuits (OEICs).

PubMed

Kumar, Annie; Lee, Shuh-Ying; Yadav, Sachin; Tan, Kian Hua; Loke, Wan Khai; Dong, Yuan; Lee, Kwang Hong; Wicaksono, Satrio; Liang, Gengchiau; Yoon, Soon-Fatt; Antoniadis, Dimitri; Yeo, Yee-Chia; Gong, Xiao

2017-12-11

Lasers monolithically integrated with high speed MOSFETs on the silicon (Si) substrate could be a key to realize low cost, low power, and high speed opto-electronic integrated circuits (OEICs). In this paper, we report the monolithic integration of InGaAs channel transistors with electrically pumped GaAs/AlGaAs lasers on the Si substrate for future advanced OEICs. The laser and transistor layers were grown on the Si substrate by molecular beam epitaxy (MBE) using direct epitaxial growth. InGaAs n-FETs with an I ON /I OFF ratio of more than 10 6 with very low off-state leakage and a low subthreshold swing with a minimum of 82 mV/decade were realized. Electrically pumped GaAs/AlGaAs quantum well (QW) lasers with a lasing wavelength of 795 nm at room temperature were demonstrated. The overall fabrication process has a low thermal budget of no more than 400 °C.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Method and apparatus for increasing resistance of bipolar buried layer integrated circuit devices to single-event upsets

NASA Technical Reports Server (NTRS)

Zoutendyk, John A. (Inventor)

1991-01-01

Bipolar transistors fabricated in separate buried layers of an integrated circuit chip are electrically isolated with a built-in potential barrier established by doping the buried layer with a polarity opposite doping in the chip substrate. To increase the resistance of the bipolar transistors to single-event upsets due to ionized particle radiation, the substrate is biased relative to the buried layer with an external bias voltage selected to offset the built-in potential just enough (typically between about +0.1 to +0.2 volt) to prevent an accumulation of charge in the buried-layer-substrate junction.

Single chip camera device having double sampling operation

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Nixon, Robert (Inventor)

2002-01-01

A single chip camera device is formed on a single substrate including an image acquisition portion for control portion and the timing circuit formed on the substrate. The timing circuit also controls the photoreceptors in a double sampling mode in which are reset level is first read and then after an integration time a charged level is read.

Fully Printed Stretchable Thin-Film Transistors and Integrated Logic Circuits.

PubMed

Cai, Le; Zhang, Suoming; Miao, Jinshui; Yu, Zhibin; Wang, Chuan

2016-12-27

This paper reports intrinsically stretchable thin-film transistors (TFTs) and integrated logic circuits directly printed on elastomeric polydimethylsiloxane (PDMS) substrates. The printed devices utilize carbon nanotubes and a type of hybrid gate dielectric comprising PDMS and barium titanate (BaTiO 3 ) nanoparticles. The BaTiO 3 /PDMS composite simultaneously provides high dielectric constant, superior stretchability, low leakage, as well as good printability and compatibility with the elastomeric substrate. Both TFTs and logic circuits can be stretched beyond 50% strain along either channel length or channel width directions for thousands of cycles while showing no significant degradation in electrical performance. This work may offer an entry into more sophisticated stretchable electronic systems with monolithically integrated sensors, actuators, and displays, fabricated by scalable and low-cost methods for real life applications.

Method of producing an electronic unit having a polydimethylsiloxane substrate and circuit lines

DOEpatents

Davidson, James Courtney [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Tovar, Armando R [San Antonio, TX

2012-06-19

A system of metalization in an integrated polymer microsystem. A flexible polymer substrate is provided and conductive ink is applied to the substrate. In one embodiment the flexible polymer substrate is silicone. In another embodiment the flexible polymer substrate comprises poly(dimethylsiloxane).

Flexible, Photopatterned, Colloidal CdSe Semiconductor Nanocrystal Integrated Circuits

NASA Astrophysics Data System (ADS)

Stinner, F. Scott

As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting "inks" into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with 7 kHz bandwidths, ring oscillators with <10 micros stage delays, and NAND and NOR logic gates. In order to produce higher performance and more consistent transistors, we develop a new hybrid procedure for processing the CdSe nanocrystals. This procedure produces transistors with repeatable performance exceeding 40 cm2/Vs when fabricated on silicon wafers and 16 cm 2/vs when fabricated as part of photopatterned integrated circuits on Kapton substrates. In order to demonstrate the full potential of these transistors, methods to create high-frequency oscillators were developed. These methods allow for transistors to operate at higher voltages as well as provide a means for wirebonding to the Kapton substrate, both of which are required for operating and probing high-frequency oscillators. Simulations of this system show the potential for operation at MHz frequencies. Demonstration of these transistors in this frequency range would open the door for development of CdSe integrated circuits for high-performance sensor, display, and audio applications. To develop further applications of electronics on flexible substrates, procedures are developed for the integration of polychromatic displays on polyethylene terephthalate (PET) substrates and a commercial near field communication (NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging.

Solar cell circuit and method for manufacturing solar cells

NASA Technical Reports Server (NTRS)

Mardesich, Nick (Inventor)

2010-01-01

The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.

Fabrication of Nanoscale Circuits on Inkjet-Printing Patterned Substrates.

PubMed

Chen, Shuoran; Su, Meng; Zhang, Cong; Gao, Meng; Bao, Bin; Yang, Qiang; Su, Bin; Song, Yanlin

2015-07-08

Nanoscale circuits are fabricated by assembling different conducting materials (e.g., metal nanoparticles, metal nano-wires, graphene, carbon nanotubes, and conducting polymers) on inkjet-printing patterned substrates. This non-litho-graphy strategy opens a new avenue for integrating conducting building blocks into nanoscale devices in a cost-efficient manner. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Encapsulate-and-peel: fabricating carbon nanotube CMOS integrated circuits in a flexible ultra-thin plastic film.

PubMed

Gao, Pingqi; Zhang, Qing

2014-02-14

Fabrication of single-walled carbon nanotube thin film (SWNT-TF) based integrated circuits (ICs) on soft substrates has been challenging due to several processing-related obstacles, such as printed/transferred SWNT-TF pattern and electrode alignment, electrical pad/channel material/dielectric layer flatness, adherence of the circuits onto the soft substrates etc. Here, we report a new approach that circumvents these challenges by encapsulating pre-formed SWNT-TF-ICs on hard substrates into polyimide (PI) and peeling them off to form flexible ICs on a large scale. The flexible SWNT-TF-ICs show promising performance comparable to those circuits formed on hard substrates. The flexible p- and n-type SWNT-TF transistors have an average mobility of around 60 cm(2) V(-1) s(-1), a subthreshold slope as low as 150 mV dec(-1), operating gate voltages less than 2 V, on/off ratios larger than 10(4) and a switching speed of several kilohertz. The post-transfer technique described here is not only a simple and cost-effective pathway to realize scalable flexible ICs, but also a feasible method to fabricate flexible displays, sensors and solar cells etc.

Photo-Spectrometer Realized In A Standard Cmos Ic Process

DOEpatents

Simpson, Michael L.; Ericson, M. Nance; Dress, William B.; Jellison, Gerald E.; Sitter, Jr., David N.; Wintenberg, Alan L.

1999-10-12

A spectrometer, comprises: a semiconductor having a silicon substrate, the substrate having integrally formed thereon a plurality of layers forming photo diodes, each of the photo diodes having an independent spectral response to an input spectra within a spectral range of the semiconductor and each of the photo diodes formed only from at least one of the plurality of layers of the semiconductor above the substrate; and, a signal processing circuit for modifying signals from the photo diodes with respective weights, the weighted signals being representative of a specific spectral response. The photo diodes have different junction depths and different polycrystalline silicon and oxide coverings. The signal processing circuit applies the respective weights and sums the weighted signals. In a corresponding method, a spectrometer is manufactured by manipulating only the standard masks, materials and fabrication steps of standard semiconductor processing, and integrating the spectrometer with a signal processing circuit.

Sensing circuits for multiwire proportional chambers

NASA Technical Reports Server (NTRS)

Peterson, H. T.; Worley, E. R.

1977-01-01

Integrated sensing circuits were designed, fabricated, and packaged for use in determining the direction and fluence of ionizing radiation passing through a multiwire proportional chamber. CMOS on sapphire was selected because of its high speed and low power capabilities. The design of the proposed circuits is described and the results of computer simulations are presented. The fabrication processes for the CMOS on sapphire sensing circuits and hybrid substrates are outlined. Several design options are described and the cost implications of each discussed. To be most effective, each chip should handle not more than 32 inputs, and should be mounted on its own hybrid substrate.

Pentacene-based organic thin film transistors, integrated circuits, and active matrix displays on polymeric substrates

NASA Astrophysics Data System (ADS)

Sheraw, Christopher Duncan

2003-10-01

Organic thin film transistors are attractive candidates for a variety of low cost, large area commercial electronics including smart cards, RF identification tags, and flat panel displays. Of particular interest are high performance organic thin film transistors (TFTs) that can be fabricated on flexible polymeric substrates allowing low-cost, lightweight, rugged electronics such as flexible active matrix displays. This thesis reports pentacene organic thin film transistors fabricated on flexible polymeric substrates with record performance, the fastest photolithographically patterned organic TFT integrated circuits on polymeric substrates reported to date, and the fabrication of the organic TFT backplanes used to build the first organic TFT-driven active matrix liquid crystal display (AMLCD), also the first AMLCD on a flexible substrate, ever reported. In addition, the first investigation of functionalized pentacene derivatives used as the active layer in organic thin film transistors is reported. A low temperature (<110°C) process technology was developed allowing the fabrication of high performance organic TFTs, integrated circuits, and large TFT arrays on flexible polymeric substrates. This process includes the development of a novel water-based photolithographic active layer patterning process using polyvinyl alcohol that allows the patterning of organic semiconductor materials for elimination of active layer leakage current without causing device degradation. The small molecule aromatic hydrocarbon pentacene was used as the active layer material to fabricate organic TFTs on the polymeric material polyethylene naphthalate with field-effect mobility as large as 2.1 cm2/V-s and on/off current ratio of 108. These are the best values reported for organic TFTs on polymeric substrates and comparable to organic TFTs on rigid substrates. Analog and digital integrated circuits were also fabricated on polymeric substrates using pentacene TFTs with propagation delay as low as 38 musec and clocked digital circuits that operated at 1.1 kHz. These are the fastest photolithographically patterned organic TFT circuits on polymeric substrates reported to date. Finally, 16 x 16 pentacene TFT pixel arrays were fabricated on polymeric substrates and integrated with polymer dispersed liquid crystal to build an AMLCD. The pixel arrays showed good optical response to changing data signals when standard quarter-VGA display waveforms were applied. This result marks the first organic TFT-driven active matrix liquid crystal display ever reported as well as the first active matrix liquid crystal display on a flexible polymeric substrate. Lastly, functionalized pentacene derivatives were used as the active layer in organic thin film transistor materials. Functional groups were added to the pentacene molecule to influence the molecular ordering so that the amount of pi-orbital overlap would be increased allowing the potential for improved field-effect mobility. The functionalization of these materials also improves solubility allowing for the possibility of solution-processed devices and increased oxidative stability. Organic thin film transistors were fabricated using five different functionalized pentacene active layers. Devices based on the pentacene derivative triisopropylsilyl pentacene were found to have the best performance with field-effect mobility as large as 0.4 cm 2/V-s.

A Substrate Integrated Waveguide Sensor for Measurement of Dielectric Properties of Biomass Materials

USDA-ARS?s Scientific Manuscript database

Substrate integrated waveguide- based sensors balance the performance and well known design techniques of classical waveguides with the cheaper and more adaptable aspects of planar circuits. Propagation characteristics are similar to waveguides with the design retaining many positive aspects of wave...

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Inverter circuits on freestanding flexible substrate using ZnO nanoparticles for cost-efficient electronics

NASA Astrophysics Data System (ADS)

Vidor, Fábio F.; Meyers, Thorsten; Müller, Kathrin; Wirth, Gilson I.; Hilleringmann, Ulrich

2017-11-01

Driven by the Internet of Things (IoT), flexible and transparent smart systems have been intensively researched by the scientific community and by several companies. This technology is already available for consumers in a wide range of innovative products, e.g., flexible displays, radio-frequency identification tags and wearable electronic skins which, for instance, collect and analyze data for medical applications. For these systems, thin-film transistors (TFTs) are the key elements responsible for the driving currents. Solution-based materials such as nanoparticle dispersions avail the fabrication on large-area substrates with high throughput processes. In this study, we discuss the integration of ZnO nanoparticle thin-film transistors and inverter circuits on freestanding polymeric substrates enclosing the main issues concerning the transfer of the integration process from a rigid substrate to a flexible one. The TFTs depict VON between -0.2 and 1 V, ION/IOFF > 104 and field-effect mobility >0.5 cm2 V-1 s-1. Additionally, in order to enhance the transistors and inverters performance, an adaptation on the device configuration, from an inverted coplanar to an inverted staggered setup, was conducted and analyzed. By employing the inverted staggered setup a considerable increase in the contact quality between the semiconductor and the drain and source electrodes was observed. As the integrated devices depict electrical characteristics which enable the fabrication of electronic circuits for the low-cost sector, inverters were fabricated and characterized, evaluating the circuit's gain as function of the applied supply voltage and circuit's geometric ratio.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

NASA Astrophysics Data System (ADS)

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-02-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design.

Quantum cascade lasers grown on silicon.

PubMed

Nguyen-Van, Hoang; Baranov, Alexei N; Loghmari, Zeineb; Cerutti, Laurent; Rodriguez, Jean-Baptiste; Tournet, Julie; Narcy, Gregoire; Boissier, Guilhem; Patriarche, Gilles; Bahriz, Michael; Tournié, Eric; Teissier, Roland

2018-05-08

Technological platforms offering efficient integration of III-V semiconductor lasers with silicon electronics are eagerly awaited by industry. The availability of optoelectronic circuits combining III-V light sources with Si-based photonic and electronic components in a single chip will enable, in particular, the development of ultra-compact spectroscopic systems for mass scale applications. The first circuits of such type were fabricated using heterogeneous integration of semiconductor lasers by bonding the III-V chips onto silicon substrates. Direct epitaxial growth of interband III-V laser diodes on silicon substrates has also been reported, whereas intersubband emitters grown on Si have not yet been demonstrated. We report the first quantum cascade lasers (QCLs) directly grown on a silicon substrate. These InAs/AlSb QCLs grown on Si exhibit high performances, comparable with those of the devices fabricated on their native InAs substrate. The lasers emit near 11 µm, the longest emission wavelength of any laser integrated on Si. Given the wavelength range reachable with InAs/AlSb QCLs, these results open the way to the development of a wide variety of integrated sensors.

Extremely Bendable, High-Performance Integrated Circuits Using Semiconducting Carbon Nanotube Networks for Digital, Analog, and Radio-Frequency Applications

DTIC Science & Technology

2012-02-07

circuits on mechanically flexible substrates for digital, analog and radio frequency applications. The asobtained thin-film transistors ( TFTs ) exhibit... flexible substrates for digital, analog and radio frequency applications. The as- obtained thin-film transistors ( TFTs ) exhibit highly uniform device...LCD) and organic light- emitting diode ( OLED ) displays lack the transparency and flexibility and are thus unsuitable for flexible electronic

Assembling surface mounted components on ink-jet printed double sided paper circuit board.

PubMed

Andersson, Henrik A; Manuilskiy, Anatoliy; Haller, Stefan; Hummelgård, Magnus; Sidén, Johan; Hummelgård, Christine; Olin, Håkan; Nilsson, Hans-Erik

2014-03-07

Printed electronics is a rapidly developing field where many components can already be manufactured on flexible substrates by printing or by other high speed manufacturing methods. However, the functionality of even the most inexpensive microcontroller or other integrated circuit is, at the present time and for the foreseeable future, out of reach by means of fully printed components. Therefore, it is of interest to investigate hybrid printed electronics, where regular electrical components are mounted on flexible substrates to achieve high functionality at a low cost. Moreover, the use of paper as a substrate for printed electronics is of growing interest because it is an environmentally friendly and renewable material and is, additionally, the main material used for many packages in which electronics functionalities could be integrated. One of the challenges for such hybrid printed electronics is the mounting of the components and the interconnection between layers on flexible substrates with printed conductive tracks that should provide as low a resistance as possible while still being able to be used in a high speed manufacturing process. In this article, several conductive adhesives are evaluated as well as soldering for mounting surface mounted components on a paper circuit board with ink-jet printed tracks and, in addition, a double sided Arduino compatible circuit board is manufactured and programmed.

Flow sensor based on monolithic integration of organic light-emitting diodes (OLEDs) and CMOS circuits

NASA Astrophysics Data System (ADS)

Reckziegel, S.; Kreye, D.; Puegner, T.; Vogel, U.; Scholles, M.; Grillberger, C.; Fehse, K.

2009-02-01

In this paper we present an optoelectronic integrated circuit (OEIC) based on monolithic integration of organic lightemitting diodes (OLEDs) and CMOS technology. By the use of integrated circuits, photodetectors and highly efficient OLEDs on the same silicon chip, novel OEICs with combined sensors and actuating elements can be realized. The OLEDs are directly deposited on the CMOS top metal. The metal layer serves as OLED bottom electrode and determines the bright area. Furthermore, the area below the OLED electrodes can be used for integrated circuits. The monolithic integration of actuators, sensors and electronics on a common silicon substrate brings significant advantages in most sensory applications. The developed OEIC combines three different types of sensors: a reflective sensor, a color sensor and a particle flow sensor and is configured with an orange (597nm) emitting p-i-n OLED. We describe the architecture of such a monolithic OEIC and demonstrate a method to determine the velocity of a fluid being conveyed pneumatically in a transparent capillary. The integrated OLEDs illuminate the capillary with the flowing fluid. The fluid has a random reflection profile. Depending on the velocity and a random contrast difference, more or less light is reflected back to the substrate. The integrated photodiodes located at different fixed points detect the reflected light and using crosscorrelation, the velocity is calculated from the time in which contrast differences move over a fixed distance.

Integrated-circuit balanced parametric amplifier

NASA Technical Reports Server (NTRS)

Dickens, L. E.

1975-01-01

Amplifier, fabricated on single dielectric substrate, has pair of Schottky barrier varactor diodes mounted on single semiconductor chip. Circuit includes microstrip transmission line and slot line section to conduct signals. Main features of amplifier are reduced noise output and low production cost.

A Short Open Calibration (SOC) Technique to Calculate the Propagation Characteristics of Substrate Integrated Waveguide

DTIC Science & Technology

2015-07-01

integrated with the commercial electromagnetic software for accurate extraction of propagation constant of substrate integrated waveguide ( SIW ) with...respectively. After three distinctive equivalent circuit networks are described for SOC de-embedding procedure. The propagation constants of SIW with...final, the phase and attenuation constants of SIW are derived to demonstrate the propagation and leakage characteristics of SIW . Index Terms

Pin-deposition of conductive inks for microelectrodes and contact via filling

DOEpatents

Davidson, J. Courtney; Krulevitch, Peter A.; Maghribi, Mariam N.; Hamilton, Julie K.; Benett, William J.; Tovar, Armando R.

2006-05-02

A method of metalization of an integrated microsystem. The method comprises providing a substrate and applying a conductive material to the substrate by taking up small aliquots of conductive material and releasing the conductive material onto the substrate to produce a circuit component.

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

PubMed Central

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-01-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design. PMID:28145438

Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

PubMed

Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

2015-10-14

We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

Heterogeneous Monolithic Integration of Single-Crystal Organic Materials.

PubMed

Park, Kyung Sun; Baek, Jangmi; Park, Yoonkyung; Lee, Lynn; Hyon, Jinho; Koo Lee, Yong-Eun; Shrestha, Nabeen K; Kang, Youngjong; Sung, Myung Mo

2017-02-01

Manufacturing high-performance organic electronic circuits requires the effective heterogeneous integration of different nanoscale organic materials with uniform morphology and high crystallinity in a desired arrangement. In particular, the development of high-performance organic electronic and optoelectronic devices relies on high-quality single crystals that show optimal intrinsic charge-transport properties and electrical performance. Moreover, the heterogeneous integration of organic materials on a single substrate in a monolithic way is highly demanded for the production of fundamental organic electronic components as well as complex integrated circuits. Many of the various methods that have been designed to pattern multiple heterogeneous organic materials on a substrate and the heterogeneous integration of organic single crystals with their crystal growth are described here. Critical issues that have been encountered in the development of high-performance organic integrated electronics are also addressed. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Monolithic optical integrated control circuitry for GaAs MMIC-based phased arrays

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Ponchak, G. E.; Kascak, T. J.

1985-01-01

Gallium arsenide (GaAs) monolithic microwave integrated circuits (MMIC's) show promise in phased-array antenna applications for future space communications systems. Their efficient usage will depend on the control of amplitude and phase signals for each MMIC element in the phased array and in the low-loss radiofrequency feed. For a phased array contining several MMIC elements a complex system is required to control and feed each element. The characteristics of GaAs MMIC's for 20/30-GHz phased-array systems are discussed. The optical/MMIC interface and the desired characteristics of optical integrated circuits (OIC's) for such an interface are described. Anticipated fabrication considerations for eventual full monolithic integration of optical integrated circuits with MMIC's on a GaAs substrate are presented.

Improved process for epitaxial deposition of silicon on prediffused substrates

NASA Technical Reports Server (NTRS)

Clarke, M. G.; Halsor, J. L.; Word, J. C.

1968-01-01

Process for fabricating integrated circuits uniformly deposits silicon epitaxially on prediffused substrates without affecting the sublayer diffusion pattern. Two silicon deposits from different sources, and deposited at different temperatures, protect the sublayer pattern from the silicon tetrachloride reaction.

Thin glass based packaging and photonic single-mode waveguide integration by ion-exchange technology on board and module level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Lang, Günter; Schröder, Henning

2011-01-01

The proposed novel packaging approach merges micro-system packaging and glass integrated optics. It provides 3D optical single-mode intra system links to bridge the gap between novel photonic integrated circuits and the glass fibers for inter system interconnects. We introduce our hybrid 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip links. Optical mirrors and lenses provide optical mode matching for photonic IC assemblies and optical fiber interconnects. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties as reviewed in the paper. That makes it perfect for micro-system packaging. The adopted planar waveguide process based on ion-exchange technology is capable for high-volume manufacturing. This ion-exchange process and the optical propagation are described in detail for thin glass substrates. An extensive characterization of all basic circuit elements like straight and curved waveguides, couplers and crosses proves the low attenuation of the optical circuit elements.

Novel electrochemical nickel metallization in silicon impedance engineering for mixed-signal system-on-chip crosstalk isolation

NASA Astrophysics Data System (ADS)

Zhang, Xi

One of the major challenges for single chip radio frequency integrated circuits (RFIC's) built on Si is the RE crosstalk through the Si substrate. Noise from switching transient in digital circuits can be transmitted through Si substrate and degrades the performance of analog circuit elements. A highly conductive moat or Faraday cage type structure of through-the-wafer thickness in the Si substrate was demonstrated to be effective in shielding electromagnetic interference thereby reducing RE cross-talk in high performance mixed signal integrated circuits. Such a structure incorporated into the p- Si substrate was realized by electroless Ni metallization over selected regions with ultra-high-aspect-ratio macropores that was etched electrochemically in p- Si substrates. The metallization process was conducted by immersing the macroporous Si sample in an alkaline aqueous solution containing Ni2+ without a reducing agent. It was found that working at slightly elevated temperature, Ni 2+ was rapidly reduced and deposited in the macropores. During the wet chemical process, conformal metallization on the pore wall was achieved. The entire porous Si skeleton was gradually replaced by Ni along the extended duration of immersion. In a p-/p+ epi Si substrate used for high performance digital CMOS, the suppression of crosstalk by the arrayed metallic Ni via structure fabricated from the front p side was significant that the crosstalk went down to the noise floor of the conventional measurement instruments. The process and mechanism of forming such a Ni structure over the original Si were studied. Theoretical computation relevant to the process was carried out to show a good consistency with the experiments.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

DOEpatents

Lodi, Robert J.

1976-01-01

A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

High quality silicon-based substrates for microwave and millimeter wave passive circuits

NASA Astrophysics Data System (ADS)

Belaroussi, Y.; Rack, M.; Saadi, A. A.; Scheen, G.; Belaroussi, M. T.; Trabelsi, M.; Raskin, J.-P.

2017-09-01

Porous silicon substrate is very promising for next generation wireless communication requiring the avoidance of high-frequency losses originating from the bulk silicon. In this work, new variants of porous silicon (PSi) substrates have been introduced. Through an experimental RF performance, the proposed PSi substrates have been compared with different silicon-based substrates, namely, standard silicon (Std), trap-rich (TR) and high resistivity (HR). All of the mentioned substrates have been fabricated where identical samples of CPW lines have been integrated on. The new PSi substrates have shown successful reduction in the substrate's effective relative permittivity to values as low as 3.7 and great increase in the substrate's effective resistivity to values higher than 7 kΩ cm. As a concept proof, a mm-wave bandpass filter (MBPF) centred at 27 GHz has been integrated on the investigated substrates. Compared with the conventional MBPF implemented on standard silicon-based substrates, the measured S-parameters of the PSi-based MBPF have shown high filtering performance, such as a reduction in insertion loss and an enhancement of the filter selectivity, with the joy of having the same filter performance by varying the temperature. Therefore, the efficiency of the proposed PSi substrates has been well highlighted. From 1994 to 1995, she was assistant of physics at (USTHB), Algiers . From 1998 to 2011, she was a Researcher at characterization laboratory in ionized media and laser division at the Advanced Technologies Development Center. She has integrated the Analog Radio Frequency Integrated Circuits team as Researcher since 2011 until now in Microelectronic and Nanotechnology Division at Advanced Technologies Development Center (CDTA), Algiers. She has been working towards her Ph.D. degree jointly at CDTA and Ecole Nationale Polytechnique, Algiers, since 2012. Her research interest includes fabrication and characterization of microwave passive devices on porous silicon as new substrate, such as characterization of FinFET components.

Microdynamic Devices Fabricated on Silicon-On-Sapphire Substrates.

DTIC Science & Technology

Silicon-on-sapphire substrates are provided for the fabrication of micromechanical devices, such as micromotors . The high voltage stand-off...a consequence, the electrostatically driven devices, micromotors , can be incorporated in the integrated circuits and yet be powered at elevated voltages to increase their work potential.

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

Influence of bending strains on radio frequency characteristics of flexible microwave switches using single-crystal silicon nanomembranes on plastic substrate

NASA Astrophysics Data System (ADS)

Qin, Guoxuan; Yuan, Hao-Chih; Celler, George K.; Ma, Jianguo; Ma, Zhenqiang

2011-10-01

This letter presents radio frequency (RF) characterization of flexible microwave switches using single-crystal silicon nanomembranes (SiNMs) on plastic substrate under various uniaxial mechanical tensile bending strains. The flexible switches shows significant/negligible performance enhancement on strains under on/off states from dc to 10 GHz. Furthermore, an RF/microwave strain equivalent circuit model is developed and reveals the most influential factors, and un-proportional device parameters change with bending strains. The study demonstrates that flexible microwave single-crystal SiNM switches, as a simple circuit example towards the goal of flexible monolithic microwave integrated circuits, can be properly operated and modeled under mechanical bending conditions.

Smart substrates: Making multi-chip modules smarter

NASA Astrophysics Data System (ADS)

Wunsch, T. F.; Treece, R. K.

1995-05-01

A novel multi-chip module (MCM) design and manufacturing methodology which utilizes active CMOS circuits in what is normally a passive substrate realizes the 'smart substrate' for use in highly testable, high reliability MCMS. The active devices are used to test the bare substrate, diagnose assembly errors or integrated circuit (IC) failures that require rework, and improve the testability of the final MCM assembly. A static random access memory (SRAM) MCM has been designed and fabricated in Sandia Microelectronics Development Laboratory in order to demonstrate the technical feasibility of this concept and to examine design and manufacturing issues which will ultimately determine the economic viability of this approach. The smart substrate memory MCM represents a first in MCM packaging. At the time the first modules were fabricated, no other company or MCM vendor had incorporated active devices in the substrate to improve manufacturability and testability, and thereby improve MCM reliability and reduce cost.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shah, Kedar G.; Pannu, Satinderpall S.

An integrated circuit system having an integrated circuit (IC) component which is able to have its functionality destroyed upon receiving a command signal. The system may involve a substrate with the IC component being supported on the substrate. A module may be disposed in proximity to the IC component. The module may have a cavity and a dissolving compound in a solid form disposed in the cavity. A heater component may be configured to heat the dissolving compound to a point of sublimation where the dissolving compound changes from a solid to a gaseous dissolving compound. A triggering mechanism maymore » be used for initiating a dissolution process whereby the gaseous dissolving compound is allowed to attack the IC component and destroy a functionality of the IC component.« less

Microwave integrated circuit for Josephson voltage standards

NASA Technical Reports Server (NTRS)

Holdeman, L. B.; Toots, J.; Chang, C. C. (Inventor)

1980-01-01

A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.

Optical printed circuit board (O-PCB) and VLSI photonic integrated circuits: visions, challenges, and progresses

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Noh, H. S.; Kim, K. H.; Song, S. H.

2006-09-01

A collective overview and review is presented on the original work conducted on the theory, design, fabrication, and in-tegration of micro/nano-scale optical wires and photonic devices for applications in a newly-conceived photonic systems called "optical printed circuit board" (O-PCBs) and "VLSI photonic integrated circuits" (VLSI-PIC). These are aimed for compact, high-speed, multi-functional, intelligent, light-weight, low-energy and environmentally friendly, low-cost, and high-volume applications to complement or surpass the capabilities of electrical PCBs (E-PCBs) and/or VLSI electronic integrated circuit (VLSI-IC) systems. These consist of 2-dimensional or 3-dimensional planar arrays of micro/nano-optical wires and circuits to perform the functions of all-optical sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards or substrates. The integrated optical devices include micro/nano-scale waveguides, lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices, made of polymer, silicon and other semiconductor materials. For VLSI photonic integration, photonic crystals and plasmonic structures have been used. Scientific and technological issues concerning the processes of miniaturization, interconnection and integration of these systems as applicable to board-to-board, chip-to-chip, and intra-chip integration, are discussed along with applications for future computers, telecommunications, and sensor-systems. Visions and challenges toward these goals are also discussed.

Capacitance pressure sensor

DOEpatents

Eaton, William P.; Staple, Bevan D.; Smith, James H.

2000-01-01

A microelectromechanical (MEM) capacitance pressure sensor integrated with electronic circuitry on a common substrate and a method for forming such a device are disclosed. The MEM capacitance pressure sensor includes a capacitance pressure sensor formed at least partially in a cavity etched below the surface of a silicon substrate and adjacent circuitry (CMOS, BiCMOS, or bipolar circuitry) formed on the substrate. By forming the capacitance pressure sensor in the cavity, the substrate can be planarized (e.g. by chemical-mechanical polishing) so that a standard set of integrated circuit processing steps can be used to form the electronic circuitry (e.g. using an aluminum or aluminum-alloy interconnect metallization).

JFET front-end circuits integrated in a detector-grade silicon substrate

NASA Astrophysics Data System (ADS)

Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.; Dalla Betta, G. F.; Boscardin, M.; Batignani, G.; Giorgi, M.; Bosisio, L.

2003-08-01

This paper presents the design and experimental results relevant to front-end circuits integrated on detector-grade high resistivity silicon. The fabrication technology is made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy and allows using a common substrate for different kinds of active devices, such as N-channel JFETs and MOSFETs, and for pixel, microstrip, and PIN detectors. This research activity is being carried out in the framework of a project aiming at the fabrication of a multichannel mixed analog-digital chip for the readout of solid-state detectors integrated in the same substrate. Possible applications are in the field of medical and industrial imaging and space and high energy physics experiments. An all-JFET charge sensitive amplifier, which can use either a resistive or a nonresistive feedback network, has been characterized. The two configurations have been compared to each other, paying particular attention to noise performances, in view of the design of the complete readout channel. Operation capability in harsh radiation environment has been evaluated through exposure to /spl gamma/-rays from a /sup 60/Co source.

Multilevel metallization method for fabricating a metal oxide semiconductor device

NASA Technical Reports Server (NTRS)

Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

1978-01-01

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Microfabrication techniques for integrated sensors and microsystems.

PubMed

Wise, K D; Najafi, K

1991-11-29

Integrated sensors and actuators are rapidly evolving to provide an important link between very large scale integrated circuits and nonelectronic monitoring and control applications ranging from biomedicine to automated manufacturing. As they continue to expand, entire microsystems merging electrical, mechanical, thermal, optical, magnetic, and perhaps chemical components should be possible on a common substrate.

Microwave integrated circuits for space applications

NASA Technical Reports Server (NTRS)

Leonard, Regis F.; Romanofsky, Robert R.

1991-01-01

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

A 10-GHz amplifier using an epitaxial lift-off pseudomorphic HEMT device

NASA Technical Reports Server (NTRS)

Young, Paul G.; Romanofsky, Robert R.; Alterovitz, Samuel A.; Mena, Rafael A.; Smith, Edwyn D.

1993-01-01

A process to integrate epitaxial lift-off devices and microstrip circuits has been demonstrated using a pseudomorphic HEMT on an alumina substrate. The circuit was a 10 GHz amplifier with the interconnection between the device and the microstrip circuit being made with photolithographically patterned metal. The measured and modeled response correlated extremely well with a maximum gain of 6.8 dB and a return loss of -14 dB at 10.4 GHz.

Study of Ni Metallization in Macroporous Si Using Wet Chemistry for Radio Frequency Cross-Talk Isolation in Mixed Signal Integrated Circuits

PubMed Central

Zhang, Xi; Xu, Chengkun; Chong, Kyuchul; Tu, King-Ning; Xie, Ya-Hong

2011-01-01

A highly conductive moat or Faraday cage of through-the-wafer thickness in Si substrate was proposed to be effective in shielding electromagnetic interference thereby reducing radio frequency (RF) cross-talk in high performance mixed signal integrated circuits. Such a structure was realized by metallization of selected ultra-high-aspect-ratio macroporous regions that were electrochemically etched in p− Si substrates. The metallization process was conducted by means of wet chemistry in an alkaline aqueous solution containing Ni2+ without reducing agent. It is found that at elevated temperature during immersion, Ni2+ was rapidly reduced and deposited into macroporous Si and a conformal metallization of the macropore sidewalls was obtained in a way that the entire porous Si framework was converted to Ni. A conductive moat was as a result incorporated into p− Si substrate. The experimentally measured reduction of crosstalk in this structure is 5~18 dB at frequencies up to 35 GHz. PMID:28879960

Study of Ni Metallization in Macroporous Si Using Wet Chemistry for Radio Frequency Cross-Talk Isolation in Mixed Signal Integrated Circuits.

PubMed

Zhang, Xi; Xu, Chengkun; Chong, Kyuchul; Tu, King-Ning; Xie, Ya-Hong

2011-05-25

A highly conductive moat or Faraday cage of through-the-wafer thickness in Si substrate was proposed to be effective in shielding electromagnetic interference thereby reducing radio frequency (RF) cross-talk in high performance mixed signal integrated circuits. Such a structure was realized by metallization of selected ultra-high-aspect-ratio macroporous regions that were electrochemically etched in p - Si substrates. The metallization process was conducted by means of wet chemistry in an alkaline aqueous solution containing Ni 2+ without reducing agent. It is found that at elevated temperature during immersion, Ni 2+ was rapidly reduced and deposited into macroporous Si and a conformal metallization of the macropore sidewalls was obtained in a way that the entire porous Si framework was converted to Ni. A conductive moat was as a result incorporated into p - Si substrate. The experimentally measured reduction of crosstalk in this structure is 5~18 dB at frequencies up to 35 GHz.

Modeling and Experiments with Carbon Nanotubes for Applications in High Performance Circuits

DTIC Science & Technology

2017-04-06

purchased and installed for experimental characterization of atomic layer deposited graphene on different substrates for radiation-hardened studies...72 3.6 Experimental Research in Graphene for Radiation Hardened Devices……………..73 4 Recommendations...physics for analysis and design of integrated circuits. The developed model is verified from published experimental data. Basic logic gates in

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

A Two-Layer Gene Circuit for Decoupling Cell Growth from Metabolite Production.

PubMed

Lo, Tat-Ming; Chng, Si Hui; Teo, Wei Suong; Cho, Han-Saem; Chang, Matthew Wook

2016-08-01

We present a synthetic gene circuit for decoupling cell growth from metabolite production through autonomous regulation of enzymatic pathways by integrated modules that sense nutrient and substrate. The two-layer circuit allows Escherichia coli to selectively utilize target substrates in a mixed pool; channel metabolic resources to growth by delaying enzymatic conversion until nutrient depletion; and activate, terminate, and re-activate conversion upon substrate availability. We developed two versions of controller, both of which have glucose nutrient sensors but differ in their substrate-sensing modules. One controller is specific for hydroxycinnamic acid and the other for oleic acid. Our hydroxycinnamic acid controller lowered metabolic stress 2-fold and increased the growth rate 2-fold and productivity 5-fold, whereas our oleic acid controller lowered metabolic stress 2-fold and increased the growth rate 1.3-fold and productivity 2.4-fold. These results demonstrate the potential for engineering strategies that decouple growth and production to make bio-based production more economical and sustainable. Copyright © 2016 The Authors. Published by Elsevier Inc. All rights reserved.

Suspended Integrated Strip-line Transition Design for Highly Integrated Radar Systems

DTIC Science & Technology

2017-03-01

RF Circuit Design,” Second Edition, Pearson Education, 2009. 3. B. Ma, A. Chousseaud, and S . Toutain, “A new design of compact planar microstrip...technology. The measured results show good correlation to the simulated results with a return loss and insertion loss of less than 10 dB and greater...1) where is the cavity width, is the thickness of substrate 3, is the cavity height, and is the dielectric constant of substrate 3, and m/ s

Mechanically Flexible and High-Performance CMOS Logic Circuits.

PubMed

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-10-13

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal-oxide-semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices.

Mechanically Flexible and High-Performance CMOS Logic Circuits

PubMed Central

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-01-01

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal–oxide–semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices. PMID:26459882

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes are developed that provide low-loss, hermetic enclosure for enhanced monolithic microwave and millimeter-wave integrated circuits. These package schemes are based on a fused quartz substrate material offering improved RF performance through 44 GHz. The small size and weight of the packages make them useful for a number of applications, including phased array antenna systems. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices.

Apparatus for millimeter-wave signal generation

DOEpatents

Vawter, G. Allen; Hietala, Vincent M.; Zolper, John C.; Mar, Alan; Hohimer, John P.

1999-01-01

An opto-electronic integrated circuit (OEIC) apparatus is disclosed for generating an electrical signal at a frequency .gtoreq.10 GHz. The apparatus, formed on a single substrate, includes a semiconductor ring laser for generating a continuous train of mode-locked lasing pulses and a high-speed photodetector for detecting the train of lasing pulses and generating the electrical signal therefrom. Embodiments of the invention are disclosed with an active waveguide amplifier coupling the semiconductor ring laser and the high-speed photodetector. The invention has applications for use in OEICs and millimeter-wave monolithic integrated circuits (MMICs).

Silicon/III-V laser with super-compact diffraction grating for WDM applications in electronic-photonic integrated circuits.

PubMed

Wang, Yadong; Wei, Yongqiang; Huang, Yingyan; Tu, Yongming; Ng, Doris; Lee, Cheewei; Zheng, Yunan; Liu, Boyang; Ho, Seng-Tiong

2011-01-31

We have demonstrated a heterogeneously integrated III-V-on-Silicon laser based on an ultra-large-angle super-compact grating (SCG). The SCG enables single-wavelength operation due to its high-spectral-resolution aberration-free design, enabling wavelength division multiplexing (WDM) applications in Electronic-Photonic Integrated Circuits (EPICs). The SCG based Si/III-V laser is realized by fabricating the SCG on silicon-on-insulator (SOI) substrate. Optical gain is provided by electrically pumped heterogeneous integrated III-V material on silicon. Single-wavelength lasing at 1550 nm with an output power of over 2 mW and a lasing threshold of around 150 mA were achieved.

Free-Standing Organic Transistors and Circuits with Sub-Micron Thicknesses

PubMed Central

Fukuda, Kenjiro; Sekine, Tomohito; Shiwaku, Rei; Morimoto, Takuya; Kumaki, Daisuke; Tokito, Shizuo

2016-01-01

The realization of wearable electronic devices with extremely thin and flexible form factors has been a major technological challenge. While substrates typically limit the thickness of thin-film electronic devices, they are usually necessary for their fabrication and functionality. Here we report on ultra-thin organic transistors and integrated circuits using device components whose substrates that have been removed. The fabricated organic circuits with total device thicknesses down to 350 nm have electrical performance levels close to those fabricated on conventional flexible substrates. Moreover, they exhibit excellent mechanical robustness, whereby their static and dynamic electrical characteristics do not change even under 50% compressive strain. Tests using systematically applied compressive strains reveal that these free-standing organic transistors possess anisotropic mechanical stability, and a strain model for a multilayer stack can be used to describe the strain in this sort of ultra-thin device. These results show the feasibility of ultimate-thin organic electronic devices using free-standing constructions. PMID:27278828

Thermally-induced voltage alteration for integrated circuit analysis

DOEpatents

Cole, Jr., Edward I.

2000-01-01

A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

RFID and Memory Devices Fabricated Integrally on Substrates

NASA Technical Reports Server (NTRS)

Schramm, Harry F.

2004-01-01

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for the deposition of the device. By use of a vacuum arc vapor deposition apparatus, a thin electrically insulating film would first be deposited on the substrate. Subsequent layers of materials would then be deposited and patterned by use of known integrated-circuit fabrication techniques. The total thickness of the deposited layers could be much less than the 100- m thickness of the thinnest state-of-the-art self-contained microchips. Such a thin deposit could be readily concealed by simply painting over it. Both large vacuum chambers for production runs and portable hand-held devices for in situ applications are available.

Novel Integrated System Architecture for an Autonomous Jumping Micro-Robot

DTIC Science & Technology

2010-01-01

traces Figure 45 Solder joints made directly to FET and capacitor before assembling circuit on hexapod Figure 46 Metal pads attached to...energetic chip using Loctite Figure 47 Circuit connected to oxidized nanoporous Si by soldering to pads on the substrate Figure 48 Capacitor discharge...thermal, shape memory alloy (SMA), piezoelectric , magnetic, etc. Each actuator has a unique set of characteristics, which include operating

Faraday Cup Array Integrated with a Readout IC and Method for Manufacture Thereof

NASA Technical Reports Server (NTRS)

Temple, Dorota (Inventor); Bower, Christopher A. (Inventor); Hedgepath Gilchrist, Kristin (Inventor); Stoner, Brian R. (Inventor)

2014-01-01

A detector array and method for making the detector array. The array includes a substrate including a plurality of trenches formed therein, and includes a plurality of collectors electrically isolated from each other, formed on the walls of the trenches, and configured to collect charge particles incident on respective ones of the collectors and to output from said collectors signals indicative of charged particle collection. The array includes a plurality of readout circuits disposed on a side of the substrate opposite openings to the collectors. The readout circuits are configured to read charge collection signals from respective ones of the plurality of collectors.

Mouldable all-carbon integrated circuits

NASA Astrophysics Data System (ADS)

Sun, Dong-Ming; Timmermans, Marina Y.; Kaskela, Antti; Nasibulin, Albert G.; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I.; Ohno, Yutaka

2013-08-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027cm2V-1s-1 and an ON/OFF ratio of 105. The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Mouldable all-carbon integrated circuits.

PubMed

Sun, Dong-Ming; Timmermans, Marina Y; Kaskela, Antti; Nasibulin, Albert G; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I; Ohno, Yutaka

2013-01-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027 cm(2) V(-1) s(-1) and an ON/OFF ratio of 10(5). The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Transferrable monolithic III-nitride photonic circuit for multifunctional optoelectronics

NASA Astrophysics Data System (ADS)

Shi, Zheng; Gao, Xumin; Yuan, Jialei; Zhang, Shuai; Jiang, Yan; Zhang, Fenghua; Jiang, Yuan; Zhu, Hongbo; Wang, Yongjin

2017-12-01

A monolithic III-nitride photonic circuit with integrated functionalities was implemented by integrating multiple components with different functions into a single chip. In particular, the III-nitride-on-silicon platform is used as it integrates a transmitter, a waveguide, and a receiver into a suspended III-nitride membrane via a wafer-level procedure. Here, a 0.8-mm-diameter suspended device architecture is directly transferred from silicon to a foreign substrate by mechanically breaking the support beams. The transferred InGaN/GaN multiple-quantum-well diode (MQW-diode) exhibits a turn-on voltage of 2.8 V with a dominant electroluminescence peak at 453 nm. The transmitter and receiver share an identical InGaN/GaN MQW structure, and the integrated photonic circuit inherently works for on-chip power monitoring and in-plane visible light communication. The wire-bonded monolithic photonic circuit on glass experimentally demonstrates in-plane data transmission at 120 Mb/s, paving the way for diverse applications in intelligent displays, in-plane light communication, flexible optical sensors, and wearable III-nitride optoelectronics.

Method for forming metallic silicide films on silicon substrates by ion beam deposition

DOEpatents

Zuhr, Raymond A.; Holland, Orin W.

1990-01-01

Metallic silicide films are formed on silicon substrates by contacting the substrates with a low-energy ion beam of metal ions while moderately heating the substrate. The heating of the substrate provides for the diffusion of silicon atoms through the film as it is being formed to the surface of the film for interaction with the metal ions as they contact the diffused silicon. The metallic silicide films provided by the present invention are contaminant free, of uniform stoichiometry, large grain size, and exhibit low resistivity values which are of particular usefulness for integrated circuit production.

Printed circuit board impedance matching step for microwave (millimeter wave) devices

DOEpatents

Pao, Hsueh-Yuan; Aguirre, Jerardo; Sargis, Paul

2013-10-01

An impedance matching ground plane step, in conjunction with a quarter wave transformer section, in a printed circuit board provides a broadband microwave matching transition from board connectors or other elements that require thin substrates to thick substrate (>quarter wavelength) broadband microwave (millimeter wave) devices. A method of constructing microwave and other high frequency electrical circuits on a substrate of uniform thickness, where the circuit is formed of a plurality of interconnected elements of different impedances that individually require substrates of different thicknesses, by providing a substrate of uniform thickness that is a composite or multilayered substrate; and forming a pattern of intermediate ground planes or impedance matching steps interconnected by vias located under various parts of the circuit where components of different impedances are located so that each part of the circuit has a ground plane substrate thickness that is optimum while the entire circuit is formed on a substrate of uniform thickness.

Temporal coding in a silicon network of integrate-and-fire neurons.

PubMed

Liu, Shih-Chii; Douglas, Rodney

2004-09-01

Spatio-temporal processing of spike trains by neuronal networks depends on a variety of mechanisms distributed across synapses, dendrites, and somata. In natural systems, the spike trains and the processing mechanisms cohere though their common physical instantiation. This coherence is lost when the natural system is encoded for simulation on a general purpose computer. By contrast, analog VLSI circuits are, like neurons, inherently related by their real-time physics, and so, could provide a useful substrate for exploring neuronlike event-based processing. Here, we describe a hybrid analog-digital VLSI chip comprising a set of integrate-and-fire neurons and short-term dynamical synapses that can be configured into simple network architectures with some properties of neocortical neuronal circuits. We show that, despite considerable fabrication variance in the properties of individual neurons, the chip offers a viable substrate for exploring real-time spike-based processing in networks of neurons.

Self-Patterning of Silica/Epoxy Nanocomposite Underfill by Tailored Hydrophilic-Superhydrophobic Surfaces for 3D Integrated Circuit (IC) Stacking.

PubMed

Tuan, Chia-Chi; James, Nathan Pataki; Lin, Ziyin; Chen, Yun; Liu, Yan; Moon, Kyoung-Sik; Li, Zhuo; Wong, C P

2017-03-15

As microelectronics are trending toward smaller packages and integrated circuit (IC) stacks nowadays, underfill, the polymer composite filled in between the IC chip and the substrate, becomes increasingly important for interconnection reliability. However, traditional underfills cannot meet the requirements for low-profile and fine pitch in high density IC stacking packages. Post-applied underfills have difficulties in flowing into the small gaps between the chip and the substrate, while pre-applied underfills face filler entrapment at bond pads. In this report, we present a self-patterning underfilling technology that uses selective wetting of underfill on Cu bond pads and Si 3 N 4 passivation via surface energy engineering. This novel process, fully compatible with the conventional underfilling process, eliminates the issue of filler entrapment in typical pre-applied underfilling process, enabling high density and fine pitch IC die bonding.

Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof

DOEpatents

Mihailovich, Robert E.; Papavasiliou, Alex P.; Mehrotra, Vivek; Stupar, Philip A.; Borwick, III, Robert L.; Ganguli, Rahul; DeNatale, Jeffrey F.

2017-03-28

A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material.

Thread-Like CMOS Logic Circuits Enabled by Reel-Processed Single-Walled Carbon Nanotube Transistors via Selective Doping.

PubMed

Heo, Jae Sang; Kim, Taehoon; Ban, Seok-Gyu; Kim, Daesik; Lee, Jun Ho; Jur, Jesse S; Kim, Myung-Gil; Kim, Yong-Hoon; Hong, Yongtaek; Park, Sung Kyu

2017-08-01

The realization of large-area electronics with full integration of 1D thread-like devices may open up a new era for ultraflexible and human adaptable electronic systems because of their potential advantages in demonstrating scalable complex circuitry by a simply integrated weaving technology. More importantly, the thread-like fiber electronic devices can be achieved using a simple reel-to-reel process, which is strongly required for low-cost and scalable manufacturing technology. Here, high-performance reel-processed complementary metal-oxide-semiconductor (CMOS) integrated circuits are reported on 1D fiber substrates by using selectively chemical-doped single-walled carbon nanotube (SWCNT) transistors. With the introduction of selective n-type doping and a nonrelief photochemical patterning process, p- and n-type SWCNT transistors are successfully implemented on cylindrical fiber substrates under air ambient, enabling high-performance and reliable thread-like CMOS inverter circuits. In addition, it is noteworthy that the optimized reel-coating process can facilitate improvement in the arrangement of SWCNTs, building uniformly well-aligned SWCNT channels, and enhancement of the electrical performance of the devices. The p- and n-type SWCNT transistors exhibit field-effect mobility of 4.03 and 2.15 cm 2 V -1 s -1 , respectively, with relatively narrow distribution. Moreover, the SWCNT CMOS inverter circuits demonstrate a gain of 6.76 and relatively good dynamic operation at a supply voltage of 5.0 V. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

CMOS-compatible InP/InGaAs digital photoreceiver

DOEpatents

Lovejoy, Michael L.; Rose, Benny H.; Craft, David C.; Enquist, Paul M.; Slater, Jr., David B.

1997-01-01

A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1000 Mb/s or more.

CMOS-compatible InP/InGaAs digital photoreceiver

DOEpatents

Lovejoy, M.L.; Rose, B.H.; Craft, D.C.; Enquist, P.M.; Slater, D.B. Jr.

1997-11-04

A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1,000 Mb/s or more. 4 figs.

Arbitrary-Shaped Graphene-Based Planar Sandwich Supercapacitors on One Substrate with Enhanced Flexibility and Integration.

PubMed

Zheng, Shuanghao; Tang, Xingyan; Wu, Zhong-Shuai; Tan, Yuan-Zhi; Wang, Sen; Sun, Chenglin; Cheng, Hui-Ming; Bao, Xinhe

2017-02-28

The emerging smart power source-unitized electronics represent an utmost innovative paradigm requiring dramatic alteration from materials to device assembly and integration. However, traditional power sources with huge bottlenecks on the design and performance cannot keep pace with the revolutionized progress of shape-confirmable integrated circuits. Here, we demonstrate a versatile printable technology to fabricate arbitrary-shaped, printable graphene-based planar sandwich supercapacitors based on the layer-structured film of electrochemically exfoliated graphene as two electrodes and nanosized graphene oxide (lateral size of 100 nm) as a separator on one substrate. These monolithic planar supercapacitors not only possess arbitrary shapes, e.g., rectangle, hollow-square, "A" letter, "1" and "2" numbers, circle, and junction-wire shape, but also exhibit outstanding performance (∼280 F cm -3 ), excellent flexibility (no capacitance degradation under different bending states), and applicable scalability, which are far beyond those achieved by conventional technologies. More notably, such planar supercapacitors with superior integration can be readily interconnected in parallel and series, without use of metal interconnects and contacts, to modulate the output current and voltage of modular power sources for designable integrated circuits in various shapes and sizes.

On the Synchronization of EEG Spindle Waves

NASA Astrophysics Data System (ADS)

Long, Wen; Zhang, ChengFu; Zhao, SiLan; Shi, RuiHong

2000-06-01

Based on recently sleeping cellular substrates, a network model synaptically coupled by N three-cell circuits is provided. Simulation results show that: (i) the dynamic behavior of every circuit is chaotic; (ii) the synchronization of the network is incomplete; (iii) the incomplete synchronization can integrate burst firings of cortical cells into waxing-and-wanning EEG spindle waves. These results enlighten us that this kind of incomplete synchronization may integrate microscopic, electrical activities of neurons in billions into macroscopic, functional states in human brain. In addition, the effects of coupling strength, connectional mode and noise to the synchronization are discussed.

The use of hybrid integrated circuit techniques in biotelemetry applications

NASA Technical Reports Server (NTRS)

Fryer, T. B.

1977-01-01

A review is presented of some features of hybrid integrated circuits that make their use advantageous in miniature biotelemetry applications. The various techniques for fabricating resistors, capacitors and interconnections by both thin film and thick film technology are discussed. The use of chip capacitors, resistors, and especially standard IC chips on substrates with fired-on interconnection patterns is emphasized. The review is designed primarily to acquaint biotelemetry users and designers with an overview of this fabrication technique so that they can better communicate their needs with an understanding of its limitations and advantages to facilities specializing in hybrid construction.

A Comprehensive Surface Mount Technology Solution for Integrated Circuits onto Flexible Screen Printed Electrical Interconnects

DTIC Science & Technology

2014-05-19

their acceptable thermal stability, Polyimides have established as a conventional substrate material for flexible interconnects, which can be...of the silver flake ink for the screen-printed interconnects, the assembled unit fulfills biocompatibility requirements in a limited manner ([29...30]). Even though biocompatibility of substrate [31] is fulfilled, toxicity of the insulating mask [32] and encapsulation need to be considered

Electron Beam "Writes" Silicon On Sapphire

NASA Technical Reports Server (NTRS)

Heinemann, Klaus

1988-01-01

Method of growing silicon on sapphire substrate uses beam of electrons to aid growth of semiconductor material. Silicon forms as epitaxial film in precisely localized areas in micron-wide lines. Promising fabrication method for fast, densely-packed integrated circuits. Silicon deposited preferentially in contaminated substrate zones and in clean zone irradiated by electron beam. Electron beam, like surface contamination, appears to stimulate decomposition of silane atmosphere.

Method for Fabricating and Packaging an M.Times.N Phased-Array Antenna

NASA Technical Reports Server (NTRS)

Xu, Xiaochuan (Inventor); Chen, Yihong (Inventor); Chen, Ray T. (Inventor); Subbaraman, Harish (Inventor)

2017-01-01

A method for fabricating an M.times.N, P-bit phased-array antenna on a flexible substrate is disclosed. The method comprising ink jet printing and hardening alignment marks, antenna elements, transmission lines, switches, an RF coupler, and multilayer interconnections onto the flexible substrate. The substrate of the M.times.N, P-bit phased-array antenna may comprise an integrated control circuit of printed electronic components such as, photovoltaic cells, batteries, resistors, capacitors, etc. Other embodiments are described and claimed.

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit.

PubMed

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-29

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit

NASA Astrophysics Data System (ADS)

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-01

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Integrating IR detector imaging systems

NASA Technical Reports Server (NTRS)

Bailey, G. C. (Inventor)

1984-01-01

An integrating IR detector array for imaging is provided in a hybrid circuit with InSb mesa diodes in a linear array, a single J-FET preamplifier for readout, and a silicon integrated circuit multiplexer. Thin film conductors in a fan out pattern deposited on an Al2O3 substrate connect the diodes to the multiplexer, and thick film conductors also connect the reset switch and preamplifier to the multiplexer. Two phase clock pulses are applied with a logic return signal to the multiplexer through triax comprised of three thin film conductors deposited between layers. A lens focuses a scanned image onto the diode array for horizontal read out while a scanning mirror provides vertical scan.

Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

NASA Technical Reports Server (NTRS)

Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

2012-01-01

Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

Microluminometer chip and method to measure bioluminescence

DOEpatents

Simpson, Michael L [Knoxville, TN; Paulus, Michael J [Knoxville, TN; Sayler, Gary S [Blaine, TN; Applegate, Bruce M [West Lafayette, IN; Ripp, Steven A [Knoxville, TN

2008-05-13

An integrated microluminometer includes an integrated circuit chip having at least one n-well/p-substrate junction photodetector for converting light received into a photocurrent, and a detector on the chip for processing the photocurrent. A distributed electrode configuration including a plurality of spaced apart electrodes disposed on an active region of the photodetector is preferably used to raise efficiency.

Compliant heterogeneous assemblies of micro-VCSELs as a new materials platform for integrated optoelectronics

NASA Astrophysics Data System (ADS)

Kang, Dongseok; Lee, Sung-Min; Kwong, Anthony; Yoon, Jongseung

2015-03-01

Despite many unique advantages, vertical cavity surface emitting lasers (VCSELs) have been available mostly on rigid, planar wafers over restricted areas, thereby limiting their usage for applications that can benefit from large-scale, programmable assemblies, hybrid integration with dissimilar materials and devices, or mechanically flexible constructions. Here, materials design and fabrication strategies that address these limitations of conventional VCSELs are presented. Specialized design of epitaxial materials and etching processes, together with printing-based deterministic assemblies and substrate thermal engineering, enabled defect-free release of microscale VCSELs and their device- and circuit-level implementation on non-native, flexible substrates with performance comparable to devices on the growth substrate.

Rapid Selective Annealing of Cu Thin Films on Si Using Microwaves

NASA Technical Reports Server (NTRS)

Brain, R. A.; Atwater, H. A.; Watson, T. J.; Barmatz, M.

1994-01-01

A major goal of the semiconductor indurstry is to lower the processing temperatures needed for interconnects in silicon integrated circuits. Typical rapid thermal annealing processes heat the film as well as the substrate, creating device problems.

Experimental Verification of Guided-Wave Lumped Circuits Using Waveguide Metamaterials

NASA Astrophysics Data System (ADS)

Li, Yue; Zhang, Zhijun

2018-04-01

Through the construction and characterization in microwave frequencies, we experimentally demonstrate our recently developed theory of waveguide lumped circuits, i.e., waveguide metatronics [Sci. Adv. 2, e1501790 (2016), 10.1126/sciadv.1501790], as a method to design subwavelength-scaled analog circuits. In the paradigm of waveguide metatronics, numbers of lumped inductors and capacitors are easily integrated functionally inside the waveguide, which is an irreplaceable transmission line in millimeter-wave and terahertz systems with the advantages of low radiation loss and low crosstalk. An example of multiple-ordered metatronic filters with layered structures is fabricated utilizing the technique of substrate integrated waveguides, which can be easily constructed by the printed-circuit-board process. The materials used in the construction are also typical microwave materials with positive permittivity, low loss, and negligible dispersion, imitating the plasmonic materials with negative permittivity in the optical domain. The results verify the theory of waveguide metatronics, which provides an efficient platform of functional lumped circuit design for guided-wave processing.

Direct Fabrication of a-Si:H Thin Film Transistor Arrays on Plastic and Metal Foils for Flexible Displays

DTIC Science & Technology

2008-12-01

TFTs ) arrays for high information content active matrix flexible displays for Army applications. For all flexible substrates a manufacturable...impermeable flexible substrate systems “display-ready” materials and handling protocols, (ii) high performance TFT devices and circuits fabricated...processes for integration with the flexible TFT arrays. Approaches and solution to address each of these major challenges are described in the

3D micro-lenses for free space intra-chip coupling in photonic-integrated circuits (Conference Presentation)

NASA Astrophysics Data System (ADS)

Thomas, Robert; Williams, Gwilym I.; Ladak, Sam; Smowton, Peter M.

2017-02-01

The integration of multiple optical elements on a common substrate to create photonic integrated circuits (PIC) has been successfully applied in: fibre-optic communications, photonic computing and optical sensing. The push towards III-Vs on silicon promises a new generation of integrated devices that combine the advantages of both integrated electronics and optics in a single substrate. III-V edge emitting laser diodes offer high efficiency and low threshold currents making them ideal candidates for the optically active elements of the next generation of PICs. Nevertheless, the highly divergent and asymmetric beam shapes intrinsic to these devices limits the efficiency with which optical elements can be free space coupled intra-chip; a capability particularly desirable for optical sensing applications e.g. [1]. Furthermore, the monolithic nature of the integrated approach prohibits the use of macroscopic lenses to improve coupling. However, with the advent of 3D direct laser writing, three dimensional lenses can now be manufactured on a microscopic-scale [2], making the use of micro-lens technology for enhanced free space coupling of integrated optical elements feasible. Here we demonstrate the first use of 3D micro-lenses to improve the coupling efficiency of monolithically integrated lasers. Fabricated from IP-dip photoresist using a Nanoscribe GmbH 3D lithography tool, the lenses are embedded directly onto a structured GaInP/AlGaInP substrate containing arrays of ridge lasers free space coupled to one another via a 200 μm air gap. We compare the coupling efficiency of these lasers with and without micro-lenses through photo-voltage and beam profile measurements and discuss optimisation of lens design.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

PubMed

Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

2017-02-14

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

PubMed Central

Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

2017-01-01

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

Optical connections on flexible substrates

NASA Astrophysics Data System (ADS)

Bosman, Erwin; Geerinck, Peter; Christiaens, Wim; Van Steenberge, Geert; Vanfleteren, Jan; Van Daele, Peter

2006-04-01

Optical interconnections integrated on a flexible substrate combine the advantages of optical data transmissions (high bandwidth, no electromagnetic disturbance and low power consumption) and those of flexible substrates (compact, ease of assembly...). Especially the flexible character of the substrates can significantly lower the assembly cost and leads to more compact modules. Especially in automotive-, avionic-, biomedical and sensing applications there is a great potential for these flexible optical interconnections because of the increasing data-rates, increasing use of optical sensors and requirement for smaller size and weight. The research concentrates on the integration of commercially available polymer optical layers (Truemode Backplane TM Polymer, Ormocer®) on a flexible Polyimide film, the fabrication of waveguides and out-of plane deflecting 45° mirrors, the characterization of the optical losses due to the bending of the substrate, and the fabrication of a proof-of-principal demonstrator. The resulting optical structures should be compatible with the standard fabrication of flexible printed circuit boards.

New ultraportable display technology and applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Lewis, Nancy D.

1998-08-01

MicroDisplay devices are based on a combination of technologies rooted in the extreme integration capability of conventionally fabricated CMOS active-matrix liquid crystal display substrates. Customized diffraction grating and optical distortion correction technology for lens-system compensation allow the elimination of many lenses and systems-level components. The MicroDisplay Corporation's miniature integrated information display technology is rapidly leading to many new defense and commercial applications. There are no moving parts in MicroDisplay substrates, and the fabrication of the color generating gratings, already part of the CMOS circuit fabrication process, is effectively cost and manufacturing process-free. The entire suite of the MicroDisplay Corporation's technologies was devised to create a line of application- specific integrated circuit single-chip display systems with integrated computing, memory, and communication circuitry. Next-generation portable communication, computer, and consumer electronic devices such as truly portable monitor and TV projectors, eyeglass and head mounted displays, pagers and Personal Communication Services hand-sets, and wristwatch-mounted video phones are among the may target commercial markets for MicroDisplay technology. Defense applications range from Maintenance and Repair support, to night-vision systems, to portable projectors for mobile command and control centers.

Engineering integrated digital circuits with allosteric ribozymes for scaling up molecular computation and diagnostics.

PubMed

Penchovsky, Robert

2012-10-19

Here we describe molecular implementations of integrated digital circuits, including a three-input AND logic gate, a two-input multiplexer, and 1-to-2 decoder using allosteric ribozymes. Furthermore, we demonstrate a multiplexer-decoder circuit. The ribozymes are designed to seek-and-destroy specific RNAs with a certain length by a fully computerized procedure. The algorithm can accurately predict one base substitution that alters the ribozyme's logic function. The ability to sense the length of RNA molecules enables single ribozymes to be used as platforms for multiple interactions. These ribozymes can work as integrated circuits with the functionality of up to five logic gates. The ribozyme design is universal since the allosteric and substrate domains can be altered to sense different RNAs. In addition, the ribozymes can specifically cleave RNA molecules with triplet-repeat expansions observed in genetic disorders such as oculopharyngeal muscular dystrophy. Therefore, the designer ribozymes can be employed for scaling up computing and diagnostic networks in the fields of molecular computing and diagnostics and RNA synthetic biology.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Displacement Damage in Bipolar Linear Integrated Circuits

NASA Technical Reports Server (NTRS)

Rax, B. G.; Johnston, A. H.; Miyahira, T.

2000-01-01

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

Integrated Printed Circuit Board (PCB) Active Cooling With Piezoelectric Actuator

DTIC Science & Technology

2012-09-01

The cooler substrate is a laminated multilayer FR-4 substrate. Individual layers are patterned to support the active element, form a resonant...prepreg epoxy. Individual FR-4 lamina were mechanically machined to pattern each layer. The layers were aligned, stacked, and laminated to form the... laminated with 70/30 copper-nickel alloy or 80/20 nickel-chrome alloy and patterned by means of photolithographic techniques and wet etching in a ferric

Thin Film Transistor Control Circuitry for MEMS Acoustic Transducers

NASA Astrophysics Data System (ADS)

Daugherty, Robin

This work seeks to develop a practical solution for short range ultrasonic communications and produce an integrated array of acoustic transmitters on a flexible substrate. This is done using flexible thin film transistor (TFT) and micro electromechanical systems (MEMS). The goal is to develop a flexible system capable of communicating in the ultrasonic frequency range at a distance of 10-100 meters. This requires a great deal of innovation on the part of the FDC team developing the TFT driving circuitry and the MEMS team adapting the technology for fabrication on a flexible substrate. The technologies required for this research are independently developed. The TFT development is driven primarily by research into flexible displays. The MEMS development is driving by research in biosensors and micro actuators. This project involves the integration of TFT flexible circuit capabilities with MEMS micro actuators in the novel area of flexible acoustic transmitter arrays. This thesis focuses on the design, testing and analysis of the circuit components required for this project.

Low-Cost Manufacturing of Bioresorbable Conductors by Evaporation-Condensation-Mediated Laser Printing and Sintering of Zn Nanoparticles.

PubMed

Shou, Wan; Mahajan, Bikram K; Ludwig, Brandon; Yu, Xiaowei; Staggs, Joshua; Huang, Xian; Pan, Heng

2017-07-01

Currently, bioresorbable electronic devices are predominantly fabricated by complex and expensive vacuum-based integrated circuit (IC) processes. Here, a low-cost manufacturing approach for bioresorbable conductors on bioresorbable polymer substrates by evaporation-condensation-mediated laser printing and sintering of Zn nanoparticle is reported. Laser sintering of Zn nanoparticles has been technically difficult due to the surface oxide on nanoparticles. To circumvent the surface oxide, a novel approach is discovered to print and sinter Zn nanoparticle facilitated by evaporation-condensation in confined domains. The printing process can be performed on low-temperature substrates in ambient environment allowing easy integration on a roll-to-roll platform for economical manufacturing of bioresorbable electronics. The fabricated Zn conductors show excellent electrical conductivity (≈1.124 × 10 6 S m -1 ), mechanical durability, and water dissolvability. Successful demonstration of strain gauges confirms the potential application in various environmentally friendly sensors and circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Monolithically integrated solid state laser and waveguide using spin-on glass

DOEpatents

Ashby, C.I.H.; Hohimer, J.P.; Neal, D.R.; Vawter, G.A.

1995-10-31

A monolithically integrated photonic circuit is disclosed combining a semiconductor source of excitation light with an optically active waveguide formed on the substrate. The optically active waveguide is preferably formed of a spin-on glass to which are added optically active materials which can enable lasing action, optical amplification, optical loss, or frequency conversion in the waveguide, depending upon the added material. 4 figs.

Heterogeneous integration of low-temperature metal-oxide TFTs

NASA Astrophysics Data System (ADS)

Schuette, Michael L.; Green, Andrew J.; Leedy, Kevin D.; McCandless, Jonathan P.; Jessen, Gregg H.

2017-02-01

The breadth of circuit fabrication opportunities enabled by metal-oxide thin-film transistors (MO-TFTs) is unprecedented. Large-area deposition techniques and high electron mobility are behind their adoption in the display industry, and substrate agnosticism and low process temperatures enabled the present wave of flexible electronics research. Reports of circuits involving complementaryMO-TFTs, oxide-organic hybrid combinations, and even MO-TFTs integrated onto Si LSI back end of line interconnects demonstrate this technology's utility in 2D and 3D monolithic heterogeneous integration (HI). In addition to a brief literature review focused on functional HI between MO-TFTs and a variety of dissimilar active devices, we share progress toward integrating MO-TFTs with compound semiconductor devices, namely GaN HEMTs. A monolithically integrated cascode topology was used to couple a HEMT's >200 V breakdown characteristic with the gate driving characteristic of an IGZO TFT, effectively shifting the HEMT threshold voltage from -3 V to +1 V.

Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

2016-01-01

A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 microsiemens, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 C for over 3736 hours continuously, and at 700 C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T greater than or equal to 500 C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.

High-resolution inkjet printing of all-polymer transistor circuits.

PubMed

Sirringhaus, H; Kawase, T; Friend, R H; Shimoda, T; Inbasekaran, M; Wu, W; Woo, E P

2000-12-15

Direct printing of functional electronic materials may provide a new route to low-cost fabrication of integrated circuits. However, to be useful it must allow continuous manufacturing of all circuit components by successive solution deposition and printing steps in the same environment. We demonstrate direct inkjet printing of complete transistor circuits, including via-hole interconnections based on solution-processed polymer conductors, insulators, and self-organizing semiconductors. We show that the use of substrate surface energy patterning to direct the flow of water-based conducting polymer inkjet droplets enables high-resolution definition of practical channel lengths of 5 micrometers. High mobilities of 0.02 square centimeters per volt second and on-off current switching ratios of 10(5) were achieved.

A Hybrid Circuit for Spoof Surface Plasmons and Spatial Waveguide Modes to Reach Controllable Band-Pass Filters

PubMed Central

Zhang, Qian; Zhang, Hao Chi; Wu, Han; Cui, Tie Jun

2015-01-01

We propose a hybrid circuit for spoof surface plasmon polaritons (SPPs) and spatial waveguide modes to develop new microwave devices. The hybrid circuit includes a spoof SPP waveguide made of two anti-symmetric corrugated metallic strips and a traditional substrate integrated waveguide (SIW). From dispersion relations, we show that the electromagnetic waves only can propagate through the hybrid circuit when the operating frequency is less than the cut-off frequency of the SPP waveguide and greater than the cut-off frequency of SIW, generating efficient band-pass filters. We demonstrate that the pass band is controllable in a large range by designing the geometrical parameters of SPP waveguide and SIW. Full-wave simulations are provided to show the large adjustability of filters, including ultra wideband and narrowband filters. We fabricate a sample of the new hybrid device in the microwave frequencies, and measurement results have excellent agreements to numerical simulations, demonstrating excellent filtering characteristics such as low loss, high efficiency, and good square ratio. The proposed hybrid circuit gives important potential to accelerate the development of plasmonic integrated functional devices and circuits in both microwave and terahertz frequencies. PMID:26552584

A Hybrid Circuit for Spoof Surface Plasmons and Spatial Waveguide Modes to Reach Controllable Band-Pass Filters.

PubMed

Zhang, Qian; Zhang, Hao Chi; Wu, Han; Cui, Tie Jun

2015-11-10

We propose a hybrid circuit for spoof surface plasmon polaritons (SPPs) and spatial waveguide modes to develop new microwave devices. The hybrid circuit includes a spoof SPP waveguide made of two anti-symmetric corrugated metallic strips and a traditional substrate integrated waveguide (SIW). From dispersion relations, we show that the electromagnetic waves only can propagate through the hybrid circuit when the operating frequency is less than the cut-off frequency of the SPP waveguide and greater than the cut-off frequency of SIW, generating efficient band-pass filters. We demonstrate that the pass band is controllable in a large range by designing the geometrical parameters of SPP waveguide and SIW. Full-wave simulations are provided to show the large adjustability of filters, including ultra wideband and narrowband filters. We fabricate a sample of the new hybrid device in the microwave frequencies, and measurement results have excellent agreements to numerical simulations, demonstrating excellent filtering characteristics such as low loss, high efficiency, and good square ratio. The proposed hybrid circuit gives important potential to accelerate the development of plasmonic integrated functional devices and circuits in both microwave and terahertz frequencies.

MEMS Technology for Space Applications

NASA Technical Reports Server (NTRS)

vandenBerg, A.; Spiering, V. L.; Lammerink, T. S. J.; Elwenspoek, M.; Bergveld, P.

1995-01-01

Micro-technology enables the manufacturing of all kinds of components for miniature systems or micro-systems, such as sensors, pumps, valves, and channels. The integration of these components into a micro-electro-mechanical system (MEMS) drastically decreases the total system volume and mass. These properties, combined with the increasing need for monitoring and control of small flows in (bio)chemical experiments, makes MEMS attractive for space applications. The level of integration and applied technology depends on the product demands and the market. The ultimate integration is process integration, which results in a one-chip system. An example of process integration is a dosing system of pump, flow sensor, micromixer, and hybrid feedback electronics to regulate the flow. However, for many applications, a hybrid integration of components is sufficient and offers the advantages of design flexibility and even the exchange of components in the case of a modular set up. Currently, we are working on hybrid integration of all kinds of sensors (physical and chemical) and flow system modules towards a modular system; the micro total analysis system (micro TAS). The substrate contains electrical connections as in a printed circuit board (PCB) as well as fluid channels for a circuit channel board (CCB) which, when integrated, form a mixed circuit board (MCB).

Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

PubMed

Liu, Yuanda; Ang, Kah-Wee

2017-07-25

Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

HARM processing techniques for MEMS and MOEMS devices using bonded SOI substrates and DRIE

NASA Astrophysics Data System (ADS)

Gormley, Colin; Boyle, Anne; Srigengan, Viji; Blackstone, Scott C.

2000-08-01

Silicon-on-Insulator (SOI) MEMS devices (1) are rapidly gaining popularity in realizing numerous solutions for MEMS, especially in the optical and inertia application fields. BCO recently developed a DRIE trench etch, utilizing the Bosch process, and refill process for high voltage dielectric isolation integrated circuits on thick SOI substrates. In this paper we present our most recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilized to develop optical router and filter products for fiber optics telecommunications and high precision accelerometers.

Sensor readout detector circuit

DOEpatents

Chu, Dahlon D.; Thelen, Jr., Donald C.

1998-01-01

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

Sensor readout detector circuit

DOEpatents

Chu, D.D.; Thelen, D.C. Jr.

1998-08-11

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

Silicon Satellites: Picosats, Nanosats, and Microsats

NASA Technical Reports Server (NTRS)

Janson, Siegfried W.

1995-01-01

Silicon, the most abundant solid element in the Earth's lithosphere, is a useful material for spacecraft construction. Silicon is stronger than stainless steel, has a thermal conductivity about half that of aluminum, is transparent to much of the infrared radiation spectrum, and can form a stable oxide. These unique properties enable silicon to become most of the mass of a satellite, it can simultaneously function as structure, heat transfer system, radiation shield, optics, and semiconductor substrate. Semiconductor batch-fabrication techniques can produce low-power digital circuits, low-power analog circuits, silicon-based radio frequency circuits, and micro-electromechanical systems (MEMS) such as thrusters and acceleration sensors on silicon substrates. By exploiting these fabrication techniques, it is possible to produce highly-integrated satellites for a number of applications. This paper analyzes the limitations of silicon satellites due to size. Picosatellites (approximately 1 gram mass), nanosatellites (about 1 kg mass), and highly capable microsatellites (about 10 kg mass) can perform various missions with lifetimes of a few days to greater than a decade.

Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

PubMed

Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

2016-11-01

2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Competing dopamine neurons drive oviposition choice for ethanol in Drosophila.

PubMed

Azanchi, Reza; Kaun, Karla R; Heberlein, Ulrike

2013-12-24

The neural circuits that mediate behavioral choice evaluate and integrate information from the environment with internal demands and then initiate a behavioral response. Even circuits that support simple decisions remain poorly understood. In Drosophila melanogaster, oviposition on a substrate containing ethanol enhances fitness; however, little is known about the neural mechanisms mediating this important choice behavior. Here, we characterize the neural modulation of this simple choice and show that distinct subsets of dopaminergic neurons compete to either enhance or inhibit egg-laying preference for ethanol-containing food. Moreover, activity in α'β' neurons of the mushroom body and a subset of ellipsoid body ring neurons (R2) is required for this choice. We propose a model where competing dopaminergic systems modulate oviposition preference to adjust to changes in natural oviposition substrates.

Quartz/fused silica chip carriers

NASA Technical Reports Server (NTRS)

1992-01-01

The primary objective of this research and development effort was to develop monolithic microwave integrated circuit (MMIC) packaging which will operate efficiently at millimeter-wave frequencies. The packages incorporated fused silica as the substrate material which was selected due to its favorable electrical properties and potential performance improvement over more conventional materials for Ka-band operation. The first step towards meeting this objective is to develop a package that meets standard mechanical and thermal requirements using fused silica and to be compatible with semiconductor devices operating up to at least 44 GHz. The second step is to modify the package design and add multilayer and multicavity capacity to allow for application specific integrated circuits (ASIC's) to control multiple phase shifters. The final step is to adapt the package design to a phased array module with integral radiating elements. The first task was a continuation of the SBIR Phase 1 work. Phase 1 identified fused silica as a viable substrate material by demonstrating various plating, machining, and adhesion properties. In Phase 2 Task 1, a package was designed and fabricated to validate these findings. Task 2 was to take the next step in packaging and fabricate a multilayer, multichip module (MCM). This package is the predecessor to the phased array module and demonstrates the ability to via fill, circuit print, laminate, and to form vertical interconnects. The final task was to build a phased array module. The radiating elements were to be incorporated into the package instead of connecting to it with wire or ribbon bonds.

High-speed thin-film transistors on single-crystalline, unstrained- and strained-silicon-based nanomembranes

NASA Astrophysics Data System (ADS)

Yuan, Hao-Chih

This research focuses on developing high-performance single-crystal Si-based nanomembranes and high-frequency thin-film transistors (TFTs) using these nanomembranes on flexible plastic substrates. Unstrained Si or SiGe nanomembranes with thickness of several tens to a couple of hundred nanometers are derived from silicon-on-insulator (SOI) or silicon-germanium-on-insulator (SGOI) and are subsequently transferred and integrated with flexible plastic host substrates via a one-step dry printing technique. Biaxial tensile-strained Si membranes that utilize elastic strain-sharing between Si and additionally grown SiGe thin films are also successfully integrated with plastic host substrates and exhibit predicted strain status and negligible density of dislocations. Biaxial tensile strain enhances electron mobility and lowers Schottky contact resistance. As a result, flexible TFTs built on the strained Si-membranes demonstrate much higher electron effective mobility and higher drive current than the unstrained counterpart. The dependence of drive current and transconductance on uniaxial tensile strain introducing by mechanical bending is also discussed. A novel combined "hot-and-cold" TFT fabrication process is developed specifically for realizing a wide spectrum of micro-electronics that can exhibit RF performance and can be integrated on low-temperature plastic substrate. The "hot" process that consists of ion implant and high-temperature annealing for desired doping type, profile, and concentration is realized on the bulk SOI/SGOI substrates followed by the "cold" process that includes room-temperature silicon-monoxide (SiO) deposition as gate dielectric layer to ensure the process compatibility with low-temperature, low-cost plastics. With these developments flexible Si-membrane n-type RF TFTs for analog applications and complementary TFTs for digital applications are demonstrated for the first time. RF TFTs with 1.5-mum channel length have demonstrated record-high f T and fmax values of 2.04 and 7.8 GHz, respectively. A small-signal equivalent circuit model study on the RF TFTs reveals the physics of how device layout affects fT and f max, which paves the way for further performance optimization and realization of integrated circuit on flexible substrate in the future.

Novel Manufacturing Technologies for GHZ/THz Integrated Circuits on Synthetic Diamond Substrates

DTIC Science & Technology

2010-11-15

silicon form palladium silicide Pd2Si at a temperature of 400 ºС, thus ensuring high reliability of the contacts. All the above metallization layers were...indicate possibility of realization of ICs on diamond substrates. In the course of our studies it was found that the Ti-Pd-Au metallization system...thickness of 2-3 um) can be applied when forming the topology of IC elements on synthetic diamond layers, while the Cr–Cu–Ni–Au metallization system with

Foldable graphene electronic circuits based on paper substrates.

PubMed

Hyun, Woo Jin; Park, O Ok; Chin, Byung Doo

2013-09-14

Graphene electronic circuits are prepared on paper substrates by using graphene nanoplates and applied to foldable paper-based electronics. The graphene circuits show a small change in conductance under various folding angles and maintain an electronic path on paper substrates after repetition of folding and unfolding. Foldable paper-based applications with graphene circuits exhibit excellent folding stability. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Solitonic guide and multiphoton absorption processes in photopolymerizable materials for optical integrated circuits

NASA Astrophysics Data System (ADS)

Klein, Stephane; Barsella, Alberto; Acker, D.; Sutter, C.; Beyer, N.; Andraud, Chantal; Fort, Alain F.; Dorkenoo, Kokou D.

2004-09-01

Up to now, most of the optical integrated devices are realized on glass or III-V substrates and the waveguides are usually obtained by photolithography techniques. We present here a new approach based on the use of photopolymerizable compounds. The conditions of self-written channel creation by solitonic propagation inside the bulk of these photopolymerizable formulations are analyzed. Both experimental and theoretical results of the various stages of self-written guide propagation are presented. A further step has been achieved by using a two-photon absorption process for the polymerization via a confocal microscopy technique. Combined with the solitonic guide creation, this technique allows to draw 3D optical circuits. Finally, by doping the photopolymerizable mixtures with push-pull chromophores having a controlled orientation, it will be possible to create active optical integrated devices.

Method for reworkable packaging of high speed, low electrical parasitic power electronics modules through gate drive integration

DOEpatents

Passmore, Brandon; Cole, Zach; Whitaker, Bret; Barkley, Adam; McNutt, Ty; Lostetter, Alexander

2016-08-02

A multichip power module directly connecting the busboard to a printed-circuit board that is attached to the power substrate enabling extremely low loop inductance for extreme environments such as high temperature operation. Wire bond interconnections are taught from the power die directly to the busboard further enabling enable low parasitic interconnections. Integration of on-board high frequency bus capacitors provide extremely low loop inductance. An extreme environment gate driver board allows close physical proximity of gate driver and power stage to reduce overall volume and reduce impedance in the control circuit. Parallel spring-loaded pin gate driver PCB connections allows a reliable and reworkable power module to gate driver interconnections.

Curvilinear electronics formed using silicon membrane circuits and elastomeric transfer elements.

PubMed

Ko, Heung Cho; Shin, Gunchul; Wang, Shuodao; Stoykovich, Mark P; Lee, Jeong Won; Kim, Dong-Hun; Ha, Jeong Sook; Huang, Yonggang; Hwang, Keh-Chih; Rogers, John A

2009-12-01

Materials and methods to achieve electronics intimately integrated on the surfaces of substrates with complex, curvilinear shapes are described. The approach exploits silicon membranes in circuit mesh structures that can be deformed in controlled ways using thin, elastomeric films. Experimental and theoretical studies of the micromechanics of such curvilinear electronics demonstrate the underlying concepts. Electrical measurements illustrate the high yields that can be obtained. The results represent significant experimental and theoretical advances over recently reported concepts for creating hemispherical photodetectors in electronic eye cameras and for using printable silicon nanoribbons/membranes in flexible electronics. The results might provide practical routes to the integration of high performance electronics with biological tissues and other systems of interest for new applications.

A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

NASA Astrophysics Data System (ADS)

Tu, Hongen; Xu, Yong

2012-07-01

This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

MMIC Amplifier Produces Gain of 10 dB at 235 GHz

NASA Technical Reports Server (NTRS)

Dawson, Douglas; Fung, King Man; Lee, Karen; Samoska, Lorene; Wells, Mary; Gaier, Todd; Kangaslahti, Pekka; Grundbacher, Ronald; Lai, Richard; Raja, Rohit;

An Electronic-Nose Sensor Node Based on a Polymer-Coated Surface Acoustic Wave Array for Wireless Sensor Network Applications

PubMed Central

Tang, Kea-Tiong; Li, Cheng-Han; Chiu, Shih-Wen

2011-01-01

This study developed an electronic-nose sensor node based on a polymer-coated surface acoustic wave (SAW) sensor array. The sensor node comprised an SAW sensor array, a frequency readout circuit, and an Octopus II wireless module. The sensor array was fabricated on a large K2 128° YX LiNbO3 sensing substrate. On the surface of this substrate, an interdigital transducer (IDT) was produced with a Cr/Au film as its metallic structure. A mixed-mode frequency readout application specific integrated circuit (ASIC) was fabricated using a TSMC 0.18 μm process. The ASIC output was connected to a wireless module to transmit sensor data to a base station for data storage and analysis. This sensor node is applicable for wireless sensor network (WSN) applications. PMID:22163865

An electronic-nose sensor node based on a polymer-coated surface acoustic wave array for wireless sensor network applications.

PubMed

Tang, Kea-Tiong; Li, Cheng-Han; Chiu, Shih-Wen

2011-01-01

This study developed an electronic-nose sensor node based on a polymer-coated surface acoustic wave (SAW) sensor array. The sensor node comprised an SAW sensor array, a frequency readout circuit, and an Octopus II wireless module. The sensor array was fabricated on a large K(2) 128° YX LiNbO3 sensing substrate. On the surface of this substrate, an interdigital transducer (IDT) was produced with a Cr/Au film as its metallic structure. A mixed-mode frequency readout application specific integrated circuit (ASIC) was fabricated using a TSMC 0.18 μm process. The ASIC output was connected to a wireless module to transmit sensor data to a base station for data storage and analysis. This sensor node is applicable for wireless sensor network (WSN) applications.

Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

PubMed Central

Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

2013-01-01

A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

GaAs VLSI for aerospace electronics

NASA Technical Reports Server (NTRS)

Larue, G.; Chan, P.

1990-01-01

Advanced aerospace electronics systems require high-speed, low-power, radiation-hard, digital components for signal processing, control, and communication applications. GaAs VLSI devices provide a number of advantages over silicon devices including higher carrier velocities, ability to integrate with high performance optical devices, and high-resistivity substrates that provide very short gate delays, good isolation, and tolerance to many forms of radiation. However, III-V technologies also have disadvantages, such as lower yield compared to silicon MOS technology. Achieving very large scale integration (VLSI) is particularly important for fast complex systems. At very short gate delays (less than 100 ps), chip-to-chip interconnects severely degrade circuit clock rates. Complex systems, therefore, benefit greatly when as many gates as possible are placed on a single chip. To fully exploit the advantages of GaAs circuits, attention must be focused on achieving high integration levels by reducing power dissipation, reducing the number of devices per logic function, and providing circuit designs that are more tolerant to process and environmental variations. In addition, adequate noise margin must be maintained to ensure a practical yield.

Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes

NASA Technical Reports Server (NTRS)

Zheng, Xinyu; Pain, Bedabrata

2005-01-01

A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.

MOCVD Growth of III-V Photodetectors and Light Emitters for Integration of Optoelectronic Devices on Si substrates

NASA Astrophysics Data System (ADS)

Geng, Yu

With the increase of clock speed and wiring density in integrated circuits, inter-chip and intra-chip interconnects through conventional electrical wires encounter increasing difficulties because of the large power loss and bandwidth limitation. Optical interconnects have been proposed as an alternative to copper-based interconnects and are under intense study due to their large data capacity, high data quality and low power consumption. III-V compound semiconductors offer high intrinsic electron mobility, small effective electron mass and direct bandgap, which make this material system advantageous for high-speed optoelectronic devices. The integration of III-V optoelectronic devices on Si substrates will provide the combined advantage of a high level of integration and large volume production of Si-based electronic circuitry with the superior electrical and optical performance of III-V components, paving the way to a new generation of hybrid integrated circuits. In this thesis, the direct heteroepitaxy of photodetectors (PDs) and light emitters using metal-organic chemical vapor deposition for the integration of photonic devices on Si substrates were studied. First we studied the selective-area growth of InP/GaAs on patterned Si substrates for PDs. To overcome the loading effect, a multi-temperature composite growth technique for GaAs was developed. By decreasing various defects such as dislocations and anti-phase domains, the GaAs and InP buffer layers are with good crystalline quality and the PDs show high speed and low dark current performance both at the edge and center of the large growth well. Then the growth and fabrication of GaAs/AlGaAs QW lasers were studied. Ellipsometry was used to calibrate the Al composition of AlGaAs. Thick p and n type AlGaAs with a mirrorlike surface were grown by high V/III ratio and high temperature. The GaAs/AlGaAs broad area QW laser was successfully grown and fabricated on GaAs substrate and showed a pulsed lasing result with a threshold current density of about 800 A/cm2. For the integration of lasers on Si substrate, quantum dot (QD) lasers were studied. A flow-and-stop process of TBA was used to grow InAs QDs with the in-situ monitor EpiRas. QDs with a PL wavelength of ˜1.3 mum were grown on GaAs and Si substrates. To decrease the PL degradation problem caused by the contaminations from AlGaAs, an InGaAs insertion layer was inserted in between the AlGaAs and QDs region. Microdisk and a-Si waveguide lasers are designed and fabricated.

Characteristics of Monolithically Integrated InGaAs Active Pixel Imager Array

NASA Technical Reports Server (NTRS)

Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

2000-01-01

Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate. It consists of an InGaAs photodiode connected to InP depletion-mode junction field effect transistors (JFETs) for low leakage, low power, and fast control of circuit signal amplifying, buffering, selection, and reset. This monolithically integrated active pixel sensor configuration eliminates the need for hybridization with silicon multiplexer. In addition, the configuration allows the sensor to be front illuminated, making it sensitive to visible as well as near infrared signal radiation. Adapting the existing 1.55 micrometer fiber optical communication technology, this integration will be an ideal system of optoelectronic integration for dual band (Visible/IR) applications near room temperature, for use in atmospheric gas sensing in space, and for target identification on earth. In this paper, two different types of small 4 x 1 test arrays will be described. The effectiveness of switching and amplifying circuits will be discussed in terms of circuit effectiveness (leakage, operating frequency, and temperature) in preparation for the second phase demonstration of integrated, two-dimensional monolithic InGaAs active pixel sensor arrays for applications in transportable shipboard surveillance, night vision, and emission spectroscopy.

Microfabricated structures with electrical isolation and interconnections

NASA Technical Reports Server (NTRS)

Clark, William A. (Inventor); Juneau, Thor N. (Inventor); Roessig, Allen W. (Inventor); Lemkin, Mark A. (Inventor)

2001-01-01

The invention is directed to a microfabricated device. The device includes a substrate that is etched to define mechanical structures at least some of which are anchored laterally to the remainder of the substrate. Electrical isolation at points where mechanical structures are attached to the substrate is provided by filled isolation trenches. Filled trenches may also be used to electrically isolate structure elements from each other at points where mechanical attachment of structure elements is desired. The performance of microelectromechanical devices is improved by 1) having a high-aspect-ratio between vertical and lateral dimensions of the mechanical elements, 2) integrating electronics on the same substrate as the mechanical elements, 3) good electrical isolation among mechanical elements and circuits except where electrical interconnection is desired.

Design and status of the RF-digitizer integrated circuit

NASA Technical Reports Server (NTRS)

Rayhrer, B.; Lam, B.; Young, L. E.; Srinivasan, J. M.; Thomas, J. B.

1991-01-01

An integrated circuit currently under development samples a bandpass-limited signal at a radio frequency in quadrature and then performs a simple sum-and-dump operation in order to filter and lower the rate of the samples. Downconversion to baseband is carried out by the sampling step itself through the aliasing effect of an appropriately selected subharmonic sampling frequency. Two complete RF digitizer circuits with these functions will be implemented with analog and digital elements on one GaAs substrate. An input signal, with a carrier frequency as high as 8 GHz, can be sampled at a rate as high as 600 Msamples/sec for each quadrature component. The initial version of the chip will sign-sample (1-bit) the input RF signal. The chip will contain a synthesizer to generate a sample frequency that is a selectable integer multiple of an input reference frequency. In addition to the usual advantages of compactness and reliability associated with integrated circuits, the single chip will replace several steps required by standard analog downconversion. Furthermore, when a very high initial sample rate is selected, the presampling analog filters can be given very large bandwidths, thereby greatly reducing phase and delay instabilities typically introduced by such filters, as well as phase and delay variation due to Doppler changes.

Thumbnail Sketches: The Chemistry of Printed Circuit Substrates: Some of the Latest Developments.

ERIC Educational Resources Information Center

Freeman, James H.

1984-01-01

Discusses some of the latest developments in the chemistry of printed circuit substrates. Topics considered include soldering, dicy (a catalyst), Kevlar (an aramid polymer fiber), maleimide copolymers, and flexible circuits. (JN)

Growth and high rate reactive ion etching of epitaxially grown barium hexaferrite films on single crystal silicon carbide substrates

NASA Astrophysics Data System (ADS)

Chen, Zhaohui

Ferrites are an invaluable group of insulating magnetic materials used for high frequency microwave applications in such passive electronic devices as isolators, phase shifters, and circulators. Because of their high permeability, non-reciprocal electromagnetic properties, and low eddy current losses, there are no other materials that serve such a broad range of applications. Until recently, they have been widely employed in bulk form, with little success in thin film-based applications in commercial or military microwave technologies. In today's technology, emerging electronic systems, such as high frequency, high power wireless and satellite communications (GPS, Bluetooth, WLAN, commercial radar, etc) thin film materials are in high demand. It is widely recognized that as high frequency devices shift to microwave frequencies the integration of passive devices with semiconductor electronics holds significant advantages in the realization of miniaturization, broader bandwidths, higher performance, speed, power and lower production costs. Thus, the primary objective of this thesis is to explore the integration of ferrite films with wide band gap semiconductor substrates for the realization of monolithic integrated circuits (MICs). This thesis focuses on two key steps for the integration of barium hexaferrite (Ba M-type or BaM) devices on semiconductor substrates. First, the development of high crystal quality ferrite film growth via pulsed laser deposition on wide band gap silicon carbide semiconductor substrates, and second, the effective patterning of BaM films using dry etching techniques. To address part one, BaM films were deposited on 6H silicon carbide (0001) substrates by Pulsed Laser Deposition. X-ray diffraction showed strong crystallographic alignment while pole figures exhibited reflections consistent with epitaxial growth. After optimized annealing, BaM films have a perpendicular magnetic anisotropy field of 16,900 Oe, magnetization (4piMs) of 4.4 kG, and ferromagnetic resonance peak-to-peak derivative linewidth at 53 GHz of 96 Oe. This combination of properties qualifies these films for microwave device applications. This marks the first growth of a microwave ferrite on SiC substrates and offers a new approach in the design and development of mu-wave and mm-wave monolithic integrated circuits. In part two, high-rate reactive ion etching using CHF3/SF6 gas mixtures was successfully demonstrated on BaM films, resulting in high aspect profile features of less than 50 nm in lateral dimension. These demonstrations enable the future integration of ferrites into MIC devices and technologies.

Optical XOR gate

DOEpatents

Vawter, G. Allen

2013-11-12

An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

Printed stretchable circuit on soft elastic substrate for wearable application

NASA Astrophysics Data System (ADS)

Yuan, Wei; Wu, Xinzhou; Gu, Weibing; Lin, Jian; Cui, Zheng

2018-01-01

In this paper, a flexible and stretchable circuit has been fabricated by the printing method based on Ag NWs/PDMS composite. The randomly oriented Ag NWs were buried in PDMS to form a conductive and stretchable electrode. Stable conductivity was achieved with a large range of tensile strain (0-50%) after the initial stretching/releasing cycle. The stable electrical response is due to the buckling of the Ag NWs/PDMS composite layer. Furthermore, printed stretchable circuits integrated with commercial ICs have been demonstrated for wearable applications. Project supported by the National Program on Key Basic Research Project (No. 2015CB351901), the Strategic Priority Research Program of the Chinese Academy of Sciences (No. XDA09020201), and the National Science Foundation of China (Nos. 51603227, 51603228).

Experimental observation of sub-terahertz backward-wave amplification in a multi-level microfabricated slow-wave circuit

NASA Astrophysics Data System (ADS)

Baik, Chan-Wook; Ahn, Ho Young; Kim, Yongsung; Lee, Jooho; Hong, Seogwoo; Lee, Sang Hun; Choi, Jun Hee; Kim, Sunil; Jeon, So-Yeon; Yu, SeGi; Collins, George; Read, Michael E.; Lawrence Ives, R.; Kim, Jong Min; Hwang, Sungwoo

2015-11-01

In our earlier paper dealing with dispersion retrieval from ultra-deep, reactive-ion-etched, slow-wave circuits on silicon substrates, it was proposed that splitting high-aspect-ratio circuits into multilevels enabled precise characterization in sub-terahertz frequency regime. This achievement prompted us to investigate beam-wave interaction through a vacuum-sealed integration with a 15-kV, 85-mA, thermionic, electron gun. Our experimental study demonstrates sub-terahertz, backward-wave amplification driven by an external oscillator. The measured output shows a frequency downshift, as well as power amplification, from beam loading even with low beam perveance. This offers a promising opportunity for the development of terahertz radiation sources, based on silicon technologies.

Experimental observation of sub-terahertz backward-wave amplification in a multi-level microfabricated slow-wave circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baik, Chan-Wook, E-mail: cw.baik@samsung.com; Ahn, Ho Young; Kim, Yongsung

2015-11-09

In our earlier paper dealing with dispersion retrieval from ultra-deep, reactive-ion-etched, slow-wave circuits on silicon substrates, it was proposed that splitting high-aspect-ratio circuits into multilevels enabled precise characterization in sub-terahertz frequency regime. This achievement prompted us to investigate beam-wave interaction through a vacuum-sealed integration with a 15-kV, 85-mA, thermionic, electron gun. Our experimental study demonstrates sub-terahertz, backward-wave amplification driven by an external oscillator. The measured output shows a frequency downshift, as well as power amplification, from beam loading even with low beam perveance. This offers a promising opportunity for the development of terahertz radiation sources, based on silicon technologies.

Grating-assisted coupling to nanophotonic circuits in microcrystalline diamond thin films.

PubMed

Rath, Patrik; Khasminskaya, Svetlana; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram Hp

2013-01-01

Synthetic diamond films can be prepared on a waferscale by using chemical vapour deposition (CVD) on suitable substrates such as silicon or silicon dioxide. While such films find a wealth of applications in thermal management, in X-ray and terahertz window design, and in gyrotron tubes and microwave transmission lines, their use for nanoscale optical components remains largely unexplored. Here we demonstrate that CVD diamond provides a high-quality template for realizing nanophotonic integrated optical circuits. Using efficient grating coupling devices prepared from partially etched diamond thin films, we investigate millimetre-sized optical circuits and achieve single-mode waveguiding at telecoms wavelengths. Our results pave the way towards broadband optical applications for sensing in harsh environments and visible photonic devices.

Electroless epitaxial etching for semiconductor applications

DOEpatents

McCarthy, Anthony M.

2002-01-01

A method for fabricating thin-film single-crystal silicon on insulator substrates using electroless etching for achieving efficient etch stopping on epitaxial silicon substrates. Microelectric circuits and devices are prepared on epitaxial silicon wafers in a standard fabrication facility. The wafers are bonded to a holding substrate. The silicon bulk is removed using electroless etching leaving the circuit contained within the epitaxial layer remaining on the holding substrate. A photolithographic operation is then performed to define streets and wire bond pad areas for electrical access to the circuit.

Etching and Growth of GaAs

NASA Technical Reports Server (NTRS)

Seabaugh, A. C.; Mattauch, R., J.

1983-01-01

In-place process for etching and growth of gallium arsenide calls for presaturation of etch and growth melts by arsenic source crystal. Procedure allows precise control of thickness of etch and newly grown layer on substrate. Etching and deposition setup is expected to simplify processing and improve characteristics of gallium arsenide lasers, high-frequency amplifiers, and advanced integrated circuits.

Oriented graphene nanoribbons embedded in hexagonal boron nitride trenches

PubMed Central

Chen, Lingxiu; He, Li; Wang, Hui Shan; Wang, Haomin; Tang, Shujie; Cong, Chunxiao; Xie, Hong; Li, Lei; Xia, Hui; Li, Tianxin; Wu, Tianru; Zhang, Daoli; Deng, Lianwen; Yu, Ting; Xie, Xiaoming; Jiang, Mianheng

2017-01-01

Graphene nanoribbons (GNRs) are ultra-narrow strips of graphene that have the potential to be used in high-performance graphene-based semiconductor electronics. However, controlled growth of GNRs on dielectric substrates remains a challenge. Here, we report the successful growth of GNRs directly on hexagonal boron nitride substrates with smooth edges and controllable widths using chemical vapour deposition. The approach is based on a type of template growth that allows for the in-plane epitaxy of mono-layered GNRs in nano-trenches on hexagonal boron nitride with edges following a zigzag direction. The embedded GNR channels show excellent electronic properties, even at room temperature. Such in-plane hetero-integration of GNRs, which is compatible with integrated circuit processing, creates a gapped channel with a width of a few benzene rings, enabling the development of digital integrated circuitry based on GNRs. PMID:28276532

Portable Cytometry Using Microscale Electronic Sensing

PubMed Central

Emaminejad, Sam; Paik, Kee-Hyun; Tabard-Cossa, Vincent; Javanmard, Mehdi

2015-01-01

In this manuscript, we present three different micro-impedance sensing architectures for electronic counting of cells and beads. The first method of sensing is based on using an open circuit sensing electrode integrated in a micro-pore, which measures the shift in potential as a micron-sized particle passes through. Our micro-pore, based on a funnel shaped microchannel, was fabricated in PDMS and was bound covalently to a glass substrate patterned with a gold open circuit electrode. The amplification circuitry was integrated onto a battery-powered custom printed circuit board. The second method is based on a three electrode differential measurement, which opens up the potential of using signal processing techniques to increase signal to noise ratio post measurement. The third architecture uses a contactless sensing approach, which significantly minimizes the cost of the consumable component of the impedance cytometer. We demonstrated proof of concept for the three sensing architectures by measuring the detected signal due to the passage of micron sized beads through the pore. PMID:27647950

UHF front-end feeding RFID-based body sensor networks by exploiting the reader signal

NASA Astrophysics Data System (ADS)

Pasca, M.; Colella, R.; Catarinucci, L.; Tarricone, L.; D'Amico, S.; Baschirotto, A.

2016-05-01

This paper presents an integrated, high-sensitivity UHF radio frequency identification (RFID) power management circuit for body sensor network applications. The circuit consists of a two-stage RF-DC Dickson's rectifier followed by an integrated five-stage DC-DC Pelliconi's charge pump driven by an ultralow start-up voltage LC oscillator. The DC-DC charge pump interposed between the RF-DC rectifier and the output load provides the RF to load isolation avoiding losses due to the diodes reverse saturation current. The RF-DC rectifier has been realized on FR4 substrate, while the charge pump and the oscillator have been realized in 180 nm complementary metal oxide semiconductor (CMOS) technology. Outdoor measurements demonstrate the ability of the power management circuit to provide 400 mV output voltage at 14 m distance from the UHF reader, in correspondence of -25 dBm input signal power. As demonstrated in the literature, such output voltage level is suitable to supply body sensor network nodes.

Trade-off between Photon Management Efficacy and Material Quality in Thin-Film Solar Cells on Nanostructured Substrates of High Aspect Ratio Structures

DOE PAGES

Chin, Alan; Keshavarz, Majid; Wang, Qi

2018-04-13

Although texturing of the transparent electrode of thin-film solar cells has long been used to enhance light absorption via light trapping, such texturing has involved low aspect ratio features. With the recent development of nanotechnology, nanostructured substrates enable improved light trapping and enhanced optical absorption via resonances, a process known as photon management, in thin-film solar cells. Despite the progress made in the development of photon management in thin-film solar cells using nanostructures substrates, the structural integrity of the thin-film solar cells deposited onto such nanostructured substrates is rarely considered. Here, we report the observation of the reduction in themore » open circuit voltage of amorphous silicon solar cells deposited onto a nanostructured substrate with increasing areal number density of high aspect ratio structures. For a nanostructured substrate with the areal number density of such nanostructures increasing in correlation with the distance from one edge of the substrate, a correlation between the open circuit voltage reduction and the increase of the areal number density of high aspect ratio nanostructures of the front electrode of the small-size amorphous silicon solar cells deposited onto different regions of the substrate with graded nanostructure density indicates the effect of the surface morphology on the material quality, i.e., a trade-off between photon management efficacy and material quality. Lastly, this observed trade-off highlights the importance of optimizing the morphology of the nanostructured substrate to ensure conformal deposition of the thin-film solar cell.« less

Trade-off between Photon Management Efficacy and Material Quality in Thin-Film Solar Cells on Nanostructured Substrates of High Aspect Ratio Structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chin, Alan; Keshavarz, Majid; Wang, Qi

Although texturing of the transparent electrode of thin-film solar cells has long been used to enhance light absorption via light trapping, such texturing has involved low aspect ratio features. With the recent development of nanotechnology, nanostructured substrates enable improved light trapping and enhanced optical absorption via resonances, a process known as photon management, in thin-film solar cells. Despite the progress made in the development of photon management in thin-film solar cells using nanostructures substrates, the structural integrity of the thin-film solar cells deposited onto such nanostructured substrates is rarely considered. Here, we report the observation of the reduction in themore » open circuit voltage of amorphous silicon solar cells deposited onto a nanostructured substrate with increasing areal number density of high aspect ratio structures. For a nanostructured substrate with the areal number density of such nanostructures increasing in correlation with the distance from one edge of the substrate, a correlation between the open circuit voltage reduction and the increase of the areal number density of high aspect ratio nanostructures of the front electrode of the small-size amorphous silicon solar cells deposited onto different regions of the substrate with graded nanostructure density indicates the effect of the surface morphology on the material quality, i.e., a trade-off between photon management efficacy and material quality. Lastly, this observed trade-off highlights the importance of optimizing the morphology of the nanostructured substrate to ensure conformal deposition of the thin-film solar cell.« less

Characterization of 720 and 940 MHz Oscillators with Chip Antenna for Wireless Sensors from Room Temperature to 200 and 250 deg C

NASA Technical Reports Server (NTRS)

Scardelletti, Maximilian C.; Ponchak, George E.

2011-01-01

Oscillators that operate at 720 and 940 MHz and characterized over a temperature range of 25 C to 200 C and 250 C, respectively, are presented. The oscillators are designed on alumina substrates with typical integrated circuit fabrication techniques. Cree SiC MESFETs, thin film metal-insulator-metal capacitors and spiral inductors, and Johanson miniature chip antennas make-up the circuits. The output power and phase noise are presented as a function of temperature and frequency. Index Terms MESFETS, chip antennas, oscillators SiC alumina.

High-Tc superconductor coplanar waveguide filter

NASA Technical Reports Server (NTRS)

Chew, Wilbert; Bajuk, Louis J.; Cooley, Thomas W.; Foote, Marc C.; Hunt, Brian D.; Rascoe, Daniel L.; Riley, A. L.

1991-01-01

Coplanar waveguide (CPW) low-pass filters made of YBa2Cu3O(7-delta) (YBCO) on LaAlO3 substrates, with dimensions suited for integrated circuits, were fabricated and packaged. A complete filter gives a true idea of the advantages and difficulties in replacing thin-film metal with a high-temperature superconductor in a practical circuit. Measured insertion losses in liquid nitrogen were superior to the loss of a similar thin-film copper filter throughout the 0- to 9.5-GHz passband. These results demonstrate the performance of fully patterned YBCO in a practical CPW structure after sealing in a hermetic package.

Self-assembled Nanomaterials for Hybrid Electronic and Photonic Systems

DTIC Science & Technology

2015-05-15

storage media.  Project 3. Self‐assembling Circuit Defect Modeling The self‐assembly of  nanoelectronic  devices provide an opportunity to achieve... nanoelectronics . This work will be useful in predicting the potential success of defect‐ tolerance techniques for DNA self‐assembled  nanoelectronic  substrates...program with integrated circuit emphasis simulations for DNA self-assembled nanoelectronics ." IET Computers and Digital Techniques 3, no. 6 (2009): 553-569.        

Device-level and module-level three-dimensional integrated circuits created using oblique processing

NASA Astrophysics Data System (ADS)

Burckel, D. Bruce

2016-07-01

This paper demonstrates that another class of three-dimensional integrated circuits (3-D-ICs) exists, distinct from through-silicon-via-centric and monolithic 3-D-ICs. Furthermore, it is possible to create devices that are 3-D "at the device level" (i.e., with active channels oriented in each of the three coordinate axes), by performing standard CMOS fabrication operations at an angle with respect to the wafer surface into high aspect ratio silicon substrates using membrane projection lithography (MPL). MPL requires only minimal fixturing changes to standard CMOS equipment, and no change to current state-of-the-art lithography. Eliminating the constraint of two-dimensional planar device architecture enables a wide range of interconnect topologies which could help reduce interconnect resistance/capacitance, and potentially improve performance.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations

NASA Astrophysics Data System (ADS)

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-01

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations.

PubMed

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-15

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Monolithic photonic integration for visible and short near-infrared wavelengths: technologies and platforms for bio and life science applications

NASA Astrophysics Data System (ADS)

Porcel, Marco A. G.; Artundo, Iñigo; Domenech, J. David; Geuzebroek, Douwe; Sunarto, Rino; Hoofman, Romano

2018-04-01

This tutorial aims to provide a general overview on the state-of-the-art of photonic integrated circuits (PICs) in the visible and short near-infrared (NIR) wavelength ranges, mostly focusing in silicon nitride (SiN) substrates, and a guide to the necessary steps in the design toward the fabrication of such PICs. The focus is put on bio- and life sciences, given the adequacy and, thus, a large number of applications in this field.

Investigation of a Hybrid Wafer Scale Integration Technique that Mounts Discrete Integrated Circuit Die in a Silicon Substrate.

DTIC Science & Technology

1988-03-01

Polyimides as Planarizing and Insulative Coatings 2-21 III. Experimental Procedure, Equipment, and Materials 3-1 Wet Orientation Dependent Etching Study 3...1 Die Bond Adhesives Study .3-7 Fabrication of Samples for Electrical Testing 3-21 Evaluation of the Final Samples 3-45 IV. Experimental Results and...Discussion .. 4-1 We :ientation Dependent Etching Study Results 4-1 Die Attach Adhesives Study Results 4-21 Fabrication of Samples for Electrical

Recent advances in superconducting-mixer simulations

NASA Technical Reports Server (NTRS)

Withington, S.; Kennedy, P. R.

1992-01-01

Over the last few years, considerable progress have been made in the development of techniques for fabricating high-quality superconducting circuits, and this success, together with major advances in the theoretical understanding of quantum detection and mixing at millimeter and submillimeter wavelengths, has made the development of CAD techniques for superconducting nonlinear circuits an important new enterprise. For example, arrays of quasioptical mixers are now being manufactured, where the antennas, matching networks, filters and superconducting tunnel junctions are all fabricated by depositing niobium and a variety of oxides on a single quartz substrate. There are no adjustable tuning elements on these integrated circuits, and therefore, one must be able to predict their electrical behavior precisely. This requirement, together with a general interest in the generic behavior of devices such as direct detectors and harmonic mixers, has lead us to develop a range of CAD tools for simulating the large-signal, small-signal, and noise behavior of superconducting tunnel junction circuits.

Ultra-smooth glassy graphene thin films for flexible transparent circuits

PubMed Central

Dai, Xiao; Wu, Jiang; Qian, Zhicheng; Wang, Haiyan; Jian, Jie; Cao, Yingjie; Rummeli, Mark H.; Yi, Qinghua; Liu, Huiyun; Zou, Guifu

2016-01-01

Large-area graphene thin films are prized in flexible and transparent devices. We report on a type of glassy graphene that is in an intermediate state between glassy carbon and graphene and that has high crystallinity but curly lattice planes. A polymer-assisted approach is introduced to grow an ultra-smooth (roughness, <0.7 nm) glassy graphene thin film at the inch scale. Owing to the advantages inherited by the glassy graphene thin film from graphene and glassy carbon, the glassy graphene thin film exhibits conductivity, transparency, and flexibility comparable to those of graphene, as well as glassy carbon–like mechanical and chemical stability. Moreover, glassy graphene–based circuits are fabricated using a laser direct writing approach. The circuits are transferred to flexible substrates and are shown to perform reliably. The glassy graphene thin film should stimulate the application of flexible transparent conductive materials in integrated circuits. PMID:28138535

Radiation-hardened transistor and integrated circuit

DOEpatents

Ma, Kwok K.

2007-11-20

A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

100-GHz Phase Switch/Mixer Containing a Slot-Line Transition

NASA Technical Reports Server (NTRS)

Gaier, Todd; Wells, Mary; Dawson, Douglas

2009-01-01

A circuit that can function as a phase switch, frequency mixer, or frequency multiplier operates over a broad frequency range in the vicinity of 100 GHz. Among the most notable features of this circuit is a grounded uniplanar transition (in effect, a balun) between a slot line and one of two coplanar waveguides (CPWs). The design of this circuit is well suited to integration of the circuit into a microwave monolithic integrated circuit (MMIC) package. One CPW is located at the input end and one at the output end of the top side of a substrate on which the circuit is fabricated (see Figure 1). The input CPW feeds the input signal to antiparallel flip-chip Schottky diodes connected to the edges of the slot line. Phase switching is effected by the combination of (1) the abrupt transition from the input CPW to the slot line and (2) CPW ground tuning effected by switching of the bias on the diodes. Grounding of the slot metal to the bottom metal gives rise to a frequency cutoff in the slot. This cutoff is valuable for separating different frequency components when the circuit is used as a mixer or multiplier. Proceeding along the slot line toward the output end, one encounters the aforementioned transition, which couples the slot line to the output CPW. Impedance tuning of the transition is accomplished by use of a high-impedance section immediately before the transition.

3D hybrid integrated lasers for silicon photonics

NASA Astrophysics Data System (ADS)

Song, B.; Pinna, S.; Liu, Y.; Megalini, L.; Klamkin, J.

2018-02-01

A novel 3D hybrid integration platform combines group III-V materials and silicon photonics to yield high-performance lasers is presented. This platform is based on flip-chip bonding and vertical optical coupling integration. In this work, indium phosphide (InP) devices with monolithic vertical total internal reflection turning mirrors were bonded to active silicon photonic circuits containing vertical grating couplers. Greater than 2 mW of optical power was coupled into a silicon waveguide from an InP laser. The InP devices can also be bonded directly to the silicon substrate, providing an efficient path for heat dissipation owing to the higher thermal conductance of silicon compared to InP. Lasers realized with this technique demonstrated a thermal impedance as low as 6.2°C/W, allowing for high efficiency and operation at high temperature. InP reflective semiconductor optical amplifiers were also integrated with 3D hybrid integration to form integrated external cavity lasers. These lasers demonstrated a wavelength tuning range of 30 nm, relative intensity noise lower than -135 dB/Hz and laser linewidth of 1.5 MHz. This platform is promising for integration of InP lasers and photonic integrated circuits on silicon photonics.

Printed Graphene Derivative Circuits as Passive Electrical Filters

PubMed Central

Sinar, Dogan

2018-01-01

The objective of this study is to inkjet print resistor-capacitor (RC) low pass electrical filters, using a novel water-based cellulose graphene ink, and compare the voltage-frequency and transient behavior to equivalent circuits constructed from discrete passive components. The synthesized non-toxic graphene-carboxymethyl cellulose (G-CMC) ink is deposited on mechanically flexible polyimide substrates using a customized printer that dispenses functionalized aqueous solutions. The design of the printed first-order and second-order low-pass RC filters incorporate resistive traces and interdigitated capacitors. Low pass filter characteristics, such as time constant, cut-off frequency and roll-off rate, are determined for comparative analysis. Experiments demonstrate that for low frequency applications (<100 kHz) the printed graphene derivative circuits performed as well as the circuits constructed from discrete resistors and capacitors for both low pass filter and RC integrator applications. The impact of mechanical stress due to bending on the electrical performance of the flexible printed circuits is also investigated. PMID:29473890

Optogenetic interrogation of neural circuits: technology for probing mammalian brain structures

PubMed Central

Zhang, Feng; Gradinaru, Viviana; Adamantidis, Antoine R; Durand, Remy; Airan, Raag D; de Lecea, Luis; Deisseroth, Karl

2015-01-01

Elucidation of the neural substrates underlying complex animal behaviors depends on precise activity control tools, as well as compatible readout methods. Recent developments in optogenetics have addressed this need, opening up new possibilities for systems neuroscience. Interrogation of even deep neural circuits can be conducted by directly probing the necessity and sufficiency of defined circuit elements with millisecond-scale, cell type-specific optical perturbations, coupled with suitable readouts such as electrophysiology, optical circuit dynamics measures and freely moving behavior in mammals. Here we collect in detail our strategies for delivering microbial opsin genes to deep mammalian brain structures in vivo, along with protocols for integrating the resulting optical control with compatible readouts (electrophysiological, optical and behavioral). The procedures described here, from initial virus preparation to systems-level functional readout, can be completed within 4–5 weeks. Together, these methods may help in providing circuit-level insight into the dynamics underlying complex mammalian behaviors in health and disease. PMID:20203662

Printed Graphene Derivative Circuits as Passive Electrical Filters.

PubMed

Sinar, Dogan; Knopf, George K

2018-02-23

The objective of this study is to inkjet print resistor-capacitor ( RC ) low pass electrical filters, using a novel water-based cellulose graphene ink, and compare the voltage-frequency and transient behavior to equivalent circuits constructed from discrete passive components. The synthesized non-toxic graphene-carboxymethyl cellulose (G-CMC) ink is deposited on mechanically flexible polyimide substrates using a customized printer that dispenses functionalized aqueous solutions. The design of the printed first-order and second-order low-pass RC filters incorporate resistive traces and interdigitated capacitors. Low pass filter characteristics, such as time constant, cut-off frequency and roll-off rate, are determined for comparative analysis. Experiments demonstrate that for low frequency applications (<100 kHz) the printed graphene derivative circuits performed as well as the circuits constructed from discrete resistors and capacitors for both low pass filter and RC integrator applications. The impact of mechanical stress due to bending on the electrical performance of the flexible printed circuits is also investigated.

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications

PubMed Central

Vidor, Fábio F.; Meyers, Thorsten; Hilleringmann, Ulrich

2016-01-01

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high-k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the ION/IOFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V/V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates. PMID:28335282

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications.

PubMed

Vidor, Fábio F; Meyers, Thorsten; Hilleringmann, Ulrich

2016-08-23

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high- k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the I ON / I OFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V / V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates.

Radiation and Temperature Hard Multi-Pixel Avalanche Photodiodes

NASA Technical Reports Server (NTRS)

Bensaoula, Abdelhak (Inventor); Starikov, David (Inventor); Pillai, Rajeev (Inventor)

2017-01-01

The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.

Stress redistribution and damage in interconnects caused by electromigration

NASA Astrophysics Data System (ADS)

Chiras, Stefanie Ruth

Electromigration has long been recognized as a phenomenon that induces mass redistribution in metals which, when constrained, can lead to the creation of stress. Since the development of the integrated circuit, electromigration. in interconnects, (the metal lines which carry current between devices in integrated circuits), has become a reliability concern. The primary failure mechanism in the interconnects is usually voiding, which causes electrical resistance increases in the circuit. In some cases, however, another failure mode occurs, fracture of the surrounding dielectric driven by electromigration induced compressive stresses within the interconnect. It is this failure mechanism that is the focus of this thesis. To study dielectric fracture, both residual processing stresses and the development of electromigration induced stress in isolated, constrained interconnects was measured. The high-resolution measurements were made using two types of piezospectroscopy, complemented by finite element analysis (FEA). Both procedures directly measured stress in the underlying or neighboring substrate and used FEA to determine interconnect stresses. These interconnect stresses were related to the effected circuit failure mode through post-test scanning electron microscopy and resistance measurements taken during electromigration testing. The results provide qualitative evidence of electromigration driven passivation fracture, and quantitative analysis of the theoretical model of the failure, the "immortal" interconnect concept.

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes were developed that provide low-loss, hermetic enclosure for advanced monolithic microwave and millimeter-wave integrated circuits (MMICs). The package designs are based on a fused quartz substrate material that offers improved radio frequency (RF) performance through 44 gigahertz (GHz). The small size and weight of the packages make them appropriate for a variety of applications, including phased array antenna systems. Packages were designed in two forms; one for housing a single MMIC chip, the second in the form of a multi-chip phased array module. The single chip array module was developed in three separate sizes, for chips of different geometry and frequency requirements. The phased array module was developed to address packaging directly for antenna applications, and includes transmission line and interconnect structures to support multi-element operation. All packages are fabricated using fused quartz substrate materials. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices. The package and test fixture designs were both developed in a generic sense, optimizing performance for a wide range of possible applications and devices.

Multi-100 kW: Planar low cost solar array development

NASA Technical Reports Server (NTRS)

1982-01-01

The applicability of selected low cost options to solar array blanket design was studied by fabricating representative modules and submitting them to thermal cycle environment. Large area (5.9 x 5.9 cm) solar cells of 3 varieties were purchased: (1) Standard wraparound, (2) Copper contacts substituted for the conventional Titanium-Palladium-Silver, and (3) Standard wraparound except with gridded back contact instead of continuous metallization. The baseline cell was purchased to compare fabrication cost and to serve as a control cell during test evaluation of the other two cells. All cells were assembled into either substrate modules where the cell is individually filtered and welded to an integrated Kapton-copper circuit or into a superstrate configuration with 4 cells jointly adhered to a single sheet of microsheet and then welded to the integrated Kapton-copper circuit. Cell quality, particularly in the metallization of contacts, was less than desired. Problems were encountered with copper metallization in laying down a barrier metal which would ohmically bond to the silicon. The cells received were shunted (sintered) or with low contact pull strength (non-sintered), thus leading to the decision to solder rather than weld the copper cells to the Kapton substrate.

A low-power CMOS operational amplifier IC for a heterogeneous paper-based potentiostat

NASA Astrophysics Data System (ADS)

Bezuidenhout, P.; Land, K.; Joubert, T.-H.

2016-02-01

Electrochemical biosensing is used to detect specific analytes in fluids, such as bacterial and chemical contaminants. A common implementation of an electrochemical readout is a potentiostat, which usually includes potentiometric, amperometric, and impedimetric detection. Recently several researchers have developed small, low-cost, single-chip silicon-based potentiostats. With the advances in heterogeneous integration technology, low-power potentiostats can be implemented on paper and similar low cost substrates. This paper deals with the design of a low-power paper-based amperometric front-end for a low-cost and rapid detection environment. In amperometric detection a voltage signal is provided to a sensor system, while a small current value generated by an electrochemical redox reaction in the system is measured. In order to measure low current values, the noise of the circuit must be minimized, which is accomplished with a pre-amplification front-end stage, typically designed around an operational amplifier core. An appropriate circuit design for a low-power and low-cost amperometric front-end is identified, taking the heterogeneous integration of various components into account. The operational amplifier core is on a bare custom CMOS chip, which will be integrated onto the paper substrate alongside commercial off-the-shelf electronic components. A general-purpose low-power two-stage CMOS amplifier circuit is designed and simulated for the ams 350 nm 5 V process. After the layout design and verification, the IC was submitted for a multi-project wafer manufacturing run. The simulated results are a bandwidth of 2.4 MHz, a common-mode rejection ratio of 70.04 dB, and power dissipation of 0.154 mW, which are comparable with the analytical values.

Epoxy bond and stop etch fabrication method

DOEpatents

Simmons, Jerry A.; Weckwerth, Mark V.; Baca, Wes E.

2000-01-01

A class of epoxy bond and stop etch (EBASE) microelectronic fabrication techniques is disclosed. The essence of such techniques is to grow circuit components on top of a stop etch layer grown on a first substrate. The first substrate and a host substrate are then bonded together so that the circuit components are attached to the host substrate by the bonding agent. The first substrate is then removed, e.g., by a chemical or physical etching process to which the stop etch layer is resistant. EBASE fabrication methods allow access to regions of a device structure which are usually blocked by the presence of a substrate, and are of particular utility in the fabrication of ultrafast electronic and optoelectronic devices and circuits.

High-voltage solar-cell chip

NASA Technical Reports Server (NTRS)

Kapoor, V. J.; Valco, G. J.; Skebe, G. G.; Evans, J. C., Jr.

1985-01-01

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Flexible active-matrix displays and shift registers based on solution-processed organic transistors.

PubMed

Gelinck, Gerwin H; Huitema, H Edzer A; van Veenendaal, Erik; Cantatore, Eugenio; Schrijnemakers, Laurens; van der Putten, Jan B P H; Geuns, Tom C T; Beenhakkers, Monique; Giesbers, Jacobus B; Huisman, Bart-Hendrik; Meijer, Eduard J; Benito, Estrella Mena; Touwslager, Fred J; Marsman, Albert W; van Rens, Bas J E; de Leeuw, Dago M

2004-02-01

At present, flexible displays are an important focus of research. Further development of large, flexible displays requires a cost-effective manufacturing process for the active-matrix backplane, which contains one transistor per pixel. One way to further reduce costs is to integrate (part of) the display drive circuitry, such as row shift registers, directly on the display substrate. Here, we demonstrate flexible active-matrix monochrome electrophoretic displays based on solution-processed organic transistors on 25-microm-thick polyimide substrates. The displays can be bent to a radius of 1 cm without significant loss in performance. Using the same process flow we prepared row shift registers. With 1,888 transistors, these are the largest organic integrated circuits reported to date. More importantly, the operating frequency of 5 kHz is sufficiently high to allow integration with the display operating at video speed. This work therefore represents a major step towards 'system-on-plastic'.

Design, fabrication and analysis of integrated optical waveguide devices

NASA Astrophysics Data System (ADS)

Sikorski, Yuri

Throughout the present dissertation, the main effort has been to develop the set of design rules for optical integrated circuits (OIC). At the present time, when planar optical integrated circuits seem to be the leading technology, and industry is heading towards much higher levels of integration, such design rules become necessary. It is known that analysis of light propagation in rectangular waveguides can not be carried out exactly. Various approximations become necessary, and their validity is discussed in this text. Various methods are used in the text for calculating the same problems, and results are compared. A few new concepts have been suggested to avoid approximations used elsewhere. The second part of this dissertation is directed to the development of a new technique for the fabrication of optical integrated circuits inside optical glass. This technique is based on the use of ultrafast laser pulses to alter the properties of glasses. Using this method we demonstrated the possibility of changing the refractive index of various passive and active optical glasses as well as ablating the material on the surface in a controlled fashion. A number of optical waveguide devices (e.g. waveguides, directional couplers, diffraction gratings, fiber Bragg gratings, V-grooves in dual-clad optical fibers, optical waveguide amplifiers) were fabricated and tested. Testing included measurements of loss/throughput, near-field mode profiles, efficiency and thermal stability. All of the experimental setup and test results are reported in the dissertation. We also demonstrated the possibility of using this technique to fabricate future bio-optical devices that will incorporate an OIC and a microfluidic circuit on a single substrate. Our results are expected to serve as a guide for the design and fabrication of a new generation of integrated optical and bio-optical devices.

Fibre Optic Gyroscope Developments Using Integrated Optic Components

NASA Astrophysics Data System (ADS)

Minford, W. J.; DePaula, R. M.

1988-09-01

The sensing of rotation using counterpropagating optical beams in a fiber loop (the SAGNAC effect) has gone through extensive developments and demonstrations since first proved feasible by Vali and Shorthilll in 1976. The interferometric fiber gyroscope minimum configuration2 which uses a common input-output port and single-mode filter was developed to provide the extreme high stability necessary to reach the sensitivities at low rotation rates attainable with current state-of-the-art detectors. The simplicity and performance of this configuration has led to its acceptance and wide-spread use. In order to increase the mechanical stability of this system, all single-mode fiber components are employed and a further advancement to integrated optics has enabled most of the optical functions to be placed on a single mass-producible substrate. Recent improvements in the components (eg polarization maintaining fiber and low coherence sources) have further enhanced the performance of the minimum configuration gyro. This presentation focused on the impact of LiNbO3 integrated optic components on gyroscope developments. The use of Ti-indiffused LiNbO3 waveguide optical circuits in interferometric fiber optic gyroscopes has taken two directions: to utilize only the phase modulator, or to combine many of the minimum configuration optical functions on the electro-optic substrate. The high-bandwidth phase modulator is the driving force for using LiNbO3 waveguide devices. This device allows both biasing the gyro for maximum sensitivity and closing the loop via frequency shifting, for example, thus increasing the dynamic range of the gyro and the linearity of the scale factor. Efforts to implement most of the minimum configuration optical functions onto a single LiNbO3 substrate have been led by Thomson CSF.3 They have demonstrated an interferometric gyroscope with excellent performance using a LiNbO3 optical circuit containing a Y-splitter, phase modulator, and surface-resonant polarizer. JPL and AT&T-BL have an effort, under a NASA contract, to investigate other integrated optic gyro front-end circuits with the eventual goal of combining all minimum configuration functions on a single substrate. The performance of a gyroscope with a LiNbO3 polarizer, 3dB splitter, and phase modulator was discussed along with the waveguide device characteristics. The key advantages, future trends, and present issues involved with using LiNbO3 waveguide devices in a gyroscope were addressed.

Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

NASA Astrophysics Data System (ADS)

Geier, Michael

Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and symmetric threshold voltages. Additionally, a novel n-type doping procedure for SWCNT TFTs was also developed utilizing a solution-processed organometallic small molecule to demonstrate the first network top-gated n-type SWCNT TFTs. Lastly, new doping and encapsulation layers were incorporated to stabilize both p-type and n-type SWCNT TFT electronic properties, which enabled the fabrication of large-scale memory circuits. Employing these materials and processing advances has addressed many application specific barriers to commercialization. For instance, the first thin-film SWCNT complementary metal-oxide-semi-conductor (CMOS) logic devices are demonstrated with sub-nanowatt static power consumption and full rail-to-rail voltage transfer characteristics. With the introduction of a new n-type Rh-based molecular dopant, the first SWCNT TFTs are fabricated in top-gate geometries over large areas with high yield. Then by utilizing robust encapsulation methods, stable and uniform electronic performance of both p-type and n-type SWCNT TFTs has been achieved. Based on these complementary SWCNT TFTs, it is possible to simulate, design, and fabricate arrays of low-power static random access memory (SRAM) circuits, achieving large-scale integration for the first time based on solution-processed semiconductors. Together, this work provides a direct pathway for solution processable, large scale, power-efficient advanced integrated logic circuits and systems.

2.45 GHz Rectenna Designed for Wireless Sensors Operating at 500 C

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Schwartz, Zachary D.; Jordan, Jennifer L.; Downey, Alan N.; Neudeck, Philip G.

2004-01-01

High temperature wireless sensors that operate at 500 C are required for aircraft engine monitoring and performance improvement These sensors would replace currently used hard-wired sensors and lead to a substantial reduction in mass. However, even if the sensor output data is transmitted wirelessly to a receiver in the cooler part of the engine, and the associated cables are eliminated, DC power cables are still required to operate the sensors and power the wireless circuits. To solve this problem, NASA is developing a rectenna, a circuit that receives RF power and converts it to DC power. The rectenna would be integrated with the wireless sensor, and the RF transmitter that powers the rectenna would be located in the cooler part of the engine. In this way, no cables to or from the sensors are required. Rectennas haw been demonstrated at ambient room temperature, but to date, no high temperature rectennas haw been reported. In this paper, we report the first rectenna designed for 2.45 GHz operation at 500 C. The circuit consists of a microstrip dipole antenna, a stripline impedance matching circuit, and a stripline low pass filter to prevent transmission of higher harmonics created by the rectifying diode fabricated on an Alumina substrate. The rectifying diode is the gate to source junction of a 6H Sic MESFET and the capacitor and load resistor are chip elements that are each bonded to the Alumina substrate. Each element and the hybrid, rectenna circuit haw been characterized through 500 C.

Soft-Matter Printed Circuit Board with UV Laser Micropatterning.

PubMed

Lu, Tong; Markvicka, Eric J; Jin, Yichu; Majidi, Carmel

2017-07-05

When encapsulated in elastomer, micropatterned traces of Ga-based liquid metal (LM) can function as elastically deformable circuit wiring that provides mechanically robust electrical connectivity between solid-state elements (e.g., transistors, processors, and sensor nodes). However, LM-microelectronics integration is currently limited by challenges in rapid fabrication of LM circuits and the creation of vias between circuit terminals and the I/O pins of packaged electronics. In this study, we address both with a unique layup for soft-matter electronics in which traces of liquid-phase Ga-In eutectic (EGaIn) are patterned with UV laser micromachining (UVLM). The terminals of the elastomer-sealed LM circuit connect to the surface mounted chips through vertically aligned columns of EGaIn-coated Ag-Fe 2 O 3 microparticles that are embedded within an interfacial elastomer layer. The processing technique is compatible with conventional UVLM printed circuit board (PCB) prototyping and exploits the photophysical ablation of EGaIn on an elastomer substrate. Potential applications to wearable computing and biosensing are demonstrated with functional implementations in which soft-matter PCBs are populated with surface-mounted microelectronics.

Silicon-Germanium Films Grown on Sapphire for Ka-Band Communications Applications

NASA Technical Reports Server (NTRS)

Alterovitz, Samuel A.; Mueller, Carl H.; Croke, Edward T.

2004-01-01

NASA's vision in the space communications area is to develop a broadband data network in which there is a high degree of interconnectivity among the various satellite systems, ground stations, and wired systems. To accomplish this goal, we will need complex electronic circuits integrating analog and digital data handling at the Ka-band (26 to 40 GHz). The purpose of this project is to show the feasibility of a new technology for Ka-band communications applications, namely silicon germanium (SiGe) on sapphire. This new technology will have several advantages in comparison to the existing silicon-substrate- based circuits. The main advantages are extremely low parasitic reactances that enable much higher quality active and passive components, better device isolation, higher radiation tolerance, and the integration of digital and analog circuitry on a single chip.

Force-controlled inorganic crystallization lithography.

PubMed

Cheng, Chao-Min; LeDuc, Philip R

2006-09-20

Lithography plays a key role in integrated circuits, optics, information technology, biomedical applications, catalysis, and separation technologies. However, inorganic lithography techniques remain of limited utility for applications outside of the typical foci of integrated circuit manufacturing. In this communication, we have developed a novel stamping method that applies pressure on the upper surface of the stamp to regulate the dewetting process of the inorganic buffer and the evaporation rate of the solvent in this buffer between the substrate and the surface of the stamp. We focused on generating inorganic microstructures with specific locations and also on enabling the ability to pattern gradients during the crystallization of the inorganic salts. This approach utilized a combination of lithography with bottom-up growth and assembly of inorganic crystals. This work has potential applications in a variety of fields, including studying inorganic material patterning and small-scale fabrication technology.

Investigations of different doping concentration of phosphorus and boron into silicon substrate on the variable temperature Raman characteristics

NASA Astrophysics Data System (ADS)

Li, Xiaoli; Ding, Kai; Liu, Jian; Gao, Junxuan; Zhang, Weifeng

2018-01-01

Different doped silicon substrates have different device applications and have been used to fabricate solar panels and large scale integrated circuits. The thermal transport in silicon substrates are dominated by lattice vibrations, doping type, and doping concentration. In this paper, a variable-temperature Raman spectroscopic system is applied to record the frequency and linewidth changes of the silicon peak at 520 cm-1 in five chips of silicon substrate with different doping concentration of phosphorus and boron at the 83K to 1473K temperature range. The doping has better heat sensitive to temperature on the frequency shift over the low temperature range from 83K to 300K but on FWHM in high temperature range from 300K to 1473K. The results will be helpful for fundamental study and practical applications of silicon substrates.

Waferscale nanophotonic circuits made from diamond-on-insulator substrates.

PubMed

Rath, P; Gruhler, N; Khasminskaya, S; Nebel, C; Wild, C; Pernice, W H P

2013-05-06

Wide bandgap dielectrics are attractive materials for the fabrication of photonic devices because they allow broadband optical operation and do not suffer from free-carrier absorption. Here we show that polycrystalline diamond thin films deposited by chemical vapor deposition provide a promising platform for the realization of large scale integrated photonic circuits. We present a full suite of photonic components required for the investigation of on-chip devices, including input grating couplers, millimeter long nanophotonic waveguides and microcavities. In microring resonators we measure loaded optical quality factors up to 11,000. Corresponding propagation loss of 5 dB/mm is also confirmed by measuring transmission through long waveguides.

Single Junction InGaP/GaAs Solar Cells Grown on Si Substrates using SiGe Buffer Layers

NASA Technical Reports Server (NTRS)

Ringel, S. A.; Carlin, J. A.; Andre, C. L.; Hudait, M. K.; Gonzalez, M.; Wilt, D. M.; Clark, E. B.; Jenkins, P.; Scheiman, D.; Allerman, A.

2002-01-01

Single junction InGaP/GaAs solar cells displaying high efficiency and record high open circuit voltage values have been grown by metalorganic chemical vapor deposition on Ge/graded SiGe/Si substrates. Open circuit voltages as high as 980 mV under AM0 conditions have been verified to result from a single GaAs junction, with no evidence of Ge-related sub-cell photoresponse. Current AM0 efficiencies of close to 16% have been measured for a large number of small area cells, whose performance is limited by non-fundamental current losses due to significant surface reflection resulting from greater than 10% front surface metal coverage and wafer handling during the growth sequence for these prototype cells. It is shown that at the material quality currently achieved for GaAs grown on Ge/SiGe/Si substrates, namely a 10 nanosecond minority carrier lifetime that results from complete elimination of anti-phase domains and maintaining a threading dislocation density of approximately 8 x 10(exp 5) per square centimeter, 19-20% AM0 single junction GaAs cells are imminent. Experiments show that the high performance is not degraded for larger area cells, with identical open circuit voltages and higher short circuit current (due to reduced front metal coverage) values being demonstrated, indicating that large area scaling is possible in the near term. Comparison to a simple model indicates that the voltage output of these GaAs on Si cells follows ideal behavior expected for lattice mismatched devices, demonstrating that unaccounted for defects and issues that have plagued other methods to epitaxially integrate III-V cells with Si are resolved using SiGe buffers and proper GaAs nucleation methods. These early results already show the enormous and realistic potential of the virtual SiGe substrate approach for generating high efficiency, lightweight and strong III-V solar cells.

Systematic analysis of CMOS-micromachined inductors with application to mixer matching circuits

NASA Astrophysics Data System (ADS)

Wu, Jerry Chun-Li

The growing demand for consumer voice and data communication systems and military communication applications has created a need for low-power, low-cost, high-performance radio-frequency (RF) front-end. To achieve this goal, bringing passive components, especially inductors, to silicon is imperative. On-chip passive components such as inductors and capacitors generally enhance the reliability and efficiency of silicon-integrated RF cells. They can provide circuit solutions with superior performance and contribute to a higher level of integration. With passive components on chip, there is a great opportunity to have transformers, filters, and matching networks on chip. However, inductors on silicon have a low quality factor (Q) due to both substrate and metal loss. This dissertation demonstrates the systematic analysis of inductors fabricated using standard complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) system technologies. We report system-on-chip inductor modeling, simulation, and measurements of effective inductance and quality factors. In this analysis methodology, a number of systematic simulations are performed on regular and micromachined inductors with different parameters such as spiral topology, number of turns, outer diameter, thickness, and percentage of substrate removed by using micromachining technologies. Three different novel support structures of the micromachined spiral inductor are proposed, analyzed, and implemented for larger size suspended inductors. The sensitivity of the structure support and different degree of substrate etching by post-processing is illustrated. The results provide guidelines for the selection of inductor parameters, post-processing methodologies, and its spiral supports to meet the RF design specifications and the stability requirements for mobile communication. The proposed CMOS-micromachined inductor is used in a low cost-effective double-balanced Gilbert mixer with on-chip matching network. The integrated mixer inductor was implemented and tested to prove the concept.

SVGA and XGA LCOS microdisplays for HMD applications

NASA Astrophysics Data System (ADS)

Bolotski, Michael; Alvelda, Phillip

1999-07-01

MicroDisplay liquid crystal on silicon (LCOS) display devices are based on a combination of technologies combined with the extreme integration capability of conventionally fabricated CMOS substrates. Two recent SVGA (800 X 600) pixel resolution designs were demonstrated based on 10 micron and 12.5-micron pixel pitch architectures. The resulting microdisplays measure approximately 10 mm and 12 mm in diagonal respectively. Further, an XGA (1024 X 768) resolution display fabricated with a 12.5-micron pixel pitch with a 16-mm diagonal was also demonstrated. Both the larger SVGA and the XGA design were based on the same 12.5-micron pixel-pitch design, demonstrating a quickly scalable design architecture for rapid prototyping life-cycles. All three microdisplay designs described above function in grayscale and high-performance Field-Sequential-Color (FSC) operating modes. The fast liquid crystal operating modes and new scalable high- performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable commercial and defense applications including ultra-portable helmet, eyeglass, and heat-mounted systems. The entire suite of The MicroDisplay Corporation's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASIC) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. For helmet and head-mounted displays this can include capabilities such as the incorporation of customized symbology and information storage directly on the display substrate. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

Coaxial inverted geometry transistor having buried emitter

NASA Technical Reports Server (NTRS)

Hruby, R. J.; Cress, S. B.; Dunn, W. R. (Inventor)

1973-01-01

The invention relates to an inverted geometry transistor wherein the emitter is buried within the substrate. The transistor can be fabricated as a part of a monolithic integrated circuit and is particularly suited for use in applications where it is desired to employ low actuating voltages. The transistor may employ the same doping levels in the collector and emitter, so these connections can be reversed.

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors.

PubMed

Chen, Haitian; Cao, Yu; Zhang, Jialu; Zhou, Chongwu

2014-06-13

Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).

Poly-4-vinylphenol (PVP) and Poly(melamine-co-formaldehyde) (PMF)-Based Atomic Switching Device and Its Application to Logic Gate Circuits with Low Operating Voltage.

PubMed

Kang, Dong-Ho; Choi, Woo-Young; Woo, Hyunsuk; Jang, Sungkyu; Park, Hyung-Youl; Shim, Jaewoo; Choi, Jae-Woong; Kim, Sungho; Jeon, Sanghun; Lee, Sungjoo; Park, Jin-Hong

2017-08-16

In this study, we demonstrate a high-performance solid polymer electrolyte (SPE) atomic switching device with low SET/RESET voltages (0.25 and -0.5 V, respectively), high on/off-current ratio (10 5 ), excellent cyclic endurance (>10 3 ), and long retention time (>10 4 s), where poly-4-vinylphenol (PVP)/poly(melamine-co-formaldehyde) (PMF) is used as an SPE layer. To accomplish these excellent device performance parameters, we reduce the off-current level of the PVP/PMF atomic switching device by improving the electrical insulating property of the PVP/PMF electrolyte through adjustment of the number of cross-linked chains. We then apply a titanium buffer layer to the PVP/PMF switching device for further improvement of bipolar switching behavior and device stability. In addition, we first implement SPE atomic switch-based logic AND and OR circuits with low operating voltages below 2 V by integrating 5 × 5 arrays of PVP/PMF switching devices on the flexible substrate. In particular, this low operating voltage of our logic circuits was much lower than that (>5 V) of the circuits configured by polymer resistive random access memory. This research successfully presents the feasibility of PVP/PMF atomic switches for flexible integrated circuits for next-generation electronic applications.

Integrated Millimeter-Wave Frequency Multiplers

NASA Astrophysics Data System (ADS)

Schoenthal, Gerhard S.; Deaver, B. S.; Crowe, T. W.; Bishop, W. L.; Saini, K.; Bradley, R. F.

2001-11-01

Many of the molecules of interest to radio astronomers and atmospheric chemists resonate at frequencies in the millimeter and submillimeter wavelength bands. To measure the spectra of these molecules scientists rely on heterodyne receivers that convert the high frequency signal to the GHz band where it is readily amplified and analyzed. One of the challenges of developing suitable receiver systems is the development of compact, reliable and affordable sources of local oscillator power at frequencies in excess of 100 GHz. One useful solution is to use GaAs Schottky diodes, in their varactor mode, to generate high frequency harmonics of lower frequency sources such as Gunn oscillators. As a part of a multi-national radio astronomy project, the Atacama Millimeter Large Array (ALMA), we have designed and fabricated a broadband frequency tripler with an output centered at 240 GHz. It is integrated on a quartz substrate to greatly reduce the parasitic capacitance and thereby improve electrical performance. The integrated circuit was designed to require no oxides or ohmic contacts, thereby easing fabrication. This talk will discuss the novel millimeter-wave integrated circuit fabrication process and the initial results.

Roughness measurements on coupling structures for optical interconnections integrated on a printed circuit board

NASA Astrophysics Data System (ADS)

Hendrickx, Nina; Van Erps, Jürgen; Suyal, Himanshu; Taghizadeh, Mohammad; Thienpont, Hugo; Van Daele, Peter

2006-04-01

In this paper, laser ablation (at UGent), deep proton writing (at VUB) and laser direct writing (at HWU) are presented as versatile technologies that can be used for the fabrication of coupling structures for optical interconnections integrated on a printed circuit board (PCB). The optical layer, a highly cross-linked acrylate based polymer, is applied on an FR4 substrate. Both laser ablation and laser direct writing are used for the definition of arrays of multimode optical waveguides, which guide the light in the plane of the optical layer. In order to couple light vertically in/out of the plane of the optical waveguides, coupling structures have to be integrated into the optical layer. Out-of-plane turning mirrors, that deflect the light beam over 90°, are used for this purpose. The surface roughness and angle of three mirror configurations are evaluated: a laser ablated one that is integrated into the optical waveguide, a laser direct written one that is also directly written onto the waveguide and a DPW insert that is plugged into a cavity into the waveguiding layer.

Effects of /spl gamma/-rays on JFET devices and circuits fabricated in a detector-compatible Process

NASA Astrophysics Data System (ADS)

Betta, G. F. D.; Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.

2003-12-01

This work is concerned with the effects of /spl gamma/-rays on the static, signal and noise characteristics of JFET-based circuits belonging to a fabrication technology made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy. Such a process has been tuned with the aim of monolithically integrating the readout electronics on the same highly resistive substrate as multielectrode silicon detectors. The radiation tolerance of some test structures, including single devices and charge sensitive amplifiers, was studied in view of low-noise applications in industrial and medical imaging, X- and /spl gamma/-ray astronomy and high energy physics experiments. This paper intends to fill the gap in the study of gamma radiation effects on JFET devices and circuits belonging to detector-compatible technologies.

Solid State Technology Branch of NASA Lewis Research Center Second Annual Digest, June 1989 - June 1990

NASA Technical Reports Server (NTRS)

1990-01-01

A collection of papers and presentations authored by the branch between June 1989 and June 1990 is presented. The papers are organized into four sections. Section 1 deals with research in microwave circuits and includes full integrated circuits, the demonstration of optical/RF interfaces, and the evaluation of some hybrid circuitry. Section 2 indicates developments in coplanar waveguides and their use in breadboard circuits. Section 3 addresses high temperature superconductivity and includes: thin film deposition, transport measurement of film characteristics, RF surface resistant measurements, substrate permittivity measurements, measurements of microstrip line characteristics at cryogenic temperatures, patterning of superconducting films, and evaluation of simple passive microstrip circuitry based on YBaCuO films. Section 4 deals with carbon films, silicon carbide, GaAs/AlGaAs, HgCdTe, and other materials.

One-Step Laser Patterned Highly Uniform Reduced Graphene Oxide Thin Films for Circuit-Enabled Tattoo and Flexible Humidity Sensor Application.

PubMed

Park, Rowoon; Kim, Hyesu; Lone, Saifullah; Jeon, Sangheon; Kwon, Young Woo; Shin, Bosung; Hong, Suck Won

2018-06-06

The conversion of graphene oxide (GO) into reduced graphene oxide (rGO) is imperative for the electronic device applications of graphene-based materials. Efficient and cost-effective fabrication of highly uniform GO films and the successive reduction into rGO on a large area is still a cumbersome task through conventional protocols. Improved film casting of GO sheets on a polymeric substrate with quick and green reduction processes has a potential that may establish a path to the practical flexible electronics. Herein, we report a facile deposition process of GO on flexible polymer substrates to create highly uniform thin films over a large area by a flow-enabled self-assembly approach. The self-assembly of GO sheets was successfully performed by dragging the trapped solution of GO in confined geometry, which consisted of an upper stationary blade and a lower moving substrate on a motorized translational stage. The prepared GO thin films could be selectively reduced and facilitated from the simple laser direct writing process for programmable circuit printing with the desired configuration and less sample damage due to the non-contact mode operation without the use of photolithography, toxic chemistry, or high-temperature reduction methods. Furthermore, two different modes of the laser operating system for the reduction of GO films turned out to be valuable for the construction of novel graphene-based high-throughput electrical circuit boards compatible with integrating electronic module chips and flexible humidity sensors.

Screen printed passive components for flexible power electronics

NASA Astrophysics Data System (ADS)

Ostfeld, Aminy E.; Deckman, Igal; Gaikwad, Abhinav M.; Lochner, Claire M.; Arias, Ana C.

2015-10-01

Additive and low-temperature printing processes enable the integration of diverse electronic devices, both power-supplying and power-consuming, on flexible substrates at low cost. Production of a complete electronic system from these devices, however, often requires power electronics to convert between the various operating voltages of the devices. Passive components—inductors, capacitors, and resistors—perform functions such as filtering, short-term energy storage, and voltage measurement, which are vital in power electronics and many other applications. In this paper, we present screen-printed inductors, capacitors, resistors and an RLC circuit on flexible plastic substrates, and report on the design process for minimization of inductor series resistance that enables their use in power electronics. Printed inductors and resistors are then incorporated into a step-up voltage regulator circuit. Organic light-emitting diodes and a flexible lithium ion battery are fabricated and the voltage regulator is used to power the diodes from the battery, demonstrating the potential of printed passive components to replace conventional surface-mount components in a DC-DC converter application.

Screen printed passive components for flexible power electronics

PubMed Central

Ostfeld, Aminy E.; Deckman, Igal; Gaikwad, Abhinav M.; Lochner, Claire M.; Arias, Ana C.

2015-01-01

Additive and low-temperature printing processes enable the integration of diverse electronic devices, both power-supplying and power-consuming, on flexible substrates at low cost. Production of a complete electronic system from these devices, however, often requires power electronics to convert between the various operating voltages of the devices. Passive components—inductors, capacitors, and resistors—perform functions such as filtering, short-term energy storage, and voltage measurement, which are vital in power electronics and many other applications. In this paper, we present screen-printed inductors, capacitors, resistors and an RLC circuit on flexible plastic substrates, and report on the design process for minimization of inductor series resistance that enables their use in power electronics. Printed inductors and resistors are then incorporated into a step-up voltage regulator circuit. Organic light-emitting diodes and a flexible lithium ion battery are fabricated and the voltage regulator is used to power the diodes from the battery, demonstrating the potential of printed passive components to replace conventional surface-mount components in a DC-DC converter application. PMID:26514331

Screen printed passive components for flexible power electronics.

PubMed

Ostfeld, Aminy E; Deckman, Igal; Gaikwad, Abhinav M; Lochner, Claire M; Arias, Ana C

2015-10-30

Additive and low-temperature printing processes enable the integration of diverse electronic devices, both power-supplying and power-consuming, on flexible substrates at low cost. Production of a complete electronic system from these devices, however, often requires power electronics to convert between the various operating voltages of the devices. Passive components-inductors, capacitors, and resistors-perform functions such as filtering, short-term energy storage, and voltage measurement, which are vital in power electronics and many other applications. In this paper, we present screen-printed inductors, capacitors, resistors and an RLC circuit on flexible plastic substrates, and report on the design process for minimization of inductor series resistance that enables their use in power electronics. Printed inductors and resistors are then incorporated into a step-up voltage regulator circuit. Organic light-emitting diodes and a flexible lithium ion battery are fabricated and the voltage regulator is used to power the diodes from the battery, demonstrating the potential of printed passive components to replace conventional surface-mount components in a DC-DC converter application.

Micro-opto-mechanical devices and systems using epitaxial lift off

NASA Technical Reports Server (NTRS)

Camperi-Ginestet, C.; Kim, Young W.; Wilkinson, S.; Allen, M.; Jokerst, N. M.

1993-01-01

The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.

Single-mode glass waveguide technology for optical interchip communication on board level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning

2012-01-01

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a hybrid packaging process and design issues are discussed.

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

NASA Astrophysics Data System (ADS)

Ou-Peng, Li; Yong, Zhang; Rui-Min, Xu; Wei, Cheng; Yuan, Wang; Bing, Niu; Hai-Yan, Lu

2016-05-01

Design and characterization of a G-band (140-220 GHz) terahertz monolithic integrated circuit (TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm InGaAs/InP double heterojunction bipolar transistor (DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the InP substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140-190 GHz respectively. The saturation output powers are -2.688 dBm at 210 GHz and -2.88 dBm at 220 GHz, respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications. Project supported by the National Natural Science Foundation of China (Grant No. 61501091) and the Fundamental Research Funds for the Central Universities of Ministry of Education of China (Grant Nos. ZYGX2014J003 and ZYGX2013J020).

Vapor-solid-solid grown Ge nanowires at integrated circuit compatible temperature by molecular beam epitaxy

NASA Astrophysics Data System (ADS)

Zhu, Zhongyunshen; Song, Yuxin; Zhang, Zhenpu; Sun, Hao; Han, Yi; Li, Yaoyao; Zhang, Liyao; Xue, Zhongying; Di, Zengfeng; Wang, Shumin

2017-09-01

We demonstrate Au-assisted vapor-solid-solid (VSS) growth of Ge nanowires (NWs) by molecular beam epitaxy at the substrate temperature of ˜180 °C, which is compatible with the temperature window for Si-based integrated circuit. Low temperature grown Ge NWs hold a smaller size, similar uniformity, and better fit with Au tips in diameter, in contrast to Ge NWs grown at around or above the eutectic temperature of Au-Ge alloy in the vapor-liquid-solid (VLS) growth. Six ⟨110⟩ growth orientations were observed on Ge (110) by the VSS growth at ˜180 °C, differing from only one vertical growth direction of Ge NWs by the VLS growth at a high temperature. The evolution of NWs dimension and morphology from the VLS growth to the VSS growth is qualitatively explained by analyzing the mechanism of the two growth modes.

Quantum electromechanics on silicon nitride nanomembranes

PubMed Central

Fink, J. M.; Kalaee, M.; Pitanti, A.; Norte, R.; Heinzle, L.; Davanço, M.; Srinivasan, K.; Painter, O.

2016-01-01

Radiation pressure has recently been used to effectively couple the quantum motion of mechanical elements to the fields of optical or microwave light. Integration of all three degrees of freedom—mechanical, optical and microwave—would enable a quantum interconnect between microwave and optical quantum systems. We present a platform based on silicon nitride nanomembranes for integrating superconducting microwave circuits with planar acoustic and optical devices such as phononic and photonic crystals. Using planar capacitors with vacuum gaps of 60 nm and spiral inductor coils of micron pitch we realize microwave resonant circuits with large electromechanical coupling to planar acoustic structures of nanoscale dimensions and femtoFarad motional capacitance. Using this enhanced coupling, we demonstrate microwave backaction cooling of the 4.48 MHz mechanical resonance of a nanobeam to an occupancy as low as 0.32. These results indicate the viability of silicon nitride nanomembranes as an all-in-one substrate for quantum electro-opto-mechanical experiments. PMID:27484751

Quantum electromechanics on silicon nitride nanomembranes.

PubMed

Fink, J M; Kalaee, M; Pitanti, A; Norte, R; Heinzle, L; Davanço, M; Srinivasan, K; Painter, O

2016-08-03

Radiation pressure has recently been used to effectively couple the quantum motion of mechanical elements to the fields of optical or microwave light. Integration of all three degrees of freedom-mechanical, optical and microwave-would enable a quantum interconnect between microwave and optical quantum systems. We present a platform based on silicon nitride nanomembranes for integrating superconducting microwave circuits with planar acoustic and optical devices such as phononic and photonic crystals. Using planar capacitors with vacuum gaps of 60 nm and spiral inductor coils of micron pitch we realize microwave resonant circuits with large electromechanical coupling to planar acoustic structures of nanoscale dimensions and femtoFarad motional capacitance. Using this enhanced coupling, we demonstrate microwave backaction cooling of the 4.48 MHz mechanical resonance of a nanobeam to an occupancy as low as 0.32. These results indicate the viability of silicon nitride nanomembranes as an all-in-one substrate for quantum electro-opto-mechanical experiments.

Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

PubMed

Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

2016-02-23

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

Nanogranular soft magnetic material and on-package integrated inductors

NASA Astrophysics Data System (ADS)

Li, Liangliang

2007-12-01

Integrated inductors used in electronic circuits are mainly spiral-shaped aluminum devices fabricated on Si chip. They have several disadvantages---large silicon area consumption, high DC resistance and high cost. An attractive approach to address these issues is directly integrating inductors into package substrates, which provide plenty of usage area, low resistance and low cost. The goals of this dissertation are designing and fabricating magnetic and air-core inductors with characteristic low resistance and high quality factor on package substrates. The research work includes three parts which are summarized below. First, the CoFeHfO nanogranular magnetic material developed on Si wafers and package substrates by pulsed DC reactive sputtering were investigated. On Si wafers, the optimized CoFeHfO film has soft magnetic properties. On printed circuit board (PCB) substrates, these magnetic properties degrade due to the rough surface. Surface planarization such as chemical-mechanical polishing can be applied on PCB substrates to reduce the surface roughness and hence improve these properties. Second, on-package inductors with small resistances and high quality factors were designed, fabricated, measured and analyzed. Air-core and magnetic inductors (20 design variations) were built on 8-inch PCB substrates. The DC resistances of these inductors are less than 12 mO, one of the lowest values ever reported. The maximum quality factors can be as large as ˜80 at around 1 GHz for the air-core inductors and ˜25 at 200 MHz for the magnetic inductors. Third, inductor simulation was carried out to study the effects of magnetic materials on the properties of inductors using the Ansoft HFSS software package. The measurement data for the permeability spectra of the CoFeHfO film and the tensor nature of the permeability were taken into account in the simulation. The simulation results matched the experimental data for the inductances, resistances and quality factors. This established an accurate method for modeling high-frequency magnetic devices. Using this method, an inductor with a closed magnetic core was studied by varying the geometry of the core and copper coil. It has been found that the inductance of this inductor depends strongly on whether the permeability of the magnetic core is isotropic or anisotropic.

Aerosol-jet-printed, 1 volt H-bridge drive circuit on plastic with integrated electrochromic pixel.

PubMed

Ha, Mingjing; Zhang, Wei; Braga, Daniele; Renn, Michael J; Kim, Chris H; Frisbie, C Daniel

2013-12-26

In this report, we demonstrate a printed, flexible, and low-voltage circuit that successfully drives a polymer electrochromic (EC) pixel as large as 4 mm(2) that is printed on the same substrate. All of the key components of the drive circuitry, namely, resistors, capacitors, and transistors, were aerosol-jet-printed onto a plastic foil; metallic electrodes and interconnects were the only components prepatterned on the plastic by conventional photolithography. The large milliampere drive currents necessary to switch a 4 mm(2) EC pixel were controlled by printed electrolyte-gated transistors (EGTs) that incorporate printable ion gels for the gate insulator layers and poly(3-hexylthiophene) for the semiconductor channels. Upon application of a 1 V input pulse, the circuit switches the printed EC pixel ON (red) and OFF (blue) two times in approximately 4 s. The performance of the circuit and the behavior of the individual resistors, capacitors, EGTs, and the EC pixel are analyzed as functions of the printing parameters and operating conditions.

A flexible organic active matrix circuit fabricated using novel organic thin film transistors and organic light-emitting diodes

NASA Astrophysics Data System (ADS)

Gutiérrez-Heredia, G.; González, L. A.; Alshareef, H. N.; Gnade, B. E.; Quevedo-López, M.

2010-11-01

We present an active matrix circuit fabricated on plastic (polyethylene naphthalene, PEN) and glass substrates using organic thin film transistors and organic capacitors to control organic light-emitting diodes (OLEDs). The basic circuit is fabricated using two pentacene-based transistors and a capacitor using a novel aluminum oxide/parylene stack (Al2O3/parylene) as the dielectric for both the transistor and the capacitor. We report that our circuit can deliver up to 15 µA to each OLED pixel. To achieve 200 cd m-2 of brightness a 10 µA current is needed; therefore, our approach can initially deliver 1.5× the required current to drive a single pixel. In contrast to parylene-only devices, the Al2O3/parylene stack does not fail after stressing at a field of 1.7 MV cm-1 for >10 000 s, whereas 'parylene only' devices show breakdown at approximately 1000 s. Details of the integration scheme are presented.

OLED panel with fuses

DOE Office of Scientific and Technical Information (OSTI.GOV)

Levermore, Levermore; Pang, Huiqing; Rajan, Kamala

2014-09-16

Embodiments may provide a first device that may comprise a substrate, a plurality of conductive bus lines disposed over the substrate, and a plurality of OLED circuit elements disposed on the substrate, where each of the OLED circuit elements comprises one and only one pixel electrically connected in series with a fuse. Each pixel may further comprise a first electrode, a second electrode, and an organic electroluminescent (EL) material disposed between the first and the second electrodes. The fuse of each of the plurality of OLED circuit elements may electrically connect each of the OLED circuit elements to at leastmore » one of the plurality of bus lines. Each of the plurality of bus lines may be electrically connected to a plurality of OLED circuit elements that are commonly addressable and at least two of the bus lines may be separately addressable.« less

An expert-based model for selecting the most suitable substrate material type for antenna circuits

NASA Astrophysics Data System (ADS)

AL-Oqla, Faris M.; Omar, Amjad A.

2015-06-01

Quality and properties of microwave circuits depend on all the circuit components. One of these components is the substrate. The process of substrate material selection is a decision-making problem that involves multicriteria with objectives that are diverse and conflicting. The aim of this work was to select the most suitable substrate material type to be used in antennas in the microwave frequency range that gives best performance and reliability of the substrate. For this purpose, a model was built to ease the decision-making that includes hierarchical alternatives and criteria. The substrate material type options considered were limited to fiberglass-reinforced epoxy laminates (FR4 εr = 4.8), aluminium (III) oxide (alumina εr = 9.6), gallium arsenide III-V compound (GaAs εr = 12.8) and PTFE composites reinforced with glass microfibers (Duroid εr = 2.2-2.3). To assist in building the model and making decisions, the analytical hierarchy process (AHP) was used. The decision-making process revealed that alumina substrate material type was the most suitable choice for the antennas in the microwave frequency range that yields best performance and reliability. In addition, both the size of the circuit and the loss tangent of the substrates were found to be the most contributing subfactors in the antenna circuit specifications criterion. Experimental assessments were conducted utilising The Expert Choice™ software. The judgments were tested and found to be precise, consistent and justifiable, and the marginal inconsistency values were found to be very narrow. A sensitivity analysis was also presented to demonstrate the confidence in the drawn conclusions.

Laser Direct Writing and Selective Metallization of Metallic Circuits for Integrated Wireless Devices.

PubMed

Cai, Jinguang; Lv, Chao; Watanabe, Akira

2018-01-10

Portable and wearable devices have attracted wide research attention due to their intimate relations with human daily life. As basic structures in the devices, the preparation of high-conductive metallic circuits or micro-circuits on flexible substrates should be facile, cost-effective, and easily integrated with other electronic units. In this work, high-conductive carbon/Ni composite structures were prepared by using a facile laser direct writing method, followed by an electroless Ni plating process, which exhibit a 3-order lower sheet resistance of less than 0.1 ohm/sq compared to original structures before plating, showing the potential for practical use. The carbon/Ni composite structures exhibited a certain flexibility and excellent anti-scratch property due to the tight deposition of Ni layers on carbon surfaces. On the basis of this approach, a wireless charging and storage device on a polyimide film was demonstrated by integrating an outer rectangle carbon/Ni composite coil for harvesting electromagnetic waves and an inner carbon micro-supercapacitor for energy storage, which can be fast charged wirelessly by a commercial wireless charger. Furthermore, a near-field communication (NFC) tag was prepared by combining a carbon/Ni composite coil for harvesting signals and a commercial IC chip for data storage, which can be used as an NFC tag for practical application.

Oxygen ion-beam microlithography

DOEpatents

Tsuo, Y.S.

1991-08-20

A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used. 5 figures.

Oxygen ion-beam microlithography

DOEpatents

Tsuo, Y. Simon

1991-01-01

A method of providing and developing a resist on a substrate for constructing integrated circuit (IC) chips includes the following steps: of depositing a thin film of amorphous silicon or hydrogenated amorphous silicon on the substrate and exposing portions of the amorphous silicon to low-energy oxygen ion beams to oxidize the amorphous silicon at those selected portions. The nonoxidized portions are then removed by etching with RF-excited hydrogen plasma. Components of the IC chip can then be constructed through the removed portions of the resist. The entire process can be performed in an in-line vacuum production system having several vacuum chambers. Nitrogen or carbon ion beams can also be used.

Magneto-optical properties of cerium substituted yttrium iron garnet films with reduced thermal budget for monolithic photonic integrated circuits.

PubMed

Goto, Taichi; Onbaşlı, Mehmet C; Ross, C A

2012-12-17

Thin films of polycrystalline cerium substituted yttrium iron garnet (CeYIG) were grown on an yttrium iron garnet (YIG) seed layer on Si and Si-on-insulator substrates by pulsed laser deposition, and their optical and magneto-optical properties in the near-IR region were measured. A YIG seed layer of ~30 nm thick processed by rapid thermal anneal at 800°C provided a virtual substrate to promote crystallization of the CeYIG. The effect of the thermal budget of the YIG/CeYIG growth process on the film structure, magnetic and magnetooptical properties was determined.

HMSIW-based switchable units using super compact loaded shunt stubs and its applications on SIW/HMSIW switches

NASA Astrophysics Data System (ADS)

Chen, Haidong; Che, Wenquan; Zhang, Tianyu; Cao, Yue; Feng, Wenjie

2018-06-01

Half-mode substrate integrated waveguide (HMSIW) switchable unit, built by HMSIW section with loaded single or multi-microstrip shunt stub(s), was proposed in this work. Both shorted and opened stubs were studied, investigated and compared, bandwidth enhancement method for proposed switchable units was proposed and demonstrated. Based on these switchable units, narrowband and broadband HMSIW single-pole-single-through (SPST) switches, SIW SPST switch and SIW/HMSIW-based single-pole-double-through (SPDT) switch were designed, fabricated and measured. Good performances were observed experimentally for these proposed circuits, showing the advantages of proposed concept and an excellent candidate for switchable or reconfigurable SIW/HMSIW circuits or systems.

Pressure activated diaphragm bonder

DOEpatents

Evans, L.B.; Malba, V.

1997-05-27

A device is available for bonding one component to another, particularly for bonding electronic components of integrated circuits, such as chips, to a substrate. The bonder device in one embodiment includes a bottom metal block having a machined opening wherein a substrate is located, a template having machined openings which match solder patterns on the substrate, a thin diaphragm placed over the template after the chips have been positioned in the openings therein, and a top metal block positioned over the diaphragm and secured to the bottom block, with the diaphragm retained therebetween. The top block includes a countersink portion which extends over at least the area of the template and an opening through which a high pressure inert gas is supplied to exert uniform pressure distribution over the diaphragm to keep the chips in place during soldering. A heating means is provided to melt the solder patterns on the substrate and thereby solder the chips thereto. 4 figs.

Pressure activated diaphragm bonder

DOEpatents

Evans, Leland B.; Malba, Vincent

1997-01-01

A device is available for bonding one component to another, particularly for bonding electronic components of integrated circuits, such as chips, to a substrate. The bonder device in one embodiment includes a bottom metal block having a machined opening wherein a substrate is located, a template having machined openings which match solder patterns on the substrate, a thin diaphragm placed over the template after the chips have been positioned in the openings therein, and a top metal block positioned over the diaphragm and secured to the bottom block, with the diaphragm retained therebetween. The top block includes a countersink portion which extends over at least the area of the template and an opening through which a high pressure inert gas is supplied to exert uniform pressure distribution over the diaphragm to keep the chips in place during soldering. A heating means is provided to melt the solder patterns on the substrate and thereby solder the chips thereto.

Fabrication of Fresnel micro lens array in borosilicate glass by F2-laser ablation for glass interposer application

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning; Fricke-Begemann, Thomas; Ihlemann, Jürgen

2014-03-01

The future need for more bandwidth forces the development of optical transmission solutions for rack-to-rack, boardto- board and chip-to-chip interconnects. The goals are significant reduction of power consumption, highest density and potential for bandwidth scalability to overcome the limitations of the systems today with mostly copper based interconnects. For system integration the enabling of thin glass as a substrate material for electro-optical components with integrated micro-optics for efficient light coupling to integrated optical waveguides or fibers is becoming important. Our glass based packaging approach merges micro-system packaging and glass integrated optics. This kind of packaging consists of a thin glass substrate with integrated micro lenses providing a platform for photonic component assembly and optical fiber or waveguide interconnection. Thin glass is commercially available in panel and wafer size and characterizes excellent optical and high frequency properties. That makes it perfect for microsystem packaging. A suitable micro lens approach has to be comparable with different commercial glasses and withstand post-processing like soldering. A benefit of using laser ablated Fresnel lenses is the planar integration capability in the substrate for highest integration density. In the paper we introduce our glass based packaging concept and the Fresnel lens design for different scenarios like chip-to-fiber, chip-to-optical-printed-circuit-board coupling. Based on the design the Fresnel lenses were fabricated by using a 157 nm fluorine laser ablation system.

Fully Solution-Processable Fabrication of Multi-Layered Circuits on a Flexible Substrate Using Laser Processing

PubMed Central

Ji, Seok Young; Choi, Wonsuk; Jeon, Jin-Woo; Chang, Won Seok

2018-01-01

The development of printing technologies has enabled the realization of electric circuit fabrication on a flexible substrate. However, the current technique remains restricted to single-layer patterning. In this paper, we demonstrate a fully solution-processable patterning approach for multi-layer circuits using a combined method of laser sintering and ablation. Selective laser sintering of silver (Ag) nanoparticle-based ink is applied to make conductive patterns on a heat-sensitive substrate and insulating layer. The laser beam path and irradiation fluence are controlled to create circuit patterns for flexible electronics. Microvia drilling using femtosecond laser through the polyvinylphenol-film insulating layer by laser ablation, as well as sequential coating of Ag ink and laser sintering, achieves an interlayer interconnection between multi-layer circuits. The dimension of microvia is determined by a sophisticated adjustment of the laser focal position and intensity. Based on these methods, a flexible electronic circuit with chip-size-package light-emitting diodes was successfully fabricated and demonstrated to have functional operations. PMID:29425144

Low-Dimensional Nanomaterials and Molecular Dielectrics for Radiation-Hard Electronics

NASA Astrophysics Data System (ADS)

McMorrow, Julian

The electronic materials research driving Moore's law has provided several decades of increasingly powerful yet simultaneously miniaturized computer technologies. As we approach the physical and practical limits of what can be accomplished with silicon electronics, we look to new materials to drive innovation in future electronic applications. New materials paradigms require the development of understanding from first principles to the demonstration of applications that comes with mature technologies. Semiconducting single-walled carbon nanotubes (SWCNTs), single- and few-layer molybdenum disulfide (MoS2) and self-assembled nanodielectric (SAND) gate materials have all made significant impacts in the research field of unconventional electronic materials. The materials selection, interfaces between materials, processing steps to assemble them, and their interaction with their environment all have significant bearing on the operation of the overall device. Operating in harsh radiation environments, like those of satellites orbiting the Earth, present unique challenges to the functionality and reliability of electronic devices. Because the future of space-bound electronics is often informed by the technology of terrestrial devices, a proactive approach is adopted to identify and understand the radiation response of new materials systems as they emerge and develop. The work discussed here drives the innovation and development of multiple nanomaterial based electronic technologies while simultaneously exploring their relevant radiation response mechanisms. First, collaborative efforts result in the demonstration of a SWCNT-based circuit technology that is solution processed, large-area, and compatible with flexible substrates. The statistical characterization of SWCNT transistors enables the development of robust doping and encapsulation schemes, which make the SWCNT circuits stable, scalable, and low-power. These SWCNTs are then integrated into static random access memory (SRAM) cells, an accomplishment that illustrates the technological relevance of this work by implementing a highly utilized component of modern day computing. Next, these SRAM devices demonstrate functionality as true random number generators (TRNGs), which are critical components in cryptography and encryption. The randomness of these SWCNT TRNGs is verified by a suite of statistical tests. This achievement has implications for securing data and communication in future solution-processed, large-area, flexible electronics. The unprecedented integration achieved by the underlying SWCNT doping and encapsulation motivates the study of this technology in a radiation environment. Doing so results in an understanding of the fundamental charge trapping mechanisms responsible for the radiation response in this system. The integrated nature of these devices enables, for the first time, the observation of system-level effects in a SWCNT integrated circuit technology. This technology is found to be total ionizing dose-hard, a promising result for the adoption of SWCNTs in future space-bound applications. Compared to SWCNTs, the field of MoS2 electronics is relatively nascent. As a result, studies of radiation effects in MoS2 devices focus on the fundamental mechanisms at play in the materials system. Here, we reveal the critical role of atmospheric adsorbates in the radiation effects of MoS2 transistors by measuring their response to vacuum ultraviolet radiation. These results highlight the importance of controlling the atmosphere of MoS2 devices during irradiation. Furthermore, we make recommendations for radiation-hard MoS2-based devices in the future as the technology continues to mature. One such recommendation is the incorporation of specialized dielectrics with proven radiation hardness. To this end, we address the materials integration challenge of incorporating SAND gate dielectrics on arbitrary substrates. We explore a novel approach for preparing metal substrates for SAND deposition, supporting the SAND superlattice structure and its superlative electronic properties on a metal surface. This result is critical for conducting fundamental transport studies when integrating SAND with novel semiconductor materials, as well as enabling complex circuit integration and SAND on flexible substrates. Altogether, these works drive the integration of novel nanoelectronic materials for future electronics while providing an understanding of their varying radiation response mechanisms to enable their adoption in future space-bound applications.

Graphene integrated circuits: new prospects towards receiver realisation.

PubMed

Saeed, Mohamed; Hamed, Ahmed; Wang, Zhenxing; Shaygan, Mehrdad; Neumaier, Daniel; Negra, Renato

2017-12-21

This work demonstrates a design approach which enables the fabrication of fully integrated radio frequency (RF) and millimetre-wave frequency direct-conversion graphene receivers by adapting the frontend architecture to exploit the state-of-the-art performance of the recently reported wafer-scale CVD metal-insulator-graphene (MIG) diodes. As a proof-of-concept, we built a fully integrated microwave receiver in the frequency range 2.1-2.7 GHz employing the strong nonlinearity and the high responsivity of MIG diodes to successfully receive and demodulate complex, digitally modulated communication signals at 2.45 GHz. In addition, the fabricated receiver uses zero-biased MIG diodes and consumes zero dc power. With the flexibility to be fabricated on different substrates, the prototype receiver frontend is fabricated on a low-cost, glass substrate utilising a custom-developed MMIC process backend which enables the high performance of passive components. The measured performance of the prototype makes it suitable for Internet-of-Things (IoT) and Radio Frequency Identification (RFID) systems for medical and communication applications.

Wireless hydrotherapy smart suit for monitoring handicapped people

NASA Astrophysics Data System (ADS)

Correia, Jose H.; Mendes, Paulo M.

2005-02-01

This paper presents a smart suit, water impermeable, containing sensors and electronics for monitoring handicapped people at hydrotherapy sessions in swimming-pools. For integration into textiles, electronic components should be designed in a functional, robust and inexpensive way. Therefore, small-size electronics microsystems are a promising approach. The smart suit allows the monitoring of individual biometric data, such as heart rate, temperature and movement of the body. Two solutions for transmitting the data wirelessly are presented: through a low-voltage (3.0 V), low-power, CMOS RF IC (1.6 mm x 1.5 mm size dimensions) operating at 433 MHz, with ASK modulation and a patch antenna built on lossy substrates compatible with integrated circuits fabrication. Two different substrates were used for antenna implementation: high-resistivity silicon (HRS) and Corning Pyrex #7740 glass. The antenna prototypes were built to operate close to the 5 GHz ISM band. They operate at a center frequency of 5.705 GHz (HRS) and 5.995 GHz (Pyrex). The studied parameters were: substrate thickness, substrate losses, oxide thickness, metal conductivity and thickness. The antenna on HRS uses an area of 8 mm2, providing a 90 MHz bandwidth and ~0.3 dBi of gain. On a glass substrate, the antenna uses 12 mm2, provides 100 MHz bandwidth and ~3 dBi of gain.

30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits

NASA Astrophysics Data System (ADS)

Dickson, T. O.; Lacroix, M.-A.; Boret, S.; Gloria, D.; Beerkens, R.; Voinigescu, S. P.

2005-01-01

Silicon planar and three-dimensional inductors and transformers were designed and characterized on-wafer up to 100 GHz. Self-resonance frequencies (SRFs) beyond 100 GHz were obtained, demonstrating for the first time that spiral structures are suitable for applications such as 60-GHz wireless local area network and 77-GHz automotive RADAR. Minimizing area over substrate is critical to achieving high SRF. A stacked transformer is reported with S21 of -2.5 dB at 50 GHz, and which offers improved performance and less area (30 μm × 30 μm) than planar transformers or microstrip couplers. A compact inductor model is described, along with a methodology for extracting model parameters from simulated or measured y-parameters. Millimeter-wave SiGe BiCMOS mixer and voltage-controlled-oscillator circuits employing spiral inductors are presented with better or comparable performance to previously reported transmission-line-based circuits.

Micromechanical Switches on GaAs for Microwave Applications

NASA Technical Reports Server (NTRS)

Randall, John N.; Goldsmith, Chuck; Denniston, David; Lin, Tsen-Hwang

1995-01-01

In this presentation, we describe the fabrication of micro-electro-mechanical system (MEMS) devices, in particular, of low-frequency multi-element electrical switches using SiO2 cantilevers. The switches discussed are related to micromechanical membrane structures used to perform switching of optical signals on silicon substrates. These switches use a thin metal membrane which is actuated by an electrostatic potential, causing the switch to make or break contact. The advantages include: superior isolation, high power handling capabilities, high radiation hardening, very low power operations, and the ability to integrate onto GaAs monolithic microwave integrated circuit (MMIC) chips.

Electromechanical modeling of a honeycomb core integrated vibration energy converter with increased specific power for energy harvesting applications

NASA Astrophysics Data System (ADS)

Chandrasekharan, Nataraj

Innovation in integrated circuit technology along with improved manufacturing processes has resulted in considerable reduction in power consumption of electromechanical devices. Majority of these devices are currently powered by batteries. However, the issues posed by batteries, including the need for frequent battery recharge/replacement has resulted in a compelling need for alternate energy to achieve self-sufficient device operation or to supplement battery power. Vibration based energy harvesting methods through piezoelectric transduction provides with a promising potential towards replacing or supplementing battery power source. However, current piezoelectric energy harvesters generate low specific power (power-to-weight ratio) when compared to batteries that the harvesters seek to replace or supplement. In this study, the potential of integrating lightweight cellular honeycomb structures with existing piezoelectric device configurations (bimorph) to achieve higher specific power is investigated. It is shown in this study that at low excitation frequency ranges, replacing the solid continuous substrate of a conventional piezoelectric bimorph with honeycomb structures of the same material results in a significant increase in power-to-weight ratio of the piezoelectric harvester. In order to maximize the electrical response of vibration based power harvesters, the natural frequency of these harvesters is designed to match the input driving frequency. The commonly used technique of adding a tip mass is employed to lower the natural frequency (to match driving frequency) of both, solid and honeycomb substrate bimorphs. At higher excitation frequency, the natural frequency of the traditional solid substrate bimorph can only be altered (to match driving frequency) through a change in global geometric design parameters, typically achieved by increasing the thickness of the harvester. As a result, the size of the harvester is increased and can be disadvantageous especially if the application imposes a space/size constraint. Moreover, the bimorph with increased thickness will now require a larger mechanical force to deform the structure which can fall outside the input ambient excitation amplitude range. In contrast, the honeycomb core bimorph offers an advantage in terms of preserving the global geometric dimensions. The natural frequency of the honeycomb core bimorph can be altered by manipulating honeycomb cell design parameters, such as cell angle, cell wall thickness, vertical cell height and inclined cell length. This results in a change in the mass and stiffness properties of the substrate and hence the bimorph, thereby altering the natural frequency of the harvester. Design flexibility of honeycomb core bimorphs is demonstrated by varying honeycomb cell parameters to alter mass and stiffness properties for power harvesting. The influence of honeycomb cell parameters on power generation is examined to evaluate optimum design to attain highest specific power. In addition, the more compliant nature of a honeycomb core bimorph decreases susceptibility towards fatigue and can increase the operating lifetime of the harvester. The second component of this dissertation analyses an uncoupled equivalent circuit model for piezoelectric energy harvesting. Open circuit voltage developed on the piezoelectric materials can be easily computed either through analytical or finite element models. The efficacy of a method to determine power developed across a resistive load, by representing the coupled piezoelectric electromechanical problem with an external load as an open circuit voltage driven equivalent circuit, is evaluated. The lack of backward feedback at finite resistive loads resulting from such an equivalent representation is examined by comparing the equivalent circuit model to the governing equations of a fully coupled circuit model for the electromechanical problem. It is found that the backward feedback is insignificant for weakly coupled systems typically seen in micro electromechanical systems and other energy harvesting device configurations with low coupling. For moderate to high coupling systems, a correction factor based on a calibrated resistance is presented which can be used to evaluate power generation at a specific resistive load.

Two-dimensional photonic crystal arrays for polymer:fullerene solar cells.

PubMed

Nam, Sungho; Han, Jiyoung; Do, Young Rag; Kim, Hwajeong; Yim, Sanggyu; Kim, Youngkyoo

2011-11-18

We report the application of two-dimensional (2D) photonic crystal (PC) array substrates for polymer:fullerene solar cells of which the active layer is made with blended films of poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl-C61-butyric acid methyl ester (PCBM). The 2D PC array substrates were fabricated by employing a nanosphere lithography technique. Two different hole depths (200 and 300 nm) were introduced for the 2D PC arrays to examine the hole depth effect on the light harvesting (trapping). The optical effect by the 2D PC arrays was investigated by the measurement of optical transmittance either in the direction normal to the substrate (direct transmittance) or in all directions (integrated transmittance). The results showed that the integrated transmittance was higher for the 2D PC array substrates than the conventional planar substrate at the wavelengths of ca. 400 nm, even though the direct transmittance of 2D PC array substrates was much lower over the entire visible light range. The short circuit current density (J(SC)) was higher for the device with the 2D PC array (200 nm hole depth) than the reference device. However, the device with the 2D PC array (300 nm hole depth) showed a slightly lower J(SC) value at a high light intensity in spite of its light harvesting effect proven at a lower light intensity.

New Ultra-Low Permittivity Composites for Use in Ceramic Packaging of Ga:As Integrated Circuits

DTIC Science & Technology

1986-08-11

200 400 600 800 1000 SOAK TEMPERATURE (-C) Figure 8. Effect of leaching and heat treatment on relative permittivity of porous vycor glass. measured by...thermal treatment in strength, shrinkage and dielectric properties. 22 -𔃼 The feasibility of tape casting calcium aluminate cement into thin substrates...materials. (3) Vibro-compaction and calandering of cements containing microspheres. (4) Heat treatment of the polymer-containing materials. 23 V

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rodenbeck, Christopher T; Girardi, Michael

Internal nodes of a constituent integrated circuit (IC) package of a multichip module (MCM) are protected from excessive charge during plasma cleaning of the MCM. The protected nodes are coupled to an internal common node of the IC package by respectively associated discharge paths. The common node is connected to a bond pad of the IC package. During MCM assembly, and before plasma cleaning, this bond pad receives a wire bond to a ground bond pad on the MCM substrate.

Copper circuit patterning on polymer using selective surface modification and electroless plating

NASA Astrophysics Data System (ADS)

Park, Sang Jin; Ko, Tae-Jun; Yoon, Juil; Moon, Myoung-Woon; Oh, Kyu Hwan; Han, Jun Hyun

2017-02-01

We have examined a potential new and simple method for patterning a copper circuit on PET substrate by copper electroless plating, without the pretreatment steps (i.e., sensitization and activation) for electroless plating as well as the etching processes of conventional circuit patterning. A patterned mask coated with a catalyst material, Ag, for the reduction of Cu ions, is placed on a PET substrate. Subsequent oxygen plasma treatment of the PET substrate covered with the mask promotes the selective generation of anisotropic pillar- or hair-like nanostructures coated with co-deposited nanoparticles of the catalyst material on PET. After oxygen plasma treatment, a Cu circuit is well formed just by dipping the plasma-treated PET into a Cu electroless plating solution. By increasing the oxygen gas pressure in the chamber, the height of the nanostructures increases and the Ag catalyst particles are coated on not only the top but also the side surfaces of the nanostructures. Strong mechanical interlocking between the Cu circuit and PET substrate is produced by the large surface area of the nanostructures, and enhances peel strength. Results indicate this new simple two step (plasma surface modification and pretreatment-free electroless plating) method can be used to produce a flexible Cu circuit with good adhesion.

Methods for fabrication of flexible hybrid electronics

NASA Astrophysics Data System (ADS)

Street, Robert A.; Mei, Ping; Krusor, Brent; Ready, Steve E.; Zhang, Yong; Schwartz, David E.; Pierre, Adrien; Doris, Sean E.; Russo, Beverly; Kor, Siv; Veres, Janos

2017-08-01

Printed and flexible hybrid electronics is an emerging technology with potential applications in smart labels, wearable electronics, soft robotics, and prosthetics. Printed solution-based materials are compatible with plastic film substrates that are flexible, soft, and stretchable, thus enabling conformal integration with non-planar objects. In addition, manufacturing by printing is scalable to large areas and is amenable to low-cost sheet-fed and roll-to-roll processes. FHE includes display and sensory components to interface with users and environments. On the system level, devices also require electronic circuits for power, memory, signal conditioning, and communications. Those electronic components can be integrated onto a flexible substrate by either assembly or printing. PARC has developed systems and processes for realizing both approaches. This talk presents fabrication methods with an emphasis on techniques recently developed for the assembly of off-the-shelf chips. A few examples of systems fabricated with this approach are also described.

Planar resonator and integrated oscillator using magnetostatic waves.

PubMed

Kinoshita, Y; Kubota, S; Takeda, S; Nakagoshi, A

1990-01-01

A simple planar resonator using a magnetostatic wave (MSW) excited by aluminum finger electrodes with two bonding pads was realized on YIG/GGG (yttrium-iron-garnet film on a gadolinium-gallium-garnet crystal) substrate with two reflection edges. The tunable MSW resonator chip (2 mmx5 mm) exhibited a sharp notch filter response, as deep as 20-35 dB, and a high loaded Q up to 2000, which was tunable over the microwave frequency range from 2 to 4 GHz. A small tunable oscillator (8 cm(3)) was experimentally demonstrated using the MSW planar resonator and a silicon bipolar transistor integrated on a ceramic microwave circuit substrate. Microwave oscillation with spectral purity, at the same level as that of YIG sphere technology, was observed at 3 GHz. The experimental results indicate the technical areas where improvement must be made to realize a practical oscillator configuration.

Method for etching thin films of niboium and niobium-containing compounds for preparing superconductive circuits

DOEpatents

Kampwirth, R.T.; Schuller, I.K.; Falco, C.M.

1979-11-23

An improved method of preparing thin film superconducting electrical circuits of niobium or niobium compounds is provided in which a thin film of the niobium or niobium compound is applied to a nonconductive substrate and covered with a layer of photosensitive material. The sensitive material is in turn covered with a circuit pattern exposed and developed to form a mask of the circuit in photoresistive material on the surface of the film. The unmasked excess niobium film is removed by contacting the substrate with an aqueous etching solution of nitric acid, sulfuric acid, and hydrogen fluoride, which will rapidly etch the niobium compound without undercutting the photoresist. A modification of the etching solution will permit thin films to be lifted from the substrate without further etching.

An improved electrical and thermal model of a microbolometer for electronic circuit simulation

NASA Astrophysics Data System (ADS)

Würfel, D.; Vogt, H.

2012-09-01

The need for uncooled infrared focal plane arrays (IRFPA) for imaging systems has increased since the beginning of the nineties. Examples for the application of IRFPAs are thermography, pedestrian detection for automotives, fire fighting, and infrared spectroscopy. It is very important to have a correct electro-optical model for the simulation of the microbolometer during the development of the readout integrated circuit (ROIC) used for IRFPAs. The microbolometer as the sensing element absorbs infrared radiation which leads to a change of its temperature due to a very good thermal insulation. In conjunction with a high temperature coefficient of resistance (TCR) of the sensing material (typical vanadium oxide or amorphous silicon) this temperature change results in a change of the electrical resistance. During readout, electrical power is dissipated in the microbolometer, which increases the temperature continuously. The standard model for the electro-optical simulation of a microbolometer includes the radiation emitted by an observed blackbody, radiation emitted by the substrate, radiation emitted by the microbolometer itself to the surrounding, a heat loss through the legs which connect the microbolometer electrically and mechanically to the substrate, and the electrical power dissipation during readout of the microbolometer (Wood, 1997). The improved model presented in this paper takes a closer look on additional radiation effects in a real IR camera system, for example the radiation emitted by the casing and the lens. The proposed model will consider that some parts of the radiation that is reflected from the casing and the substrate is also absorbed by the microbolometer. Finally, the proposed model will include that some fraction of the radiation is transmitted through the microbolometer at first and then absorbed after the reflection at the surface of the substrate. Compared to the standard model temperature and resistance of the microbolometer can be modelled more realistically when these higher order effects are taken into account. A Verilog-A model for electronic circuit simulations is developed based on the improved thermal model of the microbolometer. Finally, a simulation result of a simple circuit is presented.

High-Throughput Fabrication of Flexible and Transparent All-Carbon Nanotube Electronics.

PubMed

Chen, Yong-Yang; Sun, Yun; Zhu, Qian-Bing; Wang, Bing-Wei; Yan, Xin; Qiu, Song; Li, Qing-Wen; Hou, Peng-Xiang; Liu, Chang; Sun, Dong-Ming; Cheng, Hui-Ming

2018-05-01

This study reports a simple and effective technique for the high-throughput fabrication of flexible all-carbon nanotube (CNT) electronics using a photosensitive dry film instead of traditional liquid photoresists. A 10 in. sized photosensitive dry film is laminated onto a flexible substrate by a roll-to-roll technology, and a 5 µm pattern resolution of the resulting CNT films is achieved for the construction of flexible and transparent all-CNT thin-film transistors (TFTs) and integrated circuits. The fabricated TFTs exhibit a desirable electrical performance including an on-off current ratio of more than 10 5 , a carrier mobility of 33 cm 2 V -1 s -1 , and a small hysteresis. The standard deviations of on-current and mobility are, respectively, 5% and 2% of the average value, demonstrating the excellent reproducibility and uniformity of the devices, which allows constructing a large noise margin inverter circuit with a voltage gain of 30. This study indicates that a photosensitive dry film is very promising for the low-cost, fast, reliable, and scalable fabrication of flexible and transparent CNT-based integrated circuits, and opens up opportunities for future high-throughput CNT-based printed electronics.

Low-noise heterodyne receiver for electron cyclotron emission imaging and microwave imaging reflectometry

NASA Astrophysics Data System (ADS)

Tobias, B.; Domier, C. W.; Luhmann, N. C.; Luo, C.; Mamidanna, M.; Phan, T.; Pham, A.-V.; Wang, Y.

2016-11-01

The critical component enabling electron cyclotron emission imaging (ECEI) and microwave imaging reflectometry (MIR) to resolve 2D and 3D electron temperature and density perturbations is the heterodyne imaging array that collects and downconverts radiated emission and/or reflected signals (50-150 GHz) to an intermediate frequency (IF) band (e.g. 0.1-18 GHz) that can be transmitted by a shielded coaxial cable for further filtering and detection. New circuitry has been developed for this task, integrating gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs) mounted on a liquid crystal polymer (LCP) substrate. The improved topology significantly increases electromagnetic shielding from out-of-band interference, leads to 10× improvement in the signal-to-noise ratio, and dramatic cost savings through integration. The current design, optimized for reflectometry and edge radiometry on mid-sized tokamaks, has demonstrated >20 dB conversion gain in upper V-band (60-75 GHz). Implementation of the circuit in a multi-channel electron cyclotron emission imaging (ECEI) array will improve the diagnosis of edge-localized modes and fluctuations of the high-confinement, or H-mode, pedestal.

Low-noise heterodyne receiver for electron cyclotron emission imaging and microwave imaging reflectometry.

PubMed

Tobias, B; Domier, C W; Luhmann, N C; Luo, C; Mamidanna, M; Phan, T; Pham, A-V; Wang, Y

2016-11-01

The critical component enabling electron cyclotron emission imaging (ECEI) and microwave imaging reflectometry (MIR) to resolve 2D and 3D electron temperature and density perturbations is the heterodyne imaging array that collects and downconverts radiated emission and/or reflected signals (50-150 GHz) to an intermediate frequency (IF) band (e.g. 0.1-18 GHz) that can be transmitted by a shielded coaxial cable for further filtering and detection. New circuitry has been developed for this task, integrating gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs) mounted on a liquid crystal polymer (LCP) substrate. The improved topology significantly increases electromagnetic shielding from out-of-band interference, leads to 10× improvement in the signal-to-noise ratio, and dramatic cost savings through integration. The current design, optimized for reflectometry and edge radiometry on mid-sized tokamaks, has demonstrated >20 dB conversion gain in upper V-band (60-75 GHz). Implementation of the circuit in a multi-channel electron cyclotron emission imaging (ECEI) array will improve the diagnosis of edge-localized modes and fluctuations of the high-confinement, or H-mode, pedestal.

Separate Brain Circuits Support Integrative and Semantic Priming in the Human Language System.

PubMed

Feng, Gangyi; Chen, Qi; Zhu, Zude; Wang, Suiping

2016-07-01

Semantic priming is a crucial phenomenon to study the organization of semantic memory. A novel type of priming effect, integrative priming, has been identified behaviorally, whereby a prime word facilitates recognition of a target word when the 2 concepts can be combined to form a unitary representation. We used both functional and anatomical imaging approaches to investigate the neural substrates supporting such integrative priming, and compare them with those in semantic priming. Similar behavioral priming effects for both semantic (Bread-Cake) and integrative conditions (Cherry-Cake) were observed when compared with an unrelated condition. However, a clearly dissociated brain response was observed between these 2 types of priming. The semantic-priming effect was localized to the posterior superior temporal and middle temporal gyrus. In contrast, the integrative-priming effect localized to the left anterior inferior frontal gyrus and left anterior temporal cortices. Furthermore, fiber tractography showed that the integrative-priming regions were connected via uncinate fasciculus fiber bundle forming an integrative circuit, whereas the semantic-priming regions connected to the posterior frontal cortex via separated pathways. The results point to dissociable neural pathways underlying the 2 distinct types of priming, illuminating the neural circuitry organization of semantic representation and integration. © The Author 2015. Published by Oxford University Press. All rights reserved. For Permissions, please e-mail: journals.permissions@oup.com.

A process for preparing an ultra-thin, adhesiveless, multi-layered, patterned polymer substrate

NASA Technical Reports Server (NTRS)

Bryant, Robert G. (Inventor); Kruse, Nancy H. M. (Inventor); Fox, Robert L. (Inventor); Tran, Sang Q. (Inventor)

1995-01-01

A process for preparing an ultra-thin, adhesiveless, multi-layered, patterned polymer substrate is disclosed. The process may be used to prepare both rigid and flexible cables and circuit boards. A substrate is provided and a polymeric solution comprising a self-bonding, soluble polymer and a solvent is applied to the substrate. Next, the polymer solution is dried to form a polymer coated substrate. The polymer coated substrate is metallized and patterned. At least one additional coating of the polymeric solution is applied to the metallized, patterned, polymer coated substrate and the steps of metallizing and patterning are repeated. Lastly, a cover coat is applied. When preparing a flexible cable and flexible circuit board, the polymer coating is removed from the substrate.

Optical surface analysis: a new technique for the inspection and metrology of optoelectronic films and wafers

NASA Astrophysics Data System (ADS)

Bechtler, Laurie; Velidandla, Vamsi

2003-04-01

In response to demand for higher volumes and greater product capability, integrated optoelectronic device processing is rapidly increasing in complexity, benefiting from techniques developed for conventional silicon integrated circuit processing. The needs for high product yield and low manufacturing cost are also similar to the silicon wafer processing industry. This paper discusses the design and use of an automated inspection instrument called the Optical Surface Analyzer (OSA) to evaluate two critical production issues in optoelectronic device manufacturing: (1) film thickness uniformity, and (2) defectivity at various process steps. The OSA measurement instrument is better suited to photonics process development than most equipment developed for conventional silicon wafer processing in two important ways: it can handle both transparent and opaque substrates (unlike most inspection and metrology tools), and it is a full-wafer inspection method that captures defects and film variations over the entire substrate surface (unlike most film thickness measurement tools). Measurement examples will be provided in the paper for a variety of films and substrates used for optoelectronics manufacturing.

Low-bandgap, monolithic, multi-bandgap, optoelectronic devices

DOEpatents

Wanlass, Mark W.; Carapella, Jeffrey J.

2016-01-05

Low bandgap, monolithic, multi-bandgap, optoelectronic devices (10), including PV converters, photodetectors, and LED's, have lattice-matched (LM), double-heterostructure (DH), low-bandgap GaInAs(P) subcells (22, 24) including those that are lattice-mismatched (LMM) to InP, grown on an InP substrate (26) by use of at least one graded lattice constant transition layer (20) of InAsP positioned somewhere between the InP substrate (26) and the LMM subcell(s) (22, 24). These devices are monofacial (10) or bifacial (80) and include monolithic, integrated, modules (MIMs) (190) with a plurality of voltage-matched subcell circuits (262, 264, 266, 270, 272) as well as other variations and embodiments.

Low-bandgap, monolithic, multi-bandgap, optoelectronic devices

DOEpatents

Wanlass, Mark W.; Carapella, Jeffrey J.

2014-07-08

Low bandgap, monolithic, multi-bandgap, optoelectronic devices (10), including PV converters, photodetectors, and LED's, have lattice-matched (LM), double-heterostructure (DH), low-bandgap GaInAs(P) subcells (22, 24) including those that are lattice-mismatched (LMM) to InP, grown on an InP substrate (26) by use of at least one graded lattice constant transition layer (20) of InAsP positioned somewhere between the InP substrate (26) and the LMM subcell(s) (22, 24). These devices are monofacial (10) or bifacial (80) and include monolithic, integrated, modules (MIMs) (190) with a plurality of voltage-matched subcell circuits (262, 264, 266, 270, 272) as well as other variations and embodiments.

Low-bandgap, monolithic, multi-bandgap, optoelectronic devices

DOEpatents

Wanlass, Mark W.; Carapella, Jeffrey J.

2016-03-22

Low bandgap, monolithic, multi-bandgap, optoelectronic devices (10), including PV converters, photodetectors, and LED's, have lattice-matched (LM), double-heterostructure (DH), low-bandgap GaInAs(P) subcells (22, 24) including those that are lattice-mismatched (LMM) to InP, grown on an InP substrate (26) by use of at least one graded lattice constant transition layer (20) of InAsP positioned somewhere between the InP substrate (26) and the LMM subcell(s) (22, 24). These devices are monofacial (10) or bifacial (80) and include monolithic, integrated, modules (MIMs) (190) with a plurality of voltage-matched subcell circuits (262, 264, 266, 270, 272) as well as other variations and embodiments.

An Equivalent Circuit of Longitudinal Vibration for a Piezoelectric Structure with Losses.

PubMed

Yuan, Tao; Li, Chaodong; Fan, Pingqing

2018-03-22

Equivalent circuits of piezoelectric structures such as bimorphs and unimorphs conventionally focus on the bending vibration modes. However, the longitudinal vibration modes are rarely considered even though they also play a remarkable role in piezoelectric devices. Losses, especially elastic loss in the metal substrate, are also generally neglected, which leads to discrepancies compared with experiments. In this paper, a novel equivalent circuit with four kinds of losses is proposed for a beamlike piezoelectric structure under the longitudinal vibration mode. This structure consists of a slender beam as the metal substrate, and a piezoelectric patch which covers a partial length of the beam. In this approach, first, complex numbers are used to deal with four kinds of losses-elastic loss in the metal substrate, and piezoelectric, dielectric, and elastic losses in the piezoelectric patch. Next in this approach, based on Mason's model, a new equivalent circuit is developed. Using MATLAB, impedance curves of this structure are simulated by the equivalent circuit method. Experiments are conducted and good agreements are revealed between experiments and equivalent circuit results. It is indicated that the introduction of four losses in an equivalent circuit can increase the result accuracy considerably.

An Equivalent Circuit of Longitudinal Vibration for a Piezoelectric Structure with Losses

PubMed Central

Yuan, Tao; Li, Chaodong; Fan, Pingqing

2018-01-01

Equivalent circuits of piezoelectric structures such as bimorphs and unimorphs conventionally focus on the bending vibration modes. However, the longitudinal vibration modes are rarely considered even though they also play a remarkable role in piezoelectric devices. Losses, especially elastic loss in the metal substrate, are also generally neglected, which leads to discrepancies compared with experiments. In this paper, a novel equivalent circuit with four kinds of losses is proposed for a beamlike piezoelectric structure under the longitudinal vibration mode. This structure consists of a slender beam as the metal substrate, and a piezoelectric patch which covers a partial length of the beam. In this approach, first, complex numbers are used to deal with four kinds of losses—elastic loss in the metal substrate, and piezoelectric, dielectric, and elastic losses in the piezoelectric patch. Next in this approach, based on Mason’s model, a new equivalent circuit is developed. Using MATLAB, impedance curves of this structure are simulated by the equivalent circuit method. Experiments are conducted and good agreements are revealed between experiments and equivalent circuit results. It is indicated that the introduction of four losses in an equivalent circuit can increase the result accuracy considerably. PMID:29565825

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Schwank, James R.; Fleetwood, Daniel M.; Shaneyfelt, Marty R.; Winokur, Peter S.; Devine, Roderick A. B.

1998-01-01

A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.

Design, Fabrication, and Characterization of Carbon Nanotube Field Emission Devices for Advanced Applications

NASA Astrophysics Data System (ADS)

Radauscher, Erich Justin

Carbon nanotubes (CNTs) have recently emerged as promising candidates for electron field emission (FE) cathodes in integrated FE devices. These nanostructured carbon materials possess exceptional properties and their synthesis can be thoroughly controlled. Their integration into advanced electronic devices, including not only FE cathodes, but sensors, energy storage devices, and circuit components, has seen rapid growth in recent years. The results of the studies presented here demonstrate that the CNT field emitter is an excellent candidate for next generation vacuum microelectronics and related electron emission devices in several advanced applications. The work presented in this study addresses determining factors that currently confine the performance and application of CNT-FE devices. Characterization studies and improvements to the FE properties of CNTs, along with Micro-Electro-Mechanical Systems (MEMS) design and fabrication, were utilized in achieving these goals. Important performance limiting parameters, including emitter lifetime and failure from poor substrate adhesion, are examined. The compatibility and integration of CNT emitters with the governing MEMS substrate (i.e., polycrystalline silicon), and its impact on these performance limiting parameters, are reported. CNT growth mechanisms and kinetics were investigated and compared to silicon (100) to improve the design of CNT emitter integrated MEMS based electronic devices, specifically in vacuum microelectronic device (VMD) applications. Improved growth allowed for design and development of novel cold-cathode FE devices utilizing CNT field emitters. A chemical ionization (CI) source based on a CNT-FE electron source was developed and evaluated in a commercial desktop mass spectrometer for explosives trace detection. This work demonstrated the first reported use of a CNT-based ion source capable of collecting CI mass spectra. The CNT-FE source demonstrated low power requirements, pulsing capabilities, and average lifetimes of over 320 hours when operated in constant emission mode under elevated pressures, without sacrificing performance. Additionally, a novel packaged ion source for miniature mass spectrometer applications using CNT emitters, a MEMS based Nier-type geometry, and a Low Temperature Cofired Ceramic (LTCC) 3D scaffold with integrated ion optics were developed and characterized. While previous research has shown other devices capable of collecting ion currents on chip, this LTCC packaged MEMS micro-ion source demonstrated improvements in energy and angular dispersion as well as the ability to direct the ions out of the packaged source and towards a mass analyzer. Simulations and experimental design, fabrication, and characterization were used to make these improvements. Finally, novel CNT-FE devices were developed to investigate their potential to perform as active circuit elements in VMD circuits. Difficulty integrating devices at micron-scales has hindered the use of vacuum electronic devices in integrated circuits, despite the unique advantages they offer in select applications. Using a combination of particle trajectory simulation and experimental characterization, device performance in an integrated platform was investigated. Solutions to the difficulties in operating multiple devices in close proximity and enhancing electron transmission (i.e., reducing grid loss) are explored in detail. A systematic and iterative process was used to develop isolation structures that reduced crosstalk between neighboring devices from 15% on average, to nearly zero. Innovative geometries and a new operational mode reduced grid loss by nearly threefold, thereby improving transmission of the emitted cathode current to the anode from 25% in initial designs to 70% on average. These performance enhancements are important enablers for larger scale integration and for the realization of complex vacuum microelectronic circuits.

Silicon on insulator achieved using electrochemical etching

DOEpatents

McCarthy, A.M.

1997-10-07

Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this technique is suitable to form silicon-on-insulator (SOI) wafers, whereby the devices and circuits formed exhibit superior performance after transfer due to the removal of the silicon substrate. The added cost of the transfer process to conventional silicon fabrication is insignificant. No epitaxial, lift-off, release or buried oxide layers are needed to perform the transfer of single or multiple wafers onto support members. The transfer process may be performed at temperatures of 50 C or less, permits transparency around the circuits and does not require post-transfer patterning. Consequently, the technique opens up new avenues for the use of integrated circuit devices in high-brightness, high-resolution video-speed color displays, reduced-thickness increased-flexibility intelligent cards, flexible electronics on ultrathin support members, adhesive electronics, touch screen electronics, items requiring low weight materials, smart cards, intelligent keys for encryption systems, toys, large area circuits, flexible supports, and other applications. The added process flexibility also permits a cheap technique for increasing circuit speed of market driven technologies such as microprocessors at little added expense. 57 figs.

Silicon on insulator achieved using electrochemical etching

DOEpatents

McCarthy, Anthony M.

1997-01-01

Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this technique is suitable to form silicon-on-insulator (SOI) wafers, whereby the devices and circuits formed exhibit superior performance after transfer due to the removal of the silicon substrate. The added cost of the transfer process to conventional silicon fabrication is insignificant. No epitaxial, lift-off, release or buried oxide layers are needed to perform the transfer of single or multiple wafers onto support members. The transfer process may be performed at temperatures of 50.degree. C. or less, permits transparency around the circuits and does not require post-transfer patterning. Consequently, the technique opens up new avenues for the use of integrated circuit devices in high-brightness, high-resolution video-speed color displays, reduced-thickness increased-flexibility intelligent cards, flexible electronics on ultrathin support members, adhesive electronics, touch screen electronics, items requiring low weight materials, smart cards, intelligent keys for encryption systems, toys, large area circuits, flexible supports, and other applications. The added process flexibility also permits a cheap technique for increasing circuit speed of market driven technologies such as microprocessors at little added expense.

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

DOEpatents

Rogers, John A; Cao, Qing; Alam, Muhammad; Pimparkar, Ninad

2015-02-03

The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.

Perspective: The future of quantum dot photonic integrated circuits

NASA Astrophysics Data System (ADS)

Norman, Justin C.; Jung, Daehwan; Wan, Yating; Bowers, John E.

2018-03-01

Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS) foundries.

Directly writing resistor, inductor and capacitor to composite functional circuits: a super-simple way for alternative electronics.

PubMed

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics.

Directly Writing Resistor, Inductor and Capacitor to Composite Functional Circuits: A Super-Simple Way for Alternative Electronics

PubMed Central

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

Background The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Methods Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Results Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. Conclusions The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics. PMID:23936349

Scalable Fabrication of Integrated Nanophotonic Circuits on Arrays of Thin Single Crystal Diamond Membrane Windows.

PubMed

Piracha, Afaq H; Rath, Patrik; Ganesan, Kumaravelu; Kühn, Stefan; Pernice, Wolfram H P; Prawer, Steven

2016-05-11

Diamond has emerged as a promising platform for nanophotonic, optical, and quantum technologies. High-quality, single crystalline substrates of acceptable size are a prerequisite to meet the demanding requirements on low-level impurities and low absorption loss when targeting large photonic circuits. Here, we describe a scalable fabrication method for single crystal diamond membrane windows that achieves three major goals with one fabrication method: providing high quality diamond, as confirmed by Raman spectroscopy; achieving homogeneously thin membranes, enabled by ion implantation; and providing compatibility with established planar fabrication via lithography and vertical etching. On such suspended diamond membranes we demonstrate a suite of photonic components as building blocks for nanophotonic circuits. Monolithic grating couplers are used to efficiently couple light between photonic circuits and optical fibers. In waveguide coupled optical ring resonators, we find loaded quality factors up to 66 000 at a wavelength of 1560 nm, corresponding to propagation loss below 7.2 dB/cm. Our approach holds promise for the scalable implementation of future diamond quantum photonic technologies and all-diamond photonic metrology tools.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, Anthony M.

1995-01-01

A method for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics.

InP-based photonic integrated circuit platform on SiC wafer.

PubMed

Takenaka, Mitsuru; Takagi, Shinichi

2017-11-27

We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

Silicon waveguided components for the long-wave infrared region

NASA Astrophysics Data System (ADS)

Soref, Richard A.; Emelett, Stephen J.; Buchwald, Walter R.

2006-10-01

We propose that the operational wavelength of waveguided Si-based photonic integrated circuits and optoelectronic integrated circuits can be extended beyond the 1.55 µm telecom range into the wide infrared from 1.55 to 100 µm. The Si rib-membrane waveguide offers low-loss transmission from 1.2 to 6 µm and from 24 to 100 µm. This waveguide, which is compatible with Si microelectronics manufacturing, is constructed from silicon-on-insulator by etching away the oxide locally beneath the rib. Alternatively, low-loss waveguiding from 1.9 to 14.7 µm is assured by employing a crystal Ge rib grown directly upon the Si substrate. The Si-based hollow-core waveguide is an excellent device that minimizes loss due to silicon's 6-24 µm multi-phonon absorption. Here the rectangular air-filled core is surrounded by SiGe/Si multi-layer anti-resonant or Bragg claddings. The hollow channel offers less than 1.7 dB cm-1 loss from 1.2 to 100 µm. .

SOI-silicon as structural layer for NEMS applications

NASA Astrophysics Data System (ADS)

Villarroya, Maria; Figueras, Eduard; Perez-Murano, Francesc; Campabadal, Francesca; Esteve, Jaume; Barniol, Nuria

2003-04-01

The objective of this paper is to present the compatibilization between a standard CMOS on bulk silicon process and the fabrication of nanoelectromechanical systems using Silicon On Insulator (SOI) wafers as substrate. This compatibilization is required as first step to fabricate a very high sensitive mass sensor based on a resonant cantilever with nanometer dimensions using the crystal silicon COI layer as the structural layer. The cantilever is driven electrostatically to its resonance frequency by an electrode placed parallel to the cantilever. A capacitive readout is performed. To achieve very high resolution, very small dimensions of the cantilever (nanometer range) are needed. For this reason, the control and excitation circuitry has to be integrated on the same substrate than the cantilever. Prior to the development of this sensor, it is necessary to develop a substrate able to be used first to integrate a standard CMOS circuit and afterwards to fabricate the nano-resonator. Starting from a SOI wafer and using very simple processes, the SOI silicon layer is removed, except from the areas in which nano-structures will be fabricated; obtaining a silicon substrate with islands with a SOI structure. The CMOS circuitry will be integrated on the bulk silicon region, while the remainder SOI region will be used for the nanoresonator. The silicon oxide of this SOI region is used as insulator; and as sacrificial layer, etched to release the cantilever from the substrate. To assure the cover of the different CMOS layers over the step of the islands, it is essential to avoid very sharp steps.

An ultra-lightweight design for imperceptible plastic electronics.

PubMed

Kaltenbrunner, Martin; Sekitani, Tsuyoshi; Reeder, Jonathan; Yokota, Tomoyuki; Kuribara, Kazunori; Tokuhara, Takeyoshi; Drack, Michael; Schwödiauer, Reinhard; Graz, Ingrid; Bauer-Gogonea, Simona; Bauer, Siegfried; Someya, Takao

2013-07-25

Electronic devices have advanced from their heavy, bulky origins to become smart, mobile appliances. Nevertheless, they remain rigid, which precludes their intimate integration into everyday life. Flexible, textile and stretchable electronics are emerging research areas and may yield mainstream technologies. Rollable and unbreakable backplanes with amorphous silicon field-effect transistors on steel substrates only 3 μm thick have been demonstrated. On polymer substrates, bending radii of 0.1 mm have been achieved in flexible electronic devices. Concurrently, the need for compliant electronics that can not only be flexed but also conform to three-dimensional shapes has emerged. Approaches include the transfer of ultrathin polyimide layers encapsulating silicon CMOS circuits onto pre-stretched elastomers, the use of conductive elastomers integrated with organic field-effect transistors (OFETs) on polyimide islands, and fabrication of OFETs and gold interconnects on elastic substrates to realize pressure, temperature and optical sensors. Here we present a platform that makes electronics both virtually unbreakable and imperceptible. Fabricated directly on ultrathin (1 μm) polymer foils, our electronic circuits are light (3 g m(-2)) and ultraflexible and conform to their ambient, dynamic environment. Organic transistors with an ultra-dense oxide gate dielectric a few nanometres thick formed at room temperature enable sophisticated large-area electronic foils with unprecedented mechanical and environmental stability: they withstand repeated bending to radii of 5 μm and less, can be crumpled like paper, accommodate stretching up to 230% on prestrained elastomers, and can be operated at high temperatures and in aqueous environments. Because manufacturing costs of organic electronics are potentially low, imperceptible electronic foils may be as common in the future as plastic wrap is today. Applications include matrix-addressed tactile sensor foils for health care and monitoring, thin-film heaters, temperature and infrared sensors, displays, and organic solar cells.

Design and construction of a VHGT-attached WDM-type triplex transceiver module using polymer PLC hybrid integration technology

NASA Astrophysics Data System (ADS)

Jerábek, Vitezslav; Hüttel, Ivan; Prajzler, Václav; Busek, K.; Seliger, P.

2008-11-01

We report about design and construction of the bidirectional transceiver TRx module for subscriber part of the passive optical network PON for a fiber to the home FTTH topology. The TRx module consists of a epoxy novolak resin polymer planar lightwave circuit (PLC) hybrid integration technology with volume holographic grating triplex filter VHGT, surface-illuminated photodetectors and spot-size converted Fabry-Pérot laser diode in SMD package. The hybrid PLC has composed from a two parts-polymer optical waveguide including VHGT filter section and a optoelectronic microwave section. The both parts are placed on the composite substrate.

Diamondlike carbon applications in infrared optics and microelectronics

NASA Technical Reports Server (NTRS)

Woollam, John A.; De, Bhola N.; Orzeszko, S.; Ianno, N. J.; Snyder, Paul G.; Alterovitz, Samuel A.; Pouch, John J.; Wu, R. L. C.; Ingram, D. C.

1990-01-01

The use of diamondlike carbon (DLC) as a protective coating in harsh environments is addressed. There are three topics presented. The first is a description of the preparation of DLC on seven different infrared transmitting materials, and the possibility of using DLC as an antireflecting coating at commonly used wavelengths. DLC doesn't bond easily to all materials, and special techniques for bonding are presented. The second topic deals with how well DLC will protect a substrate from moisture penetration. This is an important aspect in numerous uses of DLC, including both infrared optics and integrated circuits. The third topic is the effect of particulate impact on film performance and integrity.

Long-range surface plasmon polariton detection with a graphene photodetector.

PubMed

Ee, Ho-Seok; No, You-Shin; Kim, Jinhyung; Park, Hong-Gyu; Seo, Min-Kyo

2018-06-15

We present an integration of a single Ag nanowire (NW) with a graphene photodetector and demonstrate an efficient and compact detection of long-range surface plasmon polaritons (SPPs). Atomically thin graphene provides an ideal platform to detect the evanescent electric field of SPPs extremely bound at the interface of the Ag NW and glass substrate. Scanning photocurrent microscopy directly visualizes a polarization-dependent excitation and detects the SPPs. The SPP detection responsivity is readily controlled up to ∼17  mA/W by the drain-source voltage. We believe that the graphene SPP detector will be a promising building block for highly integrated photonic and optoelectronic circuits.

Flexible integrated diode-transistor logic (DTL) driving circuits based on printed carbon nanotube thin film transistors with low operation voltage.

PubMed

Liu, Tingting; Zhao, Jianwen; Xu, Weiwei; Dou, Junyan; Zhao, Xinluo; Deng, Wei; Wei, Changting; Xu, Wenya; Guo, Wenrui; Su, Wenming; Jie, Jiansheng; Cui, Zheng

2018-01-03

Fabrication and application of hybrid functional circuits have become a hot research topic in the field of printed electronics. In this study, a novel flexible diode-transistor logic (DTL) driving circuit is proposed, which was fabricated based on a light emitting diode (LED) integrated with printed high-performance single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs). The LED, which is made of AlGaInP on GaAs, is commercial off-the-shelf, which could generate free electrical charges upon white light illumination. Printed top-gate TFTs were made on a PET substrate by inkjet printing high purity semiconducting SWCNTs (sc-SWCNTs) ink as the semiconductor channel materials, together with printed silver ink as the top-gate electrode and printed poly(pyromellitic dianhydride-co-4,4'-oxydianiline) (PMDA/ODA) as gate dielectric layer. The LED, which is connected to the gate electrode of the TFT, generated electrical charge when illuminated, resulting in biased gate voltage to control the TFT from "ON" status to "OFF" status. The TFTs with a PMDA/ODA gate dielectric exhibited low operating voltages of ±1 V, a small subthreshold swing of 62-105 mV dec -1 and ON/OFF ratio of 10 6 , which enabled DTL driving circuits to have high ON currents, high dark-to-bright current ratios (up to 10 5 ) and good stability under repeated white light illumination. As an application, the flexible DTL driving circuit was connected to external quantum dot LEDs (QLEDs), demonstrating its ability to drive and to control the QLED.

AIN-Coated Al(2)O(3) Substrates For Electronic Circuits

NASA Technical Reports Server (NTRS)

Kolawa, Elzbieta; Lowry, Lynn; Herman, Martin; Lee, Karen

1996-01-01

Type of improved ceramic substrate for high-frequency, high-power electronic circuits combines relatively high thermal conductivity of aluminum nitride with surface smoothness of alumina. Consists of 15-micrometer layer of AIN deposited on highly polished alumina. Used for packaging millimeter-wave gallium arsenide transmitter chips, power silicon chips, and like.

Integration of myocardial scar identified by preoperative delayed contrast-enhanced MRI into a high-resolution mapping system for planning and guidance of VT ablation procedures

NASA Astrophysics Data System (ADS)

Rettmann, M. E.; Suzuki, A.; Wang, S.; Pottinger, N.; Arter, J.; Netzer, A.; Parker, K.; Viker, K.; Packer, D. L.

2017-03-01

Myocardial scarring creates a substrate for reentrant circuits which can lead to ventricular tachycardia. In ventricular catheter ablation therapy, regions of myocardial scarring are targeted to interrupt arrhythmic electrical pathways. Low voltage regions are a surrogate for myocardial scar and are identified by generating an electro anatomic map at the start of the procedure. Recent efforts have focussed on integration of preoperative scar information generated from delayed contrast-enhanced MR imaging to augment intraprocedural information. In this work, we describe an initial feasibility study of integration of a preoperative MRI derived scar maps into a high-resolution mapping system to improve planning and guidance of VT ablation procedures.

High temperature superconducting thin film microwave circuits: Fabrication, characterization, and applications

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Warner, J. D.; Romanofsky, R. R.; Heinen, V. O.; Chorey, C. M.

1990-01-01

Epitaxial YBa2Cu3O7 films were grown on several microwave substrates. Surface resistance and penetration depth measurements were performed to determine the quality of these films. Here the properties of these films on key microwave substrates are described. The fabrication and characterization of a microwave ring resonator circuit to determine transmission line losses are presented. Lower losses than those observed in gold resonator circuits were observed at temperatures lower than critical transition temperature. Based on these results, potential applications of microwave superconducting circuits such as filters, resonators, oscillators, phase shifters, and antenna elements in space communication systems are identified.

High temperature superconducting thin film microwave circuits - Fabrication, characterization, and applications

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Warner, J. D.; Romanofsky, R. R.; Heinen, V. O.; Chorey, C. M.

1990-01-01

Epitaxial YBa2Cu3O7 films were grown on several microwave substrates. Surface resistance and penetration depth measurements were performed to determine the quality of these films. Here, the properties of these films on key microwave substrates are described. The fabrication and characterization of a microwave ring resonator circuit to determine transmission line losses are presented. Lower losses than those observed in gold resonator circuits were observed at temperatures lower than critical transition temperature. Based on these results, potential applications of microwave superconducting circuits such as filters, resonators, oscillators, phase shifters, and antenna elements in space communication systems are identified.

Microelectromechanical pump utilizing porous silicon

DOEpatents

Lantz, Jeffrey W [Albuquerque, NM; Stalford, Harold L [Norman, OK

2011-07-19

A microelectromechanical (MEM) pump is disclosed which includes a porous silicon region sandwiched between an inlet chamber and an outlet chamber. The porous silicon region is formed in a silicon substrate and contains a number of pores extending between the inlet and outlet chambers, with each pore having a cross-section dimension about equal to or smaller than a mean free path of a gas being pumped. A thermal gradient is provided along the length of each pore by a heat source which can be an electrical resistance heater or an integrated circuit (IC). A channel can be formed through the silicon substrate so that inlet and outlet ports can be formed on the same side of the substrate, or so that multiple MEM pumps can be connected in series to form a multi-stage MEM pump. The MEM pump has applications for use in gas-phase MEM chemical analysis systems, and can also be used for passive cooling of ICs.

Method of forming crystalline silicon devices on glass

DOEpatents

McCarthy, A.M.

1995-03-21

A method is disclosed for fabricating single-crystal silicon microelectronic components on a silicon substrate and transferring same to a glass substrate. This is achieved by utilizing conventional silicon processing techniques for fabricating components of electronic circuits and devices on bulk silicon, wherein a bulk silicon surface is prepared with epitaxial layers prior to the conventional processing. The silicon substrate is bonded to a glass substrate and the bulk silicon is removed leaving the components intact on the glass substrate surface. Subsequent standard processing completes the device and circuit manufacturing. This invention is useful in applications requiring a transparent or insulating substrate, particularly for display manufacturing. Other applications include sensors, actuators, optoelectronics, radiation hard electronics, and high temperature electronics. 7 figures.

An Expert System for Design of Plastic Integrated Circuit Packages Against Latent Moisture Induced Defects. Phase II

DTIC Science & Technology

1998-02-01

Attach, Die Attachment Pad, Wine Bond? Substrate, Molding Compound, Leadframe, FWB, Heat Snk& Solder Databases ■ Proprietary •ANSYSLink...34■■ irm -i te5ÄS3wl«(S*i«S «!*!• i"■’.vT-*?-" *’■’ EsMat xvM H6IT«sBltf. Lnjl \\ 4.2.7 PWB ^**S^J[£ **;:■:& / "" (1) Input Px, Py (widths of

Biolithography: Slime mould patterning of polyaniline

NASA Astrophysics Data System (ADS)

Berzina, Tatiana; Dimonte, Alice; Adamatzky, Andrew; Erokhin, Victor; Iannotta, Salvatore

2018-03-01

Slime mould Physarum polycephalum develops intricate patterns of protoplasmic networks when foraging on a non-nutrient substrates. The networks are optimised for spanning larger spaces with minimum body mass and for quick transfer of nutrients and metabolites inside the slime mould's body. We hybridise the slime mould's networks with conductive polymer polyaniline and thus produce micro-patterns of conductive networks. This unconventional lithographic method opens new perspectives in development of living technology devices, biocompatible non-silicon hardware for applications in integrated circuits, bioelectronics, and biosensing.

Exercises in molecular computing.

PubMed

Stojanovic, Milan N; Stefanovic, Darko; Rudchenko, Sergei

2014-06-17

CONSPECTUS: The successes of electronic digital logic have transformed every aspect of human life over the last half-century. The word "computer" now signifies a ubiquitous electronic device, rather than a human occupation. Yet evidently humans, large assemblies of molecules, can compute, and it has been a thrilling challenge to develop smaller, simpler, synthetic assemblies of molecules that can do useful computation. When we say that molecules compute, what we usually mean is that such molecules respond to certain inputs, for example, the presence or absence of other molecules, in a precisely defined but potentially complex fashion. The simplest way for a chemist to think about computing molecules is as sensors that can integrate the presence or absence of multiple analytes into a change in a single reporting property. Here we review several forms of molecular computing developed in our laboratories. When we began our work, combinatorial approaches to using DNA for computing were used to search for solutions to constraint satisfaction problems. We chose to work instead on logic circuits, building bottom-up from units based on catalytic nucleic acids, focusing on DNA secondary structures in the design of individual circuit elements, and reserving the combinatorial opportunities of DNA for the representation of multiple signals propagating in a large circuit. Such circuit design directly corresponds to the intuition about sensors transforming the detection of analytes into reporting properties. While this approach was unusual at the time, it has been adopted since by other groups working on biomolecular computing with different nucleic acid chemistries. We created logic gates by modularly combining deoxyribozymes (DNA-based enzymes cleaving or combining other oligonucleotides), in the role of reporting elements, with stem-loops as input detection elements. For instance, a deoxyribozyme that normally exhibits an oligonucleotide substrate recognition region is modified such that a stem-loop closes onto the substrate recognition region, making it unavailable for the substrate and thus rendering the deoxyribozyme inactive. But a conformational change can then be induced by an input oligonucleotide, complementary to the loop, to open the stem, allow the substrate to bind, and allow its cleavage to proceed, which is eventually reported via fluorescence. In this Account, several designs of this form are reviewed, along with their application in the construction of large circuits that exhibited complex logical and temporal relationships between the inputs and the outputs. Intelligent (in the sense of being capable of nontrivial information processing) theranostic (therapy + diagnostic) applications have always been the ultimate motivation for developing computing (i.e., decision-making) circuits, and we review our experiments with logic-gate elements bound to cell surfaces that evaluate the proximal presence of multiple markers on lymphocytes.

Exercises in Molecular Computing

PubMed Central

2014-01-01

Conspectus The successes of electronic digital logic have transformed every aspect of human life over the last half-century. The word “computer” now signifies a ubiquitous electronic device, rather than a human occupation. Yet evidently humans, large assemblies of molecules, can compute, and it has been a thrilling challenge to develop smaller, simpler, synthetic assemblies of molecules that can do useful computation. When we say that molecules compute, what we usually mean is that such molecules respond to certain inputs, for example, the presence or absence of other molecules, in a precisely defined but potentially complex fashion. The simplest way for a chemist to think about computing molecules is as sensors that can integrate the presence or absence of multiple analytes into a change in a single reporting property. Here we review several forms of molecular computing developed in our laboratories. When we began our work, combinatorial approaches to using DNA for computing were used to search for solutions to constraint satisfaction problems. We chose to work instead on logic circuits, building bottom-up from units based on catalytic nucleic acids, focusing on DNA secondary structures in the design of individual circuit elements, and reserving the combinatorial opportunities of DNA for the representation of multiple signals propagating in a large circuit. Such circuit design directly corresponds to the intuition about sensors transforming the detection of analytes into reporting properties. While this approach was unusual at the time, it has been adopted since by other groups working on biomolecular computing with different nucleic acid chemistries. We created logic gates by modularly combining deoxyribozymes (DNA-based enzymes cleaving or combining other oligonucleotides), in the role of reporting elements, with stem–loops as input detection elements. For instance, a deoxyribozyme that normally exhibits an oligonucleotide substrate recognition region is modified such that a stem–loop closes onto the substrate recognition region, making it unavailable for the substrate and thus rendering the deoxyribozyme inactive. But a conformational change can then be induced by an input oligonucleotide, complementary to the loop, to open the stem, allow the substrate to bind, and allow its cleavage to proceed, which is eventually reported via fluorescence. In this Account, several designs of this form are reviewed, along with their application in the construction of large circuits that exhibited complex logical and temporal relationships between the inputs and the outputs. Intelligent (in the sense of being capable of nontrivial information processing) theranostic (therapy + diagnostic) applications have always been the ultimate motivation for developing computing (i.e., decision-making) circuits, and we review our experiments with logic-gate elements bound to cell surfaces that evaluate the proximal presence of multiple markers on lymphocytes. PMID:24873234

Waveguide Transition for Submillimeter-Wave MMICs

NASA Technical Reports Server (NTRS)

Leong, Kevin M.; Deal, William R.; Radisic, Vesna; Mei, Xiaobing; Uyeda, Jansen; Lai, Richard; Fung, King Man; Gaier, Todd C.

2009-01-01

An integrated waveguide-to-MMIC (monolithic microwave integrated circuit) chip operating in the 300-GHz range is designed to operate well on high-permittivity semiconductor substrates typical for an MMIC amplifier, and allows a wider MMIC substrate to be used, enabling integration with larger MMICs (power amplifiers). The waveguide-to- CBCPW (conductor-backed coplanar waveguide) transition topology is based on an integrated dipole placed in the E-plane of the waveguide module. It demonstrates low loss and good impedance matching. Measurement and simulation demonstrate that the loss of the transition and waveguide loss is less than 1-dB over a 340-to-380-GHz bandwidth. A transition is inserted along the propagation direction of the waveguide. This transition uses a planar dipole aligned with the maximum E-field of the TE10 waveguide mode as an inter face between the waveguide and the MMIC. Mode conversion between the coplanar striplines (CPS) that feed the dipole and the CBCPW transmission line is accomplished using a simple air-bridge structure. The bottom side ground plane is truncated at the same reference as the top-side ground plane, leaving the end of the MMIC suspended in air.

A back-illuminated megapixel CMOS image sensor

NASA Technical Reports Server (NTRS)

Pain, Bedabrata; Cunningham, Thomas; Nikzad, Shouleh; Hoenk, Michael; Jones, Todd; Wrigley, Chris; Hancock, Bruce

2005-01-01

In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

Design and performance of a high-Tc superconductor coplanar waveguide filter

NASA Technical Reports Server (NTRS)

Chew, Wilbert; Riley, A. L.; Rascoe, Daniel L.; Hunt, Brian D.; Foote, Marc C.; Cooley, Thomas W.; Bajuk, Louis J.

1991-01-01

The design of a coplanar waveguide low-pass filter made of YBa2Cu3O(7-delta) (YBCO) on an LaAlO3 substrate is described. Measurements were incorporated into simple models for microwave CAD analysis to develop a final design. The patterned and packaged coplanar waveguide low-pass filter of YBCO, with dimensions suited for integrated circuits, exhibited measured insertion losses when cooled in liquid nitrogen superior to those of a similarly cooled thin-film copper filter throughout the 0 to 9.5 GHz passband. Coplanar waveguide models for use with thin-film normal metal (with thickness either greater or less than the skin depth) and YBCO are discussed and used to compare the losses of the measured YBCO and copper circuits.

Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

DOEpatents

Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

1991-01-01

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

Photonic crystal devices formed by a charged-particle beam

DOEpatents

Lin, Shawn-Yu; Koops, Hans W. P.

2000-01-01

A photonic crystal device and method. The photonic crystal device comprises a substrate with at least one photonic crystal formed thereon by a charged-particle beam deposition method. Each photonic crystal comprises a plurality of spaced elements having a composition different from the substrate, and may further include one or more impurity elements substituted for spaced elements. Embodiments of the present invention may be provided as electromagnetic wave filters, polarizers, resonators, sources, mirrors, beam directors and antennas for use at wavelengths in the range from about 0.2 to 200 microns or longer. Additionally, photonic crystal devices may be provided with one or more electromagnetic waveguides adjacent to a photonic crystal for forming integrated electromagnetic circuits for use at optical, infrared, or millimeter-wave frequencies.

MEMS switches having non-metallic crossbeams

NASA Technical Reports Server (NTRS)

Scardelletti, Maximillian C (Inventor)

2009-01-01

A RF MEMS switch comprising a crossbeam of SiC, supported by at least one leg above a substrate and above a plurality of transmission lines forming a CPW. Bias is provided by at least one layer of metal disposed on a top surface of the SiC crossbeam, such as a layer of chromium followed by a layer of gold, and extending beyond the switch to a biasing pad on the substrate. The switch utilizes stress and conductivity-controlled non-metallic thin cantilevers or bridges, thereby improving the RF characteristics and operational reliability of the switch. The switch can be fabricated with conventional silicon integrated circuit (IC) processing techniques. The design of the switch is very versatile and can be implemented in many transmission line mediums.

Performance of epitaxial back surface field cells

NASA Technical Reports Server (NTRS)

Brandhorst, H. W., Jr.; Baraona, C. R.; Swartz, C. K.

1973-01-01

Epitaxial back surface field structures were formed by depositing a 10 micron thick 10 Omega-cm epitaxial silicon layer onto substrates with resistivities of 0.01, 0.1, 1.0 and 10 Omega-cm. A correlation between cell open-circuit voltage and substrate resistivity was observed and was compared to theory. The cells were also irradiated with 1 MeV electrons to a fluence of 5 X 10 to the 15th power e/cm2. The decrease of cell open-circuit voltage was in excellent agreement with theoretical predictions and the measured short circuit currents were within 2% of the prediction. Calculations are presented of optimum cell performance as functions of epitaxial layer thickness, radiation fluence and substrate diffusion length.

670-GHz Schottky Diode-Based Subharmonic Mixer with CPW Circuits and 70-GHz IF

NASA Technical Reports Server (NTRS)

Chattopadhyay, Goutam; Schlecht, Erich T.; Lee, Choonsup; Lin, Robert H.; Gill, John J.; Mehdi, Imran; Sin, Seth; Deal, William; Loi, Kwok K.; Nam, Peta;

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, W.L.; Vanheusden, K.J.R.; Schwank, J.R.; Fleetwood, D.M.; Shaneyfelt, M.R.; Winokur, P.S.; Devine, R.A.B.

1998-07-28

A method is disclosed for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer. 5 figs.

Three-dimensional integrated circuits for lab-on-chip dielectrophoresis of nanometer scale particles

NASA Astrophysics Data System (ADS)

Dickerson, Samuel J.; Noyola, Arnaldo J.; Levitan, Steven P.; Chiarulli, Donald M.

2007-01-01

In this paper, we present a mixed-technology micro-system for electronically manipulating and optically detecting virusscale particles in fluids that is designed using 3D integrated circuit technology. During the 3D fabrication process, the top-most chip tier is assembled upside down and the substrate material is removed. This places the polysilicon layer, which is used to create geometries with the process' minimum feature size, in close proximity to a fluid channel etched into the top of the stack. By taking advantage of these processing features inherent to "3D chip-stacking" technology, we create electrode arrays that have a gap spacing of 270 nm. Using 3D CMOS technology also provides the ability to densely integrate analog and digital control circuitry for the electrodes by using the additional levels of the chip stack. We show simulations of the system with a physical model of a Kaposi's sarcoma-associated herpes virus, which has a radius of approximately 125 nm, being dielectrophoretically arranged into striped patterns. We also discuss how these striped patterns of trapped nanometer scale particles create an effective diffraction grating which can then be sensed with macro-scale optical techniques.

3-Axis Fully-Integrated Capacitive Tactile Sensor with Flip-Bonded CMOS on LTCC Interposer.

PubMed

Asano, Sho; Muroyama, Masanori; Nakayama, Takahiro; Hata, Yoshiyuki; Nonomura, Yutaka; Tanaka, Shuji

2017-10-25

This paper reports a 3-axis fully integrated differential capacitive tactile sensor surface-mountable on a bus line. The sensor integrates a flip-bonded complementary metal-oxide semiconductor (CMOS) with capacitive sensing circuits on a low temperature cofired ceramic (LTCC) interposer with Au through vias by Au-Au thermo-compression bonding. The CMOS circuit and bonding pads on the sensor backside were electrically connected through Au bumps and the LTCC interposer, and the differential capacitive gap was formed by an Au sealing frame. A diaphragm for sensing 3-axis force was formed in the CMOS substrate. The dimensions of the completed sensor are 2.5 mm in width, 2.5 mm in length, and 0.66 mm in thickness. The fabricated sensor output coded 3-axis capacitive sensing data according to applied 3-axis force by three-dimensional (3D)-printed pins. The measured sensitivity was as high as over 34 Count/mN for normal force and 14 to 15 Count/mN for shear force with small noise, which corresponds to less than 1 mN. The hysteresis and the average cross-sensitivity were also found to be less than 2% full scale and 11%, respectively.

3-Axis Fully-Integrated Capacitive Tactile Sensor with Flip-Bonded CMOS on LTCC Interposer †

PubMed Central

Asano, Sho; Nakayama, Takahiro; Hata, Yoshiyuki; Tanaka, Shuji

2017-01-01

This paper reports a 3-axis fully integrated differential capacitive tactile sensor surface-mountable on a bus line. The sensor integrates a flip-bonded complementary metal-oxide semiconductor (CMOS) with capacitive sensing circuits on a low temperature cofired ceramic (LTCC) interposer with Au through vias by Au-Au thermo-compression bonding. The CMOS circuit and bonding pads on the sensor backside were electrically connected through Au bumps and the LTCC interposer, and the differential capacitive gap was formed by an Au sealing frame. A diaphragm for sensing 3-axis force was formed in the CMOS substrate. The dimensions of the completed sensor are 2.5 mm in width, 2.5 mm in length, and 0.66 mm in thickness. The fabricated sensor output coded 3-axis capacitive sensing data according to applied 3-axis force by three-dimensional (3D)-printed pins. The measured sensitivity was as high as over 34 Count/mN for normal force and 14 to 15 Count/mN for shear force with small noise, which corresponds to less than 1 mN. The hysteresis and the average cross-sensitivity were also found to be less than 2% full scale and 11%, respectively. PMID:29068429

Low-noise heterodyne receiver for electron cyclotron emission imaging and microwave imaging reflectometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tobias, B., E-mail: bjtobias@pppl.gov; Domier, C. W.; Luhmann, N. C.

2016-11-15

The critical component enabling electron cyclotron emission imaging (ECEI) and microwave imaging reflectometry (MIR) to resolve 2D and 3D electron temperature and density perturbations is the heterodyne imaging array that collects and downconverts radiated emission and/or reflected signals (50–150 GHz) to an intermediate frequency (IF) band (e.g. 0.1–18 GHz) that can be transmitted by a shielded coaxial cable for further filtering and detection. New circuitry has been developed for this task, integrating gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs) mounted on a liquid crystal polymer (LCP) substrate. The improved topology significantly increases electromagnetic shielding from out-of-band interference, leads tomore » 10× improvement in the signal-to-noise ratio, and dramatic cost savings through integration. The current design, optimized for reflectometry and edge radiometry on mid-sized tokamaks, has demonstrated >20 dB conversion gain in upper V-band (60-75 GHz). Implementation of the circuit in a multi-channel electron cyclotron emission imaging (ECEI) array will improve the diagnosis of edge-localized modes and fluctuations of the high-confinement, or H-mode, pedestal.« less

Low-noise heterodyne receiver for electron cyclotron emission imaging and microwave imaging reflectometry

DOE PAGES

Tobias, B.; Domier, C. W.; Luhmann, Jr., N. C.; ...

2016-07-25

The critical component enabling electron cyclotron emission imaging (ECEI) and microwave imaging reflectometry (MIR) to resolve 2D and 3D electron temperature and density perturbations is the heterodyne imaging array that collects and downconverts radiated emission and/or reflected signals (50-150 GHz) to an intermediate frequency (IF) band (e.g. 0.1-18 GHz) that can be transmitted by a shielded coaxial cable for further filtering and detection. New circuitry has been developed for this task, integrating gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs) mounted on a liquid crystal polymer (LCP) substrate. The improved topology significantly increases electromagnetic shielding from out-of-band interference, leads tomore » 10x improvement in the signal-to-noise ratio, and dramatic cost savings through integration. The current design, optimized for reflectometry and edge radiometry on mid-sized tokamaks, has demonstrated >20 dB conversion gain in upper V-band (60-75 GHz). As a result, implementation of the circuit in a multi-channel electron cyclotron emission imaging (ECEI) array will improve the diagnosis of edge-localized modes and fluctuations of the high-confinement, or H-mode, pedestal.« less

Super low threshold plasmonic WGM lasing from an individual ZnO hexagonal microrod on an Au substrate for plasmon lasers.

PubMed

Dong, H M; Yang, Y H; Yang, G W

2015-03-05

We demonstrate an individual ZnO hexagonal microrod on the surface of an Au substrate which can become new sources for manufacturing miniature ZnO plasmon lasers by surface plasmon polariton coupling to whispering-gallery modes (WGMs). We also demonstrate that the rough surface of Au substrates can acquire a more satisfied enhancement of ZnO emission if the surface geometry of Au substrates is appropriate. Furthermore, we achieve high Q factor and super low threshold plasmonic WGM lasing from an individual ZnO hexagonal microrod on the surface of the Au substrate, in which Q factor can reach 5790 and threshold is 0.45 KW/cm(2) which is the lowest value reported to date for ZnO nanostructures lasing, at least 10 times smaller than that of ZnO at the nanometer. Electron transfer mechanisms are proposed to understand the physical origin of quenching and enhancement of ZnO emission on the surface of Au substrates. These investigations show that this novel coupling mode holds a great potential of ZnO hexagonal micro- and nanorods for data storage, bio-sensing, optical communications as well as all-optic integrated circuits.

Micromechanical die attachment surcharge

DOEpatents

Filter, William F.; Hohimer, John P.

2002-01-01

An attachment structure is disclosed for attaching a die to a supporting substrate without the use of adhesives or solder. The attachment structure, which can be formed by micromachining, functions purely mechanically in utilizing a plurality of shaped pillars (e.g. round, square or polygonal and solid, hollow or slotted) that are formed on one of the die or supporting substrate and which can be urged into contact with various types of mating structures including other pillars, a deformable layer or a plurality of receptacles that are formed on the other of the die or supporting substrate, thereby forming a friction bond that holds the die to the supporting substrate. The attachment structure can further include an alignment structure for precise positioning of the die and supporting substrate to facilitate mounting the die to the supporting substrate. The attachment structure has applications for mounting semiconductor die containing a microelectromechanical (MEM) device, a microsensor or an integrated circuit (IC), and can be used to form a multichip module. The attachment structure is particularly useful for mounting die containing released MEM devices since these devices are fragile and can otherwise be damaged or degraded by adhesive or solder mounting.

Lhx6 delineates a pathway mediating innate reproductive behaviors from the amygdala to the hypothalamus.

PubMed

Choi, Gloria B; Dong, Hong-Wei; Murphy, Andrew J; Valenzuela, David M; Yancopoulos, George D; Swanson, Larry W; Anderson, David J

2005-05-19

In mammals, innate reproductive and defensive behaviors are mediated by anatomically segregated connections between the amygdala and hypothalamus. This anatomic segregation poses the problem of how the brain integrates activity in these circuits when faced with conflicting stimuli eliciting such mutually exclusive behaviors. Using genetically encoded and conventional axonal tracers, we have found that the transcription factor Lhx6 delineates the reproductive branch of this pathway. Other Lhx proteins mark neurons in amygdalar nuclei implicated in defense. We have traced parallel projections from the posterior medial amygdala, activated by reproductive or defensive olfactory stimuli, respectively, to a point of convergence in the ventromedial hypothalamus. The opposite neurotransmitter phenotypes of these convergent projections suggest a "gate control" mechanism for the inhibition of reproductive behaviors by threatening stimuli. Our data therefore identify a potential neural substrate for integrating the influences of conflicting behavioral cues and a transcription factor family that may contribute to the development of this substrate.

Ultra-Thin Monocrystalline Silicon Solar Cell with 12.2% Efficiency Using Silicon-On-Insulator Substrate.

PubMed

Bian, Jian-Tao; Yu, Jian; Duan, Wei-Yuan; Qiu, Yu

2015-04-01

Single side heterojunction silicon solar cells were designed and fabricated using Silicon-On-Insulator (SOI) substrate. The TCAD software was used to simulate the effect of silicon layer thickness, doping concentration and the series resistance. A 10.5 µm thick monocrystalline silicon layer was epitaxially grown on the SOI with boron doping concentration of 2 x 10(16) cm(-3) by thermal CVD. Very high Voc of 678 mV was achieved by applying amorphous silicon heterojunction emitter on the front surface. The single cell efficiency of 12.2% was achieved without any light trapping structures. The rear surface recombination and the series resistance are the main limiting factors for the cell efficiency in addition to the c-Si thickness. By integrating an efficient light trapping scheme and further optimizing fabrication process, higher efficiency of 14.0% is expected for this type of cells. It can be applied to integrated circuits on a monolithic chip to meet the requirements of energy autonomous systems.

Natural printed silk substrate circuit fabricated via surface modification using one step thermal transfer and reduction graphene oxide

NASA Astrophysics Data System (ADS)

Cao, Jiliang; Huang, Zhan; Wang, Chaoxia

2018-05-01

Graphene conductive silk substrate is a preferred material because of its biocompatibility, flexibility and comfort. A flexible natural printed silk substrate circuit was fabricated by one step transfer of graphene oxide (GO) paste from transfer paper to the surface of silk fabric and reduction of the GO to reduced graphene oxide (RGO) using a simple hot press treatment. The GO paste was obtained through ultrasonic stirring exfoliation under low temperature, and presented excellent printing rheological properties at high concentration. The silk fabric was obtained a surface electric resistance as low as 12.15 KΩ cm-1, in the concentration of GO 50 g L-1 and hot press at 220 °C for 120 s. Though the whiteness and strength decreased with the increasing of hot press temperature and time slowly, the electric conductivity of RGO surface modification silk substrate improved obviously. The surface electric resistance of RGO/silk fabrics increased from 12.15 KΩ cm-1 to 18.05 KΩ cm-1, 28.54 KΩ cm-1 and 32.53 KΩ cm-1 after 10, 20 and 30 washing cycles, respectively. The results showed that the printed silk substrate circuit has excellent washability. This process requires no chemical reductant, and the reduction efficiency and reduction degree of GO is high. This time-effective and environmentally-friendly one step thermal transfer and reduction graphene oxide onto natural silk substrate method can be easily used to production of reduced graphene oxide (RGO) based flexible printed circuit.

Graphene-Based Integrated Photovoltaic Energy Harvesting/Storage Device.

PubMed

Chien, Chih-Tao; Hiralal, Pritesh; Wang, Di-Yan; Huang, I-Sheng; Chen, Chia-Chun; Chen, Chun-Wei; Amaratunga, Gehan A J

2015-06-24

Energy scavenging has become a fundamental part of ubiquitous sensor networks. Of all the scavenging technologies, solar has the highest power density available. However, the energy source is erratic. Integrating energy conversion and storage devices is a viable route to obtain self-powered electronic systems which have long-term maintenance-free operation. In this work, we demonstrate an integrated-power-sheet, consisting of a string of series connected organic photovoltaic cells (OPCs) and graphene supercapacitors on a single substrate, using graphene as a common platform. This results in lighter and more flexible power packs. Graphene is used in different forms and qualities for different functions. Chemical vapor deposition grown high quality graphene is used as a transparent conductor, while solution exfoliated graphene pastes are used as supercapacitor electrodes. Solution-based coating techniques are used to deposit the separate components onto a single substrate, making the process compatible with roll-to-roll manufacture. Eight series connected OPCs based on poly(3-hexylthiophene)(P3HT):phenyl-C61-butyric acid methyl ester (PC60 BM) bulk-heterojunction cells with aluminum electrodes, resulting in a ≈5 V open-circuit voltage, provide the energy harvesting capability. Supercapacitors based on graphene ink with ≈2.5 mF cm(-2) capacitance provide the energy storage capability. The integrated-power-sheet with photovoltaic (PV) energy harvesting and storage functions had a mass of 0.35 g plus the substrate. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Soldering Tool for Integrated Circuits

NASA Technical Reports Server (NTRS)

Takahashi, Ted H.

1987-01-01

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Probing photo-carrier collection efficiencies of individual silicon nanowire diodes on a wafer substrate.

PubMed

Schmitt, S W; Brönstrup, G; Shalev, G; Srivastava, S K; Bashouti, M Y; Döhler, G H; Christiansen, S H

2014-07-21

Vertically aligned silicon nanowire (SiNW) diodes are promising candidates for the integration into various opto-electronic device concepts for e.g. sensing or solar energy conversion. Individual SiNW p-n diodes have intensively been studied, but to date an assessment of their device performance once integrated on a silicon substrate has not been made. We show that using a scanning electron microscope (SEM) equipped with a nano-manipulator and an optical fiber feed-through for tunable (wavelength, power using a tunable laser source) sample illumination, the dark and illuminated current-voltage (I-V) curve of individual SiNW diodes on the substrate wafer can be measured. Surprisingly, the I-V-curve of the serially coupled system composed of SiNW/wafers is accurately described by an equivalent circuit model of a single diode and diode parameters like series and shunting resistivity, diode ideality factor and photocurrent can be retrieved from a fit. We show that the photo-carrier collection efficiency (PCE) of the integrated diode illuminated with variable wavelength and intensity light directly gives insight into the quality of the device design at the nanoscale. We find that the PCE decreases for high light intensities and photocurrent densities, due to the fact that considerable amounts of photo-excited carriers generated within the substrate lead to a decrease in shunting resistivity of the SiNW diode and deteriorate its rectification. The PCE decreases systematically for smaller wavelengths of visible light, showing the possibility of monitoring the effectiveness of the SiNW device surface passivation using the shown measurement technique. The integrated device was pre-characterized using secondary ion mass spectrometry (SIMS), TCAD simulations and electron beam induced current (EBIC) measurements to validate the properties of the characterized material at the single SiNW diode level.

Scalable Manufacturing of Solderable and Stretchable Physiologic Sensing Systems.

PubMed

Kim, Yun-Soung; Lu, Jesse; Shih, Benjamin; Gharibans, Armen; Zou, Zhanan; Matsuno, Kristen; Aguilera, Roman; Han, Yoonjae; Meek, Ann; Xiao, Jianliang; Tolley, Michael T; Coleman, Todd P

2017-10-01

Methods for microfabrication of solderable and stretchable sensing systems (S4s) and a scaled production of adhesive-integrated active S4s for health monitoring are presented. S4s' excellent solderability is achieved by the sputter-deposited nickel-vanadium and gold pad metal layers and copper interconnection. The donor substrate, which is modified with "PI islands" to become selectively adhesive for the S4s, allows the heterogeneous devices to be integrated with large-area adhesives for packaging. The feasibility for S4-based health monitoring is demonstrated by developing an S4 integrated with a strain gauge and an onboard optical indication circuit. Owing to S4s' compatibility with the standard printed circuit board assembly processes, a variety of commercially available surface mount chip components, such as the wafer level chip scale packages, chip resistors, and light-emitting diodes, can be reflow-soldered onto S4s without modifications, demonstrating the versatile and modular nature of S4s. Tegaderm-integrated S4 respiration sensors are tested for robustness for cyclic deformation, maximum stretchability, durability, and biocompatibility for multiday wear time. The results of the tests and demonstration of the respiration sensing indicate that the adhesive-integrated S4s can provide end users a way for unobtrusive health monitoring. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Studies of silicon p-n junction solar cells. [open circuit photovoltage

NASA Technical Reports Server (NTRS)

Lindholm, F. A.

1976-01-01

Single crystal silicon p-n junction solar cells made with low resistivity substrates show poorer solar energy conversion efficiency than traditional theory predicts. The physical mechanisms responsible for this discrepancy are identified and characterized. The open circuit voltage in shallow junction cells of about 0.1 ohm/cm substrate resistivity is investigated under AMO (one sun) conditions.

Demonstration of glass-based photonic interposer for mid-board-optical engines and electrical-optical circuit board (EOCB) integration strategy

NASA Astrophysics Data System (ADS)

Schröder, H.; Neitz, M.; Schneider-Ramelow, M.

2018-02-01

Due to its optical transparency and superior dielectric properties glass is regarded as a promising candidate for advanced applications as active photonic interposer for mid-board-optics and optical PCB waveguide integration. The concepts for multi-mode and single-mode photonic system integration are discussed and related demonstration project results will be presented. A hybrid integrated photonic glass body interposer with integrated optical lenses for multi-mode data communication wavelength of 850 nm have been realized. The paper summarizes process developments which allow cost efficient metallization of TGV. Electro-optical elements like photodiodes and VCSELs can be directly flip-chip mounted on the glass substrate according to the desired lens positions. Furthermore results for a silicon photonic based single-mode active interposer integration onto a single mode glass made EOCB will be compared in terms of packaging challenges. The board level integration strategy for both of these technological approaches and general next generation board level integration concepts for photonic interposer will be introductorily discussed.

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

NASA Astrophysics Data System (ADS)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

A high-speed, tunable silicon photonic ring modulator integrated with ultra-efficient active wavelength control.

PubMed

Zheng, Xuezhe; Chang, Eric; Amberg, Philip; Shubin, Ivan; Lexau, Jon; Liu, Frankie; Thacker, Hiren; Djordjevic, Stevan S; Lin, Shiyun; Luo, Ying; Yao, Jin; Lee, Jin-Hyoung; Raj, Kannan; Ho, Ron; Cunningham, John E; Krishnamoorthy, Ashok V

2014-05-19

We report the first complete 10G silicon photonic ring modulator with integrated ultra-efficient CMOS driver and closed-loop wavelength control. A selective substrate removal technique was used to improve the ring tuning efficiency. Limited by the thermal tuner driver output power, a maximum open-loop tuning range of about 4.5nm was measured with about 14mW of total tuning power including the heater driver circuit power consumption. Stable wavelength locking was achieved with a low-power mixed-signal closed-loop wavelength controller. An active wavelength tracking range of > 500GHz was demonstrated with controller energy cost of only 20fJ/bit.

System on a Chip (SoC) Overview

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.

2010-01-01

System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

THz-circuits driven by photo-thermoelectric, gate-tunable graphene-junctions

NASA Astrophysics Data System (ADS)

Brenneis, Andreas; Schade, Felix; Drieschner, Simon; Heimbach, Florian; Karl, Helmut; Garrido, Jose A.; Holleitner, Alexander W.

2016-10-01

For future on-chip communication schemes, it is essential to integrate nanoscale materials with an ultrafast optoelectronic functionality into high-frequency circuits. The atomically thin graphene has been widely demonstrated to be suitable for photovoltaic and optoelectronic devices because of its broadband optical absorption and its high electron mobility. Moreover, the ultrafast relaxation of photogenerated charge carriers has been verified in graphene. Here, we show that dual-gated graphene junctions can be functional parts of THz-circuits. As the underlying optoelectronic process, we exploit ultrafast photo-thermoelectric currents. We describe an immediate photo-thermoelectric current of the unbiased device following a femtosecond laser excitation. For a picosecond time-scale after the optical excitation, an additional photo-thermoelectric contribution shows up, which exhibits the fingerprint of a spatially inverted temperature profile. The latter can be understood by the different time-constants and thermal coupling mechanisms of the electron and phonon baths within graphene to the substrate and the metal contacts. The interplay of the processes gives rise to ultrafast electromagnetic transients in high-frequency circuits, and it is equally important for a fundamental understanding of graphene-based ultrafast photodetectors and switches.

THz-circuits driven by photo-thermoelectric, gate-tunable graphene-junctions

PubMed Central

Brenneis, Andreas; Schade, Felix; Drieschner, Simon; Heimbach, Florian; Karl, Helmut; Garrido, Jose A.; Holleitner, Alexander W.

2016-01-01

For future on-chip communication schemes, it is essential to integrate nanoscale materials with an ultrafast optoelectronic functionality into high-frequency circuits. The atomically thin graphene has been widely demonstrated to be suitable for photovoltaic and optoelectronic devices because of its broadband optical absorption and its high electron mobility. Moreover, the ultrafast relaxation of photogenerated charge carriers has been verified in graphene. Here, we show that dual-gated graphene junctions can be functional parts of THz-circuits. As the underlying optoelectronic process, we exploit ultrafast photo-thermoelectric currents. We describe an immediate photo-thermoelectric current of the unbiased device following a femtosecond laser excitation. For a picosecond time-scale after the optical excitation, an additional photo-thermoelectric contribution shows up, which exhibits the fingerprint of a spatially inverted temperature profile. The latter can be understood by the different time-constants and thermal coupling mechanisms of the electron and phonon baths within graphene to the substrate and the metal contacts. The interplay of the processes gives rise to ultrafast electromagnetic transients in high-frequency circuits, and it is equally important for a fundamental understanding of graphene-based ultrafast photodetectors and switches. PMID:27762291

THz-circuits driven by photo-thermoelectric, gate-tunable graphene-junctions.

PubMed

Brenneis, Andreas; Schade, Felix; Drieschner, Simon; Heimbach, Florian; Karl, Helmut; Garrido, Jose A; Holleitner, Alexander W

2016-10-20

For future on-chip communication schemes, it is essential to integrate nanoscale materials with an ultrafast optoelectronic functionality into high-frequency circuits. The atomically thin graphene has been widely demonstrated to be suitable for photovoltaic and optoelectronic devices because of its broadband optical absorption and its high electron mobility. Moreover, the ultrafast relaxation of photogenerated charge carriers has been verified in graphene. Here, we show that dual-gated graphene junctions can be functional parts of THz-circuits. As the underlying optoelectronic process, we exploit ultrafast photo-thermoelectric currents. We describe an immediate photo-thermoelectric current of the unbiased device following a femtosecond laser excitation. For a picosecond time-scale after the optical excitation, an additional photo-thermoelectric contribution shows up, which exhibits the fingerprint of a spatially inverted temperature profile. The latter can be understood by the different time-constants and thermal coupling mechanisms of the electron and phonon baths within graphene to the substrate and the metal contacts. The interplay of the processes gives rise to ultrafast electromagnetic transients in high-frequency circuits, and it is equally important for a fundamental understanding of graphene-based ultrafast photodetectors and switches.

Characterization of embroidered inductors

NASA Astrophysics Data System (ADS)

Roh, Jung-Sim; Chi, Yong-Seung; Lee, Jae-Hee; Nam, Sangwook; Kang, Tae Jin

2010-11-01

As the demand for wearable intelligent textile systems continues to expand, it is now essential to achieve a high-level of electronic circuit integration into textiles. By applying a commercial yarn manufacturing technique and a computer numerical control (CNC) embroidery process, metal composite embroidery yarns (MCEYs) comprised of three strands of fine metal filaments and polyester filaments, and embroidered circuits have been successfully produced. Using MCEYs, circular and square spiral inductors were embroidered on a textile substrate. Their inductive characteristics, i.e. inductance, self-resonance frequency, and quality factor, were investigated under three different environments, i.e. in free space, on a human body, and with a metal fabric ground. Their inductive characteristics could be easily modified by adjusting the circuit design. The validity of the MCEY inductors was demonstrated with Wheeler's formula and design equations for the MCEY inductors were proposed. When in contact with the human body, the self-resonance frequency of the circuit decreased but the inductance was not affected. Although the inductance and maximum quality factor decreased with a metal ground, the inductor gave a stable performance irrespective of the environment. The results also suggest that MCEY embroidery is a simple and eco-friendly process for producing flexible, light-weight, wearable circuitries in various designs.

Development of Minimally Invasive Medical Tools Using Laser Processing on Cylindrical Substrates

NASA Astrophysics Data System (ADS)

Haga, Yoichi; Muyari, Yuta; Goto, Shoji; Matsunaga, Tadao; Esashi, Masayoshi

This paper reports micro-fabrication techniques using laser processing on cylindrical substrates for the realization of high-performance multifunctional minimally invasive medical tools with small sizes. A spring-shaped shape memory alloy (SMA) micro-coil with a square cross section has been fabricated by spiral cutting of a Ti-Ni SMA tube with a femtosecond laser. Small diameter active bending catheter which is actuated by hydraulic suction mechanism for intravascular minimally invasive diagnostics and therapy has also been developed. The catheter is made of a Ti-Ni super elastic alloy (SEA) tube which is processed by laser micromachining and a silicone rubber tube which covers the outside of the SEA tube. The active catheter is effective for insertion in branch of blood vessel which diverse in acute angle which is difficult to proceed. Multilayer metallization and patterning have been performed on glass tubes with 2 and 3 mm external diameters using maskless lithography techniques using a laser exposure system. Using laser soldering technique, a integrated circuit parts have been mounted on a multilayer circuit patterned on a glass tube. These fabrication techniques will effective for realization of high-performance multifunctional catheters, endoscopic tools, and implanted small capsules.

Nanopattern-guided growth of single-crystal silicon on amorphous substrates and high-performance sub-100 nm thin-film transistors for three-dimensional integrated circuits

NASA Astrophysics Data System (ADS)

Gu, Jian

This thesis explores how nanopatterns can be used to control the growth of single-crystal silicon on amorphous substrates at low temperature, with potential applications on flat panel liquid-crystal display and 3-dimensional (3D) integrated circuits. I first present excimer laser annealing of amorphous silicon (a-Si) nanostructures on thermally oxidized silicon wafer for controlled formation of single-crystal silicon islands. Preferential nucleation at pattern center is observed due to substrate enhanced edge heating. Single-grain silicon is obtained in a 50 nm x 100 nm rectangular pattern by super lateral growth (SLG). Narrow lines (such as 20-nm-wide) can serve as artificial heterogeneous nucleation sites during crystallization of large patterns, which could lead to the formation of single-crystal silicon islands in a controlled fashion. In addition to eximer laser annealing, NanoPAtterning and nickel-induced lateral C&barbelow;rystallization (NanoPAC) of a-Si lines is presented. Single-crystal silicon is achieved by NanoPAC. The line width of a-Si affects the grain structure of crystallized silicon lines significantly. Statistics show that single-crystal silicon is formed for all lines with width between 50 nm to 200 nm. Using in situ transmission electron microscopy (TEM), nickel-induced lateral crystallization (Ni-ILC) of a-Si inside a pattern is revealed; lithography-constrained single seeding (LISS) is proposed to explain the single-crystal formation. Intragrain line and two-dimensional defects are also studied. To test the electrical properties of NanoPAC silicon films, sub-100 nm thin-film transistors (TFTs) are fabricated using Patten-controlled crystallization of Ṯhin a-Si channel layer and H&barbelow;igh temperature (850°C) annealing, coined PaTH process. PaTH TFTs show excellent device performance over traditional solid phase crystallized (SPC) TFTs in terms of threshold voltage, threshold voltage roll-off, leakage current, subthreshold swing, on/off current ratio, device-to-device uniformity etc. Two-dimensional device simulations show that PaTH TFTs are comparable to silicon-on-insulator (SOI) devices, making it a promising candidate for the fabrication of future high performance, low-power 3D integrated circuits. Finally, an ultrafast nanolithography technique, laser-assisted direct imprint (LADI) is introduced. LADI shows the ability of patterning nanostructures directly in silicon in nanoseconds with sub-10 nm resolution. The process has potential applications in multiple disciplines, and could be extended to other materials and processes.

Fully integrated carbon nanotube composite thin film strain sensors on flexible substrates for structural health monitoring

NASA Astrophysics Data System (ADS)

Burton, A. R.; Lynch, J. P.; Kurata, M.; Law, K. H.

2017-09-01

Multifunctional thin film materials have opened many opportunities for novel sensing strategies for structural health monitoring. While past work has established methods of optimizing multifunctional materials to exhibit sensing properties, comparatively less work has focused on their integration into fully functional sensing systems capable of being deployed in the field. This study focuses on the advancement of a scalable fabrication process for the integration of multifunctional thin films into a fully integrated sensing system. This is achieved through the development of an optimized fabrication process that can create a broad range of sensing systems using multifunctional materials. A layer-by-layer deposited multifunctional composite consisting of single walled carbon nanotubes (SWNT) in a polyvinyl alcohol and polysodium-4-styrene sulfonate matrix are incorporated with a lithography process to produce a fully integrated sensing system deposited on a flexible substrate. To illustrate the process, a strain sensing platform consisting of a patterned SWNT-composite thin film as a strain-sensitive element within an amplified Wheatstone bridge sensing circuit is presented. Strain sensing is selected because it presents many of the design and processing challenges that are core to patterning multifunctional thin film materials into sensing systems. Strain sensors fabricated on a flexible polyimide substrate are experimentally tested under cyclic loading using standard four-point bending coupons and a partial-scale steel frame assembly under lateral loading. The study reveals the material process is highly repeatable to produce fully integrated strain sensors with linearity and sensitivity exceeding 0.99 and 5 {{V}}/{ε }, respectively. The thin film strain sensors are robust and are capable of high strain measurements beyond 3000 μ {ε }.

19 CFR 10.14 - Fabricated components subject to the exemption.

Code of Federal Regulations, 2010 CFR

2010-04-01

... assembled, such as transistors, diodes, integrated circuits, machinery parts, or precut parts of wearing..., or integrated circuit wafers containing individual integrated circuit dice which have been scribed or... resulted in a substantial transformation of the foreign copper ingots. Example 2. An integrated circuit...

Water Activated Graphene Oxide Transfer Using Wax Printed Membranes for Fast Patterning of a Touch Sensitive Device.

PubMed

Baptista-Pires, Luis; Mayorga-Martínez, Carmen C; Medina-Sánchez, Mariana; Montón, Helena; Merkoçi, Arben

2016-01-26

We demonstrate a graphene oxide printing technology using wax printed membranes for the fast patterning and water activation transfer using pressure based mechanisms. The wax printed membranes have 50 μm resolution, longtime stability and infinite shaping capability. The use of these membranes complemented with the vacuum filtration of graphene oxide provides the control over the thickness. Our demonstration provides a solvent free methodology for printing graphene oxide devices in all shapes and all substrates using the roll-to-roll automatized mechanism present in the wax printing machine. Graphene oxide was transferred over a wide variety of substrates as textile or PET in between others. Finally, we developed a touch switch sensing device integrated in a LED electronic circuit.

Precise Placement of Metallic Nanowires on a Substrate by Localized Electric Fields and Inter-Nanowire Electrostatic Interaction

PubMed Central

2017-01-01

Placing nanowires at the predetermined locations on a substrate represents one of the significant hurdles to be tackled for realization of heterogeneous nanowire systems. Here, we demonstrate spatially-controlled assembly of a single nanowire at the photolithographically recessed region at the electrode gap with high integration yield (~90%). Two popular routes, such as protruding electrode tips and recessed wells, for spatially-controlled nanowire alignment, are compared to investigate long-range dielectrophoretic nanowire attraction and short-range nanowire-nanowire electrostatic interaction for determining the final alignment of attracted nanowires. Furthermore, the post-assembly process has been developed and tested to make a robust electrical contact to the assembled nanowires, which removes any misaligned ones and connects the nanowires to the underlying electrodes of circuit. PMID:29048363

PDSOI and Radiation Effects: An Overview

NASA Technical Reports Server (NTRS)

Forgione, Joshua B.

2005-01-01

Bulk silicon substrates are a common characteristic of nearly all commercial, Complementary Metal-Oxide-Semiconductor (CMOS), integrated circuits. These devices operate well on Earth, but are not so well received in the space environment. An alternative to bulk CMOS is the Silicon-On-Insulator (SOI), in which a &electric isolates the device layer from the substrate. SO1 behavior in the space environment has certain inherent advantages over bulk, a primary factor in its long-time appeal to space-flight IC designers. The discussion will investigate the behavior of the Partially-Depleted SO1 (PDSOI) device with respect to some of the more common space radiation effects: Total Ionized Dose (TID), Single-Event Upsets (SEUs), and Single-Event Latchup (SEL). Test and simulation results from the literature, bulk and epitaxial comparisons facilitate reinforcement of PDSOI radiation characteristics.

Microwave evaluation of electromigration susceptibility in advanced interconnects

NASA Astrophysics Data System (ADS)

Sunday, Christopher E.; Veksler, Dmitry; Cheung, Kin C.; Obeng, Yaw S.

2017-11-01

Traditional metrology has been unable to adequately address the needs of the emerging integrated circuits (ICs) at the nano scale; thus, new metrology and techniques are needed. For example, the reliability challenges in fabrication need to be well understood and controlled to facilitate mass production of through-substrate-via (TSV) enabled three-dimensional integrated circuits (3D-ICs). This requires new approaches to the metrology. In this paper, we use the microwave propagation characteristics to study the reliability issues that precede the physical damage caused by electromigration in the Cu-filled TSVs. The pre-failure microwave insertion losses and group delay are dependent on both the device temperature and the amount of current forced through the devices-under-test. The microwave insertion losses increase with the increase in the test temperature, while the group delay increases with the increase in the forced direct current magnitude. The microwave insertion losses are attributed to the defect mobility at the Cu-TiN interface, and the group delay changes are due to resistive heating in the interconnects, which perturbs the dielectric properties of the cladding dielectrics of the copper fill in the TSVs.

Photonic emitters and circuits based on colloidal quantum dot composites

NASA Astrophysics Data System (ADS)

Menon, Vinod M.; Husaini, Saima; Valappil, Nikesh; Luberto, Matthew

2009-02-01

We discuss our work on light emitters and photonic circuits realized using colloidal quantum dot composites. Specifically we will report our recent work on flexible microcavity laser, microdisk emitters and integrated active - passive waveguides. The entire microcavity laser structure was realized using spin coating and consisted of an all-polymer distributed Bragg reflector with a poly-vinyl carbazole cavity layer embedded with InGaP/ZnS colloidal quantum dots. These microcavities can be peeled off the substrate yielding a flexible structure that can conform to any shape and whose emission spectra can be mechanically tuned. The microdisk emitters and the integrated waveguide structures were realized using soft lithography and photo-lithography, respectively and were fabricated using a composite consisting of quantum dots embedded in SU8 matrix. Finally, we will discuss the effect of the host matrix on the optical properties of the quantum dots using results of steady-state and time-resolved luminescence measurements. In addition to their specific functionalities, these novel device demonstrations and their development present a low cost alternative to the traditional photonic device fabrication techniques.

Pyroelectric Applications of the VDF-TrFE Copolymer

NASA Technical Reports Server (NTRS)

Simonne, J. J.; Bauer, Ph.; Audaire, L.; Bauer, F.

1995-01-01

VDF/TrFe pyroelectric sensors have now definitely reached the level of a product. Based on a bidimensional staring array, it can be considered as a whole system with a monolithic technology processed on a silicon substrate provided with the integrated read out circuit. The paper will describe the main procedure dealing with the elaboration of a 32 x 32 focal plane array developed, in the context of the PROMETHEUS PROCHIP European Program (EUREKA), as a passive infrared obstacle detection applied to automotive. Additional experimental data suggest that this microsystem could operate in space environment.

Very High Speed Integrated Circuits - VHSIC - Final Program Repoort

DTIC Science & Technology

1990-09-30

emphasis ill ordeFr to (U hieci’ the i/ urease (I mIliitdF capa)(bility L’XI)L’t(’d /)1omn its resiuIh x.’ -Ricluard J). [)ehaitr. Undicer Sec reta/vy...Many new and difficult fabrication problems had to be solved, especially in the areas of silicon substrate material, fine-line lithography, multi- layer ...toward submicron geometries, even in the commercial world ." "Among the technical breakthrou hs spawned by VHSIC is the use of multiple layers of wetal

Epitaxial growth of 100-μm thick M-type hexaferrite crystals on wide bandgap semiconductor GaN/Al{sub 2}O{sub 3} substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hu, Bolin; Su, Zhijuan; Bennett, Steve

2014-05-07

Thick barium hexaferrite BaFe{sub 12}O{sub 19} (BaM) films having thicknesses of ∼100 μm were epitaxially grown on GaN/Al{sub 2}O{sub 3} substrates from a molten-salt solution by vaporizing the solvent. X-ray diffraction measurement verified the growth of BaM (001) textured growth of thick films. Saturation magnetization, 4πM{sub s}, was measured for as-grown films to be 4.6 ± 0.2 kG and ferromagnetic resonance measurements revealed a microwave linewidth of ∼100 Oe at X-band. Scanning electron microscopy indicated clear hexagonal crystals distributed on the semiconductor substrate. These results demonstrate feasibility of growing M-type hexaferrite crystal films on wide bandgap semiconductor substrates by using a simplemore » powder melting method. It also presents a potential pathway for the integration of ferrite microwave passive devices with active semiconductor circuit elements creating system-on-a-wafer architectures.« less

Method of preforming and assembling superconducting circuit elements

NASA Astrophysics Data System (ADS)

Haertling, Gene H.; Buckley, John D.

1991-03-01

The invention is a method of preforming and pretesting rigid and discrete superconductor circuit elements to optimize the superconductivity development of the preformed circuit element prior to its assembly, and encapsulation on a substrate and final environmental testing of the assembled ceramic superconductive elements.

Flexible organic transistors and circuits with extreme bending stability

NASA Astrophysics Data System (ADS)

Sekitani, Tsuyoshi; Zschieschang, Ute; Klauk, Hagen; Someya, Takao

2010-12-01

Flexible electronic circuits are an essential prerequisite for the development of rollable displays, conformable sensors, biodegradable electronics and other applications with unconventional form factors. The smallest radius into which a circuit can be bent is typically several millimetres, limited by strain-induced damage to the active circuit elements. Bending-induced damage can be avoided by placing the circuit elements on rigid islands connected by stretchable wires, but the presence of rigid areas within the substrate plane limits the bending radius. Here we demonstrate organic transistors and complementary circuits that continue to operate without degradation while being folded into a radius of 100μm. This enormous flexibility and bending stability is enabled by a very thin plastic substrate (12.5μm), an atomically smooth planarization coating and a hybrid encapsulation stack that places the transistors in the neutral strain position. We demonstrate a potential application as a catheter with a sheet of transistors and sensors wrapped around it that enables the spatially resolved measurement of physical or chemical properties inside long, narrow tubes.

Organo-erbium systems for optical amplification at telecommunications wavelengths.

PubMed

Ye, H Q; Li, Z; Peng, Y; Wang, C C; Li, T Y; Zheng, Y X; Sapelkin, A; Adamopoulos, G; Hernández, I; Wyatt, P B; Gillin, W P

2014-04-01

Modern telecommunications rely on the transmission and manipulation of optical signals. Optical amplification plays a vital part in this technology, as all components in a real telecommunications system produce some loss. The two main issues with present amplifiers, which rely on erbium ions in a glass matrix, are the difficulty in integration onto a single substrate and the need of high pump power densities to produce gain. Here we show a potential organic optical amplifier material that demonstrates population inversion when pumped from above using low-power visible light. This system is integrated into an organic light-emitting diode demonstrating that electrical pumping can be achieved. This opens the possibility of direct electrically driven optical amplifiers and optical circuits. Our results provide an alternative approach to producing low-cost integrated optics that is compatible with existing silicon photonics and a different route to an effective integrated optics technology.

Integrated resonant micro-optical gyroscope and method of fabrication

DOEpatents

Vawter, G Allen [Albuquerque, NM; Zubrzycki, Walter J [Sandia Park, NM; Guo, Junpeng [Albuquerque, NM; Sullivan, Charles T [Albuquerque, NM

2006-09-12

An integrated optic gyroscope is disclosed which is based on a photonic integrated circuit (PIC) having a bidirectional laser source, a pair of optical waveguide phase modulators and a pair of waveguide photodetectors. The PIC can be connected to a passive ring resonator formed either as a coil of optical fiber or as a coiled optical waveguide. The lasing output from each end of the bidirectional laser source is phase modulated and directed around the passive ring resonator in two counterpropagating directions, with a portion of the lasing output then being detected to determine a rotation rate for the integrated optical gyroscope. The coiled optical waveguide can be formed on a silicon, glass or quartz substrate with a silicon nitride core and a silica cladding, while the PIC includes a plurality of III V compound semiconductor layers including one or more quantum well layers which are disordered in the phase modulators and to form passive optical waveguides.

Microfluidic stretchable RF electronics.

PubMed

Cheng, Shi; Wu, Zhigang

2010-12-07

Stretchable electronics is a revolutionary technology that will potentially create a world of radically different electronic devices and systems that open up an entirely new spectrum of possibilities. This article proposes a microfluidic based solution for stretchable radio frequency (RF) electronics, using hybrid integration of active circuits assembled on flex foils and liquid alloy passive structures embedded in elastic substrates, e.g. polydimethylsiloxane (PDMS). This concept was employed to implement a 900 MHz stretchable RF radiation sensor, consisting of a large area elastic antenna and a cluster of conventional rigid components for RF power detection. The integrated radiation sensor except the power supply was fully embedded in a thin elastomeric substrate. Good electrical performance of the standalone stretchable antenna as well as the RF power detection sub-module was verified by experiments. The sensor successfully detected the RF radiation over 5 m distance in the system demonstration. Experiments on two-dimensional (2D) stretching up to 15%, folding and twisting of the demonstrated sensor were also carried out. Despite the integrated device was severely deformed, no failure in RF radiation sensing was observed in the tests. This technique illuminates a promising route of realizing stretchable and foldable large area integrated RF electronics that are of great interest to a variety of applications like wearable computing, health monitoring, medical diagnostics, and curvilinear electronics.

High current density GaAs/Si rectifying heterojunction by defect free Epitaxial Lateral overgrowth on Tunnel Oxide from nano-seed.

PubMed

Renard, Charles; Molière, Timothée; Cherkashin, Nikolay; Alvarez, José; Vincent, Laetitia; Jaffré, Alexandre; Hallais, Géraldine; Connolly, James Patrick; Mencaraglia, Denis; Bouchier, Daniel

2016-05-04

Interest in the heteroepitaxy of GaAs on Si has never failed in the last years due to the potential for monolithic integration of GaAs-based devices with Si integrated circuits. But in spite of this effort, devices fabricated from them still use homo-epitaxy only. Here we present an epitaxial technique based on the epitaxial lateral overgrowth of micrometer scale GaAs crystals on a thin SiO2 layer from nanoscale Si seeds. This method permits the integration of high quality and defect-free crystalline GaAs on Si substrate and provides active GaAs/Si heterojunctions with efficient carrier transport through the thin SiO2 layer. The nucleation from small width openings avoids the emission of misfit dislocations and the formation of antiphase domains. With this method, we have experimentally demonstrated for the first time a monolithically integrated GaAs/Si diode with high current densities of 10 kA.cm(-2) for a forward bias of 3.7 V. This epitaxial technique paves the way to hybrid III-V/Si devices that are free from lattice-matching restrictions, and where silicon not only behaves as a substrate but also as an active medium.

Ultra high speed image processing techniques. [electronic packaging techniques

NASA Technical Reports Server (NTRS)

Anthony, T.; Hoeschele, D. F.; Connery, R.; Ehland, J.; Billings, J.

1981-01-01

Packaging techniques for ultra high speed image processing were developed. These techniques involve the development of a signal feedthrough technique through LSI/VLSI sapphire substrates. This allows the stacking of LSI/VLSI circuit substrates in a 3 dimensional package with greatly reduced length of interconnecting lines between the LSI/VLSI circuits. The reduced parasitic capacitances results in higher LSI/VLSI computational speeds at significantly reduced power consumption levels.

Hard and flexible optical printed circuit board

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, Hyun Sik; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.

2007-02-01

We report on the design and fabrication of hard and flexible optical printed circuit boards (O-PCBs). The objective is to realize generic and application-specific O-PCBs, either in hard form or flexible form, that are compact, light-weight, low-energy, high-speed, intelligent, and environmentally friendly, for low-cost and high-volume universal applications. The O-PCBs consist of 2-dimensional planar arrays of micro/nano-scale optical wires, circuits and devices that are interconnected and integrated to perform the functions of sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards. For fabrication, the polymer and organic optical wires and waveguides are first fabricated on a board and are used to interconnect and integrate micro/nano-scale photonic devices. The micro/nano-optical functional devices include lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices. For flexible boards, the optical waveguide arrays are fabricated on flexible poly-ethylen terephthalate (PET) substrates by UV embossing. Electrical layer carrying VCSEL and PD array is laminated with the optical layer carrying waveguide arrays. Both hard and flexible electrical lines are replaced with high speed optical interconnection between chips over four waveguide channels up to 10Gbps on each. We discuss uses of hard or flexible O-PCBs for telecommunication systems, computer systems, transportation systems, space/avionic systems, and bio-sensor systems.

Paper-like electronic displays: Large-area rubber-stamped plastic sheets of electronics and microencapsulated electrophoretic inks

PubMed Central

Rogers, John A.; Bao, Zhenan; Baldwin, Kirk; Dodabalapur, Ananth; Crone, Brian; Raju, V. R.; Kuck, Valerie; Katz, Howard; Amundson, Karl; Ewing, Jay; Drzaic, Paul

2001-01-01

Electronic systems that use rugged lightweight plastics potentially offer attractive characteristics (low-cost processing, mechanical flexibility, large area coverage, etc.) that are not easily achieved with established silicon technologies. This paper summarizes work that demonstrates many of these characteristics in a realistic system: organic active matrix backplane circuits (256 transistors) for large (≈5 × 5-inch) mechanically flexible sheets of electronic paper, an emerging type of display. The success of this effort relies on new or improved processing techniques and materials for plastic electronics, including methods for (i) rubber stamping (microcontact printing) high-resolution (≈1 μm) circuits with low levels of defects and good registration over large areas, (ii) achieving low leakage with thin dielectrics deposited onto surfaces with relief, (iii) constructing high-performance organic transistors with bottom contact geometries, (iv) encapsulating these transistors, (v) depositing, in a repeatable way, organic semiconductors with uniform electrical characteristics over large areas, and (vi) low-temperature (≈100°C) annealing to increase the on/off ratios of the transistors and to improve the uniformity of their characteristics. The sophistication and flexibility of the patterning procedures, high level of integration on plastic substrates, large area coverage, and good performance of the transistors are all important features of this work. We successfully integrate these circuits with microencapsulated electrophoretic “inks” to form sheets of electronic paper. PMID:11320233

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

Converting biomechanical energy into electricity by a muscle-movement-driven nanogenerator.

PubMed

Yang, Rusen; Qin, Yong; Li, Cheng; Zhu, Guang; Wang, Zhong Lin

2009-03-01

A living species has numerous sources of mechanical energy, such as muscle stretching, arm/leg swings, walking/running, heart beats, and blood flow. We demonstrate a piezoelectric nanowire based nanogenerator that converts biomechanical energy, such as the movement of a human finger and the body motion of a live hamster (Campbell's dwarf), into electricity. A single wire generator (SWG) consists of a flexible substrate with a ZnO nanowire affixed laterally at its two ends on the substrate surface. Muscle stretching results in the back and forth stretching of the substrate and the nanowire. The piezoelectric potential created inside the wire leads to the flow of electrons in the external circuit. The output voltage has been increased by integrating multiple SWGs. A series connection of four SWGs produced an output voltage of up to approximately 0.1-0.15 V. The success of energy harvesting from a tapping finger and a running hamster reveals the potential of using the nanogenerators for scavenging low-frequency energy from regular and irregular biomotion.

Rectenna Technology Program: Ultra light 2.45 GHz rectenna 20 GHz rectenna

NASA Technical Reports Server (NTRS)

Brown, William C.

1987-01-01

The program had two general objectives. The first objective was to develop the two plane rectenna format for space application at 2.45 GHz. The resultant foreplane was a thin-film, etched-circuit format fabricated from a laminate composed of 2 mil Kapton F sandwiched between sheets of 1 oz copper. The thin-film foreplane contains half wave dipoles, filter circuits, rectifying Schottky diode, and dc bussing lead. It weighs 160 grams per square meter. Efficiency and dc power output density were measured at 85% and 1 kw/sq m, respectively. Special testing techniques to measure temperature of circuit and diode without perturbing microwave operation using the fluoroptic thermometer were developed. A second objective was to investigate rectenna technology for use at 20 GHz and higher frequencies. Several fabrication formats including the thin-film scaled from 2.45 GHz, ceramic substrate and silk-screening, and monolithic were investigated, with the conclusion that the monolithic approach was the best. A preliminary design of the monolithic rectenna structure and the integrated Schottky diode were made.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend

NASA Astrophysics Data System (ADS)

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-01

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d2‧,3‧-d‧]benzo[1,2-b4,5-b‧]dithiophene (DTBDT-C6) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm2 V-1 s-1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Circuit Architecture of VTA Dopamine Neurons Revealed by Systematic Input-Output Mapping.

PubMed

Beier, Kevin T; Steinberg, Elizabeth E; DeLoach, Katherine E; Xie, Stanley; Miyamichi, Kazunari; Schwarz, Lindsay; Gao, Xiaojing J; Kremer, Eric J; Malenka, Robert C; Luo, Liqun

2015-07-30

Dopamine (DA) neurons in the midbrain ventral tegmental area (VTA) integrate complex inputs to encode multiple signals that influence motivated behaviors via diverse projections. Here, we combine axon-initiated viral transduction with rabies-mediated trans-synaptic tracing and Cre-based cell-type-specific targeting to systematically map input-output relationships of VTA-DA neurons. We found that VTA-DA (and VTA-GABA) neurons receive excitatory, inhibitory, and modulatory input from diverse sources. VTA-DA neurons projecting to different forebrain regions exhibit specific biases in their input selection. VTA-DA neurons projecting to lateral and medial nucleus accumbens innervate largely non-overlapping striatal targets, with the latter also sending extensive extra-striatal axon collaterals. Using electrophysiology and behavior, we validated new circuits identified in our tracing studies, including a previously unappreciated top-down reinforcing circuit from anterior cortex to lateral nucleus accumbens via VTA-DA neurons. This study highlights the utility of our viral-genetic tracing strategies to elucidate the complex neural substrates that underlie motivated behaviors. Copyright © 2015 Elsevier Inc. All rights reserved.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend.

PubMed

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-04

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d;2',3'-d']benzo[1,2-b;4,5-b']dithiophene (DTBDT-C 6 ) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm 2  V -1  s -1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Athermalization of resonant optical devices via thermo-mechanical feedback

DOEpatents

Rakich, Peter; Nielson, Gregory N.; Lentine, Anthony L.

2016-01-19

A passively athermal photonic system including a photonic circuit having a substrate and an optical cavity defined on the substrate, and passive temperature-responsive provisions for inducing strain in the optical cavity of the photonic circuit to compensate for a thermo-optic effect resulting from a temperature change in the optical cavity of the photonic circuit. Also disclosed is a method of passively compensating for a temperature dependent thermo-optic effect resulting on an optical cavity of a photonic circuit including the step of passively inducing strain in the optical cavity as a function of a temperature change of the optical cavity thereby producing an elasto-optic effect in the optical cavity to compensate for the thermo-optic effect resulting on an optical cavity due to the temperature change.

GaAs-based optoelectronic neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H. (Inventor); Kim, Jae H. (Inventor); Psaltis, Demetri (Inventor)

1993-01-01

An integrated, optoelectronic, variable thresholding neuron implemented monolithically in GaAs integrated circuit and exhibiting high differential optical gain and low power consumption is presented. Two alternative embodiments each comprise an LED monolithically integrated with a detector and two transistors. One of the transistors is responsive to a bias voltage applied to its gate for varying the threshold of the neuron. One embodiment is implemented as an LED monolithically integrated with a double heterojunction bipolar phototransistor (detector) and two metal semiconductor field effect transistors (MESFET's) on a single GaAs substrate and another embodiment is implemented as an LED monolithically integrated with three MESFET's (one of which is an optical FET detector) on a single GaAs substrate. The first noted embodiment exhibits a differential optical gain of 6 and an optical switching energy of 10 pJ. The second embodiment has a differential optical gain of 80 and an optical switching energy of 38 pJ. Power consumption is 2.4 and 1.8 mW, respectively. Input 'light' power needed to turn on the LED is 2 micro-W and 54 nW, respectively. In both embodiments the detector is in series with a biasing MESFET and saturates the other MESFET upon detecting light above a threshold level. The saturated MESFET turns on the LED. Voltage applied to the biasing MESFET gate controls the threshold.

Fully Printed Flexible and Stretchable Electronics

NASA Astrophysics Data System (ADS)

Zhang, Suoming

Through this thesis proposal, the author has demonstrated series of flexible or stretchable sensors including strain gauge, pressure sensors, display arrays, thin film transistors and photodetectors fabricated by a direct printing process. By adopting the novel serpentine configuration with conventional non-stretchable materials silver nanoparticles, the fully printed stretchable devices are successfully fabricated on elastomeric substrate with the demonstration of stretchable conductors that can maintain the electrical properties under strain and the strain gauge, which could be used to measure the strain in desired locations and also to monitor individual person's finger motion. And by investigating the intrinsic stretchable materials silver nanowires (AgNWs) with the conventional configuration, the fully printed stretchable conductors are achieved on various substrates including Si, glass, Polyimide, Polydimethylsiloxane (PDMS) and Very High Bond (VHB) tape with the illustration of the capacitive pressure sensor and stretchable electroluminescent displays. In addition, intrinsically stretchable thin-film transistors (TFTs) and integrated logic circuits are directly printed on elastomeric PDMS substrates. The printed devices utilize carbon nanotubes and a type of hybrid gate dielectric comprising PDMS and barium titanate (BaTiO3) nanoparticles. The BaTiO3/PDMS composite simultaneously provides high dielectric constant, superior stretchability, low leakage, as well as good printability and compatibility with the elastomeric substrate. Both TFTs and logic circuits can be stretched beyond 50% strain along either channel length or channel width directions for thousands of cycles while showing no significant degradation in electrical performance. Finally, by applying the SWNTs as the channel layer of the thin film transistor, we successfully fabricate the fully printed flexible photodetector which exhibits good electrical characteristics and the transistors exhibit good reliability under bending conditions owing to the ultrathin polyimide substrate as well as the superior mechanical flexibility of the gate dielectric and carbon nanotube network. Furthermore, we have demonstrated that by using two types of SWCNT samples with different optical absorption characteristics, the photoresponse exhibits unique wavelength selectivity, as manifested by the good correlation between the responsive wavelengths of the devices with the absorption peaks of the corresponding carbon nanotubes. All the proposed materials above together with the unique direct printing process may offer an entry into more sophisticated flexible or stretchable electronic systems with monolithically integrated sensors, actuators, and displays for real life applications.

Automatic visual inspection system for microelectronics

NASA Technical Reports Server (NTRS)

Micka, E. Z. (Inventor)

1975-01-01

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

Al transmon qubits on silicon-on-insulator for quantum device integration

NASA Astrophysics Data System (ADS)

Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

2017-07-01

We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

GaAs/Ge crystals grown on Si substrates patterned down to the micron scale

DOE Office of Scientific and Technical Information (OSTI.GOV)

Taboada, A. G., E-mail: gonzalez@phys.ethz.ch; Kreiliger, T.; Falub, C. V.

Monolithic integration of III-V compounds into high density Si integrated circuits is a key technological challenge for the next generation of optoelectronic devices. In this work, we report on the metal organic vapor phase epitaxy growth of strain-free GaAs crystals on Si substrates patterned down to the micron scale. The differences in thermal expansion coefficient and lattice parameter are adapted by a 2-μm-thick intermediate Ge layer grown by low-energy plasma enhanced chemical vapor deposition. The GaAs crystals evolve during growth towards a pyramidal shape, with lateral facets composed of (111) planes and an apex formed by (137) and (001) surfaces.more » The influence of the anisotropic GaAs growth kinetics on the final morphology is highlighted by means of scanning and transmission electron microscopy measurements. The effect of the Si pattern geometry, substrate orientation, and crystal aspect ratio on the GaAs structural properties was investigated by means of high resolution X-ray diffraction. The thermal strain relaxation process of GaAs crystals with different aspect ratio is discussed within the framework of linear elasticity theory by Finite Element Method simulations based on realistic geometries extracted from cross-sectional scanning electron microscopy images.« less

Application of RF varactor using Ba(x)Sr(1-x)TiO3/TiO2/HR-Si substrate for reconfigurable radio.

PubMed

Kim, Ki-Byoung; Park, Chul-Soon

2007-11-01

In this paper, the potential feasibility of integrating Ba(x)Sr(1-x)TiO3 (BST) films into Si wafer by adopting tunable interdigital capacitor (IDC) with TiO2 thin film buffer layer and a RF tunable active bandpass filter (BPF) using BST based capacitor are proposed. TiO2 as a buffer layer is grown onto Si substrate by atomic layer deposition (ALD) and the interdigital capacitor on BST(500 nm)/TiO2 (50 nm)/HR-Si is fabricated. BST interdigital tunable capacitor integrated on HR-Si substrate with high tunability and low loss tangent are characterized for their microwave performances. BST/TiO2/HR-Si IDC shows much enhanced tunability values of 40% and commutation quality factor (CQF) of 56.71. A resonator consists of an active capacitance circuit together with a BST varactor. The active capacitor is made of a field effect transistor (FET) that exhibits negative resistance as well as capacitance. The measured second order active BPF shows bandwidth of 110 MHz, insertion loss of about 1 dB at the 1.81 GHz center frequency and tuning frequency of 230 MHz (1.81-2.04 GHz).

Acoustic backing in 3-D integration of CMUT with front-end electronics.

PubMed

Berg, Sigrid; Rønnekleiv, Arne

2012-07-01

Capacitive micromachined ultrasonic transducers (CMUTs) have shown promising qualities for medical imaging. However, there are still some problems to be investigated, and some challenges to overcome. Acoustic backing is necessary to prevent SAWs excited in the surface of the silicon substrate from affecting the transmit pattern from the array. In addition, echoes resulting from bulk waves in the substrate must be removed. There is growing interest in integrating electronic circuits to do some of the beamforming directly below the transducer array. This may be easier to achieve for CMUTs than for traditional piezoelectric transducers. We will present simulations showing that the thickness of the silicon substrate and thicknesses and acoustic properties of the bonding material must be considered, especially when designing highfrequency transducers. Through simulations, we compare the acoustic properties of 3-D stacks bonded with three different bonding techniques; solid-liquid interdiffusion (SLID) bonding, direct fusion bonding, and anisotropic conductive adhesives (ACA). We look at a CMUT array with a center frequency of 30 MHz and three silicon wafers underneath, having a total silicon thickness of 100 μm. We find that fusion bonding is most beneficial if we want to prevent surface waves from damaging the array response, but SLID and ACA are also promising if bonding layer thicknesses can be reduced.

Liquid crystal polymer substrate MMIC receiver modules for the ECE Imaging system on the DIII-D

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu, Y.; Ye, Y.; Yu, J-H

A new generation of millimeter-wave heterodyne imaging receiver arrays has been developed and demonstrated on the DIII-D ECEI system. Improved circuit integration, allowing for absolute calibration, improved noise performance, and shielding from out-of-band emission, is made possible by using advanced liquid crystal polymer (LCP) substrates and MMIC (Monolithic Microwave Integrated Circuit) receiver chips. This array exhibits ~ 15 dB additional gain and > 30x reduction in noise temperature compared to the previous generation and provide ECEI capability for absolute 2-D electron temperature profile measurements. Each LCP horn-waveguide module houses a 3x3 mm GaAs MMIC receiver chip, which consists of amore » low noise amplifier (LNA), balanced mixer, local oscillator multiplier chain driven by ~12 GHz input via an RF cable to the enclosure box, and IF amplifier. A proof-of-principle instrument with 5 poloidal channels was installed on DIII-D in 2017. The full proof-of-principle system installation (20 poloidal x 8 radial channels) was commissioned early in 2018. The LCP ECEI system is used for pedestal region measurements, especially focusing on temperature evolution during ELM bursting. The DIII-D ECE Imaging signal has been significantly improved with extremely effective shielding of out-of-band microwave noise which plagued previous ECE Imaging studies on DIII-D. In H-mode ELM bursting, the radial propagation of electron heat flow has been detected on DIII-D. The LCP ECE Imaging is expected to be a valuable diagnostic tool for ELM physics investigations.« less

Low thermal resistance power module assembly

DOEpatents

Hassani, Vahab; Vlahinos, Andreas; Bharathan, Desikan

2007-03-13

A power module assembly with low thermal resistance and enhanced heat dissipation to a cooling medium. The assembly includes a heat sink or spreader plate with passageways or openings for coolant that extend through the plate from a lower surface to an upper surface. A circuit substrate is provided and positioned on the spreader plate to cover the coolant passageways. The circuit substrate includes a bonding layer configured to extend about the periphery of each of the coolant passageways and is made up of a substantially nonporous material. The bonding layer may be solder material which bonds to the upper surface of the plate to provide a continuous seal around the upper edge of each opening in the plate. The assembly includes power modules mounted on the circuit substrate on a surface opposite the bonding layer. The power modules are positioned over or proximal to the coolant passageways.

Stretchable electronics based on Ag-PDMS composites

PubMed Central

Larmagnac, Alexandre; Eggenberger, Samuel; Janossy, Hanna; Vörös, Janos

2014-01-01

Patterned structures of flexible, stretchable, electrically conductive materials on soft substrates could lead to novel electronic devices with unique mechanical properties allowing them to bend, fold, stretch or conform to their environment. For the last decade, research on improving the stretchability of circuits on elastomeric substrates has made significant progresses but designing printed circuit assemblies on elastomers remains challenging. Here we present a simple, cost-effective, cleanroom-free process to produce large scale soft electronic hardware where standard surface-mounted electrical components were directly bonded onto all-elastomeric printed circuit boards, or soft PCBs. Ag-PDMS tracks were stencil printed onto a PDMS substrate and soft PCBs were made by bonding the top and bottom layers together and filling punched holes with Ag-PDMS to create vias. Silver epoxy was used to bond commercial electrical components and no mechanical failure was observed after hundreds of stretching cycles. We also demonstrate the fabrication of a stretchable clock generator. PMID:25434843

Finite element analysis on deformation of stretchable electronic interconnect substrate using polydimethylsiloxanes (PDMS)

NASA Astrophysics Data System (ADS)

Roslan, M. F.; Shaffiar, N. M.; Khairusshima, M. K. N.; Sharifah, I. S. S.

2018-01-01

Over the years, the technology of electronic industry has growth tremendously. Open ended research on how to make a better concept of electronic circuit is ongoing especially on the stretchable electronic devices. There are many designs to achieve stretchability in electronic circuits. The problem occurs when deformation applied to the stretchable electronic circuit, it cannot maintain its functionality. Fracture may happen on the conductor. In this research, the study on deformation of stretchable electronic interconnects substrate using Polydimethlysiloxanes is carried out. The purpose of this research are to study the axial deformation occur, to determine the optimum shape of the conductor designs (horseshoe, rectangular and u-shape design) for the stretchable electronic interconnect and to compare the mechanical properties of Polydimethlysiloxanes (PDMS) with Polyurethane (PU) using Finite Element Analysis (FEA). The simulation was done on the FE model of the stretchable circuit with dimension of 2.4 X 2.4 X 0.5 mm. The stretching of the FE model was simulated with the range of elongation at 10, 20 and 30 percent from its original length in order to find the strain value for all three of the conductor designs. The best conductor design is used to simulate with different types of substrate (PDMS and PU). From the simulation result, Horseshoe design record the lowest strain value for each elongation, followed by rectangular and U-shape design. Thus, Horseshoe is considered as the optimum design for the conductor compared to the other two designs. From the result also, it shows that PDMS substrate will offer more maximum allowable stretchability compared to PU substrates. Thus PDMS is considered as a better substrate compare to PU. PDMS is a good material to replace PU since it can perform under tension much better mechanically.

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

A hybrid nanomemristor/transistor logic circuit capable of self-programming

PubMed Central

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A. A.; Wu, Wei; Stewart, Duncan R.; Williams, R. Stanley

2009-01-01

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing. PMID:19171903

A hybrid nanomemristor/transistor logic circuit capable of self-programming.

PubMed

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

2009-02-10

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

Multi-electrode array technologies for neuroscience and cardiology

NASA Astrophysics Data System (ADS)

Spira, Micha E.; Hai, Aviad

2013-02-01

At present, the prime methodology for studying neuronal circuit-connectivity, physiology and pathology under in vitro or in vivo conditions is by using substrate-integrated microelectrode arrays. Although this methodology permits simultaneous, cell-non-invasive, long-term recordings of extracellular field potentials generated by action potentials, it is 'blind' to subthreshold synaptic potentials generated by single cells. On the other hand, intracellular recordings of the full electrophysiological repertoire (subthreshold synaptic potentials, membrane oscillations and action potentials) are, at present, obtained only by sharp or patch microelectrodes. These, however, are limited to single cells at a time and for short durations. Recently a number of laboratories began to merge the advantages of extracellular microelectrode arrays and intracellular microelectrodes. This Review describes the novel approaches, identifying their strengths and limitations from the point of view of the end users -- with the intention to help steer the bioengineering efforts towards the needs of brain-circuit research.

Multi-electrode array technologies for neuroscience and cardiology.

PubMed

Spira, Micha E; Hai, Aviad

2013-02-01

At present, the prime methodology for studying neuronal circuit-connectivity, physiology and pathology under in vitro or in vivo conditions is by using substrate-integrated microelectrode arrays. Although this methodology permits simultaneous, cell-non-invasive, long-term recordings of extracellular field potentials generated by action potentials, it is 'blind' to subthreshold synaptic potentials generated by single cells. On the other hand, intracellular recordings of the full electrophysiological repertoire (subthreshold synaptic potentials, membrane oscillations and action potentials) are, at present, obtained only by sharp or patch microelectrodes. These, however, are limited to single cells at a time and for short durations. Recently a number of laboratories began to merge the advantages of extracellular microelectrode arrays and intracellular microelectrodes. This Review describes the novel approaches, identifying their strengths and limitations from the point of view of the end users--with the intention to help steer the bioengineering efforts towards the needs of brain-circuit research.

Integrated microsystems packaging approach with LCP

NASA Astrophysics Data System (ADS)

Jaynes, Paul; Shacklette, Lawrence W.

2006-05-01

Within the government communication market there is an increasing push to further miniaturize systems with the use of chip-scale packages, flip-chip bonding, and other advances over traditional packaging techniques. Harris' approach to miniaturization includes these traditional packaging advances, but goes beyond this level of miniaturization by combining the functional and structural elements of a system, thus creating a Multi-Functional Structural Circuit (MFSC). An emerging high-frequency, near hermetic, thermoplastic electronic substrate material, Liquid Crystal Polymer (LCP), is the material that will enable the combination of the electronic circuit and the physical structure of the system. The first embodiment of this vision for Harris is the development of a battlefield acoustic sensor module. This paper will introduce LCP and its advantages for MFSC, present an example of the work that Harris has performed, and speak to LCP MFSCs' potential benefits to miniature communications modules and sensor platforms.

Betavoltaic effect in titanium dioxide nanotube arrays under build-in potential difference

NASA Astrophysics Data System (ADS)

Zhang, Qiang; Chen, Ranbin; San, Haisheng; Liu, Guohua; Wang, Kaiying

2015-05-01

We report the fabrication of sandwich-type metal/TiO2 nanotube (TNT) array/metal structures as well as their betavoltaic effects under build-in voltage through contact potential difference. The sandwiched structure is integrated by immobilized TNT arrays on Ti foil with radioisotope 63Ni planar source on Ni substrate (Ni-63Ni/TNT array/Ti). Under irradiation of the 63Ni source with activity of 8 mCi, the structure (TNT diameter ∼ 130 nm, length ∼ 11 μm) presents optimum energy conversion efficiency of 7.30% with open-circuit voltage of 1.54 V and short-circuit current of 12.43 nA. The TNT arrays exhibit a highly potential for developing betavoltaic batteries due to its wide band gap and nanotube array configuration. The TNT-betavoltaic concept offers a facile solution for micro/nano electronics with high efficiency and long life-time instead of conventional planar junction-type batteries.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

The human phosphotyrosine signaling network: Evolution and hotspots of hijacking in cancer

PubMed Central

Li, Lei; Tibiche, Chabane; Fu, Cong; Kaneko, Tomonori; Moran, Michael F.; Schiller, Martin R.; Li, Shawn Shun-Cheng; Wang, Edwin

2012-01-01

Phosphotyrosine (pTyr) signaling, which plays a central role in cell–cell and cell–environment interactions, has been considered to be an evolutionary innovation in multicellular metazoans. However, neither the emergence nor the evolution of the human pTyr signaling system is currently understood. Tyrosine kinase (TK) circuits, each of which consists of a TK writer, a kinase substrate, and a related reader, such as Src homology (SH) 2 domains and pTyr-binding (PTB) domains, comprise the core machinery of the pTyr signaling network. In this study, we analyzed the evolutionary trajectories of 583 literature-derived and 50,000 computationally predicted human TK circuits in 19 representative eukaryotic species and assigned their evolutionary origins. We found that human TK circuits for intracellular pTyr signaling originated largely from primitive organisms, whereas the inter- or extracellular signaling circuits experienced significant expansion in the bilaterian lineage through the “back-wiring” of newly evolved kinases to primitive substrates and SH2/PTB domains. Conversely, the TK circuits that are involved in tissue-specific signaling evolved mainly in vertebrates by the back-wiring of vertebrate substrates to primitive kinases and SH2/PTB domains. Importantly, we found that cancer signaling preferentially employs the pTyr sites, which are linked to more TK circuits. Our work provides insights into the evolutionary paths of the human pTyr signaling circuits and suggests the use of a network approach for cancer intervention through the targeting of key pTyr sites and their associated signaling hubs in the network. PMID:22194470

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Studies in optical parallel processing. [All optical and electro-optic approaches

NASA Technical Reports Server (NTRS)

Lee, S. H.

1978-01-01

Threshold and A/D devices for converting a gray scale image into a binary one were investigated for all-optical and opto-electronic approaches to parallel processing. Integrated optical logic circuits (IOC) and optical parallel logic devices (OPA) were studied as an approach to processing optical binary signals. In the IOC logic scheme, a single row of an optical image is coupled into the IOC substrate at a time through an array of optical fibers. Parallel processing is carried out out, on each image element of these rows, in the IOC substrate and the resulting output exits via a second array of optical fibers. The OPAL system for parallel processing which uses a Fabry-Perot interferometer for image thresholding and analog-to-digital conversion, achieves a higher degree of parallel processing than is possible with IOC.

Vertically aligned p-type single-crystalline GaN nanorod arrays on n-type Si for heterojunction photovoltaic cells.

PubMed

Tang, Y B; Chen, Z H; Song, H S; Lee, C S; Cong, H T; Cheng, H M; Zhang, W J; Bello, I; Lee, S T

2008-12-01

Vertically aligned Mg-doped GaN nanorods have been epitaxially grown on n-type Si substrate to form a heterostructure for fabricating p-n heterojunction photovoltaic cells. The p-type GaN nanorod/n-Si heterojunction cell shows a well-defined rectifying behavior with a rectification ratio larger than 10(4) in dark. The cell has a high short-circuit photocurrent density of 7.6 mAlcm2 and energy conversion efficiency of 2.73% under AM 1.5G illumination at 100 mW/cm2. Moreover, the nanorod array may be used as an antireflection coating for solar cell applications to effectively reduce light loss due to reflection. This study provides an experimental demonstration for integrating one-dimensional nanostructure arrays with the substrate to directly fabricate heterojunction photovoltaic cells.

III-nitride nanowire LEDs and diode lasers: monolithic light sources on (001) Si emitting in the 600-1300nm range

NASA Astrophysics Data System (ADS)

Bhattacharya, P.; Hazari, A.; Jahangir, S.

2018-02-01

GaN-based nanowire heterostructure arrays epitaxially grown on (001)Si substrates have unique properties and present the potential to realize useful devices. The active light-emitting region in the nanowire heterostructures are usually InGaN disks, whose composition can be varied to tune the emission wavelength. We have demonstrated light emitting diodes and edgeemitting diode lasers with power outputs 10mW with emission in the 600-1300nm wavelength range. These light sources are therefore useful for a variety of applications, including silicon photonics. Molecular beam epitaxial growth of the nanowire heterostructure arrays on (001)Si substrates and the characteristics of 1.3μm nanowire array edge emitting lasers, guided wave photodiodes and a monolithic photonic integrated circuit designed for 1.3μm operation are described.

Advanced BCD technology with vertical DMOS based on a semi-insulation structure

NASA Astrophysics Data System (ADS)

Kui, Ma; Xinghua, Fu; Jiexin, Lin; Fashun, Yang

2016-07-01

A new semi-insulation structure in which one isolated island is connected to the substrate was proposed. Based on this semi-insulation structure, an advanced BCD technology which can integrate a vertical device without extra internal interconnection structure was presented. The manufacturing of the new semi-insulation structure employed multi-epitaxy and selectively multi-doping. Isolated islands are insulated with the substrate by reverse-biased PN junctions. Adjacent isolated islands are insulated by isolation wall or deep dielectric trenches. The proposed semi-insulation structure and devices fixed in it were simulated through two-dimensional numerical computer simulators. Based on the new BCD technology, a smart power integrated circuit was designed and fabricated. The simulated and tested results of Vertical DMOS, MOSFETs, BJTs, resistors and diodes indicated that the proposed semi-insulation structure is reasonable and the advanced BCD technology is validated. Project supported by the National Natural Science Foundation of China (No. 61464002), the Science and Technology Fund of Guizhou Province (No. Qian Ke He J Zi [2014]2066), and the Dr. Fund of Guizhou University (No. Gui Da Ren Ji He Zi (2013)20Hao).

Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

NASA Astrophysics Data System (ADS)

Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

2015-03-01

This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

Self-aligned photolithography for the fabrication of fully transparent high-voltage devices

NASA Astrophysics Data System (ADS)

Zhang, Yonghui; Mei, Zengxia; Huo, Wenxing; Wang, Tao; Liang, Huili; Du, Xiaolong

2018-05-01

High-voltage devices, working in the range of hundreds of volts, are indispensable elements in the driving or readout circuits for various kinds of displays, integrated microelectromechanical systems and x-ray imaging sensors. However, the device performances are found hardly uniform or repeatable due to the misalignment issue, which are extremely common for offset drain high-voltage devices. To resolve this issue, this article reports a set of self-aligned photolithography technology for the fabrication of high-voltage devices. High-performance fully-transparent high-voltage thin film transistors, diodes and logic inverters are successfully fabricated with this technology. Unlike other self-aligned routes, opaque masks are introduced on the backside of the transparent substrate to facilitate proximity exposure method. The photolithography process is simulated and analyzed with technology computer aided design simulation to explain the working principle of the proximity exposure method. The substrate thickness is found to be vital for the implementation of this technology based on both simulation and experimental results. The electrical performance of high-voltage devices is dependent on the offset length, which can be delicately modulated by changing the exposure dose. The presented self-aligned photolithography technology is proved to be feasible in high-voltage circuits, demonstrating its huge potential in practical industrial applications.

Paper-based silver-nanowire electronic circuits with outstanding electrical conductivity and extreme bending stability.

PubMed

Huang, Gui-Wen; Xiao, Hong-Mei; Fu, Shao-Yun

2014-08-07

Here a facile, green and efficient printing-filtration-press (PFP) technique is reported for room-temperature (RT) mass-production of low-cost, environmentally friendly, high performance paper-based electronic circuits. The as-prepared silver nanowires (Ag-NWs) are uniformly deposited at RT on a pre-printed paper substrate to form high quality circuits via vacuum filtration and pressing. The PFP circuit exhibits more excellent electrical property and bending stability compared with other flexible circuits made by existing techniques. Furthermore, practical applications of the PFP circuits are demonstrated.

Electro-optical Probing Of Terahertz Integrated Circuits

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Romanofsky, R.; Whitaker, J. F.; Valdmanis, J. A.; Mourou, G.; Jackson, T. A.

1990-01-01

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Effect of top-down nanomachining on electrical conduction properties of TiO2 nanostructure-based chemical sensors.

PubMed

Francioso, L; De Pascali, C; Capone, S; Siciliano, P

2012-03-09

The present research was motivated by the growing interest of the scientific community towards the understanding of basic gas-surface interaction mechanisms in 1D nanostructured metal oxide semiconductors, whose significantly enhanced chemical detection sensitivity is known. In this work, impedance spectroscopy (IS) was used to evaluate how a top-down patterning of the sensitive layer can modulate the electrical properties of a gas sensor based on a fully integrated nanometric array of TiO(2) polycrystalline strips. The aim of the study was supported by comparative experimental activity carried out on different thin film gas sensors based on identical TiO(2) polycrystalline sensitive thin films. The impedance responses of the investigated devices under dry air (as the reference environment) and ethanol vapors (as the target gas) were fitted by a complex nonlinear least-squares method using LEVM software, in order to find an appropriate equivalent circuit describing the main conduction processes involved in the gas/semiconductor interactions. Two different equivalent circuit models were identified as completely representative of the TiO(2) thin film and the TiO(2) nanostructure-based gas sensors, respectively. All the circuit parameters were quantified and the related standard deviations were evaluated. The simulated results well approximated the experimental data as indicated by the small mean errors of the fits (in the range of 10(-4)) and the small standard deviations of the circuit parameters. In addition to the substrate capacitance, three different contributions to the overall conduction mechanism were identified for both equivalent circuits: bulk conductivity, intergrain contact and semiconductor-electrode contact, electrically represented by an ideal resistor R(g), a parallel R(gb)C(gb) block and a parallel R(c)-CPE(c) combination, respectively. In terms of equivalent circuit modeling, the sensitive layer patterning introduced an additional parameter in parallel connection with the whole circuit block. Such a circuit element (an ideal inductor, L) has an average value of about 125 μH and exhibits no direct dependence on the analyte gas concentration. Its presence could be due to complex mutual inductance effects occurring both between all the adjacent nanostrips (10 µm spaced) and between the nanostrips and the n-type-doped silicon substrate underneath the thermal oxide (wire/plate effect), where a two order of magnitude higher magnetic permeability of silicon can give L values comparable with those estimated by the fitting procedure. Slightly modified experimental models confirmed that the theoretical background, regulating thin film devices based on metal oxide semiconductors, is also valid for nanopatterned devices.

Front-Side Microstrip Line Feeding a Raised Antenna Patch

NASA Technical Reports Server (NTRS)

Hodges, Richard; Hoppe, Daniel

2005-01-01

An improved design concept for a printed-circuit patch antenna and the transmission line that feeds the patch calls for (1) a microstrip transmission line on the front (radiative) side of a printed-circuit board based on a thin, high-permittivity dielectric substrate; (2) using the conductor covering the back side of the circuit board as a common ground plane for both the microstrip line and the antenna patch; (3) supporting the antenna patch in front of the circuit board on a much thicker, lower-permittivity dielectric spacer layer; and (4) connecting the microstrip transmission line to the patch by use of a thin wire or narrow ribbon that extends through the thickness of the spacer and is oriented perpendicularly to the circuit-board plane. The thickness of the substrate is typically chosen so that a microstrip transmission line of practical width has an impedance between 50 and 100 ohms. The advantages of this design concept are best understood in the context of the disadvantages of prior design concepts, as explained

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

NASA Astrophysics Data System (ADS)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Wide-band polarization controller for Si photonic integrated circuits.

PubMed

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Recent Advances in Biointegrated Optoelectronic Devices.

PubMed

Xu, Huihua; Yin, Lan; Liu, Chuan; Sheng, Xing; Zhao, Ni

2018-05-28

With recent progress in the design of materials and mechanics, opportunities have arisen to improve optoelectronic devices, circuits, and systems in curved, flexible, stretchable, and biocompatible formats, thereby enabling integration of customized optoelectronic devices and biological systems. Here, the core material technologies of biointegrated optoelectronic platforms are discussed. An overview of the design and fabrication methods to form semiconductor materials and devices in flexible and stretchable formats is presented, strategies incorporating various heterogeneous substrates, interfaces, and encapsulants are discussed, and their applications in biomimetic, wearable, and implantable systems are highlighted. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Advanced detectors and signal processing

NASA Technical Reports Server (NTRS)

Greve, D. W.; Rasky, P. H. L.; Kryder, M. H.

1986-01-01

Continued progress is reported toward development of a silicon on garnet technology which would allow fabrication of advanced detection and signal processing circuits on bubble memories. The first integrated detectors and propagation patterns have been designed and incorporated on a new mask set. In addition, annealing studies on spacer layers are performed. Based on those studies, a new double layer spacer is proposed which should reduce contamination of the silicon originating in the substrate. Finally, the magnetic sensitivity of uncontaminated detectors from the last lot of wafers is measured. The measured sensitivity is lower than anticipated but still higher than present magnetoresistive detectors.

Plastic substrates for active matrix liquid crystal display incapable of withstanding processing temperature of over 200 C and method of fabrication

DOEpatents

Carey, P.G.; Smith, P.M.; Havens, J.H.; Jones, P.

1999-01-05

Bright-polarizer-free, active-matrix liquid crystal displays (AMLCDs) are formed on plastic substrates. The primary components of the display are a pixel circuit fabricated on one plastic substrate, an intervening liquid-crystal material, and a counter electrode on a second plastic substrate. The-pixel circuit contains one or more thin-film transistors (TFTs) and either a transparent or reflective pixel electrode manufactured at sufficiently low temperatures to avoid damage to the plastic substrate. Fabrication of the TFTs can be carried out at temperatures less than 100 C. The liquid crystal material is a commercially made nematic curvilinear aligned phase (NCAP) film. The counter electrode is comprised of a plastic substrate coated with a transparent conductor, such as indium-doped tin oxide (ITO). By coupling the active matrix with NCAP, a high-information content can be provided in a bright, fully plastic package. Applications include any low cost portable electronics containing flat displays where ruggedization of the display is desired. 12 figs.

Plastic substrates for active matrix liquid crystal display incapable of withstanding processing temperature of over 200.degree. C and method of fabrication

DOEpatents

Carey, Paul G.; Smith, Patrick M.; Havens, John; Jones, Phil

1999-01-01

Bright-polarizer-free, active-matrix liquid crystal displays (AMLCDs) are formed on plastic substrates. The primary components of the display are a pixel circuit fabricated on one plastic substrate, an intervening liquid-crystal material, and a counter electrode on a second plastic substrate. The-pixel circuit contains one or more thin-film transistors (TFTs) and either a transparent or reflective pixel electrode manufactured at sufficiently low temperatures to avoid damage to the plastic substrate. Fabrication of the TFTs can be carried out at temperatures less than 100.degree. C. The liquid crystal material is a commercially made nematic curvilinear aligned phase (NCAP) film. The counter electrode is comprised of a plastic substrate coated with a transparent conductor, such as indium-doped tin oxide (ITO). By coupling the active matrix with NCAP, a high-information content can be provided in a bright, fully plastic package. Applications include any low cost portable electronics containing flat displays where ruggedization of the display is desired.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Pattern and polarization measurements of integrated-circuit spiral antennas at 10-μm wavelength

NASA Astrophysics Data System (ADS)

MacDonald, Michael E.; Grossman, Erich N.

1996-12-01

Radiation patterns are presented for planar equiangular spiral antennas at wavelengths of approximately 10 micrometers . These antennas are fabricated using integrated-circuit processes on silicon substrates and are coupled through dielectric lenses. Patterns are presented over a full 2D scan for orthogonal linear polarizations, and for left- circular (LCP) and right-circular (RCP) polarizations. The antennas respond preferentially to left-circularly polarized radiation, as expected for the left-handed sense of the spiral arms. Cross-polarization ratios as large as 10 dB in circular polarization are obtained, corresponding to an axial ratio of 1.2. No difference in response between horizontally and vertically polarized radiation is observed, as expected for circularly polarized antennas. Directivities as large as 14 dB in left-circular polarization have been obtained. The cross-polarized directivity is considerably lower than the co-polarized directivity. All patterns are approximately circularly symmetric about the (theta) equals 0 axis. The cross-polarization ratio and pattern symmetry strongly depend on the alignment of the antenna and detector response is antenna coupled, even at radiation wavelength of the same order of magnitude as the resolution limit of the optical lithography used to define the antenna geometry.

Materials and processing approaches for foundry-compatible transient electronics.

PubMed

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A; Song, Enming; Yu, Xinge; Rogers, John A

2017-07-11

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for "green" electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are ( i ) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, ( ii ) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and ( iii ) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate.

PubMed

Jung, Suk Won; Shin, Jong Yoon; Pi, Kilwha; Goo, Yong Sook; Cho, Dong-Il Dan

2016-12-01

This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW)-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 ( rd1 ) mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

Materials and processing approaches for foundry-compatible transient electronics

NASA Astrophysics Data System (ADS)

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-07-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

NASA Astrophysics Data System (ADS)

Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

2016-09-01

Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

High Reliability of 0.1 μm InGaAs/InAlAs/InP High Electron Mobility Transistors Microwave Monolithic Integrated Circuit on 3-inch InP Substrates

NASA Astrophysics Data System (ADS)

Chou, Yeong-Chang; Leung, Denise; Lai, Richard; Grundbacher, Ron; Scarpulla, John; Barsky, Mike; Nishimoto, Matt; Eng, David; Liu, Po-Hsin; Oki, Aaron; Streit, Dwight

2002-02-01

The high-reliability performance of K-band microwave monolithic integrated circuit (MMIC) amplifiers fabricated with 0.1 μm gate length InGaAs/InAlAs/InP high electron mobility transistors (HEMTs) on 3-inch wafers using a high volume production process technology is reported. Operating at an accelerated life test condition of Vds=1.5 V and Ids=150 mA/mm, two-stage balanced amplifiers were lifetested at two-temperatures (T1=230°C, and T2=250°C) in nitrogen ambient. The activation energy (Ea) is as high as 1.5 eV, achieving a projected median-time-to-failure (MTTF) >1× 106 h at a 125°C of junction temperature. MTTF was determined by 2-temperature constant current stress using |Δ S21|>1.0 dB as the failure criteria. This is the first report of high reliability 0.1 μm InGaAs/InAlAs/InP HEMT MMICs based on small-signal microwave characteristics. This result demonstrates a reliable InGaAs/InAlAs/InP HEMT production technology.

Microwave evaluation of electromigration susceptibility in advanced interconnects.

PubMed

Sunday, Christopher E; Veksler, Dmitry; Cheung, Kin C; Obeng, Yaw S

2017-11-07

Traditional metrology has been unable to adequately address the needs of the emerging integrated circuits (ICs) at the nano scale; thus, new metrology and techniques are needed. For example, the reliability challenges in fabrication need to be well understood and controlled to facilitate mass production of through-substrate-via (TSV) enabled three-dimensional integrated circuits (3D-ICs). This requires new approaches to the metrology. In this paper, we use the microwave propagation characteristics to study the reliability issues that precede the physical damage caused by electromigration in the Cu-filled TSVs. The pre-failure microwave insertion losses and group delay are dependent on both the device temperature and the amount of current forced through the devices-under-test. The microwave insertion losses increase with the increase in the test temperature, while the group delay increases with the increase in the forced direct current magnitude. The microwave insertion losses are attributed to the defect mobility at the Cu-TiN interface, and the group delay changes are due to resistive heating in the interconnects, which perturbs the dielectric properties of the cladding dielectrics of the copper fill in the TSVs. https://doi.org/10.1063/1.4992135.

The hybrid photonic planar integrated receiver with a polymer optical waveguide

NASA Astrophysics Data System (ADS)

Busek, Karel; Jerábek, Vitezslav; Armas Arciniega, Julio; Prajzler, Václav

2008-11-01

This article describes design of the photonic receiver composed of the system polymer planar waveguides, InGaAs p-i-n photodiode and integrated HBT amplifier on a low loss composite substrate. The photonic receiver was the main part of the hybrid integrated microwave optoelectronic transceiver TRx (transciever TRx) for the optical networks PON (passive optical networks) with FTTH (fiber-to-the-home) topology. In this article are presented the research results of threedimensional field between output facet of a optical waveguide and p-i-n photodiode. In terms of our research, there was optimized the optical coupling among the facet waveguide and pi-n photodiode and the electrical coupling among p-i-n photodiode and input of HBT amplifier. The hybrid planar lightwave circuit (PLC) of the transceiver TRx will be composed from a two parts - polymer optical waveguide including VHGT filter section and a optoelectronic microwave section.

Ultra-wideband Ge-rich silicon germanium integrated Mach-Zehnder interferometer for mid-infrared spectroscopy.

PubMed

Vakarin, Vladyslav; Ramírez, Joan Manel; Frigerio, Jacopo; Ballabio, Andrea; Le Roux, Xavier; Liu, Qiankun; Bouville, David; Vivien, Laurent; Isella, Giovanni; Marris-Morini, Delphine

2017-09-01

This Letter explores the use of Ge-rich Si 0.2 Ge 0.8 waveguides on graded Si 1-x Ge x substrate for the demonstration of ultra-wideband photonic integrated circuits in the mid-infrared (mid-IR) wavelength range. We designed, fabricated, and characterized broadband Mach-Zehnder interferometers fully covering a range of 3 μm in the mid-IR band. The fabricated devices operate indistinctly in quasi-TE and quasi-TM polarizations, and have an extinction ratio higher than 10 dB over the entire operating wavelength range. The obtained results are in good correlation with theoretical predictions, while numerical simulations indicate that the device bandwidth can reach one octave with low additional losses. This Letter paves the way for further realization of mid-IR integrated spectrometers using low-index-contrast Si 1-x Ge x waveguides with high germanium concentration.

Kron-Branin modelling of ultra-short pulsed signal microelectrode

NASA Astrophysics Data System (ADS)

Xu, Zhifei; Ravelo, Blaise; Liu, Yang; Zhao, Lu; Delaroche, Fabien; Vurpillot, Francois

2018-06-01

An uncommon circuit modelling of microelectrode for ultra-short signal propagation is developed. The proposed model is based on the Tensorial Analysis of Network (TAN) using the Kron-Branin (KB) formalism. The systemic graph topology equivalent to the considered structure problem is established by assuming as unknown variables the branch currents. The TAN mathematical solution is determined after the KB characteristic matrix identification. The TAN can integrate various structure physical parameters. As proof of concept, via hole ended microelectrodes implemented on Kapton substrate were designed, fabricated and tested. The 0.1-MHz-to-6-GHz S-parameter KB model, simulation and measurement are in good agreement. In addition, time-domain analyses with nanosecond duration pulse signals were carried out to predict the microelectrode signal integrity. The modelled microstrip electrode is usually integrated in the atom probe tomography. The proposed unfamiliar KB method is particularly beneficial with respect to the computation speed and adaptability to various structures.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Reusable vibration resistant integrated circuit mounting socket

DOEpatents

Evans, Craig N.

1995-01-01

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

Extreme ultraviolet lithography machine

DOEpatents

Tichenor, Daniel A.; Kubiak, Glenn D.; Haney, Steven J.; Sweeney, Donald W.

2000-01-01

An extreme ultraviolet lithography (EUVL) machine or system for producing integrated circuit (IC) components, such as transistors, formed on a substrate. The EUVL machine utilizes a laser plasma point source directed via an optical arrangement onto a mask or reticle which is reflected by a multiple mirror system onto the substrate or target. The EUVL machine operates in the 10-14 nm wavelength soft x-ray photon. Basically the EUV machine includes an evacuated source chamber, an evacuated main or project chamber interconnected by a transport tube arrangement, wherein a laser beam is directed into a plasma generator which produces an illumination beam which is directed by optics from the source chamber through the connecting tube, into the projection chamber, and onto the reticle or mask, from which a patterned beam is reflected by optics in a projection optics (PO) box mounted in the main or projection chamber onto the substrate. In one embodiment of a EUVL machine, nine optical components are utilized, with four of the optical components located in the PO box. The main or projection chamber includes vibration isolators for the PO box and a vibration isolator mounting for the substrate, with the main or projection chamber being mounted on a support structure and being isolated.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

In(x)Ga(₁-x)As nanowires on silicon: one-dimensional heterogeneous epitaxy, bandgap engineering, and photovoltaics.

PubMed

Shin, Jae Cheol; Kim, Kyou Hyun; Yu, Ki Jun; Hu, Hefei; Yin, Leijun; Ning, Cun-Zheng; Rogers, John A; Zuo, Jian-Min; Li, Xiuling

2011-11-09

We report on the one-dimensional (1D) heteroepitaxial growth of In(x)Ga(1-x)As (x = 0.2-1) nanowires (NWs) on silicon (Si) substrates over almost the entire composition range using metalorganic chemical vapor deposition (MOCVD) without catalysts or masks. The epitaxial growth takes place spontaneously producing uniform, nontapered, high aspect ratio NW arrays with a density exceeding 1 × 10(8)/cm(2). NW diameter (∼30-250 nm) is inversely proportional to the lattice mismatch between In(x)Ga(1-x)As and Si (∼4-11%), and can be further tuned by MOCVD growth condition. Remarkably, no dislocations have been found in all composition In(x)Ga(1-x)As NWs, even though massive stacking faults and twin planes are present. Indium rich NWs show more zinc-blende and Ga-rich NWs exhibit dominantly wurtzite polytype, as confirmed by scanning transmission electron microscopy (STEM) and photoluminescence spectra. Solar cells fabricated using an n-type In(0.3)Ga(0.7)As NW array on a p-type Si(111) substrate with a ∼ 2.2% area coverage, operates at an open circuit voltage, V(oc), and a short circuit current density, J(sc), of 0.37 V and 12.9 mA/cm(2), respectively. This work represents the first systematic report on direct 1D heteroepitaxy of ternary In(x)Ga(1-x)As NWs on silicon substrate in a wide composition/bandgap range that can be used for wafer-scale monolithic heterogeneous integration for high performance photovoltaics.

Integrated coherent matter wave circuits

DOE PAGES

Ryu, C.; Boshier, M. G.

2015-09-21

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore » electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Wirelessly powered microfluidic dielectrophoresis devices using printable RF circuits.

PubMed

Qiao, Wen; Cho, Gyoujin; Lo, Yu-Hwa

2011-03-21

We report the first microfluidic device integrated with a printed RF circuit so the device can be wirelessly powered by a commercially available RFID reader. For conventional dielectrophoresis devices, electrical wires are needed to connect the electric components on the microchip to external equipment such as power supplies, amplifiers, function generators, etc. Such a procedure is unfamiliar to most clinicians and pathologists who are used to working with a microscope for examination of samples on microscope slides. The wirelessly powered device reported here eliminates the entire need for wire attachments and external instruments so the operators can use the device in essentially the same manner as they do with microscope slides. The integrated circuit can be fabricated on a flexible plastic substrate at very low cost using a roll-to-roll printing method. Electrical power at 13.56 MHz transmitted by a radio-frequency identification (RFID) reader is inductively coupled to the printed RFIC and converted into 10 V DC (direct current) output, which provides sufficient power to drive a microfluidic device to manipulate biological particles such as beads and proteins via the DC dielectrophoresis (DC-DEP) effect. To our best knowledge, this is the first wirelessly powered microfluidic dielectrophoresis device. Although the work is preliminary, the device concept, the architecture, and the core technology are expected to stimulate many efforts in the future and transform the technology to a wide range of clinical and point-of-care applications. This journal is © The Royal Society of Chemistry 2011

Thalamocortical mechanisms for integrating musical tone and rhythm

PubMed Central

Musacchia, Gabriella; Large, Edward

2014-01-01

Studies over several decades have identified many of the neuronal substrates of music perception by pursuing pitch and rhythm perception separately. Here, we address the question of how these mechanisms interact, starting with the observation that the peripheral pathways of the so-called “Core” and “Matrix” thalamocortical system provide the anatomical bases for tone and rhythm channels. We then examine the hypothesis that these specialized inputs integrate tonal content within rhythm context in auditory cortex using classical types of “driving” and “modulatory” mechanisms. This hypothesis provides a framework for deriving testable predictions about the early stages of music processing. Furthermore, because thalamocortical circuits are shared by speech and music processing, such a model provides concrete implications for how music experience contributes to the development of robust speech encoding mechanisms. PMID:24103509

Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

NASA Astrophysics Data System (ADS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

2015-10-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

Capable Copper Electrodeposition Process for Integrated Circuit - substrate Packaging Manufacturing

NASA Astrophysics Data System (ADS)

Ghanbari, Nasrin

This work demonstrates a capable reverse pulse deposition methodology to influence gap fill behavior inside microvia along with a uniform deposit in the fine line patterned regions for substrate packaging applications. Interconnect circuitry in IC substrate packages comprises of stacked microvia that varies in depth from 20microm to 100microm with an aspect ratio of 0.5 to 1.5 and fine line patterns defined by photolithography. Photolithography defined pattern regions incorporate a wide variety of feature sizes including large circular pad structures with diameter of 20microm - 200microm, fine traces with varying widths of 3microm - 30microm and additional planar regions to define a IC substrate package. Electrodeposition of copper is performed to establish the desired circuit. Electrodeposition of copper in IC substrate applications holds certain unique challenges in that they require a low cost manufacturing process that enables a void-free gap fill inside the microvia along with uniform deposition of copper on exposed patterned regions. Deposition time scales to establish the desired metal thickness for such packages could range from several minutes to few hours. This work showcases a reverse pulse electrodeposition methodology that achieves void-free gap fill inside the microvia and uniform plating in FLS (Fine Lines and Spaces) regions with significantly higher deposition rates than traditional approaches. In order to achieve this capability, systematic experimental and simulation studies were performed. A strong correlation of independent parameters that govern the electrodeposition process such as bath temperature, reverse pulse plating parameters and the ratio of electrolyte concentrations is shown to the deposition kinetics and deposition uniformity in fine patterned regions and gap fill rate inside the microvia. Additionally, insight into the physics of via fill process is presented with secondary and tertiary current simulation efforts. Such efforts lead to show "smart" control of deposition rate at the top and bottom of via to avoid void formation. Finally, a parametric effect on grain size and the ensuing copper metallurgical characteristics of bulk copper is also shown to enable high reliability substrate packages for the IC packaging industry.

High-density stretchable microelectrode arrays: An integrated technology platform for neural and muscular surface interfacing

NASA Astrophysics Data System (ADS)

Guo, Liang

2011-12-01

Numerous applications in neuroscience research and neural prosthetics, such as retinal prostheses, spinal-cord surface stimulation for prosthetics, electrocorticogram (ECoG) recording for epilepsy detection, etc., involve electrical interaction with soft excitable tissues using a surface stimulation and/or recording approach. These applications require an interface that is able to set up electrical communications with a high throughput between electronics and the excitable tissue and that can dynamically conform to the shape of the soft tissue. Being a compliant and biocompatible material with mechanical impedance close to that of soft tissues, polydimethylsiloxane (PDMS) offers excellent potential as the substrate material for such neural interfaces. However, fabrication of electrical functionalities on PDMS has long been very challenging. This thesis work has successfully overcome many challenges associated with PDMS-based microfabrication and achieved an integrated technology platform for PDMS-based stretchable microelectrode arrays (sMEAs). This platform features a set of technological advances: (1) we have fabricated uniform current density profile microelectrodes as small as 10 mum in diameter; (2) we have patterned high-resolution (feature as small as 10 mum), high-density (pitch as small as 20 mum) thin-film gold interconnects on PDMS substrate; (3) we have developed a multilayer wiring interconnect technology within the PDMS substrate to further boost the achievable integration density of such sMEA; and (4) we have invented a bonding technology---via-bonding---to facilitate high-resolution, high-density integration of the sMEA with integrated circuits (ICs) to form a compact implant. Taken together, this platform provides a high-resolution, high-density integrated system solution for neural and muscular surface interfacing. sMEAs of example designs are evaluated through in vitro and in vivo experimentations on their biocompatibility, surface conformability, and surface recording/stimulation capabilities, with a focus on epimysial (i.e. on the surface of muscle) applications. Finally, as an example medical application, we investigate a prosthesis for unilateral vocal cord paralysis (UVCP) based on simultaneous multichannel epimysial recording and stimulation.

Promising features of low-temperature grown Ge nanostructures on Si(001) substrates

NASA Astrophysics Data System (ADS)

Wang, Ze; Wang, Shuguang; Yin, Yefei; Liu, Tao; Lin, Dongdong; Li, De-hui; Yang, Xinju; Jiang, Zuimin; Zhong, Zhenyang

2017-03-01

High-quality Ge nanostructures are obtained by molecular beam epitaxy of Ge on Si(001) substrates at 200 °C and ex situ annealing at 400 °C. Their structural properties are comprehensively characterized by atomic force microscopy, transmission electron microscopy and Raman spectroscopy. It is disclosed that they are almost defect free except for some defects at the Ge/Si interface and in the subsequent Si capping layer. The misfit strain in the nanostructure is substantially relaxed. Dramatically strong photoluminescence (PL) from the Ge nanostructures is observed. Detailed analyses on the power- and temperature-dependent PL spectra, together with a self-consistent calculation, indicate the confinement and the high quantum efficiency of excitons within the Ge nanostructures. Our results demonstrate that the Ge nanostructures obtained via the present feasible route may have great potential in optoelectronic devices for monolithic optical-electronic integration circuits.

Six networks on a universal neuromorphic computing substrate.

PubMed

Pfeil, Thomas; Grübl, Andreas; Jeltsch, Sebastian; Müller, Eric; Müller, Paul; Petrovici, Mihai A; Schmuker, Michael; Brüderle, Daniel; Schemmel, Johannes; Meier, Karlheinz

2013-01-01

In this study, we present a highly configurable neuromorphic computing substrate and use it for emulating several types of neural networks. At the heart of this system lies a mixed-signal chip, with analog implementations of neurons and synapses and digital transmission of action potentials. Major advantages of this emulation device, which has been explicitly designed as a universal neural network emulator, are its inherent parallelism and high acceleration factor compared to conventional computers. Its configurability allows the realization of almost arbitrary network topologies and the use of widely varied neuronal and synaptic parameters. Fixed-pattern noise inherent to analog circuitry is reduced by calibration routines. An integrated development environment allows neuroscientists to operate the device without any prior knowledge of neuromorphic circuit design. As a showcase for the capabilities of the system, we describe the successful emulation of six different neural networks which cover a broad spectrum of both structure and functionality.

Self-assembled single-crystal silicon circuits on plastic

PubMed Central

Stauth, Sean A.; Parviz, Babak A.

2006-01-01

We demonstrate the use of self-assembly for the integration of freestanding micrometer-scale components, including single-crystal, silicon field-effect transistors (FETs) and diffusion resistors, onto flexible plastic substrates. Preferential self-assembly of multiple microcomponent types onto a common platform is achieved through complementary shape recognition and aided by capillary, fluidic, and gravitational forces. We outline a microfabrication process that yields single-crystal, silicon FETs in a freestanding, powder-like collection for use with self-assembly. Demonstrations of self-assembled FETs on plastic include logic inverters and measured electron mobility of 592 cm2/V-s. Finally, we extend the self-assembly process to substrates each containing 10,000 binding sites and realize 97% self-assembly yield within 25 min for 100-μm-sized elements. High-yield self-assembly of micrometer-scale functional devices as outlined here provides a powerful approach for production of macroelectronic systems. PMID:16968780

Laser-Assisted Reduction of Highly Conductive Circuits Based on Copper Nitrate for Flexible Printed Sensors

NASA Astrophysics Data System (ADS)

Bai, Shi; Zhang, Shigang; Zhou, Weiping; Ma, Delong; Ma, Ying; Joshi, Pooran; Hu, Anming

2017-10-01

Stretchable electronic sensing devices are defining the path toward wearable electronics. High-performance flexible strain sensors attached on clothing or human skin are required for potential applications in the entertainment, health monitoring, and medical care sectors. In this work, conducting copper electrodes were fabricated on polydimethylsiloxane as sensitive stretchable microsensors by integrating laser direct writing and transfer printing approaches. The copper electrode was reduced from copper salt using laser writing rather than the general approach of printing with pre-synthesized copper or copper oxide nanoparticles. An electrical resistivity of 96 μΩ cm was achieved on 40-μm-thick Cu electrodes on flexible substrates. The motion sensing functionality successfully demonstrated a high sensitivity and mechanical robustness. This in situ fabrication method leads to a path toward electronic devices on flexible substrates.[Figure not available: see fulltext.

Six Networks on a Universal Neuromorphic Computing Substrate

PubMed Central

Pfeil, Thomas; Grübl, Andreas; Jeltsch, Sebastian; Müller, Eric; Müller, Paul; Petrovici, Mihai A.; Schmuker, Michael; Brüderle, Daniel; Schemmel, Johannes; Meier, Karlheinz

2013-01-01

In this study, we present a highly configurable neuromorphic computing substrate and use it for emulating several types of neural networks. At the heart of this system lies a mixed-signal chip, with analog implementations of neurons and synapses and digital transmission of action potentials. Major advantages of this emulation device, which has been explicitly designed as a universal neural network emulator, are its inherent parallelism and high acceleration factor compared to conventional computers. Its configurability allows the realization of almost arbitrary network topologies and the use of widely varied neuronal and synaptic parameters. Fixed-pattern noise inherent to analog circuitry is reduced by calibration routines. An integrated development environment allows neuroscientists to operate the device without any prior knowledge of neuromorphic circuit design. As a showcase for the capabilities of the system, we describe the successful emulation of six different neural networks which cover a broad spectrum of both structure and functionality. PMID:23423583

Thin-film chip-to-substrate interconnect and methods for making same

DOEpatents

Tuckerman, D.B.

1988-06-06

Integrated circuit chips are electrically connected to a silicon wafer interconnection substrate. Thin film wiring is fabricated down bevelled edges of the chips. A subtractive wire fabrication method uses a series of masks and etching steps to form wires in a metal layer. An additive method direct laser writes or deposits very thin lines which can then be plated up to form wires. A quasi-additive or subtractive/additive method forms a pattern of trenches to expose a metal surface which can nucleate subsequent electrolytic deposition of wires. Low inductance interconnections on a 25 micron pitch (1600 wires on a 1 cm square chip) can be produced. The thin film hybrid interconnect eliminates solder joints or welds, and minimizes the levels of metallization. Advantages include good electrical properties, very high wiring density, excellent backside contact, compactness, and high thermal and mechanical reliability. 6 figs.

Optical set-reset latch

DOEpatents

Skogen, Erik J.

2013-01-29

An optical set-reset (SR) latch is formed from a first electroabsorption modulator (EAM), a second EAM and a waveguide photodetector (PD) which are arranged in an optical and electrical feedback loop which controls the transmission of light through the first EAM to latch the first EAM in a light-transmissive state in response to a Set light input. A second waveguide PD controls the transmission of light through the second EAM and is used to switch the first EAM to a light-absorptive state in response to a Reset light input provided to the second waveguide PD. The optical SR latch, which may be formed on a III-V compound semiconductor substrate (e.g. an InP or a GaAs substrate) as a photonic integrated circuit (PIC), stores a bit of optical information and has an optical output for the logic state of that bit of information.

Thin-film chip-to-substrate interconnect and methods for making same

DOEpatents

Tuckerman, David B.

1991-01-01

Integrated circuit chips are electrically connected to a silica wafer interconnection substrate. Thin film wiring is fabricated down bevelled edges of the chips. A subtractive wire fabrication method uses a series of masks and etching steps to form wires in a metal layer. An additive method direct laser writes or deposits very thin metal lines which can then be plated up to form wires. A quasi-additive or subtractive/additive method forms a pattern of trenches to expose a metal surface which can nucleate subsequent electrolytic deposition of wires. Low inductance interconnections on a 25 micron pitch (1600 wires on a 1 cm square chip) can be produced. The thin film hybrid interconnect eliminates solder joints or welds, and minimizes the levels of metallization. Advantages include good electrical properties, very high wiring density, excellent backside contact, compactness, and high thermal and mechanical reliability.

A self-assembled synthesis of carbon nanotubes for interconnects.

PubMed

Chen, Zexiang; Cao, Guichuan; Lin, Zulun; Koehler, Irmgard; Bachmann, Peter K

2006-02-28

We report a novel approach to grow highly oriented, freestanding and structured carbon nanotubes (CNTs) between two substrates, using microwave plasma chemical vapour deposition. Sandwiched, multi-layered catalyst structures are employed to generate such structures. The as-grown CNTs adhere well to both the substrate and the top contact, and provide a low-resistance electric contact between the two. High-resolution scanning electron microscope (SEM) images show that the CNTs grow perpendicular to these surfaces. This presents a simple way to grow CNTs in different, predetermined directions in a single growth step. The overall resistance of a CNT bundle and two CNT-terminal contacts is measured to be about 14.7 k Ω. The corresponding conductance is close to the quantum limit conductance G(0). This illustrates that our new approach is promising for the direct assembly of CNT-based interconnects in integrated circuits (ICs) or other micro-electronic devices.

Development of Flexible Multilayer Circuits and Cables

NASA Technical Reports Server (NTRS)

Barnes, Kevin N.; Bryant, Robert; Holloway, Nancy; Draughon, Fred

2005-01-01

A continuing program addresses the development of flexible multilayer electronic circuits and associated flexible cables. This development is undertaken to help satisfy aerospace-system-engineering requirements for efficient, lightweight electrical and electronic subsystems that can fit within confined spaces, adhere to complexly shaped surfaces, and can be embedded within composite materials. Heretofore, substrate layers for commercial flexible circuitry have been made from sheets of Kapton (or equivalent) polyimide and have been bonded to copper conductors and to other substrate layers by means of adhesives. The substrates for the present developmental flexible circuitry are made from thin films of a polyimide known as LaRC(TM)-SI. This polyimide is thermoplastic and, therefore, offers the potential to eliminate delamination and the need for adhesives. The development work undertaken thus far includes experiments in the use of several techniques of design and fabrication (including computer-aided design and fabrication) of representative flexible circuits. Anticipated future efforts would focus on multilayer bonding, fabrication of prototypes, and overcoming limitations.

Low thermal resistance power module assembly

DOEpatents

Hassani, Vahab; Vlahinos, Andreas; Bharathan, Desikan

2010-12-28

A power module assembly (400) with low thermal resistance and enhanced heat dissipation to a cooling medium. The assembly includes a heat sink or spreader plate (410) with passageways or openings (414) for coolant that extend through the plate from a lower surface (411) to an upper surface (412). A circuit substrate (420) is provided and positioned on the spreader plate (410) to cover the coolant passageways. The circuit substrate (420) includes a bonding layer (422) configured to extend about the periphery of each of the coolant passageways and is made up of a substantially nonporous material. The bonding layer (422) may be solder material which bonds to the upper surface (412) of the plate to provide a continuous seal around the upper edge of each opening (414) in the plate. The assembly includes power modules (430) mounted on the circuit substrate (420) on a surface opposite the bonding layer (422). The power modules (430) are positioned over or proximal to the coolant passageways.

Integration of Indium Phosphide Based Devices with Flexible Substrates

NASA Astrophysics Data System (ADS)

Chen, Wayne Huai

2011-12-01

Flexible substrates have many advantages in applications where bendability, space, or weight play important roles or where rigid circuits are undesirable. However, conventional flexible thin film transistors are typically characterized as having low carrier mobility as compared to devices used in the electronics industry. This is in part due to the limited temperature tolerance of plastic flexible substrates, which commonly reduces the highest processing temperature to below 200°C. Common approaches of implementation include low temperature deposition of organic, amorphous, or polycrystalline semiconductors, all of which result in carrier mobility well below 100 cm2V -1s-1. High quality, single crystalline III-V semiconductors such as indium phosphide (InP), on the other hand, have carrier mobility well over 1000 cm 2V-1s-1 at room temperature, depending on carrier concentration. Recently, the ion-cut process has been used in conjunction with wafer bonding to integrate thin layers of III-V material onto silicon for optoelectronic applications. This approach has the advantage of high scalability, reusability of the initial III-V substrate, and the ability to tailor the location (depth) of the layer splitting. However, the transferred substrate usually suffers from hydrogen implantation damage. This dissertation demonstrates a new approach to enable integration of InP with various substrates, called the double-flip transfer process. The process combines ion-cutting with adhesive bonding. The problem of hydrogen implantation was overcome by patterned ion-cut transfer. In this type of transfer, areas of interest are shielded from implantation but still transferred by surrounding implanted regions. We found that patterned ion-cut transfer is strongly dependent upon crystal orientation and that using cleavage-plane oriented donors can be beneficial in transferring large areas of high quality semiconductor material. InP-based devices were fabricated to demonstrate the transfer process and test functionality following transfer. Passive devices (photodetectors) as well as active transistors were transferred and fabricated on various substrates. The transferred device layers were either implanted through with a blanket implant or protected with an ion-mask during implantation. Results demonstrate the viability of the double-flip ion-cut process in achieving very high electron mobility (˜2800 cm2V-1s-1) transistors on plastic flexible substrates.

Photonic integrated circuits based on novel glass waveguides and devices

NASA Astrophysics Data System (ADS)

Zhang, Yaping; Zhang, Deng; Pan, Weijian; Rowe, Helen; Benson, Trevor; Loni, Armando; Sewell, Phillip; Furniss, David; Seddon, Angela B.

2006-04-01

Novel materials, micro-, nano-scale photonic devices, and 'photonic systems on a chip' have become important focuses for global photonics research and development. This interest is driven by the rapidly growing demand for broader bandwidth in optical communication networks, and higher connection density in the interconnection area, as well as a wider range of application areas in, for example, health care, environment monitoring and security. Taken together, chalcogenide, heavy metal fluoride and fluorotellurite glasses offer transmission from ultraviolet to mid-infrared, high optical non-linearity and the ability to include active dopants, offering the potential for developing optical components with a wide range of functionality. Moreover, using single-mode large cross-section glass-based waveguides as an optical integration platform is an elegant solution for the monolithic integration of optical components, in which the glass-based structures act both as waveguides and as an optical bench for integration. We have previously developed a array of techniques for making photonic integrated circuits and devices based on novel glasses. One is fibre-on-glass (FOG), in which the fibres can be doped with different active dopants and pressed onto a glass substrate with a different composition using low-temperature thermal bonding under mechanical compression. Another is hot-embossing, in which a silicon mould is placed on top of a glass sample, and hot-embossing is carried out by applying heat and pressure. In this paper the development of a fabrication technique that combines the FOG and hot-embossing procedures to good advantage is described. Simulation and experimental results are presented.

Gbit/s-operation of graphene electro-absorption modulators in a passive polymer waveguide platform for data and telecommunications

NASA Astrophysics Data System (ADS)

Kleinert, M.; Reinke, P.; Bach, H.-G.; Brinker, W.; Zawadzki, C.; Dietrich, A.; de Felipe, D.; Keil, N.; Schell, M.

2017-02-01

Graphene with its high carrier mobility as well as its tunable light absorption is an attractive active material for highspeed electro-absorption modulators (EAMs). Large-area CVD-grown graphene monolayers can be transferred onto arbitrary substrates to add active optoelectronic properties to intrinsically passive photonic integration platforms. In this work, we present graphene-based EAMs integrated in passive polymer waveguides. To facilitate modulation frequencies in the GHz range, a 50 Ω termination resistor as well as a DC blocking capacitor are integrated with graphene EAMs for the first time. Large signal data transmission experiments were carried out across the O, C and L optical communications bands. The fastest devices exhibit a 3-dB bandwidth of more than 4 GHz. Our analytical model of the modulation response for the graphene-based EAMs is in good agreement with the measurement results. It predicts that bandwidths greater than 50 GHz are possible with future device iterations. Owing to the absorption properties of the graphene layers, the devices are expected to be functional at smaller wavelengths of interest for optical interconnects and data-communications as well, offering a novel flexibility for the integration of high-speed functionalities in optoelectronic integrated circuits. Our work is the first step towards an Active Optical Printed Circuit Board, hiding the optics completely inside the board and thus removing entry barriers in manufacturing. We believe this will lead to the same success as observed in Active Optical Cables for short range optically wired connections.

Radiation tolerant back biased CMOS VLSI

NASA Technical Reports Server (NTRS)

Maki, Gary K. (Inventor); Gambles, Jody W. (Inventor); Hass, Kenneth J. (Inventor)

2003-01-01

A CMOS circuit formed in a semiconductor substrate having improved immunity to total ionizing dose radiation, improved immunity to radiation induced latch up, and improved immunity to a single event upset. The architecture of the present invention can be utilized with the n-well, p-well, or dual-well processes. For example, a preferred embodiment of the present invention is described relative to a p-well process wherein the p-well is formed in an n-type substrate. A network of NMOS transistors is formed in the p-well, and a network of PMOS transistors is formed in the n-type substrate. A contact is electrically coupled to the p-well region and is coupled to first means for independently controlling the voltage in the p-well region. Another contact is electrically coupled to the n-type substrate and is coupled to second means for independently controlling the voltage in the n-type substrate. By controlling the p-well voltage, the effective threshold voltages of the n-channel transistors both drawn and parasitic can be dynamically tuned. Likewise, by controlling the n-type substrate, the effective threshold voltages of the p-channel transistors both drawn and parasitic can also be dynamically tuned. Preferably, by optimizing the threshold voltages of the n-channel and p-channel transistors, the total ionizing dose radiation effect will be neutralized and lower supply voltages can be utilized for the circuit which would result in the circuit requiring less power.

Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects.

PubMed

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Oh, Jin Hyuk; Kim, Sun Ae; Park, Jaegyu; Kim, Sanggi

2015-06-10

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.

A skin-integrated transparent and stretchable strain sensor with interactive color-changing electrochromic displays.

PubMed

Park, Heun; Kim, Dong Sik; Hong, Soo Yeong; Kim, Chulmin; Yun, Jun Yeong; Oh, Seung Yun; Jin, Sang Woo; Jeong, Yu Ra; Kim, Gyu Tae; Ha, Jeong Sook

2017-06-08

In this study, we report on the development of a stretchable, transparent, and skin-attachable strain sensor integrated with a flexible electrochromic device as a human skin-inspired interactive color-changing system. The strain sensor consists of a spin-coated conductive nanocomposite film of poly(vinyl alcohol)/multi-walled carbon nanotube/poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) on a polydimethylsiloxane substrate. The sensor exhibits excellent performance of high sensitivity, high durability, fast response, and high transparency. An electrochromic device (ECD) made of electrochemically synthesized polyaniline nanofibers and V 2 O 5 on an indium-tin-oxide-coated polyethylene terephthalate film experiences a change in color from yellow to dark blue on application of voltage. The strain sensor and ECD are integrated on skin via an Arduino circuit for an interactive color change with the variation of the applied strain, which enables a real-time visual display of body motion. This integrated system demonstrates high potential for use in interactive wearable devices, military applications, and smart robots.

Wideband monolithically integrated front-end subsystems and components

NASA Astrophysics Data System (ADS)

Mruk, Joseph Rene

This thesis presents the analysis, design, and measurements of passive, monolithically integrated, wideband recta-coax and printed circuit board front-end components. Monolithic fabrication of antennas, impedance transformers, filters, and transitions lowers manufacturing costs by reducing assembly time and enhances performance by removing connectors and cabling between the devices. Computational design, fabrication, and measurements are used to demonstrate the capabilities of these front-end assemblies. Two-arm wideband planar log-periodic antennas fed using a horizontal feed that allows for filters and impedance transformers to be readily fabricated within the radiating region of the antenna are demonstrated. At microwave frequencies, low-cost printed circuit board processes are typically used to produce planar devices. A 1.8 to 11 GHz two-arm planar log-periodic antenna is designed with a monolithically integrated impedance transformer. Band rejection methods based on modifying the antenna aperture, use of an integrated filter, and the application of both methods are investigated with realized gain suppressions of over 25 dB achieved. The ability of standard circuit board technology to fabricate millimeter-wave devices up to 110 GHz is severely limited. Thin dielectrics are required to prevent the excitation of higher order modes in the microstrip substrate. Fabricating the thin line widths required for the antenna aperture also becomes prohibitively challenging. Surface micro-machining typically used in the fabrication of MEMS devices is capable of producing the extremely small features that can be used to fabricate antennas extending through W-band. A directly RF fed 18 to 110 GHz planar log-periodic antenna is developed. The antenna is fabricated with an integrated impedance transformer and additional transitions for measurement characterization. Singly terminated low-loss wideband millimeter-wave filters operating over V- and W- band are developed. High quality performance of an 18 to 100 GHz front-end is realized by dividing the single instantaneous antenna into two apertures operating from 18 to 50 and 50 to 100 GHz. Each channel features an impedance transformer, low-pass (low-frequency) or band-pass (high-frequency) filter, and grounded CPW launch. This dual-aperture front-end demonstrates that micromachining technology is now capable of fabricating broadband millimeter-wave components with a high degree of integration.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend

PubMed Central

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-01-01

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d;2′,3′-d′]benzo[1,2-b;4,5-b′]dithiophene (DTBDT-C6) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm2 V−1 s−1 at low operation voltage of −5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas. PMID:27698493

Reflective small angle electron scattering to characterize nanostructures on opaque substrates

NASA Astrophysics Data System (ADS)

Friedman, Lawrence H.; Wu, Wen-Li; Fu, Wei-En; Chien, Yunsan

2017-09-01

Feature sizes in integrated circuits (ICs) are often at the scale of 10 nm and are ever shrinking. ICs appearing in today's computers and hand held devices are perhaps the most prominent examples. These smaller feature sizes demand equivalent advances in fast and accurate dimensional metrology for both development and manufacturing. Techniques in use and continuing to be developed include X-ray based techniques, optical scattering, and of course the electron and scanning probe microscopy techniques. Each of these techniques has their advantages and limitations. Here, the use of small angle electron beam scattering measurements in a reflection mode (RSAES) to characterize the dimensions and the shape of nanostructures on flat and opaque substrates is demonstrated using both experimental and theoretical evidence. In RSAES, focused electrons are scattered at angles smaller than 1 ° with the assistance of electron optics typically used in transmission electron microscopy. A proof-of-concept experiment is combined with rigorous electron reflection simulations to demonstrate the efficiency and accuracy of RSAES as a method of non-destructive measurement of shapes of features less than 10 nm in size on flat and opaque substrates.

Reflective Small Angle Electron Scattering to Characterize Nanostructures on Opaque Substrates.

PubMed

Friedman, Lawrence H; Wu, Wen-Li; Fu, Wei-En; Chien, Yunsan

2017-09-01

Features sizes in integrated circuits (ICs) are often at the scale of 10 nm and are ever shrinking. ICs appearing in today's computers and hand held devices are perhaps the most prominent examples. These smaller feature sizes demand equivalent advances in fast and accurate dimensional metrology for both development and manufacturing. Techniques in use and continuing to be developed include X-ray based techniques, optical scattering and of course the electron and scanning probe microscopy techniques. Each of these techniques have their advantages and limitations. Here the use of small angle electron beam scattering measurements in a reflection mode (RSAES) to characterize the dimensions and the shape of nanostructures on flat and opaque substrates is demonstrated using both experimental and theoretical evidence. In RSAES, focused electrons are scattered at angles smaller than 1° with the assistance of electron optics typically used in transmission electron microscopy. A proof-of-concept experiment is combined with rigorous electron reflection simulations to demonstrate the efficiency and accuracy of RSAES as a method of non-destructive measurement of shapes of features less than 10 nm in size on flat and opaque substrates.

Preparation and Characterization of Biofunctionalized Inorganic Substrates.

PubMed

Dugger, Jason W; Webb, Lauren J

2015-09-29

Integrating the function of biological molecules into traditional inorganic materials and substrates couples biologically relevant function to synthetic devices and generates new materials and capabilities by combining biological and inorganic functions. At this so-called "bio/abio interface," basic biological functions such as ligand binding and catalysis can be co-opted to detect analytes with exceptional sensitivity or to generate useful molecules with chiral specificity under entirely benign reaction conditions. Proteins function in dynamic, complex, and crowded environments (the living cell) and are therefore appropriate for integrating into multistep, multiscale, multimaterial devices such as integrated circuits and heterogeneous catalysts. However, the goal of reproducing the highly specific activities of biomolecules in the perturbed chemical and electrostatic environment at an inorganic interface while maintaining their native conformations is challenging to achieve. Moreover, characterizing protein structure and function at a surface is often difficult, particularly if one wishes to compare the activity of the protein to that of the dilute, aqueous solution phase. Our laboratory has developed a general strategy to address this challenge by taking advantage of the structural and chemical properties of alkanethiol self-assembled monolayers (SAMs) on gold surfaces that are functionalized with covalently tethered peptides. These surface-bound peptides then act as the chemical recognition element for a target protein, generating a biomimetic surface in which protein orientation, structure, density, and function are controlled and variable. Herein we discuss current research and future directions related to generating a chemically tunable biofunctionalization strategy that has potential to successfully incorporate the highly specialized functions of proteins onto inorganic substrates.

Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

A photonic circuit for complementary frequency shifting, in-phase quadrature/single sideband modulation and frequency multiplication: analysis and integration feasibility

NASA Astrophysics Data System (ADS)

Hasan, Mehedi; Hu, Jianqi; Nikkhah, Hamdam; Hall, Trevor

2017-08-01

A novel photonic integrated circuit architecture for implementing orthogonal frequency division multiplexing by means of photonic generation of phase-correlated sub-carriers is proposed. The circuit can also be used for implementing complex modulation, frequency up-conversion of the electrical signal to the optical domain and frequency multiplication. The principles of operation of the circuit are expounded using transmission matrices and the predictions of the analysis are verified by computer simulation using an industry-standard software tool. Non-ideal scenarios that may affect the correct function of the circuit are taken into consideration and quantified. The discussion of integration feasibility is illustrated by a photonic integrated circuit that has been fabricated using 'library' components and which features most of the elements of the proposed circuit architecture. The circuit is found to be practical and may be fabricated in any material platform that offers a linear electro-optic modulator such as organic or ferroelectric thin films hybridized with silicon photonics.

GaAs Optoelectronic Integrated-Circuit Neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H.; Kim, Jae H.; Psaltis, Demetri

1992-01-01

Monolithic GaAs optoelectronic integrated circuits developed for use as artificial neurons. Neural-network computer contains planar arrays of optoelectronic neurons, and variable synaptic connections between neurons effected by diffraction of light from volume hologram in photorefractive material. Basic principles of neural-network computers explained more fully in "Optoelectronic Integrated Circuits For Neural Networks" (NPO-17652). In present circuits, devices replaced by metal/semiconductor field effect transistors (MESFET's), which consume less power.

Substrate With Low Secondary Emissions

NASA Technical Reports Server (NTRS)

Jensen, Kenneth A. (Inventor); Curren, Arthur N. (Inventor); Roman, Robert F. (Inventor)

2000-01-01

The present invention is directed to a method and apparatus for producing a highly -textured surface on a copper substrate -with only extremely small amounts of texture-inducing seeding or masking material. The texture-inducing seeding material is delivered to the copper substrate electrically switching the seeding material in and out of a circuit loop.

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Semicustom integrated circuits and the standard transistor array radix (STAR)

NASA Technical Reports Server (NTRS)

Edge, T. M.

1977-01-01

The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.

Subsurface microscopy of interconnect layers of an integrated circuit.

PubMed

Köklü, F Hakan; Unlü, M Selim

2010-01-15

We apply the NA-increasing lens technique to confocal and wide-field backside microscopy of integrated circuits. We demonstrate 325 nm (lambda(0)/4) lateral spatial resolution while imaging metal structures located inside the interconnect layer of an integrated circuit. Vectorial field calculations are presented justifying our findings.

Postirradiation Effects In Integrated Circuits

NASA Technical Reports Server (NTRS)

Shaw, David C.; Barnes, Charles E.

1993-01-01

Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-06

... INTERNATIONAL TRADE COMMISSION [Docket No. 2899] Certain Integrated Circuit Packages Provided With... complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and..., telephone (202) 205-2000. The public version of the complaint can be accessed on the Commission's electronic...

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

Solitonic guides in photopolymerizable materials for optical devices

NASA Astrophysics Data System (ADS)

Dorkenoo, Kokou D.; Cregut, Olivier; Fort, Alain

2003-11-01

These last twenty years, advanced studies in integrated optics have demonstrated the capacity to elaborate optical circuits in planar substrates. Most of the optical integrated devices are realized on glass substrate and the guide areas are usually obtained by photolithography techniques. We present here a new approach based on the use of compounds photopolymerizable in the visible range. The conditions of self written channel creation by solitonic propagation inside the bulk of the photopolymerizable formulation are analyzed. Waveguides can be self-written in photopolymerizable materials1,2 due to the dependence of their refractive index on intensity and duration of the active light. This process results from the competition between the diffraction of the incident Gaussian beam and the photopolymerization which tends to increase the refractive index where light intensity is the highest. By controlling the difference between the refractive index values of the polymerized and non polymerized zones, the beam can be self-trapped along the propagation axis giving rise to a waveguide over distances as large as 10 cm without any broadening. Such permanent waveguides can be structured by inscription of gratings and doped with a dye in a plastic cell leading to the elaboration of a completely plastic laser.

Low temperature synthesis of highly oriented p-type Si1-xGex (x: 0-1) on an insulator by Al-induced layer exchange

NASA Astrophysics Data System (ADS)

Toko, K.; Kusano, K.; Nakata, M.; Suemasu, T.

2017-10-01

A composition tunable Si1-xGex alloy has a wide range of applications, including in electronic and photonic devices. We investigate the Al-induced layer exchange (ALILE) growth of amorphous Si1-xGex on an insulator. The ALILE allowed Si1-xGex to be large grained (> 50 μm) and highly (111)-oriented (> 95%) over the whole composition range by controlling the growth temperature (≤ 400 °C). From a comparison with conventional solid-phase crystallization, we determined that such characteristics of the ALILE arose from the low activation energy of nucleation and the high frequency factor of lateral growth. The Si1-xGex layers were highly p-type doped, whereas the process temperatures were low, thanks to the electrically activated Al atoms with the amount of solid solubility limit. The electrical conductivities approached those of bulk single crystals within one order of magnitude. The resulting Si1-xGex layer on an insulator is useful not only for advanced SiGe-based devices but also for virtual substrates, allowing other materials to be integrated on three-dimensional integrated circuits, glass, and even a plastic substrate.

Metallic nanoparticle-based strain sensors elaborated by atomic layer deposition

NASA Astrophysics Data System (ADS)

Puyoo, E.; Malhaire, C.; Thomas, D.; Rafaël, R.; R'Mili, M.; Malchère, A.; Roiban, L.; Koneti, S.; Bugnet, M.; Sabac, A.; Le Berre, M.

2017-03-01

Platinum nanoparticle-based strain gauges are elaborated by means of atomic layer deposition on flexible polyimide substrates. Their electro-mechanical response is tested under mechanical bending in both buckling and conformational contact configurations. A maximum gauge factor of 70 is reached at a strain level of 0.5%. Although the exponential dependence of the gauge resistance on strain is attributed to the tunneling effect, it is shown that the majority of the junctions between adjacent Pt nanoparticles are in a short circuit state. Finally, we demonstrate the feasibility of an all-plastic pressure sensor integrating Pt nanoparticle-based strain gauges in a Wheatstone bridge configuration.

Analysis and characterizations of planar transmission structures and components for superconducting and monolithic integrated circuits

NASA Technical Reports Server (NTRS)

Itoh, Tatsuo

1991-01-01

The analysis and modeling of superconducting planar transmission lines were performed. Theoretically, the highest possible Q values of superconducting microstrip line was calculated and, as a result, it provided the Q value that the experiment can aim for. As an effort to search for a proper superconducting transmission line structure, the superconducting microstrip line and coplanar waveguide were compared in terms of loss characteristics and their design aspects. Also, the research was expanded to a superconducting coplanar waveguide family in the microwave packaging environment. Theoretically, it was pointed out that the substrate loss is critical in the superconducting transmission line structures.

Resistive hydrogen sensing element

DOEpatents

Lauf, Robert J.

2000-01-01

Systems and methods are described for providing a hydrogen sensing element with a more robust exposed metallization by application of a discontinuous or porous overlay to hold the metallization firmly on the substrate. An apparatus includes: a substantially inert, electrically-insulating substrate; a first Pd containing metallization deposited upon the substrate and completely covered by a substantially hydrogen-impermeable layer so as to form a reference resistor on the substrate; a second Pd containing metallization deposited upon the substrate and at least a partially accessible to a gas to be tested, so as to form a hydrogen-sensing resistor; a protective structure disposed upon at least a portion of the second Pd containing metallization and at least a portion of the substrate to improve the attachment of the second Pd containing metallization to the substrate while allowing the gas to contact said the second Pd containing metallization; and a resistance bridge circuit coupled to both the first and second Pd containing metallizations. The circuit determines the difference in electrical resistance between the first and second Pd containing metallizations. The hydrogen concentration in the gas may be determined. The systems and methods provide advantages because adhesion is improved without adversely effecting measurement speed or sensitivity.

Flexible piezoelectric nanogenerator in wearable self-powered active sensor for respiration and healthcare monitoring

NASA Astrophysics Data System (ADS)

Liu, Z.; Zhang, S.; Jin, Y. M.; Ouyang, H.; Zou, Y.; Wang, X. X.; Xie, L. X.; Li, Z.

2017-06-01

A wearable self-powered active sensor for respiration and healthcare monitoring was fabricated based on a flexible piezoelectric nanogenerator. An electrospinning poly(vinylidene fluoride) thin film on silicone substrate was polarized to fabricate the flexible nanogenerator and its electrical property was measured. When periodically stretched by a linear motor, the flexible piezoelectric nanogenerator generated an output open-circuit voltage and short-circuit current of up to 1.5 V and 400 nA, respectively. Through integration with an elastic bandage, a wearable self-powered sensor was fabricated and used to monitor human respiration, subtle muscle movement, and voice recognition. As respiration proceeded, the electrical output signals of the sensor corresponded to the signals measured by a physiological signal recording system with good reliability and feasibility. This self-powered, wearable active sensor has significant potential for applications in pulmonary function evaluation, respiratory monitoring, and detection of gesture and vocal cord vibration for the personal healthcare monitoring of disabled or paralyzed patients.

Materials for Stretchable Electronics - Electronic Eyeballs, Brain Monitors and Other Applications

ScienceCinema

Rogers, John A. [University of Illinois, Urbana Champaign, Illinois, United States

2017-12-09

Electronic circuits that involve transistors and related components on thin plastic sheets or rubber slabs offer mechanical properties (e.g. bendability, stretchability) and other features (e.g. lightweight, rugged construction) which cannot be easily achieved with technologies that use rigid, fragile semiconductor wafer or glass substrates.  Device examples include personal or structural health monitors and electronic eye imagers, in which the electronics must conform to complex curvilinear shapes or flex/stretch during use.  Our recent work accomplishes these technology outcomes by use of single crystal inorganic nanomaterials in ‘wavy’ buckled configurations on elastomeric supports.  This talk will describe key fundamental materials and mechanics aspects of these approaches, as well as engineering features of their use in individual transistors, photodiodes and integrated circuits.  Cardiac and brain monitoring devices provide examples of application in biomedicine; hemispherical electronic eye cameras illustrate new capacities for bio-inspired device design.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Neuromechanics of crawling in D. melanogaster larvae

NASA Astrophysics Data System (ADS)

Pehlevan, Cengiz; Paoletti, Paolo; Mahadevan, L.

2015-03-01

Nervous system, body and environment interact in non-trivial ways to generate locomotion and thence behavior in an organism. Here we present a minimal integrative mathematical model to describe the simple behavior of forward crawling in Drosophila larvae. Our model couples the excitation-inhibition circuits in the nervous system to force production in the muscles and body movement in a frictional environment, which in turn leads to a proprioceptive signal that feeds back to the nervous system. Our results explain the basic observed phenomenology of crawling with or without proprioception, and elucidate the stabilizing role of proprioception in crawling with respect to external and internal perturbations. Our integrated approach allows us to make testable predictions on the effect of changing body-environment interactions on crawling, and serves as a substrate for the development of hierarchical models linking cellular processes to behavior.

Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

PubMed

Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

GaSb thermophotovoltaic cells grown on GaAs by molecular beam epitaxy using interfacial misfit arrays

DOE Office of Scientific and Technical Information (OSTI.GOV)

Juang, Bor-Chau, E-mail: bcjuang@ucla.edu; Laghumavarapu, Ramesh B.; Foggo, Brandon J.

There exists a long-term need for foreign substrates on which to grow GaSb-based optoelectronic devices. We address this need by using interfacial misfit arrays to grow GaSb-based thermophotovoltaic cells directly on GaAs (001) substrates and demonstrate promising performance. We compare these cells to control devices grown on GaSb substrates to assess device properties and material quality. The room temperature dark current densities show similar characteristics for both cells on GaAs and on GaSb. Under solar simulation the cells on GaAs exhibit an open-circuit voltage of 0.121 V and a short-circuit current density of 15.5 mA/cm{sup 2}. In addition, the cells on GaAsmore » substrates maintain 10% difference in spectral response to those of the control cells over a large range of wavelengths. While the cells on GaSb substrates in general offer better performance than the cells on GaAs substrates, the cost-savings and scalability offered by GaAs substrates could potentially outweigh the reduction in performance. By further optimizing GaSb buffer growth on GaAs substrates, Sb-based compound semiconductors grown on GaAs substrates with similar performance to devices grown directly on GaSb substrates could be realized.« less

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... that there exists a domestic industry with respect to each of the asserted patents. The complaint named...

Effect of dislocations on the open-circuit voltage, short-circuit current and efficiency of heteroepitaxial indium phosphide solar cells

NASA Technical Reports Server (NTRS)

Jain, Raj K.; Flood, Dennis J.

1990-01-01

Excellent radiation resistance of indium phosphide solar cells makes them a promising candidate for space power applications, but the present high cost of starting substrates may inhibit their large scale use. Thin film indium phosphide cells grown on Si or GaAs substrates have exhibited low efficiencies, because of the generation and propagation of large number of dislocations. Dislocation densities were calculated and its influence on the open circuit voltage, short circuit current, and efficiency of heteroepitaxial indium phosphide cells was studied using the PC-1D. Dislocations act as predominant recombination centers and are required to be controlled by proper transition layers and improved growth techniques. It is shown that heteroepitaxial grown cells could achieve efficiencies in excess of 18 percent AMO by controlling the number of dislocations. The effect of emitter thickness and surface recombination velocity on the cell performance parameters vs. dislocation density is also studied.

Surface-Embedded Stretchable Electrodes by Direct Printing and their Uses to Fabricate Ultrathin Vibration Sensors and Circuits for 3D Structures.

PubMed

Song, Jun Hyuk; Kim, Young-Tae; Cho, Sunghwan; Song, Woo-Jin; Moon, Sungmin; Park, Chan-Gyung; Park, Soojin; Myoung, Jae Min; Jeong, Unyong

2017-11-01

Printing is one of the easy and quick ways to make a stretchable wearable electronics. Conventional printing methods deposit conductive materials "on" or "inside" a rubber substrate. The conductors made by such printing methods cannot be used as device electrodes because of the large surface topology, poor stretchability, or weak adhesion between the substrate and the conducting material. Here, a method is presented by which conductive materials are printed in the way of being surface-embedded in the rubber substrate; hence, the conductors can be widely used as device electrodes and circuits. The printing process involves a direct printing of a metal precursor solution in a block-copolymer rubber substrate and chemical reduction of the precursor into metal nanoparticles. The electrical conductivity and sensitivity to the mechanical deformation can be controlled by adjusting the number of printing operations. The fabrication of highly sensitive vibration sensors is thus presented, which can detect weak pulses and sound waves. In addition, this work takes advantage of the viscoelasticity of the composite conductor to fabricate highly conductive stretchable circuits for complicated 3D structures. The printed electrodes are also used to fabricate a stretchable electrochemiluminescence display. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Carbon nanotube-based three-dimensional monolithic optoelectronic integrated system

NASA Astrophysics Data System (ADS)

Liu, Yang; Wang, Sheng; Liu, Huaping; Peng, Lian-Mao

2017-06-01

Single material-based monolithic optoelectronic integration with complementary metal oxide semiconductor-compatible signal processing circuits is one of the most pursued approaches in the post-Moore era to realize rapid data communication and functional diversification in a limited three-dimensional space. Here, we report an electrically driven carbon nanotube-based on-chip three-dimensional optoelectronic integrated circuit. We demonstrate that photovoltaic receivers, electrically driven transmitters and on-chip electronic circuits can all be fabricated using carbon nanotubes via a complementary metal oxide semiconductor-compatible low-temperature process, providing a seamless integration platform for realizing monolithic three-dimensional optoelectronic integrated circuits with diversified functionality such as the heterogeneous AND gates. These circuits can be vertically scaled down to sub-30 nm and operates in photovoltaic mode at room temperature. Parallel optical communication between functional layers, for example, bottom-layer digital circuits and top-layer memory, has been demonstrated by mapping data using a 2 × 2 transmitter/receiver array, which could be extended as the next generation energy-efficient signal processing paradigm.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Multichannel, Active Low-Pass Filters

NASA Technical Reports Server (NTRS)

Lev, James J.

1989-01-01

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

Method and Apparatus for Producing a Substrate with Low Secondary Electron Emissions

NASA Technical Reports Server (NTRS)

Jensen, Kenneth A. (Inventor); Curren, Arthur N. (Inventor); Roman, Robert F. (Inventor)

1998-01-01

The present invention is directed to a method and apparatus for producing a highly-textured surface on a copper substrate with only extremely small amounts of texture-inducing seeding of masking material. The texture-inducing seeding material is delivered to the copper substrate electrically switching the seeding material in and out of a circuit loop.

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1993-12-31

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and hold it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components.« less

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1995-08-29

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components. 11 figs.« less

The use of low resistivity substrates for optimal noise reduction, ground referencing, and current conduction in mixed signal ASICs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zimmerman, T.

1997-12-01

This paper is distilled from a talk given at the 3rd International Meeting on Front End Electronics in Taos, N.M. on Nov. 7,1997. It is based on experience gained by designing and testing the SVX3 128 channel silicon strip detector readout chip. The SVX3 chip organization is shown in Fig. 1. The Front End section consists of an integrator and analog pipeline designed at Fermilab, and the Back End section is an ADC plus sparsification and readout logic designed at LBL. SVX3 is a deadtimeless readout chip, which means that the front end is acquiring low level analog signals whilemore » the back end is digitizing and reading out digital signals. It is thus a true mixed signal chip, and demands close attention to avoid disastrous coupling from the digital to the analog sections. SVX3 is designed in a bulk CMOS process (i.e., the circuits sit in a silicon substrate). In such a process, the substrate becomes a potential coupling path. This paper discusses the effect of the substrate resistivity on coupling, and also goes into a more general discussion of grounding and referencing in mixed signal designs and how low resistivity substrates can be used to advantage. Finally, an alternative power supply current conduction method for ASICs is presented as an additional advantage which can be obtained with low resistivity substrates. 1 ref., 13 figs., 1 tab.« less

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

NASA Technical Reports Server (NTRS)

Krasowski, Michael J.

2008-01-01

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.