Integrated 3-D vision system for autonomous vehicles

NASA Astrophysics Data System (ADS)

Hou, Kun M.; Shawky, Mohamed; Tu, Xiaowei

1992-03-01

Nowadays, autonomous vehicles have become a multidiscipline field. Its evolution is taking advantage of the recent technological progress in computer architectures. As the development tools became more sophisticated, the trend is being more specialized, or even dedicated architectures. In this paper, we will focus our interest on a parallel vision subsystem integrated in the overall system architecture. The system modules work in parallel, communicating through a hierarchical blackboard, an extension of the 'tuple space' from LINDA concepts, where they may exchange data or synchronization messages. The general purpose processing elements are of different skills, built around 40 MHz i860 Intel RISC processors for high level processing and pipelined systolic array processors based on PLAs or FPGAs for low-level processing.

A single chip VLSI Reed-Solomon decoder

NASA Technical Reports Server (NTRS)

Shao, H. M.; Truong, T. K.; Hsu, I. S.; Deutsch, L. J.; Reed, I. S.

1986-01-01

A new VLSI design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous design is replaced by a time domain algorithm. A new architecture that implements such an algorithm permits efficient pipeline processing with minimum circuitry. A systolic array is also developed to perform erasure corrections in the new design. A modified form of Euclid's algorithm is implemented by a new architecture that maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and a significant reduction in silicon area, therefore making it possible to build a pipeline (31,15)RS decoder on a single VLSI chip.

Multiprocessor and memory architecture of the neurocomputer SYNAPSE-1.

PubMed

Ramacher, U; Raab, W; Anlauf, J; Hachmann, U; Beichter, J; Brüls, N; Wesseling, M; Sicheneder, E; Männer, R; Glass, J

1993-12-01

A general purpose neurocomputer, SYNAPSE-1, which exhibits a multiprocessor and memory architecture is presented. It offers wide flexibility with respect to neural algorithms and a speed-up factor of several orders of magnitude--including learning. The computational power is provided by a 2-dimensional systolic array of neural signal processors. Since the weights are stored outside these NSPs, memory size and processing power can be adapted individually to the application needs. A neural algorithms programming language, embedded in C(+2) has been defined for the user to cope with the neurocomputer. In a benchmark test, the prototype of SYNAPSE-1 was 8000 times as fast as a standard workstation.

Splash 2

NASA Technical Reports Server (NTRS)

Arnold, Jeffrey M.; Buell, Duncan A.; Kleinfelder, Walter J.

1993-01-01

Splash 2 is an attached processor system for Sun SPARC 2 workstations that uses Xilinx 4010 Field Programmable Gate Arrays (FPGA's) as its processing elements. The purpose of this paper is to describe Splash 2. The predecessor system, Splash 1, was designed to be used as a systolic processing system. Although it was very successful in that mode, there were many other applications that were not systolic, but which were successful, nonetheless, on Splash 1, or that were not implemented successfully due to one or more architectural limitations, most notably I/O bandwidth and interprocessor communication. Although other uses to increase computational performance have been found for the Xilinx FPGA's that are Splash's processing elements. Splash is unique in its goal to be programmable in a general sense.

Wafer-Scale Integration of Systolic Arrays,

DTIC Science & Technology

1985-10-01

hus wtha rbaiith hig robabili, e aubrbe orutysta mostck b(e)adstotoefwsi the cenofther cnnel thati are connted to (g.The kery ato the alevel of t...problems considered heretofore in this paper also have an interpretation in a purely graph theoretic model. Suppose we are given a two-dimensional...graphs," Magyar 7Td. Akad. Math . Kut. Int. Kozl, Vol. 5, 1960, pp. 17-61. [6] D. Fussell and P. Varman, "Fault-tolerant wafer-scale architectures for

Optimized smith waterman processor design for breast cancer early diagnosis

NASA Astrophysics Data System (ADS)

Nurdin, D. S.; Isa, M. N.; Ismail, R. C.; Ahmad, M. I.

2017-09-01

This paper presents an optimized design of Processing Element (PE) of Systolic Array (SA) which implements affine gap penalty Smith Waterman (SW) algorithm on the Xilinx Virtex-6 XC6VLX75T Field Programmable Gate Array (FPGA) for Deoxyribonucleic Acid (DNA) sequence alignment. The PE optimization aims to reduce PE logic resources to increase number of PEs in FPGA for higher degree of parallelism during alignment matrix computations. This is useful for aligning long DNA-based disease sequence such as Breast Cancer (BC) for early diagnosis. The optimized PE architecture has the smallest PE area with 15 slices in a PE and 776 PEs implemented in the Virtex - 6 FPGA.

Dynamically Reconfigurable Systolic Array Accelerator

NASA Technical Reports Server (NTRS)

Dasu, Aravind; Barnes, Robert

2012-01-01

A polymorphic systolic array framework has been developed that works in conjunction with an embedded microprocessor on a field-programmable gate array (FPGA), which allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and a hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms, and is extendable to more complex applications in the area of aerospace embedded systems. FPGA chips can be responsive to realtime demands for changing applications needs, but only if the electronic fabric can respond fast enough. This systolic array framework allows for rapid partial and dynamic reconfiguration of the chip in response to the real-time needs of scalability, and adaptability of executables.

Parallel architectures for iterative methods on adaptive, block structured grids

NASA Technical Reports Server (NTRS)

Gannon, D.; Vanrosendale, J.

1983-01-01

A parallel computer architecture well suited to the solution of partial differential equations in complicated geometries is proposed. Algorithms for partial differential equations contain a great deal of parallelism. But this parallelism can be difficult to exploit, particularly on complex problems. One approach to extraction of this parallelism is the use of special purpose architectures tuned to a given problem class. The architecture proposed here is tuned to boundary value problems on complex domains. An adaptive elliptic algorithm which maps effectively onto the proposed architecture is considered in detail. Two levels of parallelism are exploited by the proposed architecture. First, by making use of the freedom one has in grid generation, one can construct grids which are locally regular, permitting a one to one mapping of grids to systolic style processor arrays, at least over small regions. All local parallelism can be extracted by this approach. Second, though there may be a regular global structure to the grids constructed, there will be parallelism at this level. One approach to finding and exploiting this parallelism is to use an architecture having a number of processor clusters connected by a switching network. The use of such a network creates a highly flexible architecture which automatically configures to the problem being solved.

FPGA design for constrained energy minimization

NASA Astrophysics Data System (ADS)

Wang, Jianwei; Chang, Chein-I.; Cao, Mang

2004-02-01

The Constrained Energy Minimization (CEM) has been widely used for hyperspectral detection and classification. The feasibility of implementing the CEM as a real-time processing algorithm in systolic arrays has been also demonstrated. The main challenge of realizing the CEM in hardware architecture in the computation of the inverse of the data correlation matrix performed in the CEM, which requires a complete set of data samples. In order to cope with this problem, the data correlation matrix must be calculated in a causal manner which only needs data samples up to the sample at the time it is processed. This paper presents a Field Programmable Gate Arrays (FPGA) design of such a causal CEM. The main feature of the proposed FPGA design is to use the Coordinate Rotation DIgital Computer (CORDIC) algorithm that can convert a Givens rotation of a vector to a set of shift-add operations. As a result, the CORDIC algorithm can be easily implemented in hardware architecture, therefore in FPGA. Since the computation of the inverse of the data correlction involves a series of Givens rotations, the utility of the CORDIC algorithm allows the causal CEM to perform real-time processing in FPGA. In this paper, an FPGA implementation of the causal CEM will be studied and its detailed architecture will be also described.

Dynamically Reconfigurable Systolic Array Accelorators

NASA Technical Reports Server (NTRS)

Dasu, Aravind (Inventor); Barnes, Robert C. (Inventor)

2014-01-01

A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems.

On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays

NASA Technical Reports Server (NTRS)

Shao, H. M.; Deutsch, L. J.; Reed, I. S.

1987-01-01

A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using a multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area.

On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays

NASA Technical Reports Server (NTRS)

Shao, Howard M.; Reed, Irving S.

1988-01-01

A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area.

Feasibility study, software design, layout and simulation of a two-dimensional fast Fourier transform machine for use in optical array interferometry

NASA Technical Reports Server (NTRS)

Boriakoff, Valentin; Chen, Wei

1990-01-01

The NASA-Cornell Univ.-Worcester Polytechnic Institute Fast Fourier Transform (FFT) chip based on the architecture of the systolic FFT computation as presented by Boriakoff is implemented into an operating device design. The kernel of the system, a systolic inner product floating point processor, was designed to be assembled into a systolic network that would take incoming data streams in pipeline fashion and provide an FFT output at the same rate, word by word. It was thoroughly simulated for proper operation, and it has passed a comprehensive set of tests showing no operational errors. The black box specifications of the chip, which conform to the initial requirements of the design as specified by NASA, are given. The five subcells are described and their high level function description, logic diagrams, and simulation results are presented. Some modification of the Read Only Memory (ROM) design were made, since some errors were found in it. Because a four stage pipeline structure was used, simulating such a structure is more difficult than an ordinary structure. Simulation methods are discussed. Chip signal protocols and chip pinout are explained.

FPGA architecture and implementation of sparse matrix vector multiplication for the finite element method

NASA Astrophysics Data System (ADS)

Elkurdi, Yousef; Fernández, David; Souleimanov, Evgueni; Giannacopoulos, Dennis; Gross, Warren J.

2008-04-01

The Finite Element Method (FEM) is a computationally intensive scientific and engineering analysis tool that has diverse applications ranging from structural engineering to electromagnetic simulation. The trends in floating-point performance are moving in favor of Field-Programmable Gate Arrays (FPGAs), hence increasing interest has grown in the scientific community to exploit this technology. We present an architecture and implementation of an FPGA-based sparse matrix-vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations arising from FEM applications. FEM matrices display specific sparsity patterns that can be exploited to improve the efficiency of hardware designs. Our architecture exploits FEM matrix sparsity structure to achieve a balance between performance and hardware resource requirements by relying on external SDRAM for data storage while utilizing the FPGAs computational resources in a stream-through systolic approach. The architecture is based on a pipelined linear array of processing elements (PEs) coupled with a hardware-oriented matrix striping algorithm and a partitioning scheme which enables it to process arbitrarily big matrices without changing the number of PEs in the architecture. Therefore, this architecture is only limited by the amount of external RAM available to the FPGA. The implemented SMVM-pipeline prototype contains 8 PEs and is clocked at 110 MHz obtaining a peak performance of 1.76 GFLOPS. For 8 GB/s of memory bandwidth typical of recent FPGA systems, this architecture can achieve 1.5 GFLOPS sustained performance. Using multiple instances of the pipeline, linear scaling of the peak and sustained performance can be achieved. Our stream-through architecture provides the added advantage of enabling an iterative implementation of the SMVM computation required by iterative solution techniques such as the conjugate gradient method, avoiding initialization time due to data loading and setup inside the FPGA internal memory.

PCI-based WILDFIRE reconfigurable computing engines

NASA Astrophysics Data System (ADS)

Fross, Bradley K.; Donaldson, Robert L.; Palmer, Douglas J.

1996-10-01

WILDFORCE is the first PCI-based custom reconfigurable computer that is based on the Splash 2 technology transferred from the National Security Agency and the Institute for Defense Analyses, Supercomputing Research Center (SRC). The WILDFORCE architecture has many of the features of the WILDFIRE computer, such as field- programmable gate array (FPGA) based processing elements, linear array and crossbar interconnection, and high- performance memory and I/O subsystems. New features introduced in the PCI-based WILDFIRE systems include memory/processor options that can be added to any processing element. These options include static and dynamic memory, digital signal processors (DSPs), FPGAs, and microprocessors. In addition to memory/processor options, many different application specific connectors can be used to extend the I/O capabilities of the system, including systolic I/O, camera input and video display output. This paper also discusses how this new PCI-based reconfigurable computing engine is used for rapid-prototyping, real-time video processing and other DSP applications.

On recursive least-squares filtering algorithms and implementations. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Hsieh, Shih-Fu

1990-01-01

In many real-time signal processing applications, fast and numerically stable algorithms for solving least-squares problems are necessary and important. In particular, under non-stationary conditions, these algorithms must be able to adapt themselves to reflect the changes in the system and take appropriate adjustments to achieve optimum performances. Among existing algorithms, the QR-decomposition (QRD)-based recursive least-squares (RLS) methods have been shown to be useful and effective for adaptive signal processing. In order to increase the speed of processing and achieve high throughput rate, many algorithms are being vectorized and/or pipelined to facilitate high degrees of parallelism. A time-recursive formulation of RLS filtering employing block QRD will be considered first. Several methods, including a new non-continuous windowing scheme based on selectively rejecting contaminated data, were investigated for adaptive processing. Based on systolic triarrays, many other forms of systolic arrays are shown to be capable of implementing different algorithms. Various updating and downdating systolic algorithms and architectures for RLS filtering are examined and compared in details, which include Householder reflector, Gram-Schmidt procedure, and Givens rotation. A unified approach encompassing existing square-root-free algorithms is also proposed. For the sinusoidal spectrum estimation problem, a judicious method of separating the noise from the signal is of great interest. Various truncated QR methods are proposed for this purpose and compared to the truncated SVD method. Computer simulations provided for detailed comparisons show the effectiveness of these methods. This thesis deals with fundamental issues of numerical stability, computational efficiency, adaptivity, and VLSI implementation for the RLS filtering problems. In all, various new and modified algorithms and architectures are proposed and analyzed; the significance of any of the new method depends crucially on specific application.

Fast and Scalable Computation of the Forward and Inverse Discrete Periodic Radon Transform.

PubMed

Carranza, Cesar; Llamocca, Daniel; Pattichis, Marios

2016-01-01

The discrete periodic radon transform (DPRT) has extensively been used in applications that involve image reconstructions from projections. Beyond classic applications, the DPRT can also be used to compute fast convolutions that avoids the use of floating-point arithmetic associated with the use of the fast Fourier transform. Unfortunately, the use of the DPRT has been limited by the need to compute a large number of additions and the need for a large number of memory accesses. This paper introduces a fast and scalable approach for computing the forward and inverse DPRT that is based on the use of: a parallel array of fixed-point adder trees; circular shift registers to remove the need for accessing external memory components when selecting the input data for the adder trees; an image block-based approach to DPRT computation that can fit the proposed architecture to available resources; and fast transpositions that are computed in one or a few clock cycles that do not depend on the size of the input image. As a result, for an N × N image (N prime), the proposed approach can compute up to N(2) additions per clock cycle. Compared with the previous approaches, the scalable approach provides the fastest known implementations for different amounts of computational resources. For example, for a 251×251 image, for approximately 25% fewer flip-flops than required for a systolic implementation, we have that the scalable DPRT is computed 36 times faster. For the fastest case, we introduce optimized just 2N + ⌈log(2) N⌉ + 1 and 2N + 3 ⌈log(2) N⌉ + B + 2 cycles, architectures that can compute the DPRT and its inverse in respectively, where B is the number of bits used to represent each input pixel. On the other hand, the scalable DPRT approach requires more 1-b additions than for the systolic implementation and provides a tradeoff between speed and additional 1-b additions. All of the proposed DPRT architectures were implemented in VHSIC Hardware Description Language (VHDL) and validated using an Field-Programmable Gate Array (FPGA) implementation.

On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shao, H.M.; Reed, I.S.

A new VLSI design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous paper is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using a multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area, therefore making it possible to build a pipelinemore » Reed-Solomon decoder on a single VLSI chip.« less

Bit-systolic arithmetic arrays using dynamic differential gallium arsenide circuits

NASA Technical Reports Server (NTRS)

Beagles, Grant; Winters, Kel; Eldin, A. G.

1992-01-01

A new family of gallium arsenide circuits for fine grained bit-systolic arithmetic arrays is introduced. This scheme combines features of two recent techniques of dynamic gallium arsenide FET logic and differential dynamic single-clock CMOS logic. The resulting circuits are fast and compact, with tightly constrained series FET propagation paths, low fanout, no dc power dissipation, and depletion FET implementation without level shifting diodes.

DFT algorithms for bit-serial GaAs array processor architectures

NASA Technical Reports Server (NTRS)

Mcmillan, Gary B.

1988-01-01

Systems and Processes Engineering Corporation (SPEC) has developed an innovative array processor architecture for computing Fourier transforms and other commonly used signal processing algorithms. This architecture is designed to extract the highest possible array performance from state-of-the-art GaAs technology. SPEC's architectural design includes a high performance RISC processor implemented in GaAs, along with a Floating Point Coprocessor and a unique Array Communications Coprocessor, also implemented in GaAs technology. Together, these data processors represent the latest in technology, both from an architectural and implementation viewpoint. SPEC has examined numerous algorithms and parallel processing architectures to determine the optimum array processor architecture. SPEC has developed an array processor architecture with integral communications ability to provide maximum node connectivity. The Array Communications Coprocessor embeds communications operations directly in the core of the processor architecture. A Floating Point Coprocessor architecture has been defined that utilizes Bit-Serial arithmetic units, operating at very high frequency, to perform floating point operations. These Bit-Serial devices reduce the device integration level and complexity to a level compatible with state-of-the-art GaAs device technology.

Techniques for computing the discrete Fourier transform using the quadratic residue Fermat number systems

NASA Technical Reports Server (NTRS)

Truong, T. K.; Chang, J. J.; Hsu, I. S.; Pei, D. Y.; Reed, I. S.

1986-01-01

The complex integer multiplier and adder over the direct sum of two copies of finite field developed by Cozzens and Finkelstein (1985) is specialized to the direct sum of the rings of integers modulo Fermat numbers. Such multiplication over the rings of integers modulo Fermat numbers can be performed by means of two integer multiplications, whereas the complex integer multiplication requires three integer multiplications. Such multiplications and additions can be used in the implementation of a discrete Fourier transform (DFT) of a sequence of complex numbers. The advantage of the present approach is that the number of multiplications needed to compute a systolic array of the DFT can be reduced substantially. The architectural designs using this approach are regular, simple, expandable and, therefore, naturally suitable for VLSI implementation.

Optical systolic array processor using residue arithmetic

NASA Technical Reports Server (NTRS)

Jackson, J.; Casasent, D.

1983-01-01

The use of residue arithmetic to increase the accuracy and reduce the dynamic range requirements of optical matrix-vector processors is evaluated. It is determined that matrix-vector operations and iterative algorithms can be performed totally in residue notation. A new parallel residue quantizer circuit is developed which significantly improves the performance of the systolic array feedback processor. Results are presented of a computer simulation of this system used to solve a set of three simultaneous equations.

Generation of Custom DSP Transform IP Cores: Case Study Walsh-Hadamard Transform

DTIC Science & Technology

2002-09-01

mathematics and hardware design What I know: Finite state machine Pipelining Systolic array … What I know: Linear algebra Digital signal processing...state machine Pipelining Systolic array … What I know: Linear algebra Digital signal processing Adaptive filter theory … A math guy A hardware engineer...Synthesis Technology Libary Bit-width (8) HF factor (1,2,3,6) VF factor (1,2,4, ... 32) Xilinx FPGA Place&Route Xilinx FPGA Place&Route Performance

WATERLOPP V2/64: A highly parallel machine for numerical computation

NASA Astrophysics Data System (ADS)

Ostlund, Neil S.

1985-07-01

Current technological trends suggest that the high performance scientific machines of the future are very likely to consist of a large number (greater than 1024) of processors connected and communicating with each other in some as yet undetermined manner. Such an assembly of processors should behave as a single machine in obtaining numerical solutions to scientific problems. However, the appropriate way of organizing both the hardware and software of such an assembly of processors is an unsolved and active area of research. It is particularly important to minimize the organizational overhead of interprocessor comunication, global synchronization, and contention for shared resources if the performance of a large number ( n) of processors is to be anything like the desirable n times the performance of a single processor. In many situations, adding a processor actually decreases the performance of the overall system since the extra organizational overhead is larger than the extra processing power added. The systolic loop architecture is a new multiple processor architecture which attemps at a solution to the problem of how to organize a large number of asynchronous processors into an effective computational system while minimizing the organizational overhead. This paper gives a brief overview of the basic systolic loop architecture, systolic loop algorithms for numerical computation, and a 64-processor implementation of the architecture, WATERLOOP V2/64, that is being used as a testbed for exploring the hardware, software, and algorithmic aspects of the architecture.

Three-Dimensional Nanobiocomputing Architectures With Neuronal Hypercells

DTIC Science & Technology

2007-06-01

Neumann architectures, and CMOS fabrication. Novel solutions of massive parallel distributed computing and processing (pipelined due to systolic... and processing platforms utilizing molecular hardware within an enabling organization and architecture. The design technology is based on utilizing a...Microsystems and Nanotechnologies investigated a novel 3D3 (Hardware Software Nanotechnology) technology to design super-high performance computing

Multistage WDM access architecture employing cascaded AWGs

NASA Astrophysics Data System (ADS)

El-Nahal, F. I.; Mears, R. J.

2009-03-01

Here we propose passive/active arrayed waveguide gratings (AWGs) with enhanced performance for system applications mainly in novel access architectures employing cascaded AWG technology. Two technologies were considered to achieve space wavelength switching in these networks. Firstly, a passive AWG with semiconductor optical amplifiers array, and secondly, an active AWG. Active AWG is an AWG with an array of phase modulators on its arrayed-waveguides section, where a programmable linear phase-profile or a phase hologram is applied across the arrayed-waveguide section. This results in a wavelength shift at the output section of the AWG. These architectures can address up to 6912 customers employing only 24 wavelengths, coarsely separated by 1.6 nm. Simulation results obtained here demonstrate that cascaded AWGs access architectures have a great potential in future local area networks. Furthermore, they indicate for the first time that active AWGs architectures are more efficient in routing signals to the destination optical network units than passive AWG architectures.

Systolic Processor Array For Recognition Of Spectra

NASA Technical Reports Server (NTRS)

Chow, Edward T.; Peterson, John C.

1995-01-01

Spectral signatures of materials detected and identified quickly. Spectral Analysis Systolic Processor Array (SPA2) relatively inexpensive and satisfies need to analyze large, complex volume of multispectral data generated by imaging spectrometers to extract desired information: computational performance needed to do this in real time exceeds that of current supercomputers. Locates highly similar segments or contiguous subsegments in two different spectra at time. Compares sampled spectra from instruments with data base of spectral signatures of known materials. Computes and reports scores that express degrees of similarity between sampled and data-base spectra.

Left Ventricular Architecture, Long-Term Reverse Remodeling, and Clinical Outcome in Mild Heart Failure With Cardiac Resynchronization: Results From the REVERSE Trial.

PubMed

St John Sutton, Martin; Linde, Cecilia; Gold, Michael R; Abraham, William T; Ghio, Stefano; Cerkvenik, Jeffrey; Daubert, Jean-Claude

2017-03-01

This study sought to determine the effects of abnormal left ventricular (LV) architecture on cardiac remodeling and clinical outcomes in mild heart failure (HF). Cardiac resynchronization therapy (CRT) is an established treatment for HF that improves survival in part by favorably remodeling LV architecture. LV shape is a dynamic component of LV architecture on which contractile function depends. Transthoracic 2-dimensional echocardiography was used to quantify changes in LV architecture over 5 years of follow-up of patients with mild HF from the REVERSE study. REVERSE was a prospective study of patients with large hearts (LV end-diastolic dimension ≥55 mm), LV ejection fraction <40%, and QRS duration >120 ms randomly assigned to CRT-ON (n = 419) and CRT-OFF (n = 191). CRT-OFF patients were excluded from this analysis. LV dimensions, volumes, mass index, and LV ejection fraction were calculated. LV architecture was assessed using the sphericity index, as follows: (LV end-diastolic volume)/(4/3 × π × r 3 ) × 100%. LV architecture improved over time and demonstrated significant associations between LV shape, age, sex, and echocardiography metrics. Changes in LV architecture were strongly correlated with changes in LV end-systolic volume index and LV end-diastolic volume index (both p < 0.0001). Sphericity index emerged as a predictor of death and HF hospitalization in spite of the low adverse event rate. A decrease in LV end-systolic volume index >15% occurred in more than two-thirds of patients, which indicates considerable reverse remodeling. We demonstrated that change in LV architecture in patients with mild HF with CRT is associated with structural and functional remodeling. Mean LV filling pressure was elevated, and the inability to lower it was an additional predictor of HF hospitalization or death. (Resynchronization Reverses Remodeling in Systolic Left Ventricular Dysfunction [REVERSE]; NCT00271154). Copyright © 2017 American College of Cardiology Foundation. Published by Elsevier Inc. All rights reserved.

A novel configurable VLSI architecture design of window-based image processing method

NASA Astrophysics Data System (ADS)

Zhao, Hui; Sang, Hongshi; Shen, Xubang

2018-03-01

Most window-based image processing architecture can only achieve a certain kind of specific algorithms, such as 2D convolution, and therefore lack the flexibility and breadth of application. In addition, improper handling of the image boundary can cause loss of accuracy, or consume more logic resources. For the above problems, this paper proposes a new VLSI architecture of window-based image processing operations, which is configurable and based on consideration of the image boundary. An efficient technique is explored to manage the image borders by overlapping and flushing phases at the end of row and the end of frame, which does not produce new delay and reduce the overhead in real-time applications. Maximize the reuse of the on-chip memory data, in order to reduce the hardware complexity and external bandwidth requirements. To perform different scalar function and reduction function operations in pipeline, this can support a variety of applications of window-based image processing. Compared with the performance of other reported structures, the performance of the new structure has some similarities to some of the structures, but also superior to some other structures. Especially when compared with a systolic array processor CWP, this structure at the same frequency of approximately 12.9% of the speed increases. The proposed parallel VLSI architecture was implemented with SIMC 0.18-μm CMOS technology, and the maximum clock frequency, power consumption, and area are 125Mhz, 57mW, 104.8K Gates, respectively, furthermore the processing time is independent of the different window-based algorithms mapped to the structure

Simultaneous Transmit and Receive Performance of an 8-channel Digital Phased Array

DTIC Science & Technology

2017-01-16

Lincoln Laboratory Lexington, Massachusetts, USA Abstract—The Aperture- Level Simultaneous Transmit and Re- ceive (ALSTAR) architecture enables extremely...In [1], the Aperture- Level Simultaneous Transmit and Receive (ALSTAR) architecture was proposed for achieving STAR using a fully digital phased array...Aperture- Level Simultaneous Transmit and Receive (ALSTAR) architecture enables STAR functionality in a digital phased array without the use of specialized

European Seminar on Neural Computing

DTIC Science & Technology

1988-08-31

elements can be fabricated on a single chip . Two specific oriented language (for example, SMALLTALK or cellular arrays, namely, the programmable systolic... chip POOL) the basic concepts are: objects are viewed as (Fisher, 1983) and the connection machine (Treleaven, active, they may contain state, and...flow computer the availability of 1. Programmable Systolic Chip . Programmable Sys- input operands triggers the execution of the instruction tolic Chips

Real-time orthorectification by FPGA-based hardware acceleration

NASA Astrophysics Data System (ADS)

Kuo, David; Gordon, Don

2010-10-01

Orthorectification that corrects the perspective distortion of remote sensing imagery, providing accurate geolocation and ease of correlation to other images is a valuable first-step in image processing for information extraction. However, the large amount of metadata and the floating-point matrix transformations required to operate on each pixel make this a computation and I/O (Input/Output) intensive process. As result much imagery is either left unprocessed or loses timesensitive value in the long processing cycle. However, the computation on each pixel can be reduced substantially by using computational results of the neighboring pixels and accelerated by special pipelined hardware architecture in one to two orders of magnitude. A specialized coprocessor that is implemented inside an FPGA (Field Programmable Gate Array) chip and surrounded by vendorsupported hardware IP (Intellectual Property) shares the computation workload with CPU through PCI-Express interface. The ultimate speed of one pixel per clock (125 MHz) is achieved by the pipelined systolic array architecture. The optimal partition between software and hardware, the timing profile among image I/O and computation, and the highly automated GUI (Graphical User Interface) that fully exploits this speed increase to maximize overall image production throughput will also be discussed. The software that runs on a workstation with the acceleration hardware orthorectifies 16 Megapixels per second, which is 16 times faster than without the hardware. It turns the production time from months to days. A real-life successful story of an imaging satellite company that adopted such workstations for their orthorectified imagery production will be presented. The potential candidacy of the image processing computation that can be accelerated more efficiently by the same approach will also be analyzed.

Adaptive reconfigurable V-BLAST type equalizer for cognitive MIMO-OFDM radios

NASA Astrophysics Data System (ADS)

Ozden, Mehmet Tahir

2015-12-01

An adaptive channel shortening equalizer design for multiple input multiple output-orthogonal frequency division multiplexing (MIMO-OFDM) radio receivers is considered in this presentation. The proposed receiver has desirable features for cognitive and software defined radio implementations. It consists of two sections: MIMO decision feedback equalizer (MIMO-DFE) and adaptive multiple Viterbi detection. In MIMO-DFE section, a complete modified Gram-Schmidt orthogonalization of multichannel input data is accomplished using sequential processing multichannel Givens lattice stages, so that a Vertical Bell Laboratories Layered Space Time (V-BLAST) type MIMO-DFE is realized at the front-end section of the channel shortening equalizer. Matrix operations, a major bottleneck for receiver operations, are accordingly avoided, and only scalar operations are used. A highly modular and regular radio receiver architecture that has a suitable structure for digital signal processing (DSP) chip and field programable gate array (FPGA) implementations, which are important for software defined radio realizations, is achieved. The MIMO-DFE section of the proposed receiver can also be reconfigured for spectrum sensing and positioning functions, which are important tasks for cognitive radio applications. In connection with adaptive multiple Viterbi detection section, a systolic array implementation for each channel is performed so that a receiver architecture with high computational concurrency is attained. The total computational complexity is given in terms of equalizer and desired response filter lengths, alphabet size, and number of antennas. The performance of the proposed receiver is presented for two-channel case by means of mean squared error (MSE) and probability of error evaluations, which are conducted for time-invariant and time-variant channel conditions, orthogonal and nonorthogonal transmissions, and two different modulation schemes.

GENETIC ARCHITECTURE OF AMBULATORY BLOOD PRESSURE IN THE GENERAL POPULATION – INSIGHTS FROM CARDIOVASCULAR GENE-CENTRIC ARRAY

PubMed Central

Tomaszewski, Maciej; Debiec, Radoslaw; Braund, Peter S; Nelson, Christopher P; Hardwick, Robert; Christofidou, Paraskevi; Denniff, Matthew; Codd, Veryan; Rafelt, Suzanne; van der Harst, Pim; Waterworth, Dawn; Song, Kijoung; Vollenweider, Peter; Waeber, Gerard; Zukowska-Szczechowska, Ewa; Burton, Paul R; Mooser, Vincent; Charchar, Fadi J; Thompson, John R; Tobin, Martin D; Samani, Nilesh J

2010-01-01

Genetic determinants of blood pressure are poorly defined. We undertook a large-scale gene-centric analysis to identify loci and pathways associated with ambulatory systolic and diastolic blood pressure. We measured 24-hour ambulatory BP in 2020 individuals from 520 white European nuclear families (the GRAPHIC Study) and genotyped their DNA using the Illumina HumanCVD BeadChip array which contains approximately 50000 single nucleotide polymorphisms in >2000 cardiovascular candidate loci. We found a strong association between rs13306560 polymorphism in the promoter region of MTHFR and CLCN6 and mean 24-hour diastolic blood pressure - each minor allele copy of rs13306560 was associated with 2.6 mmHg lower mean 24-hour diastolic blood pressure (P=1.2×10−8). rs13306560 was also associated with clinic diastolic blood pressure in a combined analysis of 8129 subjects from the GRAPHIC Study, the CoLaus Study and the Silesian Cardiovascular Study (P=5.4×10−6). Additional analysis of associations between variants in Gene Ontology-defined pathways and mean 24-hour blood pressure in the GRAPHIC Study showed that cell survival control signalling cascades could play a role in blood pressure regulation. There was also a significant over-representation of rare variants (minor allele frequency <0.05) amongst polymorphisms showing at least nominal association with mean 24-hour blood pressure indicating that a considerable proportion of its heritability may be explained by uncommon alleles. Through a large scale gene-centric analysis of ambulatory blood pressure, we identified an association of a novel variant at the MTHFR/CLNC6 locus with diastolic blood pressure and provided new insights into the genetic architecture of blood pressure. PMID:21060006

Microchannel cross load array with dense parallel input

DOEpatents

Swierkowski, Stefan P.

2004-04-06

An architecture or layout for microchannel arrays using T or Cross (+) loading for electrophoresis or other injection and separation chemistry that are performed in microfluidic configurations. This architecture enables a very dense layout of arrays of functionally identical shaped channels and it also solves the problem of simultaneously enabling efficient parallel shapes and biasing of the input wells, waste wells, and bias wells at the input end of the separation columns. One T load architecture uses circular holes with common rows, but not columns, which allows the flow paths for each channel to be identical in shape, using multiple mirror image pieces. Another T load architecture enables the access hole array to be formed on a biaxial, collinear grid suitable for EDM micromachining (square holes), with common rows and columns.

Frequency multiplexed flux locked loop architecture providing an array of DC SQUIDS having both shared and unshared components

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-01-01

Architecture for frequency multiplexing multiple flux locked loops in a system comprising an array of DC SQUID sensors. The architecture involves dividing the traditional flux locked loop into multiple unshared components and a single shared component which, in operation, form a complete flux locked loop relative to each DC SQUID sensor. Each unshared flux locked loop component operates on a different flux modulation frequency. The architecture of the present invention allows a reduction from 2N to N+1 in the number of connections between the cryogenic DC SQUID sensors and their associated room temperature flux locked loops. Furthermore, the 1.times.N architecture of the present invention can be paralleled to form an M.times.N array architecture without increasing the required number of flux modulation frequencies.

A Systolic VLSI Design of a Pipeline Reed-solomon Decoder

NASA Technical Reports Server (NTRS)

Shao, H. M.; Truong, T. K.; Deutsch, L. J.; Yuen, J. H.; Reed, I. S.

1984-01-01

A pipeline structure of a transform decoder similar to a systolic array was developed to decode Reed-Solomon (RS) codes. An important ingredient of this design is a modified Euclidean algorithm for computing the error locator polynomial. The computation of inverse field elements is completely avoided in this modification of Euclid's algorithm. The new decoder is regular and simple, and naturally suitable for VLSI implementation.

High performance architecture design for large scale fibre-optic sensor arrays using distributed EDFAs and hybrid TDM/DWDM

NASA Astrophysics Data System (ADS)

Liao, Yi; Austin, Ed; Nash, Philip J.; Kingsley, Stuart A.; Richardson, David J.

2013-09-01

A distributed amplified dense wavelength division multiplexing (DWDM) array architecture is presented for interferometric fibre-optic sensor array systems. This architecture employs a distributed erbium-doped fibre amplifier (EDFA) scheme to decrease the array insertion loss, and employs time division multiplexing (TDM) at each wavelength to increase the number of sensors that can be supported. The first experimental demonstration of this system is reported including results which show the potential for multiplexing and interrogating up to 4096 sensors using a single telemetry fibre pair with good system performance. The number can be increased to 8192 by using dual pump sources.

Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

NASA Astrophysics Data System (ADS)

Gao, Ligang; Wang, I.-Ting; Chen, Pai-Yu; Vrudhula, Sarma; Seo, Jae-sun; Cao, Yu; Hou, Tuo-Hung; Yu, Shimeng

2015-11-01

A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO x /TiO2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm.

All-digital radar architecture

NASA Astrophysics Data System (ADS)

Molchanov, Pavlo A.

2014-10-01

All digital radar architecture requires exclude mechanical scan system. The phase antenna array is necessarily large because the array elements must be co-located with very precise dimensions and will need high accuracy phase processing system for aggregate and distribute T/R modules data to/from antenna elements. Even phase array cannot provide wide field of view. New nature inspired all digital radar architecture proposed. The fly's eye consists of multiple angularly spaced sensors giving the fly simultaneously thee wide-area visual coverage it needs to detect and avoid the threats around him. Fly eye radar antenna array consist multiple directional antennas loose distributed along perimeter of ground vehicle or aircraft and coupled with receiving/transmitting front end modules connected by digital interface to central processor. Non-steering antenna array allows creating all-digital radar with extreme flexible architecture. Fly eye radar architecture provides wide possibility of digital modulation and different waveform generation. Simultaneous correlation and integration of thousands signals per second from each point of surveillance area allows not only detecting of low level signals ((low profile targets), but help to recognize and classify signals (targets) by using diversity signals, polarization modulation and intelligent processing. Proposed all digital radar architecture with distributed directional antenna array can provide a 3D space vector to the jammer by verification direction of arrival for signals sources and as result jam/spoof protection not only for radar systems, but for communication systems and any navigation constellation system, for both encrypted or unencrypted signals, for not limited number or close positioned jammers.

Advances and trends in structures and dynamics; Proceedings of the Symposium, Washington, DC, October 22-25, 1984

NASA Technical Reports Server (NTRS)

Noor, A. K. (Editor); Hayduk, R. J. (Editor)

1985-01-01

Among the topics discussed are developments in structural engineering hardware and software, computation for fracture mechanics, trends in numerical analysis and parallel algorithms, mechanics of materials, advances in finite element methods, composite materials and structures, determinations of random motion and dynamic response, optimization theory, automotive tire modeling methods and contact problems, the damping and control of aircraft structures, and advanced structural applications. Specific topics covered include structural design expert systems, the evaluation of finite element system architectures, systolic arrays for finite element analyses, nonlinear finite element computations, hierarchical boundary elements, adaptive substructuring techniques in elastoplastic finite element analyses, automatic tracking of crack propagation, a theory of rate-dependent plasticity, the torsional stability of nonlinear eccentric structures, a computation method for fluid-structure interaction, the seismic analysis of three-dimensional soil-structure interaction, a stress analysis for a composite sandwich panel, toughness criterion identification for unidirectional composite laminates, the modeling of submerged cable dynamics, and damping synthesis for flexible spacecraft structures.

A fast new algorithm for a robot neurocontroller using inverse QR decomposition

DOE Office of Scientific and Technical Information (OSTI.GOV)

Morris, A.S.; Khemaissia, S.

2000-01-01

A new adaptive neural network controller for robots is presented. The controller is based on direct adaptive techniques. Unlike many neural network controllers in the literature, inverse dynamical model evaluation is not required. A numerically robust, computationally efficient processing scheme for neutral network weight estimation is described, namely, the inverse QR decomposition (INVQR). The inverse QR decomposition and a weighted recursive least-squares (WRLS) method for neural network weight estimation is derived using Cholesky factorization of the data matrix. The algorithm that performs the efficient INVQR of the underlying space-time data matrix may be implemented in parallel on a triangular array.more » Furthermore, its systolic architecture is well suited for VLSI implementation. Another important benefit is well suited for VLSI implementation. Another important benefit of the INVQR decomposition is that it solves directly for the time-recursive least-squares filter vector, while avoiding the sequential back-substitution step required by the QR decomposition approaches.« less

Two-dimensional optical architectures for the receive mode of phased-array antennas.

PubMed

Pastur, L; Tonda-Goldstein, S; Dolfi, D; Huignard, J P; Merlet, T; Maas, O; Chazelas, J

1999-05-10

We propose and experimentally demonstrate two optical architectures that process the receive mode of a p x p element phased-array antenna. The architectures are based on free-space propagation and switching of the channelized optical carriers of microwave signals. With the first architecture a direct transposition of the received signals in the optical domain is assumed. The second architecture is based on the optical generation and distribution of a microwave local oscillator matched in frequency and direction. Preliminary experimental results at microwave frequencies of approximately 3 GHz are presented.

Terahertz Array Receivers with Integrated Antennas

NASA Technical Reports Server (NTRS)

Chattopadhyay, Goutam; Llombart, Nuria; Lee, Choonsup; Jung, Cecile; Lin, Robert; Cooper, Ken B.; Reck, Theodore; Siles, Jose; Schlecht, Erich; Peralta, Alessandro;

Optimizing Satellite Communications With Adaptive and Phased Array Antennas

NASA Technical Reports Server (NTRS)

Ingram, Mary Ann; Romanofsky, Robert; Lee, Richard Q.; Miranda, Felix; Popovic, Zoya; Langley, John; Barott, William C.; Ahmed, M. Usman; Mandl, Dan

2004-01-01

A new adaptive antenna array architecture for low-earth-orbiting satellite ground stations is being investigated. These ground stations are intended to have no moving parts and could potentially be operated in populated areas, where terrestrial interference is likely. The architecture includes multiple, moderately directive phased arrays. The phased arrays, each steered in the approximate direction of the satellite, are adaptively combined to enhance the Signal-to-Noise and Interference-Ratio (SNIR) of the desired satellite. The size of each phased array is to be traded-off with the number of phased arrays, to optimize cost, while meeting a bit-error-rate threshold. Also, two phased array architectures are being prototyped: a spacefed lens array and a reflect-array. If two co-channel satellites are in the field of view of the phased arrays, then multi-user detection techniques may enable simultaneous demodulation of the satellite signals, also known as Space Division Multiple Access (SDMA). We report on Phase I of the project, in which fixed directional elements are adaptively combined in a prototype to demodulate the S-band downlink of the EO-1 satellite, which is part of the New Millennium Program at NASA.

Application specific serial arithmetic arrays

NASA Technical Reports Server (NTRS)

Winters, K.; Mathews, D.; Thompson, T.

1990-01-01

High performance systolic arrays of serial-parallel multiplier elements may be rapidly constructed for specific applications by applying hardware description language techniques to a library of full-custom CMOS building blocks. Single clock pre-charged circuits have been implemented for these arrays at clock rates in excess of 100 Mhz using economical 2-micron (minimum feature size) CMOS processes, which may be quickly configured for a variety of applications. A number of application-specific arrays are presented, including a 2-D convolver for image processing, an integer polynomial solver, and a finite-field polynomial solver.

Controllable 3D architectures of aligned carbon nanotube arrays by multi-step processes

NASA Astrophysics Data System (ADS)

Huang, Shaoming

2003-06-01

An effective way to fabricate large area three-dimensional (3D) aligned CNTs pattern based on pyrolysis of iron(II) phthalocyanine (FePc) by two-step processes is reported. The controllable generation of different lengths and selective growth of the aligned CNT arrays on metal-patterned (e.g., Ag and Au) substrate are the bases for generating such 3D aligned CNTs architectures. By controlling experimental conditions 3D aligned CNT arrays with different lengths/densities and morphologies/structures as well as multi-layered architectures can be fabricated in large scale by multi-step pyrolysis of FePc. These 3D architectures could have interesting properties and be applied for developing novel nanotube-based devices.

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

NASA Technical Reports Server (NTRS)

Vasile, Stefan; Lipson, Jerold

2012-01-01

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Kinetic Inductance Memory Cell and Architecture for Superconducting Computers

NASA Astrophysics Data System (ADS)

Chen, George J.

Josephson memory devices typically use a superconducting loop containing one or more Josephson junctions to store information. The magnetic inductance of the loop in conjunction with the Josephson junctions provides multiple states to store data. This thesis shows that replacing the magnetic inductor in a memory cell with a kinetic inductor can lead to a smaller cell size. However, magnetic control of the cells is lost. Thus, a current-injection based architecture for a memory array has been designed to work around this problem. The isolation between memory cells that magnetic control provides is provided through resistors in this new architecture. However, these resistors allow leakage current to flow which ultimately limits the size of the array due to power considerations. A kinetic inductance memory array will be limited to 4K bits with a read access time of 320 ps for a 1 um linewidth technology. If a power decoder could be developed, the memory architecture could serve as the blueprint for a fast (<1 ns), large scale (>1 Mbit) superconducting memory array.

Serial multiplier arrays for parallel computation

NASA Technical Reports Server (NTRS)

Winters, Kel

1990-01-01

Arrays of systolic serial-parallel multiplier elements are proposed as an alternative to conventional SIMD mesh serial adder arrays for applications that are multiplication intensive and require few stored operands. The design and operation of a number of multiplier and array configurations featuring locality of connection, modularity, and regularity of structure are discussed. A design methodology combining top-down and bottom-up techniques is described to facilitate development of custom high-performance CMOS multiplier element arrays as well as rapid synthesis of simulation models and semicustom prototype CMOS components. Finally, a differential version of NORA dynamic circuits requiring a single-phase uncomplemented clock signal introduced for this application.

Design and Evaluation of Fault-Tolerant VLSI/WSI Processor Arrays.

DTIC Science & Technology

1987-12-31

studies reported in this paper. In Section .3, the reliabuility characteristics of single-level FTPA’s are discusseri. Four different type of FTPA’s are...for processor arrays are proposed and studied . Stu- dies on algorithmic and software aspects relevant to systems are reported in items 4, 5, 8, 12 and...O’Keefe M., and Fortes, J. A. B., "A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays," (Long Version) International Workshop on

Formation of Monocrystalline 1D and 2D Architectures via Epitaxial Attachment: Bottom-Up Routes through Surfactant-Mediated Arrays of Oriented Nanocrystals.

PubMed

Nakagawa, Yoshitaka; Kageyama, Hiroyuki; Oaki, Yuya; Imai, Hiroaki

2015-06-09

Monocrystalline architectures with well-defined shapes were achieved by bottom-up routes through epitaxial attachment of Mn3O4 nanocrystals. The crystallographically continuous 1D chains elongated in the a axis and 2D panels having large a or c faces were obtained by removal of the organic mediator from surfactant-mediated 1D and 2D arrays of Mn3O4 nanocrystals, respectively. Our basal approach indicates that the epitaxial attachment through the surfactant-mediated arrays is utilized for fabrication of a wide variety of micrometric architectures from nanometric crystalline units.

Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays

NASA Technical Reports Server (NTRS)

Edwards, R. Timothy; Strohbehn, Kim; Jaskulek, Steven E.; Katz, Richard

1999-01-01

Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.

Parallel processing in a host plus multiple array processor system for radar

NASA Technical Reports Server (NTRS)

Barkan, B. Z.

1983-01-01

Host plus multiple array processor architecture is demonstrated to yield a modular, fast, and cost-effective system for radar processing. Software methodology for programming such a system is developed. Parallel processing with pipelined data flow among the host, array processors, and discs is implemented. Theoretical analysis of performance is made and experimentally verified. The broad class of problems to which the architecture and methodology can be applied is indicated.

Flexible and twistable non-volatile memory cell array with all-organic one diode-one resistor architecture.

PubMed

Ji, Yongsung; Zeigler, David F; Lee, Dong Su; Choi, Hyejung; Jen, Alex K-Y; Ko, Heung Cho; Kim, Tae-Wook

2013-01-01

Flexible organic memory devices are one of the integral components for future flexible organic electronics. However, high-density all-organic memory cell arrays on malleable substrates without cross-talk have not been demonstrated because of difficulties in their fabrication and relatively poor performances to date. Here we demonstrate the first flexible all-organic 64-bit memory cell array possessing one diode-one resistor architectures. Our all-organic one diode-one resistor cell exhibits excellent rewritable switching characteristics, even during and after harsh physical stresses. The write-read-erase-read output sequence of the cells perfectly correspond to the external pulse signal regardless of substrate deformation. The one diode-one resistor cell array is clearly addressed at the specified cells and encoded letters based on the standard ASCII character code. Our study on integrated organic memory cell arrays suggests that the all-organic one diode-one resistor cell architecture is suitable for high-density flexible organic memory applications in the future.

Real-time field programmable gate array architecture for computer vision

NASA Astrophysics Data System (ADS)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar

2001-01-01

This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low-level image processing. The field programmable gate array (FPGA)-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and it is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on dedicated very- large-scale-integrated devices to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real-time performance are discussed. Some results are presented and discussed.

A performance analysis of advanced I/O architectures for PC-based network file servers

NASA Astrophysics Data System (ADS)

Huynh, K. D.; Khoshgoftaar, T. M.

1994-12-01

In the personal computing and workstation environments, more and more I/O adapters are becoming complete functional subsystems that are intelligent enough to handle I/O operations on their own without much intervention from the host processor. The IBM Subsystem Control Block (SCB) architecture has been defined to enhance the potential of these intelligent adapters by defining services and conventions that deliver command information and data to and from the adapters. In recent years, a new storage architecture, the Redundant Array of Independent Disks (RAID), has been quickly gaining acceptance in the world of computing. In this paper, we would like to discuss critical system design issues that are important to the performance of a network file server. We then present a performance analysis of the SCB architecture and disk array technology in typical network file server environments based on personal computers (PCs). One of the key issues investigated in this paper is whether a disk array can outperform a group of disks (of same type, same data capacity, and same cost) operating independently, not in parallel as in a disk array.

Optimal expression evaluation for data parallel architectures

NASA Technical Reports Server (NTRS)

Gilbert, John R.; Schreiber, Robert

1990-01-01

A data parallel machine represents an array or other composite data structure by allocating one processor (at least conceptually) per data item. A pointwise operation can be performed between two such arrays in unit time, provided their corresponding elements are allocated in the same processors. If the arrays are not aligned in this fashion, the cost of moving one or both of them is part of the cost of the operation. The choice of where to perform the operation then affects this cost. If an expression with several operands is to be evaluated, there may be many choices of where to perform the intermediate operations. An efficient algorithm is given to find the minimum-cost way to evaluate an expression, for several different data parallel architectures. This algorithm applies to any architecture in which the metric describing the cost of moving an array is robust. This encompasses most of the common data parallel communication architectures, including meshes of arbitrary dimension and hypercubes. Remarks are made on several variations of the problem, some of which are solved and some of which remain open.

Fiber-optic hydrophone array for acoustic surveillance in the littoral

NASA Astrophysics Data System (ADS)

Hill, David; Nash, Phillip

2005-05-01

We describe a fibre-optic hydrophone array system architecture that can be tailored to meet the underwater acoustic surveillance requirements of the military, counter terrorist and customs authorities in protecting ports and harbours, offshore production facilities or coastal approaches. Physically the fibre-optic hydrophone array is in the form of a lightweight cable, enabling rapid deployment from a small vessel. Based upon an optical architecture of time and wavelength multiplexed interferometric hydrophones, the array is comprised of a series of hydrophone sub-arrays. Using multiple sub-arrays, extended perimeters many tens of kilometres in length can be monitored. Interrogated via a long (~50km) optical fibre data link, the acoustic date is processed using the latest open architecture sonar processing platform, ensuring that acoustic targets below, on and above the surface are detected, tracked and classified. Results obtained from an at sea trial of a 96-channel hydrophone array are given, showing the passive detection and tracking of a diver, small surface craft and big ocean going ships beyond the horizon. Furthermore, we describe how the OptaMarine fibre-optic hydrophone array fits into an integrated multi-layered approach to port and harbour security consisting of active sonar for diver detection and hull imaging, as well as thermal imaging and CCTV for surface monitoring. Finally, we briefly describe a complimentary land perimeter intruder detection system consisting of an array of fibre optic accelerometers.

Distributed phased array architecture study

NASA Technical Reports Server (NTRS)

Bourgeois, Brian

1987-01-01

Variations in amplifiers and phase shifters can cause degraded antenna performance, depending also on the environmental conditions and antenna array architecture. The implementation of distributed phased array hardware was studied with the aid of the DISTAR computer program as a simulation tool. This simulation provides guidance in hardware simulation. Both hard and soft failures of the amplifiers in the T/R modules are modeled. Hard failures are catastrophic: no power is transmitted to the antenna elements. Noncatastrophic or soft failures are modeled as a modified Gaussian distribution. The resulting amplitude characteristics then determine the array excitation coefficients. The phase characteristics take on a uniform distribution. Pattern characteristics such as antenna gain, half power beamwidth, mainbeam phase errors, sidelobe levels, and beam pointing errors were studied as functions of amplifier and phase shifter variations. General specifications for amplifier and phase shifter tolerances in various architecture configurations for C band and S band were determined.

High performance thermal imaging for the 21st century

NASA Astrophysics Data System (ADS)

Clarke, David J.; Knowles, Peter

2003-01-01

In recent years IR detector technology has developed from early short linear arrays. Such devices require high performance signal processing electronics to meet today's thermal imaging requirements for military and para-military applications. This paper describes BAE SYSTEMS Avionics Group's Sensor Integrated Modular Architecture thermal imager which has been developed alongside the group's Eagle 640×512 arrays to provide high performance imaging capability. The electronics architecture also supprots High Definition TV format 2D arrays for future growth capability.

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

NASA Astrophysics Data System (ADS)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

Architecture and data processing alternatives for Tse computer. Volume 1: Tse logic design concepts and the development of image processing machine architectures

NASA Technical Reports Server (NTRS)

Rickard, D. A.; Bodenheimer, R. E.

1976-01-01

Digital computer components which perform two dimensional array logic operations (Tse logic) on binary data arrays are described. The properties of Golay transforms which make them useful in image processing are reviewed, and several architectures for Golay transform processors are presented with emphasis on the skeletonizing algorithm. Conventional logic control units developed for the Golay transform processors are described. One is a unique microprogrammable control unit that uses a microprocessor to control the Tse computer. The remaining control units are based on programmable logic arrays. Performance criteria are established and utilized to compare the various Golay transform machines developed. A critique of Tse logic is presented, and recommendations for additional research are included.

Optical beam forming techniques for phased array antennas

NASA Technical Reports Server (NTRS)

Wu, Te-Kao; Chandler, C.

1993-01-01

Conventional phased array antennas using waveguide or coax for signal distribution are impractical for large scale implementation on satellites or spacecraft because they exhibit prohibitively large system size, heavy weight, high attenuation loss, limited bandwidth, sensitivity to electromagnetic interference (EMI) temperature drifts and phase instability. However, optical beam forming systems are smaller, lighter, and more flexible. Three optical beam forming techniques are identified as applicable to large spaceborne phased array antennas. They are (1) the optical fiber replacement of conventional RF phased array distribution and control components, (2) spatial beam forming, and (3) optical beam splitting with integrated quasi-optical components. The optical fiber replacement and the spatial beam forming approaches were pursued by many organizations. Two new optical beam forming architectures are presented. Both architectures involve monolithic integration of the antenna radiating elements with quasi-optical grid detector arrays. The advantages of the grid detector array in the optical process are the higher power handling capability and the dynamic range. One architecture involves a modified version of the original spatial beam forming approach. The basic difference is the spatial light modulator (SLM) device for controlling the aperture field distribution. The original liquid crystal light valve SLM is replaced by an optical shuffling SLM, which was demonstrated for the 'smart pixel' technology. The advantages are the capability of generating the agile beams of a phased array antenna and to provide simultaneous transmit and receive functions. The second architecture considered is the optical beam splitting approach. This architecture involves an alternative amplitude control for each antenna element with an optical beam power divider comprised of mirrors and beam splitters. It also implements the quasi-optical grid phase shifter for phase control and grid amplifier for RF power. The advantages are no SLM is required for this approach, and the complete antenna system is capable of full monolithic integration.

Fast disk array for image storage

NASA Astrophysics Data System (ADS)

Feng, Dan; Zhu, Zhichun; Jin, Hai; Zhang, Jiangling

1997-01-01

A fast disk array is designed for the large continuous image storage. It includes a high speed data architecture and the technology of data striping and organization on the disk array. The high speed data path which is constructed by two dual port RAM and some control circuit is configured to transfer data between a host system and a plurality of disk drives. The bandwidth can be more than 100 MB/s if the data path based on PCI (peripheral component interconnect). The organization of data stored on the disk array is similar to RAID 4. Data are striped on a plurality of disk, and each striping unit is equal to a track. I/O instructions are performed in parallel on the disk drives. An independent disk is used to store the parity information in the fast disk array architecture. By placing the parity generation circuit directly on the SCSI (or SCSI 2) bus, the parity information can be generated on the fly. It will affect little on the data writing in parallel on the other disks. The fast disk array architecture designed in the paper can meet the demands of the image storage.

SMEX-Lite Modular Solar Array Architecture

NASA Technical Reports Server (NTRS)

Lyons, John

2002-01-01

For the most part, Goddard solar arrays have been custom designs that are unique to each mission. The solar panel design has been frozen prior to issuing an RFP for their procurement. There has typically been 6-9 months between RFP release and contract award, followed by an additional 24 months for performance of the contract. For Small Explorer (SMEX) missions, with three years between mission definition and launch, this has been a significant problem. The SMEX solar panels have been sufficiently small that the contract performance period has been reduced to 12-15 months. The bulk of this time is used up in the final design definition and fabrication of flight solar cell assemblies. Even so, it has been virtually impossible to have the spacecraft design at a level of maturity sufficient to freeze the solar panel geometry and release the RFP in time to avoid schedule problems with integrating the solar panels to the spacecraft. With that in mind, the SMEX-Lite project team developed a modular architecture for the assembly of solar arrays to greatly reduce the cost and schedule associated with the development of a mission- specific solar array. In the modular architecture, solar cells are fabricated onto small substrate panels. This modular panel (approximately 8.5" x 17" in this case) becomes the building block for constructing solar arrays for multiple missions with varying power requirements and geometrical arrangements. The mechanical framework that holds these modules together as a solar array is the only mission-unique design, changing in size and shape as required for each mission. There are several advantages to this approach. First, the typical solar array development cycle requires a mission unique design, procurement, and qualification including a custom qualification panel. With the modular architecture, a single qualification of the SMEX-Lite modules and the associated mechanical framework in a typical configuration provided a qualification by similarity to multiple missions. It then becomes possible to procure solar array modules in advance of mission definition and respond quickly and inexpensively to a selected mission's unique requirements. The solar array modular architecture allows the procurement of solar array modules before the array geometry has been frozen. This reduces the effect of procurement lead-time on the mission integration and test flow by as much as 50%. Second, by spreading the non-recurring costs over multiple missions, the cost per unit area is also reduced. In the case of the SMEX-Lite procurement, this reduction was by about one third of the cost per unit area compared to previous SMEX mission-unique procurements. Third, the modular architecture greatly facilitates the infusion of new solar cell technologies into flight programs as these technologies become available. New solar cell technologies need only be fabricated onto a standard-sized module to be incorporated into the next available mission. The modular solar array can be flown in a mixed configuration with some new and some standard cell technologies. Since each module has its own wiring terminals, the array can be arranged as desired electrically with little impact to cost and schedule. The solar array modular architecture does impose some additional constraints on systems and subsystem engineers. First, they must work with discrete solar array modules rather than size the array to fit exactly within an available envelope. The array area is constrained to an integer multiple of the module area. Second, the modular design is optimized for space radiation and thermal environments not greatly different from a typical SMEX LEO environment. For example, a mission with a highly elliptical orbit (e.g., Polar, SMEX/FAST) would require thicker coverglasses to protect the solar cells from the more intense radiation environment.

Dynamic array processing for computationally intensive expert systems in CLIPS

NASA Technical Reports Server (NTRS)

Athavale, N. N.; Ragade, R. K.; Fenske, T. E.; Cassaro, M. A.

1990-01-01

This paper puts forth an architecture for implementing a loop for advanced data structure of arrays in CLIPS. An attempt is made to use multi-field variables in such an architecture to process a set of data during the decision making cycle. Also, current limitations on the expert system shells are discussed in brief in this paper. The resulting architecture is designed to circumvent the current limitations set by the expert system shell and also by the operating environment. Such advanced data structures are needed for tightly coupling symbolic and numeric computation modules.

Multibeam Phased Array Antennas

NASA Technical Reports Server (NTRS)

Popovic, Zoya; Romisch, Stefania; Rondineau, Sebastien

2004-01-01

In this study, a new architecture for Ka-band multi-beam arrays was developed and demonstrated experimentally. The goal of the investigation was to demonstrate a new architecture that has the potential of reducing the cost as compared to standard expensive phased array technology. The goals of this specific part of the project, as stated in the yearly statement of work in the original proposal are: 1. Investigate bounds on performance of multi-beam lens arrays in terms of beamwidths, volume (size), isolation between beams, number of simultaneous beams, etc. 2. Design a small-scale array to demonstrate the principle. The array will be designed for operation around 3OGHz (Ka-band), with two 10-degree beamwidth beams. 3. Investigate most appropriate way to accomplish fine-tuning of the beam pointing within 5 degrees around the main beam pointing angle.

Proposed Array-based Deep Space Network for NASA

NASA Technical Reports Server (NTRS)

Bagri, Durgadas S.; Statman, Joseph I.; Gatti, Mark S.

2007-01-01

The current assets of the Deep Space Network (DSN) of the National Aeronautics and Space Administration (NASA), especially the 70-m antennas, are aging and becoming less reliable. Furthermore, they are expensive to operate and difficult to upgrade for operation at Ka-band (321 GHz). Replacing them with comparable monolithic large antennas would be expensive. On the other hand, implementation of similar high-sensitivity assets can be achieved economically using an array-based architecture, where sensitivity is measured by G/T, the ratio of antenna gain to system temperature. An array-based architecture would also provide flexibility in operations and allow for easy addition of more G/T whenever required. Therefore, an array-based plan of the next-generation DSN for NASA has been proposed. The DSN array would provide more flexible downlink capability compared to the current DSN for robust telemetry, tracking and command services to the space missions of NASA and its international partners in a cost effective way. Instead of using the array as an element of the DSN and relying on the existing concept of operation, we explore a broader departure in establishing a more modern concept of operations to reduce the operations costs. This paper presents the array-based architecture for the next generation DSN. It includes system block diagram, operations philosophy, user's view of operations, operations management, and logistics like maintenance philosophy and anomaly analysis and reporting. To develop the various required technologies and understand the logistics of building the array-based lowcost system, a breadboard array of three antennas has been built. This paper briefly describes the breadboard array system and its performance.

Electrostatic micromembrane actuator arrays as motion generator

NASA Astrophysics Data System (ADS)

Wu, X. T.; Hui, J.; Young, M.; Kayatta, P.; Wong, J.; Kennith, D.; Zhe, J.; Warde, C.

2004-05-01

A rigid-body motion generator based on an array of micromembrane actuators is described. Unlike previous microelectromechanical systems (MEMS) techniques, the architecture employs a large number (typically greater than 1000) of micron-sized (10-200 μm) membrane actuators to simultaneously generate the displacement of a large rigid body, such as a conventional optical mirror. For optical applications, the approach provides optical design freedom of MEMS mirrors by enabling large-aperture mirrors to be driven electrostatically by MEMS actuators. The micromembrane actuator arrays have been built using a stacked architecture similar to that employed in the Multiuser MEMS Process (MUMPS), and the motion transfer from the arrayed micron-sized actuators to macro-sized components was demonstrated.

Thermal Management of Quantum Cascade Lasers in an individually Addressable Array Architecture

DTIC Science & Technology

2016-02-08

Thermal Management of Quantum Cascade Lasers in an Individually Addressable Monolithic Array Architecture Leo Missaggia, Christine Wang, Michael...power laser systems in the mid-to-long-infrared wavelength range. By virtue of their demonstrated watt-level performance and wavelength diversity...quantum cascade laser (QCL) and amplifier devices are an excellent choice of emitter for those applications. To realize the power levels of interest

SMEX-Lite Modular Solar Array Architecture

NASA Technical Reports Server (NTRS)

Lyons, John W.; Day, John (Technical Monitor)

2002-01-01

The NASA Small Explorer (SMEX) missions have typically had three years between mission definition and launch. This short schedule has posed significant challenges with respect to solar array design and procurement. Typically, the solar panel geometry is frozen prior to going out with a procurement. However, with the SMEX schedule, it has been virtually impossible to freeze the geometry in time to avoid scheduling problems with integrating the solar panels to the spacecraft. A modular solar array architecture was developed to alleviate this problem. This approach involves procuring sufficient modules for multiple missions and assembling the modules onto a solar array framework that is unique to each mission. The modular approach removes the solar array from the critical path of the SMEX integration and testing schedule. It also reduces the cost per unit area of the solar arrays and facilitates the inclusion of experiments involving new solar cell or panel technologies in the SMEX missions.

Integrated optical phased arrays for quasi-Bessel-beam generation.

PubMed

Notaros, Jelena; Poulton, Christopher V; Byrd, Matthew J; Raval, Manan; Watts, Michael R

2017-09-01

Integrated optical phased arrays for generating quasi-Bessel beams are proposed and experimentally demonstrated in a CMOS-compatible platform. Owing to their elongated central beams, Bessel beams have applications in a range of fields, including multiparticle trapping and laser lithography. In this Letter, continuous Bessel theory is manipulated to formulate the phase and amplitude conditions necessary for generating free-space-propagating Bessel-Gauss beams using on-chip optical phased arrays. Discussion of the effects of select phased array parameters on the generated beam's figures of merit is included. A one-dimensional splitter-tree-based phased array architecture is modified to enable arbitrary passive control of the array's element phase and amplitude distributions. This architecture is used to experimentally demonstrate on-chip quasi-Bessel-beam generation with a ∼14  mm Bessel length and ∼30  μm power full width at half maximum.

Motion camera based on a custom vision sensor and an FPGA architecture

NASA Astrophysics Data System (ADS)

Arias-Estrada, Miguel

1998-09-01

A digital camera for custom focal plane arrays was developed. The camera allows the test and development of analog or mixed-mode arrays for focal plane processing. The camera is used with a custom sensor for motion detection to implement a motion computation system. The custom focal plane sensor detects moving edges at the pixel level using analog VLSI techniques. The sensor communicates motion events using the event-address protocol associated to a temporal reference. In a second stage, a coprocessing architecture based on a field programmable gate array (FPGA) computes the time-of-travel between adjacent pixels. The FPGA allows rapid prototyping and flexible architecture development. Furthermore, the FPGA interfaces the sensor to a compact PC computer which is used for high level control and data communication to the local network. The camera could be used in applications such as self-guided vehicles, mobile robotics and smart surveillance systems. The programmability of the FPGA allows the exploration of further signal processing like spatial edge detection or image segmentation tasks. The article details the motion algorithm, the sensor architecture, the use of the event- address protocol for velocity vector computation and the FPGA architecture used in the motion camera system.

32 bit digital optical computer - A hardware update

NASA Technical Reports Server (NTRS)

Guilfoyle, Peter S.; Carter, James A., III; Stone, Richard V.; Pape, Dennis R.

1990-01-01

Such state-of-the-art devices as multielement linear laser diode arrays, multichannel acoustooptic modulators, optical relays, and avalanche photodiode arrays, are presently applied to the implementation of a 32-bit supercomputer's general-purpose optical central processing architecture. Shannon's theorem, Morozov's control operator method (in conjunction with combinatorial arithmetic), and DeMorgan's law have been used to design an architecture whose 100 MHz clock renders it fully competitive with emerging planar-semiconductor technology. Attention is given to the architecture's multichannel Bragg cells, thermal design and RF crosstalk considerations, and the first and second anamorphic relay legs.

Modeling and Simulation of Phased Array Antennas to Support Next-Generation Satellite Design

NASA Technical Reports Server (NTRS)

Tchorowski, Nicole; Murawski, Robert; Manning, Robert; Fuentes, Michael

2016-01-01

Developing enhanced simulation capabilities has become a significant priority for the Space Communications and Navigation (SCaN) project at NASA as new space communications technologies are proposed to replace aging NASA communications assets, such as the Tracking and Data Relay Satellite System (TDRSS). When developing the architecture for these new space communications assets, it is important to develop updated modeling and simulation methodologies, such that competing architectures can be weighed against one another and the optimal path forward can be determined. There have been many simulation tools developed here at NASA for the simulation of single RF link budgets, or for the modeling and simulation of an entire network of spacecraft and their supporting SCaN network elements. However, the modeling capabilities are never fully complete and as new technologies are proposed, gaps are identified. One such gap is the ability to rapidly develop high fidelity simulation models of electronically steerable phased array systems. As future relay satellite architectures are proposed that include optical communications links, electronically steerable antennas will become more desirable due to the reduction in platform vibration introduced by mechanically steerable devices. In this research, we investigate how modeling of these antennas can be introduced into out overall simulation and modeling structure. The ultimate goal of this research is two-fold. First, to enable NASA engineers to model various proposed simulation architectures and determine which proposed architecture meets the given architectural requirements. Second, given a set of communications link requirements for a proposed satellite architecture, determine the optimal configuration for a phased array antenna. There is a variety of tools available that can be used to model phased array antennas. To meet our stated goals, the first objective of this research is to compare the subset of tools available to us, trading-off modeling fidelity of the tool with simulation performance. When comparing several proposed architectures, higher- fidelity modeling may be desirable, however, when iterating a proposed set of communication link requirements across ranges of phased array configuration parameters, the practicality of performance becomes a significant requirement. In either case, a minimum simulation - fidelity must be met, regardless of performance considerations, which will be discussed in this research. Given a suitable set of phased array modeling tools, this research then focuses on integration with current SCaN modeling and simulation tools. While properly modeling the antenna elements of a system are vital, this is only a small part of the end-to-end communication path between a satellite and the supporting ground station and/or relay satellite assets. To properly model a proposed simulation architecture, this toolset must be integrated with other commercial and government development tools, such that the overall architecture can be examined in terms of communications, reliability, and cost. In this research, integration with previously developed communication tools is investigated.

Antenna-Coupled Bolometer Arrays for Astrophysics

NASA Astrophysics Data System (ADS)

Bock, James

Bolometers offer the best sensitivity in the far-infrared to millimeter-wave region of the electromagnetic spectrum. We are developing arrays of feedhorn-coupled bolometers for the ESA/NASA Planck Surveyor and Herschel Space Observatory. Advances in the format and sensitivity of bolometric focal plane array enables future astrophysics mission opportunities, such as CMB polarimetry and far-infrared/submillimeter spectral line surveys. Compared to bolometers with extended area radiation absorbers, antenna-coupled bolometers offer active volumes that are orders of magnitude smaller. Coupled to lithographed micro-strip filters and antennas, antenna-coupled bolometer arrays allow flexible focal plane architectures specialized for imaging, polarimetry, and spectroscopy. These architectures greatly reduce the mass of sub-Kelvin bolometer focal planes that drive the design of bolometric instrumentation.

Maximizing omnidirectional light harvesting in metal oxide hyperbranched array architectures

NASA Astrophysics Data System (ADS)

Wu, Wu-Qiang; Feng, Hao-Lin; Rao, Hua-Shang; Xu, Yang-Fan; Kuang, Dai-Bin; Su, Cheng-Yong

2014-05-01

The scrupulous design of nanoarchitectures and smart hybridization of specific active materials are closely related to the overall photovoltaic performance of an anode electrode. Here we present a solution-based strategy for the fabrication of well-aligned metal oxide-based nanowire-nanosheet-nanorod hyperbranched arrays on transparent conducting oxide substrates. For these hyperbranched arrays, we observe a twofold increment in dye adsorption and enhanced light trapping and scattering capability compared with the pristine titanium dioxide nanowires, and thus a power conversion efficiency of 9.09% is achieved. Our growth approach presents a strategy to broaden the photoresponse and maximize the light-harvesting efficiency of arrays architectures, and may lead to applications for energy conversion and storage, catalysis, water splitting and gas sensing.

Maximizing omnidirectional light harvesting in metal oxide hyperbranched array architectures.

PubMed

Wu, Wu-Qiang; Feng, Hao-Lin; Rao, Hua-Shang; Xu, Yang-Fan; Kuang, Dai-Bin; Su, Cheng-Yong

2014-05-29

The scrupulous design of nanoarchitectures and smart hybridization of specific active materials are closely related to the overall photovoltaic performance of an anode electrode. Here we present a solution-based strategy for the fabrication of well-aligned metal oxide-based nanowire-nanosheet-nanorod hyperbranched arrays on transparent conducting oxide substrates. For these hyperbranched arrays, we observe a twofold increment in dye adsorption and enhanced light trapping and scattering capability compared with the pristine titanium dioxide nanowires, and thus a power conversion efficiency of 9.09% is achieved. Our growth approach presents a strategy to broaden the photoresponse and maximize the light-harvesting efficiency of arrays architectures, and may lead to applications for energy conversion and storage, catalysis, water splitting and gas sensing.

Optical implementation of systolic array processing

NASA Technical Reports Server (NTRS)

Caulfield, H. J.; Rhodes, W. T.; Foster, M. J.; Horvitz, S.

1981-01-01

Algorithms for matrix vector multiplication are implemented using acousto-optic cells for multiplication and input data transfer and using charge coupled devices detector arrays for accumulation and output of the results. No two dimensional matrix mask is required; matrix changes are implemented electronically. A system for multiplying a 50 component nonnegative real vector by a 50 by 50 nonnegative real matrix is described. Modifications for bipolar real and complex valued processing are possible, as are extensions to matrix-matrix multiplication and multiplication of a vector by multiple matrices.

The Telecommunications and Data Acquisition Report

NASA Technical Reports Server (NTRS)

Posner, E. C. (Editor)

1987-01-01

Developments in programs managed by the Jet Propulsion Laboratory's Office of Telecommunications and Data Acquisition are discussed. Topics discussed include sorption compression/mechanical expanded hybrid refrigeration, calculated 70-meter antenna performance for offset L-band, systolic arrays and stack decoding, and calibrations of Deep Space Network antennas.

A programmable systolic array correlator as a trigger processor for electron pairs in rich (ring image Cherenkov) counters

NASA Astrophysics Data System (ADS)

Männer, R.

1989-12-01

This paper describes a systolic array processor for a ring image Cherenkov counter which is capable of identifying pairs of electron circles with a known radius and a certain minimum distance within 15 μs. The processor is a very flexible and fast device. It consists of 128 x 128 processing elements (PEs), where one PE is assigned to each pixel of the image. All PEs run synchronously at 40 MHz. The identification of electron circles is done by correlating the detector image with the proper circle circumference. Circle centers are found by peak detection in the correlation result. A second correlation with a circle disc allows circles of closed electron pairs to be rejected. The trigger decision is generated if a pseudo adder detects at least two remaining circles. The device is controlled by a freely programmable sequencer. A VLSI chip containing 8 x 8 PEs is being developed using a VENUS design system and will be produced in 2μ CMOS technology.

Design of a multi-spectral imager built using the compressive sensing single-pixel camera architecture

NASA Astrophysics Data System (ADS)

McMackin, Lenore; Herman, Matthew A.; Weston, Tyler

2016-02-01

We present the design of a multi-spectral imager built using the architecture of the single-pixel camera. The architecture is enabled by the novel sampling theory of compressive sensing implemented optically using the Texas Instruments DLP™ micro-mirror array. The array not only implements spatial modulation necessary for compressive imaging but also provides unique diffractive spectral features that result in a multi-spectral, high-spatial resolution imager design. The new camera design provides multi-spectral imagery in a wavelength range that extends from the visible to the shortwave infrared without reduction in spatial resolution. In addition to the compressive imaging spectrometer design, we present a diffractive model of the architecture that allows us to predict a variety of detailed functional spatial and spectral design features. We present modeling results, architectural design and experimental results that prove the concept.

A Systolic Architecture for Singular Value Decomposition,

DTIC Science & Technology

1983-01-01

Presented at the 1 st International Colloquium on Vector and Parallel Computing in Scientific Applications, Paris, March 191J Contract N00014-82-K.0703...Gene Golub. Private comunication . given inputs x and n 2 , compute 2 2 2 2 /6/ G. H. Golub and F. T. Luk : "Singular Value I + X1 Decomposition

Performance Analysis of a NASA Integrated Network Array

NASA Technical Reports Server (NTRS)

Nessel, James A.

2012-01-01

The Space Communications and Navigation (SCaN) Program is planning to integrate its individual networks into a unified network which will function as a single entity to provide services to user missions. This integrated network architecture is expected to provide SCaN customers with the capabilities to seamlessly use any of the available SCaN assets to support their missions to efficiently meet the collective needs of Agency missions. One potential optimal application of these assets, based on this envisioned architecture, is that of arraying across existing networks to significantly enhance data rates and/or link availabilities. As such, this document provides an analysis of the transmit and receive performance of a proposed SCaN inter-network antenna array. From the study, it is determined that a fully integrated internetwork array does not provide any significant advantage over an intra-network array, one in which the assets of an individual network are arrayed for enhanced performance. Therefore, it is the recommendation of this study that NASA proceed with an arraying concept, with a fundamental focus on a network-centric arraying.

True time-delay photonic beamforming with fine steerability and frequency-agility for spaceborne phased-arrays: a proof-of-concept demonstration

NASA Astrophysics Data System (ADS)

Paul, Dilip K.; Razdan, Rajender; Goldman, Alfred M.

1996-10-01

Feasibility of photonics in beam forming and steering of large phased-array antennas onboard communications satellite/avionics systems is addressed in this paper. Specifically, a proof-of-concept demonstration of phased- array antenna feed network using fiber optic true time-delay (TTD) elements is reported for SATCOM phased-array antennas operating at C-band. Results of the photonic hardware design and performance analysis, including the measured radiation patterns of the antenna array fed by the photonic BFN, are presented. An excellent agreement between the analysis and measured data has been observed. In addition to being light- weight and compact, several unique characteristics such as rf carrier frequency agility and continuous steerability of the radiated beam achieved by the fiber optic TTD architecture are clear evidences of its superiority over other competing photonic architectures.

TROPIX Power System Architecture

NASA Technical Reports Server (NTRS)

Manner, David B.; Hickman, J. Mark

1995-01-01

This document contains results obtained in the process of performing a power system definition study of the TROPIX power management and distribution system (PMAD). Requirements derived from the PMADs interaction with other spacecraft systems are discussed first. Since the design is dependent on the performance of the photovoltaics, there is a comprehensive discussion of the appropriate models for cells and arrays. A trade study of the array operating voltage and its effect on array bus mass is also presented. A system architecture is developed which makes use of a combination of high efficiency switching power convertors and analog regulators. Mass and volume estimates are presented for all subsystems.

Superconducting Bolometer Array Architectures

NASA Technical Reports Server (NTRS)

Benford, Dominic; Chervenak, Jay; Irwin, Kent; Moseley, S. Harvey; Shafer, Rick; Staguhn, Johannes; Wollack, Ed; Oegerle, William (Technical Monitor)

2002-01-01

The next generation of far-infrared and submillimeter instruments require large arrays of detectors containing thousands of elements. These arrays will necessarily be multiplexed, and superconducting bolometer arrays are the most promising present prospect for these detectors. We discuss our current research into superconducting bolometer array technologies, which has recently resulted in the first multiplexed detections of submillimeter light and the first multiplexed astronomical observations. Prototype arrays containing 512 pixels are in production using the Pop-Up Detector (PUD) architecture, which can be extended easily to 1000 pixel arrays. Planar arrays of close-packed bolometers are being developed for the GBT (Green Bank Telescope) and for future space missions. For certain applications, such as a slewed far-infrared sky survey, feedhorncoupling of a large sparsely-filled array of bolometers is desirable, and is being developed using photolithographic feedhorn arrays. Individual detectors have achieved a Noise Equivalent Power (NEP) of -10(exp 17) W/square root of Hz at 300mK, but several orders of magnitude improvement are required and can be reached with existing technology. The testing of such ultralow-background detectors will prove difficult, as this requires optical loading of below IfW. Antenna-coupled bolometer designs have advantages for large format array designs at low powers due to their mode selectivity.

A special purpose silicon compiler for designing supercomputing VLSI systems

NASA Technical Reports Server (NTRS)

Venkateswaran, N.; Murugavel, P.; Kamakoti, V.; Shankarraman, M. J.; Rangarajan, S.; Mallikarjun, M.; Karthikeyan, B.; Prabhakar, T. S.; Satish, V.; Venkatasubramaniam, P. R.

1991-01-01

Design of general/special purpose supercomputing VLSI systems for numeric algorithm execution involves tackling two important aspects, namely their computational and communication complexities. Development of software tools for designing such systems itself becomes complex. Hence a novel design methodology has to be developed. For designing such complex systems a special purpose silicon compiler is needed in which: the computational and communicational structures of different numeric algorithms should be taken into account to simplify the silicon compiler design, the approach is macrocell based, and the software tools at different levels (algorithm down to the VLSI circuit layout) should get integrated. In this paper a special purpose silicon (SPS) compiler based on PACUBE macrocell VLSI arrays for designing supercomputing VLSI systems is presented. It is shown that turn-around time and silicon real estate get reduced over the silicon compilers based on PLA's, SLA's, and gate arrays. The first two silicon compiler characteristics mentioned above enable the SPS compiler to perform systolic mapping (at the macrocell level) of algorithms whose computational structures are of GIPOP (generalized inner product outer product) form. Direct systolic mapping on PLA's, SLA's, and gate arrays is very difficult as they are micro-cell based. A novel GIPOP processor is under development using this special purpose silicon compiler.

Phased Array-Fed Reflector (PAFR) Antenna Architectures for Space-Based Sensors

NASA Technical Reports Server (NTRS)

Cooley, Michael E.

2014-01-01

Communication link and target ranges for satellite communications (SATCOM) and space-based sensors (e.g. radars) vary from approximately 1000 km (for LEO satellites) to 35,800 km (for GEO satellites). At these long ranges, large antenna gains are required and legacy payloads have usually employed large reflectors with single beams that are either fixed or mechanically steered. For many applications, there are inherent limitations that are associated with the use of these legacy antennas/payloads. Hybrid antenna designs using Phased Array Fed Reflectors (PAFRs) provide a compromise between reflectors and Direct Radiating phased Arrays (DRAs). PAFRs provide many of the performance benefits of DRAs while utilizing much smaller, lower cost (feed) arrays. The primary limitation associated with hybrid PAFR architectures is electronic scan range; approximately +/-5 to +/- 10 degrees is typical, but this range depends on many factors. For LEO applications, the earth FOV is approximately +/-55 degrees which is well beyond the range of electronic scanning for PAFRs. However, for some LEO missions, limited scanning is sufficient or the CONOPS and space vehicle designs can be developed to incorporate a combination mechanical slewing and electronic scanning. In this paper, we review, compare and contrast various PAFR architectures with a focus on their general applicability to space missions. We compare the RF performance of various PAFR architectures and describe key hardware design and implementation trades. Space-based PAFR designs are highly multi-disciplinary and we briefly address key hardware engineering design areas. Finally, we briefly describe two PAFR antenna architectures that have been developed at Northrop Grumman.

A novel VLSI processor architecture for supercomputing arrays

NASA Technical Reports Server (NTRS)

Venkateswaran, N.; Pattabiraman, S.; Devanathan, R.; Ahmed, Ashaf; Venkataraman, S.; Ganesh, N.

1993-01-01

Design of the processor element for general purpose massively parallel supercomputing arrays is highly complex and cost ineffective. To overcome this, the architecture and organization of the functional units of the processor element should be such as to suit the diverse computational structures and simplify mapping of complex communication structures of different classes of algorithms. This demands that the computation and communication structures of different class of algorithms be unified. While unifying the different communication structures is a difficult process, analysis of a wide class of algorithms reveals that their computation structures can be expressed in terms of basic IP,IP,OP,CM,R,SM, and MAA operations. The execution of these operations is unified on the PAcube macro-cell array. Based on this PAcube macro-cell array, we present a novel processor element called the GIPOP processor, which has dedicated functional units to perform the above operations. The architecture and organization of these functional units are such to satisfy the two important criteria mentioned above. The structure of the macro-cell and the unification process has led to a very regular and simpler design of the GIPOP processor. The production cost of the GIPOP processor is drastically reduced as it is designed on high performance mask programmable PAcube arrays.

Wide-bandwidth high-resolution search for extraterrestrial intelligence

NASA Technical Reports Server (NTRS)

Horowitz, Paul

1995-01-01

Research was accomplished during the third year of the grant on: BETA architecture, an FFT array, a feature extractor, the Pentium array and workstation, and a radio astronomy spectrometer. The BETA (this SETI project) system architecture has been evolving generally in the direction of greater robustness against terrestrial interference. The new design adds a powerful state-memory feature, multiple simultaneous thresholds, and the ability to integrate multiple spectra in a flexible state-machine architecture. The FFT array is reported with regards to its hardware verification, array production, and control. The feature extractor is responsible for maintaining a moving baseline, recognizing large spectral peaks, following the progress of previously identified interesting spectral regions, and blocking signals from regions previously identified as containing interference. The Pentium array consists of 21 Pentium-based PC motherboards, each with 16 MByte of RAM and an Ethernet interface. Each motherboard receives and processes the data from a feature extractor/correlator board set, passing on the results of a first analysis to the central Unix workstation (through which each is also booted). The radio astronomy spectrometer is a technological spinoff from SETI work. It is proposed to be a combined spectrometer and power-accumulator, for use at Arecibo Observatory to search for neutral hydrogen emission from condensations of neutral hydrogen at high redshift (z = 5).

Engineering interfacial photo-induced charge transfer based on nanobamboo array architecture for efficient solar-to-chemical energy conversion.

PubMed

Wang, Xiaotian; Liow, Chihao; Bisht, Ankit; Liu, Xinfeng; Sum, Tze Chien; Chen, Xiaodong; Li, Shuzhou

2015-04-01

Engineering interfacial photo-induced charge transfer for highly synergistic photocatalysis is successfully realized based on nanobamboo array architecture. Programmable assemblies of various components and heterogeneous interfaces, and, in turn, engineering of the energy band structure along the charge transport pathways, play a critical role in generating excellent synergistic effects of multiple components for promoting photocatalytic efficiency. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Architecture and Hardware Design of Lossless Compression Algorithms for Direct-Write Maskless Lithography Systems

DTIC Science & Technology

2010-04-29

magnitude greater than today’s high-definition video coding standards. Moreover, the micromirror devices of maskless lithography are smaller than those...be found in the literature [33]. In this architecture, the optical source flashes on a writer system, which consists of a micromirror array and a...the writer system. Due to the physical dimension constraints of the micromirror array and writer system, an entire wafer can be written in a few

GMR biosensor arrays: a system perspective.

PubMed

Hall, D A; Gaster, R S; Lin, T; Osterfeld, S J; Han, S; Murmann, B; Wang, S X

2010-05-15

Giant magnetoresistive biosensors are becoming more prevalent for sensitive, quantifiable biomolecular detection. However, in order for magnetic biosensing to become competitive with current optical protein microarray technology, there is a need to increase the number of sensors while maintaining the high sensitivity and fast readout time characteristic of smaller arrays (1-8 sensors). In this paper, we present a circuit architecture scalable for larger sensor arrays (64 individually addressable sensors) while maintaining a high readout rate (scanning the entire array in less than 4s). The system utilizes both time domain multiplexing and frequency domain multiplexing in order to achieve this scan rate. For the implementation, we propose a new circuit architecture that does not use a classical Wheatstone bridge to measure the small change in resistance of the sensor. Instead, an architecture designed around a transimpedance amplifier is employed. A detailed analysis of this architecture including the noise, distortion, and potential sources of errors is presented, followed by a global optimization strategy for the entire system comprising the magnetic tags, sensors, and interface electronics. To demonstrate the sensitivity, quantifiable detection of two blindly spiked samples of unknown concentrations has been performed at concentrations below the limit of detection for the enzyme-linked immunosorbent assay. Lastly, the multiplexing capability and reproducibility of the system was demonstrated by simultaneously monitoring sensors functionalized with three unique proteins at different concentrations in real-time. 2010 Elsevier B.V. All rights reserved.

GMR Biosensor Arrays: A System Perspective

PubMed Central

Hall, D. A.; Gaster, R. S.; Lin, T.; Osterfeld, S. J.; Han, S.; Murmann, B.; Wang, S. X.

2010-01-01

Giant magnetoresistive biosensors are becoming more prevalent for sensitive, quantifiable biomolecular detection. However, in order for magnetic biosensing to become competitive with current optical protein microarray technology, there is a need to increase the number of sensors while maintaining the high sensitivity and fast readout time characteristic of smaller arrays (1 – 8 sensors). In this paper, we present a circuit architecture scalable for larger sensor arrays (64 individually addressable sensors) while maintaining a high readout rate (scanning the entire array in less than 4 seconds). The system utilizes both time domain multiplexing and frequency domain multiplexing in order to achieve this scan rate. For the implementation, we propose a new circuit architecture that does not use a classical Wheatstone bridge to measure the small change in resistance of the sensor. Instead, an architecture designed around a transimpedance amplifier is employed. A detailed analysis of this architecture including the noise, distortion, and potential sources of errors is presented, followed by a global optimization strategy for the entire system comprising the magnetic tags, sensors, and interface electronics. To demonstrate the sensitivity, quantifiable detection of two blindly spiked samples of unknown concentrations has been performed at concentrations below the limit of detection for the enzyme-linked immunosorbent assay. Lastly, the multipexability and reproducibility of the system was demonstrated by simultaneously monitoring sensors functionalized with three unique proteins at different concentrations in real-time. PMID:20207130

Adaptive Identification by Systolic Arrays.

DTIC Science & Technology

1987-12-01

BIBLIOGRIAPHY Anton , Howard, Elementary Linear Algebra , John Wiley & Sons, 19S4. Cristi, Roberto, A Parallel Structure Jor Adaptive Pole Placement...10 11. SYSTEM IDENTIFICATION M*YETHODS ....................... 12 A. LINEAR SYSTEM MODELING ......................... 12 B. SOLUTION OF SYSTEMS OF... LINEAR EQUATIONS ......... 13 C. QR DECOMPOSITION ................................ 14 D. RECURSIVE LEAST SQUARES ......................... 16 E. BLOCK

Frequency Domain Beamforming for a Deep Space Network Downlink Array

NASA Technical Reports Server (NTRS)

Navarro, Robert

2012-01-01

This paper describes a frequency domain beamformer to array up to 8 antennas of NASA's Deep Space Network currently in development. The objective of this array is to replace and enhance the capability of the DSN 70m antennas with multiple 34m antennas for telemetry, navigation and radio science use. The array will coherently combine the entire 500 MHz of usable bandwidth available to DSN receivers. A frequency domain beamforming architecture was chosen over a time domain based architecture to handle the large signal bandwidth and efficiently perform delay and phase calibration. The antennas of the DSN are spaced far enough apart that random atmospheric and phase variations between antennas need to be calibrated out on an ongoing basis in real-time. The calibration is done using measurements obtained from a correlator. This DSN Downlink Array expands upon a proof of concept breadboard array built previously to develop the technology and will become an operational asset of the Deep Space Network. Design parameters for frequency channelization, array calibration and delay corrections will be presented as well a method to efficiently calibrate the array for both wide and narrow bandwidth telemetry.

Microcomputer array processor system. [design for electronic warfare

NASA Technical Reports Server (NTRS)

Slezak, K. D.

1980-01-01

The microcomputer array system is discussed with specific attention given to its electronic warware applications. Several aspects of the system architecture are described as well as some of its distinctive characteristics.

Minimizing energy dissipation of matrix multiplication kernel on Virtex-II

NASA Astrophysics Data System (ADS)

Choi, Seonil; Prasanna, Viktor K.; Jang, Ju-wook

2002-07-01

In this paper, we develop energy-efficient designs for matrix multiplication on FPGAs. To analyze the energy dissipation, we develop a high-level model using domain-specific modeling techniques. In this model, we identify architecture parameters that significantly affect the total energy (system-wide energy) dissipation. Then, we explore design trade-offs by varying these parameters to minimize the system-wide energy. For matrix multiplication, we consider a uniprocessor architecture and a linear array architecture to develop energy-efficient designs. For the uniprocessor architecture, the cache size is a parameter that affects the I/O complexity and the system-wide energy. For the linear array architecture, the amount of storage per processing element is a parameter affecting the system-wide energy. By using maximum amount of storage per processing element and minimum number of multipliers, we obtain a design that minimizes the system-wide energy. We develop several energy-efficient designs for matrix multiplication. For example, for 6×6 matrix multiplication, energy savings of upto 52% for the uniprocessor architecture and 36% for the linear arrary architecture is achieved over an optimized library for Virtex-II FPGA from Xilinx.

Optically controlled phased-array antenna technology for space communication systems

NASA Technical Reports Server (NTRS)

Kunath, Richard R.; Bhasin, Kul B.

1988-01-01

Using MMICs in phased-array applications above 20 GHz requires complex RF and control signal distribution systems. Conventional waveguide, coaxial cable, and microstrip methods are undesirable due to their high weight, high loss, limited mechanical flexibility and large volume. An attractive alternative to these transmission media, for RF and control signal distribution in MMIC phased-array antennas, is optical fiber. Presented are potential system architectures and their associated characteristics. The status of high frequency opto-electronic components needed to realize the potential system architectures is also discussed. It is concluded that an optical fiber network will reduce weight and complexity, and increase reliability and performance, but may require higher power.

Analysis of low-offset CTIA amplifier for small-size-pixel infrared focal plane array

NASA Astrophysics Data System (ADS)

Zhang, Xue; Huang, Zhangcheng; Shao, Xiumei

2014-11-01

The design of input stage amplifier becomes more and more difficult as the expansion of format arrays and reduction of pixel size. A design method of low-offset amplifier based on 0.18-μm process used in small-size pixel is analyzed in order to decrease the dark signal of extended wavelength InGaAs infrared focal plane arrays (IRFPA). Based on an example of a cascode operational amplifier (op-amp), the relationship between input offset voltage and size of each transistor is discussed through theoretical analysis and Monte Carlo simulation. The results indicate that input transistors and load transistors have great influence on the input offset voltage while common-gate transistors are negligible. Furthermore, the offset voltage begins to increase slightly when the width and length of transistors decrease along with the diminution of pixel size, and raises rapidly when the size is smaller than a proximate threshold value. The offset voltage of preamplifiers with differential architecture and single-shared architecture in small pitch pixel are studied. After optimization under same conditions, simulation results show that single-shared architecture has smaller offset voltage than differential architecture.

Integrated optical maze

DOE Office of Scientific and Technical Information (OSTI.GOV)

Roos, E.V.; Hendrix, J.L.

1994-06-01

Improvements to Nuclear Weapons Surety through the development of new detonation control techniques incorporating electro-optic technology are reviewed and proposed in this report. The results of the Kansas City Division`s (KCD`s) literature and vendor search, potential system architecture synthesis, and device test results are the basis of this report. This study has revealed several potential reconfigureable optical interconnect architectures that meet Los Alamos National Laboratory`s preliminary performance specifications. Several planer and global architectures have the potential for meeting the Department of Energy`s applications. Preliminary conclusions on the proposed architectures are discussed. The planer approach of monolithic GaAs amplifier switch arraysmore » is the leading candidate because it meets most of the specifications now. LiNbO{sub 3} and LiTaO{sub 3} planer tree switch arrays are the second choice because they meet all the specifications except for laser power transmission. Although not atop choice, acousto-optical free space switch arrays have been considered and meet most of the specifications. Symmetric-Self Electro-Optic Effect Devices (S-SEED) free space switch arrays are being considered and have excellent potential for smart reconfigureable optical interconnects in the future.« less

Evolutionary genomics of LysM genes in land plants.

PubMed

Zhang, Xue-Cheng; Cannon, Steven B; Stacey, Gary

2009-08-03

The ubiquitous LysM motif recognizes peptidoglycan, chitooligosaccharides (chitin) and, presumably, other structurally-related oligosaccharides. LysM-containing proteins were first shown to be involved in bacterial cell wall degradation and, more recently, were implicated in perceiving chitin (one of the established pathogen-associated molecular patterns) and lipo-chitin (nodulation factors) in flowering plants. However, the majority of LysM genes in plants remain functionally uncharacterized and the evolutionary history of complex LysM genes remains elusive. We show that LysM-containing proteins display a wide range of complex domain architectures. However, only a simple core architecture is conserved across kingdoms. Each individual kingdom appears to have evolved a distinct array of domain architectures. We show that early plant lineages acquired four characteristic architectures and progressively lost several primitive architectures. We report plant LysM phylogenies and associated gene, protein and genomic features, and infer the relative timing of duplications of LYK genes. We report a domain architecture catalogue of LysM proteins across all kingdoms. The unique pattern of LysM protein domain architectures indicates the presence of distinctive evolutionary paths in individual kingdoms. We describe a comparative and evolutionary genomics study of LysM genes in plant kingdom. One of the two groups of tandemly arrayed plant LYK genes likely resulted from an ancient genome duplication followed by local genomic rearrangement, while the origin of the other groups of tandemly arrayed LYK genes remains obscure. Given the fact that no animal LysM motif-containing genes have been functionally characterized, this study provides clues to functional characterization of plant LysM genes and is also informative with regard to evolutionary and functional studies of animal LysM genes.

Nonvolatile Array Of Synapses For Neural Network

NASA Technical Reports Server (NTRS)

Tawel, Raoul

1993-01-01

Elements of array programmed with help of ultraviolet light. A 32 x 32 very-large-scale integrated-circuit array of electronic synapses serves as building-block chip for analog neural-network computer. Synaptic weights stored in nonvolatile manner. Makes information content of array invulnerable to loss of power, and, by eliminating need for circuitry to refresh volatile synaptic memory, makes architecture simpler and more compact.

3D Microstructural Architectures for Metal and Alloy Components Fabricated by 3D Printing/Additive Manufacturing Technologies

NASA Astrophysics Data System (ADS)

Martinez, E.; Murr, L. E.; Amato, K. N.; Hernandez, J.; Shindo, P. W.; Gaytan, S. M.; Ramirez, D. A.; Medina, F.; Wicker, R. B.

The layer-by-layer building of monolithic, 3D metal components from selectively melted powder layers using laser or electron beams is a novel form of 3D printing or additive manufacturing. Microstructures created in these 3D products can involve novel, directional solidification structures which can include crystallographically oriented grains containing columnar arrays of precipitates characteristic of a microstructural architecture. These microstructural architectures are advantageously rendered in 3D image constructions involving light optical microscopy and scanning and transmission electron microscopy observations. Microstructural evolution can also be effectively examined through 3D image sequences which, along with x-ray diffraction (XRD) analysis in the x-y and x-z planes, can effectively characterize related crystallographic/texture variances. This paper compares 3D microstructural architectures in Co-base and Ni-base superalloys, columnar martensitic grain structures in 17-4 PH alloy, and columnar copper oxides and dislocation arrays in copper.

High-speed, automatic controller design considerations for integrating array processor, multi-microprocessor, and host computer system architectures

NASA Technical Reports Server (NTRS)

Jacklin, S. A.; Leyland, J. A.; Warmbrodt, W.

1985-01-01

Modern control systems must typically perform real-time identification and control, as well as coordinate a host of other activities related to user interaction, online graphics, and file management. This paper discusses five global design considerations which are useful to integrate array processor, multimicroprocessor, and host computer system architectures into versatile, high-speed controllers. Such controllers are capable of very high control throughput, and can maintain constant interaction with the nonreal-time or user environment. As an application example, the architecture of a high-speed, closed-loop controller used to actively control helicopter vibration is briefly discussed. Although this system has been designed for use as the controller for real-time rotorcraft dynamics and control studies in a wind tunnel environment, the controller architecture can generally be applied to a wide range of automatic control applications.

Cascading a systolic array and a feedforward neural network for navigation and obstacle avoidance using potential fields

NASA Technical Reports Server (NTRS)

Plumer, Edward S.

1991-01-01

A technique is developed for vehicle navigation and control in the presence of obstacles. A potential function was devised that peaks at the surface of obstacles and has its minimum at the proper vehicle destination. This function is computed using a systolic array and is guaranteed not to have local minima. A feedfoward neural network is then used to control the steering of the vehicle using local potential field information. In this case, the vehicle is a trailer truck backing up. Previous work has demonstrated the capability of a neural network to control steering of such a trailer truck backing to a loading platform, but without obstacles. Now, the neural network was able to learn to navigate a trailer truck around obstacles while backing toward its destination. The network is trained in an obstacle free space to follow the negative gradient of the field, after which the network is able to control and navigate the truck to its target destination in a space of obstacles which may be stationary or movable.

Systolic VLSI Reed-Solomon Decoder

NASA Technical Reports Server (NTRS)

Shao, H. M.; Truong, T. K.; Deutsch, L. J.; Yuen, J. H.

1986-01-01

Decoder for digital communications provides high-speed, pipelined ReedSolomon (RS) error-correction decoding of data streams. Principal new feature of proposed decoder is modification of Euclid greatest-common-divisor algorithm to avoid need for time-consuming computations of inverse of certain Galois-field quantities. Decoder architecture suitable for implementation on very-large-scale integrated (VLSI) chips with negative-channel metaloxide/silicon circuitry.

Passive Wearable Skin Patch Sensor Measures Limb Hemodynamics Based on Electromagnetic Resonance.

PubMed

Cluff, Kim; Becker, Ryan; Jayakumar, Balakumar; Han, Kiyun; Condon, Ernie; Dudley, Kenneth; Szatkowski, George; Pipinos, Iraklis I; Amick, Ryan Z; Patterson, Jeremy

2018-04-01

The objectives of this study were to design and develop an open-circuit electromagnetic resonant skin patch sensor, characterize the fluid volume and resonant frequency relationship, and investigate the sensor's ability to measure limb hemodynamics and pulse volume waveform features. The skin patch was designed from an open-circuit electromagnetic resonant sensor comprised of a single baseline trace of copper configured into a square planar spiral which had a self-resonating response when excited by an external radio frequency sweep. Using a human arm phantom with a realistic vascular network, the sensor's performance to measure limb hemodynamics was evaluated. The sensor was able to measure pulsatile blood flow which registered as shifts in the sensor's resonant frequencies. The time-varying waveform pattern of the resonant frequency displayed a systolic upstroke, a systolic peak, a dicrotic notch, and a diastolic down stroke. The resonant frequency waveform features and peak systolic time were validated against ultrasound pulse wave Doppler. A statistical correlation analysis revealed a strong correlation () between the resonant sensor peak systolic time and the pulse wave Doppler peak systolic time. The sensor was able to detect pulsatile flow, identify hemodynamic waveform features, and measure heart rate with 98% accuracy. The open-circuit resonant sensor design leverages the architecture of a thin planar spiral which is passive (does not require batteries), robust and lightweight (does not have electrical components or electrical connections), and may be able to wirelessly monitor cardiovascular health and limb hemodynamics.

24-71 GHz PCB Array for 5G ISM

NASA Technical Reports Server (NTRS)

Novak, Markus H.; Volakis, John L.; Miranda, Felix A.

2017-01-01

Millimeter-wave 5G mobile architectures need to consolidate disparate frequency bands into a single, multifunctional array. Existing arrays are either narrow-band, prohibitively expensive or cannot be scaled to these frequencies. In this paper, we present the first ultra-wideband millimeter wave array to operate across six 5G and ISM bands spanning 24-71 GHz. Importantly, the array is realized using low-cost PCB. The paper presents the design and optimized layout, and discusses fabrication and measurements.

A model for the distributed storage and processing of large arrays

NASA Technical Reports Server (NTRS)

Mehrota, P.; Pratt, T. W.

1983-01-01

A conceptual model for parallel computations on large arrays is developed. The model provides a set of language concepts appropriate for processing arrays which are generally too large to fit in the primary memories of a multiprocessor system. The semantic model is used to represent arrays on a concurrent architecture in such a way that the performance realities inherent in the distributed storage and processing can be adequately represented. An implementation of the large array concept as an Ada package is also described.

Applications of an architecture design and assessment system (ADAS)

NASA Technical Reports Server (NTRS)

Gray, F. Gail; Debrunner, Linda S.; White, Tennis S.

1988-01-01

A new Architecture Design and Assessment System (ADAS) tool package is introduced, and a range of possible applications is illustrated. ADAS was used to evaluate the performance of an advanced fault-tolerant computer architecture in a modern flight control application. Bottlenecks were identified and possible solutions suggested. The tool was also used to inject faults into the architecture and evaluate the synchronization algorithm, and improvements are suggested. Finally, ADAS was used as a front end research tool to aid in the design of reconfiguration algorithms in a distributed array architecture.

His-Tag-Mediated Dimerization of Chemoreceptors Leads to Assembly of Functional Nanoarrays.

PubMed

Haglin, Elizabeth R; Yang, Wen; Briegel, Ariane; Thompson, Lynmarie K

2017-11-07

Transmembrane chemotaxis receptors are found in bacteria in extended hexagonal arrays stabilized by the membrane and by cytosolic binding partners, the kinase CheA and coupling protein CheW. Models of array architecture and assembly propose receptors cluster into trimers of dimers that associate with one CheA dimer and two CheW monomers to form the minimal "core unit" necessary for signal transduction. Reconstructing in vitro chemoreceptor ternary complexes that are homogeneous and functional and exhibit native architecture remains a challenge. Here we report that His-tag-mediated receptor dimerization with divalent metals is sufficient to drive assembly of nativelike functional arrays of a receptor cytoplasmic fragment. Our results indicate receptor dimerization initiates assembly and precedes formation of ternary complexes with partial kinase activity. Restoration of maximal kinase activity coincides with a shift to larger complexes, suggesting that kinase activity depends on interactions beyond the core unit. We hypothesize that achieving maximal activity requires building core units into hexagons and/or coalescing hexagons into the extended lattice. Overall, the minimally perturbing His-tag-mediated dimerization leads to assembly of chemoreceptor arrays with native architecture and thus serves as a powerful tool for studying the assembly and mechanism of this complex and other multiprotein complexes.

Spaceborne Processor Array

NASA Technical Reports Server (NTRS)

Chow, Edward T.; Schatzel, Donald V.; Whitaker, William D.; Sterling, Thomas

2008-01-01

A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.

Concepts and Development of Bio-Inspired Distributed Embedded Wired/Wireless Sensor Array Architectures for Acoustic Wave Sensing in Integrated Aerospace Vehicles

NASA Technical Reports Server (NTRS)

Ghoshal, Anindya; Prosser, William H.; Kirikera, Goutham; Schulz, Mark J.; Hughes, Derke J.; Orisamolu, Wally

2003-01-01

This paper discusses the modeling of acoustic emissions in plate structures and their sensing by embedded or surface bonded piezoelectric sensor arrays. Three different modeling efforts for acoustic emission (AE) wave generation and propagation are discussed briefly along with their advantages and disadvantages. Continuous sensors placed at right angles on a plate are being discussed as a new approach to measure and locate the source of acoustic waves. Evolutionary novel signal processing algorithms and bio-inspired distributed sensor array systems are used on large structures and integrated aerospace vehicles for AE source localization and preliminary results are presented. These systems allow for a great reduction in the amount of data that needs to be processed and also reduce the chances of false alarms from ambient noises. It is envisioned that these biomimetic sensor arrays and signal processing techniques will be useful for both wireless and wired sensor arrays for real time health monitoring of large integrated aerospace vehicles and earth fixed civil structures. The sensor array architectures can also be used with other types of sensors and for other applications.

Periodic Application of Concurrent Error Detection in Processor Array Architectures. PhD. Thesis -

NASA Technical Reports Server (NTRS)

Chen, Paul Peichuan

1993-01-01

Processor arrays can provide an attractive architecture for some applications. Featuring modularity, regular interconnection and high parallelism, such arrays are well-suited for VLSI/WSI implementations, and applications with high computational requirements, such as real-time signal processing. Preserving the integrity of results can be of paramount importance for certain applications. In these cases, fault tolerance should be used to ensure reliable delivery of a system's service. One aspect of fault tolerance is the detection of errors caused by faults. Concurrent error detection (CED) techniques offer the advantage that transient and intermittent faults may be detected with greater probability than with off-line diagnostic tests. Applying time-redundant CED techniques can reduce hardware redundancy costs. However, most time-redundant CED techniques degrade a system's performance.

Fly-By-Light/Power-By-Wire Fault-Tolerant Fiber-Optic Backplane

NASA Technical Reports Server (NTRS)

Malekpour, Mahyar R.

2002-01-01

The design and development of a fault-tolerant fiber-optic backplane to demonstrate feasibility of such architecture is presented. The simulation results of test cases on the backplane in the advent of induced faults are presented, and the fault recovery capability of the architecture is demonstrated. The architecture was designed, developed, and implemented using the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL). The architecture was synthesized and implemented in hardware using Field Programmable Gate Arrays (FPGA) on multiple prototype boards.

Integrated optical circuits for numerical computation

NASA Technical Reports Server (NTRS)

Verber, C. M.; Kenan, R. P.

1983-01-01

The development of integrated optical circuits (IOC) for numerical-computation applications is reviewed, with a focus on the use of systolic architectures. The basic architecture criteria for optical processors are shown to be the same as those proposed by Kung (1982) for VLSI design, and the advantages of IOCs over bulk techniques are indicated. The operation and fabrication of electrooptic grating structures are outlined, and the application of IOCs of this type to an existing 32-bit, 32-Mbit/sec digital correlator, a proposed matrix multiplier, and a proposed pipeline processor for polynomial evaluation is discussed. The problems arising from the inherent nonlinearity of electrooptic gratings are considered. Diagrams and drawings of the application concepts are provided.

Mission-Oriented Sensor Arrays and UAVs - a Case Study on Environmental Monitoring

NASA Astrophysics Data System (ADS)

Figueira, N. M.; Freire, I. L.; Trindade, O.; Simões, E.

2015-08-01

This paper presents a new concept of UAV mission design in geomatics, applied to the generation of thematic maps for a multitude of civilian and military applications. We discuss the architecture of Mission-Oriented Sensors Arrays (MOSA), proposed in Figueira et Al. (2013), aimed at splitting and decoupling the mission-oriented part of the system (non safety-critical hardware and software) from the aircraft control systems (safety-critical). As a case study, we present an environmental monitoring application for the automatic generation of thematic maps to track gunshot activity in conservation areas. The MOSA modeled for this application integrates information from a thermal camera and an on-the-ground microphone array. The use of microphone arrays technology is of particular interest in this paper. These arrays allow estimation of the direction-of-arrival (DOA) of the incoming sound waves. Information about events of interest is obtained by the fusion of the data provided by the microphone array, captured by the UAV, fused with information from the termal image processing. Preliminary results show the feasibility of the on-the-ground sound processing array and the simulation of the main processing module, to be embedded into an UAV in a future work. The main contributions of this paper are the proposed MOSA system, including concepts, models and architecture.

Hierarchically structured Co₃O₄@Pt@MnO₂ nanowire arrays for high-performance supercapacitors.

PubMed

Xia, Hui; Zhu, Dongdong; Luo, Zhentao; Yu, Yue; Shi, Xiaoqin; Yuan, Guoliang; Xie, Jianping

2013-10-17

Here we proposed a novel architectural design of a ternary MnO2-based electrode - a hierarchical Co3O4@Pt@MnO2 core-shell-shell structure, where the complemental features of the three key components (a well-defined Co3O4 nanowire array on the conductive Ti substrate, an ultrathin layer of small Pt nanoparticles, and a thin layer of MnO2 nanoflakes) are strategically combined into a single entity to synergize and construct a high-performance electrode for supercapacitors. Owing to the high conductivity of the well-defined Co3O4 nanowire arrays, in which the conductivity was further enhanced by a thin metal (Pt) coating layer, in combination with the large surface area provided by the small MnO2 nanoflakes, the as-fabricated Co3O4@Pt@MnO2 nanowire arrays have exhibited high specific capacitances, good rate capability, and excellent cycling stability. The architectural design demonstrated in this study provides a new approach to fabricate high-performance MnO2-based nanowire arrays for constructing next-generation supercapacitors.

Hierarchically Structured Co3O4@Pt@MnO2 Nanowire Arrays for High-Performance Supercapacitors

NASA Astrophysics Data System (ADS)

Xia, Hui; Zhu, Dongdong; Luo, Zhentao; Yu, Yue; Shi, Xiaoqin; Yuan, Guoliang; Xie, Jianping

2013-10-01

Here we proposed a novel architectural design of a ternary MnO2-based electrode - a hierarchical Co3O4@Pt@MnO2 core-shell-shell structure, where the complemental features of the three key components (a well-defined Co3O4 nanowire array on the conductive Ti substrate, an ultrathin layer of small Pt nanoparticles, and a thin layer of MnO2 nanoflakes) are strategically combined into a single entity to synergize and construct a high-performance electrode for supercapacitors. Owing to the high conductivity of the well-defined Co3O4 nanowire arrays, in which the conductivity was further enhanced by a thin metal (Pt) coating layer, in combination with the large surface area provided by the small MnO2 nanoflakes, the as-fabricated Co3O4@Pt@MnO2 nanowire arrays have exhibited high specific capacitances, good rate capability, and excellent cycling stability. The architectural design demonstrated in this study provides a new approach to fabricate high-performance MnO2-based nanowire arrays for constructing next-generation supercapacitors.

Definition study for photovoltaic residential prototype system

NASA Technical Reports Server (NTRS)

Imamura, M. S.; Hulstrom, R. L.; Cookson, C.; Waldman, B. H.; Lane, R. A.

1976-01-01

A parametric sensitivity study and definition of the conceptual design is presented. A computer program containing the solar irradiance, solar array, and energy balance models was developed to determine the sensitivities of solar insolation and the corresponding solar array output at five sites selected for this study as well as the performance of several solar array/battery systems. A baseline electrical configuration was chosen, and three design options were recommended. The study indicates that the most sensitive parameters are the solar insolation and the inverter efficiency. The baseline PST selected is comprised of a 133 sg m solar array, 250 ampere hour battery, one to three inverters, and a full shunt regulator to limit the upper solar array voltage. A minicomputer controlled system is recommended to provide the overall control, display, and data acquisition requirements. Architectural renderings of two photovoltaic residential concepts, one above ground and the other underground, are presented. The institutional problems were defined in the areas of legal liabilities during and after installation of the PST, labor practices, building restrictions and architectural guides, and land use.

A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development

NASA Astrophysics Data System (ADS)

Urfianto, Mohammad Zalfany; Isshiki, Tsuyoshi; Khan, Arif Ullah; Li, Dongju; Kunieda, Hiroaki

This paper presentss a Multiprocessor System-on-Chips (MPSoC) architecture used as an execution platform for the new C-language based MPSoC design framework we are currently developing. The MPSoC architecture is based on an existing SoC platform with a commercial RISC core acting as the host CPU. We extend the existing SoC with a multiprocessor-array block that is used as the main engine to run parallel applications modeled in our design framework. Utilizing several optimizations provided by our compiler, an efficient inter-communication between processing elements with minimum overhead is implemented. A host-interface is designed to integrate the existing RISC core to the multiprocessor-array. The experimental results show that an efficacious integration is achieved, proving that the designed communication module can be used to efficiently incorporate off-the-shelf processors as a processing element for MPSoC architectures designed using our framework.

Design of Architectures and Materials in In-Plane Micro-supercapacitors: Current Status and Future Challenges.

PubMed

Qi, Dianpeng; Liu, Yan; Liu, Zhiyuan; Zhang, Li; Chen, Xiaodong

2017-02-01

The rapid development of integrated electronics and the boom in miniaturized and portable devices have increased the demand for miniaturized and on-chip energy storage units. Currently thin-film batteries or microsized batteries are commercially available for miniaturized devices. However, they still suffer from several limitations, such as short lifetime, low power density, and complex architecture, which limit their integration. Supercapacitors can surmount all these limitations. Particularly for micro-supercapacitors with planar architectures, due to their unique design of the in-plane electrode finger arrays, they possess the merits of easy fabrication and integration into on-chip miniaturized electronics. Here, the focus is on the different strategies to design electrode finger arrays and the material engineering of in-plane micro-supercapacitors. It is expected that the advances in micro-supercapacitors with in-plane architectures will offer new opportunities for the miniaturization and integration of energy-storage units for portable devices and on-chip electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polar exponential sensor arrays unify iconic and Hough space representation

NASA Technical Reports Server (NTRS)

Weiman, Carl F. R.

1990-01-01

The log-polar coordinate system, inherent in both polar exponential sensor arrays and log-polar remapped video imagery, is identical to the coordinate system of its corresponding Hough transform parameter space. The resulting unification of iconic and Hough domains simplifies computation for line recognition and eliminates the slope quantization problems inherent in the classical Cartesian Hough transform. The geometric organization of the algorithm is more amenable to massively parallel architectures than that of the Cartesian version. The neural architecture of the human visual cortex meets the geometric requirements to execute 'in-place' log-Hough algorithms of the kind described here.

Neuron array with plastic synapses and programmable dendrites.

PubMed

Ramakrishnan, Shubha; Wunderlich, Richard; Hasler, Jennifer; George, Suma

2013-10-01

We describe a novel neuromorphic chip architecture that models neurons for efficient computation. Traditional architectures of neuron array chips consist of large scale systems that are interfaced with AER for implementing intra- or inter-chip connectivity. We present a chip that uses AER for inter-chip communication but uses fast, reconfigurable FPGA-style routing with local memory for intra-chip connectivity. We model neurons with biologically realistic channel models, synapses and dendrites. This chip is suitable for small-scale network simulations and can also be used for sequence detection, utilizing directional selectivity properties of dendrites, ultimately for use in word recognition.

The SKA1 LOW telescope: system architecture and design performance

NASA Astrophysics Data System (ADS)

Waterson, Mark F.; Labate, Maria Grazia; Schnetler, Hermine; Wagg, Jeff; Turner, Wallace; Dewdney, Peter

2016-07-01

The SKA1-LOW radio telescope will be a low-frequency (50-350 MHz) aperture array located in Western Australia. Its scientific objectives will prioritize studies of the Epoch of Reionization and pulsar physics. Development of the telescope has been allocated to consortia responsible for the aperture array front end, timing distribution, signal and data transport, correlation and beamforming signal processors, infrastructure, monitor and control systems, and science data processing. This paper will describe the system architectural design and key performance parameters of the telescope and summarize the high-level sub-system designs of the consortia.

A 2-D Array of Superconducting Magnesium Diboride (MgB2) Far-IR Thermal Detectors for Planetary Exploration

NASA Technical Reports Server (NTRS)

Lakew, Brook

2009-01-01

A 2-D array of superconducting Magnesium Diboride(MgB2) far IR thermal detectors has been fabricated. Such an array is intended to be at the focal plane of future generation thermal imaging far-IR instruments that will investigate the outer planets and their icy moons. Fabrication and processing of the pixels of the array as well as noise characterization of architectured MgB2 thin films will be presented. Challenges and solutions for improving the performance of the array will be discussed.

Theory of electronic phase locking of an optical array without a reference beam

NASA Astrophysics Data System (ADS)

Shay, Thomas M.

2006-08-01

The first theory for two novel coherent beam combination architectures that are the first electronic beam combination architectures that completely eliminate the need for a separate reference beam are presented. Detailed theoretical models are developed and presented for the first time.

CORDIC-based digital signal processing (DSP) element for adaptive signal processing

NASA Astrophysics Data System (ADS)

Bolstad, Gregory D.; Neeld, Kenneth B.

1995-04-01

The High Performance Adaptive Weight Computation (HAWC) processing element is a CORDIC based application specific DSP element that, when connected in a linear array, can perform extremely high throughput (100s of GFLOPS) matrix arithmetic operations on linear systems of equations in real time. In particular, it very efficiently performs the numerically intense computation of optimal least squares solutions for large, over-determined linear systems. Most techniques for computing solutions to these types of problems have used either a hard-wired, non-programmable systolic array approach, or more commonly, programmable DSP or microprocessor approaches. The custom logic methods can be efficient, but are generally inflexible. Approaches using multiple programmable generic DSP devices are very flexible, but suffer from poor efficiency and high computation latencies, primarily due to the large number of DSP devices that must be utilized to achieve the necessary arithmetic throughput. The HAWC processor is implemented as a highly optimized systolic array, yet retains some of the flexibility of a programmable data-flow system, allowing efficient implementation of algorithm variations. This provides flexible matrix processing capabilities that are one to three orders of magnitude less expensive and more dense than the current state of the art, and more importantly, allows a realizable solution to matrix processing problems that were previously considered impractical to physically implement. HAWC has direct applications in RADAR, SONAR, communications, and image processing, as well as in many other types of systems.

Array processor architecture

NASA Technical Reports Server (NTRS)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1983-01-01

A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

Bioinspired architecture approach for a one-billion transistor smart CMOS camera chip

NASA Astrophysics Data System (ADS)

Fey, Dietmar; Komann, Marcus

2007-05-01

In the paper we present a massively parallel VLSI architecture for future smart CMOS camera chips with up to one billion transistors. To exploit efficiently the potential offered by future micro- or nanoelectronic devices traditional on central structures oriented parallel architectures based on MIMD or SIMD approaches will fail. They require too long and too many global interconnects for the distribution of code or the access to common memory. On the other hand nature developed self-organising and emergent principles to manage successfully complex structures based on lots of interacting simple elements. Therefore we developed a new as Marching Pixels denoted emergent computing paradigm based on a mixture of bio-inspired computing models like cellular automaton and artificial ants. In the paper we present different Marching Pixels algorithms and the corresponding VLSI array architecture. A detailed synthesis result for a 0.18 μm CMOS process shows that a 256×256 pixel image is processed in less than 10 ms assuming a moderate 100 MHz clock rate for the processor array. Future higher integration densities and a 3D chip stacking technology will allow the integration and processing of Mega pixels within the same time since our architecture is fully scalable.

Memristor-based programmable logic array (PLA) and analysis as Memristive networks.

PubMed

Lee, Kwan-Hee; Lee, Sang-Jin; Kim, Seok-Man; Cho, Kyoungrok

2013-05-01

A Memristor theorized by Chua in 1971 has the potential to dramatically influence the way electronic circuits are designed. It is a two terminal device whose resistance state is based on the history of charge flow brought about as the result of the voltage being applied across its terminals and hence can be thought of as a special case of a reconfigurable resistor. Nanoscale devices using dense and regular fabrics such as Memristor cross-bar is promising new architecture for System-on-Chip (SoC) implementations in terms of not only the integration density that the technology can offer but also both improved performance and reduced power dissipation. Memristor has the capacity to switch between high and low resistance states in a cross-bar circuit configuration. The cross-bars are formed from an array of vertical conductive nano-wires cross a second array of horizontal conductive wires. Memristors are realized at the intersection of the two wires in the array through appropriate processing technology such that any particular wire in the vertical array can be connected to a wire in the horizontal array by switching the resistance of a particular intersection to a low state while other cross-points remain in a high resistance state. However the approach introduces a number of challenges. The lack of voltage gain prevents logic being cascaded and voltage level degradation affects robustness of the operation. Moreover the cross-bars introduce sneak current paths when two or more cross points are connected through the switched Memristor. In this paper, we propose Memristor-based programmable logic array (PLA) architecture and develop an analytical model to analyze the logic level on the memristive networks. The proposed PLA architecture has 12 inputs maximum and can be cascaded for more input variables with R(off)/R(on) ratio in the range from 55 to 160 of Memristors.

Phased laser array with tailored spectral and coherence properties

DOEpatents

Messerly, Michael J [Danville, CA; Dawson, Jay W [Livermore, CA; Beach, Raymond J [Livermore, CA

2011-03-29

Architectures for coherently combining an array of fiber-based lasers are provided. By matching their lengths to within a few integer multiples of a wavelength, the spatial and temporal properties of a single large laser are replicated, while extending the average or peak pulsed power limit.

Phased laser array with tailored spectral and coherence properties

DOEpatents

Messerly, Michael J; Dawson, Jay W; Beach, Raymond J

2014-05-20

Architectures for coherently combining an array of fiber-based lasers are provided. By matching their lengths to within a few integer multiples of a wavelength, the spatial and temporal properties of a single large laser are replicated, while extending the average or peak pulsed power limit.

Maximum Constrained Directivity of Oversteered End-Fire Sensor Arrays

PubMed Central

Trucco, Andrea; Traverso, Federico; Crocco, Marco

2015-01-01

For linear arrays with fixed steering and an inter-element spacing smaller than one half of the wavelength, end-fire steering of a data-independent beamformer offers better directivity than broadside steering. The introduction of a lower bound on the white noise gain ensures the necessary robustness against random array errors and sensor mismatches. However, the optimum broadside performance can be obtained using a simple processing architecture, whereas the optimum end-fire performance requires a more complicated system (because complex weight coefficients are needed). In this paper, we reconsider the oversteering technique as a possible way to simplify the processing architecture of equally spaced end-fire arrays. We propose a method for computing the amount of oversteering and the related real-valued weight vector that allows the constrained directivity to be maximized for a given inter-element spacing. Moreover, we verify that the maximized oversteering performance is very close to the optimum end-fire performance. We conclude that optimized oversteering is a viable method for designing end-fire arrays that have better constrained directivity than broadside arrays but with a similar implementation complexity. A numerical simulation is used to perform a statistical analysis, which confirms that the maximized oversteering performance is robust against sensor mismatches. PMID:26066987

Report from the MPP Working Group to the NASA Associate Administrator for Space Science and Applications

NASA Technical Reports Server (NTRS)

Fischer, James R.; Grosch, Chester; Mcanulty, Michael; Odonnell, John; Storey, Owen

1987-01-01

NASA's Office of Space Science and Applications (OSSA) gave a select group of scientists the opportunity to test and implement their computational algorithms on the Massively Parallel Processor (MPP) located at Goddard Space Flight Center, beginning in late 1985. One year later, the Working Group presented its report, which addressed the following: algorithms, programming languages, architecture, programming environments, the way theory relates, and performance measured. The findings point to a number of demonstrated computational techniques for which the MPP architecture is ideally suited. For example, besides executing much faster on the MPP than on conventional computers, systolic VLSI simulation (where distances are short), lattice simulation, neural network simulation, and image problems were found to be easier to program on the MPP's architecture than on a CYBER 205 or even a VAX. The report also makes technical recommendations covering all aspects of MPP use, and recommendations concerning the future of the MPP and machines based on similar architectures, expansion of the Working Group, and study of the role of future parallel processors for space station, EOS, and the Great Observatories era.

IEEE Radio and Wireless Symposium Student Awards Support Request: 2010-2012

DTIC Science & Technology

2012-01-01

Reconfigurable Architecture Enabling All-Digital Transmission for Cognitive Radios ……..3 Ultra-Wide Band Vivaldi Antenna Array using Low Loss SIW Power...1431714191, Iran 2University of Tennessee, Knoxville, TN, 37996, US Ultra-Wide Band Vivaldi Antenna Array using Low Loss SIW Power Divider and GCPW Wide

Compact OXC architecture, design and prototype development for flexible waveband routing optical networks.

PubMed

Ishikawa, Tomohiro; Mori, Yojiro; Hasegawa, Hiroshi; Subramaniam, Suresh; Sato, Ken-Ichi; Moriwaki, Osamu

2017-07-10

A novel compact OXC node architecture that combines WSSs and arrays of small scale optical delivery-coupling type switches ("DCSWs") is proposed. Unlike conventional OXC nodes, the WSSs are only responsible for dynamic path bundling ("flexible waveband") while the small scale optical switches route bundled path groups. A network design algorithm that is aware of the routing scheme is also proposed, and numerical experiments elucidate that the necessary number of WSSs and amplifiers can be significantly reduced. A prototype of the proposed OXC is also developed using monolithic arrayed DCSWs. Transmission experiments on the prototype verify the proposal's technical feasibility.

A Compact VLSI System for Bio-Inspired Visual Motion Estimation.

PubMed

Shi, Cong; Luo, Gang

2018-04-01

This paper proposes a bio-inspired visual motion estimation algorithm based on motion energy, along with its compact very-large-scale integration (VLSI) architecture using low-cost embedded systems. The algorithm mimics motion perception functions of retina, V1, and MT neurons in a primate visual system. It involves operations of ternary edge extraction, spatiotemporal filtering, motion energy extraction, and velocity integration. Moreover, we propose the concept of confidence map to indicate the reliability of estimation results on each probing location. Our algorithm involves only additions and multiplications during runtime, which is suitable for low-cost hardware implementation. The proposed VLSI architecture employs multiple (frame, pixel, and operation) levels of pipeline and massively parallel processing arrays to boost the system performance. The array unit circuits are optimized to minimize hardware resource consumption. We have prototyped the proposed architecture on a low-cost field-programmable gate array platform (Zynq 7020) running at 53-MHz clock frequency. It achieved 30-frame/s real-time performance for velocity estimation on 160 × 120 probing locations. A comprehensive evaluation experiment showed that the estimated velocity by our prototype has relatively small errors (average endpoint error < 0.5 pixel and angular error < 10°) for most motion cases.

A VLSI design of a pipeline Reed-Solomon decoder

NASA Technical Reports Server (NTRS)

Shao, H. M.; Truong, T. K.; Deutsch, L. J.; Yuen, J. H.; Reed, I. S.

1985-01-01

A pipeline structure of a transform decoder similar to a systolic array was developed to decode Reed-Solomon (RS) codes. An important ingredient of this design is a modified Euclidean algorithm for computing the error locator polynomial. The computation of inverse field elements is completely avoided in this modification of Euclid's algorithm. The new decoder is regular and simple, and naturally suitable for VLSI implementation.

Research on Synthesis of Concurrent Computing Systems.

DTIC Science & Technology

1982-09-01

20 1.5.1 An Informal Description of the Techniques ....... ..................... 20 1.5 2 Formal Definitions of Aggregation and Virtualisation ...sparsely interconnected networks . We have also developed techniques to create Kung’s systolic array parallel structure from a specification of matrix...resufts of the computation of that element. For example, if A,j is computed using a single enumeration, then virtualisation would produce a three

Ultra-Wideband Array in PCB for Millimeter-Wave 5G and ISM

NASA Technical Reports Server (NTRS)

Novak, Markus H.; Volakis, John L.; Miranda, Felix A.

2017-01-01

Next generation 5G mobile architectures will take advantage of the millimeter-wave spectrum to deliver unprecedented bandwidth. Concurrently, there is a need to consolidate numerous disparate allocations into a single, multi-functional array. Existing arrays are either narrow-band, prohibitively expensive or cannot be scaled to these frequencies. In this paper, we present the first ultra-wideband millimeter-wave array to operate across the six 5G and ISM bands spanning 24-71 GHz. Critically, the array is realized using low-cost PCB. The design concept and optimized layout are presented, and fabrication and measurement considerations are discussed.

Hierarchically Structured Co3O4@Pt@MnO2 Nanowire Arrays for High-Performance Supercapacitors

PubMed Central

Xia, Hui; Zhu, Dongdong; Luo, Zhentao; Yu, Yue; Shi, Xiaoqin; Yuan, Guoliang; Xie, Jianping

2013-01-01

Here we proposed a novel architectural design of a ternary MnO2-based electrode – a hierarchical Co3O4@Pt@MnO2 core-shell-shell structure, where the complemental features of the three key components (a well-defined Co3O4 nanowire array on the conductive Ti substrate, an ultrathin layer of small Pt nanoparticles, and a thin layer of MnO2 nanoflakes) are strategically combined into a single entity to synergize and construct a high-performance electrode for supercapacitors. Owing to the high conductivity of the well-defined Co3O4 nanowire arrays, in which the conductivity was further enhanced by a thin metal (Pt) coating layer, in combination with the large surface area provided by the small MnO2 nanoflakes, the as-fabricated Co3O4@Pt@MnO2 nanowire arrays have exhibited high specific capacitances, good rate capability, and excellent cycling stability. The architectural design demonstrated in this study provides a new approach to fabricate high-performance MnO2–based nanowire arrays for constructing next-generation supercapacitors. PMID:24132040

The software system for the Control and Data Acquisition for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Wegner, P.; FüBling, M.; Oya, I.; Hagge, L.; Schwanke, U.; Schwarz, J.; Tosti, G.; Conforti, V.; Lyard, E.; Walter, R.; Oliveira Antonino, P.; Morgenstern, A.

2016-10-01

The Cherenkov Telescope Array (CTA), as the next generation ground-based very high-energy gamma-ray observatory, is defining new areas beyond those related to physics. It is also creating new demands on the control and data acquisition system. CTA will consist of two installations, one in each hemisphere, containing tens of telescopes of different sizes. The ACTL (array control and data acquisition) system will consist of the hardware and software that is necessary to control and monitor the CTA array, as well as to time-stamp, read-out, filter and store the scientific data at aggregated rates of a few GB/s. The ACTL system must implement a flexible software architecture to permit the simultaneous automatic operation of multiple sub-arrays of telescopes with a minimum personnel effort on site. In addition ACTL must be able to modify the observation schedule on timescales of a few tens of seconds, to account for changing environmental conditions or to prioritize incoming scientific alerts from time-critical transient phenomena such as gamma-ray bursts. This contribution summarizes the status of the development of the software architecture and the main design choices and plans.

Array processor architecture connection network

NASA Technical Reports Server (NTRS)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1982-01-01

A connection network is disclosed for use between a parallel array of processors and a parallel array of memory modules for establishing non-conflicting data communications paths between requested memory modules and requesting processors. The connection network includes a plurality of switching elements interposed between the processor array and the memory modules array in an Omega networking architecture. Each switching element includes a first and a second processor side port, a first and a second memory module side port, and control logic circuitry for providing data connections between the first and second processor ports and the first and second memory module ports. The control logic circuitry includes strobe logic for examining data arriving at the first and the second processor ports to indicate when the data arriving is requesting data from a requesting processor to a requested memory module. Further, connection circuitry is associated with the strobe logic for examining requesting data arriving at the first and the second processor ports for providing a data connection therefrom to the first and the second memory module ports in response thereto when the data connection so provided does not conflict with a pre-established data connection currently in use.

The MasPar MP-1 As a Computer Arithmetic Laboratory

PubMed Central

Anuta, Michael A.; Lozier, Daniel W.; Turner, Peter R.

1996-01-01

This paper is a blueprint for the use of a massively parallel SIMD computer architecture for the simulation of various forms of computer arithmetic. The particular system used is a DEC/MasPar MP-1 with 4096 processors in a square array. This architecture has many advantages for such simulations due largely to the simplicity of the individual processors. Arithmetic operations can be spread across the processor array to simulate a hardware chip. Alternatively they may be performed on individual processors to allow simulation of a massively parallel implementation of the arithmetic. Compromises between these extremes permit speed-area tradeoffs to be examined. The paper includes a description of the architecture and its features. It then summarizes some of the arithmetic systems which have been, or are to be, implemented. The implementation of the level-index and symmetric level-index, LI and SLI, systems is described in some detail. An extensive bibliography is included. PMID:27805123

Double-sided coaxial circuit QED with out-of-plane wiring

NASA Astrophysics Data System (ADS)

Rahamim, J.; Behrle, T.; Peterer, M. J.; Patterson, A.; Spring, P. A.; Tsunoda, T.; Manenti, R.; Tancredi, G.; Leek, P. J.

2017-05-01

Superconducting circuits are well established as a strong candidate platform for the development of quantum computing. In order to advance to a practically useful level, architectures are needed which combine arrays of many qubits with selective qubit control and readout, without compromising on coherence. Here, we present a coaxial circuit quantum electrodynamics architecture in which qubit and resonator are fabricated on opposing sides of a single chip, and control and readout wiring are provided by coaxial wiring running perpendicular to the chip plane. We present characterization measurements of a fabricated device in good agreement with simulated parameters and demonstrating energy relaxation and dephasing times of T1 = 4.1 μs and T2 = 5.7 μs, respectively. The architecture allows for scaling to large arrays of selectively controlled and measured qubits with the advantage of all wiring being out of the plane.

Solid state laser disk amplifer architecture: the normal-incidence stack

DOEpatents

Dane, C. Brent; Albrecht, Georg F.; Rotter, Mark D.

2005-01-25

Normal incidence stack architecture coupled with the development of diode array pumping enables the power/energy per disk to be increased, a reduction in beam distortions by orders of magnitude, a beam propagation no longer restricted to only one direction of polarization, and the laser becomes so much more amendable to robust packaging.

Application-specific coarse-grained reconfigurable array: architecture and design methodology

NASA Astrophysics Data System (ADS)

Zhou, Li; Liu, Dongpei; Zhang, Jianfeng; Liu, Hengzhu

2015-06-01

Coarse-grained reconfigurable arrays (CGRAs) have shown potential for application in embedded systems in recent years. Numerous reconfigurable processing elements (PEs) in CGRAs provide flexibility while maintaining high performance by exploring different levels of parallelism. However, a difference remains between the CGRA and the application-specific integrated circuit (ASIC). Some application domains, such as software-defined radios (SDRs), require flexibility with performance demand increases. More effective CGRA architectures are expected to be developed. Customisation of a CGRA according to its application can improve performance and efficiency. This study proposes an application-specific CGRA architecture template composed of generic PEs (GPEs) and special PEs (SPEs). The hardware of the SPE can be customised to accelerate specific computational patterns. An automatic design methodology that includes pattern identification and application-specific function unit generation is also presented. A mapping algorithm based on ant colony optimisation is provided. Experimental results on the SDR target domain show that compared with other ordinary and application-specific reconfigurable architectures, the CGRA generated by the proposed method performs more efficiently for given applications.

Unstructured Adaptive Grid Computations on an Array of SMPs

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Pramanick, Ira; Sohn, Andrew; Simon, Horst D.

1996-01-01

Dynamic load balancing is necessary for parallel adaptive methods to solve unsteady CFD problems on unstructured grids. We have presented such a dynamic load balancing framework called JOVE, in this paper. Results on a four-POWERnode POWER CHALLENGEarray demonstrated that load balancing gives significant performance improvements over no load balancing for such adaptive computations. The parallel speedup of JOVE, implemented using MPI on the POWER CHALLENCEarray, was significant, being as high as 31 for 32 processors. An implementation of JOVE that exploits 'an array of SMPS' architecture was also studied; this hybrid JOVE outperformed flat JOVE by up to 28% on the meshes and adaption models tested. With large, realistic meshes and actual flow-solver and adaption phases incorporated into JOVE, hybrid JOVE can be expected to yield significant advantage over flat JOVE, especially as the number of processors is increased, thus demonstrating the scalability of an array of SMPs architecture.

Smart-Pixel Array Processors Based on Optimal Cellular Neural Networks for Space Sensor Applications

NASA Technical Reports Server (NTRS)

Fang, Wai-Chi; Sheu, Bing J.; Venus, Holger; Sandau, Rainer

1997-01-01

A smart-pixel cellular neural network (CNN) with hardware annealing capability, digitally programmable synaptic weights, and multisensor parallel interface has been under development for advanced space sensor applications. The smart-pixel CNN architecture is a programmable multi-dimensional array of optoelectronic neurons which are locally connected with their local neurons and associated active-pixel sensors. Integration of the neuroprocessor in each processor node of a scalable multiprocessor system offers orders-of-magnitude computing performance enhancements for on-board real-time intelligent multisensor processing and control tasks of advanced small satellites. The smart-pixel CNN operation theory, architecture, design and implementation, and system applications are investigated in detail. The VLSI (Very Large Scale Integration) implementation feasibility was illustrated by a prototype smart-pixel 5x5 neuroprocessor array chip of active dimensions 1380 micron x 746 micron in a 2-micron CMOS technology.

A low power, area efficient fpga based beamforming technique for 1-D CMUT arrays.

PubMed

Joseph, Bastin; Joseph, Jose; Vanjari, Siva Rama Krishna

2015-08-01

A low power area efficient digital beamformer targeting low frequency (2MHz) 1-D linear Capacitive Micromachined Ultrasonic Transducer (CMUT) array is developed. While designing the beamforming logic, the symmetry of the CMUT array is well exploited to reduce the area and power consumption. The proposed method is verified in Matlab by clocking an Arbitrary Waveform Generator(AWG). The architecture is successfully implemented in Xilinx Spartan 3E FPGA kit to check its functionality. The beamforming logic is implemented for 8, 16, 32, and 64 element CMUTs targeting Application Specific Integrated Circuit (ASIC) platform at Vdd 1.62V for UMC 90nm technology. It is observed that the proposed architecture consumes significantly lesser power and area (1.2895 mW power and 47134.4 μm(2) area for a 64 element digital beamforming circuit) compared to the conventional square root based algorithm.

Sawmill: A Logging File System for a High-Performance RAID Disk Array

DTIC Science & Technology

1995-01-01

from limiting disk performance, new controller architectures connect the disks directly to the network so that data movement bypasses the file server...These developments raise two questions for file systems: how to get the best performance from a RAID, and how to use such a controller architecture ...the RAID-II storage system; this architecture provides a fast data path that moves data rapidly among the disks, high-speed controller memory, and the

Smart Energy Cryo-refrigerator Technology for the next generation Very Large Array

NASA Astrophysics Data System (ADS)

Spagna, Stefano

2018-01-01

We describe a “smart energy” cryocooler technology architecture for the next generation Very Large Array that makes use of multiple variable frequency cold heads driven from a single variable speed air cooled compressor. Preliminary experiments indicate that the compressor variable flow control, advanced diagnostics, and the cryo-refrigerator low vibration, provide a unique energy efficient capability for the very large number of antennas that will be employed in this array.

Read-In Integrated Circuits for Large-Format Multi-Chip Emitter Arrays

DTIC Science & Technology

2015-03-31

chip has been designed and fabricated using ONSEMI C5N process to verify our approach. Keywords: Large scale arrays; Tiling; Mosaic; Abutment ...required. X and y addressing is not a sustainable and easily expanded addressing architecture nor will it work well with abutted RIICs. Abutment Method... Abutting RIICs into an array is challenging because of the precise positioning required to achieve a uniform image. This problem is a new design

Hardware Architecture Study for NASA's Space Software Defined Radios

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Scardelletti, Maximilian C.; Mortensen, Dale J.; Kacpura, Thomas J.; Andro, Monty; Smith, Carl; Liebetreu, John

2008-01-01

This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions, and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Kacpura, Thomas J.; Smith, Carl R.; Liebetreu, John; Hill, Gary; Mortensen, Dale J.; Andro, Monty; Scardelletti, Maximilian C.; Farrington, Allen

2008-01-01

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Diversity in the organization of elastin bundles and intramembranous muscles in bat wings.

PubMed

Cheney, Jorn A; Allen, Justine J; Swartz, Sharon M

2017-04-01

Unlike birds and insects, bats fly with wings composed of thin skin that envelops the bones of the forelimb and spans the area between the limbs, digits, and sometimes the tail. This skin is complex and unusual; it is thinner than typical mammalian skin and contains organized bundles of elastin and embedded skeletal muscles. These elements are likely responsible for controlling the shape of the wing during flight and contributing to the aerodynamic capabilities of bats. We examined the arrangement of two macroscopic architectural elements in bat wings, elastin bundles and wing membrane muscles, to assess the diversity in bat wing skin morphology. We characterized the plagiopatagium and dactylopatagium of 130 species from 17 families of bats using cross-polarized light imaging. This method revealed structures with distinctive relative birefringence, heterogeneity of birefringence, variation in size, and degree of branching. We used previously published anatomical studies and tissue histology to identify birefringent structures, and we analyzed their architecture across taxa. Elastin bundles, muscles, neurovasculature, and collagenous fibers are present in all species. Elastin bundles are oriented in a predominantly spanwise or proximodistal direction, and there are five characteristic muscle arrays that occur within the plagiopatagium, far more muscle than typically recognized. These results inform recent functional studies of wing membrane architecture, support the functional hypothesis that elastin bundles aid wing folding and unfolding, and further suggest that all bats may use these architectural elements for flight. All species also possess numerous muscles within the wing membrane, but the architecture of muscle arrays within the plagiopatagium varies among families. To facilitate present and future discussion of these muscle arrays, we refine wing membrane muscle nomenclature in a manner that reflects this morphological diversity. The architecture of the constituents of the skin of the wing likely plays a key role in shaping wings during flight. © 2017 Anatomical Society.

Reprogrammable logic in memristive crossbar for in-memory computing

NASA Astrophysics Data System (ADS)

Cheng, Long; Zhang, Mei-Yun; Li, Yi; Zhou, Ya-Xiong; Wang, Zhuo-Rui; Hu, Si-Yu; Long, Shi-Bing; Liu, Ming; Miao, Xiang-Shui

2017-12-01

Memristive stateful logic has emerged as a promising next-generation in-memory computing paradigm to address escalating computing-performance pressures in traditional von Neumann architecture. Here, we present a nonvolatile reprogrammable logic method that can process data between different rows and columns in a memristive crossbar array based on material implication (IMP) logic. Arbitrary Boolean logic can be executed with a reprogrammable cell containing four memristors in a crossbar array. In the fabricated Ti/HfO2/W memristive array, some fundamental functions, such as universal NAND logic and data transfer, were experimentally implemented. Moreover, using eight memristors in a 2  ×  4 array, a one-bit full adder was theoretically designed and verified by simulation to exhibit the feasibility of our method to accomplish complex computing tasks. In addition, some critical logic-related performances were further discussed, such as the flexibility of data processing, cascading problem and bit error rate. Such a method could be a step forward in developing IMP-based memristive nonvolatile logic for large-scale in-memory computing architecture.

Systolic array IC for genetic computation

NASA Technical Reports Server (NTRS)

Anderson, D.

1991-01-01

Measuring similarities between large sequences of genetic information is a formidable task requiring enormous amounts of computer time. Geneticists claim that nearly two months of CRAY-2 time are required to run a single comparison of the known database against the new bases that will be found this year, and more than a CRAY-2 year for next year's genetic discoveries, and so on. The DNA IC, designed at HP-ICBD in cooperation with the California Institute of Technology and the Jet Propulsion Laboratory, is being implemented in order to move the task of genetic comparison onto workstations and personal computers, while vastly improving performance. The chip is a systolic (pumped) array comprised of 16 processors, control logic, and global RAM, totaling 400,000 FETS. At 12 MHz, each chip performs 2.7 billion 16 bit operations per second. Using 35 of these chips in series on one PC board (performing nearly 100 billion operations per second), a sequence of 560 bases can be compared against the eventual total genome of 3 billion bases, in minutes--on a personal computer. While the designed purpose of the DNA chip is for genetic research, other disciplines requiring similarity measurements between strings of 7 bit encoded data could make use of this chip as well. Cryptography and speech recognition are two examples. A mix of full custom design and standard cells, in CMOS34, were used to achieve these goals. Innovative test methods were developed to enhance controllability and observability in the array. This paper describes these techniques as well as the chip's functionality. This chip was designed in the 1989-90 timeframe.

Large Phased Array Radar Using Networked Small Parabolic Reflectors

NASA Technical Reports Server (NTRS)

Amoozegar, Farid

2006-01-01

Multifunction phased array systems with radar, telecom, and imaging applications have already been established for flat plate phased arrays of dipoles, or waveguides. In this paper the design trades and candidate options for combining the radar and telecom functions of the Deep Space Network (DSN) into a single large transmit array of small parabolic reflectors will be discussed. In particular the effect of combing the radar and telecom functions on the sizes of individual antenna apertures and the corresponding spacing between the antenna elements of the array will be analyzed. A heterogeneous architecture for the DSN large transmit array is proposed to meet the radar and telecom requirements while considering the budget, scheduling, and strategic planning constrains.

Self-organized nitrogen and fluorine co-doped titanium oxide nanotube arrays with enhanced visible light photocatalytic performance.

PubMed

Li, Qi; Shang, Jian Ku

2009-12-01

Self-organized nitrogen and fluorine co-doped titanium oxide (TiONF) nanotube arrays were created by anodizing titanium foil in a fluoride and ammoniate-based electrolyte, followed by calcination of the amorphous nanotube arrays under a nitrogen protective atmosphere for crystallization. TiONF nanotube arrays were found to have enhanced visible light absorption capability and photodegradation efficiency on methylene blue under visible light illumination over the TiO(2) nanotube arrays. The enhancement was dependent on both the nanotube structural architecture and the nitrogen and fluorine co-doping effect. TiONF nanotube arrays promise a wide range of technical applications, especially for environmental applications and solar cell devices.

Advanced Architectures for Modern Weather/Multifunction Radars

DTIC Science & Technology

2017-03-01

Advanced Architectures for Modern Weather /Multifunction Radars Caleb Fulton The University of Oklahoma Advanced Radar Research Center Norman...and all of them are addressing the need to lower cost while improving beamforming flexibility in future weather radar systems that will be tasked...with multiple non- weather functions. Keywords: Phased arrays, digital beamforming, multifunction radar. Introduction and Overview As the performance

A Model for Minimizing Numeric Function Generator Complexity and Delay

DTIC Science & Technology

2007-12-01

allow computation of difficult mathematical functions in less time and with less hardware than commonly employed methods. They compute piecewise...Programmable Gate Arrays (FPGAs). The algorithms and estimation techniques apply to various NFG architectures and mathematical functions. This...thesis compares hardware utilization and propagation delay for various NFG architectures, mathematical functions, word widths, and segmentation methods

Submicron Systems Architecture Project

DTIC Science & Technology

1981-11-01

This project is concerned with the architecture , design , and testing of VLSI Systems. The principal activities in this report period include: The Tree Machine; COPE, The Homogeneous Machine; Computational Arrays; Switch-Level Model for MOS Logic Design; Testing; Local Network and Designer Workstations; Self-timed Systems; Characterization of Deadlock Free Resource Contention; Concurrency Algebra; Language Design and Logic for Program Verification.

Indium Hybridization of Large Format TES Bolometer Arrays to Readout Multiplexers for Far-Infrared Astronomy

NASA Technical Reports Server (NTRS)

Miller, Timothy M.; Costen, Nick; Allen, Christine

2007-01-01

This conference poster reviews the Indium hybridization of the large format TES bolometer arrays. We are developing a key technology to enable the next generation of detectors. That is the Hybridization of Large Format Arrays using Indium bonded detector arrays containing 32x40 elements which conforms to the NIST multiplexer readout architecture of 1135 micron pitch. We have fabricated and hybridized mechanical models with the detector chips bonded after being fully back-etched. The mechanical support consists of 30 micron walls between elements Demonstrated electrical continuity for each element. The goal is to hybridize fully functional array of TES detectors to NIST readout.

In situ fabrication of Ni-Co (oxy)hydroxide nanowire-supported nanoflake arrays and their application in supercapacitors.

PubMed

Zheng, Xiaoyu; Quan, Honglin; Li, Xiaoxin; He, Hai; Ye, Qinglan; Xu, Xuetang; Wang, Fan

2016-09-29

Three-dimensional (3D) hybrid nanostructured arrays grown on a flexible substrate have recently attracted great attention owing to their potential application as supercapacitor electrodes in portable and wearable electronic devices. Here, we report an in situ conversion of Ni-Co active electrode materials for the fabrication of high-performance electrodes. Ni-Co carbonate hydroxide nanowire arrays on carbon cloth were initially synthesized via a hydrothermal method, and they were gradually converted to Ni-Co (oxy)hydroxide nanowire-supported nanoflake arrays after soaking in an alkaline solution. The evolution of the supercapacitor performance of the soaked electrode was investigated in detail. The areal capacitance increases from 281 mF cm -2 at 1 mA cm -2 to 3710 and 3900 mF cm -2 after soaking for 36 h and 48 h, respectively. More interestingly, the electrode also shows an increased capacitance with charge/discharge cycles due to the long-time soaking in KOH solution, suggesting novel cycling durability. The enhancement in capacitive performance should be related to the formation of a unique nanowire-supported nanoflake array architecture, which controls the agglomeration of nanoflakes, making them fully activated. As a result, the facile in situ fabrication of the hybrid architectural design in this study provides a new approach to fabricate high-performance Ni/Co based hydroxide nanostructure arrays for next-generation energy storage devices.

Morphology modulation of SrTiO3/TiO2 heterostructures for enhanced photoelectrochemical performance.

PubMed

Jiao, Zhengbo; Chen, Tao; Yu, Hongchao; Wang, Teng; Lu, Gongxuan; Bi, Yingpu

2014-04-01

Design and fabrication of nanoscale semiconductors with regulatable morphology or structure has attracted tremendous interest due to the dependency relationship between properties and architectures. Two types of SrTiO3/TiO2 nanocomposites with different morphologies and structures have been fabricated by controlling the kinetics of hydrothermal reactions. One is TiO2 nanotube arrays densely wrapped by SrTiO3 film and the other is SrTiO3 nanospheres distributed on the top region of TiO2 nanotube arrays, which has been firstly fabricated. It has been found that the photoelectrochemical performances of these heterostructures are crucially dominated by their architectures. Heterostructured SrTiO3/TiO2 nanotube arrays were fabricated by traditional method in the absence of NaOH and they exhibited higher photoelectrochemical performance than pure TiO2 nanotube arrays. However, the compact SrTiO3 coating film on the sidewalls of TiO2 nanotube arrays could inevitably destroy the tubular structures of TiO2 and thus go against the vectorial transport of electrons. Interestingly, when excess NaOH was added into the growth solution, SrTiO3 nanospheres would be rationally grafted on the top of TiO2 nanotube arrays, which could preserve the tubular structures of TiO2, and thus further improve the photoelectrochemical performance. Copyright © 2013 Elsevier Inc. All rights reserved.

Efficient and flexible memory architecture to alleviate data and context bandwidth bottlenecks of coarse-grained reconfigurable arrays

NASA Astrophysics Data System (ADS)

Yang, Chen; Liu, LeiBo; Yin, ShouYi; Wei, ShaoJun

2014-12-01

The computational capability of a coarse-grained reconfigurable array (CGRA) can be significantly restrained due to data and context memory bandwidth bottlenecks. Traditionally, two methods have been used to resolve this problem. One method loads the context into the CGRA at run time. This method occupies very small on-chip memory but induces very large latency, which leads to low computational efficiency. The other method adopts a multi-context structure. This method loads the context into the on-chip context memory at the boot phase. Broadcasting the pointer of a set of contexts changes the hardware configuration on a cycle-by-cycle basis. The size of the context memory induces a large area overhead in multi-context structures, which results in major restrictions on application complexity. This paper proposes a Predictable Context Cache (PCC) architecture to address the above context issues by buffering the context inside a CGRA. In this architecture, context is dynamically transferred into the CGRA. Utilizing a PCC significantly reduces the on-chip context memory and the complexity of the applications running on the CGRA is no longer restricted by the size of the on-chip context memory. Data preloading is the most frequently used approach to hide input data latency and speed up the data transmission process for the data bandwidth issue. Rather than fundamentally reducing the amount of input data, the transferred data and computations are processed in parallel. However, the data preloading method cannot work efficiently because data transmission becomes the critical path as the reconfigurable array scale increases. This paper also presents a Hierarchical Data Memory (HDM) architecture as a solution to the efficiency problem. In this architecture, high internal bandwidth is provided to buffer both reused input data and intermediate data. The HDM architecture relieves the external memory from the data transfer burden so that the performance is significantly improved. As a result of using PCC and HDM, experiments running mainstream video decoding programs achieved performance improvements of 13.57%-19.48% when there was a reasonable memory size. Therefore, 1080p@35.7fps for H.264 high profile video decoding can be achieved on PCC and HDM architecture when utilizing a 200 MHz working frequency. Further, the size of the on-chip context memory no longer restricted complex applications, which were efficiently executed on the PCC and HDM architecture.

Desmin loss and mitochondrial damage precede left ventricular systolic failure in volume overload heart failure.

PubMed

Guichard, Jason L; Rogowski, Michael; Agnetti, Giulio; Fu, Lianwu; Powell, Pamela; Wei, Chih-Chang; Collawn, James; Dell'Italia, Louis J

2017-07-01

Heart failure due to chronic volume overload (VO) in rats and humans is characterized by disorganization of the cardiomyocyte desmin/mitochondrial network. Here, we tested the hypothesis that desmin breakdown is an early and continuous process throughout VO. Male Sprague-Dawley rats had aortocaval fistula (ACF) or sham surgery and were examined 24 h and 4 and 12 wk later. Desmin/mitochondrial ultrastructure was examined by transmission electron microscopy (TEM) and immunohistochemistry (IHC). Protein and kinome analysis were performed in isolated cardiomyocytes, and desmin cleavage was assessed by mass spectrometry in left ventricular (LV) tissue. Echocardiography demonstrated a 40% decrease in the LV mass-to-volume ratio with spherical remodeling at 4 wk with ACF and LV systolic dysfunction at 12 wk. Starting at 24 h and continuing to 4 and 12 wk, with ACF there is TEM evidence of extensive mitochondrial clustering, IHC evidence of disorganization associated with desmin breakdown, and desmin protein cleavage verified by Western blot analysis and mass spectrometry. IHC results revealed that ACF cardiomyocytes at 4 and 12 wk had perinuclear translocation of αB-crystallin from the Z disk with increased α, β-unsaturated aldehyde 4-hydroxynonelal. Use of protein markers with verification by TUNEL staining and kinome analysis revealed an absence of cardiomyocyte apoptosis at 4 and 12 wk of ACF. Significant increases in protein indicators of mitophagy were countered by a sixfold increase in p62/sequestosome-1, which is indicative of an inability to complete autophagy. An early and continuous disruption of the desmin/mitochondrial architecture, accompanied by oxidative stress and inhibition of apoptosis and mitophagy, suggests its causal role in LV dilatation and systolic dysfunction in VO. NEW & NOTEWORTHY This study provides new evidence of early onset (24 h) and continuous (4-12 wk) desmin misarrangement and disruption of the normal sarcomeric and mitochondrial architecture throughout the progression of volume overload heart failure, suggesting a causal link between desmin cleavage and mitochondrial disorganization and damage.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

NASA Astrophysics Data System (ADS)

Liu, Chen; Han, Runze; Zhou, Zheng; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

Dynamic Adaptive Neural Network Arrays: A Neuromorphic Architecture

DOE Office of Scientific and Technical Information (OSTI.GOV)

Disney, Adam; Reynolds, John

2015-01-01

Dynamic Adaptive Neural Network Array (DANNA) is a neuromorphic hardware implementation. It differs from most other neuromorphic projects in that it allows for programmability of structure, and it is trained or designed using evolutionary optimization. This paper describes the DANNA structure, how DANNA is trained using evolutionary optimization, and an application of DANNA to a very simple classification task.

Power Systems Evaluated for Solar Electric Propulsion Vehicles

NASA Technical Reports Server (NTRS)

Kerslake, Thomas W.; Gefert, Leon P.

2000-01-01

Solar electric propulsion (SEP) mission architectures are applicable to a wide range NASA missions including the robotic exploration of the outer planets in the next decade and the human exploration of Mars within the next 2 decades. SEP enables architectures that are very mass efficient with reasonable power levels (1-MW class) aerobrake and cryogenic upper-stage transportation technologies are utilized. In this architecture, the efficient SEP stage transfers the payload from low Earth orbit (LEO) High Energy Elliptical Parking Orbit (HEEPO) within a period of 6 to 12 months. highthrust, cryogenic upper stage and payload then separate from the SEP vehicle for injection to the planetary target, allowing for fast heliocentric trip times. This mission architecture offers a potential reduction in mass to LEO in comparison to alternative all-chemical nuclear propulsion schemes. Mass reductions may allow launch vehicle downsizing enable missions that would have been grounded because of cost constraints. The preceding figure illustrates a conceptual SEP stage design for a human Mars mission. Researchers at the NASA Glenn Research Center at Lewis Field designed conceptual SEP vehicle, conceived the mission architecture to use this vehicle, and analyzed the vehicle s performance. This SEP stage has a dry mass of 35 metric tons (MT), 40 MT of xenon propellant, and a photovoltaic array that spans 110 m, providing power to a cluster of eight 100-kW Hall thrusters. The stage can transfer an 80-MT payload and upper stage to the desired HEEPO. Preliminary packaging studies show this space-station-class SEP vehicle meets the proposed "Magnum" launch vehicle and volume requirements with considerable margin. An SEP vehicle for outer planetary missions, such as the Europa Mapper Mission, would be dramatically smaller than human Mars mission SEP stage. In this mission architecture, the SEP power system with the payload to provide spacecraft power throughout the mission. Several photovoltaic array design concepts were considered for the SEP vehicle power system for the human mission to Mars. These include a space station derivative, a SCARLET (Solar Concentrator Arrays with Refractive Linear Element Technology) derivative, and a hybrid inflatable-deployable thin polymer membrane array with thin-film solar cells (as shown in the concept illustration). This concept is based on a design developed for the Next Generation Space Telescope Sun shield. The array is divided into 16 independent electrical sections with 500-V, negative-grounded solar cell strings. The power system employs a channelized, 500-Vdc power management and distribution (PMAD) architecture with lithium ion batteries for energy storage for vehicle and payload secondary loads (the high-power Hall thrusters do not operate in eclipse periods). The 500-V PMAD voltage permits "direct-drive" thruster operation, greatly reducing the power processing unit size, complexity, and power loss. Similar power system architecture, designs, and technology are assumed for the Europa Mapper Mission SEP vehicle. The primary exceptions are that the photovoltaic array is assumed to consist of two rectangular wings and that the power system rating is 15 kW in Earth orbit and 200 W at Europa. To size the SEP vehicle power system, a dedicated Fortran code was developed to predict detailed power system performance, mass, and thermal control requirements. This code also modeled all the relevant Earth orbit environments; that is, the particulate radiation, plasma, meteoroids and debris, ultraviolet radiation, contamination, and thermal conditions. Analysis results for the Human Mars Mission SEP vehicle show a power system mass of 9-MT and photovoltaic array area of 5800-square meters for the thin-membrane design concept with CuInS2 thin-film cells. Power processing unit input power for a thin-membrane array design with three-junction, amorphous SiGe solar cells is shown in the graph. Power falls off rapidly inhe first weeks of the mission because of light-induced (Staebler-Wronksi) solar cell losses. During the next 200 days, power decreases steadily as the SEP stage spirals through the proton belts and sustains the bulk of the mission radiation damage. Once the vehicle apogee is above approximately four Earth radii, little additional degradation is incurred. From 400 to 800 days, a 1100-km "parking" orbit is maintained to await the next payload transfer opportunity. This orbit is below the main proton belt, and thus, little radiation dose is accumulated during this time period. During the second LEO-to-HEEPO transfer, power degrades somewhat further, but power requirements are still met. In comparison, the Europa Mapper SEP vehicle power system had a mass of 150 kg and a thin membrane array area of 100 square meters.

An All Silicon Feedhorn-Coupled Focal Plane for Cosmic Microwave Background Polarimetry

NASA Technical Reports Server (NTRS)

Hubmayr, J.; Appel, J. W.; Austermann, J. E.; Beall, J. A.; Becker, D.; Benson, B. A.; Bleem, L. E.; Carlstrom, J. E.; Chang, C. L.; Cho, H. M.;

Matrix addressable vertical cavity surface emitting laser array

NASA Astrophysics Data System (ADS)

Orenstein, M.; von Lehmen, A. C.; Chang-Hasnain, C.; Stoffel, N. G.; Harbison, J. P.

1991-02-01

The design, fabrication and characterization of 1024-element matrix-addressable vertical-cavity surface-emitting laser (VCSEL) arrays are described. A strained InGaAs quantum-well VCSEL structure was grown by MBE, and an array of 32 x 32 lasers was defined using a proton implantation process. A matrix addressing architecture was employed, which enables the individual addressing of each of the 1024 lasers using only 64 electrical contacts. All the lasers in the array, measured after the laser definition step, were operating with fairly homogeneous characteristics; threshold current of 6.8 mA and output quantum differential efficiency of about 8 percent.

Nanoband array electrode as a platform for high sensitivity enzyme-based glucose biosensing.

PubMed

Falk, Magnus; Sultana, Reshma; Swann, Marcus J; Mount, Andrew R; Freeman, Neville J

2016-12-01

We describe a novel glucose biosensor based on a nanoband array electrode design, manufactured using standard semiconductor processing techniques, and bio-modified with glucose oxidase immobilized at the nanoband electrode surface. The nanoband array architecture allows for efficient diffusion of glucose and oxygen to the electrode, resulting in a thousand-fold improvement in sensitivity and wide linear range compared to a conventional electrode. The electrode constitutes a robust and manufacturable sensing platform. Copyright © 2016 Elsevier B.V. All rights reserved.

Three-Dimensional Medical Image Analysis Using Local Dynamic Algorithm Selection on a Multiple-Instruction, Multiple-Data Architecture

DTIC Science & Technology

1989-01-01

is represented by a number, called a Hounsfield Unit (HU), which represents the attenuation within the volume relative to the attenuation of the same...volume of water. Hounsfield Unit values range from -1000 to +3000, with a value of zero assigned to the attenuation of water. A HU value of -1000...represented by a 3D array. Each array element represents a single voxel, and the value of the array entry is the corresponding scaled Hounsfield Unit value

Pipelined CPU Design with FPGA in Teaching Computer Architecture

ERIC Educational Resources Information Center

Lee, Jong Hyuk; Lee, Seung Eun; Yu, Heon Chang; Suh, Taeweon

2012-01-01

This paper presents a pipelined CPU design project with a field programmable gate array (FPGA) system in a computer architecture course. The class project is a five-stage pipelined 32-bit MIPS design with experiments on the Altera DE2 board. For proper scheduling, milestones were set every one or two weeks to help students complete the project on…

Using Multiple FPGA Architectures for Real-time Processing of Low-level Machine Vision Functions

Treesearch

Thomas H. Drayer; William E. King; Philip A. Araman; Joseph G. Tront; Richard W. Conners

1995-01-01

In this paper, we investigate the use of multiple Field Programmable Gate Array (FPGA) architectures for real-time machine vision processing. The use of FPGAs for low-level processing represents an excellent tradeoff between software and special purpose hardware implementations. A library of modules that implement common low-level machine vision operations is presented...

A 1 GHz sample rate, 256-channel, 1-bit quantization, CMOS, digital correlator chip

NASA Technical Reports Server (NTRS)

Timoc, C.; Tran, T.; Wongso, J.

1992-01-01

This paper describes the development of a digital correlator chip with the following features: 1 Giga-sample/second; 256 channels; 1-bit quantization; 32-bit counters providing up to 4 seconds integration time at 1 GHz; and very low power dissipation per channel. The improvements in the performance-to-cost ratio of the digital correlator chip are achieved with a combination of systolic architecture, novel pipelined differential logic circuits, and standard 1.0 micron CMOS process.

Space Debris Detection on the HPDP, a Coarse-Grained Reconfigurable Array Architecture for Space

NASA Astrophysics Data System (ADS)

Suarez, Diego Andres; Bretz, Daniel; Helfers, Tim; Weidendorfer, Josef; Utzmann, Jens

2016-08-01

Stream processing, widely used in communications and digital signal processing applications, requires high- throughput data processing that is achieved in most cases using Application-Specific Integrated Circuit (ASIC) designs. Lack of programmability is an issue especially in space applications, which use on-board components with long life-cycles requiring applications updates. To this end, the High Performance Data Processor (HPDP) architecture integrates an array of coarse-grained reconfigurable elements to provide both flexible and efficient computational power suitable for stream-based data processing applications in space. In this work the capabilities of the HPDP architecture are demonstrated with the implementation of a real-time image processing algorithm for space debris detection in a space-based space surveillance system. The implementation challenges and alternatives are described making trade-offs to improve performance at the expense of negligible degradation of detection accuracy. The proposed implementation uses over 99% of the available computational resources. Performance estimations based on simulations show that the HPDP can amply match the application requirements.

A pipelined architecture for real time correction of non-uniformity in infrared focal plane arrays imaging system using multiprocessors

NASA Astrophysics Data System (ADS)

Zou, Liang; Fu, Zhuang; Zhao, YanZheng; Yang, JunYan

2010-07-01

This paper proposes a kind of pipelined electric circuit architecture implemented in FPGA, a very large scale integrated circuit (VLSI), which efficiently deals with the real time non-uniformity correction (NUC) algorithm for infrared focal plane arrays (IRFPA). Dual Nios II soft-core processors and a DSP with a 64+ core together constitute this image system. Each processor undertakes own systematic task, coordinating its work with each other's. The system on programmable chip (SOPC) in FPGA works steadily under the global clock frequency of 96Mhz. Adequate time allowance makes FPGA perform NUC image pre-processing algorithm with ease, which has offered favorable guarantee for the work of post image processing in DSP. And at the meantime, this paper presents a hardware (HW) and software (SW) co-design in FPGA. Thus, this systematic architecture yields an image processing system with multiprocessor, and a smart solution to the satisfaction with the performance of the system.

Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation

NASA Astrophysics Data System (ADS)

Schmatz, M. L.; Jongerius, R.; Dittmann, G.; Anghel, A.; Engbersen, T.; van Lunteren, J.; Buchmann, P.

2014-05-01

The Square Kilometre Array (SKA) is a future radio telescope, currently being designed by the worldwide radio-astronomy community. During the first of two construction phases, more than 250,000 antennas will be deployed, clustered in aperture-array stations. The antennas will generate 2.5 Pb/s of data, which needs to be processed in real time. For the processing stages from A/D conversion to central correlation, we propose an ASIC solution using only three chip architectures. The architecture is scalable - additional chips support additional antennas or beams - and versatile - it can relocate its receiver band within a range of a few MHz up to 4GHz. This flexibility makes it applicable to both SKA phases 1 and 2. The proposed chips implement an antenna and station processor for 289 antennas with a power consumption on the order of 600W and a correlator, including corner turn, for 911 stations on the order of 90 kW.

Two-dimensional acousto-optic processor using circular antenna array with a Butler matrix

NASA Astrophysics Data System (ADS)

Lee, Jim P.

1992-09-01

A two-dimensional acousto-optic signal processor is shown to be useful for providing simultaneous spectrum analysis and direction finding of radar signals over an instantaneous field of view of 360 deg. A system analysis with emphasis on the direction-finding aspect of this new architecture is presented. The peak location of the optical pattern provides a direct measure of bearing, independent of signal frequency. In addition, the sidelobe levels of the pattern can be effectively reduced using amplitude weighting. Performance parameters, such as mainlobe beamwidth, peak-sidelobe level, and pointing error, are analyzed as a function of the Gaussian laser illumination profile and the number of channels. Finally, a comparison with a linear antenna array architecture is also discussed.

Plasma nitriding induced growth of Pt-nanowire arrays as high performance electrocatalysts for fuel cells

NASA Astrophysics Data System (ADS)

Du, Shangfeng; Lin, Kaijie; Malladi, Sairam K.; Lu, Yaxiang; Sun, Shuhui; Xu, Qiang; Steinberger-Wilckens, Robert; Dong, Hanshan

2014-09-01

In this work, we demonstrate an innovative approach, combing a novel active screen plasma (ASP) technique with green chemical synthesis, for a direct fabrication of uniform Pt nanowire arrays on large-area supports. The ASP treatment enables in-situ N-doping and surface modification to the support surface, significantly promoting the uniform growth of tiny Pt nuclei which directs the growth of ultrathin single-crystal Pt nanowire (2.5-3 nm in diameter) arrays, forming a three-dimensional (3D) nano-architecture. Pt nanowire arrays in-situ grown on the large-area gas diffusion layer (GDL) (5 cm2) can be directly used as the catalyst electrode in fuel cells. The unique design brings in an extremely thin electrocatalyst layer, facilitating the charge transfer and mass transfer properties, leading to over two times higher power density than the conventional Pt nanoparticle catalyst electrode in real fuel cell environment. Due to the similar challenges faced with other nanostructures and the high availability of ASP for other material surfaces, this work will provide valuable insights and guidance towards the development of other new nano-architectures for various practical applications.

Shielded Coaxial Optrode Arrays for Neurophysiology

PubMed Central

Naughton, Jeffrey R.; Connolly, Timothy; Varela, Juan A.; Lundberg, Jaclyn; Burns, Michael J.; Chiles, Thomas C.; Christianson, John P.; Naughton, Michael J.

2016-01-01

Recent progress in the study of the brain has been greatly facilitated by the development of new tools capable of minimally-invasive, robust coupling to neuronal assemblies. Two prominent examples are the microelectrode array (MEA), which enables electrical signals from large numbers of neurons to be detected and spatiotemporally correlated, and optogenetics, which enables the electrical activity of cells to be controlled with light. In the former case, high spatial density is desirable but, as electrode arrays evolve toward higher density and thus smaller pitch, electrical crosstalk increases. In the latter, finer control over light input is desirable, to enable improved studies of neuroelectronic pathways emanating from specific cell stimulation. Here, we introduce a coaxial electrode architecture that is uniquely suited to address these issues, as it can simultaneously be utilized as an optical waveguide and a shielded electrode in dense arrays. Using optogenetically-transfected cells on a coaxial MEA, we demonstrate the utility of the architecture by recording cellular currents evoked from optical stimulation. We also show the capability for network recording by radiating an area of seven individually-addressed coaxial electrode regions with cultured cells covering a section of the extent. PMID:27375415

Advanced flight control system study

NASA Technical Reports Server (NTRS)

Mcgough, J.; Moses, K.; Klafin, J. F.

1982-01-01

The architecture, requirements, and system elements of an ultrareliable, advanced flight control system are described. The basic criteria are functional reliability of 10 to the minus 10 power/hour of flight and only 6 month scheduled maintenance. A distributed system architecture is described, including a multiplexed communication system, reliable bus controller, the use of skewed sensor arrays, and actuator interfaces. Test bed and flight evaluation program are proposed.

A MIMO-Inspired Rapidly Switchable Photonic Interconnect Architecture (Postprint)

DTIC Science & Technology

2009-07-01

capabilities of future systems. Highspeed optical processing has been looked to as a means for eliminating this interconnect bottleneck. Presented...here are the results of a study for a novel optical (integrated photonic) processor which would allow for a high-speed, secure means for arbitrarily...regarded as a Multiple Input Multiple Output (MIMO) architecture. 15. SUBJECT TERMS Free-space optical interconnects, Optical Phased Arrays, High-Speed

A Planar Two-Dimensional Superconducting Bolometer Array for the Green Bank Telescope

NASA Technical Reports Server (NTRS)

Benford, Dominic; Staguhn, Johannes G.; Chervenak, James A.; Chen, Tina C.; Moseley, S. Harvey; Wollack, Edward J.; Devlin, Mark J.; Dicker, Simon R.; Supanich, Mark

2004-01-01

In order to provide high sensitivity rapid imaging at 3.3mm (90GHz) for the Green Bank Telescope - the world's largest steerable aperture - a camera is being built by the University of Pennsylvania, NASA/GSFC, and NRAO. The heart of this camera is an 8x8 close-packed, Nyquist-sampled detector array. We have designed and are fabricating a functional superconducting bolometer array system using a monolithic planar architecture. Read out by SQUID multiplexers, the superconducting transition edge sensors will provide fast, linear, sensitive response for high performance imaging. This will provide the first ever superconducting bolometer array on a facility instrument.

A surface code quantum computer in silicon

PubMed Central

Hill, Charles D.; Peretz, Eldad; Hile, Samuel J.; House, Matthew G.; Fuechsle, Martin; Rogge, Sven; Simmons, Michelle Y.; Hollenberg, Lloyd C. L.

2015-01-01

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel—posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited. PMID:26601310

A surface code quantum computer in silicon.

PubMed

Hill, Charles D; Peretz, Eldad; Hile, Samuel J; House, Matthew G; Fuechsle, Martin; Rogge, Sven; Simmons, Michelle Y; Hollenberg, Lloyd C L

2015-10-01

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.

Linking Satellites Via Earth "Hot Spots" and the Internet to Form Ad Hoc Constellations

NASA Technical Reports Server (NTRS)

Mandl, Dan; Frye, Stu; Grosvenor, Sandra; Ingram, Mary Ann; Langley, John; Miranda, Felix; Lee, Richard Q.; Romanofsky, Robert; Zaman, Afoz; Popovic, Zoya

2004-01-01

As more assets are placed in orbit, opportunities emerge to combine various sets of satellites in temporary constellations to perform collaborative image collections. Often, new operations concepts for a satellite or set of satellites emerge after launch. To the degree with which new space assets can be inexpensively and rapidly integrated into temporary or "ad hoc" constellations, will determine whether these new ideas will be implemented or not. On the Earth Observing 1 (EO-1) satellite, a New Millennium Program mission, a number of experiments were conducted and are being conducted to demonstrate various aspects of an architecture that, when taken as a whole, will enable progressive mission autonomy. In particular, the target architecture will use adaptive ground antenna arrays to form, as close as possible, the equivalent of wireless access points for low earth orbiting satellites. Coupled with various ground and flight software and the Internet. the architecture enables progressive mission autonomy. Thus, new collaborative sensing techniques can be implemented post-launch. This paper will outline the overall operations concept and highlight details of both the research effort being conducted in

FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification

PubMed Central

Lin, Shiow-Jyu; Hwang, Wen-Jyi; Lee, Wei-Hao

2012-01-01

This paper presents a novel hardware architecture for principal component analysis. The architecture is based on the Generalized Hebbian Algorithm (GHA) because of its simplicity and effectiveness. The architecture is separated into three portions: the weight vector updating unit, the principal computation unit and the memory unit. In the weight vector updating unit, the computation of different synaptic weight vectors shares the same circuit for reducing the area costs. To show the effectiveness of the circuit, a texture classification system based on the proposed architecture is physically implemented by Field Programmable Gate Array (FPGA). It is embedded in a System-On-Programmable-Chip (SOPC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient design for attaining both high speed performance and low area costs. PMID:22778640

Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning

PubMed Central

Ou, Chien-Min; Li, Hui-Ya; Hwang, Wen-Jyi

2012-01-01

A novel k-winners-take-all (k-WTA) competitive learning (CL) hardware architecture is presented for on-chip learning in this paper. The architecture is based on an efficient pipeline allowing k-WTA competition processes associated with different training vectors to be performed concurrently. The pipeline architecture employs a novel codeword swapping scheme so that neurons failing the competition for a training vector are immediately available for the competitions for the subsequent training vectors. The architecture is implemented by the field programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for realtime on-chip learning. Experimental results show that the SOPC has significantly lower training time than that of other k-WTA CL counterparts operating with or without hardware support.

The software architecture to control the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Oya, I.; Füßling, M.; Antonino, P. O.; Conforti, V.; Hagge, L.; Melkumyan, D.; Morgenstern, A.; Tosti, G.; Schwanke, U.; Schwarz, J.; Wegner, P.; Colomé, J.; Lyard, E.

2016-07-01

The Cherenkov Telescope Array (CTA) project is an initiative to build two large arrays of Cherenkov gamma- ray telescopes. CTA will be deployed as two installations, one in the northern and the other in the southern hemisphere, containing dozens of telescopes of different sizes. CTA is a big step forward in the field of ground- based gamma-ray astronomy, not only because of the expected scientific return, but also due to the order-of- magnitude larger scale of the instrument to be controlled. The performance requirements associated with such a large and distributed astronomical installation require a thoughtful analysis to determine the best software solutions. The array control and data acquisition (ACTL) work-package within the CTA initiative will deliver the software to control and acquire the data from the CTA instrumentation. In this contribution we present the current status of the formal ACTL system decomposition into software building blocks and the relationships among them. The system is modelled via the Systems Modelling Language (SysML) formalism. To cope with the complexity of the system, this architecture model is sub-divided into different perspectives. The relationships with the stakeholders and external systems are used to create the first perspective, the context of the ACTL software system. Use cases are employed to describe the interaction of those external elements with the ACTL system and are traced to a hierarchy of functionalities (abstract system functions) describing the internal structure of the ACTL system. These functions are then traced to fully specified logical elements (software components), the deployment of which as technical elements, is also described. This modelling approach allows us to decompose the ACTL software in elements to be created and the ow of information within the system, providing us with a clear way to identify sub-system interdependencies. This architectural approach allows us to build the ACTL system model and trace requirements to deliverables (source code, documentation, etc.), and permits the implementation of a flexible use-case driven software development approach thanks to the traceability from use cases to the logical software elements. The Alma Common Software (ACS) container/component framework, used for the control of the Atacama Large Millimeter/submillimeter Array (ALMA) is the basis for the ACTL software and as such it is considered as an integral part of the software architecture.

The NASA Deep Space Network (DSN) Array

NASA Technical Reports Server (NTRS)

Gatti, Mark

2006-01-01

The DSN Array Project is currently working with Senior Management at both JPL and NASA to develop strategies towards starting a major implementation project. Several studies within NASA are concluding, all of which recommend that any future DSN capability include arraying of antennas to increase performance. Support of Deep Space, Lunar, and CEV (crewed exploration vehicle) missions is possible. High data rate and TDRSS formatting is being investigated. Any future DSN capacity must include Uplink. Current studies ongoing to investigate and develop technologies for uplink arraying; provides advantages in three ways: 1) N2 effect. EIRP grows as N2(-vs-N for a downlink array); 2) Improved architectural options (can separate uplink and downlink); and 3) Potential for more cost effective transmitters for fixed EIRP.

Integrated focal plane arrays for millimeter-wave astronomy

NASA Astrophysics Data System (ADS)

Bock, James J.; Goldin, Alexey; Hunt, Cynthia; Lange, Andrew E.; Leduc, Henry G.; Day, Peter K.; Vayonakis, Anastasios; Zmuidzinas, Jonas

2002-02-01

We are developing focal plane arrays of bolometric detectors for sub-millimeter and millimeter-wave astrophysics. We propose a flexible array architecture using arrays of slot antennae coupled via low-loss superconducting Nb transmission line to microstrip filters and antenna-coupled bolometers. By combining imaging and filtering functions with transmission line, we are able to realize unique structures such as a multi-band polarimeter and a planar, dispersive spectrometer. Micro-strip bolometers have significantly smaller active volume than standard detectors with extended absorbers, and can realize higher sensitivity and speed of response. The integrated array has natural immunity to stray radiation or spectral leaks, and minimizes the suspended mass operating at 0.1-0.3 K. We also discuss future space-borne spectroscopy and polarimetry applications. .

Frequency Diverse Array Receiver Architectures

DTIC Science & Technology

2015-06-29

completely associated with FDA, the Hybrid MIMO phased array (HMPAR) concept presented in [18] developed the basic beam patern synthesis theory for an...20], that analyzed beam paterns of chirp waveforms with slightly 6 different starting frequencies. In [21] and [11] they investigated using FDA for...forward-looking radar GMTI benefits. This research showed the ability of the range-dependent energy distribution characteristics of the FDA beam patern

Low Average Sidelobe Slot Array Antennas for Radiometer Applications

NASA Technical Reports Server (NTRS)

Rengarajan, Sembiam; Zawardzki, Mark S.; Hodges, Richard E.

2012-01-01

In radiometer applications, it is required to design antennas that meet low average sidelobe levels and low average return loss over a specified frequency bandwidth. It is a challenge to meet such specifications over a frequency range when one uses resonant elements such as waveguide feed slots. In addition to their inherent narrow frequency band performance, the problem is exacerbated due to modeling errors and manufacturing tolerances. There was a need to develop a design methodology to solve the problem. An iterative design procedure was developed by starting with an array architecture, lattice spacing, aperture distribution, waveguide dimensions, etc. The array was designed using Elliott s technique with appropriate values of the total slot conductance in each radiating waveguide, and the total resistance in each feed waveguide. Subsequently, the array performance was analyzed by the full wave method of moments solution to the pertinent integral equations. Monte Carlo simulations were also carried out to account for amplitude and phase errors introduced for the aperture distribution due to modeling errors as well as manufacturing tolerances. If the design margins for the average sidelobe level and the average return loss were not adequate, array architecture, lattice spacing, aperture distribution, and waveguide dimensions were varied in subsequent iterations. Once the design margins were found to be adequate, the iteration was stopped and a good design was achieved. A symmetric array architecture was found to meet the design specification with adequate margin. The specifications were near 40 dB for angular regions beyond 30 degrees from broadside. Separable Taylor distribution with nbar=4 and 35 dB sidelobe specification was chosen for each principal plane. A non-separable distribution obtained by the genetic algorithm was found to have similar characteristics. The element spacing was obtained to provide the required beamwidth and close to a null in the E-plane end-fire direction. Because of the alternating slot offsets, grating lobes called butterfly lobes are produced in non-principal planes close to the H-plane. An attempt to reduce the influence of such grating lobes resulted in a symmetric design.

Possible Circuit Architectures for Molecular Nanoelectronics

NASA Astrophysics Data System (ADS)

Likharev, Konstantin

2003-03-01

Chemically-directed self-assembly of molecular devices is apparently the only feasible way to continue the fast progress of microelectronics after its Moore-Laws-based development runs into the wall of physical and economic limitations [1]. The architectures of VLSI circuits using such devices should be substantially fault-tolerant and accommodate other their features including low transconductance. The most significant feature of all promising suggested architectures is the hybridization of three technologies: advanced CMOS, simple nanowire arrays, and molecular devices self-assembling on these wires. Molecular memory arrays may have a simple structure, and their simple prototypes have already been implemented experimentally [2]. In contrast, the logic circuit development is just starting. I will describe a family of neuromorphic networks based on so-called CrossNet arrays [3] that look promising for advanced information processing, starting from fast image recognition and beyond. This architecture may combine very high density (above 10^12 functions per cm^2) and relatively high speed (100-ns-scale latency of cell-to-cell communications) at acceptable power consumption. In future, these features may allow to put an artificial analog of the human cerebral cortex, capable of processing information and (hopefully) self-evolution at 4 to 5 orders of magnitude faster than its biological prototype, on a 20x20 cm^2 silicon wafer. [1] K. Likharev, "Electronics Below 20-nm", see http://rsfq1.physics.sunysb.edu/ likharev/nano/ForMorkoc.pdf. [2] See, e.g, http://nanotechweb.org/articles/news/1/9/8/1. [3] O. Turel and K. Likharev, Int. J. of Circuit Theory and Applications 31, No.1 (2003); see http://rsfq1.physics.sunysb.edu/ likharev/nano/Preprint070102.pdf.

Survey of new vector computers: The CRAY 1S from CRAY research; the CYBER 205 from CDC and the parallel computer from ICL - architecture and programming

NASA Technical Reports Server (NTRS)

Gentzsch, W.

1982-01-01

Problems which can arise with vector and parallel computers are discussed in a user oriented context. Emphasis is placed on the algorithms used and the programming techniques adopted. Three recently developed supercomputers are examined and typical application examples are given in CRAY FORTRAN, CYBER 205 FORTRAN and DAP (distributed array processor) FORTRAN. The systems performance is compared. The addition of parts of two N x N arrays is considered. The influence of the architecture on the algorithms and programming language is demonstrated. Numerical analysis of magnetohydrodynamic differential equations by an explicit difference method is illustrated, showing very good results for all three systems. The prognosis for supercomputer development is assessed.

Ligand binding by repeat proteins: natural and designed

PubMed Central

Grove, Tijana Z; Cortajarena, Aitziber L; Regan, Lynne

2012-01-01

Repeat proteins contain tandem arrays of small structural motifs. As a consequence of this architecture, they adopt non-globular, extended structures that present large, highly specific surfaces for ligand binding. Here we discuss recent advances toward understanding the functional role of this unique modular architecture. We showcase specific examples of natural repeat proteins interacting with diverse ligands and also present examples of designed repeat protein–ligand interactions. PMID:18602006

The software architecture of the camera for the ASTRI SST-2M prototype for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Sangiorgi, Pierluca; Capalbi, Milvia; Gimenes, Renato; La Rosa, Giovanni; Russo, Francesco; Segreto, Alberto; Sottile, Giuseppe; Catalano, Osvaldo

2016-07-01

The purpose of this contribution is to present the current status of the software architecture of the ASTRI SST-2M Cherenkov Camera. The ASTRI SST-2M telescope is an end-to-end prototype for the Small Size Telescope of the Cherenkov Telescope Array. The ASTRI camera is an innovative instrument based on SiPM detectors and has several internal hardware components. In this contribution we will give a brief description of the hardware components of the camera of the ASTRI SST-2M prototype and of their interconnections. Then we will present the outcome of the software architectural design process that we carried out in order to identify the main structural components of the camera software system and the relationships among them. We will analyze the architectural model that describes how the camera software is organized as a set of communicating blocks. Finally, we will show where these blocks are deployed in the hardware components and how they interact. We will describe in some detail, the physical communication ports and external ancillary devices management, the high precision time-tag management, the fast data collection and the fast data exchange between different camera subsystems, and the interfacing with the external systems.

New understanding of the complex structure of knee menisci: implications for injury risk and repair potential for athletes.

PubMed

Rattner, J B; Matyas, J R; Barclay, L; Holowaychuk, S; Sciore, P; Lo, I K Y; Shrive, N G; Frank, C B; Achari, Y; Hart, D A

2011-08-01

Menisci help maintain the structural integrity of the knee. However, the poor healing potential of the meniscus following a knee injury can not only end a career in sports but lead to osteoarthritis later in life. Complete understanding of meniscal structure is essential for evaluating its risk for injury and subsequent successful repair. This study used novel approaches to elucidate meniscal architecture. The radial and circumferential collagen fibrils in the meniscus were investigated using novel tissue-preparative techniques for light and electron microscopic studies. The results demonstrate a unique architecture based on differences in the packaging of the fundamental collagen fibrils. For radial arrays, the collagen fibrils are arranged in parallel into ∼10 μm bundles, which associate laterally to form flat sheets of varying dimensions that bifurcate and come together to form a honeycomb network within the body of the meniscus. In contrast, the circumferential arrays display a complex network of collagen fibrils arranged into ∼5 μm bundles. Interestingly, both types of architectural organization of collagen fibrils in meniscus are conserved across mammalian species and are age and sex independent. These findings imply that disruptions in meniscal architecture following an injury contribute to poor prognosis for functional repair. © 2010 John Wiley & Sons A/S.

Performances of multiprocessor multidisk architectures for continuous media storage

NASA Astrophysics Data System (ADS)

Gennart, Benoit A.; Messerli, Vincent; Hersch, Roger D.

1996-03-01

Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, we consider a parallel image server architecture which relies on arrays of intelligent disk nodes, each disk node being composed of one processor and one or more disks. This contribution analyzes through bottleneck performance evaluation and simulation the behavior of two multi-processor multi-disk architectures: a point-to-point architecture and a shared-bus architecture similar to current multiprocessor workstation architectures. We compare the two architectures on the basis of two multimedia algorithms: the compute-bound frame resizing by resampling and the data-bound disk-to-client stream transfer. The results suggest that the shared bus is a potential bottleneck despite its very high hardware throughput (400Mbytes/s) and that an architecture with addressable local memories located closely to their respective processors could partially remove this bottleneck. The point- to-point architecture is scalable and able to sustain high throughputs for simultaneous compute- bound and data-bound operations.

Lunar architecture and urbanism

NASA Astrophysics Data System (ADS)

Sherwood, Brent

1992-09-01

Human civilization and architecture have defined each other for over 5000 years on Earth. Even in the novel environment of space, persistent issues of human urbanism will eclipse, within a historically short time, the technical challenges of space settlement that dominate our current view. By adding modern topics in space engineering, planetology, life support, human factors, material invention, and conservation to their already renaissance array of expertise, urban designers can responsibly apply ancient, proven standards to the exciting new opportunities afforded by space. Inescapable facts about the Moon set real boundaries within which tenable lunar urbanism and its component architecture must eventually develop.

Lunar architecture and urbanism

NASA Technical Reports Server (NTRS)

Sherwood, Brent

1992-01-01

Human civilization and architecture have defined each other for over 5000 years on Earth. Even in the novel environment of space, persistent issues of human urbanism will eclipse, within a historically short time, the technical challenges of space settlement that dominate our current view. By adding modern topics in space engineering, planetology, life support, human factors, material invention, and conservation to their already renaissance array of expertise, urban designers can responsibly apply ancient, proven standards to the exciting new opportunities afforded by space. Inescapable facts about the Moon set real boundaries within which tenable lunar urbanism and its component architecture must eventually develop.

Phased array ghost elimination (PAGE) for segmented SSFP imaging with interrupted steady-state.

PubMed

Kellman, Peter; Guttman, Michael A; Herzka, Daniel A; McVeigh, Elliot R

2002-12-01

Steady-state free precession (SSFP) has recently proven to be valuable for cardiac imaging due to its high signal-to-noise ratio and blood-myocardium contrast. Data acquired using ECG-triggered, segmented sequences during the approach to steady-state, or return to steady-state after interruption, may have ghost artifacts due to periodic k-space distortion. Schemes involving several preparatory RF pulses have been proposed to restore steady-state, but these consume imaging time during early systole. Alternatively, the phased-array ghost elimination (PAGE) method may be used to remove ghost artifacts from the first several frames. PAGE was demonstrated for cardiac cine SSFP imaging with interrupted steady-state using a simple alpha/2 magnetization preparation and storage scheme and a spatial tagging preparation.

Effect of Voltage Level on Power System Design for Solar Electric Propulsion Missions

NASA Technical Reports Server (NTRS)

Kerslake, Thomas W.

2003-01-01

This paper presents study results quantifying the benefits of higher voltage, electric power system designs for a typical solar electric propulsion spacecraft Earth orbiting mission. A conceptual power system architecture was defined and design points were generated for system voltages of 28-V, 50-V, 120-V, and 300-V using state-of-the-art or advanced technologies. A 300-V 'direct-drive' architecture was also analyzed to assess the benefits of directly powering the electric thruster from the photovoltaic array without up-conversion. Fortran and spreadsheet computational models were exercised to predict the performance and size power system components to meet spacecraft mission requirements. Pertinent space environments, such as electron and proton radiation, were calculated along the spiral trajectory. In addition, a simplified electron current collection model was developed to estimate photovoltaic array losses for the orbital plasma environment and that created by the thruster plume. The secondary benefits of power system mass savings for spacecraft propulsion and attitude control systems were also quantified. Results indicate that considerable spacecraft wet mass savings were achieved by the 300-V and 300-V direct-drive architectures.

Change of heart dimensions and function during pregnancy in goats.

PubMed

Szaluś-Jordanow, Olga; Czopowicz, Michał; Witkowski, Lucjan; Moroz, Agata; Mickiewicz, Marcin; Frymus, Tadeusz; Markowska-Daniel, Iwona; Bagnicka, Emilia; Kaba, Jarosław

2018-03-08

The study aimed to evaluate the effect of pregnancy on heart diameters and function in goats. Transthoracic echocardiography of 12 female dairy goats of two Polish regional breeds was performed. A Mindray M7 diagnostic ultrasound system with Phased Array transducer was used. Simultaneously, electrocardiography was recorded. All animals were examined four times - at mating season, at the end of the first trimester, at the end of the second trimester and just before kidding. Eleven measurements were taken each time: aortic and left atrial diameter (AoD and LAD), right and left ventricular internal diameter in diastole (RVIDd and LVIDd), left ventricular internal diameter in systole (LVIDs), inter-ventricular septum thickness in diastole and systole (IVSd and IVSd) and left ventricular posterior wall in diastole and systole (LVPWd and LVPWs), maximum left and right ventricular outflow tract velocity (RVOT Vmax and LVOT Vmax). Nine consecutive measurements were derived: the ratio of the left atrial diameter to the aortic diameter (AoD/LAD), left ventricular fractional shortening (FS%), left ventricular ejection fraction (EF%), maximum outflow tract pressure gradients (RVOT PGmax and LVOT PGmax), left ventricular end-diastolic volume (LVEDV) and left ventricular end-systolic volume (LVESV), stroke volume (SV) and cardiac output (CO). HR, LAD, LVPWs, IVSs increased significantly in the first trimester. AoD and RVIDd were significantly higher around parturition. LVIDd, FS%, EF%, SV and CO rose both in the first and third trimester. No measurement decreased during pregnancy. The study confirms that pregnancy causes changes in the heart size and functioning. Copyright © 2018. Published by Elsevier Ltd.

Notes on implementation of sparsely distributed memory

NASA Technical Reports Server (NTRS)

Keeler, J. D.; Denning, P. J.

1986-01-01

The Sparsely Distributed Memory (SDM) developed by Kanerva is an unconventional memory design with very interesting and desirable properties. The memory works in a manner that is closely related to modern theories of human memory. The SDM model is discussed in terms of its implementation in hardware. Two appendices discuss the unconventional approaches of the SDM: Appendix A treats a resistive circuit for fast, parallel address decoding; and Appendix B treats a systolic array for high throughput read and write operations.

Practical Sub-Nyquist Sampling via Array-Based Compressed Sensing Receiver Architecture

DTIC Science & Technology

2016-07-10

different array ele- ments at different sub-Nyquist sampling rates. Signal processing inspired by the sparse fast Fourier transform allows for signal...reconstruction algorithms can be computationally demanding (REF). The related sparse Fourier transform algorithms aim to reduce the processing time nec- essary to...compute the DFT of frequency-sparse signals [7]. In particular, the sparse fast Fourier transform (sFFT) achieves processing time better than the

Numerical aerodynamic simulation facility preliminary study, volume 2 and appendices

NASA Technical Reports Server (NTRS)

1977-01-01

Data to support results obtained in technology assessment studies are presented. Objectives, starting points, and future study tasks are outlined. Key design issues discussed in appendices include: data allocation, transposition network design, fault tolerance and trustworthiness, logic design, processing element of existing components, number of processors, the host system, alternate data base memory designs, number representation, fast div 521 instruction, architectures, and lockstep array versus synchronizable array machine comparison.

TRIGA: Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays

NASA Technical Reports Server (NTRS)

Pang, Jackson; Pingree, Paula J.; Torgerson, J. Leigh

2006-01-01

We present the Telecommunications protocol processing subsystem using Reconfigurable Interoperable Gate Arrays (TRIGA), a novel approach that unifies fault tolerance, error correction coding and interplanetary communication protocol off-loading to implement CCSDS File Delivery Protocol and Datalink layers. The new reconfigurable architecture offers more than one order of magnitude throughput increase while reducing footprint requirements in memory, command and data handling processor utilization, communication system interconnects and power consumption.

Titania nanotube arrays as interfaces for blood-contacting implantable devices: a study evaluating the nanotopography-associated activation and expression of blood plasma components.

PubMed

Smith, Barbara S; Popat, Ketul C

2012-08-01

The constant exposure of implantable biomaterials such as titanium and titanium alloys to blood-introducesserious and ongoing concerns regarding poor blood-material interactions. To date, all blood-contacting materials have been shown to initiate immunological events in the form of inflammation, thrombosis, fibrosis and infection; potentially leading to complete implant failure. Material surfaces that provide biomimetic cues such as nanoscale architectures have been shown to elicit improved cellular interaction; and thus, may provide possible solutions for enhancing blood-compatibility. However, limited information exists about the thrombogenicityof nanoscalesurface architectures. In this study, we have evaluated the efficacy of titania nanotube arrays as interfaces for blood contacting devices by investigating the thrombogenic effects using whole blood plasma. Thus, platelet/leukocyte adhesion, activation and interaction, morphology, complement activation, contact activation, platelet release reaction, fibrinogen expression and material cytotoxicity were evaluated to determine the in vitro thrombogenicity. The results presented here indicate a decrease in thrombogenic effects of titania nanotube arrays as compared to biomedical grade titanium after 2 hours of contact with whole blood plasma. This work shows the improved blood-compatibility of titania nanotube arrays, identifying this specific nanoarchitecture as a potentially optimal interface for promoting the long-term success of blood contacting biomaterials.

Implementation of a direct-imaging and FX correlator for the BEST-2 array

NASA Astrophysics Data System (ADS)

Foster, G.; Hickish, J.; Magro, A.; Price, D.; Zarb Adami, K.

2014-04-01

A new digital backend has been developed for the Basic Element for SKA Training II (BEST-2) array at Radiotelescopi di Medicina, INAF-IRA, Italy, which allows concurrent operation of an FX correlator, and a direct-imaging correlator and beamformer. This backend serves as a platform for testing some of the spatial Fourier transform concepts which have been proposed for use in computing correlations on regularly gridded arrays. While spatial Fourier transform-based beamformers have been implemented previously, this is, to our knowledge, the first time a direct-imaging correlator has been deployed on a radio astronomy array. Concurrent observations with the FX and direct-imaging correlator allow for direct comparison between the two architectures. Additionally, we show the potential of the direct-imaging correlator for time-domain astronomy, by passing a subset of beams though a pulsar and transient detection pipeline. These results provide a timely verification for spatial Fourier transform-based instruments that are currently in commissioning. These instruments aim to detect highly redshifted hydrogen from the epoch of reionization and/or to perform wide-field surveys for time-domain studies of the radio sky. We experimentally show the direct-imaging correlator architecture to be a viable solution for correlation and beamforming.

Structurally Engineered Nanoporous Ta2O5-x Selector-Less Memristor for High Uniformity and Low Power Consumption.

PubMed

Kwon, Soonbang; Kim, Tae-Wook; Jang, Seonghoon; Lee, Jae-Hwang; Kim, Nam Dong; Ji, Yongsung; Lee, Chul-Ho; Tour, James M; Wang, Gunuk

2017-10-04

A memristor architecture based on metal-oxide materials would have great promise in achieving exceptional energy efficiency and higher scalability in next-generation electronic memory systems. Here, we propose a facile method for fabricating selector-less memristor arrays using an engineered nanoporous Ta 2 O 5-x architecture. The device was fabricated in the form of crossbar arrays, and it functions as a switchable rectifier with a self-embedded nonlinear switching behavior and ultralow power consumption (∼2.7 × 10 -6 W), which results in effective suppression of crosstalk interference. In addition, we determined that the essential switching elements, such as the programming power, the sneak current, the nonlinearity value, and the device-to-device uniformity, could be enhanced by in-depth structural engineering of the pores in the Ta 2 O 5-x layer. Our results, on the basis of the structural engineering of metal-oxide materials, could provide an attractive approach for fabricating simple and cost-efficient memristor arrays with acceptable device uniformity and low power consumption without the need for additional addressing selectors.

Evaluation of the Intel iWarp parallel processor for space flight applications

NASA Technical Reports Server (NTRS)

Hine, Butler P., III; Fong, Terrence W.

1993-01-01

The potential of a DARPA-sponsored advanced processor, the Intel iWarp, for use in future SSF Data Management Systems (DMS) upgrades is evaluated through integration into the Ames DMS testbed and applications testing. The iWarp is a distributed, parallel computing system well suited for high performance computing applications such as matrix operations and image processing. The system architecture is modular, supports systolic and message-based computation, and is capable of providing massive computational power in a low-cost, low-power package. As a consequence, the iWarp offers significant potential for advanced space-based computing. This research seeks to determine the iWarp's suitability as a processing device for space missions. In particular, the project focuses on evaluating the ease of integrating the iWarp into the SSF DMS baseline architecture and the iWarp's ability to support computationally stressing applications representative of SSF tasks.

Luneburg lens and optical matrix algebra research

NASA Technical Reports Server (NTRS)

Wood, V. E.; Busch, J. R.; Verber, C. M.; Caulfield, H. J.

1984-01-01

Planar, as opposed to channelized, integrated optical circuits (IOCs) were stressed as the basis for computational devices. Both fully-parallel and systolic architectures are considered and the tradeoffs between the two device types are discussed. The Kalman filter approach is a most important computational method for many NASA problems. This approach to deriving a best-fit estimate for the state vector describing a large system leads to matrix sizes which are beyond the predicted capacities of planar IOCs. This problem is overcome by matrix partitioning, and several architectures for accomplishing this are described. The Luneburg lens work has involved development of lens design techniques, design of mask arrangements for producing lenses of desired shape, investigation of optical and chemical properties of arsenic trisulfide films, deposition of lenses both by thermal evaporation and by RF sputtering, optical testing of these lenses, modification of lens properties through ultraviolet irradiation, and comparison of measured lens properties with those expected from ray trace analyses.

Fabrication of Transition Edge Sensor Microcalorimeters for X-Ray Focal Planes

NASA Technical Reports Server (NTRS)

Chervenak, James A.; Adams, Joseph S.; Audley, Heather; Bandler, Simon R.; Betancourt-Martinez, Gabriele; Eckart, Megan E.; Finkbeiner, Fred M.; Kelley, Richard L.; Kilbourne, Caroline; Lee, Sang Jun;

Ultralow-Background Large-Format Bolometer Arrays

NASA Technical Reports Server (NTRS)

Benford, Dominic; Chervenak, Jay; Irwin, Kent; Moseley, S. Harvey; Oegerle, William (Technical Monitor)

2002-01-01

In the coming decade, work will commence in earnest on large cryogenic far-infrared telescopes and interferometers. All such observatories - for example, SAFIR, SPIRIT, and SPECS - require large format, two dimensional arrays of close-packed detectors capable of reaching the fundamental limits imposed by the very low photon backgrounds present in deep space. In the near term, bolometer array architectures which permit 1000 pixels - perhaps sufficient for the next generation of space-based instruments - can be arrayed efficiently. Demonstrating the necessary performance, with Noise Equivalent Powers (NEPs) of order 10-20 W/square root of Hz, will be a hurdle in the coming years. Superconducting bolometer arrays are a promising technology for providing both the performance and the array size necessary. We discuss the requirements for future detector arrays in the far-infrared and submillimeter, describe the parameters of superconducting bolometer arrays able to meet these requirements, and detail the present and near future technology of superconducting bolometer arrays. Of particular note is the coming development of large format planar arrays with absorber-coupled and antenna-coupled bolometers.

Frequency-multiplexed bias and readout of a 16-pixel superconducting nanowire single-photon detector array

NASA Astrophysics Data System (ADS)

Doerner, S.; Kuzmin, A.; Wuensch, S.; Charaev, I.; Boes, F.; Zwick, T.; Siegel, M.

2017-07-01

We demonstrate a 16-pixel array of microwave-current driven superconducting nanowire single-photon detectors with an integrated and scalable frequency-division multiplexing architecture, which reduces the required number of bias and readout lines to a single microwave feed line. The electrical behavior of the photon-sensitive nanowires, embedded in a resonant circuit, as well as the optical performance and timing jitter of the single detectors is discussed. Besides the single pixel measurements, we also demonstrate the operation of a 16-pixel array with a temporal, spatial, and photon-number resolution.

Vertically Aligned Co9 S8 Nanotube Arrays onto Graphene Papers as High-Performance Flexible Electrodes for Supercapacitors.

PubMed

Xiong, Dongbin; Li, Xifei; Bai, Zhimin; Li, Jianwei; Han, Yan; Li, Dejun

2018-02-16

Paper-like electrodes are emerging as a new category of advanced electrodes for flexible supercapacitors (SCs). Graphene, a promising two-dimensional material with high conductivity, can be easily processed into papers. Here, we report a rational design of flexible architecture with Co 9 S 8 nanotube arrays (NAs) grown onto graphene paper (GP) via a facile two-step hydrothermal method. When employed as flexible free-standing electrode for SCs, the proposed architectured Co 9 S 8 /GPs exhibits superior electrochemical performance with ultrahigh capacitance and outstanding rate capability (469 F g -1 at 10 A g -1 ). These results demonstrate that the new nanostructured Co 9 S 8 /GPs can be potentially applied in high performance flexible supercapacitors. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Comparisons between mammalian and artificial olfaction based on arrays of carbon black-polymer composite vapor detectors.

PubMed

Lewis, Nathan S

2004-09-01

Arrays of broadly cross-reactive vapor sensors provide a man-made implementation of an olfactory system, in which an analyte elicits a response from many receptors and each receptor responds to a variety of analytes. Pattern recognition methods are then used to detect analytes based on the collective response of the sensor array. With the use of this architecture, arrays of chemically sensitive resistors made from composites of conductors and insulating organic polymers have been shown to robustly classify, identify, and quantify a diverse collection of organic vapors, even though no individual sensor responds selectively to a particular analyte. The properties and functioning of these arrays are inspired by advances in the understanding of biological olfaction, and in turn, evaluation of the performance of the man-made array provides suggestions regarding some of the fundamental odor detection principles of the mammalian olfactory system.

Chemotaxis cluster 1 proteins form cytoplasmic arrays in Vibrio cholerae and are stabilized by a double signaling domain receptor DosM.

PubMed

Briegel, Ariane; Ortega, Davi R; Mann, Petra; Kjær, Andreas; Ringgaard, Simon; Jensen, Grant J

2016-09-13

Nearly all motile bacterial cells use a highly sensitive and adaptable sensory system to detect changes in nutrient concentrations in the environment and guide their movements toward attractants and away from repellents. The best-studied bacterial chemoreceptor arrays are membrane-bound. Many motile bacteria contain one or more additional, sometimes purely cytoplasmic, chemoreceptor systems. Vibrio cholerae contains three chemotaxis clusters (I, II, and III). Here, using electron cryotomography, we explore V. cholerae's cytoplasmic chemoreceptor array and establish that it is formed by proteins from cluster I. We further identify a chemoreceptor with an unusual domain architecture, DosM, which is essential for formation of the cytoplasmic arrays. DosM contains two signaling domains and spans the two-layered cytoplasmic arrays. Finally, we present evidence suggesting that this type of receptor is important for the structural stability of the cytoplasmic array.

Operation's Concept for Array-Based Deep Space Network

NASA Technical Reports Server (NTRS)

Bagri, Durgadas S.; Statman, Joseph I.; Gatti, Mark S.

2005-01-01

The Array-based Deep Space Network (DSNArray) will be a part of more than 10(exp 3) times increase in the downlink/telemetry capability of the Deep space Network (DSN). The key function of the DSN-Array is to provide cost-effective, robust Telemetry, Tracking and Command (TT&C) services to the space missions of NASA and its international partners. It provides an expanded approach to the use of an array-based system. Instead of using the array as an element in the existing DSN, relying to a large extent on the DSN infrastructure, we explore a broader departure from the current DSN, using fewer elements of the existing DSN, and establishing a more modern Concept of Operations. This paper gives architecture of DSN-Array and its operation's philosophy. It also describes customer's view of operations, operations management and logistics - including maintenance philosophy, anomaly analysis and reporting.

Scalable Engineering of Quantum Optical Information Processing Architectures (SEQUOIA)

DTIC Science & Technology

2016-12-13

arrays. Figure 4: An 8-channel fiber-coupled SNSPD array. 1.4 Post -fabrication-tunable linear optic fabrication We have analyzed the...performance of the programmable nanophotonic processor (PNP) that is dynamically tunable via post -fabrication active phase tuning to predict the scaling of...various device losses. PACS numbers: 42.50. Ex , 03.67.Dd, 03.67.Lx, 42.50.Dv I. INTRODUCTION Quantum key distribution (QKD) enables two distant authenticated

High-performance image processing architecture

NASA Astrophysics Data System (ADS)

Coffield, Patrick C.

1992-04-01

The proposed architecture is a logical design specifically for image processing and other related computations. The design is a hybrid electro-optical concept consisting of three tightly coupled components: a spatial configuration processor (the optical analog portion), a weighting processor (digital), and an accumulation processor (digital). The systolic flow of data and image processing operations are directed by a control buffer and pipelined to each of the three processing components. The image processing operations are defined by an image algebra developed by the University of Florida. The algebra is capable of describing all common image-to-image transformations. The merit of this architectural design is how elegantly it handles the natural decomposition of algebraic functions into spatially distributed, point-wise operations. The effect of this particular decomposition allows convolution type operations to be computed strictly as a function of the number of elements in the template (mask, filter, etc.) instead of the number of picture elements in the image. Thus, a substantial increase in throughput is realized. The logical architecture may take any number of physical forms. While a hybrid electro-optical implementation is of primary interest, the benefits and design issues of an all digital implementation are also discussed. The potential utility of this architectural design lies in its ability to control all the arithmetic and logic operations of the image algebra's generalized matrix product. This is the most powerful fundamental formulation in the algebra, thus allowing a wide range of applications.

A Rapid, Flexible Approach to Conceptual Space Mission Tradespace Definition and Exploration

NASA Technical Reports Server (NTRS)

Girerd, Andre R.

2005-01-01

This paper provides an overview of the Mission Tradespace Tool (MTT), a methodology and software framework developed to improve JPL's early design process by offering a rapid, structured, and inexpensive way to identify feasible design architectures from a wide array of candidate architectures. There has been a growing consensus at JPL that to improve the quality of service offered to design customers it is desirable to explore a wide tradespace of candidate architectures prior to forming a conceptual design baseline. This paper describes the rationale behind the MTT's approach to meet this need. Notable features of the framework are introduced and explained.

State-of-the-art in Heterogeneous Computing

DOE PAGES

Brodtkorb, Andre R.; Dyken, Christopher; Hagen, Trond R.; ...

2010-01-01

Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, availablemore » software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.« less

Design of a neural network simulator on a transputer array

NASA Technical Reports Server (NTRS)

Mcintire, Gary; Villarreal, James; Baffes, Paul; Rua, Monica

1987-01-01

A brief summary of neural networks is presented which concentrates on the design constraints imposed. Major design issues are discussed together with analysis methods and the chosen solutions. Although the system will be capable of running on most transputer architectures, it currently is being implemented on a 40-transputer system connected to a toroidal architecture. Predictions show a performance level equivalent to that of a highly optimized simulator running on the SX-2 supercomputer.

VLBA Archive &Distribution Architecture

NASA Astrophysics Data System (ADS)

Wells, D. C.

1994-01-01

Signals from the 10 antennas of NRAO's VLBA [Very Long Baseline Array] are processed by a Correlator. The complex fringe visibilities produced by the Correlator are archived on magnetic cartridges using a low-cost architecture which is capable of scaling and evolving. Archive files are copied to magnetic media to be distributed to users in FITS format, using the BINTABLE extension. Archive files are labelled using SQL INSERT statements, in order to bind the DBMS-based archive catalog to the archive media.

Receptive fields and functional architecture in the retina

PubMed Central

Balasubramanian, Vijay; Sterling, Peter

2009-01-01

Functional architecture of the striate cortex is known mostly at the tissue level – how neurons of different function distribute across its depth and surface on a scale of millimetres. But explanations for its design – why it is just so – need to be addressed at the synaptic level, a much finer scale where the basic description is still lacking. Functional architecture of the retina is known from the scale of millimetres down to nanometres, so we have sought explanations for various aspects of its design. Here we review several aspects of the retina's functional architecture and find that all seem governed by a single principle: represent the most information for the least cost in space and energy. Specifically: (i) why are OFF ganglion cells more numerous than ON cells? Because natural scenes contain more negative than positive contrasts, and the retina matches its neural resources to represent them equally well; (ii) why do ganglion cells of a given type overlap their dendrites to achieve 3-fold coverage? Because this maximizes total information represented by the array – balancing signal-to-noise improvement against increased redundancy; (iii) why do ganglion cells form multiple arrays? Because this allows most information to be sent at lower rates, decreasing the space and energy costs for sending a given amount of information. This broad principle, operating at higher levels, probably contributes to the brain's immense computational efficiency. PMID:19525561

Fabrication and optically pumped lasing of plasmonic nanolaser with regular ZnO/GaN nanoheterojunction array

NASA Astrophysics Data System (ADS)

Huang, Xiaoping; Zhang, Peifeng; Lin, En; Wang, Peng; Mei, Mingwei; Huang, Qiuying; Jiao, Jiao; Zhao, Qing

2017-09-01

We present the design and fabrication of a novel regularly arrayed plasmonic nanolasers. This main microstructure of the device is composed of a hexagonal array of n-ZnO/p-GaN nanoheterojunctions fabricated using the micro-fabrication method. Furthermore, the optically pumped lasing in the device is demonstrated. The spectroscopy characterization results of the device show that the surface plasmon excited around the NWs surface can be used to stimulate and strongly compress the optical modes in the NW cavity. This electromagnetic confinement effect is employed to optimize the beam quality and increase the light intensity compared to the laser fabricated with the bare NWs array. The impact of the array arrangement on the coherent combining efficiency of the arrayed nanolasers has been numerically studied. The results show that the arrayed hexagonal nanolasers could improve the combining efficiency compared to the nanolaser with the randomly positioned array. Qualitatively, these calculated results agree well with the experimental results of the laser beam spot mapping. This demonstrates the scope for using such architectures to improve the combination efficiency of the arrayed nanolasers.

CMOS VLSI Active-Pixel Sensor for Tracking

NASA Technical Reports Server (NTRS)

Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

2004-01-01

An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The diagonal-switch and memory addresses would be generated by the on-chip controller. The memory array would be large enough to hold differential signals acquired from all 8 windows during a frame period. Following the rapid sampling from all the windows, the contents of the memory array would be read out sequentially by use of a capacitive transimpedance amplifier (CTIA) at a maximum data rate of 10 MHz. This data rate is compatible with an update rate of almost 10 Hz, even in full-frame operation

Charge reconfiguration in arrays of quantum dots

NASA Astrophysics Data System (ADS)

Bayer, Johannes C.; Wagner, Timo; Rugeramigabo, Eddy P.; Haug, Rolf J.

2017-12-01

Semiconductor quantum dots are potential building blocks for scalable qubit architectures. Efficient control over the exchange interaction and the possibility of coherently manipulating electron states are essential ingredients towards this goal. We studied experimentally the shuttling of electrons trapped in serial quantum dot arrays isolated from the reservoirs. The isolation hereby enables a high degree of control over the tunnel couplings between the quantum dots, while electrons can be transferred through the array by gate voltage variations. Model calculations are compared with our experimental results for double, triple, and quadruple quantum dot arrays. We are able to identify all transitions observed in our experiments, including cotunneling transitions between distant quantum dots. The shuttling of individual electrons between quantum dots along chosen paths is demonstrated.

NASA's Spitzer Space Telescope's Operational Mission Experience

NASA Technical Reports Server (NTRS)

Wilson, Robert K.; Scott, Charles P.

2006-01-01

New Generation of Detector Arrays(100 to 10,000 Gain in Capability over Previous Infrared Space Missions). IRAC: 256 x 256 pixel arrays operating at 3.6 microns, 4.5 microns, 5.8 microns, 8.0 microns. MIPS: Photometer with 3 sets of arrays operating at 24 microns, 70 microns and 160 microns. 128 x 128; 32 x 32 and 2 x 20 arrays. Spectrometer with 50-100 micron capabilities. IRS: 4 Array (128x128 pixel) Spectrograph, 4 -40 microns. Warm Launch Architecture: All other Infrared Missions launched with both the telescope and scientific instrument payload within the cryostat or Dewar. Passive cooling used to cool outer shell to approx.40 K. Cryogenic Boil-off then cools telescope to required 5.5K. Earth Trailing Heliocentric Orbit: Increased observing efficiency, simplification of observation planning, removes earth as heat source.

Optimal Configuration of PV System with Different Solar Cell Arrays

NASA Astrophysics Data System (ADS)

Machida, Sadayuki; Tani, Tatsuo

Photovoltaic (PV) power generation is spreading steadily, and the dispersed PV array system is increasing from the architectural restrictions. In the case of dispersed array system, if the arrays are installed in a different azimuth or if the module that constitutes array is different, mismatching loss will be generated when a single inverter is used to convert the output of arrays, because of the difference of optimal operating voltage. The loss is related to the array configuration. However the relation between array configuration and power generation output is not clear. In order to avoid generation of mismatching loss, introducing a distributed inverter system such as string inverter system or AC modules system is considered. However it is not clear which is more advantageous between a distributed system and a concentrated system. In this paper, we verified the output characteristics of two different solar cell arrays with various strings, azimuths and tilt angles, and clarified the relation between array configuration and power generation output by the computer simulations. We also compared the distributed inverter system with the concentrated inverter system, and clarified the optimal configuration of PV system with different solar cell arrays.

The Engineering Development Array: A Low Frequency Radio Telescope Utilising SKA Precursor Technology

NASA Astrophysics Data System (ADS)

Wayth, Randall; Sokolowski, Marcin; Booler, Tom; Crosse, Brian; Emrich, David; Grootjans, Robert; Hall, Peter J.; Horsley, Luke; Juswardy, Budi; Kenney, David; Steele, Kim; Sutinjo, Adrian; Tingay, Steven J.; Ung, Daniel; Walker, Mia; Williams, Andrew; Beardsley, A.; Franzen, T. M. O.; Johnston-Hollitt, M.; Kaplan, D. L.; Morales, M. F.; Pallot, D.; Trott, C. M.; Wu, C.

2017-08-01

We describe the design and performance of the Engineering Development Array, which is a low-frequency radio telescope comprising 256 dual-polarisation dipole antennas working as a phased array. The Engineering Development Array was conceived of, developed, and deployed in just 18 months via re-use of Square Kilometre Array precursor technology and expertise, specifically from the Murchison Widefield Array radio telescope. Using drift scans and a model for the sky brightness temperature at low frequencies, we have derived the Engineering Development Array's receiver temperature as a function of frequency. The Engineering Development Array is shown to be sky-noise limited over most of the frequency range measured between 60 and 240 MHz. By using the Engineering Development Array in interferometric mode with the Murchison Widefield Array, we used calibrated visibilities to measure the absolute sensitivity of the array. The measured array sensitivity matches very well with a model based on the array layout and measured receiver temperature. The results demonstrate the practicality and feasibility of using Murchison Widefield Array-style precursor technology for Square Kilometre Array-scale stations. The modular architecture of the Engineering Development Array allows upgrades to the array to be rolled out in a staged approach. Future improvements to the Engineering Development Array include replacing the second stage beamformer with a fully digital system, and to transition to using RF-over-fibre for the signal output from first stage beamformers.

ORAC-DR: A generic data reduction pipeline infrastructure

NASA Astrophysics Data System (ADS)

Jenness, Tim; Economou, Frossie

2015-03-01

ORAC-DR is a general purpose data reduction pipeline system designed to be instrument and observatory agnostic. The pipeline works with instruments as varied as infrared integral field units, imaging arrays and spectrographs, and sub-millimeter heterodyne arrays and continuum cameras. This paper describes the architecture of the pipeline system and the implementation of the core infrastructure. We finish by discussing the lessons learned since the initial deployment of the pipeline system in the late 1990s.

Microlens array processor with programmable weight mask and direct optical input

NASA Astrophysics Data System (ADS)

Schmid, Volker R.; Lueder, Ernst H.; Bader, Gerhard; Maier, Gert; Siegordner, Jochen

1999-03-01

We present an optical feature extraction system with a microlens array processor. The system is suitable for online implementation of a variety of transforms such as the Walsh transform and DCT. Operating with incoherent light, our processor accepts direct optical input. Employing a sandwich- like architecture, we obtain a very compact design of the optical system. The key elements of the microlens array processor are a square array of 15 X 15 spherical microlenses on acrylic substrate and a spatial light modulator as transmissive mask. The light distribution behind the mask is imaged onto the pixels of a customized a-Si image sensor with adjustable gain. We obtain one output sample for each microlens image and its corresponding weight mask area as summation of the transmitted intensity within one sensor pixel. The resulting architecture is very compact and robust like a conventional camera lens while incorporating a high degree of parallelism. We successfully demonstrate a Walsh transform into the spatial frequency domain as well as the implementation of a discrete cosine transform with digitized gray values. We provide results showing the transformation performance for both synthetic image patterns and images of natural texture samples. The extracted frequency features are suitable for neural classification of the input image. Other transforms and correlations can be implemented in real-time allowing adaptive optical signal processing.

Parallel asynchronous systems and image processing algorithms

NASA Technical Reports Server (NTRS)

Coon, D. D.; Perera, A. G. U.

1989-01-01

A new hardware approach to implementation of image processing algorithms is described. The approach is based on silicon devices which would permit an independent analog processing channel to be dedicated to evey pixel. A laminar architecture consisting of a stack of planar arrays of the device would form a two-dimensional array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuronlike asynchronous pulse coded form through the laminar processor. Such systems would integrate image acquisition and image processing. Acquisition and processing would be performed concurrently as in natural vision systems. The research is aimed at implementation of algorithms, such as the intensity dependent summation algorithm and pyramid processing structures, which are motivated by the operation of natural vision systems. Implementation of natural vision algorithms would benefit from the use of neuronlike information coding and the laminar, 2-D parallel, vision system type architecture. Besides providing a neural network framework for implementation of natural vision algorithms, a 2-D parallel approach could eliminate the serial bottleneck of conventional processing systems. Conversion to serial format would occur only after raw intensity data has been substantially processed. An interesting challenge arises from the fact that the mathematical formulation of natural vision algorithms does not specify the means of implementation, so that hardware implementation poses intriguing questions involving vision science.

The ALMA software architecture

NASA Astrophysics Data System (ADS)

Schwarz, Joseph; Farris, Allen; Sommer, Heiko

2004-09-01

The software for the Atacama Large Millimeter Array (ALMA) is being developed by many institutes on two continents. The software itself will function in a distributed environment, from the 0.5-14 kmbaselines that separate antennas to the larger distances that separate the array site at the Llano de Chajnantor in Chile from the operations and user support facilities in Chile, North America and Europe. Distributed development demands 1) interfaces that allow separated groups to work with minimal dependence on their counterparts at other locations; and 2) a common architecture to minimize duplication and ensure that developers can always perform similar tasks in a similar way. The Container/Component model provides a blueprint for the separation of functional from technical concerns: application developers concentrate on implementing functionality in Components, which depend on Containers to provide them with services such as access to remote resources, transparent serialization of entity objects to XML, logging, error handling and security. Early system integrations have verified that this architecture is sound and that developers can successfully exploit its features. The Containers and their services are provided by a system-orienteddevelopment team as part of the ALMA Common Software (ACS), middleware that is based on CORBA.

NGST fine guidance sensor

NASA Astrophysics Data System (ADS)

Rowlands, Neil; Hutchings, John; Murowinski, Richard G.; Alexander, Russ

2003-03-01

Instrumentation for the Next Generation Space Telescope (NGST) is currently in the Phase A definition stage. We have developed a concept for the NGST Fine Guidance Sensor or FGS. The FGS is a detector array based imager which resides in the NGST focal plane. We report here on tradeoff studies aimed at defining an overall configuration of the FGS which will meet the performance and interface requirements. A key performance requirement is a noise equivalent angle of 3 milli-arcseconds to be achieved with 95% probability for any pointing of the observatory in the celestial sphere. A key interface requirement is compatibility with the architecture of the Integrated Science Instrument Module (ISIM). The concept developed consists of two independent and redundant FGS modules, each with a 4' x 2' field of view covered by two 2048 x 2048 infrared detector arrays, providing 60 milli-arcsecond sampling. Performance modeling supporting the choice of this architecture and the trade space considered is presented. Each module has a set of readout electronics which perform star detection, pixel-by-pixel correction, and in fine guiding mode, centroid calculation. These readout electronics communicate with the ISIM Command &Data Handling Units where the FGS control software is based. Rationale for this choice of architecture is also presented.

User assembly and servicing system for Space Station, an evolving architecture approach

NASA Technical Reports Server (NTRS)

Lavigna, Thomas A.; Cline, Helmut P.

1988-01-01

On-orbit assembly and servicing of a variety of scientific and applications hardware systems is expected to be one of the Space Station's primary functions. The hardware to be serviced will include the attached payloads resident on the Space Station, the free-flying satellites and co-orbiting platforms brought to the Space Station, and the polar orbiting platforms. The requirements for assembly and servicing such a broad spectrum of missions have led to the development of an Assembly and Servicing System Architecture that is composed of a complex array of support elements. This array is comprised of US elements, both Space Station and non-Space Station, and elements provided by Canada to the Space Station Program. For any given servicing or assembly mission, the necessary support elements will be employed in an integrated manner to satisfy the mission-specific needs. The structure of the User Assembly and Servicing System Architecture and the manner in which it will evolved throughout the duration of the phased Space Station Program are discussed. Particular emphasis will be placed upon the requirements to be accommodated in each phase, and the development of a logical progression of capabilities to meet these requirements.

In Situ Surveying of Saturn's Rings

NASA Astrophysics Data System (ADS)

Clark, P. E.; Rilee, M. L.; Curtis, S. A.; Cheung, C.

2004-03-01

Saturn Autonomous Ring Array (SARA) mission concept is an application for the Autonomous Nano-Technology Swarm (ANTS) architecture that would perform in situ observations of compositional and dynamic properties of ring particles, a challenge unachievable by previous mission designs.

Field-programmable gate array implementation of an all-digital IEEE 802.15.4-compliant transceiver

NASA Astrophysics Data System (ADS)

Cornetta, Gianluca; Touhafi, Abdellah; Santos, David J.; Vázquez, José M.

2010-12-01

An architecture for a low-cost, low-complexity digital transceiver is presented in this article. The proposed architecture targets the IEEE 802.15.4 standard for short-range wireless personal area networks and has been implemented as a synthesisable VHDL register transfer level description. The system has been evaluated and tested using a Xilinx 90 nm Virtex-4 field-programmable gate array as the target technology. Bit error rate (BER) and error vector magnitude (EVM) have been used as the figures of merit for modem performance. Simulations show that the recommended minimum BER is achieved at E b/N 0 = 8.7 dB, whereas the EVM is 19.5%. The implemented device occupies 10% of the target FPGA and has a normalised maximum power consumption of 44 mW in transmit mode and 53 mW in receiver mode.

Scaling Trapped Ion Quantum Computers Using Fast Gates and Microtraps

NASA Astrophysics Data System (ADS)

Ratcliffe, Alexander K.; Taylor, Richard L.; Hope, Joseph J.; Carvalho, André R. R.

2018-06-01

Most attempts to produce a scalable quantum information processing platform based on ion traps have focused on the shuttling of ions in segmented traps. We show that an architecture based on an array of microtraps with fast gates will outperform architectures based on ion shuttling. This system requires higher power lasers but does not require the manipulation of potentials or shuttling of ions. This improves optical access, reduces the complexity of the trap, and reduces the number of conductive surfaces close to the ions. The use of fast gates also removes limitations on the gate time. Error rates of 10-5 are shown to be possible with 250 mW laser power and a trap separation of 100 μ m . The performance of the gates is shown to be robust to the limitations in the laser repetition rate and the presence of many ions in the trap array.

Multi-function all optical packet switch by periodic wavelength arrangement in an arrayed waveguide grating and wideband optical filters.

PubMed

Feng, Kai-Ming; Wu, Chung-Yu; Wen, Yu-Hsiang

2012-01-16

By utilizing the cyclic filtering function of an NxN arrayed waveguide grating (AWG), we propose and experimentally demonstrate a novel multi-function all optical packet switching (OPS) architecture by applying a periodical wavelength arrangement between the AWG in the optical routing/buffering unit and a set of wideband optical filters in the switched output ports to achieve the desired routing and buffering functions. The proposed OPS employs only one tunable wavelength converter at the input port to convert the input wavelength to a designated wavelength which reduces the number of active optical components and thus the complexity of the traffic control is simplified in the OPS. With the proposed OPS architecture, multiple optical packet switching functions, including arbitrary packet switching and buffering, first-in-first-out (FIFO) packet multiplexing, packet demultiplexing and packet add/drop multiplexing, have been successfully demonstrated.

Association of genetic variation with systolic and diastolic blood pressure among African Americans: the Candidate Gene Association Resource study

PubMed Central

Fox, Ervin R.; Young, J. Hunter; Li, Yali; Dreisbach, Albert W.; Keating, Brendan J.; Musani, Solomon K.; Liu, Kiang; Morrison, Alanna C.; Ganesh, Santhi; Kutlar, Abdullah; Ramachandran, Vasan S.; Polak, Josef F.; Fabsitz, Richard R.; Dries, Daniel L.; Farlow, Deborah N.; Redline, Susan; Adeyemo, Adebowale; Hirschorn, Joel N.; Sun, Yan V.; Wyatt, Sharon B.; Penman, Alan D.; Palmas, Walter; Rotter, Jerome I.; Townsend, Raymond R.; Doumatey, Ayo P.; Tayo, Bamidele O.; Mosley, Thomas H.; Lyon, Helen N.; Kang, Sun J.; Rotimi, Charles N.; Cooper, Richard S.; Franceschini, Nora; Curb, J. David; Martin, Lisa W.; Eaton, Charles B.; Kardia, Sharon L.R.; Taylor, Herman A.; Caulfield, Mark J.; Ehret, Georg B.; Johnson, Toby; Chakravarti, Aravinda; Zhu, Xiaofeng; Levy, Daniel; Munroe, Patricia B.; Rice, Kenneth M.; Bochud, Murielle; Johnson, Andrew D.; Chasman, Daniel I.; Smith, Albert V.; Tobin, Martin D.; Verwoert, Germaine C.; Hwang, Shih-Jen; Pihur, Vasyl; Vollenweider, Peter; O'Reilly, Paul F.; Amin, Najaf; Bragg-Gresham, Jennifer L.; Teumer, Alexander; Glazer, Nicole L.; Launer, Lenore; Zhao, Jing Hua; Aulchenko, Yurii; Heath, Simon; Sõber, Siim; Parsa, Afshin; Luan, Jian'an; Arora, Pankaj; Dehghan, Abbas; Zhang, Feng; Lucas, Gavin; Hicks, Andrew A.; Jackson, Anne U.; Peden, John F.; Tanaka, Toshiko; Wild, Sarah H.; Rudan, Igor; Igl, Wilmar; Milaneschi, Yuri; Parker, Alex N.; Fava, Cristiano; Chambers, John C.; Kumari, Meena; JinGo, Min; van der Harst, Pim; Kao, Wen Hong Linda; Sjögren, Marketa; Vinay, D.G.; Alexander, Myriam; Tabara, Yasuharu; Shaw-Hawkins, Sue; Whincup, Peter H.; Liu, Yongmei; Shi, Gang; Kuusisto, Johanna; Seielstad, Mark; Sim, Xueling; Nguyen, Khanh-Dung Hoang; Lehtimäki, Terho; Matullo, Giuseppe; Wu, Ying; Gaunt, Tom R.; Charlotte Onland-Moret, N.; Cooper, Matthew N.; Platou, Carl G.P.; Org, Elin; Hardy, Rebecca; Dahgam, Santosh; Palmen, Jutta; Vitart, Veronique; Braund, Peter S.; Kuznetsova, Tatiana; Uiterwaal, Cuno S.P.M.; Campbell, Harry; Ludwig, Barbara; Tomaszewski, Maciej; Tzoulaki, Ioanna; Palmer, Nicholette D.; Aspelund, Thor; Garcia, Melissa; Chang, Yen-Pei C.; O'Connell, Jeffrey R.; Steinle, Nanette I.; Grobbee, Diederick E.; Arking, Dan E.; Hernandez, Dena; Najjar, Samer; McArdle, Wendy L.; Hadley, David; Brown, Morris J.; Connell, John M.; Hingorani, Aroon D.; Day, Ian N.M.; Lawlor, Debbie A.; Beilby, John P.; Lawrence, Robert W.; Clarke, Robert; Collins, Rory; Hopewell, Jemma C.; Ongen, Halit; Bis, Joshua C.; Kähönen, Mika; Viikari, Jorma; Adair, Linda S.; Lee, Nanette R.; Chen, Ming-Huei; Olden, Matthias; Pattaro, Cristian; Hoffman Bolton, Judith A.; Köttgen, Anna; Bergmann, Sven; Mooser, Vincent; Chaturvedi, Nish; Frayling, Timothy M.; Islam, Muhammad; Jafar, Tazeen H.; Erdmann, Jeanette; Kulkarni, Smita R.; Bornstein, Stefan R.; Grässler, Jürgen; Groop, Leif; Voight, Benjamin F.; Kettunen, Johannes; Howard, Philip; Taylor, Andrew; Guarrera, Simonetta; Ricceri, Fulvio; Emilsson, Valur; Plump, Andrew; Barroso, Inês; Khaw, Kay-Tee; Weder, Alan B.; Hunt, Steven C.; Bergman, Richard N.; Collins, Francis S.; Bonnycastle, Lori L.; Scott, Laura J.; Stringham, Heather M.; Peltonen, Leena; Perola, Markus; Vartiainen, Erkki; Brand, Stefan-Martin; Staessen, Jan A.; Wang, Thomas J.; Burton, Paul R.; SolerArtigas, Maria; Dong, Yanbin; Snieder, Harold; Wang, Xiaoling; Zhu, Haidong; Lohman, Kurt K.; Rudock, Megan E.; Heckbert, Susan R.; Smith, Nicholas L.; Wiggins, Kerri L.; Shriner, Daniel; Veldre, Gudrun; Viigimaa, Margus; Kinra, Sanjay; Prabhakaran, Dorairajan; Tripathy, Vikal; Langefeld, Carl D.; Rosengren, Annika; Thelle, Dag S.; MariaCorsi, Anna; Singleton, Andrew; Forrester, Terrence; Hilton, Gina; McKenzie, Colin A.; Salako, Tunde; Iwai, Naoharu; Kita, Yoshikuni; Ogihara, Toshio; Ohkubo, Takayoshi; Okamura, Tomonori; Ueshima, Hirotsugu; Umemura, Satoshi; Eyheramendy, Susana; Meitinger, Thomas; Wichmann, H.-Erich; Cho, Yoon Shin; Kim, Hyung-Lae; Lee, Jong-Young; Scott, James; Sehmi, Joban S.; Zhang, Weihua; Hedblad, Bo; Nilsson, Peter; Smith, George Davey; Wong, Andrew; Narisu, Narisu; Stančáková, Alena; Raffel, Leslie J.; Yao, Jie; Kathiresan, Sekar; O'Donnell, Chris; Schwartz, Steven M.; Arfan Ikram, M.; Longstreth, Will T.; Seshadri, Sudha; Shrine, Nick R.G.; Wain, Louise V.; Morken, Mario A.; Swift, Amy J.; Laitinen, Jaana; Prokopenko, Inga; Zitting, Paavo; Cooper, Jackie A.; Humphries, Steve E.; Danesh, John; Rasheed, Asif; Goel, Anuj; Hamsten, Anders; Watkins, Hugh; Bakker, Stephan J.L.; van Gilst, Wiek H.; Janipalli, Charles S.; Radha Mani, K.; Yajnik, Chittaranjan S.; Hofman, Albert; Mattace-Raso, Francesco U.S.; Oostra, Ben A.; Demirkan, Ayse; Isaacs, Aaron; Rivadeneira, Fernando; Lakatta, Edward G.; Orru, Marco; Scuteri, Angelo; Ala-Korpela, Mika; Kangas, Antti J.; Lyytikäinen, Leo-Pekka; Soininen, Pasi; Tukiainen, Taru; Würz, Peter; Twee-Hee Ong, Rick; Dörr, Marcus; Kroemer, Heyo K.; Völker, Uwe; Völzke, Henry; Galan, Pilar; Hercberg, Serge; Lathrop, Mark; Zelenika, Diana; Deloukas, Panos; Mangino, Massimo; Spector, Tim D.; Zhai, Guangju; Meschia, James F.; Nalls, Michael A.; Sharma, Pankaj; Terzic, Janos; Kranthi Kumar, M.J.; Denniff, Matthew; Zukowska-Szczechowska, Ewa; Wagenknecht, Lynne E.; Fowkes, Gerald R.; Charchar, Fadi J.; Schwarz, Peter E.H.; Hayward, Caroline; Guo, Xiuqing; Bots, Michiel L.; Brand, Eva; Samani, Nilesh J.; Polasek, Ozren; Talmud, Philippa J.; Nyberg, Fredrik; Kuh, Diana; Laan, Maris; Hveem, Kristian; Palmer, Lyle J.; van der Schouw, Yvonne T.; Casas, Juan P.; Mohlke, Karen L.; Vineis, Paolo; Raitakari, Olli; Wong, Tien Y.; Shyong Tai, E.; Laakso, Markku; Rao, Dabeeru C.; Harris, Tamara B.; Morris, Richard W.; Dominiczak, Anna F.; Kivimaki, Mika; Marmot, Michael G.; Miki, Tetsuro; Saleheen, Danish; Chandak, Giriraj R.; Coresh, Josef; Navis, Gerjan; Salomaa, Veikko; Han, Bok-Ghee; Kooner, Jaspal S.; Melander, Olle; Ridker, Paul M.; Bandinelli, Stefania; Gyllensten, Ulf B.; Wright, Alan F.; Wilson, James F.; Ferrucci, Luigi; Farrall, Martin; Tuomilehto, Jaakko; Pramstaller, Peter P.; Elosua, Roberto; Soranzo, Nicole; Sijbrands, Eric J.G.; Altshuler, David; Loos, Ruth J.F.; Shuldiner, Alan R.; Gieger, Christian; Meneton, Pierre; Uitterlinden, Andre G.; Wareham, Nicholas J.; Gudnason, Vilmundur; Rettig, Rainer; Uda, Manuela; Strachan, David P.; Witteman, Jacqueline C.M.; Hartikainen, Anna-Liisa; Beckmann, Jacques S.; Boerwinkle, Eric; Boehnke, Michael; Larson, Martin G.; Järvelin, Marjo-Riitta; Psaty, Bruce M.; Abecasis, Gonçalo R.; Elliott, Paul; van Duijn , Cornelia M.; Newton-Cheh, Christopher

2011-01-01

The prevalence of hypertension in African Americans (AAs) is higher than in other US groups; yet, few have performed genome-wide association studies (GWASs) in AA. Among people of European descent, GWASs have identified genetic variants at 13 loci that are associated with blood pressure. It is unknown if these variants confer susceptibility in people of African ancestry. Here, we examined genome-wide and candidate gene associations with systolic blood pressure (SBP) and diastolic blood pressure (DBP) using the Candidate Gene Association Resource (CARe) consortium consisting of 8591 AAs. Genotypes included genome-wide single-nucleotide polymorphism (SNP) data utilizing the Affymetrix 6.0 array with imputation to 2.5 million HapMap SNPs and candidate gene SNP data utilizing a 50K cardiovascular gene-centric array (ITMAT-Broad-CARe [IBC] array). For Affymetrix data, the strongest signal for DBP was rs10474346 (P= 3.6 × 10−8) located near GPR98 and ARRDC3. For SBP, the strongest signal was rs2258119 in C21orf91 (P= 4.7 × 10−8). The top IBC association for SBP was rs2012318 (P= 6.4 × 10−6) near SLC25A42 and for DBP was rs2523586 (P= 1.3 × 10−6) near HLA-B. None of the top variants replicated in additional AA (n = 11 882) or European-American (n = 69 899) cohorts. We replicated previously reported European-American blood pressure SNPs in our AA samples (SH2B3, P= 0.009; TBX3-TBX5, P= 0.03; and CSK-ULK3, P= 0.0004). These genetic loci represent the best evidence of genetic influences on SBP and DBP in AAs to date. More broadly, this work supports that notion that blood pressure among AAs is a trait with genetic underpinnings but also with significant complexity. PMID:21378095

Association of genetic variation with systolic and diastolic blood pressure among African Americans: the Candidate Gene Association Resource study.

PubMed

Fox, Ervin R; Young, J Hunter; Li, Yali; Dreisbach, Albert W; Keating, Brendan J; Musani, Solomon K; Liu, Kiang; Morrison, Alanna C; Ganesh, Santhi; Kutlar, Abdullah; Ramachandran, Vasan S; Polak, Josef F; Fabsitz, Richard R; Dries, Daniel L; Farlow, Deborah N; Redline, Susan; Adeyemo, Adebowale; Hirschorn, Joel N; Sun, Yan V; Wyatt, Sharon B; Penman, Alan D; Palmas, Walter; Rotter, Jerome I; Townsend, Raymond R; Doumatey, Ayo P; Tayo, Bamidele O; Mosley, Thomas H; Lyon, Helen N; Kang, Sun J; Rotimi, Charles N; Cooper, Richard S; Franceschini, Nora; Curb, J David; Martin, Lisa W; Eaton, Charles B; Kardia, Sharon L R; Taylor, Herman A; Caulfield, Mark J; Ehret, Georg B; Johnson, Toby; Chakravarti, Aravinda; Zhu, Xiaofeng; Levy, Daniel

2011-06-01

The prevalence of hypertension in African Americans (AAs) is higher than in other US groups; yet, few have performed genome-wide association studies (GWASs) in AA. Among people of European descent, GWASs have identified genetic variants at 13 loci that are associated with blood pressure. It is unknown if these variants confer susceptibility in people of African ancestry. Here, we examined genome-wide and candidate gene associations with systolic blood pressure (SBP) and diastolic blood pressure (DBP) using the Candidate Gene Association Resource (CARe) consortium consisting of 8591 AAs. Genotypes included genome-wide single-nucleotide polymorphism (SNP) data utilizing the Affymetrix 6.0 array with imputation to 2.5 million HapMap SNPs and candidate gene SNP data utilizing a 50K cardiovascular gene-centric array (ITMAT-Broad-CARe [IBC] array). For Affymetrix data, the strongest signal for DBP was rs10474346 (P= 3.6 × 10(-8)) located near GPR98 and ARRDC3. For SBP, the strongest signal was rs2258119 in C21orf91 (P= 4.7 × 10(-8)). The top IBC association for SBP was rs2012318 (P= 6.4 × 10(-6)) near SLC25A42 and for DBP was rs2523586 (P= 1.3 × 10(-6)) near HLA-B. None of the top variants replicated in additional AA (n = 11 882) or European-American (n = 69 899) cohorts. We replicated previously reported European-American blood pressure SNPs in our AA samples (SH2B3, P= 0.009; TBX3-TBX5, P= 0.03; and CSK-ULK3, P= 0.0004). These genetic loci represent the best evidence of genetic influences on SBP and DBP in AAs to date. More broadly, this work supports that notion that blood pressure among AAs is a trait with genetic underpinnings but also with significant complexity.

Ultrahigh-frame CCD imagers

NASA Astrophysics Data System (ADS)

Lowrance, John L.; Mastrocola, V. J.; Renda, George F.; Swain, Pradyumna K.; Kabra, R.; Bhaskaran, Mahalingham; Tower, John R.; Levine, Peter A.

2004-02-01

This paper describes the architecture, process technology, and performance of a family of high burst rate CCDs. These imagers employ high speed, low lag photo-detectors with local storage at each photo-detector to achieve image capture at rates greater than 106 frames per second. One imager has a 64 x 64 pixel array with 12 frames of storage. A second imager has a 80 x 160 array with 28 frames of storage, and the third imager has a 64 x 64 pixel array with 300 frames of storage. Application areas include capture of rapid mechanical motion, optical wavefront sensing, fluid cavitation research, combustion studies, plasma research and wind-tunnel-based gas dynamics research.

Fibre optic microarrays.

PubMed

Walt, David R

2010-01-01

This tutorial review describes how fibre optic microarrays can be used to create a variety of sensing and measurement systems. This review covers the basics of optical fibres and arrays, the different microarray architectures, and describes a multitude of applications. Such arrays enable multiplexed sensing for a variety of analytes including nucleic acids, vapours, and biomolecules. Polymer-coated fibre arrays can be used for measuring microscopic chemical phenomena, such as corrosion and localized release of biochemicals from cells. In addition, these microarrays can serve as a substrate for fundamental studies of single molecules and single cells. The review covers topics of interest to chemists, biologists, materials scientists, and engineers.

Extended short wavelength infrared HgCdTe detectors on silicon substrates

NASA Astrophysics Data System (ADS)

Park, J. H.; Hansel, D.; Mukhortova, A.; Chang, Y.; Kodama, R.; Zhao, J.; Velicu, S.; Aqariden, F.

2016-09-01

We report high-quality n-type extended short wavelength infrared (eSWIR) HgCdTe (cutoff wavelength 2.59 μm at 77 K) layers grown on three-inch diameter CdTe/Si substrates by molecular beam epitaxy (MBE). This material is used to fabricate test diodes and arrays with a planar device architecture using arsenic implantation to achieve p-type doping. We use different variations of a test structure with a guarded design to compensate for the lateral leakage current of traditional test diodes. These test diodes with guarded arrays characterize the electrical performance of the active 640 × 512 format, 15 μm pitch detector array.

Miniaturized optical wavelength sensors

NASA Astrophysics Data System (ADS)

Kung, Helen Ling-Ning

Recently semiconductor processing technology has been applied to the miniaturization of optical wavelength sensors. Compact sensors enable new applications such as integrated diode-laser wavelength monitors and frequency lockers, portable chemical and biological detection, and portable and adaptive hyperspectral imaging arrays. Small sensing systems have trade-offs between resolution, operating range, throughput, multiplexing and complexity. We have developed a new wavelength sensing architecture that balances these parameters for applications involving hyperspectral imaging spectrometer arrays. In this thesis we discuss and demonstrate two new wavelength-sensing architectures whose single-pixel designs can easily be extended into spectrometer arrays. The first class of devices is based on sampling a standing wave. These devices are based on measuring the wavelength-dependent period of optical standing waves formed by the interference of forward and reflected waves at a mirror. We fabricated two different devices based on this principle. The first device is a wavelength monitor, which measures the wavelength and power of a monochromatic source. The second device is a spectrometer that can also act as a selective spectral coherence sensor. The spectrometer contains a large displacement piston-motion MEMS mirror and a thin GaAs photodiode flip-chip bonded to a quartz substrate. The performance of this spectrometer is similar to that of a Michelson in resolution, operating range, throughput and multiplexing but with the added advantages of fewer components and one-dimensional architecture. The second class of devices is based on the Talbot self-imaging effect. The Talbot effect occurs when a periodic object is illuminated with a spatially coherent wave. Periodically spaced self-images are formed behind the object. The spacing of the self-images is proportional to wavelength of the incident light. We discuss and demonstrate how this effect can be used for spectroscopy. In the conclusion we compare these two new miniaturized spectrometer architectures to existing miniaturized spectrometers. We believe that the combination of miniaturized wavelength sensors and smart processing should facilitate the development real-time, adaptive and portable sensing systems.

Space Power Architectures for NASA Missions: The Applicability and Benefits of Advanced Power and Electric Propulsion

NASA Technical Reports Server (NTRS)

Hoffman, David J.

2001-01-01

The relative importance of electrical power systems as compared with other spacecraft bus systems is examined. The quantified benefits of advanced space power architectures for NASA Earth Science, Space Science, and Human Exploration and Development of Space (HEDS) missions is then presented. Advanced space power technologies highlighted include high specific power solar arrays, regenerative fuel cells, Stirling radioisotope power sources, flywheel energy storage and attitude control, lithium ion polymer energy storage and advanced power management and distribution.

In Situ Surveying of Saturn's Rings

NASA Technical Reports Server (NTRS)

Clark, P. E.; Curtis, S. A.; Rilee, M. L.; Cheung, C.

2004-01-01

The Saturn Autonomous Ring Array (SARA) mission concept is a new application for the Autonomous Nano-Technology Swarm (ANTS) architecture, a paradigm being developed for exploration of high surface area and/or multibody targets to minimize costs and maximize effectiveness of survey operations. Systems designed with ANTS architecture are built from potentially very large numbers of highly autonomous, yet socially interactive, specialists, in approximately ten specialist classes. Here, we analyze requirements for such a mission as well as specialized autonomous operations which would support this application.

Backshort-Under-Grid arrays for infrared astronomy

NASA Astrophysics Data System (ADS)

Allen, C. A.; Benford, D. J.; Chervenak, J. A.; Chuss, D. T.; Miller, T. M.; Moseley, S. H.; Staguhn, J. G.; Wollack, E. J.

2006-04-01

We are developing a kilopixel, filled bolometer array for space infrared astronomy. The array consists of three individual components, to be merged into a single, working unit; (1) a transition edge sensor bolometer array, operating in the milliKelvin regime, (2) a quarter-wave backshort grid, and (3) superconducting quantum interference device multiplexer readout. The detector array is designed as a filled, square grid of suspended, silicon bolometers with superconducting sensors. The backshort arrays are fabricated separately and will be positioned in the cavities created behind each detector during fabrication. The grids have a unique interlocking feature machined into the walls for positioning and mechanical stability. The spacing of the backshort beneath the detector grid can be set from ˜30 300 μm, by independently adjusting two process parameters during fabrication. The ultimate goal is to develop a large-format array architecture with background-limited sensitivity, suitable for a wide range of wavelengths and applications, to be directly bump bonded to a multiplexer circuit. We have produced prototype two-dimensional arrays having 8×8 detector elements. We present detector design, fabrication overview, and assembly technologies.

Pixel electronic noise as a function of position in an active matrix flat panel imaging array

NASA Astrophysics Data System (ADS)

Yazdandoost, Mohammad Y.; Wu, Dali; Karim, Karim S.

2010-04-01

We present an analysis of output referred pixel electronic noise as a function of position in the active matrix array for both active and passive pixel architectures. Three different noise sources for Active Pixel Sensor (APS) arrays are considered: readout period noise, reset period noise and leakage current noise of the reset TFT during readout. For the state-of-the-art Passive Pixel Sensor (PPS) array, the readout noise of the TFT switch is considered. Measured noise results are obtained by modeling the array connections with RC ladders on a small in-house fabricated prototype. The results indicate that the pixels in the rows located in the middle part of the array have less random electronic noise at the output of the off-panel charge amplifier compared to the ones in rows at the two edges of the array. These results can help optimize for clearer images as well as help define the region-of-interest with the best signal-to-noise ratio in an active matrix digital flat panel imaging array.

Implementation of a Localization System for Sensor Networks

DTIC Science & Technology

2006-05-18

its N-point DFT is mathematically formulated as X[k] = N−1∑ n=0 x[n] W nkN , k = 0, 1, . . . , N − 1 (7.1) W knN = e −j(2π/N)kn (7.2) There are two...distributed ad-hoc wireless sensor networks. In Int. Conf. on Acoustics, Speech , and Signal Proc. (ICASSP), pages 2037 – 2040, Salt Lake City, UT. [18] J...Stability of recursive qrd-ls algorithms using finite- precision systolic array implementation. IEEE Trans. on Acoustics, Speech , and Signal Proc., 37(5

Antenna Electronics Concept for the Next-Generation Very Large Array

NASA Astrophysics Data System (ADS)

Shillue, Bill; Jackson, James; Selina, Rob

2018-01-01

The National Radio Astronomy Observatory (NRAO) is considering the scientific potential and technical feasibility of a next-generation VLA (ngVLA) with an emphasis on thermal imaging at milliarcsecond resolution. The preliminary goals for the ngVLA are to increase both the system sensitivity and angular resolution of the VLA tenfold and to cover a frequency range of 1.2-116 GHz.The design of the antenna electronics, reference signal distribution, and data transmission systems will be construction and operations cost drivers for the facility. The electronics must achieve a high level of performance, while maintaining low operation and maintenance costs and a high level of reliability. With the size of the array, design effort on manufacturability and integration of components can lead to reduced lifecycle costs. With current uncertainty in the feasibility of wideband receivers, and advancements in digitizer technology, the architecture should be scalable to the number of receiver bands and the speed and resolution of available digitizer ICs. The focus of the presentation will be a proposed architecture for the electronics system, parameter tradeoffs within the system specification, and areas where technical advances are required when compared to existing array designs.

Using a binaural biomimetic array to identify bottom objects ensonified by echolocating dolphins

USGS Publications Warehouse

Heiweg, D.A.; Moore, P.W.; Martin, S.W.; Dankiewicz, L.A.

2006-01-01

The development of a unique dolphin biomimetic sonar produced data that were used to study signal processing methods for object identification. Echoes from four metallic objects proud on the bottom, and a substrate-only condition, were generated by bottlenose dolphins trained to ensonify the targets in very shallow water. Using the two-element ('binaural') receive array, object echo spectra were collected and submitted for identification to four neural network architectures. Identification accuracy was evaluated over two receive array configurations, and five signal processing schemes. The four neural networks included backpropagation, learning vector quantization, genetic learning and probabilistic network architectures. The processing schemes included four methods that capitalized on the binaural data, plus a monaural benchmark process. All the schemes resulted in above-chance identification accuracy when applied to learning vector quantization and backpropagation. Beam-forming or concatenation of spectra from both receive elements outperformed the monaural benchmark, with higher sensitivity and lower bias. Ultimately, best object identification performance was achieved by the learning vector quantization network supplied with beam-formed data. The advantages of multi-element signal processing for object identification are clearly demonstrated in this development of a first-ever dolphin biomimetic sonar. ?? 2006 IOP Publishing Ltd.

Tradespace investigation of strategic design factors for large space telescopes

NASA Astrophysics Data System (ADS)

Karlow, Brandon; Jewison, Christopher; Sternberg, David; Hall, Sherrie; Golkar, Alessandro

2015-04-01

Future large telescope arrays require careful balancing of satisfaction across the stakeholders' community. Development programs usually cannot afford to explicitly address all stakeholder tradeoffs during the conceptual design stage, but rather confine the analysis to performance, cost, and schedule discussions, treating policy and budget as constraints defining the envelope of the investigation. Thus, it is of interest to develop an integrated stakeholder analysis approach to explicitly address the impact of all stakeholder interactions on the design of large telescope arrays to address future science and exploration needs. This paper offers a quantitative approach for modeling some of the stakeholder influences relevant to large telescope array designs-the linkages between a given mission and the wider NASA community. The main goal of the analysis is to explore the tradespace of large telescope designs and understand the effects of different design decisions in the stakeholders' network. Proposed architectures that offer benefits to existing constellations of systems, institutions, and mission plans are expected to yield political and engineering benefits for NASA stakeholders' wider objectives. If such synergistic architectures are privileged in subsequent analysis, regions of the tradespace that better meet the needs of the wider NASA community can be selected for further development.

Analysis of a Waveguide-Fed Metasurface Antenna

NASA Astrophysics Data System (ADS)

Smith, David R.; Yurduseven, Okan; Mancera, Laura Pulido; Bowen, Patrick; Kundtz, Nathan B.

2017-11-01

The metasurface concept has emerged as an advantageous reconfigurable antenna architecture for beam forming and wave-front shaping, with applications that include satellite and terrestrial communications, radar, imaging, and wireless power transfer. The metasurface antenna consists of an array of metamaterial elements distributed over an electrically large structure, each subwavelength in dimension and with subwavelength separation between elements. In the antenna configuration we consider, the metasurface is excited by the fields from an attached waveguide. Each metamaterial element can be modeled as a polarizable dipole that couples the waveguide mode to radiation modes. Distinct from the phased array and electronically-scanned-antenna architectures, a dynamic metasurface antenna does not require active phase shifters and amplifiers but rather achieves reconfigurability by shifting the resonance frequency of each individual metamaterial element. We derive the basic properties of a one-dimensional waveguide-fed metasurface antenna in the approximation in which the metamaterial elements do not perturb the waveguide mode and are noninteracting. We derive analytical approximations for the array factors of the one-dimensional antenna, including the effective polarizabilities needed for amplitude-only, phase-only, and binary constraints. Using full-wave numerical simulations, we confirm the analysis, modeling waveguides with slots or complementary metamaterial elements patterned into one of the surfaces.

3D carbon/cobalt-nickel mixed-oxide hybrid nanostructured arrays for asymmetric supercapacitors.

PubMed

Zhu, Jianhui; Jiang, Jian; Sun, Zhipeng; Luo, Jingshan; Fan, Zhanxi; Huang, Xintang; Zhang, Hua; Yu, Ting

2014-07-23

The electrochemical performance of supercapacitors relies not only on the exploitation of high-capacity active materials, but also on the rational design of superior electrode architectures. Herein, a novel supercapacitor electrode comprising 3D hierarchical mixed-oxide nanostructured arrays (NAs) of C/CoNi3 O4 is reported. The network-like C/CoNi3 O4 NAs exhibit a relatively high specific surface area; it is fabricated from ultra-robust Co-Ni hydroxide carbonate precursors through glucose-coating and calcination processes. Thanks to their interconnected three-dimensionally arrayed architecture and mesoporous nature, the C/CoNi3 O4 NA electrode exhibits a large specific capacitance of 1299 F/g and a superior rate performance, demonstrating 78% capacity retention even when the discharge current jumps by 100 times. An optimized asymmetric supercapacitor with the C/CoNi3 O4 NAs as the positive electrode is fabricated. This asymmetric supercapacitor can reversibly cycle at a high potential of 1.8 V, showing excellent cycling durability and also enabling a remarkable power density of ∼13 kW/kg with a high energy density of ∼19.2 W·h/kg. Two such supercapacitors linked in series can simultaneously power four distinct light-emitting diode indicators; they can also drive the motor of remote-controlled model planes. This work not only presents the potential of C/CoNi3 O4 NAs in thin-film supercapacitor applications, but it also demonstrates the superiority of electrodes with such a 3D hierarchical architecture. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A non-destructive crossbar architecture of multi-level memory-based resistor

NASA Astrophysics Data System (ADS)

Sahebkarkhorasani, Seyedmorteza

Nowadays, researchers are trying to shrink the memory cell in order to increase the capacity of the memory system and reduce the hardware costs. In recent years, there has been a revolution in electronics by using fundamentals of physics to build a new memory for computer application in order to increase the capacity and decrease the power consumption. Increasing the capacity of the memory causes a growth in the chip area. From 1971 to 2012 semiconductor manufacturing process improved from 6mum to 22 mum. In May 2008, S.Williams stated that "it is time to stop shrinking". In his paper, he declared that the process of shrinking memory element has recently become very slow and it is time to use another alternative in order to create memory elements [9]. In this project, we present a new design of a memory array using the new element named Memristor [3]. Memristor is a two-terminal passive electrical element that relates the charge and magnetic flux to each other. The device remained unknown since 1971 when it was discovered by Chua and introduced as the fourth fundamental passive element like capacitor, inductor and resistor [3]. Memristor has a dynamic resistance and it can retain its previous value even after disconnecting the power supply. Due to this interesting behavior of the Memristor, it can be a good replacement for all of the Non-Volatile Memories (NVMs) in the near future. Combination of this newly introduced element with the nanowire crossbar architecture would be a great structure which is called Crossbar Memristor. Some frameworks have recently been introduced in literature that utilized Memristor crossbar array, but there are many challenges to implement the Memristor crossbar array due to fabrication and device limitations. In this work, we proposed a simple design of Memristor crossbar array architecture which uses input feedback in order to preserve its data after each read operation.

Geometry and architecture of faults in a syn-rift normal fault array: The Nukhul half-graben, Suez rift, Egypt

NASA Astrophysics Data System (ADS)

Wilson, Paul; Gawthorpe, Rob L.; Hodgetts, David; Rarity, Franklin; Sharp, Ian R.

2009-08-01

The geometry and architecture of a well exposed syn-rift normal fault array in the Suez rift is examined. At pre-rift level, the Nukhul fault consists of a single zone of intense deformation up to 10 m wide, with a significant monocline in the hanging wall and much more limited folding in the footwall. At syn-rift level, the fault zone is characterised by a single discrete fault zone less than 2 m wide, with damage zone faults up to approximately 200 m into the hanging wall, and with no significant monocline developed. The evolution of the fault from a buried structure with associated fault-propagation folding, to a surface-breaking structure with associated surface faulting, has led to enhanced bedding-parallel slip at lower levels that is absent at higher levels. Strain is enhanced at breached relay ramps and bends inherited from pre-existing structures that were reactivated during rifting. Damage zone faults observed within the pre-rift show ramp-flat geometries associated with contrast in competency of the layers cut and commonly contain zones of scaly shale or clay smear. Damage zone faults within the syn-rift are commonly very straight, and may be discrete fault planes with no visible fault rock at the scale of observation, or contain relatively thin and simple zones of scaly shale or gouge. The geometric and architectural evolution of the fault array is interpreted to be the result of (i) the evolution from distributed trishear deformation during upward propagation of buried fault tips to surface faulting after faults breach the surface; (ii) differences in deformation response between lithified pre-rift units that display high competence contrasts during deformation, and unlithified syn-rift units that display low competence contrasts during deformation, and; (iii) the history of segmentation, growth and linkage of the faults that make up the fault array. This has important implications for fluid flow in fault zones.

Passion fruit-like nano-architectures: a general synthesis route

NASA Astrophysics Data System (ADS)

Cassano, D.; David, J.; Luin, S.; Voliani, V.

2017-03-01

Noble metal nanostructures have demonstrated a number of intriguing features for both medicine and catalysis. However, accumulation issues have prevented their clinical translation, while their use in catalysis has shown serious efficiency and stability hurdles. Here we introduce a simple and robust synthetic protocol for passion fruit-like nano-architectures composed by a silica shell embedding polymeric arrays of ultrasmall noble metal nanoparticles. These nano-architectures show interesting features for both oncology and catalysis. They avoid the issue of persistence in organism thanks to their fast biodegradation in renal clearable building blocks. Furthermore, their calcination results in yolk-shell structures composed by naked metal or alloy nanospheres shielded from aggregation by a silica shell.

Passion fruit-like nano-architectures: a general synthesis route

PubMed Central

Cassano, D.; David, J.; Luin, S.; Voliani, V.

2017-01-01

Noble metal nanostructures have demonstrated a number of intriguing features for both medicine and catalysis. However, accumulation issues have prevented their clinical translation, while their use in catalysis has shown serious efficiency and stability hurdles. Here we introduce a simple and robust synthetic protocol for passion fruit-like nano-architectures composed by a silica shell embedding polymeric arrays of ultrasmall noble metal nanoparticles. These nano-architectures show interesting features for both oncology and catalysis. They avoid the issue of persistence in organism thanks to their fast biodegradation in renal clearable building blocks. Furthermore, their calcination results in yolk-shell structures composed by naked metal or alloy nanospheres shielded from aggregation by a silica shell. PMID:28256565

Parallel language constructs for tensor product computations on loosely coupled architectures

NASA Technical Reports Server (NTRS)

Mehrotra, Piyush; Vanrosendale, John

1989-01-01

Distributed memory architectures offer high levels of performance and flexibility, but have proven awkard to program. Current languages for nonshared memory architectures provide a relatively low level programming environment, and are poorly suited to modular programming, and to the construction of libraries. A set of language primitives designed to allow the specification of parallel numerical algorithms at a higher level is described. Tensor product array computations are focused on along with a simple but important class of numerical algorithms. The problem of programming 1-D kernal routines is focused on first, such as parallel tridiagonal solvers, and then how such parallel kernels can be combined to form parallel tensor product algorithms is examined.

Highly Parallel Computing Architectures by using Arrays of Quantum-dot Cellular Automata (QCA): Opportunities, Challenges, and Recent Results

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Benny N.

2000-01-01

There has been significant improvement in the performance of VLSI devices, in terms of size, power consumption, and speed, in recent years and this trend may also continue for some near future. However, it is a well known fact that there are major obstacles, i.e., physical limitation of feature size reduction and ever increasing cost of foundry, that would prevent the long term continuation of this trend. This has motivated the exploration of some fundamentally new technologies that are not dependent on the conventional feature size approach. Such technologies are expected to enable scaling to continue to the ultimate level, i.e., molecular and atomistic size. Quantum computing, quantum dot-based computing, DNA based computing, biologically inspired computing, etc., are examples of such new technologies. In particular, quantum-dots based computing by using Quantum-dot Cellular Automata (QCA) has recently been intensely investigated as a promising new technology capable of offering significant improvement over conventional VLSI in terms of reduction of feature size (and hence increase in integration level), reduction of power consumption, and increase of switching speed. Quantum dot-based computing and memory in general and QCA specifically, are intriguing to NASA due to their high packing density (10(exp 11) - 10(exp 12) per square cm ) and low power consumption (no transfer of current) and potentially higher radiation tolerant. Under Revolutionary Computing Technology (RTC) Program at the NASA/JPL Center for Integrated Space Microelectronics (CISM), we have been investigating the potential applications of QCA for the space program. To this end, exploiting the intrinsic features of QCA, we have designed novel QCA-based circuits for co-planner (i.e., single layer) and compact implementation of a class of data permutation matrices, a class of interconnection networks, and a bit-serial processor. Building upon these circuits, we have developed novel algorithms and QCA-based architectures for highly parallel and systolic computation of signal/image processing applications, such as FFT and Wavelet and Wlash-Hadamard Transforms.

Low-cost laser diode array

DOEpatents

Freitas, B.L.; Skidmore, J.A.

1999-06-01

A substrate is used to fabricate a low-cost laser diode array. A substrate is machined from an electrically insulative material that is thermally conductive, or two substrates can be bonded together in which the top substrate is electrically as well as thermally conductive. The substrate thickness is slightly longer than the cavity length, and the width of the groove is wide enough to contain a bar and spring (which secures the laser bar firmly along one face of the groove). The spring also provides electrical continuity from the backside of the bar to the adjacent metalization layer on the laser bar substrate. Arrays containing one or more bars can be formed by creating many grooves at various spacings. Along the groove, many bars can be adjoined at the edges to provide parallel electrical conduction. This architecture allows precise and predictable registration of an array of laser bars to a self-aligned microlens array at low cost. 19 figs.

Ka-band MMIC subarray technology program (Ka-Mist)

NASA Technical Reports Server (NTRS)

Pottenger, Warren

1995-01-01

The broad objective of this program was to demonstrate a proof of concept insertion of Monolithic Microwave Integrated Circuit (MMIC) device technology into an innovative (tile architecture) active phased array antenna application supporting advanced EHF communication systems. Ka-band MMIC arrays have long been considered as having high potential for increasing the capability of space, aircraft, and land mobile communication systems in terms of scan performance, data rate, link margin, and flexibility while offering a significant reduction in size, weight, and power consumption. Insertion of MMIC technology into antenna systems, particularly at millimeter wave frequencies using low power and low noise amplifiers in close proximity to the radiating elements, offers a significant improvement in the array transmit efficiency, receive system noise figure, and overall array reliability. Application of active array technology also leads to the use of advanced beamforming techniques that can improve beam agility, diversity, and adaptivity to complex signal environments.

Signal processing applications of massively parallel charge domain computing devices

NASA Technical Reports Server (NTRS)

Fijany, Amir (Inventor); Barhen, Jacob (Inventor); Toomarian, Nikzad (Inventor)

1999-01-01

The present invention is embodied in a charge coupled device (CCD)/charge injection device (CID) architecture capable of performing a Fourier transform by simultaneous matrix vector multiplication (MVM) operations in respective plural CCD/CID arrays in parallel in O(1) steps. For example, in one embodiment, a first CCD/CID array stores charge packets representing a first matrix operator based upon permutations of a Hartley transform and computes the Fourier transform of an incoming vector. A second CCD/CID array stores charge packets representing a second matrix operator based upon different permutations of a Hartley transform and computes the Fourier transform of an incoming vector. The incoming vector is applied to the inputs of the two CCD/CID arrays simultaneously, and the real and imaginary parts of the Fourier transform are produced simultaneously in the time required to perform a single MVM operation in a CCD/CID array.

Array Technology for Terahertz Imaging

NASA Technical Reports Server (NTRS)

Reck, Theodore; Siles, Jose; Jung, Cecile; Gill, John; Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, Imran; Cooper, Ken

2012-01-01

Heterodyne terahertz (0.3 - 3THz) imaging systems are currently limited to single or a low number of pixels. Drastic improvements in imaging sensitivity and speed can be achieved by replacing single pixel systems with an array of detectors. This paper presents an array topology that is being developed at the Jet Propulsion Laboratory based on the micromachining of silicon. This technique fabricates the array's package and waveguide components by plasma etching of silicon, resulting in devices with precision surpassing that of current metal machining techniques. Using silicon increases the versatility of the packaging, enabling a variety of orientations of circuitry within the device which increases circuit density and design options. The design of a two-pixel transceiver utilizing a stacked architecture is presented that achieves a pixel spacing of 10mm. By only allowing coupling from the top and bottom of the package the design can readily be arrayed in two dimensions with a spacing of 10mm x 18mm.

Directed branch growth in aligned nanowire arrays.

PubMed

Beaudry, Allan L; LaForge, Joshua M; Tucker, Ryan T; Sorge, Jason B; Adamski, Nicholas L; Li, Peng; Taschuk, Michael T; Brett, Michael J

2014-01-01

Branch growth is directed along two, three, or four in-plane directions in vertically aligned nanowire arrays using vapor-liquid-solid glancing angle deposition (VLS-GLAD) flux engineering. In this work, a dynamically controlled collimated vapor flux guides branch placement during the self-catalyzed epitaxial growth of branched indium tin oxide nanowire arrays. The flux is positioned to grow branches on select nanowire facets, enabling fabrication of aligned nanotree arrays with L-, T-, or X-branching. In addition, a flux motion algorithm is designed to selectively elongate branches along one in-plane axis. Nanotrees are found to be aligned across large areas by X-ray diffraction pole figure analysis and through branch length and orientation measurements collected over 140 μm(2) from scanning electron microscopy images for each array. The pathway to guided assembly of nanowire architectures with controlled interconnectivity in three-dimensions using VLS-GLAD is discussed.

From MAD to SAD: The Italian experience for the low-frequency aperture array of SKA1-LOW

NASA Astrophysics Data System (ADS)

Bolli, P.; Pupillo, G.; Virone, G.; Farooqui, M. Z.; Lingua, A.; Mattana, A.; Monari, J.; Murgia, M.; Naldi, G.; Paonessa, F.; Perini, F.; Pluchino, S.; Rusticelli, S.; Schiaffino, M.; Schillirò, F.; Tartarini, G.; Tibaldi, A.

2016-03-01

This paper describes two small aperture array demonstrators called Medicina and Sardinia Array Demonstrators (MAD and SAD, respectively). The objectives of these instruments are to acquire experience and test new technologies for a possible application to the low-frequency aperture array of the low-frequency telescope of the Square Kilometer Array phase 1 (SKA1-LOW). The MAD experience was concluded in 2014, and it turned out to be an important test bench for implementing calibration techniques based on an artificial source mounted in an aerial vehicle. SAD is based on 128 dual-polarized Vivaldi antennas and is 1 order of magnitude larger than MAD. The architecture and the station size of SAD, which is along the construction phase, are more similar to those under evaluation for SKA1-LOW, and therefore, SAD is expected to provide useful hints for SKA1-LOW.

Low-cost laser diode array

DOEpatents

Freitas, Barry L.; Skidmore, Jay A.

1999-01-01

A substrate is used to fabricate a low-cost laser diode array. A substrate is machined from an electrically insulative material that is thermally conductive, or two substrates can be bonded together in which the top substrate is electrically as well as thermally conductive. The substrate thickness is slightly longer than the cavity length, and the width of the groove is wide enough to contain a bar and spring (which secures the laser bar firmly along one face of the groove). The spring also provides electrical continuity from the backside of the bar to the adjacent metalization layer on the laser bar substrate. Arrays containing one or more bars can be formed by creating many grooves at various spacings. Along the groove, many bars can be adjoined at the edges to provide parallel electrical conduction. This architecture allows precise and predictable registration of an array of laser bars to a self-aligned microlens array at low cost.

Microstructural architecture developed in the fabrication of solid and open-cellular copper components by additive manufacturing using electron beam melting

NASA Astrophysics Data System (ADS)

Ramirez, Diana Alejandra

The fabrication of Cu components were first built by additive manufacturing using electron beam melting (EBM) from low-purity, atomized Cu powder containing a high density of Cu2O precipitates leading to a novel example of precipitate-dislocation architecture. These microstructures exhibit cell-like arrays (1-3microm) in the horizontal reference plane perpendicular to the build direction with columnar-like arrays extending from ~12 to >60 microm in length and corresponding spatial dimensions of 1-3 microm. These observations were observed by the use of optical metallography, and scanning and transmission electron microscopy. The hardness measurements were taken both on the atomized powder and the Cu components. The hardness for these architectures ranged from ~HV 83 to 88, in contrast to the original Cu powder microindentation hardness of HV 72 and the commercial Cu base plate hardness of HV 57. These observations were utilized for the fabrication of open-cellular copper structures by additive manufacturing using EBM and illustrated the ability to fabricate some form of controlled microstructural architecture by EBM parameter alteration or optimizing. The fabrication of these structures ranged in densities from 0.73g/cm3 to 6.67g/cm3. These structures correspond to four different articulated mesh arrays. While these components contained some porosity as a consequence of some unmelted regions, the Cu2O precipitates also contributed to a reduced density. Using X-ray Diffraction showed the approximate volume fraction estimated to be ~2%. The addition of precipitates created in the EBM melt scan formed microstructural arrays which contributed to hardening contributing to the strength of mesh struts and foam ligaments. The measurements of relative stiffness versus relative density plots for Cu compared very closely with Ti-6Al-4V open cellular structures - both mesh and foams. The Cu reticulated mesh structures exhibit a slope of n = 2 in contrast to a slope of n = 2.4 for the stochastic Cu foams, consistent with the Gibson-Ashby foam model where n = 2. These open cellular structure components exhibit considerable potential for novel, complex, multi-functional electrical and thermal management systems, especially complex, monolithic heat exchange device.

Integrating Computer Architectures into the Design of High-Performance Controllers

NASA Technical Reports Server (NTRS)

Jacklin, Stephen A.; Leyland, Jane A.; Warmbrodt, William

1986-01-01

Modern control systems must typically perform real-time identification and control, as well as coordinate a host of other activities related to user interaction, on-line graphics, and file management. This paper discusses five global design considerations that are useful to integrate array processor, multimicroprocessor, and host computer system architecture into versatile, high-speed controllers. Such controllers are capable of very high control throughput, and can maintain constant interaction with the non-real-time or user environment. As an application example, the architecture of a high-speed, closed-loop controller used to actively control helicopter vibration will be briefly discussed. Although this system has been designed for use as the controller for real-time rotorcraft dynamics and control studies in a wind-tunnel environment, the control architecture can generally be applied to a wide range of automatic control applications.

An architecture for real-time vision processing

NASA Technical Reports Server (NTRS)

Chien, Chiun-Hong

1994-01-01

To study the feasibility of developing an architecture for real time vision processing, a task queue server and parallel algorithms for two vision operations were designed and implemented on an i860-based Mercury Computing System 860VS array processor. The proposed architecture treats each vision function as a task or set of tasks which may be recursively divided into subtasks and processed by multiple processors coordinated by a task queue server accessible by all processors. Each idle processor subsequently fetches a task and associated data from the task queue server for processing and posts the result to shared memory for later use. Load balancing can be carried out within the processing system without the requirement for a centralized controller. The author concludes that real time vision processing cannot be achieved without both sequential and parallel vision algorithms and a good parallel vision architecture.

On-chip visual perception of motion: a bio-inspired connectionist model on FPGA.

PubMed

Torres-Huitzil, César; Girau, Bernard; Castellanos-Sánchez, Claudio

2005-01-01

Visual motion provides useful information to understand the dynamics of a scene to allow intelligent systems interact with their environment. Motion computation is usually restricted by real time requirements that need the design and implementation of specific hardware architectures. In this paper, the design of hardware architecture for a bio-inspired neural model for motion estimation is presented. The motion estimation is based on a strongly localized bio-inspired connectionist model with a particular adaptation of spatio-temporal Gabor-like filtering. The architecture is constituted by three main modules that perform spatial, temporal, and excitatory-inhibitory connectionist processing. The biomimetic architecture is modeled, simulated and validated in VHDL. The synthesis results on a Field Programmable Gate Array (FPGA) device show the potential achievement of real-time performance at an affordable silicon area.

Photonic structures in biology

NASA Astrophysics Data System (ADS)

Vukusic, Pete; Sambles, J. Roy

2003-08-01

Millions of years before we began to manipulate the flow of light using synthetic structures, biological systems were using nanometre-scale architectures to produce striking optical effects. An astonishing variety of natural photonic structures exists: a species of Brittlestar uses photonic elements composed of calcite to collect light, Morpho butterflies use multiple layers of cuticle and air to produce their striking blue colour and some insects use arrays of elements, known as nipple arrays, to reduce reflectivity in their compound eyes. Natural photonic structures are providing inspiration for technological applications.

Spatial Light Rebroadcaster Architecture Study

DTIC Science & Technology

1992-12-01

specifications on the lenslet arrays described in [ Borelli ] and summarized 3 here: Lenslet diameter: 70,m < D < 1000/Am Lenslet spacing: 151m < Delta Focal...which leads to k2 < 1/3. We will use as our baseline, a lenslet array with D, = 300 um and3 A1 = 45 14m which is within the specifications of [ Borelli ...Target Recognizer Working Group), "Automatic Target Recognizer Component Definitions," ATRWG Report No. 87-002, April 1987. Borelli , N., et al

Datacube Services in Action, Using Open Source and Open Standards

NASA Astrophysics Data System (ADS)

Baumann, P.; Misev, D.

2016-12-01

Array Databases comprise novel, promising technology for massive spatio-temporal datacubes, extending the SQL paradigm of "any query, anytime" to n-D arrays. On server side, such queries can be optimized, parallelized, and distributed based on partitioned array storage. The rasdaman ("raster data manager") system, which has pioneered Array Databases, is available in open source on www.rasdaman.org. Its declarative query language extends SQL with array operators which are optimized and parallelized on server side. The rasdaman engine, which is part of OSGeo Live, is mature and in operational use databases individually holding dozens of Terabytes. Further, the rasdaman concepts have strongly impacted international Big Data standards in the field, including the forthcoming MDA ("Multi-Dimensional Array") extension to ISO SQL, the OGC Web Coverage Service (WCS) and Web Coverage Processing Service (WCPS) standards, and the forthcoming INSPIRE WCS/WCPS; in both OGC and INSPIRE, OGC is WCS Core Reference Implementation. In our talk we present concepts, architecture, operational services, and standardization impact of open-source rasdaman, as well as experiences made.

Controllable Synthesis of Copper Oxide/Carbon Core/Shell Nanowire Arrays and Their Application for Electrochemical Energy Storage

PubMed Central

Zhan, Jiye; Chen, Minghua; Xia, Xinhui

2015-01-01

Rational design/fabrication of integrated porous metal oxide arrays is critical for the construction of advanced electrochemical devices. Herein, we report self-supported CuO/C core/shell nanowire arrays prepared by the combination of electro-deposition and chemical vapor deposition methods. CuO/C nanowires with diameters of ~400 nm grow quasi-vertically to the substrates forming three-dimensional arrays architecture. A thin carbon shell is uniformly coated on the CuO nanowire cores. As an anode of lithium ion batteries, the resultant CuO/C nanowire arrays are demonstrated to have high specific capacity (672 mAh·g−1 at 0.2 C) and good cycle stability (425 mAh·g−1 at 1 C up to 150 cycles). The core/shell arrays structure plays positive roles in the enhancement of Li ion storage due to fast ion/electron transfer path, good strain accommodation and sufficient contact between electrolyte and active materials. PMID:28347084

Development Of A Three-Dimensional Circuit Integration Technology And Computer Architecture

NASA Astrophysics Data System (ADS)

Etchells, R. D.; Grinberg, J.; Nudd, G. R.

1981-12-01

This paper is the first of a series 1,2,3 describing a range of efforts at Hughes Research Laboratories, which are collectively referred to as "Three-Dimensional Microelectronics." The technology being developed is a combination of a unique circuit fabrication/packaging technology and a novel processing architecture. The packaging technology greatly reduces the parasitic impedances associated with signal-routing in complex VLSI structures, while simultaneously allowing circuit densities orders of magnitude higher than the current state-of-the-art. When combined with the 3-D processor architecture, the resulting machine exhibits a one- to two-order of magnitude simultaneous improvement over current state-of-the-art machines in the three areas of processing speed, power consumption, and physical volume. The 3-D architecture is essentially that commonly referred to as a "cellular array", with the ultimate implementation having as many as 512 x 512 processors working in parallel. The three-dimensional nature of the assembled machine arises from the fact that the chips containing the active circuitry of the processor are stacked on top of each other. In this structure, electrical signals are passed vertically through the chips via thermomigrated aluminum feedthroughs. Signals are passed between adjacent chips by micro-interconnects. This discussion presents a broad view of the total effort, as well as a more detailed treatment of the fabrication and packaging technologies themselves. The results of performance simulations of the completed 3-D processor executing a variety of algorithms are also presented. Of particular pertinence to the interests of the focal-plane array community is the simulation of the UNICORNS nonuniformity correction algorithms as executed by the 3-D architecture.

An experimental investigation of high temperature superconducting microstrip antennas at K- and Ka-band frequencies. Ph.D. Thesis Final Report

NASA Technical Reports Server (NTRS)

Richard, Mark A.

1993-01-01

The recent discovery of high temperature superconductors (HTS) has generated a substantial amount of interest in microstrip antenna applications. However, the high permittivity of substrates compatible with HTS results in narrow bandwidths and high patch edge impedances of such antennas. To investigate the performance of superconducting microstrip antennas, three antenna architectures at K and Ka-band frequencies are examined. Superconducting microstrip antennas that are directly coupled, gap coupled, and electromagnetically coupled to a microstrip transmission line were designed and fabricated on lanthanum aluminate substrates using YBa2Cu3O7 superconducting thin films. For each architecture, a single patch antenna and a four element array were fabricated. Measurements from these antennas, including input impedance, bandwidth, patterns, efficiency, and gain are presented. The measured results show usable antennas can be constructed using any of the architectures. All architectures show excellent gain characteristics, with less than 2 dB of total loss in the four element arrays. Although the direct and gap coupled antennas are the simplest antennas to design and fabricate, they suffer from narrow bandwidths. The electromagnetically coupled antenna, on the other hand, allows the flexibility of using a low permittivity substrate for the patch radiator, while using HTS for the feed network, thus increasing the bandwidth while effectively utilizing the low loss properties of HTS. Each antenna investigated in this research is the first of its kind reported.

Large-scale genome-wide analysis identifies genetic variants associated with cardiac structure and function

PubMed Central

Wild, Philipp S.; Felix, Janine F.; Schillert, Arne; Chen, Ming-Huei; Leening, Maarten J.G.; Völker, Uwe; Großmann, Vera; Brody, Jennifer A.; Irvin, Marguerite R.; Shah, Sanjiv J.; Pramana, Setia; Lieb, Wolfgang; Schmidt, Reinhold; Stanton, Alice V.; Malzahn, Dörthe; Lyytikäinen, Leo-Pekka; Tiller, Daniel; Smith, J. Gustav; Di Tullio, Marco R.; Musani, Solomon K.; Morrison, Alanna C.; Pers, Tune H.; Morley, Michael; Kleber, Marcus E.; Aragam, Jayashri; Bis, Joshua C.; Bisping, Egbert; Broeckel, Ulrich; Cheng, Susan; Deckers, Jaap W.; Del Greco M, Fabiola; Edelmann, Frank; Fornage, Myriam; Franke, Lude; Friedrich, Nele; Harris, Tamara B.; Hofer, Edith; Hofman, Albert; Huang, Jie; Hughes, Alun D.; Kähönen, Mika; investigators, KNHI; Kruppa, Jochen; Lackner, Karl J.; Lannfelt, Lars; Laskowski, Rafael; Launer, Lenore J.; Lindgren, Cecilia M.; Loley, Christina; Mayet, Jamil; Medenwald, Daniel; Morris, Andrew P.; Müller, Christian; Müller-Nurasyid, Martina; Nappo, Stefania; Nilsson, Peter M.; Nuding, Sebastian; Nutile, Teresa; Peters, Annette; Pfeufer, Arne; Pietzner, Diana; Pramstaller, Peter P.; Raitakari, Olli T.; Rice, Kenneth M.; Rotter, Jerome I.; Ruohonen, Saku T.; Sacco, Ralph L.; Samdarshi, Tandaw E.; Sharp, Andrew S.P.; Shields, Denis C.; Sorice, Rossella; Sotoodehnia, Nona; Stricker, Bruno H.; Surendran, Praveen; Töglhofer, Anna M.; Uitterlinden, André G.; Völzke, Henry; Ziegler, Andreas; Münzel, Thomas; März, Winfried; Cappola, Thomas P.; Hirschhorn, Joel N.; Mitchell, Gary F.; Smith, Nicholas L.; Fox, Ervin R.; Dueker, Nicole D.; Jaddoe, Vincent W.V.; Melander, Olle; Lehtimäki, Terho; Ciullo, Marina; Hicks, Andrew A.; Lind, Lars; Gudnason, Vilmundur; Pieske, Burkert; Barron, Anthony J.; Zweiker, Robert; Schunkert, Heribert; Ingelsson, Erik; Liu, Kiang; Arnett, Donna K.; Psaty, Bruce M.; Blankenberg, Stefan; Larson, Martin G.; Felix, Stephan B.; Franco, Oscar H.; Zeller, Tanja; Vasan, Ramachandran S.; Dörr, Marcus

2017-01-01

BACKGROUND. Understanding the genetic architecture of cardiac structure and function may help to prevent and treat heart disease. This investigation sought to identify common genetic variations associated with inter-individual variability in cardiac structure and function. METHODS. A GWAS meta-analysis of echocardiographic traits was performed, including 46,533 individuals from 30 studies (EchoGen consortium). The analysis included 16 traits of left ventricular (LV) structure, and systolic and diastolic function. RESULTS. The discovery analysis included 21 cohorts for structural and systolic function traits (n = 32,212) and 17 cohorts for diastolic function traits (n = 21,852). Replication was performed in 5 cohorts (n = 14,321) and 6 cohorts (n = 16,308), respectively. Besides 5 previously reported loci, the combined meta-analysis identified 10 additional genome-wide significant SNPs: rs12541595 near MTSS1 and rs10774625 in ATXN2 for LV end-diastolic internal dimension; rs806322 near KCNRG, rs4765663 in CACNA1C, rs6702619 near PALMD, rs7127129 in TMEM16A, rs11207426 near FGGY, rs17608766 in GOSR2, and rs17696696 in CFDP1 for aortic root diameter; and rs12440869 in IQCH for Doppler transmitral A-wave peak velocity. Findings were in part validated in other cohorts and in GWAS of related disease traits. The genetic loci showed associations with putative signaling pathways, and with gene expression in whole blood, monocytes, and myocardial tissue. CONCLUSION. The additional genetic loci identified in this large meta-analysis of cardiac structure and function provide insights into the underlying genetic architecture of cardiac structure and warrant follow-up in future functional studies. FUNDING. For detailed information per study, see Acknowledgments. PMID:28394258

Resource Efficient Hardware Architecture for Fast Computation of Running Max/Min Filters

PubMed Central

Torres-Huitzil, Cesar

2013-01-01

Running max/min filters on rectangular kernels are widely used in many digital signal and image processing applications. Filtering with a k × k kernel requires of k 2 − 1 comparisons per sample for a direct implementation; thus, performance scales expensively with the kernel size k. Faster computations can be achieved by kernel decomposition and using constant time one-dimensional algorithms on custom hardware. This paper presents a hardware architecture for real-time computation of running max/min filters based on the van Herk/Gil-Werman (HGW) algorithm. The proposed architecture design uses less computation and memory resources than previously reported architectures when targeted to Field Programmable Gate Array (FPGA) devices. Implementation results show that the architecture is able to compute max/min filters, on 1024 × 1024 images with up to 255 × 255 kernels, in around 8.4 milliseconds, 120 frames per second, at a clock frequency of 250 MHz. The implementation is highly scalable for the kernel size with good performance/area tradeoff suitable for embedded applications. The applicability of the architecture is shown for local adaptive image thresholding. PMID:24288456

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. Current standards were researched and new standard interfaces were proposed. The implementation of the proposed standard interfaces on a laboratory breadboard SDR will be presented.

RRAM-based parallel computing architecture using k-nearest neighbor classification for pattern recognition

NASA Astrophysics Data System (ADS)

Jiang, Yuning; Kang, Jinfeng; Wang, Xinan

2017-03-01

Resistive switching memory (RRAM) is considered as one of the most promising devices for parallel computing solutions that may overcome the von Neumann bottleneck of today’s electronic systems. However, the existing RRAM-based parallel computing architectures suffer from practical problems such as device variations and extra computing circuits. In this work, we propose a novel parallel computing architecture for pattern recognition by implementing k-nearest neighbor classification on metal-oxide RRAM crossbar arrays. Metal-oxide RRAM with gradual RESET behaviors is chosen as both the storage and computing components. The proposed architecture is tested by the MNIST database. High speed (~100 ns per example) and high recognition accuracy (97.05%) are obtained. The influence of several non-ideal device properties is also discussed, and it turns out that the proposed architecture shows great tolerance to device variations. This work paves a new way to achieve RRAM-based parallel computing hardware systems with high performance.

CMOS gate array characterization procedures

NASA Astrophysics Data System (ADS)

Spratt, James P.

1993-09-01

Present procedures are inadequate for characterizing the radiation hardness of gate array product lines prior to personalization because the selection of circuits to be used, from among all those available in the manufacturer's circuit library, is usually uncontrolled. (Some circuits are fundamentally more radiation resistant than others.) In such cases, differences in hardness can result between different designs of the same logic function. Hardness also varies because many gate arrays feature large custom-designed megacells (e.g., microprocessors and random access memories-MicroP's and RAM's). As a result, different product lines cannot be compared equally. A characterization strategy is needed, along with standardized test vehicle(s), methodology, and conditions, so that users can make informed judgments on which gate arrays are best suited for their needs. The program described developed preferred procedures for the radiation characterization of gate arrays, including a gate array evaluation test vehicle, featuring a canary circuit, designed to define the speed versus hardness envelope of the gate array. A multiplier was chosen for this role, and a baseline multiplier architecture is suggested that could be incorporated into an existing standard evaluation circuit chip.

K-Band Phased Array Developed for Low- Earth-Orbit Satellite Communications

NASA Technical Reports Server (NTRS)

Anzic, Godfrey

1999-01-01

Future rapid deployment of low- and medium-Earth-orbit satellite constellations that will offer various narrow- to wide-band wireless communications services will require phased-array antennas that feature wide-angle and superagile electronic steering of one or more antenna beams. Antennas, which employ monolithic microwave integrated circuits (MMIC), are perfectly suited for this application. Under a cooperative agreement, an MMIC-based, K-band phased-array antenna is being developed with 50/50 cost sharing by the NASA Lewis Research Center and Raytheon Systems Company. The transmitting array, which will operate at 19 gigahertz (GHz), is a state-of-the-art design that features dual, independent, electronically steerable beam operation ( 42 ), a stand-alone thermal management, and a high-density tile architecture. This array can transmit 622 megabits per second (Mbps) in each beam from Earth orbit to small Earth terminals. The weight of the total array package is expected to be less than 8 lb. The tile integration technology (flip chip MMIC tile) chosen for this project represents a major advancement in phased-array engineering and holds much promise for reducing manufacturing costs.

A wideband software reconfigurable modem

NASA Astrophysics Data System (ADS)

Turner, J. H., Jr.; Vickers, H.

A wideband modem is described which provides signal processing capability for four Lx-band signals employing QPSK, MSK and PPM waveforms and employs a software reconfigurable architecture for maximum system flexibility and graceful degradation. The current processor uses a 2901 and two 8086 microprocessors per channel and performs acquisition, tracking, and data demodulation for JITDS, GPS, IFF and TACAN systems. The next generation processor will be implemented using a VHSIC chip set employing a programmable complex array vector processor module, a GP computer module, customized gate array modules, and a digital array correlator. This integrated processor has application to a wide number of diverse system waveforms, and will bring the benefits of VHSIC technology insertion into avionic antijam communications systems.

Multicore fiber beamforming network for broadband satellite communications

NASA Astrophysics Data System (ADS)

Zainullin, Airat; Vidal, Borja; Macho, Andres; Llorente, Roberto

2017-02-01

Multi-core fiber (MCF) has been one of the main innovations in fiber optics in the last decade. Reported work on MCF has been focused on increasing the transmission capacity of optical communication links by exploiting space-division multiplexing. Additionally, MCF presents a strong potential in optical beamforming networks. The use of MCF can increase the compactness of the broadband antenna array controller. This is of utmost importance in platforms where size and weight are critical parameters such as communications satellites and airplanes. Here, an optical beamforming architecture that exploits the space-division capacity of MCF to implement compact optical beamforming networks is proposed, being a new application field for MCF. The experimental demonstration of this system using a 4-core MCF that controls a four-element antenna array is reported. An analysis of the impact of MCF on the performance of antenna arrays is presented. The analysis indicates that the main limitation comes from the relatively high insertion loss in the MCF fan-in and fan-out devices, which leads to angle dependent losses which can be mitigated by using fixed optical attenuators or a photonic lantern to reduce MCF insertion loss. The crosstalk requirements are also experimentally evaluated for the proposed MCF-based architecture. The potential signal impairment in the beamforming network is analytically evaluated, being of special importance when MCF with a large number of cores is considered. Finally, the optimization of the proposed MCF-based beamforming network is addressed targeting the scalability to large arrays.

Power and Propulsion System Design for Near-Earth Object Robotic Exploration

NASA Technical Reports Server (NTRS)

Snyder, John Steven; Randolph, Thomas M.; Landau, Damon F.; Bury, Kristen M.; Malone, Shane P.; Hickman, Tyler A.

2011-01-01

Near-Earth Objects (NEOs) are exciting targets for exploration; they are relatively easy to reach but relatively little is known about them. With solar electric propulsion, a vast number of interesting NEOs can be reached within a few years and with extensive flexibility in launch date. An additional advantage of electric propulsion for these missions is that a spacecraft can be small, enabling a fleet of explorers launched on a single vehicle or as secondary payloads. Commercial, flight-proven Hall thruster systems have great appeal based on their performance and low cost risk, but one issue with these systems is that the power processing units (PPUs) are designed for regulated spacecraft power architectures which are not attractive for small NEO missions. In this study we consider the integrated design of power and propulsion systems that utilize the capabilities of existing PPUs in an unregulated power architecture. Models for solar array and engine performance are combined with low-thrust trajectory analyses to bound spacecraft design parameters for a large class of NEO missions, then detailed array performance models are used to examine the array output voltage and current over a bounded mission set. Operational relationships between the power and electric propulsion systems are discussed, and it is shown that both the SPT-100 and BPT-4000 PPUs can perform missions over a solar range of 0.7 AU to 1.5 AU - encompassing NEOs, Venus, and Mars - within their operable input voltage ranges. A number of design trades to control the array voltage are available, including cell string layout, array offpointing during mission operations, and power draw by the Hall thruster system.

Assessing the genetic architecture of epithelial ovarian cancer histological subtypes.

PubMed

Cuellar-Partida, Gabriel; Lu, Yi; Dixon, Suzanne C; Fasching, Peter A; Hein, Alexander; Burghaus, Stefanie; Beckmann, Matthias W; Lambrechts, Diether; Van Nieuwenhuysen, Els; Vergote, Ignace; Vanderstichele, Adriaan; Doherty, Jennifer Anne; Rossing, Mary Anne; Chang-Claude, Jenny; Rudolph, Anja; Wang-Gohrke, Shan; Goodman, Marc T; Bogdanova, Natalia; Dörk, Thilo; Dürst, Matthias; Hillemanns, Peter; Runnebaum, Ingo B; Antonenkova, Natalia; Butzow, Ralf; Leminen, Arto; Nevanlinna, Heli; Pelttari, Liisa M; Edwards, Robert P; Kelley, Joseph L; Modugno, Francesmary; Moysich, Kirsten B; Ness, Roberta B; Cannioto, Rikki; Høgdall, Estrid; Høgdall, Claus; Jensen, Allan; Giles, Graham G; Bruinsma, Fiona; Kjaer, Susanne K; Hildebrandt, Michelle A T; Liang, Dong; Lu, Karen H; Wu, Xifeng; Bisogna, Maria; Dao, Fanny; Levine, Douglas A; Cramer, Daniel W; Terry, Kathryn L; Tworoger, Shelley S; Stampfer, Meir; Missmer, Stacey; Bjorge, Line; Salvesen, Helga B; Kopperud, Reidun K; Bischof, Katharina; Aben, Katja K H; Kiemeney, Lambertus A; Massuger, Leon F A G; Brooks-Wilson, Angela; Olson, Sara H; McGuire, Valerie; Rothstein, Joseph H; Sieh, Weiva; Whittemore, Alice S; Cook, Linda S; Le, Nhu D; Blake Gilks, C; Gronwald, Jacek; Jakubowska, Anna; Lubiński, Jan; Kluz, Tomasz; Song, Honglin; Tyrer, Jonathan P; Wentzensen, Nicolas; Brinton, Louise; Trabert, Britton; Lissowska, Jolanta; McLaughlin, John R; Narod, Steven A; Phelan, Catherine; Anton-Culver, Hoda; Ziogas, Argyrios; Eccles, Diana; Campbell, Ian; Gayther, Simon A; Gentry-Maharaj, Aleksandra; Menon, Usha; Ramus, Susan J; Wu, Anna H; Dansonka-Mieszkowska, Agnieszka; Kupryjanczyk, Jolanta; Timorek, Agnieszka; Szafron, Lukasz; Cunningham, Julie M; Fridley, Brooke L; Winham, Stacey J; Bandera, Elisa V; Poole, Elizabeth M; Morgan, Terry K; Goode, Ellen L; Schildkraut, Joellen M; Pearce, Celeste L; Berchuck, Andrew; Pharoah, Paul D P; Webb, Penelope M; Chenevix-Trench, Georgia; Risch, Harvey A; MacGregor, Stuart

2016-07-01

Epithelial ovarian cancer (EOC) is one of the deadliest common cancers. The five most common types of disease are high-grade and low-grade serous, endometrioid, mucinous and clear cell carcinoma. Each of these subtypes present distinct molecular pathogeneses and sensitivities to treatments. Recent studies show that certain genetic variants confer susceptibility to all subtypes while other variants are subtype-specific. Here, we perform an extensive analysis of the genetic architecture of EOC subtypes. To this end, we used data of 10,014 invasive EOC patients and 21,233 controls from the Ovarian Cancer Association Consortium genotyped in the iCOGS array (211,155 SNPs). We estimate the array heritability (attributable to variants tagged on arrays) of each subtype and their genetic correlations. We also look for genetic overlaps with factors such as obesity, smoking behaviors, diabetes, age at menarche and height. We estimated the array heritabilities of high-grade serous disease ([Formula: see text] = 8.8 ± 1.1 %), endometrioid ([Formula: see text] = 3.2 ± 1.6 %), clear cell ([Formula: see text] = 6.7 ± 3.3 %) and all EOC ([Formula: see text] = 5.6 ± 0.6 %). Known associated loci contributed approximately 40 % of the total array heritability for each subtype. The contribution of each chromosome to the total heritability was not proportional to chromosome size. Through bivariate and cross-trait LD score regression, we found evidence of shared genetic backgrounds between the three high-grade subtypes: serous, endometrioid and undifferentiated. Finally, we found significant genetic correlations of all EOC with diabetes and obesity using a polygenic prediction approach.

Mount control system of the ASTRI SST-2M prototype for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Antolini, Elisa; Tosti, Gino; Tanci, Claudio; Bagaglia, Marco; Canestrari, Rodolfo; Cascone, Enrico; Gambini, Giorgio; Nucciarelli, Giuliano; Pareschi, Giovanni; Scuderi, Salvo; Stringhetti, Luca; Busatta, Andrea; Giacomel, Stefano; Marchiori, Gianpietro; Manfrin, Cristiana; Marcuzzi, Enrico; Di Michele, Daniele; Grigolon, Carlo; Guarise, Paolo

2016-08-01

The ASTRI SST-2M telescope is an end-to-end prototype proposed for the Small Size class of Telescopes (SST) of the future Cherenkov Telescope Array (CTA). The prototype is installed in Italy at the INAF observing station located at Serra La Nave on Mount Etna (Sicily) and it was inaugurated in September 2014. This paper presents the software and hardware architecture and development of the system dedicated to the control of the mount, health, safety and monitoring systems of the ASTRI SST-2M telescope prototype. The mount control system installed on the ASTRI SST-2M telescope prototype makes use of standard and widely deployed industrial hardware and software. State of the art of the control and automation industries was selected in order to fulfill the mount related functional and safety requirements with assembly compactness, high reliability, and reduced maintenance. The software package was implemented with the Beckhoff TwinCAT version 3 environment for the software Programmable Logical Controller (PLC), while the control electronics have been chosen in order to maximize the homogeneity and the real time performance of the system. The integration with the high level controller (Telescope Control System) has been carried out by choosing the open platform communications Unified Architecture (UA) protocol, supporting rich data model while offering compatibility with the PLC platform. In this contribution we show how the ASTRI approach for the design and implementation of the mount control system has made the ASTRI SST-2M prototype a standalone intelligent machine, able to fulfill requirements and easy to be integrated in an array configuration such as the future ASTRI mini-array proposed to be installed at the southern site of the Cherenkov Telescope Array (CTA).

Multiple Embedded Processors for Fault-Tolerant Computing

NASA Technical Reports Server (NTRS)

Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

2005-01-01

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

Radiation Effects on Current Field Programmable Technologies

NASA Technical Reports Server (NTRS)

Katz, R.; LaBel, K.; Wang, J. J.; Cronquist, B.; Koga, R.; Penzin, S.; Swift, G.

1997-01-01

Manufacturers of field programmable gate arrays (FPGAS) take different technological and architectural approaches that directly affect radiation performance. Similar y technological and architectural features are used in related technologies such as programmable substrates and quick-turn application specific integrated circuits (ASICs). After analyzing current technologies and architectures and their radiation-effects implications, this paper includes extensive test data quantifying various devices total dose and single event susceptibilities, including performance degradation effects and temporary or permanent re-configuration faults. Test results will concentrate on recent technologies being used in space flight electronic systems and those being developed for use in the near term. This paper will provide the first extensive study of various configuration memories used in programmable devices. Radiation performance limits and their impacts will be discussed for each design. In addition, the interplay between device scaling, process, bias voltage, design, and architecture will be explored. Lastly, areas of ongoing research will be discussed.

A static data flow simulation study at Ames Research Center

NASA Technical Reports Server (NTRS)

Barszcz, Eric; Howard, Lauri S.

1987-01-01

Demands in computational power, particularly in the area of computational fluid dynamics (CFD), led NASA Ames Research Center to study advanced computer architectures. One architecture being studied is the static data flow architecture based on research done by Jack B. Dennis at MIT. To improve understanding of this architecture, a static data flow simulator, written in Pascal, has been implemented for use on a Cray X-MP/48. A matrix multiply and a two-dimensional fast Fourier transform (FFT), two algorithms used in CFD work at Ames, have been run on the simulator. Execution times can vary by a factor of more than 2 depending on the partitioning method used to assign instructions to processing elements. Service time for matching tokens has proved to be a major bottleneck. Loop control and array address calculation overhead can double the execution time. The best sustained MFLOPS rates were less than 50% of the maximum capability of the machine.

A new method to synthesize complicated multi-branched carbon nanotubes with controlled architecture and composition.

PubMed

Wei, Dacheng; Liu, Yunqi; Cao, Lingchao; Fu, Lei; Li, Xianglong; Wang, Yu; Yu, Gui; Zhu, Daoben

2006-02-01

Here we develop a simple method by using flow fluctuation to synthesize arrays of multi-branched carbon nanotubes (CNTs) that are far more complex than those previously reported. The architectures and compositions can be well controlled, thus avoiding any template or additive. A branching mechanism of fluctuation-promoted coalescence of catalyst particles is proposed. This finding will provide a hopeful approach to the goal of CNT-based integrated circuits and be valuable for applying branched junctions in nanoelectronics and producing branched junctions of other materials.

Evolutionary multidimensional access architecture featuring cost-reduced components

NASA Astrophysics Data System (ADS)

Farjady, Farsheed; Parker, Michael C.; Walker, Stuart D.

1998-12-01

We describe a three-stage wavelength-routed optical access network, utilizing coarse passband-flattened arrayed- waveguide grating routers. An N-dimensional addressing strategy enables 6912 customers to be bi-directionally addressed with multi-Gb/s data using only 24 wavelengths spaced by 1.6 nm. Coarse wavelength separation allows use of increased tolerance WDM components at the exchange and customer premises. The architecture is designed to map onto standard access network topologies, allowing elegant upgradability from legacy PON infrastructures at low cost. Passband-flattening of the routers is achieved through phase apodization.

Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications.

PubMed

Tokuda, Takashi; Noda, Toshihiko; Sasagawa, Kiyotaka; Ohta, Jun

2010-12-29

In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS) image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors' architecture on the basis of the type of electric measurement or imaging functionalities.

Compiling for Application Specific Computational Acceleration in Reconfigurable Architectures Final Report CRADA No. TSB-2033-01

DOE Office of Scientific and Technical Information (OSTI.GOV)

De Supinski, B.; Caliga, D.

2017-09-28

The primary objective of this project was to develop memory optimization technology to efficiently deliver data to, and distribute data within, the SRC-6's Field Programmable Gate Array- ("FPGA") based Multi-Adaptive Processors (MAPs). The hardware/software approach was to explore efficient MAP configurations and generate the compiler technology to exploit those configurations. This memory accessing technology represents an important step towards making reconfigurable symmetric multi-processor (SMP) architectures that will be a costeffective solution for large-scale scientific computing.

Mechanical response of spiral interconnect arrays for highly stretchable electronics

NASA Astrophysics Data System (ADS)

Qaiser, N.; Khan, S. M.; Nour, M.; Rehman, M. U.; Rojas, J. P.; Hussain, M. M.

2017-11-01

A spiral interconnect array is a commonly used architecture for stretchable electronics, which accommodates large deformations during stretching. Here, we show the effect of different geometrical morphologies on the deformation behavior of the spiral island network. We use numerical modeling to calculate the stresses and strains in the spiral interconnects under the prescribed displacement of 1000 μm. Our result shows that spiral arm elongation depends on the angular position of that particular spiral in the array. We also introduce the concept of a unit-cell, which fairly replicates the deformation mechanism for full complex hexagon, diamond, and square shaped arrays. The spiral interconnects which are axially connected between displaced and fixed islands attain higher stretchability and thus experience the maximum deformations. We perform tensile testing of 3D printed replica and find that experimental observations corroborate with theoretical study.

Big data challenges for large radio arrays

NASA Astrophysics Data System (ADS)

Jones, D. L.; Wagstaff, K.; Thompson, D. R.; D'Addario, L.; Navarro, R.; Mattmann, C.; Majid, W.; Lazio, J.; Preston, J.; Rebbapragada, U.

2012-03-01

Future large radio astronomy arrays, particularly the Square Kilometre Array (SKA), will be able to generate data at rates far higher than can be analyzed or stored affordably with current practices. This is, by definition, a "big data" problem, and requires an end-to-end solution if future radio arrays are to reach their full scientific potential. Similar data processing, transport, storage, and management challenges face next-generation facilities in many other fields. The Jet Propulsion Laboratory is developing technologies to address big data issues, with an emphasis in three areas: 1) Lower-power digital processing architectures to make highvolume data generation operationally affordable, 2) Date-adaptive machine learning algorithms for real-time analysis (or "data triage") of large data volumes, and 3) Scalable data archive systems that allow efficient data mining and remote user code to run locally where the data are stored.

Development of dual-polarization LEKIDs for CMB observations

NASA Astrophysics Data System (ADS)

McCarrick, Heather; Abitbol, Maximilian H.; Ade, Peter A. R.; Barry, Peter; Bryan, Sean; Che, George; Day, Peter; Doyle, Simon; Flanigan, Daniel; Johnson, Bradley R.; Jones, Glenn; LeDuc, Henry G.; Limon, Michele; Mauskopf, Philip; Miller, Amber; Tucker, Carole; Zmuidzinas, Jonas

2016-07-01

We discuss the design considerations and initial measurements from arrays of dual-polarization, lumped-element kinetic inductance detectors (LEKIDs) nominally designed for cosmic microwave background (CMB) studies. The detectors are horn-coupled, and each array element contains two single-polarization LEKIDs, which are made from thin-film aluminum and optimized for a single spectral band centered on 150 GHz. We are developing two array architectures, one based on 160 micron thick silicon wafers and the other based on silicon-on-insulator (SOI) wafers with a 30 micron thick device layer. The 20-element test arrays (40 LEKIDs) are characterized with both a linearly-polarized electronic millimeter wave source and a thermal source. We present initial measurements including the noise spectra, noise-equivalent temperature, and responsivity. We discuss future testing and further design optimizations to be implemented.

Developments in Time-Division Multiplexing of X-ray Transition-Edge Sensors

NASA Astrophysics Data System (ADS)

Doriese, W. B.; Morgan, K. M.; Bennett, D. A.; Denison, E. V.; Fitzgerald, C. P.; Fowler, J. W.; Gard, J. D.; Hays-Wehle, J. P.; Hilton, G. C.; Irwin, K. D.; Joe, Y. I.; Mates, J. A. B.; O'Neil, G. C.; Reintsema, C. D.; Robbins, N. O.; Schmidt, D. R.; Swetz, D. S.; Tatsuno, H.; Vale, L. R.; Ullom, J. N.

2016-07-01

Time-division multiplexing (TDM) is a mature scheme for the readout of arrays of transition-edge sensors (TESs). TDM is based on superconducting-quantum-interference-device (SQUID) current amplifiers. Multiple spectrometers based on gamma-ray and X-ray microcalorimeters have been operated with TDM readout, each at the scale of 200 sensors per spectrometer, as have several astronomical cameras with thousands of sub-mm or microwave bolometers. Here we present the details of two different versions of our TDM system designed to read out X-ray TESs. The first has been field-deployed in two 160-sensor (8 columns × 20 rows) spectrometers and four 240-sensor (8 columns × 30 rows) spectrometers. It has a three-SQUID-stage architecture, switches rows every 320 ns, and has total readout noise of 0.41 μ Φ 0 / surd Hz. The second, which is presently under development, has a two-SQUID-stage architecture, switches rows every 160 ns, and has total readout noise of 0.19 μ Φ 0 / surd Hz. Both quoted noise values are non-multiplexed and referred to the first-stage SQUID. In a demonstration of this new architecture, a multiplexed 1-column × 32-row array of NIST TESs achieved average energy resolution of 2.55± 0.01 eV at 6 keV.

Selective MBE growth of hexagonal networks of trapezoidal and triangular GaAs nanowires on patterned (1 1 1)B substrates

NASA Astrophysics Data System (ADS)

Tamai, Isao; Hasegawa, Hideki

2007-04-01

As a combination of novel hardware architecture and novel system architecture for future ultrahigh-density III-V nanodevice LSIs, the authors' group has recently proposed a hexagonal binary decision diagram (BDD) quantum circuit approach where gate-controlled path switching BDD node devices for a single or few electrons are laid out on a hexagonal nanowire network to realize a logic function. In this paper, attempts are made to establish a method to grow highly dense hexagonal nanowire networks for future BDD circuits by selective molecular beam epitaxy (MBE) on (1 1 1)B substrates. The (1 1 1)B orientation is suitable for BDD architecture because of the basic three-fold symmetry of the BDD node device. The growth experiments showed complex evolution of the cross-sectional structures, and it was explained in terms of kinetics determining facet boundaries. Straight arrays of triangular nanowires with 60 nm base width as well as hexagonal arrays of trapezoidal nanowires with a node density of 7.5×10 6 cm -2 were successfully grown with the aid of computer simulation. The result shows feasibility of growing high-density hexagonal networks of GaAs nanowires with precise control of the shape and size.

Ball-grid array architecture for microfabricated ion traps

DOE Office of Scientific and Technical Information (OSTI.GOV)

Guise, Nicholas D., E-mail: nicholas.guise@gtri.gatech.edu; Fallek, Spencer D.; Stevens, Kelly E.

2015-05-07

State-of-the-art microfabricated ion traps for quantum information research are approaching nearly one hundred control electrodes. We report here on the development and testing of a new architecture for microfabricated ion traps, built around ball-grid array (BGA) connections, that is suitable for increasingly complex trap designs. In the BGA trap, through-substrate vias bring electrical signals from the back side of the trap die to the surface trap structure on the top side. Gold-ball bump bonds connect the back side of the trap die to an interposer for signal routing from the carrier. Trench capacitors fabricated into the trap die replace area-intensivemore » surface or edge capacitors. Wirebonds in the BGA architecture are moved to the interposer. These last two features allow the trap die to be reduced to only the area required to produce trapping fields. The smaller trap dimensions allow tight focusing of an addressing laser beam for fast single-qubit rotations. Performance of the BGA trap as characterized with {sup 40}Ca{sup +} ions is comparable to previous surface-electrode traps in terms of ion heating rate, mode frequency stability, and storage lifetime. We demonstrate two-qubit entanglement operations with {sup 171}Yb{sup +} ions in a second BGA trap.« less

Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

PubMed

Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

2014-09-01

The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

Towards lightweight and flexible high performance nanocrystalline silicon solar cells through light trapping and transport layers

NASA Astrophysics Data System (ADS)

Gray, Zachary R.

This thesis investigates ways to enhance the efficiency of thin film solar cells through the application of both novel nano-element array light trapping architectures and nickel oxide hole transport/electron blocking layers. Experimental results independently demonstrate a 22% enhancement in short circuit current density (JSC) resulting from a nano-element array light trapping architecture and a ˜23% enhancement in fill factor (FF) and ˜16% enhancement in open circuit voltage (VOC) resulting from a nickel oxide transport layer. In each case, the overall efficiency of the device employing the light trapping or transport layer was superior to that of the corresponding control device. Since the efficiency of a solar cell scales with the product of JSC, FF, and VOC, it follows that the results of this thesis suggest high performance thin film solar cells can be realized in the event light trapping architectures and transport layers can be simultaneously optimized. The realizations of these performance enhancements stem from extensive process optimization for numerous light trapping and transport layer fabrication approaches. These approaches were guided by numerical modeling techniques which will also be discussed. Key developments in this thesis include (1) the fabrication of nano-element topographies conducive to light trapping using various fabrication approaches, (2) the deposition of defect free nc-Si:H onto structured topographies by switching from SiH4 to SiF 4 PECVD gas chemistry, and (3) the development of the atomic layer deposition (ALD) growth conditions for NiO. Keywords: light trapping, nano-element array, hole transport layer, electron blocking layer, nickel oxide, nanocrystalline silicon, aluminum doped zinc oxide, atomic layer deposition, plasma enhanced chemical vapor deposition, electron beam lithography, ANSYS HFSS.

Programmable nanowire circuits for nanoprocessors.

PubMed

Yan, Hao; Choe, Hwan Sung; Nam, SungWoo; Hu, Yongjie; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M

2011-02-10

A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.

Non-invasive measurement of pulse wave velocity using transputer-based analysis of Doppler flow audio signals.

PubMed

Stewart, W R; Ramsey, M W; Jones, C J

1994-08-01

A system for the measurement of arterial pulse wave velocity is described. A personal computer (PC) plug-in transputer board is used to process the audio signals from two pocket Doppler ultrasound units. The transputer is used to provide a set of bandpass digital filters on two channels. The times of excursion of power through thresholds in each filter are recorded and used to estimate the onset of systolic flow. The system does not require an additional spectrum analyser and can work in real time. The transputer architecture provides for easy integration into any wider physiological measurement system.

Interference mitigation for simultaneous transmit and receive applications on digital phased array systems

NASA Astrophysics Data System (ADS)

Snow, Trevor M.

As analog-to-digital (ADC) and digital-to-analog conversion (DAC) technologies become cheaper and digital processing capabilities improve, phased array systems with digital transceivers at every element will become more commonplace. These architectures offer greater capability over traditional analog systems and enable advanced applications such as multiple-input, multiple-output (MIMO) communications, adaptive beamforming, space-time adaptive processing (STAP), and MIMO for radar. Capabilities for such systems are still limited by the need for isolating self-interference from transmitters at co-located receivers. The typical approach of time-sharing the antenna aperture between transmitters and receivers works but leaves the receivers blind for a period of time. For full-duplex operation, some systems use separate frequency bands for transmission and reception, but these require fixed filtering which reduces the system's ability to adapt to its environment and is also an inefficient use of spectral resources. To that end, tunable, high quality-factor filters are used for sub-band isolation and protect receivers while allowing open reception at other frequencies. For more flexibility, another emergent area of related research has focused on co-located spatial isolation using multiple antennas and direct injection of interference cancellation signals into receivers, which enables same-frequency full-duplex operation. With all these methods, self-interference must be reduced by an amount that prevents saturation of the ADC. Intermodulation products generated in the receiver in this process can potentially be problematic, as certain intermodulation products may appear to come from a particular angle and cohere in the beamformer. This work explores various digital phased array architectures and the how the flexibility afforded by an all-digital beamforming architecture, layered with other methods of isolation, can be used to reduce self-interference within the system. Specifically, digital control of coupled energy into receiving elements for planar and cylindrical array symmetries can be significantly reduced using near-field nulling, optimization of transmission frequencies for particular steering angles, and optimization of phase weights over restricted sets, without major impacts to the far-field performance of the system. Finally, a method for reducing in-band intermodulation that would ordinarily cohere in a system's receive beamformer is demonstrated using parallel cross-linearization of adjacent digital receivers in a phased array.

670-GHz Schottky Diode-Based Subharmonic Mixer with CPW Circuits and 70-GHz IF

NASA Technical Reports Server (NTRS)

Chattopadhyay, Goutam; Schlecht, Erich T.; Lee, Choonsup; Lin, Robert H.; Gill, John J.; Mehdi, Imran; Sin, Seth; Deal, William; Loi, Kwok K.; Nam, Peta;

Predictive modeling of infrared detectors and material systems

NASA Astrophysics Data System (ADS)

Pinkie, Benjamin

Detectors sensitive to thermal and reflected infrared radiation are widely used for night-vision, communications, thermography, and object tracking among other military, industrial, and commercial applications. System requirements for the next generation of ultra-high-performance infrared detectors call for increased functionality such as large formats (> 4K HD) with wide field-of-view, multispectral sensitivity, and on-chip processing. Due to the low yield of infrared material processing, the development of these next-generation technologies has become prohibitively costly and time consuming. In this work, it will be shown that physics-based numerical models can be applied to predictively simulate infrared detector arrays of current technological interest. The models can be used to a priori estimate detector characteristics, intelligently design detector architectures, and assist in the analysis and interpretation of existing systems. This dissertation develops a multi-scale simulation model which evaluates the physics of infrared systems from the atomic (material properties and electronic structure) to systems level (modulation transfer function, dense array effects). The framework is used to determine the electronic structure of several infrared materials, optimize the design of a two-color back-to-back HgCdTe photodiode, investigate a predicted failure mechanism for next-generation arrays, and predict the systems-level measurables of a number of detector architectures.

Training Deep Convolutional Neural Networks with Resistive Cross-Point Devices

PubMed Central

Gokmen, Tayfun; Onen, Murat; Haensch, Wilfried

2017-01-01

In a previous work we have detailed the requirements for obtaining maximal deep learning performance benefit by implementing fully connected deep neural networks (DNN) in the form of arrays of resistive devices. Here we extend the concept of Resistive Processing Unit (RPU) devices to convolutional neural networks (CNNs). We show how to map the convolutional layers to fully connected RPU arrays such that the parallelism of the hardware can be fully utilized in all three cycles of the backpropagation algorithm. We find that the noise and bound limitations imposed by the analog nature of the computations performed on the arrays significantly affect the training accuracy of the CNNs. Noise and bound management techniques are presented that mitigate these problems without introducing any additional complexity in the analog circuits and that can be addressed by the digital circuits. In addition, we discuss digitally programmable update management and device variability reduction techniques that can be used selectively for some of the layers in a CNN. We show that a combination of all those techniques enables a successful application of the RPU concept for training CNNs. The techniques discussed here are more general and can be applied beyond CNN architectures and therefore enables applicability of the RPU approach to a large class of neural network architectures. PMID:29066942

Training Deep Convolutional Neural Networks with Resistive Cross-Point Devices.

PubMed

Gokmen, Tayfun; Onen, Murat; Haensch, Wilfried

2017-01-01

In a previous work we have detailed the requirements for obtaining maximal deep learning performance benefit by implementing fully connected deep neural networks (DNN) in the form of arrays of resistive devices. Here we extend the concept of Resistive Processing Unit (RPU) devices to convolutional neural networks (CNNs). We show how to map the convolutional layers to fully connected RPU arrays such that the parallelism of the hardware can be fully utilized in all three cycles of the backpropagation algorithm. We find that the noise and bound limitations imposed by the analog nature of the computations performed on the arrays significantly affect the training accuracy of the CNNs. Noise and bound management techniques are presented that mitigate these problems without introducing any additional complexity in the analog circuits and that can be addressed by the digital circuits. In addition, we discuss digitally programmable update management and device variability reduction techniques that can be used selectively for some of the layers in a CNN. We show that a combination of all those techniques enables a successful application of the RPU concept for training CNNs. The techniques discussed here are more general and can be applied beyond CNN architectures and therefore enables applicability of the RPU approach to a large class of neural network architectures.

High-speed multiple sequence alignment on a reconfigurable platform.

PubMed

Oliver, Tim; Schmidt, Bertil; Maskell, Douglas; Nathan, Darran; Clemens, Ralf

2006-01-01

Progressive alignment is a widely used approach to compute multiple sequence alignments (MSAs). However, aligning several hundred sequences by popular progressive alignment tools requires hours on sequential computers. Due to the rapid growth of sequence databases biologists have to compute MSAs in a far shorter time. In this paper we present a new approach to MSA on reconfigurable hardware platforms to gain high performance at low cost. We have constructed a linear systolic array to perform pairwise sequence distance computations using dynamic programming. This results in an implementation with significant runtime savings on a standard FPGA.

Optical Design of Plant Canopy Measurement System and Fabrication of Two-Dimensional High-Speed Metal-Semiconductor-Metal Photodetector Arrays

NASA Technical Reports Server (NTRS)

Sarto, Anthony; VanZeghbroeck, Bart; Vanderbilt, Vern C.

1996-01-01

Electrical and optical designs for the prototype plant canopy architecture measurement system, including specified component and parts lists, are presented. Six single Metal-Semiconductor-Metal (MSM) detectors are mounted in high-speed packages.

High Density Shielded MEA / Optrode Arrays

NASA Astrophysics Data System (ADS)

Naughton, Jeff; Varela, Juan M.; Christianson, John P.; Chiles, Thomas C.; Burns, Michael J.; Naughton, Michael J.

We report on the development of a novel, high density, locally-shielded neuroelectronic / optoelectronic array architecture, useful for bioelectronics and neurophysiology. The device has been used in real time to noninvasively couple to leech neurons, allowing for extracellular recording of synaptic activity in the form of spontaneous synapse firing in pre- and post-synaptic somata. In addition, we show by subtly altering the architecture the ability for optical integration with the device - that is, it can function as both a local light delivery conduit and a recording electrode. We utilized this novel device to optically elicit and electrically record membrane currents in HEK293 cells transfected with plasmids encoding ChR2-YFP (i.e. optogenetics). Finally, we show that the local (Faraday) shield is effective in isolating the sensing area, so as to record only from cells in immediate proximity. This effective isolation or cross-talk suppression is important for moving closer to ``ground truth'' measurements of neurons, critical to the development of valid spike sorting algorithms.

A smart sensor architecture based on emergent computation in an array of outer-totalistic cells

NASA Astrophysics Data System (ADS)

Dogaru, Radu; Dogaru, Ioana; Glesner, Manfred

2005-06-01

A novel smart-sensor architecture is proposed, capable to segment and recognize characters in a monochrome image. It is capable to provide a list of ASCII codes representing the recognized characters from the monochrome visual field. It can operate as a blind's aid or for industrial applications. A bio-inspired cellular model with simple linear neurons was found the best to perform the nontrivial task of cropping isolated compact objects such as handwritten digits or characters. By attaching a simple outer-totalistic cell to each pixel sensor, emergent computation in the resulting cellular automata lattice provides a straightforward and compact solution to the otherwise computationally intensive problem of character segmentation. A simple and robust recognition algorithm is built in a compact sequential controller accessing the array of cells so that the integrated device can provide directly a list of codes of the recognized characters. Preliminary simulation tests indicate good performance and robustness to various distortions of the visual field.

Recent progress concerning the production of controlled highly oriented electrospun nanofibrous arrays

NASA Astrophysics Data System (ADS)

Manea, L. R.; Hristian, L.; Leon, A. L.; Popa, A.

2016-08-01

Among the foreground domains of all the research-development programs at national and international level, a special place is occupied by that concerning the nanosciences, nanotechnologies, new materials and technologies. Electrospinning found a well-deserved place in this space, offering the preparation of nanomaterials with distinctive properties and applications in medicine, environment, photonic sensors, filters, etc. These multiple applications are generated by the fact that the electrospinning technology makes available the production of nanofibers with controllable characteristics (length, porosity, density, and mechanical characteristics), complexity and architecture. The apparition of 3D printing technology favors the production of complex nanofibrous structures, controlled assembly, self-assembly of electrospun nanofibers for the production of scaffolds used in various medical applications. The architecture of fibrous deposits has a special influence on the subsequent development of the cells of the reconstructed organism. The present work proposes to study of recent progress concerning the production of controlled highly oriented electrospun nanofibrous arrays and progress in research on the production of complex 2D and 3D structures.

Wide-angle camera with multichannel architecture using microlenses on a curved surface.

PubMed

Liang, Wei-Lun; Shen, Hui-Kai; Su, Guo-Dung J

2014-06-10

We propose a multichannel imaging system that combines the principles of an insect's compound eye and the human eye. The optical system enables a reduction in track length of the imaging device to achieve miniaturization. The multichannel structure is achieved by a curved microlens array, and a Hypergon lens is used as the main lens to simulate the human eye, achieving large field of view (FOV). With this architecture, each microlens of the array transmits a segment of the overall FOV. The partial images are recorded in separate channels and stitched together to form the final image of the whole FOV by image processing. The design is 2.7 mm thick, with 59 channels; the 100°×80° full FOV is optimized using ZEMAX ray-tracing software on an image plane. The image plane size is 4.53  mm×3.29  mm. Given the recent progress in the fabrication of microlenses, this image system has the potential to be commercialized in the near future.

Prescribed nanoparticle cluster architectures and low-dimensional arrays built using octahedral DNA origami frames

DOE PAGES

Tian, Ye; Wang, Tong; Liu, Wenyan; ...

2015-05-25

Three-dimensional mesoscale clusters that are formed from nanoparticles spatially arranged in pre-determined positions can be thought of as mesoscale analogues of molecules. These nanoparticle architectures could offer tailored properties due to collective effects, but developing a general platform for fabricating such clusters is a significant challenge. Here, we report a strategy for assembling 3D nanoparticle clusters that uses a molecular frame designed with encoded vertices for particle placement. The frame is a DNA origami octahedron and can be used to fabricate clusters with various symmetries and particle compositions. Cryo-electron microscopy is used to uncover the structure of the DNA framemore » and to reveal that the nanoparticles are spatially coordinated in the prescribed manner. We show that the DNA frame and one set of nanoparticles can be used to create nanoclusters with different chiroptical activities. We also show that the octahedra can serve as programmable interparticle linkers, allowing one- and two-dimensional arrays to be assembled that have designed particle arrangements.« less

Hybrid micro-scale photovoltaics for enhanced energy conversion across all irradiation conditions

NASA Astrophysics Data System (ADS)

Agrawal, Gautam

A novel hybrid photovoltaics (HPV) architecture is presented that integrates high-performance micro-optics-based concentrator photovoltaics (CPV) array technology with a 1-sun photovoltaic (PV) cell within a low-profile panel structure. The approach simultaneously captures the direct solar radiation components with arrayed high-efficiency CPV cells and the diffuse solar components with an underlying wide-area PV cell. Performance analyses predict that the hybrid approach will significantly enhance the average energy produced per unit area for the full range of diffuse/direct radiation patterns across the USA. Furthermore, cost analyses indicate that the hybrid concept may be financially attractive for a wide range of locations. Indoor and outdoor experimental evaluation of a micro-optical system designed for use in a hybrid architecture verified that a large proportion of the direct radiation component was concentrated onto emulated micro-cell regions while most of the diffuse radiation and the remaining direct radiation was collected in the 1-sun cell area.

Digital quantum simulators in a scalable architecture of hybrid spin-photon qubits

PubMed Central

Chiesa, Alessandro; Santini, Paolo; Gerace, Dario; Raftery, James; Houck, Andrew A.; Carretta, Stefano

2015-01-01

Resolving quantum many-body problems represents one of the greatest challenges in physics and physical chemistry, due to the prohibitively large computational resources that would be required by using classical computers. A solution has been foreseen by directly simulating the time evolution through sequences of quantum gates applied to arrays of qubits, i.e. by implementing a digital quantum simulator. Superconducting circuits and resonators are emerging as an extremely promising platform for quantum computation architectures, but a digital quantum simulator proposal that is straightforwardly scalable, universal, and realizable with state-of-the-art technology is presently lacking. Here we propose a viable scheme to implement a universal quantum simulator with hybrid spin-photon qubits in an array of superconducting resonators, which is intrinsically scalable and allows for local control. As representative examples we consider the transverse-field Ising model, a spin-1 Hamiltonian, and the two-dimensional Hubbard model and we numerically simulate the scheme by including the main sources of decoherence. PMID:26563516

Prescribed nanoparticle cluster architectures and low-dimensional arrays built using octahedral DNA origami frames

NASA Astrophysics Data System (ADS)

Tian, Ye; Wang, Tong; Liu, Wenyan; Xin, Huolin L.; Li, Huilin; Ke, Yonggang; Shih, William M.; Gang, Oleg

2015-07-01

Three-dimensional mesoscale clusters that are formed from nanoparticles spatially arranged in pre-determined positions can be thought of as mesoscale analogues of molecules. These nanoparticle architectures could offer tailored properties due to collective effects, but developing a general platform for fabricating such clusters is a significant challenge. Here, we report a strategy for assembling three-dimensional nanoparticle clusters that uses a molecular frame designed with encoded vertices for particle placement. The frame is a DNA origami octahedron and can be used to fabricate clusters with various symmetries and particle compositions. Cryo-electron microscopy is used to uncover the structure of the DNA frame and to reveal that the nanoparticles are spatially coordinated in the prescribed manner. We show that the DNA frame and one set of nanoparticles can be used to create nanoclusters with different chiroptical activities. We also show that the octahedra can serve as programmable interparticle linkers, allowing one- and two-dimensional arrays to be assembled with designed particle arrangements.

CMOS minimal array

NASA Astrophysics Data System (ADS)

Janesick, James; Cheng, John; Bishop, Jeanne; Andrews, James T.; Tower, John; Walker, Jeff; Grygon, Mark; Elliot, Tom

2006-08-01

A high performance prototype CMOS imager is introduced. Test data is reviewed for different array formats that utilize 3T photo diode, 5T pinned photo diode and 6T photo gate CMOS pixel architectures. The imager allows several readout modes including progressive scan, snap and windowed operation. The new imager is built on different silicon substrates including very high resistivity epitaxial wafers for deep depletion operation. Data products contained in this paper focus on sensor's read noise, charge capacity, charge transfer efficiency, thermal dark current, RTS dark spikes, QE, pixel cross- talk and on-chip analog circuitry performance.

Electronic neural network for solving traveling salesman and similar global optimization problems

NASA Technical Reports Server (NTRS)

Thakoor, Anilkumar P. (Inventor); Moopenn, Alexander W. (Inventor); Duong, Tuan A. (Inventor); Eberhardt, Silvio P. (Inventor)

1993-01-01

This invention is a novel high-speed neural network based processor for solving the 'traveling salesman' and other global optimization problems. It comprises a novel hybrid architecture employing a binary synaptic array whose embodiment incorporates the fixed rules of the problem, such as the number of cities to be visited. The array is prompted by analog voltages representing variables such as distances. The processor incorporates two interconnected feedback networks, each of which solves part of the problem independently and simultaneously, yet which exchange information dynamically.

Feedforward, high density, programmable read only neural network based memory system

NASA Technical Reports Server (NTRS)

Daud, Taher; Moopenn, Alex; Lamb, James; Thakoor, Anil; Khanna, Satish

1988-01-01

Neural network-inspired, nonvolatile, programmable associative memory using thin-film technology is demonstrated. The details of the architecture, which uses programmable resistive connection matrices in synaptic arrays and current summing and thresholding amplifiers as neurons, are described. Several synapse configurations for a high-density array of a binary connection matrix are also described. Test circuits are evaluated for operational feasibility and to demonstrate the speed of the read operation. The results are discussed to highlight the potential for a read data rate exceeding 10 megabits/sec.

Indium Hybridization of Large Format TES Bolometer Arrays to Readout Multiplexers for Far-Infrared Astronomy

NASA Technical Reports Server (NTRS)

Miller, Timothy M.; Costen, Nick; Allen, Christine

2007-01-01

The advance of new detector technologies combined with enhanced fabrication methods has resulted in an increase in development of large format arrays. The next generation of scientific instruments will utilize detectors containing hundreds to thousands of elements providing a more efficient means to conduct large area sky surveys. Some notable detectors include a 32x32 x-ray microcalorimeter for Constellation-X, an infrared bolometer called SAFIRE to fly on the airborne observatory SOFIA, and the sub-millimeter bolometer SCUBA-2 to be deployed at the JCMT which will use more than 10,000 elements for two colors, each color using four 32x40 arrays. Of these detectors, SCUBA-2 is farthest along in development and uses indium hybridization to multiplexers for readout of the large number of elements, a technology that will be required to enable the next generation of large format arrays. Our current efforts in working toward large format arrays have produced GISMO, the Goddard IRAM Superconducting 2-Millimeter observer. GISMO is a far infrared instrument to be field tested later this year at the IRAM 30 meter telescope in Spain. GISMO utilizes transition edge sensor (TES) technology in an 8x16 filled array format that allows for typical fan-out wiring and wire-bonding to four 1x32 NIST multiplexers. GISMO'S electrical wiring is routed along the tops of 30 micron walls which also serve as the mechanical framework for the array. This architecture works well for the 128 element array, but is approaching the limit for routing the necessary wires along the surface while maintaining a high fill factor. Larger format arrays will benefit greatly from making electrical connections through the wafer to the backside, where they can be hybridized to a read-out substrate tailored to handling the wiring scheme. The next generation array we are developing is a 32x40 element array on a pitch of 1135 microns that conforms to the NIST multiplexer, already developed for the SCUBA-2 instrument This architecture will utilize electrical connections that route from the TES to the support frame and through the wafer. The detector chip will then be hybridized to the NIST multiplexer via indium bump bonding. In our development scheme we are using substrates that allow for diagnostic testing of electrical continuity across the entire array and we are testing our process to minimize or eliminate any contact resistance at metal interfaces. Our goal is hybridizing a fully functional 32x40 array of TES bolometers to a NIST multiplexer. The following work presents our current progress toward enabling this technology.

Energy-efficient STDP-based learning circuits with memristor synapses

NASA Astrophysics Data System (ADS)

Wu, Xinyu; Saxena, Vishal; Campbell, Kristy A.

2014-05-01

It is now accepted that the traditional von Neumann architecture, with processor and memory separation, is ill suited to process parallel data streams which a mammalian brain can efficiently handle. Moreover, researchers now envision computing architectures which enable cognitive processing of massive amounts of data by identifying spatio-temporal relationships in real-time and solving complex pattern recognition problems. Memristor cross-point arrays, integrated with standard CMOS technology, are expected to result in massively parallel and low-power Neuromorphic computing architectures. Recently, significant progress has been made in spiking neural networks (SNN) which emulate data processing in the cortical brain. These architectures comprise of a dense network of neurons and the synapses formed between the axons and dendrites. Further, unsupervised or supervised competitive learning schemes are being investigated for global training of the network. In contrast to a software implementation, hardware realization of these networks requires massive circuit overhead for addressing and individually updating network weights. Instead, we employ bio-inspired learning rules such as the spike-timing-dependent plasticity (STDP) to efficiently update the network weights locally. To realize SNNs on a chip, we propose to use densely integrating mixed-signal integrate-andfire neurons (IFNs) and cross-point arrays of memristors in back-end-of-the-line (BEOL) of CMOS chips. Novel IFN circuits have been designed to drive memristive synapses in parallel while maintaining overall power efficiency (<1 pJ/spike/synapse), even at spike rate greater than 10 MHz. We present circuit design details and simulation results of the IFN with memristor synapses, its response to incoming spike trains and STDP learning characterization.

Spatial mapping and statistical reproducibility of an array of 256 one-dimensional quantum wires

NASA Astrophysics Data System (ADS)

Al-Taie, H.; Smith, L. W.; Lesage, A. A. J.; See, P.; Griffiths, J. P.; Beere, H. E.; Jones, G. A. C.; Ritchie, D. A.; Kelly, M. J.; Smith, C. G.

2015-08-01

We utilize a multiplexing architecture to measure the conductance properties of an array of 256 split gates. We investigate the reproducibility of the pinch off and one-dimensional definition voltage as a function of spatial location on two different cooldowns, and after illuminating the device. The reproducibility of both these properties on the two cooldowns is high, the result of the density of the two-dimensional electron gas returning to a similar state after thermal cycling. The spatial variation of the pinch-off voltage reduces after illumination; however, the variation of the one-dimensional definition voltage increases due to an anomalous feature in the center of the array. A technique which quantifies the homogeneity of split-gate properties across the array is developed which captures the experimentally observed trends. In addition, the one-dimensional definition voltage is used to probe the density of the wafer at each split gate in the array on a micron scale using a capacitive model.

Optical techniques to feed and control GaAs MMIC modules for phased array antenna applications

NASA Astrophysics Data System (ADS)

Bhasin, K. B.; Anzic, G.; Kunath, R. R.; Connolly, D. J.

A complex signal distribution system is required to feed and control GaAs monolithic microwave integrated circuits (MMICs) for phased array antenna applications above 20 GHz. Each MMIC module will require one or more RF lines, one or more bias voltage lines, and digital lines to provide a minimum of 10 bits of combined phase and gain control information. In a closely spaced array, the routing of these multiple lines presents difficult topology problems as well as a high probability of signal interference. To overcome GaAs MMIC phased array signal distribution problems optical fibers interconnected to monolithically integrated optical components with GaAs MMIC array elements are proposed as a solution. System architecture considerations using optical fibers are described. The analog and digital optical links to respectively feed and control MMIC elements are analyzed. It is concluded that a fiber optic network will reduce weight and complexity, and increase reliability and performance, but higher power will be required.

Optical techniques to feed and control GaAs MMIC modules for phased array antenna applications

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Anzic, G.; Kunath, R. R.; Connolly, D. J.

1986-01-01

A complex signal distribution system is required to feed and control GaAs monolithic microwave integrated circuits (MMICs) for phased array antenna applications above 20 GHz. Each MMIC module will require one or more RF lines, one or more bias voltage lines, and digital lines to provide a minimum of 10 bits of combined phase and gain control information. In a closely spaced array, the routing of these multiple lines presents difficult topology problems as well as a high probability of signal interference. To overcome GaAs MMIC phased array signal distribution problems optical fibers interconnected to monolithically integrated optical components with GaAs MMIC array elements are proposed as a solution. System architecture considerations using optical fibers are described. The analog and digital optical links to respectively feed and control MMIC elements are analyzed. It is concluded that a fiber optic network will reduce weight and complexity, and increase reliability and performance, but higher power will be required.

Hierarchical sinuous-antenna phased array for millimeter wavelengths

NASA Astrophysics Data System (ADS)

Cukierman, Ari; Lee, Adrian T.; Raum, Christopher; Suzuki, Aritoki; Westbrook, Benjamin

2018-03-01

We present the design, fabrication, and measured performance of a hierarchical sinuous-antenna phased array coupled to superconducting transition-edge-sensor (TES) bolometers for millimeter wavelengths. The architecture allows for dual-polarization wideband sensitivity with a beam width that is approximately frequency-independent. We report on measurements of a prototype device, which uses three levels of triangular phased arrays to synthesize beams that are approximately constant in width across three frequency bands covering a 3:1 bandwidth. The array element is a lens-coupled sinuous antenna. The device consists of an array of hemispherical lenses coupled to a lithographed wafer, which integrates TESs, planar sinuous antennas, and microwave circuitry including band-defining filters. The approximately frequency-independent beam widths improve coupling to telescope optics and keep the sensitivity of an experiment close to optimal across a broad frequency range. The design can be straightforwardly modified for use with non-TES lithographed cryogenic detectors such as kinetic inductance detectors. Additionally, we report on the design and measurements of a broadband 180° hybrid that can simplify the design of future multichroic focal planes including but not limited to hierarchical phased arrays.

Optimizing the beam pattern of a forward-viewing ring-annular ultrasound array for intravascular imaging.

PubMed

Wang, Yao; Stephens, Douglas N; O'Donnell, Matthew

2002-12-01

Intravascular ultrasound (IVUS) imaging systems using circumferential arrays mounted on cardiac catheter tips fire beams orthogonal to the principal axis of the catheter. The system produces high resolution cross-sectional images but must be guided by conventional angioscopy. A real-time forward-viewing array, integrated into the same catheter, could greatly reduce radiation exposure by decreasing angiographic guidance. Unfortunately, the mounting requirement of a catheter guide wire prohibits a full-disk imaging aperture. Given only an annulus of array elements, prior theoretical investigations have only considered a circular ring of point transceivers and focusing strategies using all elements in the highly dense array, both impractical assumptions. In this paper, we consider a practical array geometry and signal processing architecture for a forward-viewing IVUS system. Our specific design uses a total of 210 transceiver firings with synthetic reconstruction for a given 3-D image frame. Simulation results demonstrate this design can achieve side-lobes under -40 dB for on-axis situations and under -30 dB for steering to the edge of a 80 degrees cone.

Template-based preparation of free-standing semiconducting polymeric nanorod arrays on conductive substrates.

PubMed

Haberkorn, Niko; Weber, Stefan A L; Berger, Rüdiger; Theato, Patrick

2010-06-01

We describe the synthesis and characterization of a cross-linkable siloxane-derivatized tetraphenylbenzidine (DTMS-TPD), which was used for the fabrication of semiconducting highly ordered nanorod arrays on conductive indium tin oxide or Pt-coated substrates. The stepwise process allow fabricating of macroscopic areas of well-ordered free-standing nanorod arrays, which feature a high resistance against organic solvents, semiconducting properties and a good adhesion to the substrate. Thin films of the TPD derivate with good hole-conducting properties could be prepared by cross-linking and covalently attaching to hydroxylated substrates utilizing an initiator-free thermal curing at 160 degrees C. The nanorod arrays composed of cross-linked DTMS-TPD were fabricated by an anodic aluminum oxide (AAO) template approach. Furthermore, the nanorod arrays were investigated by a recently introduced method allowing to probe local conductivity on fragile structures. It revealed that more than 98% of the nanorods exhibit electrical conductance and consequently feature a good electrical contact to the substrate. The prepared nanorod arrays have the potential to find application in the fabrication of multilayered device architectures for building well-ordered bulk-heterojunction solar cells.

Solar Power System Analyses for Electric Propulsion Missions

NASA Technical Reports Server (NTRS)

Kerslake, Thomas W.; Gefert, Leon P.

1999-01-01

Solar electric propulsion (SEP) mission architectures are applicable to a wide range of NASA missions including human Mars exploration and robotic exploration of the outer planets. In this paper, we discuss the conceptual design and detailed performance analysis of an SEP stage electric power system (EPS). EPS performance, mass and area predictions are compared for several PV array technologies. Based on these studies, an EPS design for a 1-MW class, Human Mars Mission SEP stage was developed with a reasonable mass, 9.4 metric tons, and feasible deployed array area, 5800 sq m. An EPS was also designed for the Europa Mapper spacecraft and had a mass of 151 kg and a deployed array area of 106 sq m.

Synthesis of water-soluble mono- and ditopic imidazoliums for carbene ligands

DOE Office of Scientific and Technical Information (OSTI.GOV)

Anstey, Mitchell; Murtagh, Dustin; Cordaro, Joseph Gabriel

2015-09-01

Synthesis of ditopic imidazoliums was achieved using a modular step-wise procedure. The procedure itself is amenable to a wide array of functional groups that can be incorporated into the imidazolium architecture. The resulting compounds range from ditopic zwitterions to highly-soluble dicationic aromatics

Direct-write assembly of microperiodic planar and spanning ITO microelectrodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Bok Y; Lorang, David J; Duoss, Eric B.

2010-01-01

Printed Sn-doped In{sub 2}O{sub 3} (ITO) microelectrodes are fabricated by direct-write assembly of sol–gel inks with varying concentration. This maskless, non-lithographic approach provides a facile route to patterning transparent conductive features in planar arrays and spanning architectures.

SAR processing on the MPP

NASA Technical Reports Server (NTRS)

Batcher, K. E.; Eddey, E. E.; Faiss, R. O.; Gilmore, P. A.

1981-01-01

The processing of synthetic aperture radar (SAR) signals using the massively parallel processor (MPP) is discussed. The fast Fourier transform convolution procedures employed in the algorithms are described. The MPP architecture comprises an array unit (ARU) which processes arrays of data; an array control unit which controls the operation of the ARU and performs scalar arithmetic; a program and data management unit which controls the flow of data; and a unique staging memory (SM) which buffers and permutes data. The ARU contains a 128 by 128 array of bit-serial processing elements (PE). Two-by-four surarrays of PE's are packaged in a custom VLSI HCMOS chip. The staging memory is a large multidimensional-access memory which buffers and permutes data flowing with the system. Efficient SAR processing is achieved via ARU communication paths and SM data manipulation. Real time processing capability can be realized via a multiple ARU, multiple SM configuration.

Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array

NASA Astrophysics Data System (ADS)

Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; González, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C. A.; Valiente-Dobón, J. J.

2015-12-01

In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.530/00 at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs.

Argus: A W-band 16-pixel focal plane array for the Green Bank Telescope

NASA Astrophysics Data System (ADS)

Devaraj, Kiruthika; Church, Sarah; Cleary, Kieran; Frayer, David; Gawande, Rohit; Goldsmith, Paul; Gundersen, Joshua; Harris, Andrew; Kangaslahti, Pekka; Readhead, Tony; Reeves, Rodrigo; Samoska, Lorene; Sieth, Matt; Voll, Patricia

2015-05-01

We are building Argus, a 16-pixel square-packed focal plane array that will cover the 75-115.3 GHz frequency range on the Robert C. Byrd Green Bank Telescope (GBT). The primary research area for Argus is the study of star formation within our Galaxy and nearby galaxies. Argus will map key molecules that trace star formation, including carbon monoxide (CO) and hydrogen cyanide (HCN). An additional key science area is astrochemistry, which will be addressed by observing complex molecules in the interstellar medium, and the study of formation of solar systems, which will be addressed by identifying dense pre-stellar cores and by observing comets in our solar system. Argus has a highly scalable architecture and will be a technology path finder for larger arrays. The array is modular in construction, which will allow easy replacement of malfunctioning and poorly performing components.

High Operating Temperature Barrier Infrared Detector with Tailorable Cutoff Wavelength

NASA Technical Reports Server (NTRS)

Ting, David Z. (Inventor); Hill, Cory J. (Inventor); Seibel, Alexander (Inventor); Bandara, Sumith Y. (Inventor); Gunapala, Sarath D. (Inventor)

2015-01-01

A barrier infrared detector with absorber materials having selectable cutoff wavelengths and its method of manufacture is described. A GaInAsSb absorber layer may be grown on a GaSb substrate layer formed by mixing GaSb and InAsSb by an absorber mixing ratio. A GaAlAsSb barrier layer may then be grown on the barrier layer formed by mixing GaSb and AlSbAs by a barrier mixing ratio. The absorber mixing ratio may be selected to adjust a band gap of the absorber layer and thereby determine a cutoff wavelength for the barrier infrared detector. The absorber mixing ratio may vary along an absorber layer growth direction. Various contact layer architectures may be used. In addition, a top contact layer may be isolated into an array of elements electrically isolated as individual functional detectors that may be used in a detector array, imaging array, or focal plane array.

IOTA: the array controller for a gigapixel OTCCD camera for Pan-STARRS

NASA Astrophysics Data System (ADS)

Onaka, Peter; Tonry, John; Luppino, Gerard; Lockhart, Charles; Lee, Aaron; Ching, Gregory; Isani, Sidik; Uyeshiro, Robin

2004-09-01

The PanSTARRS project has undertaken an ambitious effort to develop a completely new array controller architecture that is fundamentally driven by the large 1gigapixel, low noise, high speed OTCCD mosaic requirements as well as the size, power and weight restrictions of the PanSTARRS telescope. The result is a very small form factor next generation controller scalar building block with 1 Gigabit Ethernet interfaces that will be assembled into a system that will readout 512 outputs at ~1 Megapixel sample rates on each output. The paper will also discuss critical technology and fabrication techniques such as greater than 1MHz analog to digital converters (ADCs), multiple fast sampling and digital calculation of multiple correlated samples (DMCS), ball grid array (BGA) packaged circuits, LINUX running on embedded field programmable gate arrays (FPGAs) with hard core microprocessors for the prototype currently being developed.

Monolithic short wave infrared (SWIR) detector array

NASA Technical Reports Server (NTRS)

1983-01-01

A monolithic self-scanned linear detector array was developed for remote sensing in the 1.1- 2.4-micron spectral region. A high-density IRCCD test chip was fabricated to verify new design approaches required for the detector array. The driving factors in the Schottky barrier IRCCD (Pdsub2Si) process development are the attainment of detector yield, uniformity, adequate quantum efficiency, and lowest possible dark current consistent with radiometric accuracy. A dual-band module was designed that consists of two linear detector arrays. The sensor architecture places the floating diffusion output structure in the middle of the chip, away from the butt edges. A focal plane package was conceptualized and includes a polycrystalline silicon substrate carrying a two-layer, thick-film interconnecting conductor pattern and five epoxy-mounted modules. A polycrystalline silicon cover encloses the modules and bond wires, and serves as a radiation and EMI shield, thermal conductor, and contamination seal.

An Energy-Efficient and High-Quality Video Transmission Architecture in Wireless Video-Based Sensor Networks.

PubMed

Aghdasi, Hadi S; Abbaspour, Maghsoud; Moghadam, Mohsen Ebrahimi; Samei, Yasaman

2008-08-04

Technological progress in the fields of Micro Electro-Mechanical Systems (MEMS) and wireless communications and also the availability of CMOS cameras, microphones and small-scale array sensors, which may ubiquitously capture multimedia content from the field, have fostered the development of low-cost limited resources Wireless Video-based Sensor Networks (WVSN). With regards to the constraints of videobased sensor nodes and wireless sensor networks, a supporting video stream is not easy to implement with the present sensor network protocols. In this paper, a thorough architecture is presented for video transmission over WVSN called Energy-efficient and high-Quality Video transmission Architecture (EQV-Architecture). This architecture influences three layers of communication protocol stack and considers wireless video sensor nodes constraints like limited process and energy resources while video quality is preserved in the receiver side. Application, transport, and network layers are the layers in which the compression protocol, transport protocol, and routing protocol are proposed respectively, also a dropping scheme is presented in network layer. Simulation results over various environments with dissimilar conditions revealed the effectiveness of the architecture in improving the lifetime of the network as well as preserving the video quality.

Strategies for P2P connectivity in reconfigurable converged wired/wireless access networks.

PubMed

Puerto, Gustavo; Mora, José; Ortega, Beatriz; Capmany, José

2010-12-06

This paper presents different strategies to define the architecture of a Radio-Over-Fiber (RoF) Access networks enabling Peer-to-Peer (P2P) functionalities. The architectures fully exploit the flexibility of a wavelength router based on the feedback configuration of an Arrayed Waveguide Grating (AWG) and an optical switch to broadcast P2P services among diverse infrastructures featuring dynamic channel allocation and enabling an optical platform for 3G and beyond wireless backhaul requirements. The first architecture incorporates a tunable laser to generate a dedicated wavelength for P2P purposes and the second architecture takes advantage of reused wavelengths to enable the P2P connectivity among Optical Network Units (ONUs) or Base Stations (BS). While these two approaches allow the P2P connectivity in a one at a time basis (1:1), the third architecture enables the broadcasting of P2P sessions among different ONUs or BSs at the same time (1:M). Experimental assessment of the proposed architecture shows approximately 0.6% Error Vector Magnitude (EVM) degradation for wireless services and 1 dB penalty in average for 1 x 10(-12) Bit Error Rate (BER) for wired baseband services.

A learnable parallel processing architecture towards unity of memory and computing

NASA Astrophysics Data System (ADS)

Li, H.; Gao, B.; Chen, Z.; Zhao, Y.; Huang, P.; Ye, H.; Liu, L.; Liu, X.; Kang, J.

2015-08-01

Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named “iMemComp”, where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped “iMemComp” with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on “iMemComp” can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

Efficient architecture for spike sorting in reconfigurable hardware.

PubMed

Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

2013-11-01

This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation.

A learnable parallel processing architecture towards unity of memory and computing.

PubMed

Li, H; Gao, B; Chen, Z; Zhao, Y; Huang, P; Ye, H; Liu, L; Liu, X; Kang, J

2015-08-14

Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named "iMemComp", where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped "iMemComp" with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on "iMemComp" can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

Large Format, Background Limited Arrays of Kinetic Inductance Detectors for Sub-mm Astronomy

NASA Astrophysics Data System (ADS)

Baselmans, Jochem

2018-01-01

We present the development of large format imaging arrays for sub-mm astronomy based upon microwave Kinetic Inductance detectors and their read-out. In particular we focus on the arrays developed for the A-MKID instrument for the APEX telescope. AMKID contains 2 focal plane arrays, covering a field of view of 15?x15?. One array is optimized for the 350 GHz telluric window, the other for the 850 GHz window. Both arrays are constructed from four 61 x 61 mm detector chips, each of which contains up to 3400 detectors and up to 880 detectors per readout line. The detectors are lens antenna coupled MKIDs made from NbTiN and Aluminium that reach photon noise limited sensitivity in combination with a high optical coupling. The lens-antenna radiation coupling enables the use of 4K optics and Lyot stop due to the intrinsic directivity of the detector beam, allowing a simple cryogenic architecture. We discuss the pixel design and verification, detector packaging and the array performance. We will also discuss the readout system, which is a combination of a digital and analog back-end that can read-out up to 4000 pixels simultaneously using frequency division multiplexing.

A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching.

PubMed

Huang, Jingjin; Zhou, Guoqing; Zhou, Xiang; Zhang, Rongting

2018-03-28

Although some researchers have proposed the Field Programmable Gate Array (FPGA) architectures of Feature From Accelerated Segment Test (FAST) and Binary Robust Independent Elementary Features (BRIEF) algorithm, there is no consideration of image data storage in these traditional architectures that will result in no image data that can be reused by the follow-up algorithms. This paper proposes a new FPGA architecture that considers the reuse of sub-image data. In the proposed architecture, a remainder-based method is firstly designed for reading the sub-image, a FAST detector and a BRIEF descriptor are combined for corner detection and matching. Six pairs of satellite images with different textures, which are located in the Mentougou district, Beijing, China, are used to evaluate the performance of the proposed architecture. The Modelsim simulation results found that: (i) the proposed architecture is effective for sub-image reading from DDR3 at a minimum cost; (ii) the FPGA implementation is corrected and efficient for corner detection and matching, such as the average value of matching rate of natural areas and artificial areas are approximately 67% and 83%, respectively, which are close to PC's and the processing speed by FPGA is approximately 31 and 2.5 times faster than those by PC processing and by GPU processing, respectively.

Criteria for Evaluating Alternative Network and Link Layer Protocols for the NASA Constellation Program Communication Architecture

NASA Technical Reports Server (NTRS)

Benbenek, Daniel; Soloff, Jason; Lieb, Erica

2010-01-01

Selecting a communications and network architecture for future manned space flight requires an evaluation of the varying goals and objectives of the program, development of communications and network architecture evaluation criteria, and assessment of critical architecture trades. This paper uses Cx Program proposed exploration activities as a guideline; lunar sortie, outpost, Mars, and flexible path options are described. A set of proposed communications network architecture criteria are proposed and described. They include: interoperability, security, reliability, and ease of automating topology changes. Finally a key set of architecture options are traded including (1) multiplexing data at a common network layer vs. at the data link layer, (2) implementing multiple network layers vs. a single network layer, and (3) the use of a particular network layer protocol, primarily IPv6 vs. Delay Tolerant Networking (DTN). In summary, the protocol options are evaluated against the proposed exploration activities and their relative performance with respect to the criteria are assessed. An architectural approach which includes (a) the capability of multiplexing at both the network layer and the data link layer and (b) a single network layer for operations at each program phase, as these solutions are best suited to respond to the widest array of program needs and meet each of the evaluation criteria.

Actuation mechanisms of carbon nanotube-based architectures

NASA Astrophysics Data System (ADS)

Geier, Sebastian; Mahrholz, Thorsten; Wierach, Peter; Sinapius, Michael

2016-04-01

State of the art smart materials such as piezo ceramics or electroactive polymers cannot feature both, mechanical stiffness and high active strain. Moreover, properties like low density, high mechanical stiffness and high strain at the same time driven by low energy play an increasingly important role for their future application. Carbon nanotubes (CNT), show this behavior. Their active behavior was observed 1999 the first time using paper-like mats made of CNT. Therefore the CNT-papers are electrical charged within an electrolyte thus forming a double- layer. The measured deflection of CNT material is based on the interaction between the charged high surface area formed by carbon nanotubes and ions provided by the electrolyte. Although CNT-papers have been extensively analyzed as well at the macro-scale as nano-scale there is still no generally accepted theory for the actuation mechanism. This paper focuses on investigations of the actuation mechanisms of CNT-papers in comparison to vertically aligned CNT-arrays. One reason of divergent results found in literature might be attributed to different types of CNT samples. While CNT-papers represent architectures of short CNTs which need to bridge each other to form the dimensions of the sample, the continuous CNTs of the array feature a length of almost 3 mm, along which the experiments are carried out. Both sample types are tested within an actuated tensile test set-up under different conditions. While the CNT-papers are tested in water-based electrolytes with comparably small redox-windows the hydrophobic CNT-arrays are tested in ionic liquids with comparatively larger redox-ranges. Furthermore an in-situ micro tensile test within an SEM is carried out to prove the optimized orientation of the MWCNTs as result of external load. It was found that the performance of CNT-papers strongly depends on the test conditions. However, the CNT-arrays are almost unaffected by the conditions showing active response at negative and positive voltages. A micro alignment as result of tensile stress can be proven. A comparison of both results point out that the actuation mechanism strongly depends on the weakest bonds of the architectures: Van-der-Waals-bonds vs. covalent C-bonds.

Architecture for fiber-optic sensors and actuators in aircraft propulsion systems

NASA Technical Reports Server (NTRS)

Glomb, W. L., Jr.

1990-01-01

This paper describes a design for fiber-optic sensing and control in advanced aircraft Electronic Engine Control (EEC). The recommended architecture is an on-engine EEC which contains electro-optic interface circuits for fiber-optic sensors. Size and weight are reduced by multiplexing arrays of functionally similar sensors on a pairs of optical fibers to common electro-optical interfaces. The architecture contains interfaces to seven sensor groups. Nine distinct fiber-optic sensor types were found to provide the sensing functions. Analysis revealed no strong discriminator (except reliability of laser diodes and remote electronics) on which to base a selection of preferred common interface type. A hardware test program is recommended to assess the relative maturity of the technologies and to determine real performance in the engine environment.

Particle Based Simulations of Complex Systems with MP2C : Hydrodynamics and Electrostatics

NASA Astrophysics Data System (ADS)

Sutmann, Godehard; Westphal, Lidia; Bolten, Matthias

2010-09-01

Particle based simulation methods are well established paths to explore system behavior on microscopic to mesoscopic time and length scales. With the development of new computer architectures it becomes more and more important to concentrate on local algorithms which do not need global data transfer or reorganisation of large arrays of data across processors. This requirement strongly addresses long-range interactions in particle systems, i.e. mainly hydrodynamic and electrostatic contributions. In this article, emphasis is given to the implementation and parallelization of the Multi-Particle Collision Dynamics method for hydrodynamic contributions and a splitting scheme based on Multigrid for electrostatic contributions. Implementations are done for massively parallel architectures and are demonstrated for the IBM Blue Gene/P architecture Jugene in Jülich.

Uncooled Terahertz real-time imaging 2D arrays developed at LETI: present status and perspectives

NASA Astrophysics Data System (ADS)

Simoens, François; Meilhan, Jérôme; Dussopt, Laurent; Nicolas, Jean-Alain; Monnier, Nicolas; Sicard, Gilles; Siligaris, Alexandre; Hiberty, Bruno

2017-05-01

As for other imaging sensor markets, whatever is the technology, the commercial spread of terahertz (THz) cameras has to fulfil simultaneously the criteria of high sensitivity and low cost and SWAP (size, weight and power). Monolithic silicon-based 2D sensors integrated in uncooled THz real-time cameras are good candidates to meet these requirements. Over the past decade, LETI has been studying and developing such arrays with two complimentary technological approaches, i.e. antenna-coupled silicon bolometers and CMOS Field Effect Transistors (FET), both being compatible to standard silicon microelectronics processes. LETI has leveraged its know-how in thermal infrared bolometer sensors in developing a proprietary architecture for THz sensing. High technological maturity has been achieved as illustrated by the demonstration of fast scanning of large field of view and the recent birth of a commercial camera. In the FET-based THz field, recent works have been focused on innovative CMOS read-out-integrated circuit designs. The studied architectures take advantage of the large pixel pitch to enhance the flexibility and the sensitivity: an embedded in-pixel configurable signal processing chain dramatically reduces the noise. Video sequences at 100 frames per second using our 31x31 pixels 2D Focal Plane Arrays (FPA) have been achieved. The authors describe the present status of these developments and perspectives of performance evolutions are discussed. Several experimental imaging tests are also presented in order to illustrate the capabilities of these arrays to address industrial applications such as non-destructive testing (NDT), security or quality control of food.

Multiple-Event, Single-Photon Counting Imaging Sensor

NASA Technical Reports Server (NTRS)

Zheng, Xinyu; Cunningham, Thomas J.; Sun, Chao; Wang, Kang L.

2011-01-01

The single-photon counting imaging sensor is typically an array of silicon Geiger-mode avalanche photodiodes that are monolithically integrated with CMOS (complementary metal oxide semiconductor) readout, signal processing, and addressing circuits located in each pixel and the peripheral area of the chip. The major problem is its single-event method for photon count number registration. A single-event single-photon counting imaging array only allows registration of up to one photon count in each of its pixels during a frame time, i.e., the interval between two successive pixel reset operations. Since the frame time can t be too short, this will lead to very low dynamic range and make the sensor merely useful for very low flux environments. The second problem of the prior technique is a limited fill factor resulting from consumption of chip area by the monolithically integrated CMOS readout in pixels. The resulting low photon collection efficiency will substantially ruin any benefit gained from the very sensitive single-photon counting detection. The single-photon counting imaging sensor developed in this work has a novel multiple-event architecture, which allows each of its pixels to register as more than one million (or more) photon-counting events during a frame time. Because of a consequently boosted dynamic range, the imaging array of the invention is capable of performing single-photon counting under ultra-low light through high-flux environments. On the other hand, since the multiple-event architecture is implemented in a hybrid structure, back-illumination and close-to-unity fill factor can be realized, and maximized quantum efficiency can also be achieved in the detector array.

A microsensor array for quantification of lubricant contaminants using a back propagation artificial neural network

NASA Astrophysics Data System (ADS)

Zhu, Xiaoliang; Du, Li; Liu, Bendong; Zhe, Jiang

2016-06-01

We present a method based on an electrochemical sensor array and a back propagation artificial neural network for detection and quantification of four properties of lubrication oil, namely water (0, 500 ppm, 1000 ppm), total acid number (TAN) (13.1, 13.7, 14.4, 15.6 mg KOH g-1), soot (0, 1%, 2%, 3%) and sulfur content (1.3%, 1.37%, 1.44%, 1.51%). The sensor array, consisting of four micromachined electrochemical sensors, detects the four properties with overlapping sensitivities. A total set of 36 oil samples containing mixtures of water, soot, and sulfuric acid with different concentrations were prepared for testing. The sensor array’s responses were then divided to three sets: training sets (80% data), validation sets (10%) and testing sets (10%). Several back propagation artificial neural network architectures were trained with the training and validation sets; one architecture with four input neurons, 50 and 5 neurons in the first and second hidden layer, and four neurons in the output layer was selected. The selected neural network was then tested using the four sets of testing data (10%). Test results demonstrated that the developed artificial neural network is able to quantitatively determine the four lubrication properties (water, TAN, soot, and sulfur content) with a maximum prediction error of 18.8%, 6.0%, 6.7%, and 5.4%, respectively, indicting a good match between the target and predicted values. With the developed network, the sensor array could be potentially used for online lubricant oil condition monitoring.

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph; Mortensen, Dale

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. The extension of STRS to the SSP hardware will promote easier waveform reconfiguration and reuse. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. A FPGA-based transmit waveform implementation of the proposed standard interfaces on a laboratory breadboard SDR will be discussed.

A 181 GOPS AKAZE Accelerator Employing Discrete-Time Cellular Neural Networks for Real-Time Feature Extraction.

PubMed

Jiang, Guangli; Liu, Leibo; Zhu, Wenping; Yin, Shouyi; Wei, Shaojun

2015-09-04

This paper proposes a real-time feature extraction VLSI architecture for high-resolution images based on the accelerated KAZE algorithm. Firstly, a new system architecture is proposed. It increases the system throughput, provides flexibility in image resolution, and offers trade-offs between speed and scaling robustness. The architecture consists of a two-dimensional pipeline array that fully utilizes computational similarities in octaves. Secondly, a substructure (block-serial discrete-time cellular neural network) that can realize a nonlinear filter is proposed. This structure decreases the memory demand through the removal of data dependency. Thirdly, a hardware-friendly descriptor is introduced in order to overcome the hardware design bottleneck through the polar sample pattern; a simplified method to realize rotation invariance is also presented. Finally, the proposed architecture is designed in TSMC 65 nm CMOS technology. The experimental results show a performance of 127 fps in full HD resolution at 200 MHz frequency. The peak performance reaches 181 GOPS and the throughput is double the speed of other state-of-the-art architectures.

SNAVA-A real-time multi-FPGA multi-model spiking neural network simulation architecture.

PubMed

Sripad, Athul; Sanchez, Giovanny; Zapata, Mireya; Pirrone, Vito; Dorta, Taho; Cambria, Salvatore; Marti, Albert; Krishnamourthy, Karthikeyan; Madrenas, Jordi

2018-01-01

Spiking Neural Networks (SNN) for Versatile Applications (SNAVA) simulation platform is a scalable and programmable parallel architecture that supports real-time, large-scale, multi-model SNN computation. This parallel architecture is implemented in modern Field-Programmable Gate Arrays (FPGAs) devices to provide high performance execution and flexibility to support large-scale SNN models. Flexibility is defined in terms of programmability, which allows easy synapse and neuron implementation. This has been achieved by using a special-purpose Processing Elements (PEs) for computing SNNs, and analyzing and customizing the instruction set according to the processing needs to achieve maximum performance with minimum resources. The parallel architecture is interfaced with customized Graphical User Interfaces (GUIs) to configure the SNN's connectivity, to compile the neuron-synapse model and to monitor SNN's activity. Our contribution intends to provide a tool that allows to prototype SNNs faster than on CPU/GPU architectures but significantly cheaper than fabricating a customized neuromorphic chip. This could be potentially valuable to the computational neuroscience and neuromorphic engineering communities. Copyright © 2017 Elsevier Ltd. All rights reserved.

Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications

PubMed Central

Tokuda, Takashi; Noda, Toshihiko; Sasagawa, Kiyotaka; Ohta, Jun

2010-01-01

In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS) image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors’ architecture on the basis of the type of electric measurement or imaging functionalities. PMID:28879978

Hierarchical Branched Vanadium Oxide Nanorod@Si Nanowire Architecture for High Performance Supercapacitors.

PubMed

Li, Zhaodong; Wang, Fei; Wang, Xudong

2017-01-01

Vanadium oxide (VO x ) nanorods are uniformly synthesized on dense Si nanowire arrays. This 3D hierarchical nanoarchitecture offers a novel high-performance supercapacitor electrode design with significantly improved specific capacitance and high-rate capability. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Interiors That Stand Out

ERIC Educational Resources Information Center

American School & University, 2008

2008-01-01

"It's what's on the inside that counts"--at least when it comes to "American School & University's" (AS&U's) annual Educational Interiors Showcase competition. Each May, "AS&U" assembles at its Overland Park, Kansas headquarters a jury made up of education and architectural professionals from across the country to pore over an array of exceptional…

A Study of Alternative Computer Architectures for System Reliability and Software Simplification.

DTIC Science & Technology

1981-04-22

compression. Several known applications of neighborhood processing, such as noise removal, and boundary smoothing, are shown to be special cases of...Processing [21] A small effort was undertaken to implement image array processing at a very low cost. To this end, a standard Qwip Facsimile

SSP Power Management and Distribution

NASA Technical Reports Server (NTRS)

Lynch, Thomas H.; Roth, A. (Technical Monitor)

2000-01-01

Space Solar Power is a NASA program sponsored by Marshall Space Flight Center. The Paper presented here represents the architectural study of a large power management and distribution (PMAD) system. The PMAD supplies power to a microwave array for power beaming to an earth rectenna (Rectifier Antenna). The power is in the GW level.

Space Solar Power Management and Distribution (PMAD)

NASA Technical Reports Server (NTRS)

Lynch, Thomas H.

2000-01-01

This paper presents, in viewgraph form, SSP PMAD (Space Solar Power Management and Distribution). The topics include: 1) Architecture; 2) Backside Thermal View; 3) Solar Array Interface; 4) Transformer design and risks; 5) Twelve phase rectifier; 6) Antenna (80V) Converters; 7) Distribution Cables; 8) Weight Analysis; and 9) PMAD Summary.

Variant Discovery and Fine Mapping of Genetic Loci Associated with Blood Pressure Traits in Hispanics and African Americans.

PubMed

Franceschini, Nora; Carty, Cara L; Lu, Yingchang; Tao, Ran; Sung, Yun Ju; Manichaikul, Ani; Haessler, Jeff; Fornage, Myriam; Schwander, Karen; Zubair, Niha; Bien, Stephanie; Hindorff, Lucia A; Guo, Xiuqing; Bielinski, Suzette J; Ehret, Georg; Kaufman, Joel D; Rich, Stephen S; Carlson, Christopher S; Bottinger, Erwin P; North, Kari E; Rao, D C; Chakravarti, Aravinda; Barrett, Paula Q; Loos, Ruth J F; Buyske, Steven; Kooperberg, Charles

2016-01-01

Despite the substantial burden of hypertension in US minority populations, few genetic studies of blood pressure have been conducted in Hispanics and African Americans, and it is unclear whether many of the established loci identified in European-descent populations contribute to blood pressure variation in non-European descent populations. Using the Metabochip array, we sought to characterize the genetic architecture of previously identified blood pressure loci, and identify novel cardiometabolic variants related to systolic and diastolic blood pressure in a multi-ethnic US population including Hispanics (n = 19,706) and African Americans (n = 18,744). Several known blood pressure loci replicated in African Americans and Hispanics. Fourteen variants in three loci (KCNK3, FGF5, ATXN2-SH2B3) were significantly associated with blood pressure in Hispanics. The most significant diastolic blood pressure variant identified in our analysis, rs2586886/KCNK3 (P = 5.2 x 10-9), also replicated in independent Hispanic and European-descent samples. African American and trans-ethnic meta-analysis data identified novel variants in the FGF5, ULK4 and HOXA-EVX1 loci, which have not been previously associated with blood pressure traits. Our identification and independent replication of variants in KCNK3, a gene implicated in primary hyperaldosteronism, as well as a variant in HOTTIP (HOXA-EVX1) suggest that further work to clarify the roles of these genes may be warranted. Overall, our findings suggest that loci identified in European descent populations also contribute to blood pressure variation in diverse populations including Hispanics and African Americans-populations that are understudied for hypertension genetic risk factors.

The Genomic Architecture of Sporadic Heart Failure

PubMed Central

Dorn, Gerald W

2011-01-01

Common or sporadic systolic heart failure (heart failure) is the clinical syndrome of insufficient forward cardiac output resulting from myocardial disease. Most heart failure is the consequence of ischemic or idiopathic cardiomyopathy. There is a clear familial predisposition to heart failure, with a genetic component estimated to confer between 20 and 30% of overall risk. The multifactorial etiology of this syndrome has complicated identification of its genetic underpinnings. Until recently, almost all genetic studies of heart failure were designed and deployed according to the common disease-common variant hypothesis, in which individual risk alleles impart a small positive or negative effect and overall genetic risk is the cumulative impact of all functional genetic variations. Early studies employed a candidate gene approach, focused mainly on factors within adrenergic and renin-angiotensin pathways that affect heart failure progression and are targeted by standard pharmacotherapeutics. Many of these reported allelic associations with heart failure have not been replicated. However, the preponderance of data support risk-modifier effects for the Arg389Gly polymorphism of β1-adrenergic receptors and the intron 16 in/del polymorphism of angiotensin converting enzyme. Recent unbiased studies using genome-wide single nucleotide polymorphism (SNP) microarrays have shown fewer positive results than when these platforms were applied to hypertension, myocardial infarction, or diabetes, possibly reflecting the complex etiology of heart failure. A new cardiovascular gene-centric sub-genome SNP array identified a common heat failure risk allele at 1p36 in multiple independent cohorts, but the biological mechanism for this association is still uncertain. It is likely that common gene polymorphisms account for only a fraction of individual genetic heart failure risk, and future studies using deep resequencing are likely to identify rare gene variants with larger biological effects. PMID:21566223

Functional response of osteoblasts in functionally gradient titanium alloy mesh arrays processed by 3D additive manufacturing.

PubMed

Nune, K C; Kumar, A; Misra, R D K; Li, S J; Hao, Y L; Yang, R

2017-02-01

We elucidate here the osteoblasts functions and cellular activity in 3D printed interconnected porous architecture of functionally gradient Ti-6Al-4V alloy mesh structures in terms of cell proliferation and growth, distribution of cell nuclei, synthesis of proteins (actin, vinculin, and fibronectin), and calcium deposition. Cell culture studies with pre-osteoblasts indicated that the interconnected porous architecture of functionally gradient mesh arrays was conducive to osteoblast functions. However, there were statistically significant differences in the cellular response depending on the pore size in the functionally gradient structure. The interconnected porous architecture contributed to the distribution of cells from the large pore size (G1) to the small pore size (G3), with consequent synthesis of extracellular matrix and calcium precipitation. The gradient mesh structure significantly impacted cell adhesion and influenced the proliferation stage, such that there was high distribution of cells on struts of the gradient mesh structure. Actin and vinculin showed a significant difference in normalized expression level of protein per cell, which was absent in the case of fibronectin. Osteoblasts present on mesh struts formed a confluent sheet, bridging the pores through numerous cytoplasmic extensions. The gradient mesh structure fabricated by electron beam melting was explored to obtain fundamental insights on cellular activity with respect to osteoblast functions. Copyright © 2016 Elsevier B.V. All rights reserved.

Smart CMOS sensor for wideband laser threat detection

NASA Astrophysics Data System (ADS)

Schwarze, Craig R.; Sonkusale, Sameer

2015-09-01

The proliferation of lasers has led to their widespread use in applications ranging from short range standoff chemical detection to long range Lidar sensing and target designation operating across the UV to LWIR spectrum. Recent advances in high energy lasers have renewed the development of laser weapons systems. The ability to measure and assess laser source information is important to both identify a potential threat as well as determine safety and nominal hazard zone (NHZ). Laser detection sensors are required that provide high dynamic range, wide spectral coverage, pulsed and continuous wave detection, and large field of view. OPTRA, Inc. and Tufts have developed a custom ROIC smart pixel imaging sensor architecture and wavelength encoding optics for measurement of source wavelength, pulse length, pulse repetition frequency (PRF), irradiance, and angle of arrival. The smart architecture provides dual linear and logarithmic operating modes to provide 8+ orders of signal dynamic range and nanosecond pulse measurement capability that can be hybridized with the appropriate detector array to provide UV through LWIR laser sensing. Recent advances in sputtering techniques provide the capability for post-processing CMOS dies from the foundry and patterning PbS and PbSe photoconductors directly on the chip to create a single monolithic sensor array architecture for measuring sources operating from 0.26 - 5.0 microns, 1 mW/cm2 - 2 kW/cm2.

Nano-Photonic Structures for Light Trapping in Ultra-Thin Crystalline Silicon Solar Cells

PubMed Central

Pathi, Prathap; Peer, Akshit; Biswas, Rana

2017-01-01

Thick wafer-silicon is the dominant solar cell technology. It is of great interest to develop ultra-thin solar cells that can reduce materials usage, but still achieve acceptable performance and high solar absorption. Accordingly, we developed a highly absorbing ultra-thin crystalline Si based solar cell architecture using periodically patterned front and rear dielectric nanocone arrays which provide enhanced light trapping. The rear nanocones are embedded in a silver back reflector. In contrast to previous approaches, we utilize dielectric photonic crystals with a completely flat silicon absorber layer, providing expected high electronic quality and low carrier recombination. This architecture creates a dense mesh of wave-guided modes at near-infrared wavelengths in the absorber layer, generating enhanced absorption. For thin silicon (<2 μm) and 750 nm pitch arrays, scattering matrix simulations predict enhancements exceeding 90%. Absorption approaches the Lambertian limit at small thicknesses (<10 μm) and is slightly lower (by ~5%) at wafer-scale thicknesses. Parasitic losses are ~25% for ultra-thin (2 μm) silicon and just 1%–2% for thicker (>100 μm) cells. There is potential for 20 μm thick cells to provide 30 mA/cm2 photo-current and >20% efficiency. This architecture has great promise for ultra-thin silicon solar panels with reduced material utilization and enhanced light-trapping. PMID:28336851

Nano-photonic structures for light trapping in ultra-thin crystalline silicon solar cells

DOE PAGES

Pathi, Prathap; Peer, Akshit; Biswas, Rana

2017-01-13

Thick wafer-silicon is the dominant solar cell technology. It is of great interest to develop ultra-thin solar cells that can reduce materials usage, but still achieve acceptable performance and high solar absorption. Accordingly, we developed a highly absorbing ultra-thin crystalline Si based solar cell architecture using periodically patterned front and rear dielectric nanocone arrays which provide enhanced light trapping. The rear nanocones are embedded in a silver back reflector. In contrast to previous approaches, we utilize dielectric photonic crystals with a completely flat silicon absorber layer, providing expected high electronic quality and low carrier recombination. This architecture creates a densemore » mesh of wave-guided modes at near-infrared wavelengths in the absorber layer, generating enhanced absorption. For thin silicon (<2 μm) and 750 nm pitch arrays, scattering matrix simulations predict enhancements exceeding 90%. Absorption approaches the Lambertian limit at small thicknesses (<10 μm) and is slightly lower (by ~5%) at wafer-scale thicknesses. Parasitic losses are ~25% for ultra-thin (2 μm) silicon and just 1%–2% for thicker (>100 μm) cells. There is potential for 20 μm thick cells to provide 30 mA/cm2 photo-current and >20% efficiency. Furthermore, this architecture has great promise for ultra-thin silicon solar panels with reduced material utilization and enhanced light-trapping.« less

Nano-photonic structures for light trapping in ultra-thin crystalline silicon solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pathi, Prathap; Peer, Akshit; Biswas, Rana

Thick wafer-silicon is the dominant solar cell technology. It is of great interest to develop ultra-thin solar cells that can reduce materials usage, but still achieve acceptable performance and high solar absorption. Accordingly, we developed a highly absorbing ultra-thin crystalline Si based solar cell architecture using periodically patterned front and rear dielectric nanocone arrays which provide enhanced light trapping. The rear nanocones are embedded in a silver back reflector. In contrast to previous approaches, we utilize dielectric photonic crystals with a completely flat silicon absorber layer, providing expected high electronic quality and low carrier recombination. This architecture creates a densemore » mesh of wave-guided modes at near-infrared wavelengths in the absorber layer, generating enhanced absorption. For thin silicon (<2 μm) and 750 nm pitch arrays, scattering matrix simulations predict enhancements exceeding 90%. Absorption approaches the Lambertian limit at small thicknesses (<10 μm) and is slightly lower (by ~5%) at wafer-scale thicknesses. Parasitic losses are ~25% for ultra-thin (2 μm) silicon and just 1%–2% for thicker (>100 μm) cells. There is potential for 20 μm thick cells to provide 30 mA/cm2 photo-current and >20% efficiency. Furthermore, this architecture has great promise for ultra-thin silicon solar panels with reduced material utilization and enhanced light-trapping.« less

Three-dimensional architecture hybrid perovskite solar cells using CdS nanorod arrays as an electron transport layer

NASA Astrophysics Data System (ADS)

Song, Zihang; Tong, Guoqing; Li, Huan; Li, Guopeng; Ma, Shuai; Yu, Shimeng; Liu, Qian; Jiang, Yang

2018-01-01

Three-dimensional (3D) architecture perovskite solar cells (PSCs) using CdS nanorod (NR) arrays as an electron transport layer were designed and prepared layer-by-layer via a physical-chemical vapor deposition (P-CVD) process. The CdS NRs not only provided a scaffold to the perovskite film, but also increased the interfacial contact between the perovskite film and electron transport layer. As an optimized result, a high power conversion efficiency of 12.46% with a short-circuit current density of 19.88 mA cm-2, an open-circuit voltage of 1.01 V and a fill factor of 62.06% was obtained after 12 h growth of CdS NRs. It was four times the efficiency of contrast planar structure with a similar thickness. The P-CVD method assisted in achieving flat and voidless CH3NH3PbI3-x Cl x perovskite film and binding the CdS NRs and perovskite film together. The different density of CdS NRs had obvious effects on light transmittance of 350-550 nm, the interfacial area and the difficulty of combining layers. Moreover, the efficient 1D transport paths for electrons and multiple absorption of light, which are generated in 3D architecture, were beneficial to realize a decent power conversion efficiency.

Nano-Photonic Structures for Light Trapping in Ultra-Thin Crystalline Silicon Solar Cells.

PubMed

Pathi, Prathap; Peer, Akshit; Biswas, Rana

2017-01-13

Thick wafer-silicon is the dominant solar cell technology. It is of great interest to develop ultra-thin solar cells that can reduce materials usage, but still achieve acceptable performance and high solar absorption. Accordingly, we developed a highly absorbing ultra-thin crystalline Si based solar cell architecture using periodically patterned front and rear dielectric nanocone arrays which provide enhanced light trapping. The rear nanocones are embedded in a silver back reflector. In contrast to previous approaches, we utilize dielectric photonic crystals with a completely flat silicon absorber layer, providing expected high electronic quality and low carrier recombination. This architecture creates a dense mesh of wave-guided modes at near-infrared wavelengths in the absorber layer, generating enhanced absorption. For thin silicon (<2 μm) and 750 nm pitch arrays, scattering matrix simulations predict enhancements exceeding 90%. Absorption approaches the Lambertian limit at small thicknesses (<10 μm) and is slightly lower (by ~5%) at wafer-scale thicknesses. Parasitic losses are ~25% for ultra-thin (2 μm) silicon and just 1%-2% for thicker (>100 μm) cells. There is potential for 20 μm thick cells to provide 30 mA/cm² photo-current and >20% efficiency. This architecture has great promise for ultra-thin silicon solar panels with reduced material utilization and enhanced light-trapping.

Comparing Transition-Edge Sensor Response Times in a Modified Contact Scheme with Different Support Beams

NASA Technical Reports Server (NTRS)

Beyer, A. D.; Kenyon, M. E.; Bumble, B.; Runyan, M. C.; Echternach, P. E.; Holmes, W. A.; Bock, J. J.; Bradford, C. M.

2013-01-01

We present measurements of the thermal conductance, G, and effective time constants, tau, of three transition-edge sensors (TESs) populated in arrays operated from 80-87mK with T(sub C) approximately 120mK. Our TES arrays include several variations of thermal architecture enabling determination of the architecture that demonstrates the minimum noise equivalent power (NEP), the lowest tau and the trade-offs among designs. The three TESs we report here have identical Mo/Cu bilayer thermistors and wiring structures, while the thermal architectures are: 1) a TES with straight support beams of 1mm length, 2) a TES with meander support beams of total length 2mm and with 2 phononfilter blocks per beam, and 3) a TES with meander support beams of total length 2mm and with 6 phonon-filter blocks per beam. Our wiring scheme aims to lower the thermistor normal state resistance R(sub N) and increase the sharpness of the transition alpha=dlogR/dlogT at the transition temperature T(sub C). We find an upper limit of given by (25+/-10), and G values of 200fW/K for 1), 15fW/K for 2), and 10fW/K for 3). The value of alpha can be improved by slightly increasing the length of our thermistors.

The apparatus composition and architecture of Cordylodus pander - Concepts of homology in primitive conodonts

USGS Publications Warehouse

Smith, M.P.; Donoghue, P.C.J.; Repetski, J.E.

2005-01-01

A clear distinction may be drawn between the perpendicular architecture of the feeding apparatus of ozarkodinid, prioniodontid and prioniodinid conodonts, in which the P elements are situated at a high angle to the M and S elements, and the parallel architecture of panderodontid and other coniform apparatuses, where two suites of coniform elements lie parallel to each other and oppose across the midline. The quest for homologies between the two architectures has been fraught with difficulty, at least in part because of the paucity of natural assemblages of coniform taxa. A diagenetically fused apparatus of Cordylodns lindstroini elements is here described which is made up of one rounded and two compressed element morphotypes. One of the compressed elements is bowed and asymmetrical and the other is unbowed and more symmetrical. These compressed elements are considered to be homologous with those of panderodontid apparatuses and would have lain at the caudal end of the parallel arrays, with the more symmetrical morphotypes located rostrally to the asymmetrical ones. The bowed and unbowed compressed elements of Cordylodns thus correspond, respectively, to the pt and pf positions of panderodontid apparatuses. In addition, the presence of symmetry transition within the rounded elements of Cordylodns, but not the compressed morphotypes, enables correlation of these with the S and M element locations of ozarkodinid apparatuses. By extension, the compressed elements must be homologues of the P elements. Specifically, the asymmetrical pt morphotype is homologous with the P1 of ozarkodinids and the more symmetrical and rostral pf morphotype is homologous with the P2 position. However, because of uncertainties over the nature of topological transformation of the rostral element array (the "rounded" or "costate" suites), it is not possible to recognize specific homologies between these elements and the M and S elements of ozarkodinids. Morphologic differentiation of P from M and S element suites thus preceded the topological transformation from parallel to perpendicular apparatus architectures.

Novel Photon-Counting Detectors for Free-Space Communication

NASA Technical Reports Server (NTRS)

Krainak, Michael A.; Yang, Guan; Sun, Xiaoli; Lu, Wei; Merritt, Scott; Beck, Jeff

2016-01-01

We present performance data for novel photon counting detectors for free space optical communication. NASA GSFC is testing the performance of three novel photon counting detectors 1) a 2x8 mercury cadmium telluride avalanche array made by DRS Inc. 2) a commercial 2880 silicon avalanche photodiode array and 3) a prototype resonant cavity silicon avalanche photodiode array. We will present and compare dark count, photon detection efficiency, wavelength response and communication performance data for these detectors. We discuss system wavelength trades and architectures for optimizing overall communication link sensitivity, data rate and cost performance. The HgCdTe APD array has photon detection efficiencies of greater than 50 were routinely demonstrated across 5 arrays, with one array reaching a maximum PDE of 70. High resolution pixel-surface spot scans were performed and the junction diameters of the diodes were measured. The junction diameter was decreased from 31 m to 25 m resulting in a 2x increase in e-APD gain from 470 on the 2010 array to 1100 on the array delivered to NASA GSFC. Mean single photon SNRs of over 12 were demonstrated at excess noise factors of 1.2-1.3.The commercial silicon APD array has a fast output with rise times of 300ps and pulse widths of 600ps. Received and filtered signals from the entire array are multiplexed onto this single fast output. The prototype resonant cavity silicon APD array is being developed for use at 1 micron wavelength.

A fast, programmable hardware architecture for the processing of spaceborne SAR data

NASA Technical Reports Server (NTRS)

Bennett, J. R.; Cumming, I. G.; Lim, J.; Wedding, R. M.

1984-01-01

The development of high-throughput SAR processors (HTSPs) for the spaceborne SARs being planned by NASA, ESA, DFVLR, NASDA, and the Canadian Radarsat Project is discussed. The basic parameters and data-processing requirements of the SARs are listed in tables, and the principal problems are identified as real-operations rates in excess of 2 x 10 to the 9th/sec, I/O rates in excess of 8 x 10 to the 6th samples/sec, and control computation loads (as for range cell migration correction) as high as 1.4 x 10 to the 6th instructions/sec. A number of possible HTSP architectures are reviewed; host/array-processor (H/AP) and distributed-control/data-path (DCDP) architectures are examined in detail and illustrated with block diagrams; and a cost/speed comparison of these two architectures is presented. The H/AP approach is found to be adequate and economical for speeds below 1/200 of real time, while DCDP is more cost-effective above 1/50 of real time.

Performance study of a data flow architecture

NASA Technical Reports Server (NTRS)

Adams, George

1985-01-01

Teams of scientists studied data flow concepts, static data flow machine architecture, and the VAL language. Each team mapped its application onto the machine and coded it in VAL. The principal findings of the study were: (1) Five of the seven applications used the full power of the target machine. The galactic simulation and multigrid fluid flow teams found that a significantly smaller version of the machine (16 processing elements) would suffice. (2) A number of machine design parameters including processing element (PE) function unit numbers, array memory size and bandwidth, and routing network capability were found to be crucial for optimal machine performance. (3) The study participants readily acquired VAL programming skills. (4) Participants learned that application-based performance evaluation is a sound method of evaluating new computer architectures, even those that are not fully specified. During the course of the study, participants developed models for using computers to solve numerical problems and for evaluating new architectures. These models form the bases for future evaluation studies.

All-optical LAN architectures based on arrayed waveguide grating multiplexers

NASA Astrophysics Data System (ADS)

Woesner, Hagen

1998-10-01

The paper presents optical LAN topologies which are made possible using an Arrayed Waveguide Grating Multiplexer (AWGM) instead of a passive star coupler to interconnect stations in an all-optical LAN. Due to the collision-free nature of an AWGM it offers the n-fold bandwidth compared to the star coupler. Virtual ring topologies appear (one ring on each wavelength) if the number of stations attached to the AWGM is a prime number. A method to construct larger networks using Cayley graphs is shown. An access protocol to avoid collisions on the proposed network is outlined.

Experimental demonstration of a phased-array antenna optically controlled with phase and time delays.

PubMed

Dolfi, D; Joffre, P; Antoine, J; Huignard, J P; Philippet, D; Granger, P

1996-09-10

The experimental demonstration and the far-field pattern characterization of an optically controlled phased-array antenna are described. It operates between 2.5 and 3.5 GHz and is made of 16 radiating elements. The optical control uses a two-dimensional architecture based on free-space propagation and on polarization switching by N spatial light modulators of p × p pixels. It provides 2(N-1) time-delay values and an analog control of the 0 to 2π phase for each of the p × p signals feeding the antenna (N = 5, p = 4).

Determinants of blood pressure in preschool children: the role of parental smoking.

PubMed

Simonetti, Giacomo D; Schwertz, Rainer; Klett, Martin; Hoffmann, Georg F; Schaefer, Franz; Wühl, Elke

2011-01-25

Hypertension is the leading risk factor for cardiovascular disease. Although accumulating evidence suggests tracking of blood pressure from childhood into adult life, there is little information regarding the relative contributions of genetic, prenatal, biological, behavioral, environmental, and social determinants to childhood blood pressure. Blood pressure and an array of potential anthropometric, prenatal, environmental, and familial risk factors for high blood pressure, including parental smoking habits, were determined as part of a screening project in 4236 preschool children (age 5.7 ± 0.4 years). Smoking was reported by 28.5% of fathers and 20.7% of mothers, and by both parents 11.9%. In addition to classic risk factors such as body mass index, prematurity, low birth weight, and parental hypertension, both systolic (+1.0 [95% confidence interval, +0.5 to +1.5] mm Hg; P=0.0001) and diastolic blood pressure (+0.5 [+0.03 to +0.9] mm Hg; P=0.03) were higher in children of smoking parents. Parental smoking independently affected systolic blood pressure (P=0.001) even after correction for other risk factors, such as body mass index, parental hypertension, or birth weight, increasing the likelihood of having a systolic blood pressure in the top 15% of the population by 21% (2% to 44%; P=0.02). In healthy preschool children, parental smoking is an independent risk factor for higher blood pressure, adding to other familial and environmental risk factors. Implementing smoke-free environments at home and in public places may provide a long-term cardiovascular benefit even to young children.

Titania nanotube arrays as potential interfaces for neurological prostheses

NASA Astrophysics Data System (ADS)

Sorkin, Jonathan Andrew

Neural prostheses can make a dramatic improvement for those suffering from visual and auditory, cognitive, and motor control disabilities, allowing them regained functionality by the use of stimulating or recording electrical signaling. However, the longevity of these devices is limited due to the neural tissue response to the implanted device. In response to the implant penetrating the blood brain barrier and causing trauma to the tissue, the body forms a to scar to isolate the implant in order to protect the nearby tissue. The scar tissue is a result of reactive gliosis and produces an insulated sheath, encapsulating the implant. The glial sheath limits the stimulating or recording capabilities of the implant, reducing its effectiveness over the long term. A favorable interaction with this tissue would be the direct adhesion of neurons onto the contacts of the implant, and the prevention of glial encapsulation. With direct neuronal adhesion the effectiveness and longevity of the device would be significantly improved. Titania nanotube arrays, fabricated using electrochemical anodization, provide a conductive architecture capable of altering cellular response. This work focuses on the fabrication of different titania nanotube array architectures to determine how their structures and properties influence the response of neural tissue, modeled using the C17.2 murine neural stem cell subclone, and if glial encapsulation can be reduced while neuronal adhesion is promoted.

Optical Phased Array Antennas using Coupled Vertical Cavity Surface Emitting Lasers

NASA Technical Reports Server (NTRS)

Mueller, Carl H.; Rojas, Roberto A.; Nessel, James A.; Miranda, Felix A.

2007-01-01

High data rate communication links are needed to meet the needs of NASA as well as other organizations to develop space-based optical communication systems. These systems must be robust to high radiation environments, reliable, and operate over a wide temperature range. Highly desirable features include beam steering capability, reconfigurability, low power consumption, and small aperture size. Optical communication links, using coupled vertical cavity surface emitting laser radiating elements are promising candidates for the transmit portion of these communication links. In this talk we describe a mission scenario, and how the antenna requirements are derived from the mission needs. We describe a potential architecture for this type of antenna, and outline the advantages and drawbacks of this approach relative to competing technologies. The technology we are proposing used coupled arrays of 1550 nm vertical cavity surface emitting lasers for transmission. The feasibility of coupling these arrays together, to form coherent high-power beams that can be modulated at data rates exceeding 1 Gbps, will be explored. We will propose an architecture that enables electronic beam steering, thus mitigating the need for ancillary acquisition, tracking and beam pointing equipment such as needed for current optical communicatin systems. The beam-steering capability we are proposing also opens the possibility of using this technology for inter-satellite communicatin links, and satellite-to-surface links.

Implementation of digital equality comparator circuit on memristive memory crossbar array using material implication logic

NASA Astrophysics Data System (ADS)

Haron, Adib; Mahdzair, Fazren; Luqman, Anas; Osman, Nazmie; Junid, Syed Abdul Mutalib Al

2018-03-01

One of the most significant constraints of Von Neumann architecture is the limited bandwidth between memory and processor. The cost to move data back and forth between memory and processor is considerably higher than the computation in the processor itself. This architecture significantly impacts the Big Data and data-intensive application such as DNA analysis comparison which spend most of the processing time to move data. Recently, the in-memory processing concept was proposed, which is based on the capability to perform the logic operation on the physical memory structure using a crossbar topology and non-volatile resistive-switching memristor technology. This paper proposes a scheme to map digital equality comparator circuit on memristive memory crossbar array. The 2-bit, 4-bit, 8-bit, 16-bit, 32-bit, and 64-bit of equality comparator circuit are mapped on memristive memory crossbar array by using material implication logic in a sequential and parallel method. The simulation results show that, for the 64-bit word size, the parallel mapping exhibits 2.8× better performance in total execution time than sequential mapping but has a trade-off in terms of energy consumption and area utilization. Meanwhile, the total crossbar area can be reduced by 1.2× for sequential mapping and 1.5× for parallel mapping both by using the overlapping technique.

Compact Micromachined Infrared Bandpass Filters for Planetary Spectroscopy

NASA Technical Reports Server (NTRS)

Merrell, Willie C., II; Aslam, Shahid; Brown, Ari D.; Chervenak, James A.; Huang, Wei-Chung; Quijada, Manuel; Wollack, Edward

2011-01-01

The future needs of space based observational planetary and astronomy missions include low mass and small volume radiometric instruments that can operate in high radiation and low temperature environments. Here we focus on a central spectroscopic component, the bandpass filter. We model the bandpass response of the filters to target the wavelength of the resonance peaks at 20, 40, and 60 micrometers and report good agreement between the modeled and measured response. We present a technique of using common micromachining processes for semiconductor fabrication to make compact, free standing resonant metal mesh filter arrays with silicon support frames. The process can accommodate multiple detector array architectures and the silicon frame provides lightweight mechanical support with low form factor. We also present a conceptual hybridization of the filters with a detector array.

Studies of the astronomical array at the castle in Olsztyn

NASA Astrophysics Data System (ADS)

Szubiakowski, Jacek P.

2014-12-01

The paper describes a mathematical model simulating the operation of the board for Sun observation located in Olsztyn castle. The board was made around 1517, when Nicolaus Copernicus held the office of the property administrator of the Warmian Chapter. The idea of the functioning of the array is adapted to the lighting conditions of the cloister. As an indicator of the instantaneous position of the Sun and the moment of time a ray of sunshine reflected from the mirror mounted horizontally on the windowsill of arcade was used. The paper presents the results of the analysis of the calendar lines as well as the hour lines. The architectural conditions determining the hours of operation of the array in different months and the factors affecting its accuracy has also been examined.

Ultra-Wideband Phased Array for Millimeter-Wave 5G and ISM

NASA Technical Reports Server (NTRS)

Novak, Markus H.; Volakis, John L.; Miranda, Felix A.

2016-01-01

Growing mobile data consumption has prompted the exploration of the millimeter-wave spectrum for large bandwidth, high speed communications. However, the allocated bands are spread across a wide swath of spectrum: fifth generation mobile architecture (5G): 28, 38, 39, 64-71 GHz, as well as Industrial, Scientific, and Medical bands (ISM): 24 and 60 GHz. Moreover, high gain phased arrays are required to overcome the significant path loss associated with these frequencies. Further, it is necessary to incorporate several of these applications in a single, small size and low cost platform. To this end, we have developed a scanning, Ultra-Wideband (UWB) array which covers all 5G, ISM, and other mm-W bands from 24-72 GHz. Critically, this is accomplished using mass-production Printed Circuit Board (PCB) fabrication.

Robotic inspection of fiber reinforced composites using phased array UT

NASA Astrophysics Data System (ADS)

Stetson, Jeffrey T.; De Odorico, Walter

2014-02-01

Ultrasound is the current NDE method of choice to inspect large fiber reinforced airframe structures. Over the last 15 years Cartesian based scanning machines using conventional ultrasound techniques have been employed by all airframe OEMs and their top tier suppliers to perform these inspections. Technical advances in both computing power and commercially available, multi-axis robots now facilitate a new generation of scanning machines. These machines use multiple end effector tools taking full advantage of phased array ultrasound technologies yielding substantial improvements in inspection quality and productivity. This paper outlines the general architecture for these new robotic scanning systems as well as details the variety of ultrasonic techniques available for use with them including advances such as wide area phased array scanning and sound field adaptation for non-flat, non-parallel surfaces.

A survey of the state-of-the-art and focused research in range systems

NASA Technical Reports Server (NTRS)

Kung, Yao; Balakrishnan, A. V.

1988-01-01

In this one-year renewal of NASA Contract No. 2-304, basic research, development, and implementation in the areas of modern estimation algorithms and digital communication systems have been performed. In the first area, basic study on the conversion of general classes of practical signal processing algorithms into systolic array algorithms is considered, producing four publications. Also studied were the finite word length effects and convergence rates of lattice algorithms, producing two publications. In the second area of study, the use of efficient importance sampling simulation technique for the evaluation of digital communication system performances were studied, producing two publications.

Time-space modal logic for verification of bit-slice circuits

NASA Astrophysics Data System (ADS)

Hiraishi, Hiromi

1996-03-01

The major goal of this paper is to propose a new modal logic aiming at formal verification of bit-slice circuits. The new logic is called as time-space modal logic and its major feature is that it can handle two transition relations: one for time transition and the other for space transition. As for a verification algorithm, a symbolic model checking algorithm of the new logic is shown. This could be applicable to verification of bit-slice microprocessor of infinite bit width and 1D systolic array of infinite length. A simple benchmark result shows the effectiveness of the proposed approach.

The BLAZE language: A parallel language for scientific programming

NASA Technical Reports Server (NTRS)

Mehrotra, P.; Vanrosendale, J.

1985-01-01

A Pascal-like scientific programming language, Blaze, is described. Blaze contains array arithmetic, forall loops, and APL-style accumulation operators, which allow natural expression of fine grained parallelism. It also employs an applicative or functional procedure invocation mechanism, which makes it easy for compilers to extract coarse grained parallelism using machine specific program restructuring. Thus Blaze should allow one to achieve highly parallel execution on multiprocessor architectures, while still providing the user with onceptually sequential control flow. A central goal in the design of Blaze is portability across a broad range of parallel architectures. The multiple levels of parallelism present in Blaze code, in principle, allow a compiler to extract the types of parallelism appropriate for the given architecture while neglecting the remainder. The features of Blaze are described and shows how this language would be used in typical scientific programming.

Fast image-based mitral valve simulation from individualized geometry.

PubMed

Villard, Pierre-Frederic; Hammer, Peter E; Perrin, Douglas P; Del Nido, Pedro J; Howe, Robert D

2018-04-01

Common surgical procedures on the mitral valve of the heart include modifications to the chordae tendineae. Such interventions are used when there is extensive leaflet prolapse caused by chordae rupture or elongation. Understanding the role of individual chordae tendineae before operating could be helpful to predict whether the mitral valve will be competent at peak systole. Biomechanical modelling and simulation can achieve this goal. We present a method to semi-automatically build a computational model of a mitral valve from micro CT (computed tomography) scans: after manually picking chordae fiducial points, the leaflets are segmented and the boundary conditions as well as the loading conditions are automatically defined. Fast finite element method (FEM) simulation is carried out using Simulation Open Framework Architecture (SOFA) to reproduce leaflet closure at peak systole. We develop three metrics to evaluate simulation results: (i) point-to-surface error with the ground truth reference extracted from the CT image, (ii) coaptation surface area of the leaflets and (iii) an indication of whether the simulated closed leaflets leak. We validate our method on three explanted porcine hearts and show that our model predicts the closed valve surface with point-to-surface error of approximately 1 mm, a reasonable coaptation surface area, and absence of any leak at peak systole (maximum closed pressure). We also evaluate the sensitivity of our model to changes in various parameters (tissue elasticity, mesh accuracy, and the transformation matrix used for CT scan registration). We also measure the influence of the positions of the chordae tendineae on simulation results and show that marginal chordae have a greater influence on the final shape than intermediate chordae. The mitral valve simulation can help the surgeon understand valve behaviour and anticipate the outcome of a procedure. Copyright © 2018 John Wiley & Sons, Ltd.

Design and Fabrication Highlights Enabling a 2 mm, 128 Element Bolometer Array for GISMO

NASA Technical Reports Server (NTRS)

Allen, Christine; Benford, Dominic; Miller, Timothy; Staguhn, Johannes; Wollack, Edward; Moseley, Harvey

2007-01-01

The Backshort-Under-Grid (BUG) superconducting bolometer array architecture is intended to be highly versatile, operating in a large range of wavelengths and background conditions. We have undertaken a three-year program to develop key technologies and processes required to build kilopixel arrays. To validate the basic array design and to demonstrate its applicability for future kilopixel arrays, we have chosen to demonstrate a 128 element bolometer array optimized for 2 mm wavelength using a newly built Goddard instrument, GISMO (Goddard /RAM Superconducting 2-millimeter Observer). The arrays are fabricated using batch wafer processing developed and optimized for high pixel yield, low noise, and high uniformity. The molybdenum-gold superconducting transition edge sensors are fabricated using batch sputter deposition and are patterned using dry etch techniques developed at Goddard. With a detector pitch of 2 mm 8x16 array for GISMO occupies nearly one half of the processing area of a 100 mm silicon-on-insulator starting wafer. Two such arrays are produced from a single wafer along with witness samples for process characterization. To provide thermal isolation for the detector elements, at the end of the process over 90% of the silicon must be removed using deep reactive ion etching techniques. The electrical connections for each bolometer element are patterned on the top edge of the square grid supporting the array. The design considerations unique to GISMO, key fabrication challenges, and laboratory experimental results will be presented.

SWARM: A 32 GHz Correlator and VLBI Beamformer for the Submillimeter Array

NASA Astrophysics Data System (ADS)

Primiani, Rurik A.; Young, Kenneth H.; Young, André; Patel, Nimesh; Wilson, Robert W.; Vertatschitsch, Laura; Chitwood, Billie B.; Srinivasan, Ranjani; MacMahon, David; Weintroub, Jonathan

2016-03-01

A 32GHz bandwidth VLBI capable correlator and phased array has been designed and deployeda at the Smithsonian Astrophysical Observatory’s Submillimeter Array (SMA). The SMA Wideband Astronomical ROACH2 Machine (SWARM) integrates two instruments: a correlator with 140kHz spectral resolution across its full 32GHz band, used for connected interferometric observations, and a phased array summer used when the SMA participates as a station in the Event Horizon Telescope (EHT) very long baseline interferometry (VLBI) array. For each SWARM quadrant, Reconfigurable Open Architecture Computing Hardware (ROACH2) units shared under open-source from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) are equipped with a pair of ultra-fast analog-to-digital converters (ADCs), a field programmable gate array (FPGA) processor, and eight 10 Gigabit Ethernet (GbE) ports. A VLBI data recorder interface designated the SWARM digital back end, or SDBE, is implemented with a ninth ROACH2 per quadrant, feeding four Mark6 VLBI recorders with an aggregate recording rate of 64 Gbps. This paper describes the design and implementation of SWARM, as well as its deployment at SMA with reference to verification and science data.

Comparative efficiency analysis of fiber-array and conventional beam director systems in volume turbulence.

PubMed

Vorontsov, Mikhail; Filimonov, Grigory; Ovchinnikov, Vladimir; Polnau, Ernst; Lachinova, Svetlana; Weyrauch, Thomas; Mangano, Joseph

2016-05-20

The performance of two prominent laser beam projection system types is analyzed through wave-optics numerical simulations for various atmospheric turbulence conditions, propagation distances, and adaptive optics (AO) mitigation techniques. Comparisons are made between different configurations of both a conventional beam director (BD) using a monolithic-optics-based Cassegrain telescope and a fiber-array BD that uses an array of densely packed fiber collimators. The BD systems considered have equal input power and aperture diameters. The projected laser beam power inside the Airy size disk at the target plane is used as the performance metric. For the fiber-array system, both incoherent and coherent beam combining regimes are considered. We also present preliminary results of side-by-side atmospheric beam projection experiments over a 7-km propagation path using both the AO-enhanced beam projection system with a Cassegrain telescope and the coherent fiber-array BD composed of 21 densely packed fiber collimators. Both wave-optics numerical simulation and experimental results demonstrate that, for similar system architectures and turbulence conditions, coherent fiber-array systems are more efficient in mitigation of atmospheric turbulence effects and generation of a hit spot of the smallest possible size on a remotely located target.

Microtubule and cellulose microfibril orientation during plant cell and organ growth.

PubMed

Chan, J

2012-07-01

In this review, I ask the question of what is the relationship between growth and the orientations of microtubules and cellulose microfibrils in plant cells. This should be a relatively simple question to answer considering that text books commonly describe microtubules and cellulose microfibrils as hoops that drive expansion perpendicular to their orientation. However, recent live imaging techniques, which allow microtubules and cellulose synthase dynamics to be imaged simultaneously with cell elongation, show that cells can elongate with nonperpendicular microtubule arrays. In this review, I look at the significance of these different microtubule arrangements for growth and cell wall architecture and how these resultant walls differ from those derived from perpendicular arrays. I also discuss how these divergent arrays in stems may be important for coordinating growth between the different cell layers. This role reveals some general features of microtubule alignment that can be used to predict the growth status of organs. In conclusion, nonperpendicular arrays demonstrate alternative ways of cell elongation that do not require hooped arrays of microtubules and cellulose microfibrils. Such nonperpendicular arrays may be required for optimal growth and strengthening of tissues. © 2011 The Author Journal of Microscopy © 2011 Royal Microscopical Society.

Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors

PubMed Central

El-Mohri, Youcef; Antonuk, Larry E.; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A.; Lu, Jeng-Ping

2009-01-01

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and∕or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of ∼10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill factors that are close to unity. In addition, the greater complexity of PSI-2 and PSI-3 pixel circuits, compared to that of PSI-1, has no observable effect on spatial resolution. Both PSI-2 and PSI-3 exhibit high levels of additive noise, resulting in no net improvement in the signal-to-noise performance of these early prototypes compared to conventional AMFPIs. However, faster readout rates, coupled with implementation of multiple sampling protocols allowed by the nondestructive nature of pixel readout, resulted in a significantly lower noise level of ∼560 e (rms) for PSI-3. PMID:19673229

Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors.

PubMed

El-Mohri, Youcef; Antonuk, Larry E; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A; Lu, Jeng-Ping

2009-07-01

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill factors that are close to unity. In addition, the greater complexity of PSI-2 and PSI-3 pixel circuits, compared to that of PSI-1, has no observable effect on spatial resolution. Both PSI-2 and PSI-3 exhibit high levels of additive noise, resulting in no net improvement in the signal-to-noise performance of these early prototypes compared to conventional AMFPIs. However, faster readout rates, coupled with implementation of multiple sampling protocols allowed by the nondestructive nature of pixel readout, resulted in a significantly lower noise level of approximately 560 e (rms) for PSI-3.

Wireless Computing Architecture III

DTIC Science & Technology

2013-09-01

MIMO Multiple-Input and Multiple-Output MIMO /CON MIMO with concurrent hannel access and estimation MU- MIMO Multiuser MIMO OFDM Orthogonal...compressive sensing \\; a design for concurrent channel estimation in scalable multiuser MIMO networking; and novel networking protocols based on machine...Network, Antenna Arrays, UAV networking, Angle of Arrival, Localization MIMO , Access Point, Channel State Information, Compressive Sensing 16

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dong, Rui; Moore, Logan; Ocola, Leonidas E.

The mask-free patterning technique is employed to fabricate arrays of MoS2 and WS2 structures on silicon and graphene substrates with quality interfaces. By depositing precursor inks with the AFM cantilevers and subsequent heat treatment in the CVD furnace, it is demonstrated that MoS2 and WS2 structures can be formed on graphene surfaces at predefined device architectures.

Architecturing hierarchical function layers on self-assembled viral templates as 3D nano-array electrodes for integrated Li-ion microbatteries.

PubMed

Liu, Yihang; Zhang, Wei; Zhu, Yujie; Luo, Yanting; Xu, Yunhua; Brown, Adam; Culver, James N; Lundgren, Cynthia A; Xu, Kang; Wang, Yuan; Wang, Chunsheng

2013-01-09

This work enables an elegant bottom-up solution to engineer 3D microbattery arrays as integral power sources for microelectronics. Thus, multilayers of functional materials were hierarchically architectured over tobacco mosaic virus (TMV) templates that were genetically modified to self-assemble in a vertical manner on current-collectors, so that optimum power and energy densities accompanied with excellent cycle-life could be achieved on a minimum footprint. The resultant microbattery based on self-aligned LiFePO(4) nanoforests of shell-core-shell structure, with precise arrangement of various auxiliary material layers including a central nanometric metal core as direct electronic pathway to current collector, delivers excellent energy density and stable cycling stability only rivaled by the best Li-ion batteries of conventional configurations, while providing rate performance per foot-print and on-site manufacturability unavailable from the latter. This approach could open a new avenue for microelectromechanical systems (MEMS) applications, which would significantly benefit from the concept that electrochemically active components be directly engineered and fabricated as an integral part of the integrated circuit (IC).

Architecture and settings optimization procedure of a TES frequency domain multiplexed readout firmware

NASA Astrophysics Data System (ADS)

Clenet, A.; Ravera, L.; Bertrand, B.; den Hartog, R.; Jackson, B.; van Leeuwen, B.-J.; van Loon, D.; Parot, Y.; Pointecouteau, E.; Sournac, A.

2014-11-01

IRAP is developing the readout electronics of the SPICA-SAFARI's TES bolometer arrays. Based on the frequency domain multiplexing technique the readout electronics provides the AC-signals to voltage-bias the detectors; it demodulates the data; and it computes a feedback to linearize the detection chain. The feedback is computed with a specific technique, so called baseband feedback (BBFB) which ensures that the loop is stable even with long propagation and processing delays (i.e. several μ s) and with fast signals (i.e. frequency carriers of the order of 5 MHz). To optimize the power consumption we took advantage of the reduced science signal bandwidth to decouple the signal sampling frequency and the data processing rate. This technique allowed a reduction of the power consumption of the circuit by a factor of 10. Beyond the firmware architecture the optimization of the instrument concerns the characterization routines and the definition of the optimal parameters. Indeed, to operate an array TES one has to properly define about 21000 parameters. We defined a set of procedures to automatically characterize these parameters and find out the optimal settings.

Scene-based nonuniformity correction technique that exploits knowledge of the focal-plane array readout architecture.

PubMed

Narayanan, Balaji; Hardie, Russell C; Muse, Robert A

2005-06-10

Spatial fixed-pattern noise is a common and major problem in modern infrared imagers owing to the nonuniform response of the photodiodes in the focal plane array of the imaging system. In addition, the nonuniform response of the readout and digitization electronics, which are involved in multiplexing the signals from the photodiodes, causes further nonuniformity. We describe a novel scene based on a nonuniformity correction algorithm that treats the aggregate nonuniformity in separate stages. First, the nonuniformity from the readout amplifiers is corrected by use of knowledge of the readout architecture of the imaging system. Second, the nonuniformity resulting from the individual detectors is corrected with a nonlinear filter-based method. We demonstrate the performance of the proposed algorithm by applying it to simulated imagery and real infrared data. Quantitative results in terms of the mean absolute error and the signal-to-noise ratio are also presented to demonstrate the efficacy of the proposed algorithm. One advantage of the proposed algorithm is that it requires only a few frames to obtain high-quality corrections.

An Intelligent Architecture Based on Field Programmable Gate Arrays Designed to Detect Moving Objects by Using Principal Component Analysis

PubMed Central

Bravo, Ignacio; Mazo, Manuel; Lázaro, José L.; Gardel, Alfredo; Jiménez, Pedro; Pizarro, Daniel

2010-01-01

This paper presents a complete implementation of the Principal Component Analysis (PCA) algorithm in Field Programmable Gate Array (FPGA) devices applied to high rate background segmentation of images. The classical sequential execution of different parts of the PCA algorithm has been parallelized. This parallelization has led to the specific development and implementation in hardware of the different stages of PCA, such as computation of the correlation matrix, matrix diagonalization using the Jacobi method and subspace projections of images. On the application side, the paper presents a motion detection algorithm, also entirely implemented on the FPGA, and based on the developed PCA core. This consists of dynamically thresholding the differences between the input image and the one obtained by expressing the input image using the PCA linear subspace previously obtained as a background model. The proposal achieves a high ratio of processed images (up to 120 frames per second) and high quality segmentation results, with a completely embedded and reliable hardware architecture based on commercial CMOS sensors and FPGA devices. PMID:22163406

An intelligent architecture based on Field Programmable Gate Arrays designed to detect moving objects by using Principal Component Analysis.

PubMed

Bravo, Ignacio; Mazo, Manuel; Lázaro, José L; Gardel, Alfredo; Jiménez, Pedro; Pizarro, Daniel

2010-01-01

This paper presents a complete implementation of the Principal Component Analysis (PCA) algorithm in Field Programmable Gate Array (FPGA) devices applied to high rate background segmentation of images. The classical sequential execution of different parts of the PCA algorithm has been parallelized. This parallelization has led to the specific development and implementation in hardware of the different stages of PCA, such as computation of the correlation matrix, matrix diagonalization using the Jacobi method and subspace projections of images. On the application side, the paper presents a motion detection algorithm, also entirely implemented on the FPGA, and based on the developed PCA core. This consists of dynamically thresholding the differences between the input image and the one obtained by expressing the input image using the PCA linear subspace previously obtained as a background model. The proposal achieves a high ratio of processed images (up to 120 frames per second) and high quality segmentation results, with a completely embedded and reliable hardware architecture based on commercial CMOS sensors and FPGA devices.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame,more » in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.« less

Multi-mode sensor processing on a dynamically reconfigurable massively parallel processor array

NASA Astrophysics Data System (ADS)

Chen, Paul; Butts, Mike; Budlong, Brad; Wasson, Paul

2008-04-01

This paper introduces a novel computing architecture that can be reconfigured in real time to adapt on demand to multi-mode sensor platforms' dynamic computational and functional requirements. This 1 teraOPS reconfigurable Massively Parallel Processor Array (MPPA) has 336 32-bit processors. The programmable 32-bit communication fabric provides streamlined inter-processor connections with deterministically high performance. Software programmability, scalability, ease of use, and fast reconfiguration time (ranging from microseconds to milliseconds) are the most significant advantages over FPGAs and DSPs. This paper introduces the MPPA architecture, its programming model, and methods of reconfigurability. An MPPA platform for reconfigurable computing is based on a structural object programming model. Objects are software programs running concurrently on hundreds of 32-bit RISC processors and memories. They exchange data and control through a network of self-synchronizing channels. A common application design pattern on this platform, called a work farm, is a parallel set of worker objects, with one input and one output stream. Statically configured work farms with homogeneous and heterogeneous sets of workers have been used in video compression and decompression, network processing, and graphics applications.

Remodeling the zonula adherens in response to tension and the role of afadin in this response

PubMed Central

Acharya, Bipul R.; Peyret, Grégoire; Fardin, Marc-Antoine; Mège, René-Marc; Ladoux, Benoit; Yap, Alpha S.; Fanning, Alan S.

2016-01-01

Morphogenesis requires dynamic coordination between cell–cell adhesion and the cytoskeleton to allow cells to change shape and move without losing tissue integrity. We used genetic tools and superresolution microscopy in a simple model epithelial cell line to define how the molecular architecture of cell–cell zonula adherens (ZA) is modified in response to elevated contractility, and how these cells maintain tissue integrity. We previously found that depleting zonula occludens 1 (ZO-1) family proteins in MDCK cells induces a highly organized contractile actomyosin array at the ZA. We find that ZO knockdown elevates contractility via a Shroom3/Rho-associated, coiled-coil containing protein kinase (ROCK) pathway. Our data suggest that each bicellular border is an independent contractile unit, with actin cables anchored end-on to cadherin complexes at tricellular junctions. Cells respond to elevated contractility by increasing junctional afadin. Although ZO/afadin knockdown did not prevent contractile array assembly, it dramatically altered cell shape and barrier function in response to elevated contractility. We propose that afadin acts as a robust protein scaffold that maintains ZA architecture at tricellular junctions. PMID:27114502

Architecture and prototypical implementation of a semantic querying system for big Earth observation image bases

PubMed Central

Tiede, Dirk; Baraldi, Andrea; Sudmanns, Martin; Belgiu, Mariana; Lang, Stefan

2017-01-01

ABSTRACT Spatiotemporal analytics of multi-source Earth observation (EO) big data is a pre-condition for semantic content-based image retrieval (SCBIR). As a proof of concept, an innovative EO semantic querying (EO-SQ) subsystem was designed and prototypically implemented in series with an EO image understanding (EO-IU) subsystem. The EO-IU subsystem is automatically generating ESA Level 2 products (scene classification map, up to basic land cover units) from optical satellite data. The EO-SQ subsystem comprises a graphical user interface (GUI) and an array database embedded in a client server model. In the array database, all EO images are stored as a space-time data cube together with their Level 2 products generated by the EO-IU subsystem. The GUI allows users to (a) develop a conceptual world model based on a graphically supported query pipeline as a combination of spatial and temporal operators and/or standard algorithms and (b) create, save and share within the client-server architecture complex semantic queries/decision rules, suitable for SCBIR and/or spatiotemporal EO image analytics, consistent with the conceptual world model. PMID:29098143

Advanced texture filtering: a versatile framework for reconstructing multi-dimensional image data on heterogeneous architectures

NASA Astrophysics Data System (ADS)

Zellmann, Stefan; Percan, Yvonne; Lang, Ulrich

2015-01-01

Reconstruction of 2-d image primitives or of 3-d volumetric primitives is one of the most common operations performed by the rendering components of modern visualization systems. Because this operation is often aided by GPUs, reconstruction is typically restricted to first-order interpolation. With the advent of in situ visualization, the assumption that rendering algorithms are in general executed on GPUs is however no longer adequate. We thus propose a framework that provides versatile texture filtering capabilities: up to third-order reconstruction using various types of cubic filtering and interpolation primitives; cache-optimized algorithms that integrate seamlessly with GPGPU rendering or with software rendering that was optimized for cache-friendly "Structure of Array" (SoA) access patterns; a memory management layer (MML) that gracefully hides the complexities of extra data copies necessary for memory access optimizations such as swizzling, for rendering on GPGPUs, or for reconstruction schemes that rely on pre-filtered data arrays. We prove the effectiveness of our software architecture by integrating it into and validating it using the open source direct volume rendering (DVR) software DeskVOX.

Optoelectronic-cache memory system architecture.

PubMed

Chiarulli, D M; Levitan, S P

1996-05-10

We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

Heterogeneous NiCo2O4@polypyrrole core/sheath nanowire arrays on Ni foam for high performance supercapacitors

NASA Astrophysics Data System (ADS)

Hu, Jing; Li, Minchan; Lv, Fucong; Yang, Mingyang; Tao, Pengpeng; Tang, Yougen; Liu, Hongtao; Lu, Zhouguang

2015-10-01

A novel heterogeneous NiCo2O4@PPy core/sheath nanowire arrays are directly grown on Ni foam involving three facile steps, hydrothermal synthesis and calcination of NiCo2O4 nanowire arrays and subsequent in-situ oxidative polymerization of polypyrrole (PPy). When investigated as binder- and conductive additive-free electrodes for supercapacitors (SCs) in 6 M KOH, the NiCo2O4@PPy core/sheath nanowire arrays exhibit high areal capacitance of 3.49 F cm-2 at a discharge current density of 5 mA cm-2, which is almost 1.5 times as much as the pristine NiCo2O4 (2.30 F cm-2). More importantly, it can remain 3.31 F cm-2 (94.8% retention) after 5000 cycles. The as-obtained electrode also displays excellent rate capability, whose areal capacitance can still remain 2.79 F cm-2 while the discharge current density is increased to 50 mA cm-2. The remarkable electrochemical performance is mainly attributed to the unique heterogeneous core/sheath nanowire-array architectures.

Construction of self-supported porous TiO2/NiO core/shell nanorod arrays for electrochemical capacitor application

NASA Astrophysics Data System (ADS)

Wu, J. B.; Guo, R. Q.; Huang, X. H.; Lin, Y.

2013-12-01

High-quality metal oxides hetero-structured nanoarrays have been receiving great attention in electrochemical energy storage application. Self-supported TiO2/NiO core/shell nanorod arrays are prepared on carbon cloth via the combination of hydrothermal synthesis and electro-deposition methods. The obtained core/shell nanorods consist of nanorod core and interconnected nanoflake shell, as well as hierarchical porosity. As cathode materials for pseudo-capacitors, the TiO2/NiO core/shell nanorod arrays display impressive electrochemical performances with both high capacitance of 611 F g-1 at 2 A g-1, and pretty good cycling stability with a retention of 89% after 5000 cycles. Besides, as compared to the single NiO nanoflake arrays on carbon cloth, the TiO2/NiO core/shell nanorod arrays exhibit much better electrochemical properties with higher capacitance, better electrochemical activity and cycling life. This enhanced performance is mainly due to the core/shell nanorods architecture offering fast ion/electron transfer and sufficient contact between active materials and electrolyte.

Preliminary Concept of Operations for the Deep Space Array-Based Network

NASA Astrophysics Data System (ADS)

Bagri, D. S.; Statman, J. I.

2004-05-01

The Deep Space Array-Based Network (DSAN) will be an array-based system, part of a greater than 1000 times increase in the downlink/telemetry capability of the Deep Space Network. The key function of the DSAN is provision of cost-effective, robust telemetry, tracking, and command services to the space missions of NASA and its international partners. This article presents an expanded approach to the use of an array-based system. Instead of using the array as an element in the existing Deep Space Network (DSN), relying to a large extent on the DSN infrastructure, we explore a broader departure from the current DSN, using fewer elements of the existing DSN, and establishing a more modern concept of operations. For example, the DSAN will have a single 24 x 7 monitor and control (M&C) facility, while the DSN has four 24 x 7 M&C facilities. The article gives the architecture of the DSAN and its operations philosophy. It also briefly describes the customer's view of operations, operations management, logistics, anomaly analysis, and reporting.

Adaptive and mobile ground sensor array.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holzrichter, Michael Warren; O'Rourke, William T.; Zenner, Jennifer

The goal of this LDRD was to demonstrate the use of robotic vehicles for deploying and autonomously reconfiguring seismic and acoustic sensor arrays with high (centimeter) accuracy to obtain enhancement of our capability to locate and characterize remote targets. The capability to accurately place sensors and then retrieve and reconfigure them allows sensors to be placed in phased arrays in an initial monitoring configuration and then to be reconfigured in an array tuned to the specific frequencies and directions of the selected target. This report reviews the findings and accomplishments achieved during this three-year project. This project successfully demonstrated autonomousmore » deployment and retrieval of a payload package with an accuracy of a few centimeters using differential global positioning system (GPS) signals. It developed an autonomous, multisensor, temporally aligned, radio-frequency communication and signal processing capability, and an array optimization algorithm, which was implemented on a digital signal processor (DSP). Additionally, the project converted the existing single-threaded, monolithic robotic vehicle control code into a multi-threaded, modular control architecture that enhances the reuse of control code in future projects.« less

Wide-field microscopy using microcamera arrays

NASA Astrophysics Data System (ADS)

Marks, Daniel L.; Youn, Seo Ho; Son, Hui S.; Kim, Jungsang; Brady, David J.

2013-02-01

A microcamera is a relay lens paired with image sensors. Microcameras are grouped into arrays to relay overlapping views of a single large surface to the sensors to form a continuous synthetic image. The imaged surface may be curved or irregular as each camera may independently be dynamically focused to a different depth. Microcamera arrays are akin to microprocessors in supercomputers in that both join individual processors by an optoelectronic routing fabric to increase capacity and performance. A microcamera may image ten or more megapixels and grouped into an array of several hundred, as has already been demonstrated by the DARPA AWARE Wide-Field program with multiscale gigapixel photography. We adapt gigapixel microcamera array architectures to wide-field microscopy of irregularly shaped surfaces to greatly increase area imaging over 1000 square millimeters at resolutions of 3 microns or better in a single snapshot. The system includes a novel relay design, a sensor electronics package, and a FPGA-based networking fabric. Biomedical applications of this include screening for skin lesions, wide-field and resolution-agile microsurgical imaging, and microscopic cytometry of millions of cells performed in situ.

Phosphorization boosts the capacitance of mixed metal nanosheet arrays for high performance supercapacitor electrodes.

PubMed

Lan, Yingying; Zhao, Hongyang; Zong, Yan; Li, Xinghua; Sun, Yong; Feng, Juan; Wang, Yan; Zheng, Xinliang; Du, Yaping

2018-05-01

Binary transition metal phosphides hold immense potential as innovative electrode materials for constructing high-performance energy storage devices. Herein, porous binary nickel-cobalt phosphide (NiCoP) nanosheet arrays anchored on nickel foam (NF) were rationally designed as self-supported binder-free electrodes with high supercapacitance performance. Taking the combined advantages of compositional features and array architectures, the nickel foam supported NiCoP nanosheet array (NiCoP@NF) electrode possesses superior electrochemical performance in comparison with Ni-Co LDH@NF and NiCoO2@NF electrodes. The NiCoP@NF electrode shows an ultrahigh specific capacitance of 2143 F g-1 at 1 A g-1 and retained 1615 F g-1 even at 20 A g-1, showing excellent rate performance. Furthermore, a binder-free all-solid-state asymmetric supercapacitor device is designed, which exhibits a high energy density of 27 W h kg-1 at a power density of 647 W kg-1. The hierarchical binary nickel-cobalt phosphide nanosheet arrays hold great promise as advanced electrode materials for supercapacitors with high electrochemical performance.

Interspace modification of titania-nanorod arrays for efficient mesoscopic perovskite solar cells

NASA Astrophysics Data System (ADS)

Chen, Peng; Jin, Zhixin; Wang, Yinglin; Wang, Meiqi; Chen, Shixin; Zhang, Yang; Wang, Lingling; Zhang, Xintong; Liu, Yichun

2017-04-01

Morphology of electron transport layers (ETLs) has an important influence on the device architecture and electronic processes of mesostructured solar cells. In this work, we thoroughly investigated the effect of the interspace of TiO2 nanorod (NR) arrays on the photovoltaic performance of the perovskite solar cells (PSCs). Along with the interspace in TiO2-NR arrays increasing, the thickness as well as the crystal size of perovskite capping layer are reduced accordingly, and the filling of perovskite in the channel becomes incomplete. Electrochemical impedance spectroscopy measurements reveal that this variation of perovskite absorber layer, induced by interspace of TiO2 NR arrays, causes the change of charge recombination process at the TiO2/perovskite interface, suggesting that a balance between capping layer and the perovskite filling is critical to obtain high charge collection efficiency of PSCs. A power conversion efficiency of 10.3% could be achieved through careful optimization of interspace in TiO2-NR arrays. Our research will shed light on the morphology control of ETLs with 1D structure for heterojunction solar cells fabricated by solution-deposited method.

Genetic variants associated with the root system architecture of oilseed rape (Brassica napus L.) under contrasting phosphate supply.

PubMed

Wang, Xiaohua; Chen, Yanling; Thomas, Catherine L; Ding, Guangda; Xu, Ping; Shi, Dexu; Grandke, Fabian; Jin, Kemo; Cai, Hongmei; Xu, Fangsen; Yi, Bin; Broadley, Martin R; Shi, Lei

2017-08-01

Breeding crops with ideal root system architecture for efficient absorption of phosphorus is an important strategy to reduce the use of phosphate fertilizers. To investigate genetic variants leading to changes in root system architecture, 405 oilseed rape cultivars were genotyped with a 60K Brassica Infinium SNP array in low and high P environments. A total of 285 single-nucleotide polymorphisms were associated with root system architecture traits at varying phosphorus levels. Nine single-nucleotide polymorphisms corroborate a previous linkage analysis of root system architecture quantitative trait loci in the BnaTNDH population. One peak single-nucleotide polymorphism region on A3 was associated with all root system architecture traits and co-localized with a quantitative trait locus for primary root length at low phosphorus. Two more single-nucleotide polymorphism peaks on A5 for root dry weight at low phosphorus were detected in both growth systems and co-localized with a quantitative trait locus for the same trait. The candidate genes identified on A3 form a haplotype 'BnA3Hap', that will be important for understanding the phosphorus/root system interaction and for the incorporation into Brassica napus breeding programs. © The Author 2017. Published by Oxford University Press on behalf of Kazusa DNA Research Institute.

A shared synapse architecture for efficient FPGA implementation of autoencoders.

PubMed

Suzuki, Akihiro; Morie, Takashi; Tamukoh, Hakaru

2018-01-01

This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers' units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks.

A shared synapse architecture for efficient FPGA implementation of autoencoders

PubMed Central

Morie, Takashi; Tamukoh, Hakaru

2018-01-01

This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers’ units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks. PMID:29543909

The ASTRI SST-2M telescope prototype for the Cherenkov Telescope Array: camera DAQ software architecture

NASA Astrophysics Data System (ADS)

Conforti, Vito; Trifoglio, Massimo; Bulgarelli, Andrea; Gianotti, Fulvio; Fioretti, Valentina; Tacchini, Alessandro; Zoli, Andrea; Malaguti, Giuseppe; Capalbi, Milvia; Catalano, Osvaldo

2014-07-01

ASTRI (Astrofisica con Specchi a Tecnologia Replicante Italiana) is a Flagship Project financed by the Italian Ministry of Education, University and Research, and led by INAF, the Italian National Institute of Astrophysics. Within this framework, INAF is currently developing an end-to-end prototype of a Small Size dual-mirror Telescope. In a second phase the ASTRI project foresees the installation of the first elements of the array at CTA southern site, a mini-array of 7 telescopes. The ASTRI Camera DAQ Software is aimed at the Camera data acquisition, storage and display during Camera development as well as during commissioning and operations on the ASTRI SST-2M telescope prototype that will operate at the INAF observing station located at Serra La Nave on the Mount Etna (Sicily). The Camera DAQ configuration and operations will be sequenced either through local operator commands or through remote commands received from the Instrument Controller System that commands and controls the Camera. The Camera DAQ software will acquire data packets through a direct one-way socket connection with the Camera Back End Electronics. In near real time, the data will be stored in both raw and FITS format. The DAQ Quick Look component will allow the operator to display in near real time the Camera data packets. We are developing the DAQ software adopting the iterative and incremental model in order to maximize the software reuse and to implement a system which is easily adaptable to changes. This contribution presents the Camera DAQ Software architecture with particular emphasis on its potential reuse for the ASTRI/CTA mini-array.

Solar Array Power Conditioning for a Spinning Satellite

NASA Astrophysics Data System (ADS)

De Luca, Antonio; Chirulli, Giovanni

2008-09-01

The conditioning of the output power from a solar array can mainly be achieved by the adoption of DET or MPPT based architecture. There are several factors that can orientate the choice of the system designer towards one solution or the other; some of them maybe inherent to the mission derived requirements (Illumination levels, EMC cleanliness, etc.), others come directly from a careful assessment of performances and losses of both power conditioner and solar array.Definition of the criteria on which basis the final choice is justified is important as they have to guarantee a clear determination of the available versus the required power in all those mission conditions identifiable as design drivers for the overall satellite system both in terms of mass and costs.Such criteria cannot just be simple theoretical enunciations of principles; nor the meticulous definition of them on a case by case basis for different types of missions as neither option gives a guarantee of being conclusive.The aim of this paper is then to suggest assessment steps and guidelines that can be considered generically valid for any mission case, starting from the exposition of the trade off activity performed in order to choose the power conditioning solution for a spinning satellite having unregulated power bus architecture. Calculations and numerical simulations have been made in order to establish the needed solar array surface in case of adoption of a DET or MPPT solution, taking into account temperature and illumination levels on the solar cells, as well as power losses and inefficiencies from the solar generator to the main power bus, in different mission phases. Particular attention has been taken in order to correctly evaluate the thermal effects on the rest of the spacecraft as function of the adopted power system regulation.

ALI (Autonomous Lunar Investigator): Revolutionary Approach to Exploring the Moon with Addressable Reconfigurable Technology

NASA Technical Reports Server (NTRS)

Clark, P. E.; Curtis, S. A.; Rilee, M. L.; Floyd, S. R.

2005-01-01

Addressable Reconfigurable Technology (ART) based structures: Mission Concepts based on Addressable Reconfigurable Technology (ART), originally studied for future ANTS (Autonomous Nanotechnology Swarm) Space Architectures, are now being developed as rovers for nearer term use in lunar and planetary surface exploration. The architecture is based on the reconfigurable tetrahedron as a building block. Tetrahedra are combined to form space-filling networks, shaped for the required function. Basic structural components are highly modular, addressable arrays of robust nodes (tetrahedral apices) from which highly reconfigurable struts (tetrahedral edges), acting as supports or tethers, are efficiently reversibly deployed/stowed, transforming and reshaping the structures as required.

New silicon architectures by gold-assisted chemical etching.

PubMed

Mikhael, Bechelany; Elise, Berodier; Xavier, Maeder; Sebastian, Schmitt; Johann, Michler; Laetitia, Philippe

2011-10-01

Silicon nanowires (SiNWs) were produced by nanosphere lithography and metal assisted chemical etching. The combination of these methods allows the morphology and organization control of Si NWs on a large area. From the investigation of major parameters affecting the etching such as doping type, doping concentration of the substrate, we demonstrate the formation of new Si architectures consisting of organized Si NW arrays formed on a micro/mesoporous silicon layer with different thickness. These investigations will allow us to better understand the mechanism of Si etching to enable a wide range of applications such as molecular sensing, and for thermoelectric and photovoltaic devices. © 2011 American Chemical Society

Parallel-Processing CMOS Circuitry for M-QAM and 8PSK TCM

NASA Technical Reports Server (NTRS)

Gray, Andrew; Lee, Dennis; Hoy, Scott; Fisher, Dave; Fong, Wai; Ghuman, Parminder

2009-01-01

There has been some additional development of parts reported in "Multi-Modulator for Bandwidth-Efficient Communication" (NPO-40807), NASA Tech Briefs, Vol. 32, No. 6 (June 2009), page 34. The focus was on 1) The generation of M-order quadrature amplitude modulation (M-QAM) and octonary-phase-shift-keying, trellis-coded modulation (8PSK TCM), 2) The use of square-root raised-cosine pulse-shaping filters, 3) A parallel-processing architecture that enables low-speed [complementary metal oxide/semiconductor (CMOS)] circuitry to perform the coding, modulation, and pulse-shaping computations at a high rate; and 4) Implementation of the architecture in a CMOS field-programmable gate array.

Artificial neuron operations and spike-timing-dependent plasticity using memristive devices for brain-inspired computing

NASA Astrophysics Data System (ADS)

Marukame, Takao; Nishi, Yoshifumi; Yasuda, Shin-ichi; Tanamoto, Tetsufumi

2018-04-01

The use of memristive devices for creating artificial neurons is promising for brain-inspired computing from the viewpoints of computation architecture and learning protocol. We present an energy-efficient multiplier accumulator based on a memristive array architecture incorporating both analog and digital circuitries. The analog circuitry is used to full advantage for neural networks, as demonstrated by the spike-timing-dependent plasticity (STDP) in fabricated AlO x /TiO x -based metal-oxide memristive devices. STDP protocols for controlling periodic analog resistance with long-range stability were experimentally verified using a variety of voltage amplitudes and spike timings.

Molecular architecture and biomedical leads of terpenes from red sea marine invertebrates.

PubMed

Hegazy, Mohamed Elamir F; Mohamed, Tarik A; Alhammady, Montaser A; Shaheen, Alaa M; Reda, Eman H; Elshamy, Abdelsamed I; Aziz, Mina; Paré, Paul W

2015-05-20

Marine invertebrates including sponges, soft coral, tunicates, mollusks and bryozoan have proved to be a prolific source of bioactive natural products. Among marine-derived metabolites, terpenoids have provided a vast array of molecular architectures. These isoprenoid-derived metabolites also exhibit highly specialized biological activities ranging from nerve regeneration to blood-sugar regulation. As a result, intense research activity has been devoted to characterizing invertebrate terpenes from both a chemical and biological standpoint. This review focuses on the chemistry and biology of terpene metabolites isolated from the Red Sea ecosystem, a unique marine biome with one of the highest levels of biodiversity and specifically rich in invertebrate species.

Micro-pixelation and color mixing in biological photonic structures (presentation video)

NASA Astrophysics Data System (ADS)

Bartl, Michael H.; Nagi, Ramneet K.

2014-03-01

The world of insects displays myriad hues of coloration effects produced by elaborate nano-scale architectures built into wings and exoskeleton. For example, we have recently found many weevils possess photonic architectures with cubic lattices. In this talk, we will present high-resolution three-dimensional reconstructions of weevil photonic structures with diamond and gyroid lattices. Moreover, by reconstructing entire scales we found arrays of single-crystalline domains, each oriented such that only selected crystal faces are visible to an observer. This pixel-like arrangement is key to the angle-independent coloration typical of weevils—a strategy that could enable a new generation of coating technologies.

A minimalist approach to receiver architecture

NASA Technical Reports Server (NTRS)

Collins, O.

1991-01-01

New signal processing techniques are described for Deep Space Network radios and a proposed receiver architecture is presented, as well as experimental results on this new receiver's analog front end. The receiver's design employs direct downconversion rather than high speed digitization, and it is just as suitable for use as a space based probe relay receiver as it is for installation at a ground antenna. The advantages of having an inexpensive, shoe box size receiver, which could be carried around to antennas of opportunity, used for spacecraft testing or installed in the base of every antenna in a large array are the force behind this project.

Integrated Power Source Grant

NASA Technical Reports Server (NTRS)

2001-01-01

Traditional spacecraft power systems incorporate a solar array energy source, an energy storage element (battery), and battery charge control and bus voltage regulation electronics to provide continuous electrical power for spacecraft systems and instruments. Dedicated power conditioning components provide limited fault isolation between systems and instruments, while a centralized power-switching unit provides spacecraft load control. Battery undervoltage conditions are detected by the spacecraft processor, which removes fault conditions and non-critical loads before permanent battery damage can occur. Cost effective operation of a micro-sat constellation requires a fault tolerant spacecraft architecture that minimizes on-orbit operational costs by permitting autonomous reconfiguration in response to unexpected fault conditions. A new micro-sat power system architecture that enhances spacecraft fault tolerance and improves power system survivability by continuously managing the battery charge and discharge processes on a cell-by-cell basis has been developed. This architecture is based on the Integrated Power Source (US patent 5644207), which integrates dual junction solar cells, Lithium Ion battery cells, and processor based charge control electronics into a structural panel that can be deployed or used to form a portion of the outer shell of a micro-spacecraft. The first generation Integrated Power Source is configured as a one inch thick panel in which prismatic Lithium Ion battery cells are arranged in a 3x7 matrix (26VDC) and a 3x1 matrix (3.7VDC) to provide the required output voltages and load currents. A multi-layer structure holds the battery cells, as well as the thermal insulators that are necessary to protect the Lithium Ion battery cells from the extreme temperatures of the solar cell layer. Independent thermal radiators, located on the back of the panel, are dedicated to the solar cell array, the electronics, and the battery cell array. In deployed panel applications, these radiators maintain the battery cells in an appropriate operational temperature range.

Digital Device Architecture and the Safe Use of Flash Devices in Munitions

NASA Technical Reports Server (NTRS)

Katz, Richard B.; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Digital devices of interest to designers include flash-based microcontrollers and field programmable gate arrays (FPGAs). Almost a decade ago, a study was undertaken to determine if flash-based microcontrollers could be safely used in fuzes and, if so, how should such devices be applied. The results were documented in the Technical Manual for the Use of Logic Devices in Safety Features. This paper will first review the Technical Manual and discuss the rationale behind the suggested architectures for microcontrollers and a brief review of the concern about data retention in flash cells. An architectural feature in the microcontroller under study will be discussed and its use will show how to screen for weak or failed cells during manufacture, storage, or immediately prior to use. As was done for microcontrollers a decade ago, architectures for a flash-based FPGA will be discussed, showing how it can be safely used in fuzes. Additionally, architectures for using non-volatile (including flash-based) storage will be discussed for SRAM-based FPGAs.

Remote hardware-reconfigurable robotic camera

NASA Astrophysics Data System (ADS)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar; Maya-Rueda, Selene E.

2001-10-01

In this work, a camera with integrated image processing capabilities is discussed. The camera is based on an imager coupled to an FPGA device (Field Programmable Gate Array) which contains an architecture for real-time computer vision low-level processing. The architecture can be reprogrammed remotely for application specific purposes. The system is intended for rapid modification and adaptation for inspection and recognition applications, with the flexibility of hardware and software reprogrammability. FPGA reconfiguration allows the same ease of upgrade in hardware as a software upgrade process. The camera is composed of a digital imager coupled to an FPGA device, two memory banks, and a microcontroller. The microcontroller is used for communication tasks and FPGA programming. The system implements a software architecture to handle multiple FPGA architectures in the device, and the possibility to download a software/hardware object from the host computer into its internal context memory. System advantages are: small size, low power consumption, and a library of hardware/software functionalities that can be exchanged during run time. The system has been validated with an edge detection and a motion processing architecture, which will be presented in the paper. Applications targeted are in robotics, mobile robotics, and vision based quality control.

CRF: detection of CRISPR arrays using random forest.

PubMed

Wang, Kai; Liang, Chun

2017-01-01

CRISPRs (clustered regularly interspaced short palindromic repeats) are particular repeat sequences found in wide range of bacteria and archaea genomes. Several tools are available for detecting CRISPR arrays in the genomes of both domains. Here we developed a new web-based CRISPR detection tool named CRF (CRISPR Finder by Random Forest). Different from other CRISPR detection tools, a random forest classifier was used in CRF to filter out invalid CRISPR arrays from all putative candidates and accordingly enhanced detection accuracy. In CRF, particularly, triplet elements that combine both sequence content and structure information were extracted from CRISPR repeats for classifier training. The classifier achieved high accuracy and sensitivity. Moreover, CRF offers a highly interactive web interface for robust data visualization that is not available among other CRISPR detection tools. After detection, the query sequence, CRISPR array architecture, and the sequences and secondary structures of CRISPR repeats and spacers can be visualized for visual examination and validation. CRF is freely available at http://bioinfolab.miamioh.edu/crf/home.php.

Towards a flexible array control and operation framework for CTA

NASA Astrophysics Data System (ADS)

Birsin, E.; Colomé, J.; Hoffmann, D.; Koeppel, H.; Lamanna, G.; Le Flour, T.; Lopatin, A.; Lyard, E.; Melkumyan, D.; Oya, I.; Panazol, J.-L.; Schlenstedt, S.; Schmidt, T.; Schwanke, U.; Stegmann, C.; Walter, R.; Wegner, P.; CTA Consortium

2012-12-01

The Cherenkov Telescope Array (CTA) [1] will be the successor to current Imaging Atmospheric Cherenkov Telescopes (IACT) like H.E.S.S., MAGIC and VERITAS. CTA will improve in sensitivity by about an order of magnitude compared to the current generation of IACTs. The energy range will extend from well below 100 GeV to above 100 TeV. To accomplish these goals, CTA will consist of two arrays, one in each hemisphere, consisting of 50-80 telescopes and composed of three different telescope types with different mirror sizes. It will be the first open observatory for very high energy γ-ray astronomy. The Array Control working group of CTA is currently evaluating existing technologies which are best suited for a project like CTA. The considered solutions comprise the ALMA Common Software (ACS), the OPC Unified Architecture (OPC UA) and the Data Distribution Service (DDS) for bulk data transfer. The first applications, like an automatic observation scheduler and the control software for some prototype instrumentation have been developed.

Exploring hierarchical FeS2/C composite nanotubes arrays as advanced cathode for lithium ion batteries

NASA Astrophysics Data System (ADS)

Pan, G. X.; Cao, F.; Xia, X. H.; Zhang, Y. J.

2016-11-01

Rational construction of advanced FeS2 cathode is one of research hotspots, and of great importance for developing high-performance lithium ion batteries (LIBs). Herein we report a facile hydrolysis-sulfurization method for fabrication of FeS2/C nanotubes arrays with the help of sacrificial Co2(OH)2CO3 nanowires template and glucose carbonization. Self-supported FeS2/C nanotubes consist of interconnected nanoburrs of 5-20 nm, and show hierarchical porous structure. The FeS2/C nanotubes arrays are demonstrated with enhanced cycling life and noticeable high-rate capability with capacities ranging from 735 mAh g-1 at 0.25 C to 482 mAh g-1 at 1.5 C, superior to those FeS2 counterparts in the literature. The composite nanotubes arrays architecture plays positive roles in the electrochemical enhancement due to combined advantages of large electrode-electrolyte contact area, good strain accommodation, improved electrical conductivity, and enhanced structural stability.

Two CMOS gate arrays for the EPACT experiment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Winkert, G.

1992-08-01

Two semicustom CMOS digital gate arrays are described in this paper which have been developed for the Energetic Particles: Acceleration, Composition, and Transport (EPACT) experiment. The first device, the 'Event Counters: 16 by 24-bit' (EC1624), implements sixteen 24-bit ripple counters and has flexible counting and readout options. The second device, the 'Serial Transmitter/Receiver' (SXR), is a multi-personality chip that can be used at either end of a serial, synchronous communications data link. It can be configured as a master in a central control unit, or as one of many slaves within remote assemblies. Together a network of SXRs allows formore » commanding and verification of distributed control signals. Both gate arrays are radiation hardened and qualified for space flight use. The architecture of each chip is presented and the benefits to the experiment summarized.« less

Ultra-Wideband Array in PCB for Millimeter-Wave 5G and ISM

NASA Technical Reports Server (NTRS)

Novak, Markus H.; Volakis, John L.; Miranda, Felix A.

2017-01-01

Growing mobile data consumption has prompted the exploration of the millimeter-wave spectrum for large bandwidth, high speed communications. However, the allocated bands are spread across a wide swath of spectrum: Fifth generation mobile architecture (5G): 28, 38, 39, 6471 GHz; Industrial, Scientific, and Medical bands (ISM): 24, 60 GHz. Moreover, high gain phased arrays are required to overcome the significant path loss associated with these frequencies. Further, it is necessary to incorporate several of these applications in a single, small size and low cost platform. To this end, we have developed a scanning, Ultra-Wideband (UWB) array which covers all 5G, ISM, and other mm-W bands from 2472 GHz. Critically, this is accomplished using mass-production Printed Circuit Board (PCB) fabrication. The results of this work are presented in this poster.

High-Performance LWIR Superlattice Detectors and FPA Based on CBIRD Design

NASA Technical Reports Server (NTRS)

Soibel, Alexander; Nguyen, Jean; Rafol, Sir B.; Liao, Anna; Hoeglund, Linda; Khoshakhlagh, Arezou; Keo, Sam A.; Mumolo, Jason M.; Liu, John; Ting, David Z.-Y.;

High-Performance LWIR Superlattice Detectors and FPA Based on CBIRD Design

NASA Technical Reports Server (NTRS)

Soibel, Alexander; Nguyen, Jean; Rafol, Sir B.; Liao, Anna; Hoeglund, Linda; Khoshakhlagh, Arezou; Keo, Sam A.; Mumolo, Jason M.; Liu, John; Ting, David Z.-Y.;

Programmable assembly of nanoarchitectures using genetically engineered viruses.

PubMed

Huang, Yu; Chiang, Chung-Yi; Lee, Soo Kwan; Gao, Yan; Hu, Evelyn L; De Yoreo, James; Belcher, Angela M

2005-07-01

Biological systems possess inherent molecular recognition and self-assembly capabilities and are attractive templates for constructing complex material structures with molecular precision. Here we report the assembly of various nanoachitectures including nanoparticle arrays, hetero-nanoparticle architectures, and nanowires utilizing highly engineered M13 bacteriophage as templates. The genome of M13 phage can be rationally engineered to produce viral particles with distinct substrate-specific peptides expressed on the filamentous capsid and the ends, providing a generic template for programmable assembly of complex nanostructures. Phage clones with gold-binding motifs on the capsid and streptavidin-binding motifs at one end are created and used to assemble Au and CdSe nanocrytals into ordered one-dimensional arrays and more complex geometries. Initial studies show such nanoparticle arrays can further function as templates to nucleate highly conductive nanowires that are important for addressing/interconnecting individual nanostructures.

Supercomputing on massively parallel bit-serial architectures

NASA Technical Reports Server (NTRS)

Iobst, Ken

1985-01-01

Research on the Goodyear Massively Parallel Processor (MPP) suggests that high-level parallel languages are practical and can be designed with powerful new semantics that allow algorithms to be efficiently mapped to the real machines. For the MPP these semantics include parallel/associative array selection for both dense and sparse matrices, variable precision arithmetic to trade accuracy for speed, micro-pipelined train broadcast, and conditional branching at the processing element (PE) control unit level. The preliminary design of a FORTRAN-like parallel language for the MPP has been completed and is being used to write programs to perform sparse matrix array selection, min/max search, matrix multiplication, Gaussian elimination on single bit arrays and other generic algorithms. A description is given of the MPP design. Features of the system and its operation are illustrated in the form of charts and diagrams.

Implementation of context independent code on a new array processor: The Super-65

NASA Technical Reports Server (NTRS)

Colbert, R. O.; Bowhill, S. A.

1981-01-01

The feasibility of rewriting standard uniprocessor programs into code which contains no context-dependent branches is explored. Context independent code (CIC) would contain no branches that might require different processing elements to branch different ways. In order to investigate the possibilities and restrictions of CIC, several programs were recoded into CIC and a four-element array processor was built. This processor (the Super-65) consisted of three 6502 microprocessors and the Apple II microcomputer. The results obtained were somewhat dependent upon the specific architecture of the Super-65 but within bounds, the throughput of the array processor was found to increase linearly with the number of processing elements (PEs). The slope of throughput versus PEs is highly dependent on the program and varied from 0.33 to 1.00 for the sample programs.

Fabrication of channeled scaffolds with ordered array of micro-pores through microsphere leaching and indirect Rapid Prototyping technique.

PubMed

Tan, J Y; Chua, C K; Leong, K F

2013-02-01

Advanced scaffold fabrication techniques such as Rapid Prototyping (RP) are generally recognized to be advantageous over conventional fabrication methods in terms architectural control and reproducibility. Yet, most RP techniques tend to suffer from resolution limitations which result in scaffolds with uncontrollable, random-size pores and low porosity, albeit having interconnected channels which is characteristically present in most RP scaffolds. With the increasing number of studies demonstrating the profound influences of scaffold pore architecture on cell behavior and overall tissue growth, a scaffold fabrication method with sufficient architectural control becomes imperative. The present study demonstrates the use of RP fabrication techniques to create scaffolds having interconnected channels as well as controllable micro-size pores. Adopted from the concepts of porogen leaching and indirect RP techniques, the proposed fabrication method uses monodisperse microspheres to create an ordered, hexagonal closed packed (HCP) array of micro-pores that surrounds the existing channels of the RP scaffold. The pore structure of the scaffold is shaped using a single sacrificial construct which comprises the microspheres and a dissolvable RP mold that were sintered together. As such, the size of pores as well as the channel configuration of the scaffold can be tailored based on the design of the RP mold and the size of microspheres used. The fabrication method developed in this work can be a promising alternative way of preparing scaffolds with customized pore structures that may be required for specific studies concerning cell-scaffold interactions.

Architecture and data processing alternatives for the TSE computer. Volume 3: Execution of a parallel counting algorithm using array logic (Tse) devices

NASA Technical Reports Server (NTRS)

Metcalfe, A. G.; Bodenheimer, R. E.

1976-01-01

A parallel algorithm for counting the number of logic-l elements in a binary array or image developed during preliminary investigation of the Tse concept is described. The counting algorithm is implemented using a basic combinational structure. Modifications which improve the efficiency of the basic structure are also presented. A programmable Tse computer structure is proposed, along with a hardware control unit, Tse instruction set, and software program for execution of the counting algorithm. Finally, a comparison is made between the different structures in terms of their more important characteristics.

Real-time radar signal processing using GPGPU (general-purpose graphic processing unit)

NASA Astrophysics Data System (ADS)

Kong, Fanxing; Zhang, Yan Rockee; Cai, Jingxiao; Palmer, Robert D.

2016-05-01

This study introduces a practical approach to develop real-time signal processing chain for general phased array radar on NVIDIA GPUs(Graphical Processing Units) using CUDA (Compute Unified Device Architecture) libraries such as cuBlas and cuFFT, which are adopted from open source libraries and optimized for the NVIDIA GPUs. The processed results are rigorously verified against those from the CPUs. Performance benchmarked in computation time with various input data cube sizes are compared across GPUs and CPUs. Through the analysis, it will be demonstrated that GPGPUs (General Purpose GPU) real-time processing of the array radar data is possible with relatively low-cost commercial GPUs.

Opto-VLSI-based photonic true-time delay architecture for broadband adaptive nulling in phased array antennas.

PubMed

Juswardy, Budi; Xiao, Feng; Alameh, Kamal

2009-03-16

This paper proposes a novel Opto-VLSI-based tunable true-time delay generation unit for adaptively steering the nulls of microwave phased array antennas. Arbitrary single or multiple true-time delays can simultaneously be synthesized for each antenna element by slicing an RF-modulated broadband optical source and routing specific sliced wavebands through an Opto-VLSI processor to a high-dispersion fiber. Experimental results are presented, which demonstrate the principle of the true-time delay unit through the generation of 5 arbitrary true-time delays of up to 2.5 ns each. (c) 2009 Optical Society of America

Full-mesh T- and O-band wavelength router based on arrayed waveguide gratings.

PubMed

Idris, Nazirul A; Yoshizawa, Katsumi; Tomomatsu, Yasunori; Sudo, Makoto; Hajikano, Tadashi; Kubo, Ryogo; Zervas, Georgios; Tsuda, Hiroyuki

2016-01-11

We propose an ultra-broadband full-mesh wavelength router supporting the T- and O-bands using 3 stages of cascaded arrayed waveguide gratings (AWGs). The router architecture is based on a combination of waveband and channel routing by coarse and fine AWGs, respectively. We fabricated several T-band-specific silica-based AWGs and quantum dot semiconductor optical ampliers as part of the router, and demonstrated 10 Gbps data transmission for several wavelengths throughout a range of 7.4 THz. The power penalties were below 1 dB. Wavelength routing was also demonstrated, where tuning time within a 9.4-nm-wide waveband was below 400 ms.

Integrated phased array for wide-angle beam steering.

PubMed

Yaacobi, Ami; Sun, Jie; Moresco, Michele; Leake, Gerald; Coolbaugh, Douglas; Watts, Michael R

2014-08-01

We demonstrate an on-chip optical phased array fabricated in a CMOS compatible process with continuous, fast (100 kHz), wide-angle (51°) beam-steering suitable for applications such as low-cost LIDAR systems. The device demonstrates the largest (51°) beam-steering and beam-spacing to date while providing the ability to steer continuously over the entire range. Continuous steering is enabled by a cascaded phase shifting architecture utilizing, low power and small footprint, thermo-optic phase shifters. We demonstrate these results in the telecom C-band, but the same design can easily be adjusted for any wavelength between 1.2 and 3.5 μm.

Real time processor for array speckle interferometry

NASA Astrophysics Data System (ADS)

Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

1989-02-01

The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

Real time processor for array speckle interferometry

NASA Technical Reports Server (NTRS)

Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

1989-01-01

The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

High brightness photonic lantern kW-class amplifier

NASA Astrophysics Data System (ADS)

Montoya, Juan; Hwang, Chris; Aleshire, Chris; Reed, Patricia; Martz, Dale; Riley, Mike; Trainor, Michael; Belley, Catherine; Shaw, Scot; Fan, T. Y.; Ripin, Dan

2018-02-01

Pump-limited kW-class operation in a multimode fiber amplifier using adaptive mode control was achieved. A photonic lantern front end was used to inject an arbitrary superposition of modes on the input to a kW-class fiber amplifier to achieve a nearly diffraction-limited output. We report on the adaptive spatial mode control architecture which allows for compensating transverse-mode disturbances at high power. We also describe the advantages of adaptive spatial mode control for optical phased array systems. In particular, we show that the additional degrees of freedom allow for broader steering and improved atmospheric turbulence compensation relative to piston-only optical phased arrays.

An Introduction to MAMA (Meta-Analysis of MicroArray data) System.

PubMed

Zhang, Zhe; Fenstermacher, David

2005-01-01

Analyzing microarray data across multiple experiments has been proven advantageous. To support this kind of analysis, we are developing a software system called MAMA (Meta-Analysis of MicroArray data). MAMA utilizes a client-server architecture with a relational database on the server-side for the storage of microarray datasets collected from various resources. The client-side is an application running on the end user's computer that allows the user to manipulate microarray data and analytical results locally. MAMA implementation will integrate several analytical methods, including meta-analysis within an open-source framework offering other developers the flexibility to plug in additional statistical algorithms.

Overcoming the brittleness of glass through bio-inspiration and micro-architecture.

PubMed

Mirkhalaf, M; Dastjerdi, A Khayer; Barthelat, F

2014-01-01

Highly mineralized natural materials such as teeth or mollusk shells boast unusual combinations of stiffness, strength and toughness currently unmatched by engineering materials. While high mineral contents provide stiffness and hardness, these materials also contain weaker interfaces with intricate architectures, which can channel propagating cracks into toughening configurations. Here we report the implementation of these features into glass, using a laser engraving technique. Three-dimensional arrays of laser-generated microcracks can deflect and guide larger incoming cracks, following the concept of 'stamp holes'. Jigsaw-like interfaces, infiltrated with polyurethane, furthermore channel cracks into interlocking configurations and pullout mechanisms, significantly enhancing energy dissipation and toughness. Compared with standard glass, which has no microstructure and is brittle, our bio-inspired glass displays built-in mechanisms that make it more deformable and 200 times tougher. This bio-inspired approach, based on carefully architectured interfaces, provides a new pathway to toughening glasses, ceramics or other hard and brittle materials.

Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems.

PubMed

Park, Jongkil; Yu, Theodore; Joshi, Siddharth; Maier, Christoph; Cauwenberghs, Gert

2017-10-01

We present a hierarchical address-event routing (HiAER) architecture for scalable communication of neural and synaptic spike events between neuromorphic processors, implemented with five Xilinx Spartan-6 field-programmable gate arrays and four custom analog neuromophic integrated circuits serving 262k neurons and 262M synapses. The architecture extends the single-bus address-event representation protocol to a hierarchy of multiple nested buses, routing events across increasing scales of spatial distance. The HiAER protocol provides individually programmable axonal delay in addition to strength for each synapse, lending itself toward biologically plausible neural network architectures, and scales across a range of hierarchies suitable for multichip and multiboard systems in reconfigurable large-scale neuromorphic systems. We show approximately linear scaling of net global synaptic event throughput with number of routing nodes in the network, at 3.6×10 7 synaptic events per second per 16k-neuron node in the hierarchy.

The BLAZE language - A parallel language for scientific programming

NASA Technical Reports Server (NTRS)

Mehrotra, Piyush; Van Rosendale, John

1987-01-01

A Pascal-like scientific programming language, BLAZE, is described. BLAZE contains array arithmetic, forall loops, and APL-style accumulation operators, which allow natural expression of fine grained parallelism. It also employs an applicative or functional procedure invocation mechanism, which makes it easy for compilers to extract coarse grained parallelism using machine specific program restructuring. Thus BLAZE should allow one to achieve highly parallel execution on multiprocessor architectures, while still providing the user with conceptually sequential control flow. A central goal in the design of BLAZE is portability across a broad range of parallel architectures. The multiple levels of parallelism present in BLAZE code, in principle, allow a compiler to extract the types of parallelism appropriate for the given architecture while neglecting the remainder. The features of BLAZE are described and it is shown how this language would be used in typical scientific programming.

SAD-Based Stereo Matching Using FPGAs

NASA Astrophysics Data System (ADS)

Ambrosch, Kristian; Humenberger, Martin; Kubinger, Wilfried; Steininger, Andreas

In this chapter we present a field-programmable gate array (FPGA) based stereo matching architecture. This architecture uses the sum of absolute differences (SAD) algorithm and is targeted at automotive and robotics applications. The disparity maps are calculated using 450×375 input images and a disparity range of up to 150 pixels. We discuss two different implementation approaches for the SAD and analyze their resource usage. Furthermore, block sizes ranging from 3×3 up to 11×11 and their impact on the consumed logic elements as well as on the disparity map quality are discussed. The stereo matching architecture enables a frame rate of up to 600 fps by calculating the data in a highly parallel and pipelined fashion. This way, a software solution optimized by using Intel's Open Source Computer Vision Library running on an Intel Pentium 4 with 3 GHz clock frequency is outperformed by a factor of 400.

Overcoming the brittleness of glass through bio-inspiration and micro-architecture

NASA Astrophysics Data System (ADS)

Mirkhalaf, M.; Dastjerdi, A. Khayer; Barthelat, F.

2014-01-01

Highly mineralized natural materials such as teeth or mollusk shells boast unusual combinations of stiffness, strength and toughness currently unmatched by engineering materials. While high mineral contents provide stiffness and hardness, these materials also contain weaker interfaces with intricate architectures, which can channel propagating cracks into toughening configurations. Here we report the implementation of these features into glass, using a laser engraving technique. Three-dimensional arrays of laser-generated microcracks can deflect and guide larger incoming cracks, following the concept of ‘stamp holes’. Jigsaw-like interfaces, infiltrated with polyurethane, furthermore channel cracks into interlocking configurations and pullout mechanisms, significantly enhancing energy dissipation and toughness. Compared with standard glass, which has no microstructure and is brittle, our bio-inspired glass displays built-in mechanisms that make it more deformable and 200 times tougher. This bio-inspired approach, based on carefully architectured interfaces, provides a new pathway to toughening glasses, ceramics or other hard and brittle materials.

Unified Access Architecture for Large-Scale Scientific Datasets

NASA Astrophysics Data System (ADS)

Karna, Risav

2014-05-01

Data-intensive sciences have to deploy diverse large scale database technologies for data analytics as scientists have now been dealing with much larger volume than ever before. While array databases have bridged many gaps between the needs of data-intensive research fields and DBMS technologies (Zhang 2011), invocation of other big data tools accompanying these databases is still manual and separate the database management's interface. We identify this as an architectural challenge that will increasingly complicate the user's work flow owing to the growing number of useful but isolated and niche database tools. Such use of data analysis tools in effect leaves the burden on the user's end to synchronize the results from other data manipulation analysis tools with the database management system. To this end, we propose a unified access interface for using big data tools within large scale scientific array database using the database queries themselves to embed foreign routines belonging to the big data tools. Such an invocation of foreign data manipulation routines inside a query into a database can be made possible through a user-defined function (UDF). UDFs that allow such levels of freedom as to call modules from another language and interface back and forth between the query body and the side-loaded functions would be needed for this purpose. For the purpose of this research we attempt coupling of four widely used tools Hadoop (hadoop1), Matlab (matlab1), R (r1) and ScaLAPACK (scalapack1) with UDF feature of rasdaman (Baumann 98), an array-based data manager, for investigating this concept. The native array data model used by an array-based data manager provides compact data storage and high performance operations on ordered data such as spatial data, temporal data, and matrix-based data for linear algebra operations (scidbusr1). Performances issues arising due to coupling of tools with different paradigms, niche functionalities, separate processes and output data formats have been anticipated and considered during the design of the unified architecture. The research focuses on the feasibility of the designed coupling mechanism and the evaluation of the efficiency and benefits of our proposed unified access architecture. Zhang 2011: Zhang, Ying and Kersten, Martin and Ivanova, Milena and Nes, Niels, SciQL: Bridging the Gap Between Science and Relational DBMS, Proceedings of the 15th Symposium on International Database Engineering Applications, 2011. Baumann 98: Baumann, P., Dehmel, A., Furtado, P., Ritsch, R., Widmann, N., "The Multidimensional Database System RasDaMan", SIGMOD 1998, Proceedings ACM SIGMOD International Conference on Management of Data, June 2-4, 1998, Seattle, Washington, 1998. hadoop1: hadoop.apache.org, "Hadoop", http://hadoop.apache.org/, [Online; accessed 12-Jan-2014]. scalapack1: netlib.org/scalapack, "ScaLAPACK", http://www.netlib.org/scalapack,[Online; accessed 12-Jan-2014]. r1: r-project.org, "R", http://www.r-project.org/,[Online; accessed 12-Jan-2014]. matlab1: mathworks.com, "Matlab Documentation", http://www.mathworks.de/de/help/matlab/,[Online; accessed 12-Jan-2014]. scidbusr1: scidb.org, "SciDB User's Guide", http://scidb.org/HTMLmanual/13.6/scidb_ug,[Online; accessed 01-Dec-2013].

From GUI to Gallery: A Study of Online Virtual Environments.

ERIC Educational Resources Information Center

Guynup, Stephen Lawrence

This paper began as an attempt to clarify and classify the development of Web3D environments from 1995 to the present. In that process, important facts came to light. A large proportion of these sites were virtual galleries and museums. Second, these same environments covered a wide array of architectural interpretations and represented some of…

Antenna Technologies for NASA Applications

NASA Technical Reports Server (NTRS)

Miranda, Felix

2007-01-01

This presentation addresses the efforts being performed at GRC to develop antenna technology in support of NASA s Exploration Vision. In particular, the presentation discusses the communications architecture asset-specific data services, as well as wide area coverage, high gain, low mass deployable antennas. Phased array antennas as well as electrically small, lightweight, low power, multifunctional antennas will be also discussed.

Antenna Technologies for NASA Applications

NASA Technical Reports Server (NTRS)

Miranda, Felix A.

2006-01-01

This presentation addresses the efforts being performed at GRC to develop antenna technology in support of NASA s Exploration Vision. In particular, the presentation discusses the communications architecture asset-specific data services, as well as wide area coverage, high gain, low mass deployable antennas. Phased array antennas as well as electrically small, lightweight, low power, multifunctional antennas will be also discussed.

System and Method for Dynamic Aeroelastic Control

NASA Technical Reports Server (NTRS)

Suh, Peter M. (Inventor)

2015-01-01

The present invention proposes a hardware and software architecture for dynamic modal structural monitoring that uses a robust modal filter to monitor a potentially very large-scale array of sensors in real time, and tolerant of asymmetric sensor noise and sensor failures, to achieve aircraft performance optimization such as minimizing aircraft flutter, drag and maximizing fuel efficiency.

Similar genetic architecture with shared and unique quantitative trait loci for bacterial cold water disease resistance in two rainbow trout breeding populations

USDA-ARS?s Scientific Manuscript database

Bacterial cold water disease (BCWD) causes significant mortality and economic losses in salmonid aquaculture. In previous studies, we identified moderate-large effect QTL for BCWD resistance in rainbow trout (Oncorhynchus mykiss). However, the recent availability of a 57K SNP array and a genome phys...

Aerospace Applications Conference, Steamboat Springs, CO, Feb. 1-8, 1986, Digest

NASA Astrophysics Data System (ADS)

The present conference considers topics concerning the projected NASA Space Station's systems, digital signal and data processing applications, and space science and microwave applications. Attention is given to Space Station video and audio subsystems design, clock error, jitter, phase error and differential time-of-arrival in satellite communications, automation and robotics in space applications, target insertion into synthetic background scenes, and a novel scheme for the computation of the discrete Fourier transform on a systolic processor. Also discussed are a novel signal parameter measurement system employing digital signal processing, EEPROMS for spacecraft applications, a unique concurrent processor architecture for high speed simulation of dynamic systems, a dual polarization flat plate antenna, Fresnel diffraction, and ultralinear TWTs for high efficiency satellite communications.

Thermal management of quantum cascade lasers in an individually addressable monolithic array architecture

NASA Astrophysics Data System (ADS)

Missaggia, Leo; Wang, Christine; Connors, Michael; Saar, Brian; Sanchez-Rubio, Antonio; Creedon, Kevin; Turner, George; Herzog, William

2016-03-01

There are a number of military and commercial applications for high-power laser systems in the mid-to-long-infrared wavelength range. By virtue of their demonstrated watt-level performance and wavelength diversity, quantum cascade laser (QCL) and amplifier devices are an excellent choice of emitter for those applications. To realize the power levels of interest, beam combining of arrays of these emitters is required and as a result, array technology must be developed. With this in mind, packaging and thermal management strategies were developed to facilitate the demonstration of a monolithic QCL array operating under CW conditions. Thermal models were constructed and simulations performed to determine the effect of parameters such as array-element ridge width and pitch on gain region temperature rise. The results of the simulations were considered in determining an appropriate QCL array configuration. State-of-the-art micro-impingement cooling along with an electrical distribution scheme comprised of AlN multi-layer technology were integrated into the design. The design of the module allows for individual electrical addressability of the array elements, a method of phase control demonstrated previously for coherent beam combining of diode arrays, along with access to both front and rear facets. Hence, both laser and single-pass amplifier arrays can be accommodated. A module was realized containing a 5 mm cavity length monolithic QCL array comprised of 7 elements on 450 m pitch. An output power of 3.16 W was demonstrated under CW conditions at an emission wavelength of 9μm.

Augmented longitudinal acoustic trap for scalable microparticle enrichment.

PubMed

Cui, M; Binkley, M M; Shekhani, H N; Berezin, M Y; Meacham, J M

2018-05-01

We introduce an acoustic microfluidic device architecture that locally augments the pressure field for separation and enrichment of targeted microparticles in a longitudinal acoustic trap. Pairs of pillar arrays comprise "pseudo walls" that are oriented perpendicular to the inflow direction. Though sample flow is unimpeded, pillar arrays support half-wave resonances that correspond to the array gap width. Positive acoustic contrast particles of supracritical diameter focus to nodal locations of the acoustic field and are held against drag from the bulk fluid motion. Thus, the longitudinal standing bulk acoustic wave (LSBAW) device achieves size-selective and material-specific separation and enrichment of microparticles from a continuous sample flow. A finite element analysis model is used to predict eigenfrequencies of LSBAW architectures with two pillar geometries, slanted and lamellar. Corresponding pressure fields are used to identify longitudinal resonances that are suitable for microparticle enrichment. Optimal operating conditions exhibit maxima in the ratio of acoustic energy density in the LSBAW trap to that in inlet and outlet regions of the microchannel. Model results guide fabrication and experimental evaluation of realized LSBAW assemblies regarding enrichment capability. We demonstrate separation and isolation of 20  μ m polystyrene and ∼10  μ m antibody-decorated glass beads within both pillar geometries. The results also establish several practical attributes of our approach. The LSBAW device is inherently scalable and enables continuous enrichment at a prescribed location. These features benefit separations applications while also allowing concurrent observation and analysis of trap contents.

Self-assembled templates for the generation of arrays of 1-dimensional nanostructures: from molecules to devices.

PubMed

Farrell, Richard A; Petkov, Nikolay; Morris, Michael A; Holmes, Justin D

2010-09-15

Self-assembled nanoscale porous architectures, such as mesoporous silica (MPS) films, block copolymer films (BCP) and porous anodic aluminas (PAAs), are ideal hosts for templating one dimensional (1D) nano-entities for a wide range of electronic, photonic, magnetic and environmental applications. All three of these templates can provide scalable and tunable pore diameters below 20 nm [1-3]. Recently, research has progressed towards controlling the pore direction, orientation and long-range order of these nanostructures through so-called directed self-assembly (DSA). Significantly, the introduction of a wide range of top-down chemically and physically pre-patterning substrates has facilitated the DSA of nanostructures into functional device arrays. The following review begins with an overview of the fundamental aspects of self-assembly and ordering processes during the formation of PAAs, BCPs and MPS films. Special attention is given to the different ways of directing self-assembly, concentrating on properties such as uni-directional alignment, precision placement and registry of the self-assembled structures to hierarchal or top-down architectures. Finally, to distinguish this review from other articles we focus on research where nanostructures have been utilised in part to fabricate arrays of functioning devices below the sub 50 nm threshold, by subtractive transfer and additive methods. Where possible, we attempt to compare and contrast the different templating approaches and highlight the strengths and/or limitations that will be important for their potential integration into downstream processes. Copyright 2010 Elsevier Inc. All rights reserved.