Multi-wafer bonding technology for the integration of a micromachined Mirau interferometer

NASA Astrophysics Data System (ADS)

Wang, Wei-Shan; Lullin, Justine; Froemel, Joerg; Wiemer, Maik; Bargiel, Sylwester; Passilly, Nicolas; Gorecki, Christophe; Gessner, Thomas

2015-02-01

The paper presents the multi-wafer bonding technology as well as the integration of electrical connection to the zscanner wafer of the micromachined array-type Mirau interferometer. A Mirau interferometer, which is a key-component of optical coherence tomography (OCT) microsystem, consists of a microlens doublet, a MOEMS Z-scanner, a focusadjustment spacer and a beam splitter plate. For the integration of this MOEMS device heterogeneous bonding of Si, glass and SOI wafers is necessary. Previously, most of the existing methods for multilayer wafer bonding require annealing at high temperature, i.e., 1100°C. To be compatible with MEMS devices, bonding of different material stacks at temperatures lower than 400°C has also been investigated. However, if more components are involved, it becomes less effective due to the alignment accuracy or degradation of surface quality of the not-bonded side after each bonding operation. The proposed technology focuses on 3D integration of heterogeneous building blocks, where the assembly process is compatible with the materials of each wafer stack and with position accuracy which fits optical requirement. A demonstrator with up to 5 wafers bonded lower than 400°C is presented and bond interfaces are evaluated. To avoid the complexity of through wafer vias, a design which creates electrical connections along vertical direction by mounting a wafer stack on a flip chip PCB is proposed. The approach, which adopts vertically-stacked wafers along with electrical connection functionality, provides not only a space-effective integration of MOEMS device but also a design where the Mirau stack can be further integrated with other components of the OCT microsystem easily.

A Wafer-Bonded, Floating Element Shear-Stress Sensor Using a Geometric Moire Optical Transduction Technique

NASA Technical Reports Server (NTRS)

Horowitz, Stephen; Chen, Tai-An; Chandrasekaran, Venkataraman; Tedjojuwono, Ken; Cattafesta, Louis; Nishida, Toshikazu; Sheplak, Mark

2004-01-01

This paper presents a geometric Moir optical-based floating-element shear stress sensor for wind tunnel turbulence measurements. The sensor was fabricated using an aligned wafer-bond/thin-back process producing optical gratings on the backside of a floating element and on the top surface of the support wafer. Measured results indicate a static sensitivity of 0.26 microns/Pa, a resonant frequency of 1.7 kHz, and a noise floor of 6.2 mPa/(square root)Hz.

Microwave Induced Direct Bonding of Single Crystal Silicon Wafers

NASA Technical Reports Server (NTRS)

Budraa, N. K.; Jackson, H. W.; Barmatz, M.

1999-01-01

We have heated polished doped single-crystal silicon wafers in a single mode microwave cavity to temperatures where surface to surface bonding occurred. The absorption of microwaves and heating of the wafers is attributed to the inclusion of n-type or p-type impurities into these substrates. A cylindrical cavity TM (sub 010) standing wave mode was used to irradiate samples of various geometry's at positions of high magnetic field. This process was conducted in vacuum to exclude plasma effects. This initial study suggests that the inclusion of impurities in single crystal silicon significantly improved its microwave absorption (loss factor) to a point where heating silicon wafers directly can be accomplished in minimal time. Bonding of these substrates, however, occurs only at points of intimate surface to surface contact. The inclusion of a thin metallic layer on the surfaces enhances the bonding process.

Fabrication of a high aspect ratio thick silicon wafer mold and electroplating using flipchip bonding for MEMS applications

NASA Astrophysics Data System (ADS)

Kim, Bong-Hwan; Kim, Jong-Bok

2009-06-01

We have developed a microfabrication process for high aspect ratio thick silicon wafer molds and electroplating using flipchip bonding with THB 151N negative photoresist (JSR micro). This fabrication technique includes large area and high thickness silicon wafer mold electroplating. The process consists of silicon deep reactive ion etching (RIE) of the silicon wafer mold, photoresist bonding between the silicon mold and the substrate, nickel electroplating and a silicon removal process. High thickness silicon wafer molds were made by deep RIE and flipchip bonding. In addition, nickel electroplating was developed. Dry film resist (ORDYL MP112, TOK) and thick negative-tone photoresist (THB 151N, JSR micro) were used as bonding materials. In order to measure the bonding strength, the surface energy was calculated using a blade test. The surface energy of the bonding wafers was found to be 0.36-25.49 J m-2 at 60-180 °C for the dry film resist and 0.4-1.9 J m-2 for THB 151N in the same temperature range. Even though ORDYL MP112 has a better value of surface energy than THB 151N, it has a critical disadvantage when it comes to removing residue after electroplating. The proposed process can be applied to high aspect ratio MEMS structures, such as air gap inductors or vertical MEMS probe tips.

Room-temperature wafer bonding of LiNbO3 and SiO2 using a modified surface activated bonding method

NASA Astrophysics Data System (ADS)

Takigawa, Ryo; Higurashi, Eiji; Asano, Tanemasa

2018-06-01

In this paper, we report room-temperature bonding of LiNbO3 (LN) and SiO2/Si for the realization of a LN on insulator (LNOI)/Si hybrid wafer. We investigate the applicability of a modified surface activated bonding (SAB) method for the direct bonding of LN and a thermally grown SiO2 layer. The modified SAB method using ion beam bombardment demonstrates the room-temperature wafer bonding of LN and SiO2. The bonded wafer was successfully cut into 0.5 × 0.5 mm2 dies without interfacial debonding owing to the applied stress during dicing. In addition, the surface energy of the bonded wafer was estimated to be approximately 1.8 J/m2 using the crack opening method. These results indicate that a strong bond strength can be achieved, which may be sufficient for device applications.

Wafer-scale layer transfer of GaAs and Ge onto Si wafers using patterned epitaxial lift-off

NASA Astrophysics Data System (ADS)

Mieda, Eiko; Maeda, Tatsuro; Miyata, Noriyuki; Yasuda, Tetsuji; Kurashima, Yuichi; Maeda, Atsuhiko; Takagi, Hideki; Aoki, Takeshi; Yamamoto, Taketsugu; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko; Ogawa, Arito; Kikuchi, Toshiyuki; Kunii, Yasuo

2015-03-01

We have developed a wafer-scale layer-transfer technique for transferring GaAs and Ge onto Si wafers of up to 300 mm in diameter. Lattice-matched GaAs or Ge layers were epitaxially grown on GaAs wafers using an AlAs release layer, which can subsequently be transferred onto a Si handle wafer via direct wafer bonding and patterned epitaxial lift-off (ELO). The crystal properties of the transferred GaAs layers were characterized by X-ray diffraction (XRD), photoluminescence, and the quality of the transferred Ge layers was characterized using Raman spectroscopy. We find that, after bonding and the wet ELO processes, the quality of the transferred GaAs and Ge layers remained the same compared to that of the as-grown epitaxial layers. Furthermore, we realized Ge-on-insulator and GaAs-on-insulator wafers by wafer-scale pattern ELO technique.

Cohesive zone modelling of wafer bonding and fracture: effect of patterning and toughness variations

NASA Astrophysics Data System (ADS)

Kubair, D. V.; Spearing, S. M.

2006-03-01

Direct wafer bonding has increasingly become popular in the manufacture of microelectromechanical systems and semiconductor microelectronics components. The success of the bonding process is controlled by variables such as wafer flatness and surface preparation. In order to understand the effects of these variables, spontaneous planar crack propagation simulations were performed using the spectral scheme in conjunction with a cohesive zone model. The fracture-toughness on the bond interface is varied to simulate the effect of surface roughness (nanotopography) and patterning. Our analysis indicated that the energetics of crack propagation is sensitive to the local surface property variations. The patterned wafers are tougher (well bonded) than the unpatterned ones of the same average fracture-toughness.

Transfer of InP epilayers by wafer bonding

NASA Astrophysics Data System (ADS)

Hjort, Klas

2004-08-01

Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

Vertical integration of array-type miniature interferometers at wafer level by using multistack anodic bonding

NASA Astrophysics Data System (ADS)

Wang, Wei-Shan; Wiemer, Maik; Froemel, Joerg; Enderlein, Tom; Gessner, Thomas; Lullin, Justine; Bargiel, Sylwester; Passilly, Nicolas; Albero, Jorge; Gorecki, Christophe

2016-04-01

In this work, vertical integration of miniaturized array-type Mirau interferometers at wafer level by using multi-stack anodic bonding is presented. Mirau interferometer is suitable for MEMS metrology and for medical imaging according to its vertical-, lateral- resolutions and working distances. Miniaturized Mirau interferometer can be a promising candidate as a key component of an optical coherence tomography (OCT) system. The miniaturized array-type interferometer consists of a microlens doublet, a Si-based MEMS Z scanner, a spacer for focus-adjustment and a beam splitter. Therefore, bonding technologies which are suitable for heterogeneous substrates are of high interest and necessary for the integration of MEMS/MOEMS devices. Multi-stack anodic bonding, which meets the optical and mechanical requirements of the MOEMS device, is adopted to integrate the array-type interferometers. First, the spacer and the beam splitter are bonded, followed by bonding of the MEMS Z scanner. In the meanwhile, two microlenses, which are composed of Si and glass wafers, are anodically bonded to form a microlens doublet. Then, the microlens doublet is aligned and bonded with the scanner/spacer/beam splitter stack. The bonded array-type interferometer is a 7- wafer stack and the thickness is approximately 5mm. To separate such a thick wafer stack with various substrates, 2-step laser cutting is used to dice the bonded stack into Mirau chips. To simplify fabrication process of each component, electrical connections are created at the last step by mounting a Mirau chip onto a flip chip PCB instead of through wafer vias. Stability of Au/Ti films on the MEMS Z scanner after anodic bonding, laser cutting and flip chip bonding are discussed as well.

High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor.

PubMed

Wang, Liying; Du, Xiaohui; Wang, Lingyun; Xu, Zhanhao; Zhang, Chenying; Gu, Dandan

2017-03-16

In order to achieve and maintain a high quality factor (high-Q) for the micro resonant pressure sensor, this paper presents a new wafer level package by adopting cross-layer anodic bonding technique of the glass/silicon/silica (GSS) stackable structure and integrated Ti getter. A double-layer structure similar to a silicon-on-insulator (SOI) wafer is formed after the resonant layer and the pressure-sensitive layer are bonded by silicon direct bonding (SDB). In order to form good bonding quality between the pressure-sensitive layer and the glass cap layer, the cross-layer anodic bonding technique is proposed for vacuum package by sputtering Aluminum (Al) on the combination wafer of the pressure-sensitive layer and the resonant layer to achieve electrical interconnection. The model and the bonding effect of this technique are discussed. In addition, in order to enhance the performance of titanium (Ti) getter, the prepared and activation parameters of Ti getter under different sputtering conditions are optimized and discussed. Based on the optimized results, the Ti getter (thickness of 300 nm to 500 nm) is also deposited on the inside of the glass groove by magnetron sputtering to maintain stable quality factor (Q). The Q test of the built testing system shows that the number of resonators with a Q value of more than 10,000 accounts for more than 73% of the total. With an interval of 1.5 years, the Q value of the samples remains almost constant. It proves the proposed cross-layer anodic bonding and getter technique can realize high-Q resonant structure for long-term stable operation.

Fabricating capacitive micromachined ultrasonic transducers with a novel silicon-nitride-based wafer bonding process.

PubMed

Logan, Andrew; Yeow, John T W

2009-05-01

We report the fabrication and experimental testing of 1-D 23-element capacitive micromachined ultrasonic transducer (CMUT) arrays that have been fabricated using a novel wafer-bonding process whereby the membrane and the insulation layer are both silicon nitride. The membrane and cell cavities are deposited and patterned on separate wafers and fusion-bonded in a vacuum environment to create CMUT cells. A user-grown silicon-nitride membrane layer avoids the need for expensive silicon-on-insulator (SOI) wafers, reduces parasitic capacitance, and reduces dielectric charging. It allows more freedom in selecting the membrane thickness while also providing the benefits of wafer-bonding fabrication such as excellent fill factor, ease of vacuum sealing, and a simplified fabrication process when compared with the more standard sacrificial release process. The devices fabricated have a cell diameter of 22 microm, a membrane thickness of 400 nm, a gap depth of 150 nm, and an insulation thickness of 250 nm. The resonant frequency of the CMUT in air is 17 MHz and has an attenuation compensated center frequency of approximately 9 MHz in immersion with a -6 dB fractional bandwidth of 123%. This paper presents the fabrication process and some characterization results.

Room-temperature bonding of epitaxial layer to carbon-cluster ion-implanted silicon wafers for CMOS image sensors

NASA Astrophysics Data System (ADS)

Koga, Yoshihiro; Kadono, Takeshi; Shigematsu, Satoshi; Hirose, Ryo; Onaka-Masada, Ayumi; Okuyama, Ryousuke; Okuda, Hidehiko; Kurita, Kazunari

2018-06-01

We propose a fabrication process for silicon wafers by combining carbon-cluster ion implantation and room-temperature bonding for advanced CMOS image sensors. These carbon-cluster ions are made of carbon and hydrogen, which can passivate process-induced defects. We demonstrated that this combination process can be used to form an epitaxial layer on a carbon-cluster ion-implanted Czochralski (CZ)-grown silicon substrate with a high dose of 1 × 1016 atoms/cm2. This implantation condition transforms the top-surface region of the CZ-grown silicon substrate into a thin amorphous layer. Thus, an epitaxial layer cannot be grown on this implanted CZ-grown silicon substrate. However, this combination process can be used to form an epitaxial layer on the amorphous layer of this implanted CZ-grown silicon substrate surface. This bonding wafer has strong gettering capability in both the wafer-bonding region and the carbon-cluster ion-implanted projection range. Furthermore, this wafer inhibits oxygen out-diffusion to the epitaxial layer from the CZ-grown silicon substrate after device fabrication. Therefore, we believe that this bonding wafer is effective in decreasing the dark current and white-spot defect density for advanced CMOS image sensors.

Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

NASA Astrophysics Data System (ADS)

Daix, N.; Uccelli, E.; Czornomaz, L.; Caimi, D.; Rossel, C.; Sousa, M.; Siegwart, H.; Marchiori, C.; Hartmann, J. M.; Shiu, K.-T.; Cheng, C.-W.; Krishnan, M.; Lofaro, M.; Kobayashi, M.; Sadana, D.; Fompeyrine, J.

2014-08-01

We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In0.53Ga0.47As (InGaAs) active layer is equal to 3.5 × 109 cm-2, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm2/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000-3000 cm2/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

Eutectic-based wafer-level-packaging technique for piezoresistive MEMS accelerometers and bond characterization using molecular dynamics simulations

NASA Astrophysics Data System (ADS)

Aono, T.; Kazama, A.; Okada, R.; Iwasaki, T.; Isono, Y.

2018-03-01

We developed a eutectic-based wafer-level-packaging (WLP) technique for piezoresistive micro-electromechanical systems (MEMS) accelerometers on the basis of molecular dynamics analyses and shear tests of WLP accelerometers. The bonding conditions were experimentally and analytically determined to realize a high shear strength without solder material atoms diffusing to adhesion layers. Molecular dynamics (MD) simulations and energy dispersive x-ray (EDX) spectrometry done after the shear tests clarified the eutectic reaction of the solder materials used in this research. Energy relaxation calculations in MD showed that the diffusion of solder material atoms into the adhesive layer was promoted at a higher temperature. Tensile creep MD simulations also suggested that the local potential energy in a solder material model determined the fracture points of the model. These numerical results were supported by the shear tests and EDX analyses for WLP accelerometers. Consequently, a bonding load of 9.8 kN and temperature of 300 °C were found to be rational conditions because the shear strength was sufficient to endure the polishing process after the WLP process and there was little diffusion of solder material atoms to the adhesion layer. Also, eutectic-bonding-based WLP was effective for controlling the attenuation of the accelerometers by determining the thickness of electroplated solder materials that played the role of a cavity between the accelerometers and lids. If the gap distance between the two was less than 6.2 µm, the signal gains for x- and z-axis acceleration were less than 20 dB even at the resonance frequency due to air-damping.

Creating a single twin boundary between two CdTe (111) wafers with controlled rotation angle by wafer bonding

NASA Astrophysics Data System (ADS)

Sun, Ce; Lu, Ning; Wang, Jinguo; Lee, Jihyung; Peng, Xin; Klie, Robert F.; Kim, Moon J.

2013-12-01

The single twin boundary with crystallographic orientation relationship (1¯1¯1¯)//(111) [01¯1]//[011¯] was created by wafer bonding. Electron diffraction patterns and high-resolution transmission electron microscopy images demonstrated the well control of the rotation angle between the bonded pair. At the twin boundary, one unit of wurtzite structure was found between two zinc-blende matrices. High-angle annular dark-field scanning transmission electron microscopy images showed Cd- and Te-terminated for the two bonded portions, respectively. The I-V curve across the twin boundary showed increasingly nonlinear behavior, indicating a potential barrier at the bonded twin boundary.

Noncontact sheet resistance measurement technique for wafer inspection

NASA Astrophysics Data System (ADS)

Kempa, Krzysztof; Rommel, J. Martin; Litovsky, Roman; Becla, Peter; Lojek, Bohumil; Bryson, Frank; Blake, Julian

1995-12-01

A new technique, MICROTHERM, has been developed for noncontact sheet resistance measurements of semiconductor wafers. It is based on the application of microwave energy to the wafer, and simultaneous detection of the infrared radiation resulting from ohmic heating. The pattern of the emitted radiation corresponds to the sheet resistance distribution across the wafer. This method is nondestructive, noncontact, and allows for measurements of very small areas (several square microns) of the wafer.

Low temperature InP /Si wafer bonding using boride treated surface

NASA Astrophysics Data System (ADS)

Huang, Hui; Ren, Xiaomin; Wang, Wenjuan; Song, Hailan; Wang, Qi; Cai, Shiwei; Huang, Yongqing

2007-04-01

An approach for InP /Si wafer bonding based on boride-solution treatment was presented. The bonding energy is higher than the InP fracture energy by annealing at 280°C. An In0.53Ga0.47As/InP multiple-quantum-well (MQW) structure grown on InP was transferred onto Si substrate via the bonding process. X-ray diffraction and photoluminescence reveal that crystal quality of the bonded MQW was preserved. A thin B2O3-POx-SiO2 oxide layer of about 28nm thick at the bonding interface was detected. X-ray photoelectron spectroscopy and Raman analyses indicate that the formation of oxygen bridging bonds by boride treatment is responsible for the strong fusion obtained at such low temperature.

Wafer hot spot identification through advanced photomask characterization techniques

NASA Astrophysics Data System (ADS)

Choi, Yohan; Green, Michael; McMurran, Jeff; Ham, Young; Lin, Howard; Lan, Andy; Yang, Richer; Lung, Mike

2016-10-01

As device manufacturers progress through advanced technology nodes, limitations in standard 1-dimensional (1D) mask Critical Dimension (CD) metrics are becoming apparent. Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer's process margin is shrinking at advanced nodes to a point that the classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on subresolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. These items are not quantifiable with the 1D metrology techniques of today. Likewise, the mask maker needs advanced characterization methods in order to optimize the mask process to meet the wafer lithographer's needs. These advanced characterization metrics are what is needed to harmonize mask and wafer processes for enhanced wafer hot spot analysis. In this paper, we study advanced mask pattern characterization techniques and their correlation with modeled wafer performance.

Reduction of the potential energy barrier and resistance at wafer-bonded n-GaAs/n-GaAs interfaces by sulfur passivation

NASA Astrophysics Data System (ADS)

Jackson, Michael J.; Jackson, Biyun L.; Goorsky, Mark S.

2011-11-01

Sulfur passivation and subsequent wafer-bonding treatments are demonstrated for III-V semiconductor applications using GaAs-GaAs direct wafer-bonded structures. Two different sulfur passivation processes are addressed. A dry sulfur passivation method that utilizes elemental sulfur vapor activated by ultraviolet light in vacuum is compared with aqueous sulfide and native-oxide-etch treatments. The electrical conductivity across a sulfur-treated 400 - °C-bonded n-GaAs/n-GaAs interface significantly increased with a short anneal (1-2 min) at elevated temperatures (500-600 °C). Interfaces treated with the NH4OH oxide etch, on the other hand, exhibited only mild improvement in accordance with previously published studies in this area. TEM and STEM images revealed similar interfacial microstructure changes with annealing for both sulfur-treated and NH4OH interfaces, whereby some areas have direct semiconductor-semiconductor contact without any interfacial layer. Fitting the observed temperature dependence of zero-bias conductance using a model for tunneling through a grain boundary reveals that the addition of sulfur at the interface lowered the interfacial energy barrier by 0.2 eV. The interface resistance for these sulfur-treated structures is 0.03 Ω.cm at room temperature. These results emphasize that sulfur-passivation techniques reduce interface states that otherwise limit the implementation of wafer bonding for high-efficiency solar cells and other devices.

Direct wafer bonding of highly conductive GaSb/GaInAs and GaSb/GaInP heterojunctions prepared by argon-beam surface activation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Predan, Felix, E-mail: felix.predan@ise.fraunhofer.de; Reinwand, Dirk; Cariou, Romain

The authors present a low-temperature wafer bonding process for the formation of electrically conductive n-GaSb/n-Ga{sub 0.79}In{sub 0.21}As and n-GaSb/n-Ga{sub 0.32}In{sub 0.68}P heterojunctions. The surfaces are deoxidized by sputter-etching with an argon-beam and bonded in ultrahigh vacuum. The sputtering behavior was investigated for each material, revealing a distinct selective sputtering characteristic for Ga{sub 0.32}In{sub 0.68}P. According to these findings, the settings for the bonding process were chosen. The mechanical and electrical properties of the wafer bonds were studied. Fully bonded 2 in. wafer pairs were found for both material combinations exhibiting high bond energies, which are comparable to the binding energiesmore » in the semiconductors. Furthermore, bond resistances below 5 mΩ cm{sup 2} could be reached, which are in the range of the lowest resistances that have been reported for wafer bonded heterojunctions. This speaks, together with the high bond energies, for a high amount of covalent bonds at the interfaces. These promising bond characteristics make the integration of antimonides with arsenides or phosphides by wafer bonding attractive for various optoelectronic applications such as multijunction solar cells.« less

Electrical properties of Si-Si interfaces obtained by room temperature covalent wafer bonding

NASA Astrophysics Data System (ADS)

Jung, A.; Zhang, Y.; Arroyo Rojas Dasilva, Y.; Isa, F.; von Känel, H.

2018-02-01

We study covalent bonds between p-doped Si wafers (resistivity ˜10 Ω cm) fabricated on a recently developed 200 mm high-vacuum system. Oxide- and void free interfaces were obtained by argon (Ar) or neon (Ne) sputtering prior to wafer bonding at room temperature. The influence of the sputter induced amorphous Si layer at the bonding interface on the electrical behavior is accessed with temperature-dependent current-voltage measurements. In as-bonded structures, charge transport is impeded by a potential barrier of 0.7 V at the interface with thermionic emission being the dominant charge transport mechanism. Current-voltage characteristics are found to be asymmetric which can tentatively be attributed to electric dipole formation at the interface as a result of the time delay between the surface preparation of the two bonding partners. Electron beam induced current measurements confirm the corresponding asymmetric double Schottky barrier like band-alignment. Moreover, we demonstrate that defect annihilation at a low temperature of 400 °C increases the electrical conductivity by up to three orders of magnitude despite the lack of recrystallization of the amorphous layer. This effect is found to be more pronounced for Ne sputtered surfaces which is attributed to the lighter atomic mass compared to Ar, inducing weaker lattice distortions during the sputtering.

The Novel Preparation of P-N Junction Mesa Diodes by Silicon-Wafer Direct Bonding (SDB)

NASA Astrophysics Data System (ADS)

Yeh, Ching-Fa; Hwangleu, Shyang

1992-05-01

The key processes of silicon-wafer direct bonding (SDB), including hydrophilic surface formation and optimal two-step heat treatment, have been developed However, H2SO4/H2O2 solution being a strong oxidized acid solution, native oxide is found to have grown on the wafer surface as soon as a wafer is treated in this solution. In the case of a wafer further treated in diluted HF solution after hydrophilic surface formation, it is shown that the wafer surface can not only be cleaned of its native oxide but also remains hydrophilic, and can provide excellent voidless bonding. The N+/P and N/P combination junction mesa diodes fabricated on the wafers prepared by these novel SDB technologies are examined. The ideality factor n of the N/P mesa diode is 2.4˜2.8 for the voltage range 0.2˜0.3 V; hence, the lowering of the ideality factor n is evidently achieved. As for the N+/P mesa diode, the ideality factor n shows a value of 1.10˜1.30 for the voltage range 0.2˜0.6 V; the low value of n is attributed to an autodoping phenomenon which has caused the junction interface to form in the P-silicon bulk. However, the fact that the sustaining voltage of the N/P mesa diode showed a value greater than 520 V reveals the effectiveness of our novel SDB processes.

Wafer-Level Hermetic Package by Low-Temperature Cu/Sn TLP Bonding with Optimized Sn Thickness

NASA Astrophysics Data System (ADS)

Wu, Zijian; Cai, Jian; Wang, Qian; Wang, Junqiang; Wang, Dejun

2017-10-01

In this paper, a wafer-level package with hermetic sealing by low-temperature Cu/Sn transient liquid phase (TLP) bonding for a micro-electromechanical system was introduced. A Cu bump with a Sn cap and sealing ring were fabricated simultaneously by electroplating. The model of Cu/Sn TLP bonding was established and the thicknesses of Cu and Sn were optimized after a series of bonding experiments. Cu/Sn wafer-level bonding was undertaken at 260°C for 30 min under a vacuum condition. An average shear strength of 50.36 MPa and a fine leak rate of 1.9 × 10-8 atm cc/s were achieved. Scanning electron microscope photos of the Cu/Sn/Cu interlayers were presented, and energy dispersive x-ray analysis was conducted simultaneously. The results showed that the Sn was completely consumed to form the stable intermetallic compound Cu3Sn. An aging test of 200 h at 200°C was conducted to test the performance of the hermetic sealing, while the results of shear strength, fine leak rate and bonding interface were also set out.

Fabrication of SOI structures with buried cavities using Si wafer direct bonding and electrochemical etch-stop

NASA Astrophysics Data System (ADS)

Chung, Gwiy-Sang

2003-10-01

This paper describes the fabrication of SOI structures with buried cavities using SDB and electrochemical etch-stop. These methods are suitable for thick membrane fabrication with accurate thickness, uniformity, and flatness. After a feed-through hole for supplied voltage and buried cavities was formed on a handle Si wafer with p-type, the handle wafer was bonded to an active Si wafer consisting of a p-type substrate with an n-type epitaxial layer corresponding to membrane thickness. The bonded pair was then thinned until electrochemical etch-stop occurred at the pn junction during electrochemical etchback. By using the SDB SOI structure with buried cavities, active membranes, which have a free standing structure with a dimension of 900×900 μm2, were fabricated. It is confirmed that the fabrication process of the SDB SOI structure with buried cavities is a powerful and versatile technology for new MEMS applications.

Low-Cost High-Efficiency Solar Cells with Wafer Bonding and Plasmonic Technologies

NASA Astrophysics Data System (ADS)

Tanake, Katsuaki

We fabricated a direct-bond interconnected multijunction solar cell, a two-terminal monolithic GaAs/InGaAs dual-junction cell, to demonstrate a proof-of-principle for the viability of direct wafer bonding for solar cell applications. The bonded interface is a metal-free n+GaAs/n +InP tunnel junction with highly conductive Ohmic contact suitable for solar cell applications overcoming the 4% lattice mismatch. The quantum efficiency spectrum for the bonded cell was quite similar to that for each of unbonded GaAs and InGaAs subcells. The bonded dual-junction cell open-circuit voltage was equal to the sum of the unbonded subcell open-circuit voltages, which indicates that the bonding process does not degrade the cell material quality since any generated crystal defects that act as recombination centers would reduce the open-circuit voltage. Also, the bonded interface has no significant carrier recombination rate to reduce the open circuit voltage. Engineered substrates consisting of thin films of InP on Si handle substrates (InP/Si substrates or epitaxial templates) have the potential to significantly reduce the cost and weight of compound semiconductor solar cells relative to those fabricated on bulk InP substrates. InGaAs solar cells on InP have superior performance to Ge cells at photon energies greater than 0.7 eV and the current record efficiency cell for 1 sun illumination was achieved using an InGaP/GaAs/InGaAs triple junction cell design with an InGaAs bottom cell. Thermophotovoltaic (TPV) cells from the InGaAsP-family of III-V materials grown epitaxially on InP substrates would also benefit from such an InP/Si substrate. Additionally, a proposed four-junction solar cell fabricated by joining subcells of InGaAs and InGaAsP grown on InP with subcells of GaAs and AlInGaP grown on GaAs through a wafer-bonded interconnect would enable the independent selection of the subcell band gaps from well developed materials grown on lattice matched substrates. Substitution of

THz quantum cascade lasers with wafer bonded active regions.

PubMed

Brandstetter, M; Deutsch, C; Benz, A; Cole, G D; Detz, H; Andrews, A M; Schrenk, W; Strasser, G; Unterrainer, K

2012-10-08

We demonstrate terahertz quantum-cascade lasers with a 30 μm thick double-metal waveguide, which are fabricated by stacking two 15 μm thick active regions using a wafer bonding process. By increasing the active region thickness more optical power is generated inside the cavity, the waveguide losses are decreased and the far-field is improved due to a larger facet aperture. In this way the output power is increased by significantly more than a factor of 2 without reducing the maximum operating temperature and without increasing the threshold current.

Wafer-Level Vacuum Packaging of Smart Sensors.

PubMed

Hilton, Allan; Temple, Dorota S

2016-10-31

The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors-"low cost" for ubiquitous presence, and "smart" for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

Wafer-Level Vacuum Packaging of Smart Sensors

PubMed Central

Hilton, Allan; Temple, Dorota S.

2016-01-01

The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors—“low cost” for ubiquitous presence, and “smart” for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology. PMID:27809249

Wafer-Level Membrane-Transfer Process for Fabricating MEMS

NASA Technical Reports Server (NTRS)

Yang, Eui-Hyeok; Wiberg, Dean

2003-01-01

A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

Edge printability: techniques used to evaluate and improve extreme wafer edge printability

NASA Astrophysics Data System (ADS)

Roberts, Bill; Demmert, Cort; Jekauc, Igor; Tiffany, Jason P.

2004-05-01

The economics of semiconductor manufacturing have forced process engineers to develop techniques to increase wafer yield. Improvements in process controls and uniformities in all areas of the fab have reduced film thickness variations at the very edge of the wafer surface. This improved uniformity has provided the opportunity to consider decreasing edge exclusions, and now the outermost extents of the wafer must be considered in the yield model and expectations. These changes have increased the requirements on lithography to improve wafer edge printability in areas that previously were not even coated. This has taxed all software and hardware components used in defining the optical focal plane at the wafer edge. We have explored techniques to determine the capabilities of extreme wafer edge printability and the components of the systems that influence this printability. We will present current capabilities and new detection techniques and the influence that the individual hardware and software components have on edge printability. We will show effects of focus sensor designs, wafer layout, utilization of dummy edge fields, the use of non-zero overlay targets and chemical/optical edge bead optimization.

Wafer hot spot identification through advanced photomask characterization techniques: part 2

NASA Astrophysics Data System (ADS)

Choi, Yohan; Green, Michael; Cho, Young; Ham, Young; Lin, Howard; Lan, Andy; Yang, Richer; Lung, Mike

2017-03-01

Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for mask end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer's process margin is shrinking at advanced nodes to a point that classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on sub-resolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. To overcome the limitation of 1D metrics, there are numerous on-going industry efforts to better define wafer-predictive metrics through both standard mask metrology and aerial CD methods. Even with these improvements, the industry continues to struggle to define useful correlative metrics that link the mask to final device performance. In part 1 of this work, we utilized advanced mask pattern characterization techniques to extract potential hot spots on the mask and link them, theoretically, to issues with final wafer performance. In this paper, part 2, we complete the work by verifying these techniques at wafer level. The test vehicle (TV) that was used for hot spot detection on the mask in part 1 will be used to expose wafers. The results will be used to verify the mask-level predictions. Finally, wafer performance with predicted and verified mask/wafer condition will be shown as the result of advanced mask characterization. The goal is to maximize mask end user yield through mask-wafer technology harmonization. This harmonization will provide the necessary feedback to determine optimum design, mask specifications, and mask-making conditions for optimal wafer process margin.

Indium Zinc Oxide Mediated Wafer Bonding for III-V/Si Tandem Solar Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tamboli, Adele C.; Essig, Stephanie; Horowitz, Kelsey A. W.

Silicon-based tandem solar cells are desirable as a high efficiency, economically viable approach to one sun or low concentration photovoltaics. We present an approach to wafer bonded III-V/Si solar cells using amorphous indium zinc oxide (IZO) as an interlayer. We investigate the impact of a heavily doped III-V contact layer on the electrical and optical properties of bonded test samples, including the predicted impact on tandem cell performance. We present economic modeling which indicates that the path to commercial viability for bonded cells includes developing low-cost III-V growth and reducing constraints on material smoothness. If these challenges can be surmounted,more » bonded tandems on Si can be cost-competitive with incumbent PV technologies, especially in low concentration, single axis tracking systems.« less

High-κ Al2O3 material in low temperature wafer-level bonding for 3D integration application

NASA Astrophysics Data System (ADS)

Fan, J.; Tu, L. C.; Tan, C. S.

2014-03-01

This work systematically investigated a high-κ Al2O3 material for low temperature wafer-level bonding for potential applications in 3D microsystems. A clean Si wafer with an Al2O3 layer thickness of 50 nm was applied as our experimental approach. Bonding was initiated in a clean room ambient after surface activation, followed by annealing under inert ambient conditions at 300 °C for 3 h. The investigation consisted of three parts: a mechanical support study using the four-point bending method, hermeticity measurements using the helium bomb test, and thermal conductivity analysis for potential heterogeneous bonding. Compared with samples bonded using a conventional oxide bonding material (SiO2), a higher interfacial adhesion energy (˜11.93 J/m2) and a lower helium leak rate (˜6.84 × 10-10 atm.cm3/sec) were detected for samples bonded using Al2O3. More importantly, due to the excellent thermal conductivity performance of Al2O3, this technology can be used in heterogeneous direct bonding, which has potential applications for enhancing the performance of Si photonic integrated devices.

Low temperature wafer-level bonding for hermetic packaging of 3D microsystems

NASA Astrophysics Data System (ADS)

Tan, C. S.; Fan, J.; Lim, D. F.; Chong, G. Y.; Li, K. H.

2011-07-01

Metallic copper-copper (Cu-Cu) thermo-compression bonding, oxide-oxide (SiO2-SiO2) fusion bonding and silicon-silicon (Si-Si) direct bonding are investigated for potential application as hermetic seal in 3D microsystem packaging. Cavities are etched to a volume of 1.4 × 10-3 cm3 in accordance with the MIL-STD-883E standard prescribed for microelectronics packaging. In the case of metal bonding, a clean Cu layer with a thickness of 300 nm and a Ti barrier layer with an underlying thickness of 50 nm are used. The wafer pair is bonded at 300 °C under the application of a bonding force of 5500 N for 1 h. On the other hand, Si-Si bonding and SiO2-SiO2 bonding are initiated at room ambient after surface activation, followed by annealing in inert ambient at 300 °C for 1 h. The bonded cavities are stored in a helium bomb chamber and the leak rate is measured with a mass spectrometer. An excellent helium leak rate below 5 × 10-9 atm cm3 s-1 is detected for all cases and this is at least ten times better than the reject limit.

Micro-miniature gas chromatograph column disposed in silicon wafers

DOEpatents

Yu, Conrad M.

2000-01-01

A micro-miniature gas chromatograph column is fabricated by forming matching halves of a circular cross-section spiral microcapillary in two silicon wafers and then bonding the two wafers together using visual or physical alignment methods. Heating wires are deposited on the outside surfaces of each wafer in a spiral or serpentine pattern large enough in area to cover the whole microcapillary area inside the joined wafers. The visual alignment method includes etching through an alignment window in one wafer and a precision-matching alignment target in the other wafer. The two wafers are then bonded together using the window and target. The physical alignment methods include etching through vertical alignment holes in both wafers and then using pins or posts through corresponding vertical alignment holes to force precision alignment during bonding. The pins or posts may be withdrawn after curing of the bond. Once the wafers are bonded together, a solid phase of very pure silicone is injected in a solution of very pure chloroform into one end of the microcapillary. The chloroform lowers the viscosity of the silicone enough that a high pressure hypodermic needle with a thumbscrew plunger can force the solution into the whole length of the spiral microcapillary. The chloroform is then evaporated out slowly to leave the silicone behind in a deposit.

Low-temperature wafer direct bonding of silicon and quartz glass by a two-step wet chemical surface cleaning

NASA Astrophysics Data System (ADS)

Wang, Chenxi; Xu, Jikai; Zeng, Xiaorun; Tian, Yanhong; Wang, Chunqing; Suga, Tadatomo

2018-02-01

We demonstrate a facile bonding process for combining silicon and quartz glass wafers by a two-step wet chemical surface cleaning. After a post-annealing at 200 °C, strong bonding interfaces with no defects or microcracks were obtained. On the basis of the detailed surface and bonding interface characterizations, the bonding mechanism was explored and discussed. The amino groups terminated on the cleaned surfaces might contribute to the bonding strength enhancement during the annealing. This cost-effective bonding process has great potentials for silicon- and glass-based heterogeneous integrations without requiring a vacuum system.

Structured wafer for device processing

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-05-20

A structured wafer that includes through passages is used for device processing. Each of the through passages extends from or along one surface of the structured wafer and forms a pattern on a top surface area of the structured wafer. The top surface of the structured wafer is bonded to a device layer via a release layer. Devices are processed on the device layer, and are released from the structured wafer using etchant. The through passages within the structured wafer allow the etchant to access the release layer to thereby remove the release layer.

Structured wafer for device processing

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-11-25

A structured wafer that includes through passages is used for device processing. Each of the through passages extends from or along one surface of the structured wafer and forms a pattern on a top surface area of the structured wafer. The top surface of the structured wafer is bonded to a device layer via a release layer. Devices are processed on the device layer, and are released from the structured wafer using etchant. The through passages within the structured wafer allow the etchant to access the release layer to thereby remove the release layer.

A front-end wafer-level microsystem packaging technique with micro-cap array

NASA Astrophysics Data System (ADS)

Chiang, Yuh-Min

2002-09-01

The back-end packaging process is the remaining challenge for the micromachining industry to commercialize microsystem technology (MST) devices at low cost. This dissertation presents a novel wafer level protection technique as a final step of the front-end fabrication process for MSTs. It facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array, which consists of an assortment of small caps micro-molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments during packaging. The micro-cap array is first constructed by a micromachining process with micro-molding technique, then sealed to the device wafer at wafer level. Epoxy-based wafer-level micro cap array has been successfully fabricated and showed good compatibility with conventional back-end packaging processes. An adhesive transfer technique was demonstrated to seal the micro cap array with a MEMS device wafer. No damage or gross leak was observed while wafer dicing or later during a gross leak test. Applications of the micro cap array are demonstrated on MEMS, microactuators fabricated using CRONOS MUMPS process. Depending on the application needs, the micro-molded cap can be designed and modified to facilitate additional component functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. Successful fabrication of a micro cap array comprised with microlenses can provide active functions as well as passive protection. An optical tweezer array could be one possibility for applications of a micro cap with microlenses. The micro cap itself could serve as micro well for DNA or bacteria amplification as well.

Wafer-level packaging with compression-controlled seal ring bonding

DOEpatents

Farino, Anthony J

2013-11-05

A device may be provided in a sealed package by aligning a seal ring provided on a first surface of a first semiconductor wafer in opposing relationship with a seal ring that is provided on a second surface of a second semiconductor wafer and surrounds a portion of the second wafer that contains the device. Forcible movement of the first and second wafer surfaces toward one another compresses the first and second seal rings against one another. A physical barrier against the movement, other than the first and second seal rings, is provided between the first and second wafer surfaces.

A wafer-level vacuum package using glass-reflowed silicon through-wafer interconnection for nano/micro devices.

PubMed

Jin, Joo-Young; Yoo, Seung-Hyun; Yoo, Byung-Wook; Kim, Yong-Kweon

2012-07-01

We propose a vacuum wafer-level packaging (WLP) process using glass-reflowed silicon via for nano/micro devices (NMDs). A through-wafer interconnection (TWIn) substrate with silicon vias and reflowed glass is introduced to accomplish a vertical feed-through of device. NMDs are fabricated in the single crystal silicon (SCS) layer which is formed on the TWIn substrate by Au eutectic bonding including Cr adhesion layer. The WLPof the devices is achieved with the capping glass wafer anodically bonded to the SCS layer. In order to demonstrate the successful hermetic packaging, we fabricated the micro-Pirani gauge in the SCS layer, and packaged it in the wafer-level. The vacuum level inside the packaging was measured to be 3.1 Torr with +/- 0.12 Torr uncertainty, and the packaging leakage was not detected during 24 hour after the packaging.

Heterogeneous integration based on low-temperature bonding for advanced optoelectronic devices

NASA Astrophysics Data System (ADS)

Higurashi, Eiji

2018-04-01

Heterogeneous integration is an attractive approach to manufacturing future optoelectronic devices. Recent progress in low-temperature bonding techniques such as plasma activation bonding (PAB) and surface-activated bonding (SAB) enables a new approach to integrating dissimilar materials for a wide range of photonics applications. In this paper, low-temperature direct bonding and intermediate layer bonding techniques are focused, and their state-of-the-art applications in optoelectronic devices are reviewed. First, we describe the room-temperature direct bonding of Ge/Ge and Ge/Si wafers for photodetectors and of GaAs/SiC wafers for high-power semiconductor lasers. Then, we describe low-temperature intermediate layer bonding using Au and lead-free Sn-3.0Ag-0.5Cu solders for optical sensors and MEMS packaging.

Investigation of radiation hardened SOI wafer fabricated by ion-cut technique

NASA Astrophysics Data System (ADS)

Chang, Yongwei; Wei, Xing; Zhu, Lei; Su, Xin; Gao, Nan; Dong, Yemin

2018-07-01

Total ionizing dose (TID) effect on Silicon-on-Insulator (SOI) wafers due to inherent buried oxide (BOX) is a significant concern as it leads to the degradation of electrical properties of SOI-based devices and circuits, even failures of the systems associated with them. This paper reports the radiation hardening implementation of SOI wafer fabricated by ion-cut technique integrated with low-energy Si+ implantation. The electrical properties and radiation response of pseudo-MOS transistors are analyzed. The results demonstrate that the hardening process can significantly improve the TID tolerance of SOI wafers by generating Si nanocrystals (Si-NCs) within the BOX. The presence of Si-NCs created through Si+ implantation is evidenced by high-resolution transmission electron microscopy (HR-TEM). Under the pass gate (PG) irradiation bias, the anti-radiation properties of H-gate SOI nMOSFETs suggest that the radiation hardened SOI wafers with optimized Si implantation dose can perform effectively in a radiation environment. The radiation hardening process provides an excellent way to reinforce the TID tolerance of SOI wafers.

Thinning of PLZT ceramic wafers for sensor integration

NASA Astrophysics Data System (ADS)

Jin, Na; Liu, Weiguo

2010-08-01

Characteristics of transparent PLZT ceramics can be tailored by controlling the component of them, and therefore showed excellent dielectric, piezoelectric, pyroelectric and ferroelectric properties. To integrate the ceramics with microelectronic circuit to realize integrated applications, the ceramic wafers have to be thinned down to micrometer scale in thickness. A7/65/35 PLZT ceramic wafer was selected in this study for the thinning process. Size of the wafer was 10×10mm with an initial thickness of 300μm. A novel membrane transfer process (MTP) was developed for the thinning and integration of the ceramic wafers. In the MTP process, the ceramic wafer was bonded to silicon wafer using a polymer bonding method. Mechanical grinding method was applied to reduce the thickness of the ceramic. To minimize the surface damage in the ceramic wafer caused by the mechanical grinding, magnetorheological finishing (MRF) method was utilized to polish the wafer. White light interference (WLI) apparatus was used to monitor the surface qualities of the grinded and ploished ceramic wafers. For the PLZT membrane obtained from the MTP process, the final thickness of the thinned and polished wafer was 10μm, the surface roughness was below 1nm in rms, and the flatness was better than λ/5.

Investigation of the heating behavior of carbide-bonded graphene coated silicon wafer used for hot embossing

NASA Astrophysics Data System (ADS)

Yang, Gao; Li, Lihua; Lee, Wing Bun; Ng, Man Cheung; Chan, Chang Yuen

2018-03-01

A recently developed carbide-bonded graphene (CBG) coated silicon wafer was found to be an effective micro-patterned mold material for implementing rapid heating in hot embossing processes owing to its superior electrical and thermal conductivity, in addition to excellent mechanical properties. To facilitate the achievement of precision temperature control in the hot embossing, the heating behavior of a CBG coated silicon wafer sample was experimentally investigated. First, two groups of controlled experiments were conducted for quantitatively evaluating the influence of the main factors such as the vacuum pressure and gaseous environment (vacuum versus nitrogen) on its heating performance. The electrical and thermal responses of this sample under a voltage of 60 V were then intensively analyzed, and revealed that it had somewhat semi-conducting properties. Further, we compared its thermal profiles under different settings of the input voltage and current limiting threshold. Moreover, the strong temperature dependence of electrical resistance for this material was observed and determined. Ultimately, the surface temperature of CBG coated silicon wafer could be as high as 1300 ℃, but surprisingly the graphene coating did not detach from the substrate under such an elevated temperature due to its strong thermal coupling with the silicon wafer.

Direct Wafer Bonding and Its Application to Waveguide Optical Isolators

PubMed Central

Mizumoto, Tetsuya; Shoji, Yuya; Takei, Ryohei

2012-01-01

This paper reviews the direct bonding technique focusing on the waveguide optical isolator application. A surface activated direct bonding technique is a powerful tool to realize a tight contact between dissimilar materials. This technique has the potential advantage that dissimilar materials are bonded at low temperature, which enables one to avoid the issue associated with the difference in thermal expansion. Using this technique, a magneto-optic garnet is successfully bonded on silicon, III-V compound semiconductors and LiNbO3. As an application of this technique, waveguide optical isolators are investigated including an interferometric waveguide optical isolator and a semileaky waveguide optical isolator. The interferometric waveguide optical isolator that uses nonreciprocal phase shift is applicable to a variety of waveguide platforms. The low refractive index of buried oxide layer in a silicon-on-insulator (SOI) waveguide enhances the magneto-optic phase shift, which contributes to the size reduction of the isolator. A semileaky waveguide optical isolator has the advantage of large fabrication-tolerance as well as a wide operation wavelength range. PMID:28817020

Silicon direct bonding approach to high voltage power device (insulated gate bipolar transistors)

NASA Astrophysics Data System (ADS)

Cha, Giho; Kim, Youngchul; Jang, Hyungwoo; Kang, Hyunsoon; Song, Changsub

2001-10-01

Silicon direct bonding technique was successfully applied for the fabrication of high voltage IGBT (Insulated Gate Bipolar Transistor). In this work, 5 inch, p-type CZ wafer for handle wafer and n-type FZ wafer for device wafer were used and bonding the two wafers was performed at reduced pressure (1mmTorr) using a modified vacuum bonding machine. Since the breakdown voltage in high voltage device has been determined by the remained thickness of device layer, grinding and CMP steps should be carefully designed in order to acquire better uniformity of device layer. In order to obtain the higher removal rate and the final better uniformity of device layer, the harmony of the two processes must be considered. We found that the concave type of grinding profile and the optimal thickness of ground wafer was able to reduce the process time of CMP step and also to enhance the final thickness uniformity of device layer up to +/- 1%. Finally, when compared epitaxy layer with SDB wafer, the SDB wafer was found to be more favorable in terms of cost and electrical characteristics.

Wafer screening device and methods for wafer screening

DOEpatents

Sopori, Bhushan; Rupnowski, Przemyslaw

2014-07-15

Wafer breakage is a serious problem in the photovoltaic industry because a large fraction of wafers (between 5 and 10%) break during solar cell/module fabrication. The major cause of this excessive wafer breakage is that these wafers have residual microcracks--microcracks that were not completely etched. Additional propensity for breakage is caused by texture etching and incomplete edge grinding. To eliminate the cost of processing the wafers that break, it is best to remove them prior to cell fabrication. Some attempts have been made to develop optical techniques to detect microcracks. Unfortunately, it is very difficult to detect microcracks that are embedded within the roughness/texture of the wafers. Furthermore, even if such detection is successful, it is not straightforward to relate them to wafer breakage. We believe that the best way to isolate the wafers with fatal microcracks is to apply a stress to wafers--a stress that mimics the highest stress during cell/module processing. If a wafer survives this stress, it has a high probability of surviving without breakage during cell/module fabrication. Based on this, we have developed a high throughput, noncontact method for applying a predetermined stress to a wafer. The wafers are carried on a belt through a chamber that illuminates the wafer with an intense light of a predetermined intensity distribution that can be varied by changing the power to the light source. As the wafers move under the light source, each wafer undergoes a dynamic temperature profile that produces a preset elastic stress. If this stress exceeds the wafer strength, the wafer will break. The broken wafers are separated early, eliminating cost of processing into cell/module. We will describe details of the system and show comparison of breakage statistics with the breakage on a production line.

Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers

NASA Astrophysics Data System (ADS)

Kim, Munho; Cho, Sang June; Jayeshbhai Dave, Yash; Mi, Hongyi; Mikael, Solomon; Seo, Jung-Hun; Yoon, Jung U.; Ma, Zhenqiang

2018-01-01

Newly engineered substrates consisting of semiconductor-on-insulator are gaining much attention as starting materials for the subsequent transfer of semiconductor nanomembranes via selective etching of the insulating layer. Germanium-on-insulator (GeOI) substrates are critically important because of the versatile applications of Ge nanomembranes (Ge NMs) toward electronic and optoelectronic devices. Among various fabrication techniques, the Smart-CutTM technique is more attractive than other methods because a high temperature annealing process can be avoided. Another advantage of Smart-CutTM is the reusability of the donor Ge wafer. However, it is very difficult to realize an undamaged Ge wafer because there exists a large mismatch in the coefficient of thermal expansion among the layers. Although an undamaged donor Ge wafer is a prerequisite for its reuse, research related to this issue has not yet been reported. Here we report the fabrication of 4-inch GeOI substrates using the direct wafer bonding and Smart-CutTM process with a low thermal budget. In addition, a thermo-mechanical simulation of GeOI was performed by COMSOL to analyze induced thermal stress in each layer of GeOI. Crack-free donor Ge wafers were obtained by annealing at 250 °C for 10 h. Raman spectroscopy and x-ray diffraction (XRD) indicated similarly favorable crystalline quality of the Ge layer in GeOI compared to that of bulk Ge. In addition, Ge p-n diodes using transferred Ge NM indicate a clear rectifying behavior with an on and off current ratio of 500 at ±1 V. This demonstration offers great promise for high performance transferrable Ge NM-based device applications.

Electrostatic bonding of thin (approximately 3 mil) 7070 cover glass to Ta2O5 AR-coated thin (approximately 2 mil) silicon wafers and solar cells

NASA Technical Reports Server (NTRS)

Egelkrout, D. W.; Horne, W. E.

1980-01-01

Electrostatic bonding (ESB) of thin (3 mil) Corning 7070 cover glasses to Ta2O5 AR-coated thin (2 mil) silicon wafers and solar cells is investigated. An experimental program was conducted to establish the effects of variations in pressure, voltage, temperature, time, Ta2O5 thickness, and various prebond glass treatments. Flat wafers without contact grids were used to study the basic effects for bonding to semiconductor surfaces typical of solar cells. Solar cells with three different grid patterns were used to determine additional requirements caused by the raised metallic contacts.

Non-invasive thermal profiling of silicon wafer surface during RTP using acoustic and signal processing techniques

NASA Astrophysics Data System (ADS)

Syed, Ahmed Rashid

Among the great physical challenges faced by the current front-end semiconductor equipment manufacturers is the accurate and repeatable surface temperature measurement of wafers during various fabrication steps. Close monitoring of temperature is essential in that it ensures desirable device characteristics to be reliably reproduced across various wafer lots. No where is the need to control temperature more pronounced than it is during Rapid Thermal Processing (RTP) which involves temperature ramp rates in excess of 200°C/s. This dissertation presents an elegant and practical approach to solve the wafer surface temperature estimation problem, in context of RTP, by deploying hardware that acquires the necessary data while preserving the integrity and purity of the wafer. In contrast to the widely used wafer-contacting (and hence contaminating) methods, such as bonded thermocouples, or environment sensitive schemes, such as light-pipes and infrared pyrometry, the proposed research explores the concept of utilizing Lamb (acoustic) waves to detect changes in wafer surface temperature, during RTP. Acoustic waves are transmitted to the wafer via an array of quartz rods that normally props the wafer inside an RTP chamber. These waves are generated using piezoelectric transducers affixed to the bases of the quartz rods. The group velocity of Lamb waves traversing the wafer surface undergoes a monotonic decrease with rise in wafer temperature. The correspondence of delay in phase of the received Lamb waves and the ambient temperature, along all direct paths between sending and receiving transducers, yields a psuedo real-time thermal image of the wafer. Although the custom built hardware-setup implements the above "proof-of-concept" scheme by transceiving acoustic signals at a single frequency, the real-world application will seek to enhance the data acquistion. rate (>1000 temperature measurements per seconds) by sending and receiving Lamb waves at multiple frequencies (by

Reliable bonding using indium-based solders

NASA Astrophysics Data System (ADS)

Cheong, Jongpil; Goyal, Abhijat; Tadigadapa, Srinivas; Rahn, Christopher

2004-01-01

Low temperature bonding techniques with high bond strengths and reliability are required for the fabrication and packaging of MEMS devices. Indium and indium-tin based bonding processes are explored for the fabrication of a flextensional MEMS actuator, which requires the integration of lead zirconate titanate (PZT) substrate with a silicon micromachined structure at low temperatures. The developed technique can be used either for wafer or chip level bonding. The lithographic steps used for the patterning and delineation of the seed layer limit the resolution of this technique. Using this technique, reliable bonds were achieved at a temperature of 200°C. The bonds yielded an average tensile strength of 5.41 MPa and 7.38 MPa for samples using indium and indium-tin alloy solders as the intermediate bonding layers respectively. The bonds (with line width of 100 microns) showed hermetic sealing capability of better than 10-11 mbar-l/s when tested using a commercial helium leak tester.

Reliable bonding using indium-based solders

NASA Astrophysics Data System (ADS)

Cheong, Jongpil; Goyal, Abhijat; Tadigadapa, Srinivas; Rahn, Christopher

2003-12-01

Low temperature bonding techniques with high bond strengths and reliability are required for the fabrication and packaging of MEMS devices. Indium and indium-tin based bonding processes are explored for the fabrication of a flextensional MEMS actuator, which requires the integration of lead zirconate titanate (PZT) substrate with a silicon micromachined structure at low temperatures. The developed technique can be used either for wafer or chip level bonding. The lithographic steps used for the patterning and delineation of the seed layer limit the resolution of this technique. Using this technique, reliable bonds were achieved at a temperature of 200°C. The bonds yielded an average tensile strength of 5.41 MPa and 7.38 MPa for samples using indium and indium-tin alloy solders as the intermediate bonding layers respectively. The bonds (with line width of 100 microns) showed hermetic sealing capability of better than 10-11 mbar-l/s when tested using a commercial helium leak tester.

Anodic bonding using SOI wafer for fabrication of capacitive micromachined ultrasonic transducers

NASA Astrophysics Data System (ADS)

Bellaredj, M.; Bourbon, G.; Walter, V.; Le Moal, P.; Berthillier, M.

2014-02-01

In medical ultrasound imaging, mostly piezoelectric crystals are used as ultrasonic transducers. Capacitive micromachined ultrasonic transducers (CMUTs) introduced around 1994 have been shown to be a good alternative to conventional piezoelectric transducers in various aspects, such as sensitivity, transduction efficiency or bandwidth. This paper focuses on a fabrication process for CMUTs using anodic bonding of a silicon on insulator wafer on a glass wafer. The processing steps are described leading to a good control of the mechanical response of the membrane. This technology makes possible the fabrication of large membranes and can extend the frequency range of CMUTs to lower frequencies of operation. Silicon membranes having radii of 50, 70, 100 and 150 µm and a 1.5 µm thickness are fabricated and electromechanically characterized using an auto-balanced bridge impedance analyzer. Resonant frequencies from 0.6 to 2.3 MHz and an electromechanical coupling coefficient around 55% are reported. The effects of residual stress in the membranes and uncontrolled clamping conditions are clearly responsible for the discrepancies between experimental and theoretical values of the first resonance frequency. The residual stress in the membranes is determined to be between 90 and 110 MPa. The actual boundary conditions are between the clamped condition and the simply supported condition and can be modeled with a torsional stiffness of 2.10-7 Nm rad-1 in the numerical model.

Localized heating and bonding technique for MEMS packaging

NASA Astrophysics Data System (ADS)

Cheng, Yu-Ting

Localized heating and bonding techniques have been developed for hermetic and vacuum packaging of MEMS devices, including silicon-to-glass fusion, silicon-gold eutectic, and silicon-to-glass bonding using PSG, indium, aluminum, and aluminum/silicon alloy as the intermediate layer. Line shaped phosphorus-doped polysilicon or gold films are used as resistive microheaters to provide enough thermal energy for bonding. The bonding processes are conducted in the common environment of room temperature and atmospheric pressure and can achieve bonding strength comparable to the fracture toughness of bulk silicon in less than 10 minutes. About 5 watts of input power is needed for localized bonding which can seal a 500 x 500 mum2 area. The total input power is determined by the thermal properties of bonding materials, including the heat capacity and latent heat. Two important bonding results are obtained: (1) The surface step created by the electrical interconnect line can be planarized by reflowing the metal solder. (2) Small applied pressure, less than 1MPa, for intimate contact reduces mechanical damage to the device substrate. This new class of bonding technology has potential applications for MEMS fabrication and packaging that require low temperature processing at the wafer level, excellent bonding strength and hermetic sealing characteristics. A hermetic package based on localized aluminum/silicon-to-glass bonding has been successfully fabricated. Less than 0.2 MPa contact pressure with 46mA input current for two parallel 3.5mum wide polysilicon on-chip microheaters can create as high as 700°C bonding temperature and achieve a strong and reliable bond in 7.5 minutes. Accelerated testing in an autoclave shows some packages survive more than 450 hours under 3 atm, 100%RH and 128°C. Premature failure has been attributed to some unbonded regions on the failed samples. The bonding yield and reliability have been improved by increasing bonding time and applied pressure

Advanced FTIR technology for the chemical characterization of product wafers

NASA Astrophysics Data System (ADS)

Rosenthal, P. A.; Bosch-Charpenay, S.; Xu, J.; Yakovlev, V.; Solomon, P. R.

2001-01-01

Advances in chemically sensitive diagnostic techniques are needed for the characterization of compositionally variable materials such as chemically amplified resists, low-k dielectrics and BPSG films on product wafers. In this context, Fourier Transform Infrared (FTIR) reflectance spectroscopy is emerging as a preferred technique to characterize film chemistry and composition, due to its non-destructive nature and excellent sensitivity to molecular bonds and free carriers. While FTIR has been widely used in R&D environments, its application to mainstream production metrology and process monitoring on product wafers has historically been limited. These limitations have been eliminated in a series of recent FTIR technology advances, which include the use of 1) new sampling optics, which suppress artifact backside reflections and 2) comprehensive model-based analysis. With these recent improvements, it is now possible to characterize films on standard single-side polished product wafers with much simpler training wafer sets and machine-independent calibrations. In this new approach, the chemistry of the films is tracked via the measured infrared optical constants as opposed to conventional absorbance measurements. The extracted spectral optical constants can then be reduced to a limited set of parameters for process control. This paper describes the application of this new FTIR methodology to the characterization of 1) DUV photoresists after various processing steps, 2) low-k materials of different types and after various curing conditions, and 3) doped glass BPSG films of various concentration and, for the first time, widely different thicknesses. Such measurements can be used for improved process control on actual product wafers.

1.3 micrometers Wavelength Vertical Cavity Surface Emitting Laser Fabricated by Orientation-Mismatched Wafer Bonding: A Prospect for Polarization Control

DTIC Science & Technology

2005-06-01

mismatched wafer bonding: A prospect for polarization control Yae L. Okuno,a) Jon Geske , Kian-Giap Gan, Yi-Jen Chiu, Steven P. DenBaars, and John E. Bowers...Uomi, M. Aoki, and T. Tsuchiya, IEEE J. Quantum Electron. 33, 959 ~1997!. 20 Y. L. Okuno, J. Geske , Y.-J. Chiu, S. P. DenBaars, and J. E. Bowers, Proc

BCB Bonding Technology of Back-Side Illuminated COMS Device

NASA Astrophysics Data System (ADS)

Wu, Y.; Jiang, G. Q.; Jia, S. X.; Shi, Y. M.

2018-03-01

Back-side illuminated CMOS(BSI) sensor is a key device in spaceborne hyperspectral imaging technology. Compared with traditional devices, the path of incident light is simplified and the spectral response is planarized by BSI sensors, which meets the requirements of quantitative hyperspectral imaging applications. Wafer bonding is the basic technology and key process of the fabrication of BSI sensors. 6 inch bonding of CMOS wafer and glass wafer was fabricated based on the low bonding temperature and high stability of BCB. The influence of different thickness of BCB on bonding strength was studied. Wafer bonding with high strength, high stability and no bubbles was fabricated by changing bonding conditions.

Characterization of silicon-on-insulator wafers

NASA Astrophysics Data System (ADS)

Park, Ki Hoon

The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

Novel Bonding Technology for Hermetically Sealed Silicon Micropackage

NASA Astrophysics Data System (ADS)

Lee, Duck-Jung; Ju, Byeong-Kwon; Choi, Woo-Beom; Jeong, Jee-Won; Lee, Yun-Hi; Jang, Jin; Lee, Kwang-Bae; Oh, Myung-Hwan

1999-01-01

We performed glass-to-silicon bonding and fabricated a hermetically sealed silicon wafer using silicon direct bonding followed by anodic bonding (SDAB). The hydrophilized glass and silicon wafers in solution were dried and initially bonded in atmosphere as in the silicon direct bonding (SDB) process, but annealing at high temperature was not performed. Anodic bonding was subsequently carried out for the initially bonded specimens. Then the wafer pairs bonded by the SDAB method were different from those bonded by the anodic bonding process only. The effects of the bonding process on the bonded area and tensile strength were investigated as functions of bonding temperature and voltage. Using scanning electron microscopy (SEM), the cross-sectional view of the bonded interface region was observed. In order to investigate the migration of the sodium ions in the bonding process, the concentration of the bonded glass was compared with that of standard glass. The specimen bonded using the SDAB process had higher efficiency than that using the anodic bonding process only.

Forming electrical interconnections through semiconductor wafers

NASA Technical Reports Server (NTRS)

Anthony, T. R.

1981-01-01

An information processing system based on CMOS/SOS technology is being developed by NASA to process digital image data collected by satellites. An array of holes is laser drilled in a semiconductor wafer, and a conductor is formed in the holes to fabricate electrical interconnections through the wafers. Six techniques are used to form conductors in the silicon-on-sapphire (SOS) wafers, including capillary wetting, wedge extrusion, wire intersection, electroless plating, electroforming, double-sided sputtering and through-hole electroplating. The respective strengths and weaknesses of these techniques are discussed and compared, with double-sided sputtering and the through-hole plating method achieving best results. In addition, hollow conductors provided by the technique are available for solder refill, providing a natural way of forming an electrically connected stack of SOS wafers.

Electrostatic bonding of thin (cycle sine 3 mil) 7070 cover glass to Ta2O5 AR-coated thin (cycle sine 2 mil) silicon wafers and solar cells

NASA Technical Reports Server (NTRS)

Egelkrout, D. W.

1981-01-01

Electrostatic bonding of thin cover glass to thin solar cells was researched. Silicon solar cells, wafers, and Corning 7070 glass of from about 0.002" to about 0.003" in thickness were used in the investigation to establish optimum parameters for producing mechanically acceptable bonds while minimizing thermal stresses and resultant solar cell electrical parameter degradation.

Wafer-level hermetic vacuum packaging by bonding with a copper-tin thin film sealing ring

NASA Astrophysics Data System (ADS)

Akashi, Teruhisa; Funabashi, Hirofumi; Takagi, Hideki; Omura, Yoshiteru; Hata, Yoshiyuki

2018-04-01

A wafer-level hermetic vacuum packaging technology intended for use with MEMS devices was developed based on a copper-tin (CuSn) thin film sealing ring. To allow hermetic packaging, the shear strength of the CuSn thin film bond was improved by optimizing the pretreatment conditions. As a result, an average shear strength of 72.3 MPa was obtained and a cavity that had been hermetically sealed using wafer-level packaging (WLP) maintained its vacuum for 1.84 years. The total pressures in the cavities and the partial pressures of residual gases were directly determined with an ultra-low outgassing residual gas analyzer (RGA) system. Hermeticity was evaluated based on helium leak rates, which were calculated from helium pressures determined with the RGA system. The resulting data showed that a vacuum cavity following 1.84 years storage had a total pressure of 83.1 Pa, contained argon as the main residual gas and exhibited a helium leak rate as low as 1.67  ×  10-17 Pa · m3 s-1, corresponding to an air leak rate of 6.19  ×  10-18 Pa · m3 s-1. The RGA data demonstrate that WLP using a CuSn thin film sealing ring permits ultra-high hermeticity in conjunction with long-term vacuum packaging that is applicable to MEMS devices.

Novel On-wafer Radiation Pattern Measurement Technique for MEMS Actuator Based Reconfigurable Patch Antennas

NASA Technical Reports Server (NTRS)

Simons, Rainee N.

2002-01-01

The paper presents a novel on-wafer, antenna far field pattern measurement technique for microelectromechanical systems (MEMS) based reconfigurable patch antennas. The measurement technique significantly reduces the time and the cost associated with the characterization of printed antennas, fabricated on a semiconductor wafer or dielectric substrate. To measure the radiation patterns, the RF probe station is modified to accommodate an open-ended rectangular waveguide as the rotating linearly polarized sampling antenna. The open-ended waveguide is attached through a coaxial rotary joint to a Plexiglas(Trademark) arm and is driven along an arc by a stepper motor. Thus, the spinning open-ended waveguide can sample the relative field intensity of the patch as a function of the angle from bore sight. The experimental results include the measured linearly polarized and circularly polarized radiation patterns for MEMS-based frequency reconfigurable rectangular and polarization reconfigurable nearly square patch antennas, respectively.

Transient luminescence induced by electrical refilling of charge carrier traps of dislocation network at hydrophilically bonded Si wafers interface

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bondarenko, Anton; Vyvenko, Oleg

2014-02-21

Dislocation network (DN) at hydrophilically bonded Si wafers interface is placed in space charge region (SCR) of a Schottky diode at a depth of about 150 nm from Schottky electrode for simultaneous investigation of its electrical and luminescent properties. Our recently proposed pulsed traps refilling enhanced luminescence (Pulsed-TREL) technique based on the effect of transient luminescence induced by refilling of charge carrier traps with electrical pulses is further developed and used as a tool to establish DN energy levels responsible for D1 band of dislocation-related luminescence in Si (DRL). In present work we do theoretical analysis and simulation of trapsmore » refilling kinetics dependence on refilling pulse magnitude (Vp) in two levels model: shallow and deep. The influence of initial charge state of deep level on shallow level occupation-Vp dependence is discussed. Characteristic features predicted by simulations are used for Pulsed-TREL experimental results interpretation. We conclude that only shallow (∼0.1 eV from conduction and valence band) energetic levels in the band gap participate in D1 DRL.« less

Material requirements for the adoption of unconventional silicon crystal and wafer growth techniques for high-efficiency solar cells

DOE PAGES

Hofstetter, Jasmin; del Cañizo, Carlos; Wagner, Hannes; ...

2015-10-15

Silicon wafers comprise approximately 40% of crystalline silicon module cost and represent an area of great technological innovation potential. Paradoxically, unconventional wafer-growth techniques have thus far failed to displace multicrystalline and Czochralski silicon, despite four decades of innovation. One of the shortcomings of most unconventional materials has been a persistent carrier lifetime deficit in comparison to established wafer technologies, which limits the device efficiency potential. In this perspective article, we review a defect-management framework that has proven successful in enabling millisecond lifetimes in kerfless and cast materials. Control of dislocations and slowly diffusing metal point defects during growth, coupled tomore » effective control of fast-diffusing species during cell processing, is critical to enable high cell efficiencies. As a result, to accelerate the pace of novel wafer development, we discuss approaches to rapidly evaluate the device efficiency potential of unconventional wafers from injection-dependent lifetime measurements.« less

Material requirements for the adoption of unconventional silicon crystal and wafer growth techniques for high-efficiency solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hofstetter, Jasmin; del Cañizo, Carlos; Wagner, Hannes

Silicon wafers comprise approximately 40% of crystalline silicon module cost and represent an area of great technological innovation potential. Paradoxically, unconventional wafer-growth techniques have thus far failed to displace multicrystalline and Czochralski silicon, despite four decades of innovation. One of the shortcomings of most unconventional materials has been a persistent carrier lifetime deficit in comparison to established wafer technologies, which limits the device efficiency potential. In this perspective article, we review a defect-management framework that has proven successful in enabling millisecond lifetimes in kerfless and cast materials. Control of dislocations and slowly diffusing metal point defects during growth, coupled tomore » effective control of fast-diffusing species during cell processing, is critical to enable high cell efficiencies. As a result, to accelerate the pace of novel wafer development, we discuss approaches to rapidly evaluate the device efficiency potential of unconventional wafers from injection-dependent lifetime measurements.« less

Resonance ultrasonic vibrations in Cz-Si wafers as a possible diagnostic technique in ion implantation

NASA Astrophysics Data System (ADS)

Zhao, Z. Y.; Ostapenko, S.; Anundson, R.; Tvinnereim, M.; Belyaev, A.; Anthony, M.

2001-07-01

The semiconductor industry does not have effective metrology for well implants. The ability to measure such deep level implants will become increasingly important as we progress along the technology road map. This work explores the possibility of using the acoustic whistle effect on ion implanted silicon wafers. The technique detects the elastic stress and defects in silicon wafers by measuring the sub-harmonic f/2 resonant vibrations on a wafer induced via backside contact to create standing waves, which are measured by a non-contact ultrasonic probe. Preliminary data demonstrates that it is sensitive to implant damage, and there is a direct correlation between this sub-harmonic acoustic mode and some of the implant and anneal conditions. This work presents the results of a feasibility study to assess and quantify the correspondent whistle effect to implant damage, residual damage after annealing and intrinsic defects.

Si/Ge Junctions Formed by Nanomembrane Bonding

DTIC Science & Technology

2011-01-01

hydrophobic bonding of a 200 nm thick 14. ABSTRACT monocrystalline Si(001) membrane to a bulk Ge(001) wafer. The membrane bond has an extremely high...temperature hydrophobic bonding of a 200 nm thick monocrystalline Si(001) membrane to a bulk Ge(001) wafer. The membrane bond has an extremely high quality...them. A RTIC LE KIEFER ET AL. VOL. 5 ’ NO. 2 ’ 1179–1189 ’ 2011 1182 www.acsnano.org monocrystalline . The interfacial region appears to be amorphous

Within-wafer CD variation induced by wafer shape

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

2016-03-01

In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked vertical flash cell array has been proposed. In constructing 3D NAND flash memories, the bit number per unit area is increased as increasing the number of stacked layers. However, the increased number of stacked layers has made the film stress control extremely important for maintaining good process quality. The residual film stress alters the wafer shape accordingly several process impacts have been readily observed across wafer, such as film deposition non-uniformity, etch rate non-uniformity, wafer chucking error on scanner, materials coating/baking defects, overlay degradation and critical dimension (CD) non-uniformity. The residual tensile and compressive stresses on wafers will result in concave and convex wafer shapes, respectively. This study investigates within-wafer CD uniformity (CDU) associated with wafer shape change induced by the 3D NAND flash memory processes. Within-wafer CDU was correlated with several critical parameters including different wafer bow heights of concave and convex wafer shapes, photo resists with different post exposure baking (PEB) temperature sensitivities, and DoseMapper compensation. The results indicated the trend of within-wafer CDU maintains flat for convex wafer shapes with bow height up to +230um and concave wafer shapes with bow height ranging from 0 ~ -70um, while the within-wafer CDU trends up from -70um to -246um wafer bow heights. To minimize the within-wafer CD distribution induced by wafer warpage, carefully tailoring the film stack and thermal budget in the process flow for maintaining the wafer shape at CDU friendly range is indispensable and using photo-resist materials with lower PEB temperature sensitivity is also suggested. In addition, DoseMapper compensation is also an alternative to greatly suppress the within-wafer CD non-uniformity but the photo-resist profile variation induced by across-wafer

Temperature-dependent interface characteristic of silicon wafer bonding based on an amorphous germanium layer deposited by DC-magnetron sputtering

NASA Astrophysics Data System (ADS)

Ke, Shaoying; Lin, Shaoming; Ye, Yujie; Mao, Danfeng; Huang, Wei; Xu, Jianfang; Li, Cheng; Chen, Songyan

2018-03-01

We report a near-bubble-free low-temperature silicon (Si) wafer bonding with a thin amorphous Ge (a-Ge) intermediate layer. The DC-magnetron-sputtered a-Ge film on Si is demonstrated to be extremely flat (RMS = 0.28 nm) and hydrophilic (contact angle = 3°). The effect of the post-annealing temperature on the surface morphology and crystallinity of a-Ge film at the bonded interface is systematically identified. The relationship among the bubble density, annealing temperature, and crystallinity of a-Ge film is also clearly clarified. The crystallization of a-Ge film firstly appears at the bubble region. More interesting feature is that the crystallization starts from the center of the bubbles and sprawls to the bubble edge gradually. The H2 by-product is finally absorbed by intermediate Ge layer with crystalline phase after post annealing. Moreover, the whole a-Ge film out of the bubble totally crystallizes when the annealing time increases. This Ge integration at the bubble region leads to the decrease of the bubble density, which in turn increases the bonding strength.

Particulate contamination removal from wafers using plasmas and mechanical agitation

DOEpatents

Selwyn, G.S.

1998-12-15

Particulate contamination removal from wafers is disclosed using plasmas and mechanical agitation. The present invention includes the use of plasmas with mechanical agitation for removing particulate matter from the surface of a wafer. The apparatus hereof comprises a mechanical activator, at least one conducting contact pin for transferring the vibration from the activator to the wafer, clamp fingers that maintain the wafer`s position, and means for generating a plasma in the vicinity of the surface of the wafer, all parts of the cleaning apparatus except the mechanical activator and part of the contact pin being contained inside the processing chamber. By exposing a wafer to a plasma and providing motion thereto in a direction perpendicular to its surface, the bonding between the particulate matter and the surface may be overcome. Once free of the wafer surface, the particulates become charged by electrons from the plasma and are drawn into the plasma by attractive forces which keep them from redepositing. The introduction of a flowing gas through the plasma sweeps the particulates away from the wafer and out of the plasma. The entire surface is cleaned during one cleaning step. The use of an rf plasma to accomplish the particulate removal was found to remove more than 90% of the particulates. 4 figs.

Fluxless eutectic bonding of GaAs-on-Si by using Ag/Sn solder

NASA Astrophysics Data System (ADS)

Eo, Sung-Hwa; Kim, Dae-Seon; Jeong, Ho-Jung; Jang, Jae-Hyung

2013-11-01

Fluxless GaAs-on-Si wafer bonding using Ag/Sn solder was investigated to realize uniform and void-free heterogeneous material integration. The effects of the diffusion barrier, Ag/Sn thickness, and Ar plasma treatment were studied to achieve the optimal fluxless bonding process. Pt on a GaAs wafer and Mo on a Si wafer act as diffusion barriers by preventing the flow of Ag/Sn solder into both the wafers. The bonding strength is closely related to the Ag/Sn thickness and Ar plasma treatment. A shear strength test was carried out to investigate the bonding strength. Under identical bonding conditions, the Ag/Sn thickness was optimized to achieve higher bonding strength and to avoid the formation of voids due to thermal stress. An Ar plasma pretreatment process improved the bonding strength because the Ar plasma removed carbon contaminants and metal-oxide bonds from the metal surface.

Wafer-level vacuum/hermetic packaging technologies for MEMS

NASA Astrophysics Data System (ADS)

Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil

2010-02-01

An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.

Temperature Dependent Electrical Properties of PZT Wafer

NASA Astrophysics Data System (ADS)

Basu, T.; Sen, S.; Seal, A.; Sen, A.

2016-04-01

The electrical and electromechanical properties of lead zirconate titanate (PZT) wafers were investigated and compared with PZT bulk. PZT wafers were prepared by tape casting technique. The transition temperature of both the PZT forms remained the same. The transition from an asymmetric to a symmetric shape was observed for PZT wafers at higher temperature. The piezoelectric coefficient (d 33) values obtained were 560 pc/N and 234 pc/N, and the electromechanical coupling coefficient (k p) values were 0.68 and 0.49 for bulk and wafer, respectively. The reduction in polarization after fatigue was only ~3% in case of PZT bulk and ~7% for PZT wafer.

Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi

2015-02-16

We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with themore » 20-nm-thick GaSb layer.« less

Particulate contamination removal from wafers using plasmas and mechanical agitation

DOEpatents

Selwyn, Gary S.

1998-01-01

Particulate contamination removal from wafers using plasmas and mechanical agitation. The present invention includes the use of plasmas with mechanical agitation for removing particulate matter from the surface of a wafer. The apparatus hereof comprises a mechanical activator, at least one conducting contact pin for transferring the vibration from the activator to the wafer, clamp fingers that maintain the wafer's position, and means for generating a plasma in the vicinity of the surface of the wafer, all parts of the cleaning apparatus except the mechanical activator and part of the contact pin being contained inside the processing chamber. By exposing a wafer to a plasma and providing motion thereto in a direction perpendicular to its surface, the bonding between the particulate matter and the surface may be overcome. Once free of the wafer surface, the particulates become charged by electrons from the plasma and are drawn into the plasma by attractive forces which keep them from redepositing. The introduction of a flowing gas through the plasma sweeps the particulates away from the wafer and out of the plasma. The entire surface is cleaned during one cleaning step. The use of an rf plasma to accomplish the particulate removal was found to remove more than 90% of the particulates.

Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

NASA Astrophysics Data System (ADS)

Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

2017-10-01

Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.

PubMed

Uddin, Ashfaque; Milaninia, Kaveh; Chen, Chin-Hsuan; Theogarajan, Luke

2011-12-01

This paper presents a novel technique for the integration of small CMOS chips into a large area substrate. A key component of the technique is the CMOS chip based self-aligned masking. This allows for the fabrication of sockets in wafers that are at most 5 µm larger than the chip on each side. The chip and the large area substrate are bonded onto a carrier such that the top surfaces of the two components are flush. The unique features of this technique enable the integration of macroscale components, such as leads and microfluidics. Furthermore, the integration process allows for MEMS micromachining after CMOS die-wafer integration. To demonstrate the capabilities of the proposed technology, a low-power integrated potentiostat chip for biosensing implemented in the AMI 0.5 µm CMOS technology is integrated in a silicon substrate. The horizontal gap and the vertical displacement between the chip and the large area substrate measured after the integration were 4 µm and 0.5 µm, respectively. A number of 104 interconnects are patterned with high-precision alignment. Electrical measurements have shown that the functionality of the chip is not affected by the integration process.

Curvature evolution of 200 mm diameter GaN-on-insulator wafer fabricated through metalorganic chemical vapor deposition and bonding

NASA Astrophysics Data System (ADS)

Zhang, Li; Lee, Kwang Hong; Kadir, Abdul; Wang, Yue; Lee, Kenneth E.; Tan, Chuan Seng; Chua, Soo Jin; Fitzgerald, Eugene A.

2018-05-01

Crack-free 200 mm diameter N-polar GaN-on-insulator (GaN-OI) wafers are demonstrated by the transfer of metalorganic chemical vapor deposition (MOCVD)-grown Ga-polar GaN layers from Si(111) wafers onto SiO2/Si(100) wafers. The wafer curvature of the GaN-OI wafers after the removal of the original Si(111) substrate is correlated with the wafer curvature of the starting GaN-on-Si wafers and the voids on the GaN-on-Si surface that evolve into cracks on the GaN-OI wafers. In crack-free GaN-OI wafers, the wafer curvature during the removal of the AlN nucleation layer, AlGaN strain-compensation buffer layers and GaN layers is correlated with the residual stress distribution within individual layers in the GaN-OI wafer.

WaferOptics® mass volume production and reliability

NASA Astrophysics Data System (ADS)

Wolterink, E.; Demeyer, K.

2010-05-01

The Anteryon WaferOptics® Technology platform contains imaging optics designs, materials, metrologies and combined with wafer level based Semicon & MEMS production methods. WaferOptics® first required complete new system engineering. This system closes the loop between application requirement specifications, Anteryon product specification, Monte Carlo Analysis, process windows, process controls and supply reject criteria. Regarding the Anteryon product Integrated Lens Stack (ILS), new design rules, test methods and control systems were assessed, implemented, validated and customer released for mass production. This includes novel reflowable materials, mastering process, replication, bonding, dicing, assembly, metrology, reliability programs and quality assurance systems. Many of Design of Experiments were performed to assess correlations between optical performance parameters and machine settings of all process steps. Lens metrologies such as FFL, BFL, and MTF were adapted for wafer level production and wafer mapping was introduced for yield management. Test methods for screening and validating suitable optical materials were designed. Critical failure modes such as delamination and popcorning were assessed and modeled with FEM. Anteryon successfully managed to integrate the different technologies starting from single prototypes to high yield mass volume production These parallel efforts resulted in a steep yield increase from 30% to over 90% in a 8 months period.

A fully wafer-level packaged RF MEMS switch with low actuation voltage using a piezoelectric actuator

NASA Astrophysics Data System (ADS)

Park, Jae-Hyoung; Lee, Hee-Chul; Park, Yong-Hee; Kim, Yong-Dae; Ji, Chang-Hyeon; Bu, Jonguk; Nam, Hyo-Jin

2006-11-01

In this paper, a fully wafer-level packaged RF MEMS switch has been demonstrated, which has low operation voltage, using a piezoelectric actuator. The piezoelectric actuator was designed to operate at low actuation voltage for application to advanced mobile handsets. The dc contact type RF switch was packaged using the wafer-level bonding process. The CPW transmission lines and piezoelectric actuators have been fabricated on separate wafers and assembled together by the wafer-level eutectic bonding process. A gold and tin composite was used for eutectic bonding at a low temperature of 300 °C. Via holes interconnecting the electrical contact pads through the wafer were filled completely with electroplated copper. The fully wafer-level packaged RF MEMS switch showed an insertion loss of 0.63 dB and an isolation of 26.4 dB at 5 GHz. The actuation voltage of the switch was 5 V. The resonant frequency of the piezoelectric actuator was 38.4 kHz and the spring constant of the actuator was calculated to be 9.6 N m-1. The size of the packaged SPST (single-pole single-through) switch was 1.2 mm × 1.2 mm including the packaging sealing rim. The effect of the proposed package structure on the RF performance was characterized with a device having CPW through lines and vertical feed lines excluding the RF switches. The measured packaging loss was 0.2 dB and the return loss was 33.6 dB at 5 GHz.

Optical surface analysis: a new technique for the inspection and metrology of optoelectronic films and wafers

NASA Astrophysics Data System (ADS)

Bechtler, Laurie; Velidandla, Vamsi

2003-04-01

In response to demand for higher volumes and greater product capability, integrated optoelectronic device processing is rapidly increasing in complexity, benefiting from techniques developed for conventional silicon integrated circuit processing. The needs for high product yield and low manufacturing cost are also similar to the silicon wafer processing industry. This paper discusses the design and use of an automated inspection instrument called the Optical Surface Analyzer (OSA) to evaluate two critical production issues in optoelectronic device manufacturing: (1) film thickness uniformity, and (2) defectivity at various process steps. The OSA measurement instrument is better suited to photonics process development than most equipment developed for conventional silicon wafer processing in two important ways: it can handle both transparent and opaque substrates (unlike most inspection and metrology tools), and it is a full-wafer inspection method that captures defects and film variations over the entire substrate surface (unlike most film thickness measurement tools). Measurement examples will be provided in the paper for a variety of films and substrates used for optoelectronics manufacturing.

1.3 μm wavelength vertical cavity surface emitting laser fabricated by orientation-mismatched wafer bonding: A prospect for polarization control

NASA Astrophysics Data System (ADS)

Okuno, Yae L.; Geske, Jon; Gan, Kian-Giap; Chiu, Yi-Jen; DenBaars, Steven P.; Bowers, John E.

2003-04-01

We propose and demonstrate a long-wavelength vertical cavity surface emitting laser (VCSEL) which consists of a (311)B InP-based active region and (100) GaAs-based distributed Bragg reflectors (DBRs), with an aim to control the in-plane polarization of output power. Crystal growth on (311)B InP substrates was performed under low-migration conditions to achieve good crystalline quality. The VCSEL was fabricated by wafer bonding, which enables us to combine different materials regardless of their lattice and orientation mismatch without degrading their quality. The VCSEL was polarized with a power extinction ratio of 31 dB.

Wafering economies for industrialization from a wafer manufacturer's viewpoint

NASA Technical Reports Server (NTRS)

Rosenfield, T. P.; Fuerst, F. P.

1982-01-01

The key technical limitations which inhibit the lowering of value-added costs for state-of-the-art wafering techniques are assessed. From the best experimental results to date, a projection was made to identify those parts of each system which need to be developed in order to meet or improve upon the value-added cost reduction necessary for $0.70/Wp photovoltaics modules.

Wafer-level manufacturing technology of glass microlenses

NASA Astrophysics Data System (ADS)

Gossner, U.; Hoeftmann, T.; Wieland, R.; Hansch, W.

2014-08-01

In high-tech products, there is an increasing demand to integrate glass lenses into complex micro systems. Especially in the lighting industry LEDs and laser diodes used for automotive applications require encapsulated micro lenses. To enable low-cost production, manufacturing of micro lenses on wafer level base using a replication technology is a key technology. This requires accurate forming of thousands of lenses with a diameter of 1-2 mm on a 200 mm wafer compliant with mass production. The article will discuss the technical aspects of a lens manufacturing replication process and the challenges, which need to be solved: choice of an appropriate master for replication, thermally robust interlayer coating, choice of replica glass, bonding and separation procedure. A promising approach for the master substrate material is based on a lens structured high-quality glass wafer with high melting point covered by a coating layer of amorphous silicon or germanium. This layer serves as an interlayer for the glass bonding process. Low pressure chemical vapor deposition and plasma enhanced chemical vapor deposition processes allow a deposition of layer coatings with different hydrogen and doping content influencing their chemical and physical behavior. A time reduced molding process using a float glass enables the formation of high quality lenses while preserving the recyclability of the mother substrate. The challenge is the separation of the replica from the master mold. An overview of chemical methods based on optimized etching of coating layer through small channels will be given and the impact of glass etching on surface roughness is discussed.

Patterned wafer geometry grouping for improved overlay control

NASA Astrophysics Data System (ADS)

Lee, Honggoo; Han, Sangjun; Woo, Jaeson; Park, Junbeom; Song, Changrock; Anis, Fatima; Vukkadala, Pradeep; Jeon, Sanghuck; Choi, DongSub; Huang, Kevin; Heo, Hoyoung; Smith, Mark D.; Robinson, John C.

2017-03-01

Process-induced overlay errors from outside the litho cell have become a significant contributor to the overlay error budget including non-uniform wafer stress. Previous studies have shown the correlation between process-induced stress and overlay and the opportunity for improvement in process control, including the use of patterned wafer geometry (PWG) metrology to reduce stress-induced overlay signatures. Key challenges of volume semiconductor manufacturing are how to improve not only the magnitude of these signatures, but also the wafer to wafer variability. This work involves a novel technique of using PWG metrology to provide improved litho-control by wafer-level grouping based on incoming process induced overlay, relevant for both 3D NAND and DRAM. Examples shown in this study are from 19 nm DRAM manufacturing.

Real-time direct and diffraction X-ray imaging of irregular silicon wafer breakage.

PubMed

Rack, Alexander; Scheel, Mario; Danilewsky, Andreas N

2016-03-01

Fracture and breakage of single crystals, particularly of silicon wafers, are multi-scale problems: the crack tip starts propagating on an atomic scale with the breaking of chemical bonds, forms crack fronts through the crystal on the micrometre scale and ends macroscopically in catastrophic wafer shattering. Total wafer breakage is a severe problem for the semiconductor industry, not only during handling but also during temperature treatments, leading to million-dollar costs per annum in a device production line. Knowledge of the relevant dynamics governing perfect cleavage along the {111} or {110} faces, and of the deflection into higher indexed {hkl} faces of higher energy, is scarce due to the high velocity of the process. Imaging techniques are commonly limited to depicting only the state of a wafer before the crack and in the final state. This paper presents, for the first time, in situ high-speed crack propagation under thermal stress, imaged simultaneously in direct transmission and diffraction X-ray imaging. It shows how the propagating crack tip and the related strain field can be tracked in the phase-contrast and diffracted images, respectively. Movies with a time resolution of microseconds per frame reveal that the strain and crack tip do not propagate continuously or at a constant speed. Jumps in the crack tip position indicate pinning of the crack tip for about 1-2 ms followed by jumps faster than 2-6 m s(-1), leading to a macroscopically observed average velocity of 0.028-0.055 m s(-1). The presented results also give a proof of concept that the described X-ray technique is compatible with studying ultra-fast cracks up to the speed of sound.

Microelectromechanical system pressure sensor integrated onto optical fiber by anodic bonding.

PubMed

Saran, Anish; Abeysinghe, Don C; Boyd, Joseph T

2006-03-10

Optical microelectromechanical system pressure sensors based on the principle of Fabry-Perot interferometry have been developed and fabricated using the technique of silicon-to-silicon anodic bonding. The pressure sensor is then integrated onto an optical fiber by a novel technique of anodic bonding without use of any adhesives. In this anodic bonding technique we use ultrathin silicon of thickness 10 microm to bond the optical fiber to the sensor head. The ultrathin silicon plays the role of a stress-reducing layer, which helps the bonding of an optical fiber to silicon having conventional wafer thickness. The pressure-sensing membrane is formed by 8 microm thick ultrathin silicon acting as a membrane, thus eliminating the need for bulk silicon etching. The pressure sensor integrated onto an optical fiber is tested for static response, and experimental results indicate degradation in the fringe visibility of the Fabry-Perot interferometer. This effect was mainly due to divergent light rays from the fiber degrading the fringe visibility. This effect is demonstrated in brief by an analytical model.

Preparation of wafer-level glass cavities by a low-cost chemical foaming process (CFP).

PubMed

Shang, Jintang; Chen, Boyin; Lin, Wei; Wong, Ching-Ping; Zhang, Di; Xu, Chao; Liu, Junwen; Huang, Qing-An

2011-04-21

A novel foaming process-chemical foaming process (CFP)-using foaming agents to fabricate wafer-level micro glass cavities including channels and bubbles was investigated. The process consists of the following steps sequentially: (1) shallow cavities were fabricated by a wet etching on a silicon wafer; (2) powders of a proper foaming agent were placed in a silicon cavity, named 'mother cavity', on the etched silicon surface; (3) the silicon cavities were sealed with a glass wafer by anodic bonding; (4) the bonded wafers were heated to above the softening point of the glass, and baked for several minutes, when the gas released by the decomposition of the foaming agent in the 'mother cavity' went into the other sealed interconnected silicon cavities to foam the softened glass into cylindrical channels named 'daughter channels', or spherical bubbles named 'son bubbles'. Results showed that wafer-level micro glass cavities with smooth wall surfaces were achieved successfully without contamination by the CFP. A model for the CFP was proposed to predict the final shape of the glass cavity. Experimental results corresponded with model predictions. The CFP provides a low-cost avenue to preparation of micro glass cavities of high quality for applications such as micro-reactors, micro total analysis systems (μTAS), analytical and bio-analytical applications, and MEMS packaging.

Imaging Study of Multi-Crystalline Silicon Wafers Throughout the Manufacturing Process: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnston, S.; Yan, F.; Zaunbracher, K.

2011-07-01

Imaging techniques are applied to multi-crystalline silicon bricks, wafers at various process steps, and finished solar cells. Photoluminescence (PL) imaging is used to characterize defects and material quality on bricks and wafers. Defect regions within the wafers are influenced by brick position within an ingot and height within the brick. The defect areas in as-cut wafers are compared to imaging results from reverse-bias electroluminescence and dark lock-in thermography and cell parameters of near-neighbor finished cells. Defect areas are also characterized by defect band emissions. The defect areas measured by these techniques on as-cut wafers are shown to correlate to finishedmore » cell performance.« less

Fabrication of Total-Dose-Radiation-Hardened (TDRH) SOI wafer with embedded silicon nanoclusters

NASA Astrophysics Data System (ADS)

Wu, Aimin; Wang, Xi; Wei, Xing; Chen, Jing; Chen, Ming; Zhang, Zhengxuan

2009-05-01

Si ion-implantation and post annealing of silicon wafers prior to wafer bonding were used to radiation-harden the thermal oxide layer of Silicon on Insulator structures. After grinding and polishing, Total-Dose-Radiation-Hardened SOI (TDRH-SOI) wafers with several-micron-thick device layers were prepared. Electrical characterization before and after X-ray irradiation showed that the flatband voltage shift induced by irradiation was reduced by this preprocessing. Photoluminescence Spectroscopy (PL), Transmission Electron Microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) results indicated that the improvement of the total dose response of the TDRH-SOI wafer was associated with formation of Si nanoclusters in the implanted oxide layer, suggesting that these were the likely candidates for electron and proton trapping centers that reduce the positive charge buildup effect in the buried oxide.

InP-based photonic integrated circuit platform on SiC wafer.

PubMed

Takenaka, Mitsuru; Takagi, Shinichi

2017-11-27

We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

Functional Testing and Characterisation of ISFETs on Wafer Level by Means of a Micro-droplet Cell#

PubMed Central

Poghossian, Arshak; Schumacher, Kerstin; Kloock, Joachim P.; Rosenkranz, Christian; Schultze, Joachim W.; Müller-Veggian, Mattea; Schöning, Michael J.

2006-01-01

A wafer-level functionality testing and characterisation system for ISFETs (ion-sensitive field-effect transistor) is realised by means of integration of a specifically designed capillary electrochemical micro-droplet cell into a commercial wafer prober-station. The developed system allows the identification and selection of “good” ISFETs at the earliest stage and to avoid expensive bonding, encapsulation and packaging processes for non-functioning ISFETs and thus, to decrease costs, which are wasted for bad dies. The developed system is also feasible for wafer-level characterisation of ISFETs in terms of sensitivity, hysteresis and response time. Additionally, the system might be also utilised for wafer-level testing of further electrochemical sensors.

Bonding techniques for hybrid active pixel sensors (HAPS)

NASA Astrophysics Data System (ADS)

Bigas, M.; Cabruja, E.; Lozano, M.

2007-05-01

A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

Dislocation-free strained silicon-on-silicon by in-place bonding

NASA Astrophysics Data System (ADS)

Cohen, G. M.; Mooney, P. M.; Paruchuri, V. K.; Hovel, H. J.

2005-06-01

In-place bonding is a technique where silicon-on-insulator (SOI) slabs are bonded by hydrophobic attraction to the underlying silicon substrate when the buried oxide is undercut in dilute HF. The bonding between the exposed surfaces of the SOI slab and the substrate propagates simultaneously with the buried oxide etching. As a result, the slabs maintain their registration and are referred to as "bonded in-place". We report the fabrication of dislocation-free strained silicon slabs from pseudomorphic trilayer Si/SiGe/SOI by in-place bonding. Removal of the buried oxide allows the compressively strained SiGe film to relax elastically and induce tensile strain in the top and bottom silicon films. The slabs remain bonded to the substrate by van der Waals forces when the wafer is dried. Subsequent annealing forms a covalent bond such that when the upper Si and the SiGe layer are removed, the bonded silicon slab remains strained.

Development of a classical force field for the oxidized Si surface: application to hydrophilic wafer bonding.

PubMed

Cole, Daniel J; Payne, Mike C; Csányi, Gábor; Spearing, S Mark; Colombi Ciacchi, Lucio

2007-11-28

We have developed a classical two- and three-body interaction potential to simulate the hydroxylated, natively oxidized Si surface in contact with water solutions, based on the combination and extension of the Stillinger-Weber potential and of a potential originally developed to simulate SiO(2) polymorphs. The potential parameters are chosen to reproduce the structure, charge distribution, tensile surface stress, and interactions with single water molecules of a natively oxidized Si surface model previously obtained by means of accurate density functional theory simulations. We have applied the potential to the case of hydrophilic silicon wafer bonding at room temperature, revealing maximum room temperature work of adhesion values for natively oxidized and amorphous silica surfaces of 97 and 90 mJm(2), respectively, at a water adsorption coverage of approximately 1 ML. The difference arises from the stronger interaction of the natively oxidized surface with liquid water, resulting in a higher heat of immersion (203 vs 166 mJm(2)), and may be explained in terms of the more pronounced water structuring close to the surface in alternating layers of larger and smaller densities with respect to the liquid bulk. The computed force-displacement bonding curves may be a useful input for cohesive zone models where both the topographic details of the surfaces and the dependence of the attractive force on the initial surface separation and wetting can be taken into account.

High performance InAs quantum dot lasers on silicon substrates by low temperature Pd-GaAs wafer bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Zihao; Preble, Stefan F.; Yao, Ruizhe

2015-12-28

InAs quantum dot (QD) laser heterostructures have been grown by molecular beam epitaxy system on GaAs substrates, and then transferred to silicon substrates by a low temperature (250 °C) Pd-mediated wafer bonding process. A low interfacial resistivity of only 0.2 Ω cm{sup 2} formed during the bonding process is characterized by the current-voltage measurements. The InAs QD lasers on Si exhibit comparable characteristics to state-of-the-art QD lasers on silicon substrates, where the threshold current density J{sub th} and differential quantum efficiency η{sub d} of 240 A/cm{sup 2} and 23.9%, respectively, at room temperature are obtained with laser bars of cavity length and waveguide ridgemore » of 1.5 mm and 5 μm, respectively. The InAs QD lasers also show operation up to 100 °C with a threshold current density J{sub th} and differential quantum efficiency η{sub d} of 950 A/cm{sup 2} and 9.3%, respectively. The temperature coefficient T{sub 0} of 69 K from 60 to 100 °C is characterized from the temperature dependent J{sub th} measurements.« less

New optoelectronic methodology for nondestructive evaluation of MEMS at the wafer level

NASA Astrophysics Data System (ADS)

Furlong, Cosme; Ferguson, Curtis F.; Melson, Michael J.

2004-02-01

One of the approaches to fabrication of MEMS involves surface micromachining to define dies on single crystal silicon wafers, dicing of the wafers to separate the dies, and electronic packaging of the individual dies. Dicing and packaging of MEMS accounts for a large fraction of the fabrication costs, therefore, nondestructive evaluation at the wafer level, before dicing, can have significant implications on improving production yield and costs. In this paper, advances in development of optoelectronic holography (OEH) techniques for nondestructive, noninvasive, full-field of view evaluation of MEMS at the wafer level are described. With OEH techniques, quantitative measurements of shape and deformation of MEMS, as related to their performance and integrity, are obtained with sub-micrometer spatial resolution and nanometer measuring accuracy. To inspect an entire wafer with OEH methodologies, measurements of overlapping regions of interest (ROI) on a wafer are recorded and adjacent ROIs are stitched together through efficient 3D correlation analysis algorithms. Capabilities of the OEH techniques are illustrated with representative applications, including determination of optimal inspection conditions to minimize inspection time while achieving sufficient levels of accuracy and resolution.

The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

NASA Astrophysics Data System (ADS)

Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

2017-02-01

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

Bonding temperature dependence of GaInAsP/InP laser diode grown on hydrophilically directly bonded InP/Si substrate

NASA Astrophysics Data System (ADS)

Aikawa, Masaki; Onuki, Yuya; Hayasaka, Natsuki; Nishiyama, Tetsuo; Kamada, Naoki; Han, Xu; Kallarasan Periyanayagam, Gandhi; Uchida, Kazuki; Sugiyama, Hirokazu; Shimomura, Kazuhiko

2018-02-01

The bonding-temperature-dependent lasing characteristics of 1.5 a µm GaInAsP laser diode (LD) grown on a directly bonded InP/Si substrate were successfully obtained. We have fabricated the InP/Si substrate using a direct hydrophilic wafer bonding technique at bonding temperatures of 350, 400, and 450 °C, and deposited GaInAsP/InP double heterostructure layers on this InP/Si substrate. The surface conditions, X-ray diffraction (XRD) analysis, photoluminescence (PL) spectra, and electrical characteristics after the growth were compared at these bonding temperatures. No significant differences were confirmed in X-ray diffraction analysis and PL spectra at these bonding temperatures. We realized the room-temperature lasing of the GaInAsP LD on the InP/Si substrate bonded at 350 and 400 °C. The threshold current densities were 4.65 kA/cm2 at 350 °C and 4.38 kA/cm2 at 400 °C. The electrical resistance was found to increase with annealing temperature.

Application of Au-Sn eutectic bonding in hermetic radio-frequency microelectromechanical system wafer level packaging

NASA Astrophysics Data System (ADS)

Wang, Qian; Choa, Sung-Hoon; Kim, Woonbae; Hwang, Junsik; Ham, Sukjin; Moon, Changyoul

2006-03-01

Development of packaging is one of the critical issues toward realizing commercialization of radio-frequency-microelectromechanical system (RF-MEMS) devices. The RF-MEMS package should be designed to have small size, hermetic protection, good RF performance, and high reliability. In addition, packaging should be conducted at sufficiently low temperature. In this paper, a low-temperature hermetic wafer level packaging scheme for the RF-MEMS devices is presented. For hermetic sealing, Au-Sn eutectic bonding technology at temperatures below 300°C is used. Au-Sn multilayer metallization with a square loop of 70 µm in width is performed. The electrical feed-through is achieved by the vertical through-hole via filling with electroplated Cu. The size of the MEMS package is 1 mm × 1 mm × 700 µm. The shear strength and hermeticity of the package satisfies the requirements of MIL-STD-883F. Any organic gases or contamination are not observed inside the package. The total insertion loss for the packaging is 0.075 dB at 2 GHz. Furthermore, the robustness of the package is demonstrated by observing no performance degradation and physical damage of the package after several reliability tests.

Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

NASA Astrophysics Data System (ADS)

Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

2004-08-01

The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

Method for making circular tubular channels with two silicon wafers

DOEpatents

Yu, C.M.; Hui, W.C.

1996-11-19

A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si{sub 3}N{sub 4}) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO{sub 3}/CH{sub 3}COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary. 11 figs.

Method for making circular tubular channels with two silicon wafers

DOEpatents

Yu, Conrad M.; Hui, Wing C.

1996-01-01

A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si.sub.3 N.sub.4) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO.sub.3 /CH.sub.3 COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary.

Controllable laser thermal cleavage of sapphire wafers

NASA Astrophysics Data System (ADS)

Xu, Jiayu; Hu, Hong; Zhuang, Changhui; Ma, Guodong; Han, Junlong; Lei, Yulin

2018-03-01

Laser processing of substrates for light-emitting diodes (LEDs) offers advantages over other processing techniques and is therefore an active research area in both industrial and academic sectors. The processing of sapphire wafers is problematic because sapphire is a hard and brittle material. Semiconductor laser scribing processing suffers certain disadvantages that have yet to be overcome, thereby necessitating further investigation. In this work, a platform for controllable laser thermal cleavage was constructed. A sapphire LED wafer was modeled using the finite element method to simulate the thermal and stress distributions under different conditions. A guide groove cut by laser ablation before the cleavage process was observed to guide the crack extension and avoid deviation. The surface and cross section of sapphire wafers processed using controllable laser thermal cleavage were characterized by scanning electron microscopy and optical microscopy, and their morphology was compared to that of wafers processed using stealth dicing. The differences in luminous efficiency between substrates prepared using these two processing methods are explained.

Material electronic quality specifications for polycrystalline silicon wafers

NASA Astrophysics Data System (ADS)

Kalejs, J. P.

1994-06-01

As the use of polycrystalline silicon wafers has expanded in the photovoltaic industry, the need grows for monitoring and qualification techniques for as-grown material that can be used to optimize crystal growth and help predict solar cell performance. Particular needs are for obtaining quantitative measures over full wafer areas of the effects of lifetime limiting defects and of the lifetime upgrading taking place during solar cell processing. We review here the approaches being pursued in programs under way to develop material quality specifications for thin Edge-defined Film-fed Growth (EFG) polycrystalline silicon as-grown wafers. These studies involve collaborations between Mobil Solar, and NREL and university-based laboratories.

Stable wafer-carrier system

DOEpatents

Rozenzon, Yan; Trujillo, Robert T; Beese, Steven C

2013-10-22

One embodiment of the present invention provides a wafer-carrier system used in a deposition chamber for carrying wafers. The wafer-carrier system includes a base susceptor and a top susceptor nested inside the base susceptor with its wafer-mounting side facing the base susceptor's wafer-mounting side, thereby forming a substantially enclosed narrow channel. The base susceptor provides an upward support to the top susceptor.

Effect of dimethyl sulfoxide wet-bonding technique on hybrid layer quality and dentin bond strength.

PubMed

Stape, Thiago Henrique Scarabello; Tjäderhane, Leo; Marques, Marcelo Rocha; Aguiar, Flávio Henrique Baggio; Martins, Luís Roberto Marcondes

2015-06-01

This study examined the effect of a dimethyl sulfoxide (DMSO) wet bonding technique on the resin infiltration depths at the bonded interface and dentin bond strength of different adhesive systems. Flat dentin surfaces of 48 human third molars were treated with 50% DMSO (experimental groups) or with distilled water (controls) before bonding using an etch-and-rinse (SBMP: Scotchbond Multi-Purpose, 3M ESPE) or a self-etch (Clearfil: Clearfil SE Bond, Kuraray) adhesive system. The restored crown segments (n=12/group) were stored in distilled water (24h) and sectioned for interfacial analysis of exposed collagen using Masson's Trichrome staining and for microtensile bond strength testing. The extent of exposed collagen was measured using light microscopy and a histometric analysis software. Failure modes were examined by SEM. Data was analyzed by two-way ANOVA followed by Tukey Test (α=0.05). The interaction of bonding protocol and adhesive system had significant effects on the extension of exposed collagen matrix (p<0.0001) and bond strength (p=0.0091). DMSO-wet bonding significantly reduced the extent of exposed collagen matrix for SBMP and Clearfil (p<0.05). Significant increase in dentin bond strength was observed on DMSO-treated specimens bonded with SBMP (p<0.05), while no differences were observed for Clearfil (p>0.05). DMSO-wet bonding was effective to improve the quality of resin-dentin bonds of the tested etch-and-rinse adhesives by reducing the extent of exposed collagen matrix at the base of the resin-dentin biopolymer. The improved penetration of adhesive monomers is reflected as an increase in the immediate bond strength when the DMSO-wet bonding technique is used with a water-based etch-and-rinse adhesive. Copyright © 2015 Academy of Dental Materials. Published by Elsevier Ltd. All rights reserved.

Surface etching technologies for monocrystalline silicon wafer solar cells

NASA Astrophysics Data System (ADS)

Tang, Muzhi

With more than 200 GW of accumulated installations in 2015, photovoltaics (PV) has become an important green energy harvesting method. The PV market is dominated by solar cells made from crystalline silicon wafers. The engineering of the wafer surfaces is critical to the solar cell cost reduction and performance enhancement. Therefore, this thesis focuses on the development of surface etching technologies for monocrystalline silicon wafer solar cells. It aims to develop a more efficient alkaline texturing method and more effective surface cleaning processes. Firstly, a rapid, isopropanol alcohol free texturing method is successfully demonstrated to shorten the process time and reduce the consumption of chemicals. This method utilizes the special chemical properties of triethylamine, which can form Si-N bonds with wafer surface atoms. Secondly, a room-temperature anisotropic emitter etch-back process is developed to improve the n+ emitter passivation. Using this method, 19.0% efficient screen-printed aluminium back surface field solar cells are developed that show an efficiency gain of 0.15% (absolute) compared with conventionally made solar cells. Finally, state-of-the-art silicon surface passivation results are achieved using hydrogen plasma etching as a dry alternative to the classical hydrofluoric acid wet-chemical process. The effective native oxide removal and the hydrogenation of the silicon surface are shown to be the reasons for the excellent level of surface passivation achieved with this novel method.

Environmentally benign processing of YAG transparent wafers

NASA Astrophysics Data System (ADS)

Yang, Yan; Wu, Yiquan

2015-12-01

Transparent yttrium aluminum garnet (YAG) wafers were successfully produced via aqueous tape casting and vacuum sintering techniques using a new environmentally friendly binder, a copolymer of isobutylene and maleic anhydride with the commercial name ISOBAM (noted as ISOBAM). Aqueous YAG slurries were mixed by ball-milling, which was followed by de-gassing and tape casting of wafers. The final YAG green tapes were homogenous and flexible, and could be bent freely without cracking. After the drying and sintering processes, transparent YAG wafers were achieved. The microstructures of both the green tape and vacuum-sintered YAG ceramic were observed by scanning electronic microscopy (SEM). Phase compositions were examined by X-ray diffraction (XRD). Optical transmittance was measured in UV-VIS regions with the result that the transmittance is 82.6% at a wavelength of 800 nm.

Technique sensitivity in bonding to enamel and dentin.

PubMed

Powers, John M; Farah, John W

2010-09-01

Bonding to enamel and dentin has been among the most significant advancements in dentistry in the last five decades; extensive research and product development have resulted in more adhesive options. However, bonding to enamel and dentin still proves to be challenging, and selecting the correct product for a clinical application can be confusing. An incorrect choice can lead to insufficient bond strength. Day-to-day clinical factors, such as the presence of enamel, superficial dentin, or carious dentin, as well as contamination by saliva, blood, or bleaching agents, can cause bonding agents to be technique sensitive-they may fail prematurely if steps are not followed meticulously. This article attempts to simplify the selection process for enamel and dentinal bonding and summarize clinically relevant bonding information that will help produce consistently successful results.

Electrically pumped 1.3 microm room-temperature InAs/GaAs quantum dot lasers on Si substrates by metal-mediated wafer bonding and layer transfer.

PubMed

Tanabe, Katsuaki; Guimard, Denis; Bordel, Damien; Iwamoto, Satoshi; Arakawa, Yasuhiko

2010-05-10

An electrically pumped InAs/GaAs quantum dot laser on a Si substrate has been demonstrated. The double-hetero laser structure was grown on a GaAs substrate by metal-organic chemical vapor deposition and layer-transferred onto a Si substrate by GaAs/Si wafer bonding mediated by a 380-nm-thick Au-Ge-Ni alloy layer. This broad-area Fabry-Perot laser exhibits InAs quantum dot ground state lasing at 1.31 microm at room temperature with a threshold current density of 600 A/cm(2). (c) 2010 Optical Society of America.

SEMICONDUCTOR TECHNOLOGY: Wafer level hermetic packaging based on Cu-Sn isothermal solidification technology

NASA Astrophysics Data System (ADS)

Yuhan, Cao; Le, Luo

2009-08-01

A novel wafer level bonding method based on Cu-Sn isothermal solidification technology is established. A multi-layer sealing ring and the bonding processing are designed, and the amount of solder and the bonding parameters are optimized based on both theoretical and experimental results. Verification shows that oxidation of the solder layer, voids and the scalloped-edge appearance of the Cu6Sn5 phase are successfully avoided. An average shear strength of 19.5 MPa and an excellent leak rate of around 1.9 × 10-9 atm cc/s are possible, meeting the demands of MIL-STD-883E.

Vertical and lateral heterogeneous integration

NASA Astrophysics Data System (ADS)

Geske, Jon; Okuno, Yae L.; Bowers, John E.; Jayaraman, Vijay

2001-09-01

A technique for achieving large-scale monolithic integration of lattice-mismatched materials in the vertical direction and the lateral integration of dissimilar lattice-matched structures has been developed. The technique uses a single nonplanar direct-wafer-bond step to transform vertically integrated epitaxial structures into lateral epitaxial variation across the surface of a wafer. Nonplanar wafer bonding is demonstrated by integrating four different unstrained multi-quantum-well active regions lattice matched to InP on a GaAs wafer surface. Microscopy is used to verify the quality of the bonded interface, and photoluminescence is used to verify that the bonding process does not degrade the optical quality of the laterally integrated wells. The authors propose this technique as a means to achieve greater levels of wafer-scale integration in optical, electrical, and micromechanical devices.

Wafer-level colinearity monitoring for TFH applications

NASA Astrophysics Data System (ADS)

Moore, Patrick; Newman, Gary; Abreau, Kelly J.

2000-06-01

Advances in thin film head (TFH) designs continue to outpace those in the IC industry. The transition to giant magneto resistive (GMR) designs is underway along with the push toward areal densities in the 20 Gbit/inch2 regime and beyond. This comes at a time when the popularity of the low-cost personal computer (PC) is extremely high, and PC prices are continuing to fall. Consequently, TFH manufacturers are forced to deal with pricing pressure in addition to technological demands. New methods of monitoring and improving yield are required along with advanced head designs. TFH manufacturing is a two-step process. The first is a wafer-level process consisting of manufacturing devices on substrates using processes similar to those in the IC industry. The second half is a slider-level process where wafers are diced into 'rowbars' containing many heads. Each rowbar is then lapped to obtain the desired performance from each head. Variation in the placement of specific layers of each device on the bar, known as a colinearity error, causes a change in device performance and directly impacts yield. The photolithography tool and process contribute to colinearity errors. These components include stepper lens distortion errors, stepper stage errors, reticle fabrication errors, and CD uniformity errors. Currently, colinearity is only very roughly estimated during wafer-level TFH production. An absolute metrology tool, such as a Nikon XY, could be used to quantify colinearity with improved accuracy, but this technique is impractical since TFH manufacturers typically do not have this type of equipment at the production site. More importantly, this measurement technique does not provide the rapid feedback needed in a high-volume production facility. Consequently, the wafer-fab must rely on resistivity-based measurements from slider-fab to quantify colinearity errors. The feedback of this data may require several weeks, making it useless as a process diagnostic. This study examines

W-Band On-Wafer Measurement of Uniplanar Slot-Type Antennas

NASA Technical Reports Server (NTRS)

Raman, Sanjay; Gauthier, Gildas P.; Rebeiz, Gabriel M.

1997-01-01

Uniplanar slot-type antennas such as coplanar waveguide fed single- and dual-polarized slot-ring antennas and double folded-slot antennas are characterized using a millimeter-wave network analyzer and on-wafer measurement techniques. The antennas are designed to be mounted on a dielectric lens to minimize power loss into substrate modes and realize high-gain antenna patterns. On-wafer measurements are performed by placing the antenna wafer on a thick dielectric spacer of similar e(sub t) and eliminating the reflection from the probe station chuck with time-domain gating. The measured results agree well with method-of-moments simulations.

Laser cutting sandwich structure glass-silicon-glass wafer with laser induced thermal-crack propagation

NASA Astrophysics Data System (ADS)

Cai, Yecheng; Wang, Maolu; Zhang, Hongzhi; Yang, Lijun; Fu, Xihong; Wang, Yang

2017-08-01

Silicon-glass devices are widely used in IC industry, MEMS and solar energy system because of their reliability and simplicity of the manufacturing process. With the trend toward the wafer level chip scale package (WLCSP) technology, the suitable dicing method of silicon-glass bonded structure wafer has become necessary. In this paper, a combined experimental and computational approach is undertaken to investigate the feasibility of cutting the sandwich structure glass-silicon-glass (SGS) wafer with laser induced thermal-crack propagation (LITP) method. A 1064 nm semiconductor laser cutting system with double laser beams which could simultaneously irradiate on the top and bottom of the sandwich structure wafer has been designed. A mathematical model for describing the physical process of the interaction between laser and SGS wafer, which consists of two surface heating sources and two volumetric heating sources, has been established. The temperature stress distribution are simulated by using finite element method (FEM) analysis software ABAQUS. The crack propagation process is analyzed by using the J-integral method. In the FEM model, a stationary planar crack is embedded in the wafer and the J-integral values around the crack front edge are determined using the FEM. A verification experiment under typical parameters is conducted and the crack propagation profile on the fracture surface is examined by the optical microscope and explained from the stress distribution and J-integral value.

Compensating measured intra-wafer ring oscillator stage delay with intra-wafer exposure dose corrections

NASA Astrophysics Data System (ADS)

Verhaegen, Staf; Nackaerts, Axel; Dusa, Mircea; Carpaij, Rene; Vandenberghe, Geert; Finders, Jo

2006-03-01

The purpose of this paper is to use measurements on real working devices to derive more information than typically measured by the classic line-width measurement techniques. The first part of the paper will discuss the principle of the measurements with a ring oscillator, a circuit used to measure the speed of elementary logic gates. These measurements contribute to the understanding of the exact timing dependencies in circuits, which is of utmost importance for the design and simulation of these circuits. When connecting an odd number of digital inverting stages in a ring, the circuit has no stable digital state but acts as an analog oscillator with the oscillation frequency dependent on the analog propagation delay of the signals through the stages. By varying some conditions during a litho step, the delay change caused by the process condition change can be measured very accurately. The response of the ring oscillator delay to exposure dose is measured and presented in this paper together with a comparison of measured line-width values of the poly gate lines. The second part of the paper will focus on improving the intra-wafer variation of the stage delay. A number of ring oscillators are put in a design at different slit and scan locations. 200mm wafers are processed with 48 full dies present. From the intra-wafer delay fingerprint and the dose sensitivity of the delay an intra-wafer dose correction, also called a dose recipe, is calculated. This dose recipe is used on the scanner to compensate for effects that are the root cause for the delay profile; including reticle and processing such as track, etch and annealing.

Degradation of bare and silanized silicon wafer surfaces by constituents of biological fluids.

PubMed

Dekeyser, C M; Buron, C C; Derclaye, S R; Jonas, A M; Marchand-Brynaert, J; Rouxhet, P G

2012-07-15

The 24 h stability of bare silicon wafers as such or silanized with CH(3)O-(CH(2)-CH(2)-O)(n)-C(3)H(6)-trichlorosilane (n=6-9) was investigated in water, NaCl, phosphate and carbonate solutions, and in phosphate buffered saline (PBS) at 37 °C (close to biological conditions regarding temperature, high ionic strength, and pH). The resulting surfaces were analyzed using ellipsometry, X-ray Reflectometry (XRR), X-ray Photoelectron Spectroscopy (XPS), and Atomic Force Microscopy (AFM). Incubation of the silanized wafers in phosphate solution and PBS provokes a detachment of the silane layer. This is due to a hydrolysis of Si-O bonds which is favored by the action of phosphate, also responsible for a corrosion of non-silanized wafers. The surface alteration (detachment of silane layer and corrosion of the non-silanized wafer) is also important with carbonate solution, due to a higher pH (8.3). The protection of the silicon oxide layer brought by silane against the action of the salts is noticeable for phosphate but not for carbonate. Copyright © 2012 Elsevier Inc. All rights reserved.

Comparison of Photoluminescence Imaging on Starting Multi-Crystalline Silicon Wafers to Finished Cell Performance: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnston, S.; Yan, F.; Dorn, D.

2012-06-01

Photoluminescence (PL) imaging techniques can be applied to multicrystalline silicon wafers throughout the manufacturing process. Both band-to-band PL and defect-band emissions, which are longer-wavelength emissions from sub-bandgap transitions, are used to characterize wafer quality and defect content on starting multicrystalline silicon wafers and neighboring wafers processed at each step through completion of finished cells. Both PL imaging techniques spatially highlight defect regions that represent dislocations and defect clusters. The relative intensities of these imaged defect regions change with processing. Band-to-band PL on wafers in the later steps of processing shows good correlation to cell quality and performance. The defect bandmore » images show regions that change relative intensity through processing, and better correlation to cell efficiency and reverse-bias breakdown is more evident at the starting wafer stage as opposed to later process steps. We show that thermal processing in the 200 degrees - 400 degrees C range causes impurities to diffuse to different defect regions, changing their relative defect band emissions.« less

Bond enhancement techniques for PCC white topping

DOT National Transportation Integrated Search

1996-01-01

This research was initiated in 1991 as a part of a whitetopping project to study the effectiveness of various techniques to enhance bond strength between a new portland cement concrete (PCC) overlay and an existing asphalt cement concrete (ACC) pavem...

Comparison of different bonding techniques for efficient strain transfer using piezoelectric actuators

NASA Astrophysics Data System (ADS)

Ziss, Dorian; Martín-Sánchez, Javier; Lettner, Thomas; Halilovic, Alma; Trevisi, Giovanna; Trotta, Rinaldo; Rastelli, Armando; Stangl, Julian

2017-04-01

In this paper, strain transfer efficiencies from a single crystalline piezoelectric lead magnesium niobate-lead titanate substrate to a GaAs semiconductor membrane bonded on top are investigated using state-of-the-art x-ray diffraction (XRD) techniques and finite-element-method (FEM) simulations. Two different bonding techniques are studied, namely, gold-thermo-compression and polymer-based SU8 bonding. Our results show a much higher strain-transfer for the "soft" SU8 bonding in comparison to the "hard" bonding via gold-thermo-compression. A comparison between the XRD results and FEM simulations allows us to explain this unexpected result with the presence of complex interface structures between the different layers.

Comparison of different bonding techniques for efficient strain transfer using piezoelectric actuators.

PubMed

Ziss, Dorian; Martín-Sánchez, Javier; Lettner, Thomas; Halilovic, Alma; Trevisi, Giovanna; Trotta, Rinaldo; Rastelli, Armando; Stangl, Julian

2017-04-01

In this paper, strain transfer efficiencies from a single crystalline piezoelectric lead magnesium niobate-lead titanate substrate to a GaAs semiconductor membrane bonded on top are investigated using state-of-the-art x-ray diffraction (XRD) techniques and finite-element-method (FEM) simulations. Two different bonding techniques are studied, namely, gold-thermo-compression and polymer-based SU8 bonding. Our results show a much higher strain-transfer for the "soft" SU8 bonding in comparison to the "hard" bonding via gold-thermo-compression. A comparison between the XRD results and FEM simulations allows us to explain this unexpected result with the presence of complex interface structures between the different layers.

Thermo-acousto-photonics for noncontact temperature measurement in silicon wafer processing

NASA Astrophysics Data System (ADS)

Suh, Chii-Der S.; Rabroker, G. Andrew; Chona, Ravinder; Burger, Christian P.

1999-10-01

A non-contact thermometry technique has been developed to characterize the thermal state of silicon wafers during rapid thermal processing. Information on thermal variations is obtained from the dispersion relations of the propagating waveguide mode excited in wafers using a non-contact, broadband optical system referred to as Thermal Acousto- Photonics for Non-Destructive Evaluation. Variations of thermo-mechanical properties in silicon wafers are correlated to temperature changes by performing simultaneous time-frequency analyses on Lamb waveforms acquired with a fiber-tip interferometer sensor. Experimental Lamb wave data collected for cases ranging from room temperature to 400 degrees C is presented. The results show that the temporal progressions of all spectral elements found in the fundamental antisymmetric mode are strong functions of temperature. This particular attribute is exploited to achieve a thermal resolution superior to the +/- 5 degrees C attainable through current pyrometric techniques. By analyzing the temperature-dependent group velocity of a specific frequency component over the temperature range considered and then comparing the results to an analytical model developed for silicon wafers undergoing annealing, excellent agreement was obtained. Presented results demonstrate the feasibility of applying laser-induced stress waves as a temperature diagnostic during rapid thermal processing.

Comparison of different bonding techniques for efficient strain transfer using piezoelectric actuators

PubMed Central

Ziss, Dorian; Martín-Sánchez, Javier; Lettner, Thomas; Halilovic, Alma; Trevisi, Giovanna; Trotta, Rinaldo; Rastelli, Armando; Stangl, Julian

2017-01-01

In this paper, strain transfer efficiencies from a single crystalline piezoelectric lead magnesium niobate-lead titanate substrate to a GaAs semiconductor membrane bonded on top are investigated using state-of-the-art x-ray diffraction (XRD) techniques and finite-element-method (FEM) simulations. Two different bonding techniques are studied, namely, gold-thermo-compression and polymer-based SU8 bonding. Our results show a much higher strain-transfer for the “soft” SU8 bonding in comparison to the “hard” bonding via gold-thermo-compression. A comparison between the XRD results and FEM simulations allows us to explain this unexpected result with the presence of complex interface structures between the different layers. PMID:28522879

An Ultrasonic Technique to Determine the Residual Strength of Adhesive Bonds

NASA Technical Reports Server (NTRS)

Achenbach, J. D.; Tang, Z.

1999-01-01

In this work, ultrasonic techniques to nondestructively evaluate adhesive bond degradation have been studied. The key to the present approach is the introduction of an external factor which pulls the adhesive bond in the nonlinear range, simultaneously with the application of an ultrasonic technique. With the aid of an external static tensile loading, a superimposed longitudinal wave has.been used to obtain the slopes of the stress-strain curve of an adhesive bond at a series of load levels. The critical load, at which a reduction of the slope is detected by the superimposed longitudinal wave, is an indication of the onset of nonlinear behavior of the adhesive bond, and therefore of bond degradation. This approach has been applied to the detection of adhesive bond degradation induced by cyclic fatigue loading. Analogously to the longitudinal wave case, a superimposed shear wave has been used to obtain the effective shear modulus of adhesive layers at different shear load levels. The onset of the nonlinear behavior of an adhesive bond under shear loading has been detected by the use of a superimposed shear wave. Experiments show that a longitudinal wave can also detect the nonlinear behavior when an adhesive bond is subjected to shear loading. An optimal combination of ultrasonic testing and mechanical loading methods for the detection of degradation related nonlinear behavior of adhesive bonds has been discussed. For the purpose of a practical application, an ultrasonic technique that uses a temperature increase as an alternative to static loading has also been investigated. A general strain-temperature correspondence principle that relates a mechanical strain to a temperature has been presented. Explicit strain-temperature correspondence relations for both the tension and shear cases have been derived. An important parameter which quantifies the relation between the wave velocity and temperature has been defined. This parameter, which is indicative of adhesive

Wafer-shape metrics based foundry lithography

NASA Astrophysics Data System (ADS)

Kim, Sungtae; Liang, Frida; Mileham, Jeffrey; Tsai, Damon; Bouche, Eric; Lee, Sean; Huang, Albert; Hua, C. F.; Wei, Ming Sheng

2017-03-01

As device shrink, there are many difficulties with process integration and device yield. Lithography process control is expected to be a major challenge due to tighter overlay and focus control requirement. The understanding and control of stresses accumulated during device fabrication has becoming more critical at advanced technology nodes. Within-wafer stress variations cause local wafer distortions which in turn present challenges for managing overlay and depth of focus during lithography. A novel technique for measuring distortion is Coherent Gradient Sensing (CGS) interferometry, which is capable of generating a high-density distortion data set of the full wafer within a time frame suitable for a high volume manufacturing (HVM) environment. In this paper, we describe the adoption of CGS (Coherent Gradient Sensing) interferometry into high volume foundry manufacturing to overcome these challenges. Leveraging this high density 3D metrology, we characterized its In-plane distortion as well as its topography capabilities applied to the full flow of an advanced foundry manufacturing. Case studies are presented that summarize the use of CGS data to reveal correlations between in-plane distortion and overlay variation as well as between topography and device yield.

Performance Evaluations of Ceramic Wafer Seals

NASA Technical Reports Server (NTRS)

Dunlap, Patrick H., Jr.; DeMange, Jeffrey J.; Steinetz, Bruce M.

2006-01-01

Future hypersonic vehicles will require high temperature, dynamic seals in advanced ramjet/scramjet engines and on the vehicle airframe to seal the perimeters of movable panels, flaps, and doors. Seal temperatures in these locations can exceed 2000 F, especially when the seals are in contact with hot ceramic matrix composite sealing surfaces. NASA Glenn Research Center is developing advanced ceramic wafer seals to meet the needs of these applications. High temperature scrub tests performed between silicon nitride wafers and carbon-silicon carbide rub surfaces revealed high friction forces and evidence of material transfer from the rub surfaces to the wafer seals. Stickage between adjacent wafers was also observed after testing. Several design changes to the wafer seals were evaluated as possible solutions to these concerns. Wafers with recessed sides were evaluated as a potential means of reducing friction between adjacent wafers. Alternative wafer materials are also being considered as a means of reducing friction between the seals and their sealing surfaces and because the baseline silicon nitride wafer material (AS800) is no longer commercially available.

Correlation study of actual temperature profile and in-line metrology measurements for within-wafer uniformity improvement and wafer edge yield enhancement (Conference Presentation)

NASA Astrophysics Data System (ADS)

Fang, Fang; Vaid, Alok; Vinslava, Alina; Casselberry, Richard; Mishra, Shailendra; Dixit, Dhairya; Timoney, Padraig; Chu, Dinh; Porter, Candice; Song, Da; Ren, Zhou

2018-03-01

It is getting more important to monitor all aspects of influencing parameters in critical etch steps and utilize them as tuning knobs for within-wafer uniformity improvement and wafer edge yield enhancement. Meanwhile, we took a dive in pursuing "measuring what matters" and challenged ourselves for more aspects of signals acquired in actual process conditions. Among these factors which are considered subtle previously, we identified Temperature, especially electrostatic chuck (ESC) Temperature measurement in real etch process conditions have direct correlation to in-line measurements. In this work, we used SensArray technique (EtchTemp-SE wafer) to measure ESC temperature profile on a 300mm wafer with plasma turning on to reproduce actual temperature pattern on wafers in real production process conditions. In field applications, we observed substantial correlation between ESC temperature and in-line optical metrology measurements and since temperature is a process factor that can be tuning through set-temperature modulations, we have identified process knobs with known impact on physical profile variations. Furthermore, ESC temperature profile on a 300mm wafer is configured as multiple zones upon radius and SensArray measurements mechanism could catch such zonal distribution as well, which enables detailed temperature modulations targeting edge ring only where most of chips can be harvested and critical zone for yield enhancement. Last but not least, compared with control reference (ESC Temperature in static plasma-off status), we also get additional factors to investigate in chamber-to-chamber matching study and make process tool fleet match on the basis really matters in production. KLA-Tencor EtchTemp-SE wafer enables Plasma On wafer temperature monitoring of silicon etch process. This wafer is wireless and has 65 sensors with measurement range from 20 to 140°C. the wafer is designed to run in real production recipe plasma on condition with maximum RF power up

Microemulsion-Based Mucoadhesive Buccal Wafers: Wafer Formation, In Vitro Release, and Ex Vivo Evaluation.

PubMed

Pham, Minh Nguyet; Van Vo, Toi; Tran, Van-Thanh; Tran, Phuong Ha-Lien; Tran, Thao Truong-Dinh

2017-10-01

Microemulsion has the potentials to enhance dissolution as well as facilitate absorption and permeation of poorly water-soluble drugs through biological membranes. However, its application to govern a controlled release buccal delivery for local treatment has not been discovered. The aim of this study is to develop microemulsion-based mucoadhesive wafers for buccal delivery based on an incorporation of the microemulsion with mucoadhesive agents and mannitol. Ratio of oil to surfactant to water in the microemulsion significantly impacted quality of the wafers. Furthermore, the combination of carbopol and mannitol played a key role in forming the desired buccal wafers. The addition of an extra 50% of water to the formulation was suitable for wafer formation by freeze-drying, which affected the appearance and distribution of carbopol in the wafers. The amount of carbopol was critical for the enhancement of mucoadhesive properties and the sustained drug release patterns. Release study presented a significant improvement of the drug release profile following sustained release for 6 h. Ex vivo mucoadhesive studies provided decisive evidence to the increased retention time of wafers along with the increased carbopol content. The success of this study indicates an encouraging strategy to formulate a controlled drug delivery system by incorporating microemulsions into mucoadhesive wafers.

A noncontacting scanning photoelectron emission technique for bonding surface cleanliness inspection

NASA Technical Reports Server (NTRS)

Gause, Raymond L.

1989-01-01

Molecular contamination of bonding surfaces can drastically affect the bond strength that can be achieved and therefore the structural integrity and reliability of the bonded part. The presence of thin contaminant films on bonding surfaces can result from inadequate or incomplete cleaning methods, from oxide growth during the time between cleaning (such as grit blasting) and bonding, or from failure to properly protect cleaned surfaces from oils, greases, fingerprints, release agents, or deposition of facility airborne molecules generated by adjacent manufacturing or processing operations. Required cleanliness levels for desired bond performance can be determined by testing to correlate bond strength with contaminant type and quantity, thereby establishing the degree of contamination that can be tolerated based on the strength that is needed. Once the maximum acceptable contaminant level is defined, a method is needed to quantitatively measure the contaminant level on the bonding surface prior to bonding to verify that the surface meets the established cleanliness requirement. A photoelectron emission technique for the nondestructive inspection of various bonding surfaces, both metallic and nonmetallic, to provide quantitative data on residual contaminant levels is described. The technique can be used to scan surfaces at speeds of at least 30 ft/min using a servo system to maintain required sensor to surface spacing. The fundamental operation of the photoelectron emission sensor system is explained and the automated scanning system and computer data acquisition hardware and software are described.

Thermal stress during RTP processes and its possible effect on the light induced degradation in Cz-Si wafers

NASA Astrophysics Data System (ADS)

Kouhlane, Yacine; Bouhafs, Djoudi; Khelifati, Nabil; Guenda, Abdelkader; Demagh, Nacer-Eddine; Demagh, Assia; Pfeiffer, Pierre; Mezghiche, Salah; Hetatache, Warda; Derkaoui, Fahima; Nasraoui, Chahinez; Nwadiaru, Ogechi Vivian

2018-04-01

In this study, the carrier lifetime variation of p-type boron-doped Czochralski silicon (Cz-Si) wafers was investigated after a direct rapid thermal processing (RTP). Two wafers were passivated by silicon nitride (SiNx:H) layers, deposited by a PECVD system on both surfaces. Then the wafers were subjected to an RTP cycle at a peak temperature of 620 °C. The first wafer was protected (PW) from the direct radiative heating of the RTP furnace by placing the wafer between two as-cut Cz-Si shield wafers during the heat processing. The second wafer was not protected (NPW) and followed the same RTP cycle procedure. The carrier lifetime τ eff was measured using the QSSPC technique before and after illumination for 5 h duration at 0.5 suns. The immediate results of the measured lifetime (τ RTP ) after the RTP process have shown a regeneration in the lifetime of the two wafers with the PW wafer exhibiting an important enhancement in τ RTP as compared to the NPW wafer. The QSSPC measurements have indicated a good stable lifetime (τ d ) and a weak degradation effect was observed in the case of the PW wafer as compared to their initial lifetime value. Interferometry technique analyses have shown an enhancement in the surface roughness for the NPW wafer as compared to the protected one. Additionally, to improve the correlation between the RTP heat radiation stress and the carrier lifetime behavior, a simulation of the thermal stress and temperature profile using the finite element method on the wafers surface at RTP peak temperature of 620 °C was performed. The results confirm the reduction of the thermal stress with less heat losses for the PW wafer. Finally, the proposed method can lead to improving the lifetime of wafers by an RTP process at minimum energy costs.

Recent mass spectrometry-based techniques and considerations for disulfide bond characterization in proteins.

PubMed

Lakbub, Jude C; Shipman, Joshua T; Desaire, Heather

2018-04-01

Disulfide bonds are important structural moieties of proteins: they ensure proper folding, provide stability, and ensure proper function. With the increasing use of proteins for biotherapeutics, particularly monoclonal antibodies, which are highly disulfide bonded, it is now important to confirm the correct disulfide bond connectivity and to verify the presence, or absence, of disulfide bond variants in the protein therapeutics. These studies help to ensure safety and efficacy. Hence, disulfide bonds are among the critical quality attributes of proteins that have to be monitored closely during the development of biotherapeutics. However, disulfide bond analysis is challenging because of the complexity of the biomolecules. Mass spectrometry (MS) has been the go-to analytical tool for the characterization of such complex biomolecules, and several methods have been reported to meet the challenging task of mapping disulfide bonds in proteins. In this review, we describe the relevant, recent MS-based techniques and provide important considerations needed for efficient disulfide bond analysis in proteins. The review focuses on methods for proper sample preparation, fragmentation techniques for disulfide bond analysis, recent disulfide bond mapping methods based on the fragmentation techniques, and automated algorithms designed for rapid analysis of disulfide bonds from liquid chromatography-MS/MS data. Researchers involved in method development for protein characterization can use the information herein to facilitate development of new MS-based methods for protein disulfide bond analysis. In addition, individuals characterizing biotherapeutics, especially by disulfide bond mapping in antibodies, can use this review to choose the best strategies for disulfide bond assignment of their biologic products. Graphical Abstract This review, describing characterization methods for disulfide bonds in proteins, focuses on three critical components: sample preparation, mass

A Unique Bonding Technique for Immediate Orthognathic Surgery

PubMed Central

Ayinipully, Hariprasad; Paul, Rosaline Tina; Ponnambathayil, Shaji Aboobacker; Rasheed, Althaf Thanimoottil

2015-01-01

Introduction A challenge in orthodontics is achieving ideal bracket position which determines treatment results and finishing. A new bonding method is done indirectly on the cast and bonded directly on the teeth, but it does not require conventional trays to carry the brackets to the teeth. Materials and Methods Heavy sized archwires like 0.019″x0.025″ or 0.018″ SS are bent to the malocclusion to generate a template which comprises of an Bracket -Archwire Assembly (BAA). This assembly is transferred onto the teeth using the molar bands with tubes which serves as a jig for proper orientation of the BAA, then the adhesive is cured at one shot to complete the bonding procedure. Results Two surgical cases successfully bonded with this technique is presented in this article. Conclusion This bonding method finds specific advantages in surgical orthodontics – when the surgeon decides on a surgery-first treatment objective, management of single or a couple of periodontally extruded teeth, management of impacted teeth and in patients needing fixed functional appliance immediately before the completion of growth spurt. PMID:26266212

Support apparatus for semiconductor wafer processing

DOEpatents

Griffiths, Stewart K.; Nilson, Robert H.; Torres, Kenneth J.

2003-06-10

A support apparatus for minimizing gravitational stress in semiconductor wafers, and particularly silicon wafers, during thermal processing. The support apparatus comprises two concentric circular support structures disposed on a common support fixture. The two concentric circular support structures, located generally at between 10 and 70% and 70 and 100% and preferably at 35 and 82.3% of the semiconductor wafer radius, can be either solid rings or a plurality of spaced support points spaced apart from each other in a substantially uniform manner. Further, the support structures can have segments removed to facilitate wafer loading and unloading. In order to withstand the elevated temperatures encountered during semiconductor wafer processing, the support apparatus, including the concentric circular support structures and support fixture can be fabricated from refractory materials, such as silicon carbide, quartz and graphite. The claimed wafer support apparatus can be readily adapted for use in either batch or single-wafer processors.

Silicon wafer temperature monitoring using all-fiber laser ultrasonics

NASA Astrophysics Data System (ADS)

Alcoz, Jorge J.; Duffer, Charles E.

1998-03-01

Laser-ultrasonics is a very attractive technique for in-line process control in the semiconductor industry as it is compatible with the clean room environment and offers the capability to inspect parts at high-temperature. We describe measurements of the velocity of laser-generated Lamb waves in silicon wafers as a function of temperature using fiber- optic laser delivery and all-fiber interferometric sensing. Fundamental anti-symmetric Lamb-wave modes were generated in 5 inches < 111 > silicon wafers using a Nd:YAG laser coupled to a large-core multimode fiber. Generation was also performed using an array of sources created with a diffraction grating. For detection a compact fiber-optic sensor was used which is well suited for industrial environments as it is compact, rugged, stable, and low-cost. The wafers were heated up to 1000 degrees C and the temperature correlated with ultrasonic velocity measurements.

Disc resonator gyroscope fabrication process requiring no bonding alignment

NASA Technical Reports Server (NTRS)

Shcheglov, Kirill V. (Inventor)

2010-01-01

A method of fabricating a resonant vibratory sensor, such as a disc resonator gyro. A silicon baseplate wafer for a disc resonator gyro is provided with one or more locating marks. The disc resonator gyro is fabricated by bonding a blank resonator wafer, such as an SOI wafer, to the fabricated baseplate, and fabricating the resonator structure according to a pattern based at least in part upon the location of the at least one locating mark of the fabricated baseplate. MEMS-based processing is used for the fabrication processing. In some embodiments, the locating mark is visualized using optical and/or infrared viewing methods. A disc resonator gyroscope manufactured according to these methods is described.

Wafer defect detection by a polarization-insensitive external differential interference contrast module.

PubMed

Nativ, Amit; Feldman, Haim; Shaked, Natan T

2018-05-01

We present a system that is based on a new external, polarization-insensitive differential interference contrast (DIC) module specifically adapted for detecting defects in semiconductor wafers. We obtained defect signal enhancement relative to the surrounding wafer pattern when compared with bright-field imaging. The new DIC module proposed is based on a shearing interferometer that connects externally at the output port of an optical microscope and enables imaging thin samples, such as wafer defects. This module does not require polarization optics (such as Wollaston or Nomarski prisms) and is insensitive to polarization, unlike traditional DIC techniques. In addition, it provides full control of the DIC shear and orientation, which allows obtaining a differential phase image directly on the camera (with no further digital processing) while enhancing defect detection capabilities, even if the size of the defect is smaller than the resolution limit. Our technique has the potential of future integration into semiconductor production lines.

[Individual indirect bonding technique (IIBT) using set-up model].

PubMed

Kyung, H M

1989-01-01

There has been much progress in Edgewise Appliance since E.H. Angle. One of the most important procedures in edgewise appliance is correct bracket position. Not only conventional edgewise appliance but also straight wire appliance & lingual appliance cannot be used more effectively unless the bracket position is accurate. Improper bracket positioning may reveal much problems during treatment, especially in finishing state. It may require either rebonding after the removal of the malpositioned bracket or the greater number of arch wire and the more complex wire bending, causing much difficulty in performing effective treatments. This made me invent Individual Indirect Bonding Technique with the use of multi-purpose set-up model in order to determine a correct and objective bracket position according to individual patients. This technique is more accurate than former indirect bonding techniques in bracket positioning, because it decides the bracket position on a set-up model which has produced to have the occlusal relationship the clinician desired. This technique is especially effective in straight wire appliance and lingual appliance in which the correct bracket positioning is indispensible.

Ultra-high-throughput Production of III-V/Si Wafer for Electronic and Photonic Applications

PubMed Central

Geum, Dae-Myeong; Park, Min-Su; Lim, Ju Young; Yang, Hyun-Duk; Song, Jin Dong; Kim, Chang Zoo; Yoon, Euijoon; Kim, SangHyeon; Choi, Won Jun

2016-01-01

Si-based integrated circuits have been intensively developed over the past several decades through ultimate device scaling. However, the Si technology has reached the physical limitations of the scaling. These limitations have fuelled the search for alternative active materials (for transistors) and the introduction of optical interconnects (called “Si photonics”). A series of attempts to circumvent the Si technology limits are based on the use of III-V compound semiconductor due to their superior benefits, such as high electron mobility and direct bandgap. To use their physical properties on a Si platform, the formation of high-quality III-V films on the Si (III-V/Si) is the basic technology ; however, implementing this technology using a high-throughput process is not easy. Here, we report new concepts for an ultra-high-throughput heterogeneous integration of high-quality III-V films on the Si using the wafer bonding and epitaxial lift off (ELO) technique. We describe the ultra-fast ELO and also the re-use of the III-V donor wafer after III-V/Si formation. These approaches provide an ultra-high-throughput fabrication of III-V/Si substrates with a high-quality film, which leads to a dramatic cost reduction. As proof-of-concept devices, this paper demonstrates GaAs-based high electron mobility transistors (HEMTs), solar cells, and hetero-junction phototransistors on Si substrates. PMID:26864968

Wafer characteristics via reflectometry

DOEpatents

Sopori, Bhushan L.

2010-10-19

Various exemplary methods (800, 900, 1000, 1100) are directed to determining wafer thickness and/or wafer surface characteristics. An exemplary method (900) includes measuring reflectance of a wafer and comparing the measured reflectance to a calculated reflectance or a reflectance stored in a database. Another exemplary method (800) includes positioning a wafer on a reflecting support to extend a reflectance range. An exemplary device (200) has an input (210), analysis modules (222-228) and optionally a database (230). Various exemplary reflectometer chambers (1300, 1400) include radiation sources positioned at a first altitudinal angle (1308, 1408) and at a second altitudinal angle (1312, 1412). An exemplary method includes selecting radiation sources positioned at various altitudinal angles. An exemplary element (1650, 1850) includes a first aperture (1654, 1854) and a second aperture (1658, 1858) that can transmit reflected radiation to a fiber and an imager, respectfully.

Resolving critical dimension drift over time in plasma etching through virtual metrology based wafer-to-wafer control

NASA Astrophysics Data System (ADS)

Lee, Ho Ki; Baek, Kye Hyun; Shin, Kyoungsub

2017-06-01

As semiconductor devices are scaled down to sub-20 nm, process window of plasma etching gets extremely small so that process drift or shift becomes more significant. This study addresses one of typical process drift issues caused by consumable parts erosion over time and provides feasible solution by using virtual metrology (VM) based wafer-to-wafer control. Since erosion of a shower head has center-to-edge area dependency, critical dimensions (CDs) at the wafer center and edge area get reversed over time. That CD trend is successfully estimated on a wafer-to-wafer basis by a partial least square (PLS) model which combines variables from optical emission spectroscopy (OES), VI-probe and equipment state gauges. R 2 of the PLS model reaches 0.89 and its prediction performance is confirmed in a mass production line. As a result, the model can be exploited as a VM for wafer-to-wafer control. With the VM, advanced process control (APC) strategy is implemented to solve the CD drift. Three σ of CD across wafer is improved from the range (1.3-2.9 nm) to the range (0.79-1.7 nm). Hopefully, results introduced in this paper will contribute to accelerating implementation of VM based APC strategy in semiconductor industry.

Effect of wafer geometry on lithography chucking processes

NASA Astrophysics Data System (ADS)

Turner, Kevin T.; Sinha, Jaydeep K.

2015-03-01

Wafer flatness during exposure in lithography tools is critical and is becoming more important as feature sizes in devices shrink. While chucks are used to support and flatten the wafer during exposure, it is essential that wafer geometry be controlled as well. Thickness variations of the wafer and high-frequency wafer shape components can lead to poor flatness of the chucked wafer and ultimately patterning problems, such as defocus errors. The objective of this work is to understand how process-induced wafer geometry, resulting from deposited films with non-uniform stress, can lead to high-frequency wafer shape variations that prevent complete chucking in lithography scanners. In this paper, we discuss both the acceptable limits of wafer shape that permit complete chucking to be achieved, and how non-uniform residual stresses in films, either due to patterning or process non-uniformity, can induce high spatial frequency wafer shape components that prevent chucking. This paper describes mechanics models that relate non-uniform film stress to wafer shape and presents results for two example cases. The models and results can be used as a basis for establishing control strategies for managing process-induced wafer geometry in order to avoid wafer flatness-induced errors in lithography processes.

Wafer scale oblique angle plasma etching

DOEpatents

Burckel, David Bruce; Jarecki, Jr., Robert L.; Finnegan, Patrick Sean

2017-05-23

Wafer scale oblique angle etching of a semiconductor substrate is performed in a conventional plasma etch chamber by using a fixture that supports a multiple number of separate Faraday cages. Each cage is formed to include an angled grid surface and is positioned such that it will be positioned over a separate one of the die locations on the wafer surface when the fixture is placed over the wafer. The presence of the Faraday cages influences the local electric field surrounding each wafer die, re-shaping the local field to be disposed in alignment with the angled grid surface. The re-shaped plasma causes the reactive ions to follow a linear trajectory through the plasma sheath and angled grid surface, ultimately impinging the wafer surface at an angle. The selected geometry of the Faraday cage angled grid surface thus determines the angle at with the reactive ions will impinge the wafer.

Laser wafering for silicon solar.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

2011-03-01

Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W{sub p} (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs ({approx}20%), embodied energy, and green-house gas GHG emissions ({approx}50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurfacemore » damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 {micro}m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.« less

AlGaAs/Si dual-junction tandem solar cells by epitaxial lift-off and print-transfer-assisted direct bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xiong, Kanglin; Mi, Hongyi; Chang, Tzu-Hsuan

A novel method is developed to realize a III-V/Si dual-junction photovoltaic cell by combining epitaxial lift-off (ELO) and print-transfer-assisted bonding methods. The adoption of ELO enables III-V wafers to be recycled and reused, which can further lower the cost of III-V/Si photovoltaic panels. For demonstration, high crystal quality, micrometer-thick, GaAs/AlGaAs/GaAs films are lifted off, transferred, and directly bonded onto Si wafer without the use of any adhesive or bonding agents. The bonding interface is optically transparent and conductive both thermally and electrically. Prototype AlGaAs/Si dual-junction tandem solar cells have been fabricated and exhibit decent performance.

AlGaAs/Si dual-junction tandem solar cells by epitaxial lift-off and print-transfer-assisted direct bonding

DOE PAGES

Xiong, Kanglin; Mi, Hongyi; Chang, Tzu-Hsuan; ...

2018-01-04

A novel method is developed to realize a III-V/Si dual-junction photovoltaic cell by combining epitaxial lift-off (ELO) and print-transfer-assisted bonding methods. The adoption of ELO enables III-V wafers to be recycled and reused, which can further lower the cost of III-V/Si photovoltaic panels. For demonstration, high crystal quality, micrometer-thick, GaAs/AlGaAs/GaAs films are lifted off, transferred, and directly bonded onto Si wafer without the use of any adhesive or bonding agents. The bonding interface is optically transparent and conductive both thermally and electrically. Prototype AlGaAs/Si dual-junction tandem solar cells have been fabricated and exhibit decent performance.

Carbon dioxide capture using resin-wafer electrodeionization

DOEpatents

Lin, YuPo J.; Snyder, Seth W.; Trachtenberg, Michael S.; Cowan, Robert M.; Datta, Saurav

2015-09-08

The present invention provides a resin-wafer electrodeionization (RW-EDI) apparatus including cathode and anode electrodes separated by a plurality of porous solid ion exchange resin wafers, which when in use are filled with an aqueous fluid. The apparatus includes one or more wafers comprising a basic ion exchange medium, and preferably includes one or more wafers comprising an acidic ion exchange medium. The wafers are separated from one another by ion exchange membranes. The fluid within the acidic and/or basic ion exchange wafers preferably includes, or is in contact with, a carbonic anhydrase (CA) enzyme to facilitate conversion of bicarbonate ion to carbon dioxide within the acidic medium. A pH suitable for exchange of CO.sub.2 is electrochemically maintained within the basic and acidic ion exchange wafers by applying an electric potential across the cathode and anode.

Anodically bonded submicron microfluidic chambers.

PubMed

Dimov, S; Bennett, R G; Córcoles, A; Levitin, L V; Ilic, B; Verbridge, S S; Saunders, J; Casey, A; Parpia, J M

2010-01-01

We demonstrate the use of anodic bonding to fabricate cells with characteristic size as large as 7 x 10 mm(2), with height of approximately 640 nm, and without any internal support structure. The cells were fabricated from Hoya SD-2 glass and silicon wafers, each with 3 mm thickness to maintain dimensional stability under internal pressure. Bonding was carried out at 350 degrees C and 450 V with an electrode structure that excluded the electric field from the open region. We detail fabrication and characterization steps and also discuss the design of the fill line for access to the cavity.

Methane production using resin-wafer electrodeionization

DOEpatents

Snyder, Seth W; Lin, YuPo; Urgun-Demirtas, Meltem

2014-03-25

The present invention provides an efficient method for creating natural gas including the anaerobic digestion of biomass to form biogas, and the electrodeionization of biogas to form natural gas and carbon dioxide using a resin-wafer deionization (RW-EDI) system. The method may be further modified to include a wastewater treatment system and can include a chemical conditioning/dewatering system after the anaerobic digestion system. The RW-EDI system, which includes a cathode and an anode, can either comprise at least one pair of wafers, each a basic and acidic wafer, or at least one wafer comprising of a basic portion and an acidic portion. A final embodiment of the RW-EDI system can include only one basic wafer for creating natural gas.

Cu Pillar Low Temperature Bonding and Interconnection Technology of for 3D RF Microsystem

NASA Astrophysics Data System (ADS)

Shi, G. X.; Qian, K. Q.; Huang, M.; Yu, Y. W.; Zhu, J.

2018-03-01

In this paper 3D interconnects technologies used Cu pillars are discussed with respect to RF microsystem. While 2.5D Si interposer and 3D packaging seem to rely to cu pillars for the coming years, RF microsystem used the heterogeneous chip such as GaAs integration with Si interposers should be at low temperature. The pillars were constituted by Cu (2 micron) -Ni (2 micron) -Cu (3 micron) -Sn (1 micron) multilayer metal and total height is 8 micron on the front-side of the wafer by using electroplating. The wafer backside Cu pillar is obtained by temporary bonding, thinning and silicon surface etching. The RF interposers are stacked by Cu-Sn eutectic bonding at 260 °C. Analyzed the reliability of different pillar bonding structure.

Influence of Si wafer thinning processes on (sub)surface defects

NASA Astrophysics Data System (ADS)

Inoue, Fumihiro; Jourdain, Anne; Peng, Lan; Phommahaxay, Alain; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik; Beyne, Eric; Uedono, Akira

2017-05-01

Wafer-to-wafer three-dimensional (3D) integration with minimal Si thickness can produce interacting multiple devices with significantly scaled vertical interconnections. Realizing such a thin 3D structure, however, depends critically on the surface and subsurface of the remaining backside Si after the thinning processes. The Si (sub)surface after mechanical grinding has already been characterized fruitfully for a range of few dozen of μm. Here, we expand the characterization of Si (sub)surface to 5 μm thickness after thinning process on dielectric bonded wafers. The subsurface defects and damage layer were investigated after grinding, chemical mechanical polishing (CMP), wet etching and plasma dry etching. The (sub)surface defects were characterized using transmission microscopy, atomic force microscopy, and positron annihilation spectroscopy. Although grinding provides the fastest removal rate of Si, the surface roughness was not compatible with subsequent processing. Furthermore, mechanical damage such as dislocations and amorphous Si cannot be reduced regardless of Si thickness and thin wafer handling systems. The CMP after grinding showed excellent performance to remove this grinding damage, even though the removal amount is 1 μm. For the case of Si thinning towards 5 μm using grinding and CMP, the (sub)surface is atomic scale of roughness without vacancy. For the case of grinding + dry etch, vacancy defects were detected in subsurface around 0.5-2 μm. The finished surface after wet etch remains in the nm scale in the strain region. By inserting a CMP step in between grinding and dry etch it is possible to significantly reduce not only the roughness, but also the remaining vacancies at the subsurface. The surface of grinding + CMP + dry etching gives an equivalent mono vacancy result as to that of grinding + CMP. This combination of thinning processes allows development of extremely thin 3D integration devices with minimal roughness and vacancy surface.

Micro-CT evaluation of microleakage under orthodontic ceramic brackets bonded with different bonding techniques and adhesives.

PubMed

Öztürk, Fırat; Ersöz, Mustafa; Öztürk, Seyit Ahmet; Hatunoğlu, Erdem; Malkoç, Sıddık

2016-04-01

The aim of this study was to evaluate microleakage under orthodontic ceramic brackets bonded with direct and different indirect bonding techniques and adhesives using micro-computed tomography. A total of 30 human maxillary premolars were randomly separated into five groups with six teeth in each group. In group I, teeth were bonded directly with Transbond XT (3M Unitek). In group II, group III, group IV, and group V, teeth were bonded through an indirect technique with Custom I.Q. (Reliance Orthodontic Products), Sondhi Rapid-Set (3M Unitek), RMbond (RMO), and Transbond IDB (3M Unitek), respectively, following the manufacturer's instructions. Micro-CT system model 1172 of Skyscan (Kontich, Belgium) was used to scan all samples. NRecon (Skyscan) version 1.6, CT-Analyser V.1.11 (Skyscan), and TView (SkyScan, Bvba) software programs were used for microleakage evaluation. Microleakage values between the test groups were assessed using the Kruskal-Wallis test, while the Wilcoxon signed rank test was used for within-group comparisons. The level of significance was set at P < 0.05. According to the Kruskal-Wallis analysis of variance test, there were no significant differences among the tested groups, with regard to volume and percentage (microleakage/region of interest × 100) of microleakage values (P < 0.05). The Wilcoxon signed rank test showed that coronal microleakage volume and percentage values significantly differed for RMbond and Transbond IDB groups. In the study, only ceramic brackets were used and microleakage into mini gaps did not show up on the micro-CT image because 50% silver nitrate solution could not penetrate into mini gaps which are smaller than silver nitrate particles. Use of direct and indirect bonding techniques with different adhesives did not significantly affect the amount of microleakage. © The Author 2015. Published by Oxford University Press on behalf of the European Orthodontic Society. All rights reserved. For permissions, please email

Crystallographic Orientation Identification in Multicrystalline Silicon Wafers Using NIR Transmission Intensity

NASA Astrophysics Data System (ADS)

Skenes, Kevin; Kumar, Arkadeep; Prasath, R. G. R.; Danyluk, Steven

2018-02-01

Near-infrared (NIR) polariscopy is a technique used for the non-destructive evaluation of the in-plane stresses in photovoltaic silicon wafers. Accurate evaluation of these stresses requires correct identification of the stress-optic coefficient, a material property which relates photoelastic parameters to physical stresses. The material stress-optic coefficient of silicon varies with crystallographic orientation. This variation poses a unique problem when measuring stresses in multicrystalline silicon (mc-Si) wafers. This paper concludes that the crystallographic orientation of silicon can be estimated by measuring the transmission of NIR light through the material. The transmission of NIR light through monocrystalline wafers of known orientation were compared with the transmission of NIR light through various grains in mc-Si wafers. X-ray diffraction was then used to verify the relationship by obtaining the crystallographic orientations of these assorted mc-Si grains. Variation of transmission intensity for different crystallographic orientations is further explained by using planar atomic density. The relationship between transmission intensity and planar atomic density appears to be linear.

Study of thin film production of ceramic ZrO2 on silicon wafer using second harmonic Nd-Yag laser with pulsed laser deposition technique

NASA Astrophysics Data System (ADS)

Suliyanti, Maria M.; Hidayah, Affi Nur; Kurniawan, K. H.

2012-06-01

Study about thin film production using technique pulsed laser deposition have been done. The Pulsed Laser Deposition (PLD) method has been used for growing thin film of ZrO2 on silicon wafer substrate (111 single crystal, thickness 400μm and diameter 7.5 cm). The target made from Zirconia oxide powder mixing with PVA and press using pressure 100kgN. The laser beam was focused by a lens (f = 100mm) through a quartz window onto the sample surface and the substrate was placed in parallel line with target. The distance between the target and the substrate is about 1 cm. The early results of this synthesis using 75 mJ Nd-YAG second harmonic laser pulse (532 nm Nd-YAG) and low pressure chamber surrounding gas 5 Torr. The irradiation of laser take around 6000 shoots or 10 minutes using frequencies laser 10 Hz. The micro thickness of film can be produced on silicon wafer using this technique. The results of ZrO2 thin film on substrate about 26.92%.

Fabrication of a microfluidic chip by UV bonding at room temperature for integration of temperature-sensitive layers

NASA Astrophysics Data System (ADS)

Schlautmann, S.; Besselink, G. A. J.; Radhakrishna Prabhu, G.; Schasfoort, R. B. M.

2003-07-01

A method for the bonding of a microfluidic device at room temperature is presented. The wafer with the fluidic structures was bonded to a sensor wafer with gold pads by means of adhesive bonding, utilizing an UV-curable glue layer. To avoid filling the fluidic channels with the glue, a stamping process was developed which allows the selective application of a thin glue layer. In this way a microfluidic glass chip was fabricated that could be used for performing surface plasmon resonance measurements without signs of leakage. The advantage of this method is the possibility of integration of organic layers as well as other temperature-sensitive layers into a microfluidic glass device.

Numerical modeling of guided ultrasonic waves generated and received by piezoelectric wafer in a Delaminated composite beam

NASA Astrophysics Data System (ADS)

Xu, G. D.; Xu, B. Q.; Xu, C. G.; Luo, Y.

2017-05-01

A spectral finite element method (SFEM) is developed to analyze guided ultrasonic waves in a delaminated composite beam excited and received by a pair of surface-bonded piezoelectric wafers. The displacements of the composite beam and the piezoelectric wafer are represented by Timoshenko beam and Euler Bernoulli theory respectively. The linear piezoelectricity is used to model the electrical-mechanical coupling between the piezoelectric wafer and the beam. The coupled governing equations and the boundary conditions in time domain are obtained by using the Hamilton's principle, and then the SFEM are formulated by transforming the coupled governing equations into frequency domain via the discrete Fourier transform. The guided waves are analyzed while the interaction of waves with delamination is also discussed. The elements needed in SFEM is far fewer than those for finite element method (FEM), which result in a much faster solution speed in this study. The high accuracy of the present SFEM is verified by comparing with the finite element results.

Wafer-scale plasmonic and photonic crystal sensors

NASA Astrophysics Data System (ADS)

George, M. C.; Liu, J.-N.; Farhang, A.; Williamson, B.; Black, M.; Wangensteen, T.; Fraser, J.; Petrova, R.; Cunningham, B. T.

2015-08-01

200 mm diameter wafer-scale fabrication, metrology, and optical modeling results are reviewed for surface plasmon resonance (SPR) sensors based on 2-D metallic nano-dome and nano-hole arrays (NHA's) as well as 1-D photonic crystal sensors based on a leaky-waveguide mode resonance effect, with potential applications in label free sensing, surface enhanced Raman spectroscopy (SERS), and surface-enhanced fluorescence spectroscopy (SEFS). Potential markets include micro-arrays for medical diagnostics, forensic testing, environmental monitoring, and food safety. 1-D and 2-D nanostructures were fabricated on glass, fused silica, and silicon wafers using optical lithography and semiconductor processing techniques. Wafer-scale optical metrology results are compared to FDTD modeling and presented along with application-based performance results, including label-free plasmonic and photonic crystal sensing of both surface binding kinetics and bulk refractive index changes. In addition, SEFS and SERS results are presented for 1-D photonic crystal and 2-D metallic nano-array structures. Normal incidence transmittance results for a 550 nm pitch NHA showed good bulk refractive index sensitivity, however an intensity-based design with 665 nm pitch was chosen for use as a compact, label-free sensor at both 650 and 632.8 nm wavelengths. The optimized NHA sensor gives an SPR shift of about 480 nm per refractive index unit when detecting a series of 0-40% glucose solutions, but according to modeling shows about 10 times greater surface sensitivity when operating at 532 nm. Narrow-band photonic crystal resonance sensors showed quality factors over 200, with reasonable wafer-uniformity in terms of both resonance position and peak height.

GaN microring waveguide resonators bonded to silicon substrate by a two-step polymer process.

PubMed

Hashida, Ryohei; Sasaki, Takashi; Hane, Kazuhiro

2018-03-20

Using a polymer bonding technique, GaN microring waveguide resonators were fabricated on a Si substrate for future hybrid integration of GaN and Si photonic devices. The designed GaN microring consisted of a rib waveguide having a core of 510 nm in thickness, 1000 nm in width, and a clad of 240 nm in thickness. A GaN crystalline layer of 1000 nm in thickness was grown on a Si(111) substrate by metal organic chemical vapor deposition using a buffer layer of 300 nm in thickness for the compensation of lattice constant mismatch between GaN and Si crystals. The GaN/Si wafer was bonded to a Si(100) wafer by a two-step polymer process to prevent it from trapping air bubbles. The bonded GaN layer was thinned from the backside by a fast atom beam etching to remove the buffer layer and to generate the rib waveguides. The transmission characteristics of the GaN microring waveguide resonators were measured. The losses of the straight waveguides were measured to be 4.0±1.7  dB/mm around a wavelength of 1.55 μm. The microring radii ranged from 30 to 60 μm, where the measured free-spectral ranges varied from 2.58 to 5.30 nm. The quality factors of the microring waveguide resonators were from 1710 to 2820.

Commercial production of QWIP wafers by molecular beam epitaxy

NASA Astrophysics Data System (ADS)

Fastenau, J. M.; Liu, W. K.; Fang, X. M.; Lubyshev, D. I.; Pelzel, R. I.; Yurasits, T. R.; Stewart, T. R.; Lee, J. H.; Li, S. S.; Tidrow, M. Z.

2001-06-01

As the performance of quantum well infrared photodetectors (QWIPs) and QWIP-based imaging systems continues to improve, their demand will undoubtedly grow. This points to the importance of a reliable commercial supplier of semiconductor QWIP material on three inch and, in the near future, four-inch substrates. Molecular beam epitaxy (MBE) is the preferred technique for growing the demanding QWIP structure, as tight control is required over the material composition and layer thickness. We report the current status of MBE-grown GaAs-based QWIP structures in a commercial production environment at IQE. Uniformity data and run-to-run reproducibility on both three-inch and four-inch GaAs substrates are quantified using alloy composition and QW thickness. Initial results on growth technology transfer to a multi-wafer MBE reactor are also presented. High-resolution X-ray diffraction measurements demonstrate GaAs QW thickness variations and AlGaAs barrier compositions changes to be less than 4% and 1% Al, respectively, across four-inch QWIP wafers from both single- and multiple-wafer MBE platforms.

Interferometric thickness calibration of 300 mm silicon wafers

NASA Astrophysics Data System (ADS)

Wang, Quandou; Griesmann, Ulf; Polvani, Robert

2005-12-01

The "Improved Infrared Interferometer" (IR 3) at the National Institute of Standards and Technology (NIST) is a phase-measuring interferometer, operating at a wavelength of 1550 nm, which is being developed for measuring the thickness and thickness variation of low-doped silicon wafers with diameters up to 300 mm. The purpose of the interferometer is to produce calibrated silicon wafers, with a certified measurement uncertainty, which can be used as reference wafers by wafer manufacturers and metrology tool manufacturers. We give an overview of the design of the interferometer and discuss its application to wafer thickness measurements. The conversion of optical thickness, as measured by the interferometer, to the wafer thickness requires knowledge of the refractive index of the material of the wafer. We describe a method for measuring the refractive index which is then used to establish absolute thickness and thickness variation maps for the wafer.

SEMICONDUCTOR TECHNOLOGY A new cleaning process for the metallic contaminants on a post-CMP wafer's surface

NASA Astrophysics Data System (ADS)

Baohong, Gao; Yuling, Liu; Chenwei, Wang; Yadong, Zhu; Shengli, Wang; Qiang, Zhou; Baimei, Tan

2010-10-01

This paper presents a new cleaning process using boron-doped diamond (BDD) film anode electrochemical oxidation for metallic contaminants on polished silicon wafer surfaces. The BDD film anode electrochemical oxidation can efficiently prepare pyrophosphate peroxide, pyrophosphate peroxide can oxidize organic contaminants, and pyrophosphate peroxide is deoxidized into pyrophosphate. Pyrophosphate, a good complexing agent, can form a metal complex, which is a structure consisting of a copper ion, bonded to a surrounding array of two pyrophosphate anions. Three polished wafers were immersed in the 0.01 mol/L CuSO4 solution for 2 h in order to make comparative experiments. The first one was cleaned by pyrophosphate peroxide, the second by RCA (Radio Corporation of America) cleaning, and the third by deionized (DI) water. The XPS measurement result shows that the metallic contaminants on wafers cleaned by the RCA method and by pyrophosphate peroxide is less than the XPS detection limits of 1 ppm. And the wafer's surface cleaned by pyrophosphate peroxide is more efficient in removing organic carbon residues than RCA cleaning. Therefore, BDD film anode electrochemical oxidation can be used for microelectronics cleaning, and it can effectively remove organic contaminants and metallic contaminants in one step. It also achieves energy saving and environmental protection.

Wafer level reliability for high-performance VLSI design

NASA Technical Reports Server (NTRS)

Root, Bryan J.; Seefeldt, James D.

1987-01-01

As very large scale integration architecture requires higher package density, reliability of these devices has approached a critical level. Previous processing techniques allowed a large window for varying reliability. However, as scaling and higher current densities push reliability to its limit, tighter control and instant feedback becomes critical. Several test structures developed to monitor reliability at the wafer level are described. For example, a test structure was developed to monitor metal integrity in seconds as opposed to weeks or months for conventional testing. Another structure monitors mobile ion contamination at critical steps in the process. Thus the reliability jeopardy can be assessed during fabrication preventing defective devices from ever being placed in the field. Most importantly, the reliability can be assessed on each wafer as opposed to an occasional sample.

Wafer bonded epitaxial templates for silicon heterostructures

DOEpatents

Atwater, Jr., Harry A.; Zahler, James M [Pasadena, CA; Morral, Anna Fontcubera I [Paris, FR

2008-03-11

A heterostructure device layer is epitaxially grown on a virtual substrate, such as an InP/InGaAs/InP double heterostructure. A device substrate and a handle substrate form the virtual substrate. The device substrate is bonded to the handle substrate and is composed of a material suitable for fabrication of optoelectronic devices. The handle substrate is composed of a material suitable for providing mechanical support. The mechanical strength of the device and handle substrates is improved and the device substrate is thinned to leave a single-crystal film on the virtual substrate such as by exfoliation of a device film from the device substrate. An upper portion of the device film exfoliated from the device substrate is removed to provide a smoother and less defect prone surface for an optoelectronic device. A heterostructure is epitaxially grown on the smoothed surface in which an optoelectronic device may be fabricated.

Wafer bonded epitaxial templates for silicon heterostructures

NASA Technical Reports Server (NTRS)

Atwater, Harry A., Jr. (Inventor); Zahler, James M. (Inventor); Morral, Anna Fontcubera I (Inventor)

2008-01-01

A heterostructure device layer is epitaxially grown on a virtual substrate, such as an InP/InGaAs/InP double heterostructure. A device substrate and a handle substrate form the virtual substrate. The device substrate is bonded to the handle substrate and is composed of a material suitable for fabrication of optoelectronic devices. The handle substrate is composed of a material suitable for providing mechanical support. The mechanical strength of the device and handle substrates is improved and the device substrate is thinned to leave a single-crystal film on the virtual substrate such as by exfoliation of a device film from the device substrate. An upper portion of the device film exfoliated from the device substrate is removed to provide a smoother and less defect prone surface for an optoelectronic device. A heterostructure is epitaxially grown on the smoothed surface in which an optoelectronic device may be fabricated.

Silicon strain gages bonded on stainless steel using glass frit for strain sensor applications

NASA Astrophysics Data System (ADS)

Zhang, Zongyang; Cheng, Xingguo; Leng, Yi; Cao, Gang; Liu, Sheng

2014-05-01

In this paper, a steel pressure sensor using strain gages bonded on a 17-4 PH stainless steel (SS) diaphragm based on glass frit technology is proposed. The strain gages with uniform resistance are obtained by growing an epi-silicon layer on a single crystal silicon wafer using epitaxial deposition technique. The inorganic glass frits are used as the bonding material between the strain gages and the 17-4 PH SS diaphragm. Our results show that the output performances of sensors at a high temperature of 125 °C are almost equal those at room temperature, which indicates that the glass frit bonding is a good method and may lead to a significant advance in the high temperature applicability of silicon strain gage sensors. Finally, the microstructure of the cured organic adhesive and the fired glass frit are compared. It may be concluded that the defects of the cured organic adhesive deteriorate the hysteresis and repeatability errors of the sensors.

Porous solid ion exchange wafer for immobilizing biomolecules

DOEpatents

Arora, Michelle B.; Hestekin, Jamie A.; Lin, YuPo J.; St. Martin, Edward J.; Snyder, Seth W.

2007-12-11

A porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer. Also disclosed is a porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer containing a biomolecule with a tag. A separate bioreactor is also disclosed incorporating the wafer described above.

Wafer bonded virtual substrate and method for forming the same

DOEpatents

Atwater, Jr., Harry A.; Zahler, James M [Pasadena, CA; Morral, Anna Fontcuberta i [Paris, FR

2007-07-03

A method of forming a virtual substrate comprised of an optoelectronic device substrate and handle substrate comprises the steps of initiating bonding of the device substrate to the handle substrate, improving or increasing the mechanical strength of the device and handle substrates, and thinning the device substrate to leave a single-crystal film on the virtual substrate such as by exfoliation of a device film from the device substrate. The handle substrate is typically Si or other inexpensive common substrate material, while the optoelectronic device substrate is formed of more expensive and specialized electro-optic material. Using the methodology of the invention a wide variety of thin film electro-optic materials of high quality can be bonded to inexpensive substrates which serve as the mechanical support for an optoelectronic device layer fabricated in the thin film electro-optic material.

Wafer bonded virtual substrate and method for forming the same

NASA Technical Reports Server (NTRS)

Atwater, Jr., Harry A. (Inventor); Zahler, James M. (Inventor); Morral, Anna Fontcuberta i (Inventor)

2007-01-01

A method of forming a virtual substrate comprised of an optoelectronic device substrate and handle substrate comprises the steps of initiating bonding of the device substrate to the handle substrate, improving or increasing the mechanical strength of the device and handle substrates, and thinning the device substrate to leave a single-crystal film on the virtual substrate such as by exfoliation of a device film from the device substrate. The handle substrate is typically Si or other inexpensive common substrate material, while the optoelectronic device substrate is formed of more expensive and specialized electro-optic material. Using the methodology of the invention a wide variety of thin film electro-optic materials of high quality can be bonded to inexpensive substrates which serve as the mechanical support for an optoelectronic device layer fabricated in the thin film electro-optic material.

1.3-microm optically-pumped semiconductor disk laser by wafer fusion.

PubMed

Lyytikäinen, Jari; Rautiainen, Jussi; Toikkanen, Lauri; Sirbu, Alexei; Mereuta, Alexandru; Caliman, Andrei; Kapon, Eli; Okhotnikov, Oleg G

2009-05-25

We report a wafer-fused high power optically-pumped semiconductor disk laser operating at 1.3 microm. An InP-based active medium was fused with a GaAs/AlGaAs distributed Bragg reflector, resulting in an integrated monolithic gain mirror. Over 2.7 W of output power, obtained at temperature of 15 degrees C, represents the best achievement reported to date for this type of lasers. The results reveal an essential advantage of the wafer fusing technique over both monolithically grown AlGaInAs/GaInAsP- and GaInNAs-based structures.

Influence of Wafer Edge Geometry on Removal Rate Profile in Chemical Mechanical Polishing: Wafer Edge Roll-Off and Notch

NASA Astrophysics Data System (ADS)

Fukuda, Akira; Fukuda, Tetsuo; Fukunaga, Akira; Tsujimura, Manabu

2012-05-01

In the chemical mechanical polishing (CMP) process, uniform polishing up to near the wafer edge is essential to reduce edge exclusion and improve yield. In this study, we examine the influences of inherent wafer edge geometries, i.e., wafer edge roll-off and notch, on the CMP removal rate profile. We clarify the areas in which the removal rate profile is affected by the wafer edge roll-off and the notch, as well as the intensity of their effects on the removal rate profile. In addition, we propose the use of a small notch to reduce the influence of the wafer notch and present the results of an examination by finite element method (FEM) analysis.

Warpage Measurement of Thin Wafers by Reflectometry

NASA Astrophysics Data System (ADS)

Ng, Chi Seng; Asundi, Anand Krishna

To cope with advances in the electronic and portable devices, electronic packaging industries have employed thinner and larger wafers to produce thinner packages/ electronic devices. As the thickness of the wafer decrease (below 250um), there is an increased tendency for it to warp. Large stresses are induced during manufacturing processes, particularly during backside metal deposition. The wafers bend due to these stresses. Warpage results from the residual stress will affect subsequent manufacturing processes. For example, warpage due to this residual stresses lead to crack dies during singulation process which will severely reorient the residual stress distributions, thus, weakening the mechanical and electrical properties of the singulated die. It is impossible to completely prevent the residual stress induced on thin wafers during the manufacturing processes. Monitoring of curvature/flatness is thus necessary to ensure reliability of device and its uses. A simple whole-field curvature measurement system using a novel computer aided phase shift reflection grating method has been developed and this project aims to take it to the next step for residual stress and full field surface shape measurement. The system was developed from our earlier works on Computer Aided Moiré Methods and Novel Techniques in Reflection Moiré, Experimental Mechanics (1994) in which novel structured light approach was shown for surface slope and curvature measurement. This method uses similar technology but coupled with a novel phase shift system to accurately measure slope and curvature. In this study, slope of the surface were obtain using the versatility of computer aided reflection grating method to manipulate and generate gratings in two orthogonal directions. The curvature and stress can be evaluated by performing a single order differentiation on slope data.

Reliable aluminum contact formation by electrostatic bonding

NASA Astrophysics Data System (ADS)

Kárpáti, T.; Pap, A. E.; Radnóczi, Gy; Beke, B.; Bársony, I.; Fürjes, P.

2015-07-01

The paper presents a detailed study of a reliable method developed for aluminum fusion wafer bonding assisted by the electrostatic force evolving during the anodic bonding process. The IC-compatible procedure described allows the parallel formation of electrical and mechanical contacts, facilitating a reliable packaging of electromechanical systems with backside electrical contacts. This fusion bonding method supports the fabrication of complex microelectromechanical systems (MEMS) and micro-opto-electromechanical systems (MOEMS) structures with enhanced temperature stability, which is crucial in mechanical sensor applications such as pressure or force sensors. Due to the applied electrical potential of  -1000 V the Al metal layers are compressed by electrostatic force, and at the bonding temperature of 450 °C intermetallic diffusion causes aluminum ions to migrate between metal layers.

Roughness and uniformity improvements on self-aligned quadruple patterning technique for 10nm node and beyond by wafer stress engineering

NASA Astrophysics Data System (ADS)

Liu, Eric; Ko, Akiteru; O'Meara, David; Mohanty, Nihar; Franke, Elliott; Pillai, Karthik; Biolsi, Peter

2017-05-01

Dimension shrinkage has been a major driving force in the development of integrated circuit processing over a number of decades. The Self-Aligned Quadruple Patterning (SAQP) technique is widely adapted for sub-10nm node in order to achieve the desired feature dimensions. This technique provides theoretical feasibility of multiple pitch-halving from 193nm immersion lithography by using various pattern transferring steps. The major concept of this approach is to a create spacer defined self-aligned pattern by using single lithography print. By repeating the process steps, double, quadruple, or octuple are possible to be achieved theoretically. In these small architectures, line roughness control becomes extremely important since it may contribute to a significant portion of process and device performance variations. In addition, the complexity of SAQP in terms of processing flow makes the roughness improvement indirective and ineffective. It is necessary to discover a new approach in order to improve the roughness in the current SAQP technique. In this presentation, we demonstrate a novel method to improve line roughness performances on 30nm pitch SAQP flow. We discover that the line roughness performance is strongly related to stress management. By selecting different stress level of film to be deposited onto the substrate, we can manipulate the roughness performance in line and space patterns. In addition, the impact of curvature change by applied film stress to SAQP line roughness performance is also studied. No significant correlation is found between wafer curvature and line roughness performance. We will discuss in details the step-by-step physical performances for each processing step in terms of critical dimension (CD)/ critical dimension uniformity (CDU)/line width roughness (LWR)/line edge roughness (LER). Finally, we summarize the process needed to reach the full wafer performance targets of LWR/LER in 1.07nm/1.13nm on 30nm pitch line and space pattern.

Direct, CMOS In-Line Process Flow Compatible, Sub 100 °C Cu-Cu Thermocompression Bonding Using Stress Engineering

NASA Astrophysics Data System (ADS)

Panigrahi, Asisa Kumar; Ghosh, Tamal; Kumar, C. Hemanth; Singh, Shiv Govind; Vanjari, Siva Rama Krishna

2018-05-01

Diffusion of atoms across the boundary between two bonding layers is the key for achieving excellent thermocompression Wafer on Wafer bonding. In this paper, we demonstrate a novel mechanism to increase the diffusion across the bonding interface and also shows the CMOS in-line process flow compatible Sub 100 °C Cu-Cu bonding which is devoid of Cu surface treatment prior to bonding. The stress in sputtered Cu thin films was engineered by adjusting the Argon in-let pressure in such a way that one film had a compressive stress while the other film had tensile stress. Due to this stress gradient, a nominal pressure (2 kN) and temperature (75 °C) was enough to achieve a good quality thermocompression bonding having a bond strength of 149 MPa and very low specific contact resistance of 1.5 × 10-8 Ω-cm2. These excellent mechanical and electrical properties are resultant of a high quality Cu-Cu bonding having grain growth between the Cu films across the boundary and extended throughout the bonded region as revealed by Cross-sectional Transmission Electron Microscopy. In addition, reliability assessment of Cu-Cu bonding with stress engineering was demonstrated using multiple current stressing and temperature cycling test, suggests excellent reliable bonding without electrical performance degradation.

Wafer-fused semiconductor radiation detector

DOEpatents

Lee, Edwin Y.; James, Ralph B.

2002-01-01

Wafer-fused semiconductor radiation detector useful for gamma-ray and x-ray spectrometers and imaging systems. The detector is fabricated using wafer fusion to insert an electrically conductive grid, typically comprising a metal, between two solid semiconductor pieces, one having a cathode (negative electrode) and the other having an anode (positive electrode). The wafer fused semiconductor radiation detector functions like the commonly used Frisch grid radiation detector, in which an electrically conductive grid is inserted in high vacuum between the cathode and the anode. The wafer-fused semiconductor radiation detector can be fabricated using the same or two different semiconductor materials of different sizes and of the same or different thicknesses; and it may utilize a wide range of metals, or other electrically conducting materials, to form the grid, to optimize the detector performance, without being constrained by structural dissimilarity of the individual parts. The wafer-fused detector is basically formed, for example, by etching spaced grooves across one end of one of two pieces of semiconductor materials, partially filling the grooves with a selected electrical conductor which forms a grid electrode, and then fusing the grooved end of the one semiconductor piece to an end of the other semiconductor piece with a cathode and an anode being formed on opposite ends of the semiconductor pieces.

Wafer-level Cu-Sn micro-joints with high mechanical strength and low Sn overflow

NASA Astrophysics Data System (ADS)

Duan, Ani; Luu, Thi-Thuy; Wang, Kaiying; Aasmundtveit, Knut; Hoivik, Nils

2015-09-01

In this paper, we report wafer-level bonding using solid-liquid inter-diffusion (SLID) processes for fabricating micro-joints Cu-Sn at low temperature (270 °C). The evolution of multilayer Cu/Sn to micro-joint alloys has been characterized by optical microscopy and mechanical die-shear testing. The Cu-Sn joints with line width from 80 to 200 μm prove to be reliable packaging materials for bonding vacuum micro-cavities with controllable Sn overflow, as well as high mechanical strength (>70 MPa). A thermodynamic model has been performed to further understand the formation of Cu-Sn intermetallic alloys. There are two important findings for this work: 1) Using a two-step temperature profile may significantly reduce the amount of Sn overflow; 2) for packaging, a bond frame width greater than 80 μm will result in high yield.

An insight into current concepts and techniques in resin bonding to high strength ceramics.

PubMed

Luthra, R; Kaur, P

2016-06-01

Reliable bonding between high strength ceramics and resin composite cement is difficult to achieve because of their chemical inertness and lack of silica content. The aim of this review was to assess the current literature describing methods for resin bonding to ceramics with high flexural strength such as glass-infiltrated alumina and zirconia, densely sintered alumina and yttria-partially stabilized tetragonal zirconia polycrystalline ceramic (Y-TZP) with respect to bond strength and bond durability. Suitable peer reviewed publications in the English language were identified through searches performed in PubMed, Google Search and handsearches. The keywords or phrases used were 'resin-ceramic bond', 'silane coupling agents', 'air particle abrasion', 'zirconia ceramic' and 'resin composite cements'. Studies from January 1989 to June 2015 were included. The literature demonstrated that there are multiple techniques available for surface treatments but bond strength testing under different investigations have produced conflicting results. Within the scope of this review, there is no evidence to support a universal technique of ceramic surface treatment for adhesive cementation. A combination of chemical and mechanical treatments might be the recommended solution. The hydrolytic stability of the resin ceramic bond should be enhanced. © 2016 Australian Dental Association.

Post exposure bake unit equipped with wafer-shape compensation technology

NASA Astrophysics Data System (ADS)

Goto, Shigehiro; Morita, Akihiko; Oyama, Kenichi; Hori, Shimpei; Matsuchika, Keiji; Taniguchi, Hideyuki

2007-03-01

In 193nm lithography, it is well known that Critical Dimension Uniformity (CDU) within wafer is especially influenced by temperature variation during Post Exposure Bake (PEB) process. This temperature variation has been considered to be caused by the hot plate unit, and improvement of temperature uniformity within hot plate itself has been focused to achieve higher CDU. However, we have found that the impact of the wafer shape on temperature uniformity within wafer can not be ignored when the conventional PEB processing system is applied to an advanced resist technology. There are two factors concerned with the wafer shape. First, gravity force of the wafer itself generates wafer shape bending because wafer is simply supported by a few proximity gaps on the conventional hot plate. Next, through the semiconductor manufacturing process, wafer is gradually warped due to the difference of the surface stress between silicon and deposited film layers (Ex. Si-Oxide, Si-Nitride). Therefore, the variation of the clearance between wafer backside and hot plate surface leads to non-uniform thermal conductivity within wafer during PEB processing, and eventually impacts on the CDU within wafer. To overcome this problem concerned with wafer shape during PEB processing, we have developed the new hot plate equipped with the wafer shape compensation technology. As a result of evaluation, we have confirmed that this new PEB system has an advantage not only for warped wafer but also for flat (bare) wafer.

Pi Bond Orders and Bond Lengths

ERIC Educational Resources Information Center

Herndon, William C.; Parkanyi, Cyril

1976-01-01

Discusses three methods of correlating bond orders and bond lengths in unsaturated hydrocarbons: the Pauling theory, the Huckel molecular orbital technique, and self-consistent-field techniques. (MLH)

Heating device for semiconductor wafers

DOEpatents

Vosen, Steven R.

1999-01-01

An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernable pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light.

Electronic transport characterization of silicon wafers by spatially resolved steady-state photocarrier radiometric imaging

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Qian; University of the Chinese Academy of Sciences, Beijing 100039; Li, Bincheng, E-mail: bcli@ioe.ac.cn

2015-09-28

Spatially resolved steady-state photocarrier radiometric (PCR) imaging technique is developed to characterize the electronic transport properties of silicon wafers. Based on a nonlinear PCR theory, simulations are performed to investigate the effects of electronic transport parameters (the carrier lifetime, the carrier diffusion coefficient, and the front surface recombination velocity) on the steady-state PCR intensity profiles. The electronic transport parameters of an n-type silicon wafer are simultaneously determined by fitting the measured steady-state PCR intensity profiles to the three-dimensional nonlinear PCR model. The determined transport parameters are in good agreement with the results obtained by the conventional modulated PCR technique withmore » multiple pump beam radii.« less

Surface characteristics and damage distributions of diamond wire sawn wafers for silicon solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sopori, Bhushan; Devayajanam, Srinivas; Basnyat, Prakash

2016-01-01

This paper describes surface characteristics, in terms of its morphology, roughness and near-surface damage of Si wafers cut by diamond wire sawing (DWS) of Si ingots under different cutting conditions. Diamond wire sawn Si wafers exhibit nearly-periodic surface features of different spatial wavelengths, which correspond to kinematics of various movements during wafering, such as ingot feed, wire reciprocation, and wire snap. The surface damage occurs in the form of frozen-in dislocations, phase changes, and microcracks. The in-depth damage was determined by conventional methods such as TEM, SEM and angle-polishing/defect-etching. However, because these methods only provide local information, we have alsomore » applied a new technique that determines average damage depth over a large area. This technique uses sequential measurement of the minority carrier lifetime after etching thin layers from the surfaces. The lateral spatial damage variations, which seem to be mainly related to wire reciprocation process, were observed by photoluminescence and minority carrier lifetime mapping. Our results show a strong correlation of damage depth on the diamond grit size and wire usage.« less

Hybrid Integrated Platforms for Silicon Photonics

PubMed Central

Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

2010-01-01

A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

PubMed Central

Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

2014-01-01

This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S. PMID:25521385

A high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging.

PubMed

Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

2014-12-16

This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in "H" type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than -0.01% F.S/°C in the range of -40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.

Heating device for semiconductor wafers

DOEpatents

Vosen, S.R.

1999-07-27

An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernible pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light. 4 figs.

An EMAT-based shear horizontal (SH) wave technique for adhesive bond inspection

NASA Astrophysics Data System (ADS)

Arun, K.; Dhayalan, R.; Balasubramaniam, Krishnan; Maxfield, Bruce; Peres, Patrick; Barnoncel, David

2012-05-01

The evaluation of adhesively bonded structures has been a challenge over the several decades that these structures have been used. Applications within the aerospace industry often call for particularly high performance adhesive bonds. Several techniques have been proposed for the detection of disbonds and cohesive weakness but a reliable NDE method for detecting interfacial weakness (also sometimes called a kissing bond) has been elusive. Different techniques, including ultrasonic, thermal imaging and shearographic methods, have been proposed; all have had some degree of success. In particular, ultrasonic methods, including those based upon shear and guided waves, have been explored for the assessment of interfacial bond quality. Since 3-D guided shear horizontal (SH) waves in plates have predominantly shear displacement at the plate surfaces, we conjectured that SH guided waves should be influenced by interfacial conditions when they propagate between adhesively bonded plates of comparable thickness. This paper describes a new technique based on SH guided waves that propagate within and through a lap joint. Through mechanisms we have yet to fully understand, the propagation of an SH wave through a lap joint gives rise to a reverberation signal that is due to one or more reflections of an SH guided wave mode within that lap joint. Based upon a combination of numerical simulations and measurements, this method shows promise for detecting and classifying interfacial bonds. It is also apparent from our measurements that the SH wave modes can discriminate between adhesive and cohesive bond weakness in both Aluminum-Epoxy-Aluminum and Composite-Epoxy-Composite lap joints. All measurements reported here used periodic permanent magnet (PPM) Electro-Magnetic Acoustic Transducers (EMATs) to generate either or both of the two lowest order SH modes in the plates that comprise the lap joint. This exact configuration has been simulated using finite element (FE) models to

A quality quantitative method of silicon direct bonding based on wavelet image analysis

NASA Astrophysics Data System (ADS)

Tan, Xiao; Tao, Zhi; Li, Haiwang; Xu, Tiantong; Yu, Mingxing

2018-04-01

The rapid development of MEMS (micro-electro-mechanical systems) has received significant attention from researchers in various fields and subjects. In particular, the MEMS fabrication process is elaborate and, as such, has been the focus of extensive research inquiries. However, in MEMS fabrication, component bonding is difficult to achieve and requires a complex approach. Thus, improvements in bonding quality are relatively important objectives. A higher quality bond can only be achieved with improved measurement and testing capabilities. In particular, the traditional testing methods mainly include infrared testing, tensile testing, and strength testing, despite the fact that using these methods to measure bond quality often results in low efficiency or destructive analysis. Therefore, this paper focuses on the development of a precise, nondestructive visual testing method based on wavelet image analysis that is shown to be highly effective in practice. The process of wavelet image analysis includes wavelet image denoising, wavelet image enhancement, and contrast enhancement, and as an end result, can display an image with low background noise. In addition, because the wavelet analysis software was developed with MATLAB, it can reveal the bonding boundaries and bonding rates to precisely indicate the bond quality at all locations on the wafer. This work also presents a set of orthogonal experiments that consist of three prebonding factors, the prebonding temperature, the positive pressure value and the prebonding time, which are used to analyze the prebonding quality. This method was used to quantify the quality of silicon-to-silicon wafer bonding, yielding standard treatment quantities that could be practical for large-scale use.

Yield impact for wafer shape misregistration-based binning for overlay APC diagnostic enhancement

NASA Astrophysics Data System (ADS)

Jayez, David; Jock, Kevin; Zhou, Yue; Govindarajulu, Venugopal; Zhang, Zhen; Anis, Fatima; Tijiwa-Birk, Felipe; Agarwal, Shivam

2018-03-01

The importance of traditionally acceptable sources of variation has started to become more critical as semiconductor technologies continue to push into smaller technology nodes. New metrology techniques are needed to pursue the process uniformity requirements needed for controllable lithography. Process control for lithography has the advantage of being able to adjust for cross-wafer variability, but this requires that all processes are close in matching between process tools/chambers for each process. When this is not the case, the cumulative line variability creates identifiable groups of wafers1 . This cumulative shape based effect is described as impacting overlay measurements and alignment by creating misregistration of the overlay marks. It is necessary to understand what requirements might go into developing a high volume manufacturing approach which leverages this grouping methodology, the key inputs and outputs, and what can be extracted from such an approach. It will be shown that this line variability can be quantified into a loss of electrical yield primarily at the edge of the wafer and proposes a methodology for root cause identification and improvement. This paper will cover the concept of wafer shape based grouping as a diagnostic tool for overlay control and containment, the challenges in implementing this in a manufacturing setting, and the limitations of this approach. This will be accomplished by showing that there are identifiable wafer shape based signatures. These shape based wafer signatures will be shown to be correlated to overlay misregistration, primarily at the edge. It will also be shown that by adjusting for this wafer shape signal, improvements can be made to both overlay as well as electrical yield. These improvements show an increase in edge yield, and a reduction in yield variability.

Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals

NASA Astrophysics Data System (ADS)

Carey, Benjamin J.; Ou, Jian Zhen; Clark, Rhiannon M.; Berean, Kyle J.; Zavabeti, Ali; Chesman, Anthony S. R.; Russo, Salvy P.; Lau, Desmond W. M.; Xu, Zai-Quan; Bao, Qiaoliang; Kevehei, Omid; Gibson, Brant C.; Dickey, Michael D.; Kaner, Richard B.; Daeneke, Torben; Kalantar-Zadeh, Kourosh

2017-02-01

A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (~1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes.

Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals.

PubMed

Carey, Benjamin J; Ou, Jian Zhen; Clark, Rhiannon M; Berean, Kyle J; Zavabeti, Ali; Chesman, Anthony S R; Russo, Salvy P; Lau, Desmond W M; Xu, Zai-Quan; Bao, Qiaoliang; Kevehei, Omid; Gibson, Brant C; Dickey, Michael D; Kaner, Richard B; Daeneke, Torben; Kalantar-Zadeh, Kourosh

2017-02-17

A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (∼1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes.

Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals

PubMed Central

Carey, Benjamin J.; Ou, Jian Zhen; Clark, Rhiannon M.; Berean, Kyle J.; Zavabeti, Ali; Chesman, Anthony S. R.; Russo, Salvy P.; Lau, Desmond W. M.; Xu, Zai-Quan; Bao, Qiaoliang; Kavehei, Omid; Gibson, Brant C.; Dickey, Michael D.; Kaner, Richard B.; Daeneke, Torben; Kalantar-Zadeh, Kourosh

2017-01-01

A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (∼1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes. PMID:28211538

The Au/Si eutectic bonding compatibility with KOH etching for 3D devices fabrication

NASA Astrophysics Data System (ADS)

Liang, Hengmao; Liu, Mifeng; Liu, Song; Xu, Dehui; Xiong, Bin

2018-01-01

KOH etching and Au/Si eutectic bonding are cost-efficient technologies for 3D device fabrication. Aimed at investigating the process compatibility of KOH etching and Au/Si bonding, KOH etching tests have been carried out for Au/bulk Si and Au/amorphous Si (a-Si) bonding wafers in this paper. For the Au/bulk Si bonding wafer, a serious underetch phenomenon occurring on the damage layer in KOH etching definitely results in packaging failure. In the microstructure analysis, it is found that the formation of the damage layer between the bonded layer and bulk Si is attributed to the destruction of crystal Si lattices in Au/bulk Si eutectic reaction. Considering the occurrence of underetch for Au/Si bonding must meet two requirements: the superfluous Si and the defective layer near the bonded layer, the Au/a-Si bonding by regulating the a-Si/Au thickness ratio is presented in this study. Only when the a-Si/Au thickness ratio is relatively low are there not underetch phenomena, of which the reason is the full reaction of the a-Si layer avoiding the formation of the damage layer for easy underetch. Obviously, the Au/a-Si bonding via choosing a moderate a-Si/Au thickness ratio (⩽1.5:1 is suggested) could be reliably compatible with KOH etching, which provides an available and low-cost approach for 3D device fabrication. More importantly, the theory of the damage layer proposed in this study can be naturally applied to relevant analyses on the eutectic reaction of other metals and single crystal materials.

High throughput wafer defect monitor for integrated metrology applications in photolithography

NASA Astrophysics Data System (ADS)

Rao, Nagaraja; Kinney, Patrick; Gupta, Anand

2008-03-01

The traditional approach to semiconductor wafer inspection is based on the use of stand-alone metrology tools, which while highly sensitive, are large, expensive and slow, requiring inspection to be performed off-line and on a lot sampling basis. Due to the long cycle times and sparse sampling, the current wafer inspection approach is not suited to rapid detection of process excursions that affect yield. The semiconductor industry is gradually moving towards deploying integrated metrology tools for real-time "monitoring" of product wafers during the manufacturing process. Integrated metrology aims to provide end-users with rapid feedback of problems during the manufacturing process, and the benefit of increased yield, and reduced rework and scrap. The approach of monitoring 100% of the wafers being processed requires some trade-off in sensitivity compared to traditional standalone metrology tools, but not by much. This paper describes a compact, low-cost wafer defect monitor suitable for integrated metrology applications and capable of detecting submicron defects on semiconductor wafers at an inspection rate of about 10 seconds per wafer (or 360 wafers per hour). The wafer monitor uses a whole wafer imaging approach to detect defects on both un-patterned and patterned wafers. Laboratory tests with a prototype system have demonstrated sensitivity down to 0.3 µm on un-patterned wafers and down to 1 µm on patterned wafers, at inspection rates of 10 seconds per wafer. An ideal application for this technology is preventing photolithography defects such as "hot spots" by implementing a wafer backside monitoring step prior to exposing wafers in the lithography step.

Wafer-scale synthesis of monolayer and few-layer MoS2 via thermal vapor sulfurization

NASA Astrophysics Data System (ADS)

Robertson, John; Liu, Xue; Yue, Chunlei; Escarra, Matthew; Wei, Jiang

2017-12-01

Monolayer molybdenum disulfide (MoS2) is an atomically thin, direct bandgap semiconductor crystal potentially capable of miniaturizing optoelectronic devices to an atomic scale. However, the development of 2D MoS2-based optoelectronic devices depends upon the existence of a high optical quality and large-area monolayer MoS2 synthesis technique. To address this need, we present a thermal vapor sulfurization (TVS) technique that uses powder MoS2 as a sulfur vapor source. The technique reduces and stabilizes the flow of sulfur vapor, enabling monolayer wafer-scale MoS2 growth. MoS2 thickness is also controlled with great precision; we demonstrate the ability to synthesize MoS2 sheets between 1 and 4 layers thick, while also showing the ability to create films with average thickness intermediate between integer layer numbers. The films exhibit wafer-scale coverage and uniformity, with electrical quality varying depending on the final thickness of the grown MoS2. The direct bandgap of grown monolayer MoS2 is analyzed using internal and external photoluminescence quantum efficiency. The photoluminescence quantum efficiency is shown to be competitive with untreated exfoliated MoS2 monolayer crystals. The ability to consistently grow wafer-scale monolayer MoS2 with high optical quality makes this technique a valuable tool for the development of 2D optoelectronic devices such as photovoltaics, detectors, and light emitters.

Optima XE Single Wafer High Energy Ion Implanter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Satoh, Shu; Ferrara, Joseph; Bell, Edward

2008-11-03

The Optima XE is the first production worthy single wafer high energy implanter. The new system combines a state-of-art single wafer endstation capable of throughputs in excess of 400 wafers/hour with a production-proven RF linear accelerator technology. Axcelis has been evolving and refining RF Linac technology since the introduction of the NV1000 in 1986. The Optima XE provides production worthy beam currents up to energies of 1.2 MeV for P{sup +}, 2.9 MeV for P{sup ++}, and 1.5 MeV for B{sup +}. Energies as low as 10 keV and tilt angles as high as 45 degrees are also available., allowingmore » the implanter to be used for a wide variety of traditional medium current implants to ensure high equipment utilization. The single wafer endstation provides precise implant angle control across wafer and wafer to wafer. In addition, Optima XE's unique dose control system allows compensation of photoresist outgassing effects without relying on traditional pressure-based methods. We describe the specific features, angle control and dosimetry of the Optima XE and their applications in addressing the ever-tightening demands for more precise process controls and higher productivity.« less

Design Study of Wafer Seals for Future Hypersonic Vehicles

NASA Technical Reports Server (NTRS)

Dunlap, Patrick H.; Finkbeiner, Joshua R.; Steinetz, Bruce M.; DeMange, Jeffrey J.

2005-01-01

Future hypersonic vehicles require high temperature, dynamic seals in advanced hypersonic engines and on the vehicle airframe to seal the perimeters of movable panels, flaps, and doors. Current seals do not meet the demanding requirements of these applications, so NASA Glenn Research Center is developing improved designs to overcome these shortfalls. An advanced ceramic wafer seal design has shown promise in meeting these needs. Results from a design of experiments study performed on this seal revealed that several installation variables played a role in determining the amount of leakage past the seals. Lower leakage rates were achieved by using a tighter groove width around the seals, a higher seal preload, a tighter wafer height tolerance, and a looser groove length. During flow testing, a seal activating pressure acting behind the wafers combined with simulated vibrations to seat the seals more effectively against the sealing surface and produce lower leakage rates. A seal geometry study revealed comparable leakage for full-scale wafers with 0.125 and 0.25 in. thicknesses. For applications in which lower part counts are desired, fewer 0.25-in.-thick wafers may be able to be used in place of 0.125-in.-thick wafers while achieving similar performance. Tests performed on wafers with a rounded edge (0.5 in. radius) in contact with the sealing surface resulted in flow rates twice as high as those for wafers with a flat edge. Half-size wafers had leakage rates approximately three times higher than those for full-size wafers.

Bump Bonding Using Metal-Coated Carbon Nanotubes

NASA Technical Reports Server (NTRS)

Lamb, James L.; Dickie, Matthew R.; Kowalczyk, Robert S.; Liao, Anna; Bronikowski, Michael J.

2012-01-01

Bump bonding hybridization techniques use arrays of indium bumps to electrically and mechanically join two chips together. Surface-tension issues limit bump sizes to roughly as wide as they are high. Pitches are limited to 50 microns with bumps only 8-14 microns high on each wafer. A new process uses oriented carbon nanotubes (CNTs) with a metal (indium) in a wicking process using capillary actions to increase the aspect ratio and pitch density of the connections for bump bonding hybridizations. It merges the properties of the CNTs and the metal bumps, providing enhanced material performance parameters. By merging the bumps with narrow and long CNTs oriented in the vertical direction, higher aspect ratios can be obtained if the metal can be made to wick. Possible aspect ratios increase from 1:1 to 20:1 for most applications, and to 100:1 for some applications. Possible pitch density increases of a factor of 10 are possible. Standard capillary theory would not normally allow indium or most other metals to be drawn into the oriented CNTs, because they are non-wetting. However, capillary action can be induced through the ability to fabricate oriented CNT bundles to desired spacings, and the use of deposition techniques and temperature to control the size and mobility of the liquid metal streams and associated reservoirs. This hybridization of two technologies (indium bumps and CNTs) may also provide for some additional benefits such as improved thermal management and possible current density increases.

SCIL nanoimprint solutions: high-volume soft NIL for wafer scale sub-10nm resolution

NASA Astrophysics Data System (ADS)

Voorkamp, R.; Verschuuren, M. A.; van Brakel, R.

2016-10-01

Nano-patterning materials and surfaces can add unique functionalities and properties which cannot be obtained in bulk or micro-structured materials. Examples range from hetro-epitaxy of semiconductor nano-wires to guiding cell expression and growth on medical implants. [1] Due to the cost and throughput requirements conventional nano-patterning techniques such as deep UV lithography (cost and flat substrate demands) and electron-beam lithography (cost, throughput) are not an option. Self-assembly techniques are being considered for IC manufacturing, but require nano-sized guiding patterns, which have to be fabricated in any case.[2] Additionally, the self-assembly process is highly sensitive to the environment and layer thickness, which is difficult to control on non-flat surfaces such as PV silicon wafers or III/V substrates. Laser interference lithography can achieve wafer scale periodic patterns, but is limited by the throughput due to intensity of the laser at the pinhole and only regular patterns are possible where the pattern fill fraction cannot be chosen freely due to the interference condition.[3] Nanoimprint lithography (NIL) is a promising technology for the cost effective fabrication of sub-micron and nano-patterns on large areas. The challenges for NIL are related to the technique being a contact method where a stamp which holds the patterns is required to be brought into intimate contact with the surface of the product. In NIL a strong distinction is made between the type of stamp used, either rigid or soft. Rigid stamps are made from patterned silicon, silica or plastic foils and are capable of sub-10nm resolution and wafer scale patterning. All these materials behave similar at the micro- to nm scale and require high pressures (5 - 50 Bar) to enable conformal contact to be made on wafer scales. Real world conditions such as substrate bow and particle contaminants complicate the use of rigid stamps for wafer scale areas, reducing stamp lifetime and

Recovery Act: Novel Kerf-Free PV Wafering that provides a low-cost approach to generate wafers from 150um to 50um in thickness

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fong, Theodore E.

2013-05-06

The technical paper summarizes the project work conducted in the development of Kerf-Free silicon wafering equipment for silicon solar wafering. This new PolyMax technology uses a two step process of implantation and cleaving to exfoliate 50um to 120um wafers with thicknesses ranging from 50um to 120um from a 125mm or 156mm pseudo-squared silicon ingot. No kerf is generated using this method of wafering. This method of wafering contrasts with the current method of making silicon solar wafers using the industry standard wire saw equipment. The report summarizes the activity conducted by Silicon Genesis Corporation in working to develop this technologymore » further and to define the roadmap specifications for the first commercial proto-type equipment for high volume solar wafer manufacturing using the PolyMax technology.« less

Protection of MOS capacitors during anodic bonding

NASA Astrophysics Data System (ADS)

Schjølberg-Henriksen, K.; Plaza, J. A.; Rafí, J. M.; Esteve, J.; Campabadal, F.; Santander, J.; Jensen, G. U.; Hanneborg, A.

2002-07-01

We have investigated the electrical damage by anodic bonding on CMOS-quality gate oxide and methods to prevent this damage. n-type and p-type MOS capacitors were characterized by quasi-static and high-frequency CV-curves before and after anodic bonding. Capacitors that were bonded to a Pyrex wafer with 10 μm deep cavities enclosing the capacitors exhibited increased leakage current and interface trap density after bonding. Two different methods were successful in protecting the capacitors from such damage. Our first approach was to increase the cavity depth from 10 μm to 50 μm, thus reducing the electric field across the gate oxide during bonding from approximately 2 × 105 V cm-1 to 4 × 104 V cm-1. The second protection method was to coat the inside of a 10 μm deep Pyrex glass cavity with aluminium, forming a Faraday cage that removed the electric field across the cavity during anodic bonding. Both methods resulted in capacitors with decreased interface trap density and unchanged leakage current after bonding. No change in effective oxide charge or mobile ion contamination was observed on any of the capacitors in the study.

Effect of Bonding Agent Application Method on Titanium-Ceramic Bond Strength.

PubMed

Curtis, Joseph G; Dossett, Jon; Prihoda, Thomas J; Teixeira, Erica C

2015-07-01

Although milled titanium may be used as a substructure in fixed and implant prosthodontics, the application of the veneering porcelain presents particular challenges compared to traditional alloys. To address these challenges, some Ti ceramic systems incorporate the application of a bonding agent prior to the opaque layer. Vita Titankeramik's bonding agent is available as a powder, paste, and spray-on formulation. We examined the effect of these three application methods on the bond strength. Four titanium bars were milled from each of 11 wafers cut from grade II Ti using the Kavo Everest milling unit and a custom-designed milling toolpath. An experienced technician prepared the 25 × 3 × 0.5 mm(3) metal bars and applied bonding agent using one of three application methods, and then applied opaque, dentin, and enamel porcelains according to manufacturer's instructions to a 8 × 3 × 1 mm(3) porcelain. A control group received no bonding agent prior to porcelain application. The four groups (n = 11) were blindly tested for differences in bond strength using a universal testing machine in a three-point bend test configuration, based on ISO 9693-1:2012. The average (SD) bond strengths for the control, powder, paste, and spray-on groups, respectively, were: 24.8 (2.6), 24.6 (2.6), 25.3 (4.0), and 24.1 (3.9) MPa. One-way ANOVA and Tukey's multiple comparison tests were performed between all groups. There were no statistically significant differences among groups (p = 0.951). Titanium-porcelain bond strength was not affected by the use of a bonding agent or its application method when tested by ISO 9693-1 standard. © 2014 by the American College of Prosthodontists.

Advanced Photonic Sensors Enabled by Semiconductor Bonding

DTIC Science & Technology

2010-05-31

a dry scroll backing pump to maintain the high differential pressure between the UV gun and the sample/analysis chamber. We also replaced the...semiconductor materials in an ultra-high vacuum (UHV) environment where the properties of the interface can be controlled with atomic-level precision. Such...year research program, we designed and constructed a unique system capable of fusion bonding two wafers in an ultra-high vacuum environment. This system

Cusp Fracture Resistance of Maxillary Premolars Restored with the Bonded Amalgam Technique Using Various Luting Agents

PubMed Central

Marchan, Shivaughn M.; Coldero, Larry; White, Daniel; Smith, William A. J.; Rafeek, Reisha N.

2009-01-01

Objective. This in vitro study uses measurements of fracture resistance to compare maxillary premolars restored with the bonded amalgam technique using a new resin luting cement, glass ionomer, and resin-modified glass ionomer as the bonding agents. Materials. Eighty-five sound maxillary premolars were selected and randomly assigned to one of five test groups of 17 teeth each. One group of intact teeth served as the control. The remaining groups were prepared to a standard cavity form relative to the dimensions of the overall tooth and restored with amalgam alone or a bonded amalgam using one of three luting agents: RelyX Arc (a new resin luting cement), RelyX luting (a resin-modified glass ionomer), or Ketac-Cem μ (a glass ionomer) as the bonding agents. Each tooth was then subjected to compressive testing until catastrophic failure occurred. The mean loads at failure of each group were statistically compared using ANOVA with a post hoc Bonferroni test. Results. It was found that regardless of the luting cement used for the amalgam bonding technique, there was little effect on the fracture resistance of teeth. Conclusion. Cusp fracture resistance of premolars prepared with conservative MOD cavity preparations is not improved by using an amalgam-bonding technique compared to similar cavities restored with amalgam alone. PMID:20339450

Laser furnace and method for zone refining of semiconductor wafers

NASA Technical Reports Server (NTRS)

Griner, Donald B. (Inventor); zur Burg, Frederick W. (Inventor); Penn, Wayne M. (Inventor)

1988-01-01

A method of zone refining a crystal wafer (116 FIG. 1) comprising the steps of focusing a laser beam to a small spot (120) of selectable size on the surface of the crystal wafer (116) to melt a spot on the crystal wafer, scanning the small laser beam spot back and forth across the surface of the crystal wafer (116) at a constant velocity, and moving the scanning laser beam across a predetermined zone of the surface of the crystal wafer (116) in a direction normal to the laser beam scanning direction and at a selectible velocity to melt and refine the entire crystal wafer (116).

A Comparative Evaluation of the Effect of Bonding Agent on the Tensile Bond Strength of Two Pit and Fissure Sealants Using Invasive and Non-invasive Techniques: An in-vitro Study.

PubMed

Singh, Shamsher; Adlakha, Vivek; Babaji, Prashant; Chandna, Preetika; Thomas, Abi M; Chopra, Saroj

2013-10-01

Newer technologies and the development of pit and fissure sealants have shifted the treatment philosophy from 'drill and fill' to that of 'seal and heal'. The purpose of this in-vitro study was to evaluate the effects of bonding agents on the tensile bond strengths of two pit and fissure sealants by using invasive and non-invasive techniques. One hundred and twenty bicuspids were collected and teeth were divided into two groups: Group-I (Clinpro) and Group-II (Conseal f) with 60 teeth in each group. For evaluating tensile bond strengths, occlusal surfaces of all the teeth were flattened by reducing buccal and lingual cusps without disturbing fissures. Standardised polyvinyl tube was bonded to occlusal surfaces with respective materials. Sealants were applied, with or without bonding agents, in increments and they were light cured. Tensile bond strengths were determined by using Universal Testing Machine. Data were then statistically analysed by using Student t-test for comparison. A statistically significant difference was found in tensile bond strength in invasive with bonding agent group than in non-invasive with bonding agent group. This study revealed that invasive techniques increase the tensile bond strengths of sealants as compared to non- invasive techniques and that the use of a bonding agent as an intermediate layer between the tooth and fissure sealant is beneficial for increasing the bond strength.

Silicon Alignment Pins: An Easy Way to Realize a Wafer-to-Wafer Alignment

NASA Technical Reports Server (NTRS)

Jung-Kubiak, Cecile; Reck, Theodore J.; Lin, Robert H.; Peralta, Alejandro; Gill, John J.; Lee, Choonsup; Siles, Jose; Toda, Risaku; Chattopadhyay, Goutam; Cooper, Ken B.;

Novel wafer stepper with violet LED light source

NASA Astrophysics Data System (ADS)

Ting, Yung-Chiang; Shy, Shyi-Long

2014-03-01

Novel wafer stepper by using contact or proximity printing will be developed, using violet LED light source to replace Hg Arc. lamp or laser. Mirror, filter and condenser lens for Hg Arc. Lamp or laser and reduction lens for projection printing can be discarded. Reliability and manufacturing cost of wafer stepper can be improved. Exposure result by using IP3600 resist and wafer stepper with violet LED light source (wave-length 360nm to 410 nm) will be obtained. This novel wafer stepper can be used for 3DIC, MEMS and bio-chip lithography application by using thin and thick resist with sub-micron to 100 micron thickness.

Genesis Ultrapure Water Megasonic Wafer Spin Cleaner

NASA Technical Reports Server (NTRS)

Allton, Judith H.; Stansbery, Eileen K.; Calaway, Michael J.; Rodriquez, Melissa C.

2013-01-01

A device removes, with high precision, the majority of surface particle contamination greater than 1-micron-diameter in size from ultrapure semiconductor wafer materials containing implanted solar wind samples returned by NASA's Genesis mission. This cleaning device uses a 1.5-liter/minute flowing stream of heated ultrapure water (UPW) with 1- MHz oscillating megasonic pulse energy focused at 3 to 5 mm away from the wafer surface spinning at 1,000 to 10,000 RPM, depending on sample size. The surface particle contamination is removed by three processes: flowing UPW, megasonic cavitations, and centripetal force from the spinning wafer. The device can also dry the wafer fragment after UPW/megasonic cleaning by continuing to spin the wafer in the cleaning chamber, which is purged with flowing ultrapure nitrogen gas at 65 psi (.448 kPa). The cleaner also uses three types of vacuum chucks that can accommodate all Genesis-flown array fragments in any dimensional shape between 3 and 100 mm in diameter. A sample vacuum chuck, and the manufactured UPW/megasonic nozzle holder, replace the human deficiencies by maintaining a consistent distance between the nozzle and wafer surface as well as allowing for longer cleaning time. The 3- to 5-mm critical distance is important for the ability to remove particles by megasonic cavitations. The increased UPW sonication time and exposure to heated UPW improve the removal of 1- to 5-micron-sized particles.

Quantitative phase measurement for wafer-level optics

NASA Astrophysics Data System (ADS)

Qu, Weijuan; Wen, Yongfu; Wang, Zhaomin; Yang, Fang; Huang, Lei; Zuo, Chao

2015-07-01

Wafer-level-optics now is widely used in smart phone camera, mobile video conferencing or in medical equipment that require tiny cameras. Extracting quantitative phase information has received increased interest in order to quantify the quality of manufactured wafer-level-optics, detect defective devices before packaging, and provide feedback for manufacturing process control, all at the wafer-level for high-throughput microfabrication. We demonstrate two phase imaging methods, digital holographic microscopy (DHM) and Transport-of-Intensity Equation (TIE) to measure the phase of the wafer-level lenses. DHM is a laser-based interferometric method based on interference of two wavefronts. It can perform a phase measurement in a single shot. While a minimum of two measurements of the spatial intensity of the optical wave in closely spaced planes perpendicular to the direction of propagation are needed to do the direct phase retrieval by solving a second-order differential equation, i.e., with a non-iterative deterministic algorithm from intensity measurements using the Transport-of-Intensity Equation (TIE). But TIE is a non-interferometric method, thus can be applied to partial-coherence light. We demonstrated the capability and disability for the two phase measurement methods for wafer-level optics inspection.

Apparatus and method for measuring the thickness of a semiconductor wafer

DOEpatents

Ciszek, Theodoer F.

1995-01-01

Apparatus for measuring thicknesses of semiconductor wafers, comprising: housing means for supporting a wafer in a light-tight environment; a light source mounted to the housing at one side of the wafer to emit light of a predetermined wavelength to normally impinge the wafer; a light detector supported at a predetermined distance from a side of the wafer opposite the side on which a light source impinges and adapted to receive light transmitted through the wafer; and means for measuring the transmitted light.

Effect of lubricant environment on saw damage in silicon wafers

NASA Technical Reports Server (NTRS)

Kuan, T. S.; Shih, K. K.; Vanvechten, J. A.; Westdorp, W. A.

1982-01-01

The chemomechanical effect of lubricant environments on the inner diameter (ID) sawing induced surface damage in Si wafers was tested for four different lubricants: water, dielectric oil, and two commercial cutting solutions. The effects of applying different potential on Si crystals during the sawing were also tested. It is indicated that the number and depth of surface damage are sensitive to the chemical nature of the saw lubricant. It is determined that the lubricants that are good catalysts for breaking Si bonds can dampen the out of plane blade vibration more effectively and produce less surface damage. Correlations between the applied potential and the depth of damage in the dielectric oil and one of the commercial cutting solutions and possible mechanisms involved are discussed.

First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

NASA Technical Reports Server (NTRS)

Fung, A. K.; Gaier, T.; Samoska, L.; Deal, W. R.; Radisic, V.; Mei, X. B.; Yoshida, W.; Liu, P. S.; Uyeda, J.; Barsky, M.;

Study of temperature distributions in wafer exposure process

NASA Astrophysics Data System (ADS)

Lin, Zone-Ching; Wu, Wen-Jang

During the exposure process of photolithography, wafer absorbs the exposure energy, which results in rising temperature and the phenomenon of thermal expansion. This phenomenon was often neglected due to its limited effect in the previous generation of process. However, in the new generation of process, it may very likely become a factor to be considered. In this paper, the finite element model for analyzing the transient behavior of the distribution of wafer temperature during exposure was established under the assumption that the wafer was clamped by a vacuum chuck without warpage. The model is capable of simulating the distribution of the wafer temperature under different exposure conditions. The flowchart of analysis begins with the simulation of transient behavior in a single exposure region to the variation of exposure energy, interval of exposure locations and interval of exposure time under continuous exposure to investigate the distribution of wafer temperature. The simulation results indicate that widening the interval of exposure locations has a greater impact in improving the distribution of wafer temperature than extending the interval of exposure time between neighboring image fields. Besides, as long as the distance between the field center locations of two neighboring exposure regions exceeds the straight distance equals to three image fields wide, the interacting thermal effect during wafer exposure can be ignored. The analysis flow proposed in this paper can serve as a supporting reference tool for engineers in planning exposure paths.

Apparatus and method for measuring the thickness of a semiconductor wafer

DOEpatents

Ciszek, T.F.

1995-03-07

Apparatus for measuring thicknesses of semiconductor wafers is discussed, comprising: housing means for supporting a wafer in a light-tight environment; a light source mounted to the housing at one side of the wafer to emit light of a predetermined wavelength to normally impinge the wafer; a light detector supported at a predetermined distance from a side of the wafer opposite the side on which a light source impinges and adapted to receive light transmitted through the wafer; and means for measuring the transmitted light. 4 figs.

Wafer edge overlay control solution for N7 and beyond

NASA Astrophysics Data System (ADS)

van Haren, Richard; Calado, Victor; van Dijk, Leon; Hermans, Jan; Kumar, Kaushik; Yamashita, Fumiko

2018-03-01

Historically, the on-product overlay performance close to the wafer edge is lagging with respect to the inner part of the wafer. The reason for this is that wafer processing is less controlled close to the wafer edge as opposed to the rest of the wafer. It is generally accepted that Chemical Vapor Deposition (CVD) of stressed layers that cause wafer warp, wafer table contamination, Chemical Mechanical Polishing (CMP), and Reactive Ion Etch (RIE) may deteriorate the overlay performance and/or registration close to the wafer edge. For the N7 technology node and beyond, it is anticipated that the tight on-product overlay specification is required across the full wafer which includes the edge region. In this work, we highlight one contributor that may negatively impact the on-product overlay performance, namely the etch step. The focus will be mainly on the wafer edge region but the remaining part of the wafer is considered as well. Three use-cases are examined: multiple Litho-Etch steps (LEn), contact hole layer etch, and the copper dual damascene etch. We characterize the etch contribution by considering the overlay measurement after resist development inspect (ADI) and after etch inspect (AEI). We show that the Yieldstar diffraction based overlay (μDBO) measurements can be utilized to characterize the etch contribution to the overlay budget. The effects of target asymmetry as well as overlay shifts are considered and compared with SEM measurements. Based on the results above, we propose a control solution aiming to reduce or even eliminate the delta between ADI and AEI. By doing so, target/mark to device offsets due to etch might be avoided.

Automated reticle inspection data analysis for wafer fabs

NASA Astrophysics Data System (ADS)

Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

2008-10-01

To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity DefecTM data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

Automated reticle inspection data analysis for wafer fabs

NASA Astrophysics Data System (ADS)

Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

2009-04-01

To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity Defect(R) data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

Automated reticle inspection data analysis for wafer fabs

NASA Astrophysics Data System (ADS)

Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

2009-03-01

To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity DefectTM data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

A method for determining average damage depth of sawn crystalline silicon wafers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sopori, B.; Devayajanam, S.; Basnyat, P.

2016-04-01

The depth of surface damage (or simply, damage) in crystalline silicon wafers, caused by wire sawing of ingots, is determined by performing a series of minority carrier lifetime (MCLT) measurements. Samples are sequentially etched to remove thin layers from each surface and MCLT is measured after each etch step. The thickness-removed (..delta..t) at which the lifetime reaches a peak value corresponds to the damage depth. This technique also allows the damage to be quantified in terms of effective surface recombination velocity (Seff). To accomplish this, the MCLT data are converted into an Seff vs ..delta..t plot, which represents a quantitativemore » distribution of the degree of damage within the surface layer. We describe a wafer preparation procedure to attain reproducible etching and MCLT measurement results. We also describe important characteristics of an etchant used for controllably removing thin layers from the wafer surfaces. Some typical results showing changes in the MCLT vs ..delta..t plots for different cutting parameters are given.« less

Electrochemical method for defect delineation in silicon-on-insulator wafers

DOEpatents

Guilinger, Terry R.; Jones, Howland D. T.; Kelly, Michael J.; Medernach, John W.; Stevenson, Joel O.; Tsao, Sylvia S.

1991-01-01

An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.

Modelling deformation and fracture in confectionery wafers

NASA Astrophysics Data System (ADS)

Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon; Rasburn, John

2015-01-01

The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which was then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.

Process for the homoepitaxial growth of single-crystal silicon carbide films on silicon carbide wafers

NASA Technical Reports Server (NTRS)

Powell, J. Anthony (Inventor)

1993-01-01

The invention is a method for growing homoepitaxial films of SiC on low tilt angle vicinal (0001) SiC wafers. The invention proposes and teaches a new theoretical model for the homoepitaxial growth of SiC films on (0001) SiC substrates. The inventive method consists of preparing the growth surface of SiC wafers slightly off-axis (from less the 0.1 to 6 deg) from the (0001) plane, subjecting the growth surface to a suitable etch, and then growing the homoepitaxial film using conventional SiC growth techniques.

Fabrication of nano-scale Cu bond pads with seal design in 3D integration applications.

PubMed

Chen, K N; Tsang, C K; Wu, W W; Lee, S H; Lu, J Q

2011-04-01

A method to fabricate nano-scale Cu bond pads for improving bonding quality in 3D integration applications is reported. The effect of Cu bonding quality on inter-level via structural reliability for 3D integration applications is investigated. We developed a Cu nano-scale-height bond pad structure and fabrication process for improved bonding quality by recessing oxides using a combination of SiO2 CMP process and dilute HF wet etching. In addition, in order to achieve improved wafer-level bonding, we introduced a seal design concept that prevents corrosion and provides extra mechanical support. Demonstrations of these concepts and processes provide the feasibility of reliable nano-scale 3D integration applications.

Studying Chemical Reactions, One Bond at a Time, with Single Molecule AFM Techniques

NASA Astrophysics Data System (ADS)

Fernandez, Julio M.

2008-03-01

atomic force microscopy (AFM) techniques, as shown here, can probe dynamic rearrangements within an enzyme's active site which cannot be resolved with any other current structural biological technique. Furthermore, our work at the single bond level directly demonstrates that thiol/disulfide exchange in proteins is a force-dependent chemical reaction. Our findings suggest that mechanical force plays a role in disulfide reduction in vivo, a property which has never been explored by traditional biochemistry. 1.-Wiita, A.P., Ainavarapu, S.R.K., Huang, H.H. and Julio M. Fernandez (2006) Force-dependent chemical kinetics of disulfide bond reduction observed with single molecule techniques. Proc Natl Acad Sci U S A. 103(19):7222-7 2.-Wiita, A.P., Perez-Jimenez, R., Walther, K.A., Gräter, F. Berne, B.J., Holmgren, A., Sanchez-Ruiz, J.M., and Fernandez, J.M. (2007) Probing the chemistry of thioredoxin catalysis with force. Nature, 450:124-7.

Development of megasonic cleaning for silicon wafers

NASA Technical Reports Server (NTRS)

Mayer, A.

1980-01-01

A cleaning and drying system for processing at least 2500 three in. diameter wafers per hour was developed with a reduction in process cost. The system consists of an ammonia hydrogen peroxide bath in which both surfaces of 3/32 in. spaced, ion implanted wafers are cleaned in quartz carriers moved on a belt past two pairs of megasonic transducers. The wafers are dried in the novel room temperature, high velocity air dryer in the same carriers used for annealing. A new laser scanner was used effectively to monitor the cleaning ability on a sampling basis.

Modelling deformation and fracture in confectionery wafers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon

2015-01-22

The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which wasmore » then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.« less

Realization of MEMS-IC Vertical Integration Utilizing Smart Bumpless Bonding

NASA Astrophysics Data System (ADS)

Shiozaki, Masayoshi; Moriguchi, Makoto; Sasaki, Sho; Oba, Masatoshi

This paper reports fundamental technologies, properties, and new experimental results of SBB (Smart Bumpless Bonding) to realize MEMS-IC vertical integration. Although conventional bonding technologies have had difficulties integrating MEMS and its processing circuit because of their rough bonding surfaces, fragile structures, and thermal restriction, SBB technology realized the vertical integration without thermal treatment, any adhesive materials including bumps, and chemical mechanical polishing. The SBB technology bonds sealing parts for vacuum sealing and electrodes for electrical connection simultaneously as published in previous experimental study. The plasma CVD SiO2 is utilized to realize vacuum sealing as sealing material. And Au projection studs are formed on each electrode and connected electrically between two wafers by compressive plastic deformation and surface activation. In this paper, new experimental results including vacuum sealing properties, electrical improvement, IC bonding results on the described fundamental concept and properties are reported.

Bulk lifetime characterization of corona charged silicon wafers with high resistivity by means of microwave detected photoconductivity

NASA Astrophysics Data System (ADS)

Engst, C. R.; Rommel, M.; Bscheid, C.; Eisele, I.; Kutter, C.

2017-12-01

Minority carrier lifetime (lifetime) measurements are performed on corona-charged silicon wafers by means of Microwave Detected Photoconductivity (MDP). The corona charge is deposited on the front and back sides of oxidized wafers in order to adjust accumulation conditions. Once accumulation is established, interface recombination is suppressed and bulk lifetimes are obtained. Neither contacts nor non-CMOS compatible preparation techniques are required in order to achieve accumulation conditions, which makes the method ideally suited for inline characterization. The novel approach, termed ChargedMDP (CMDP), is used to investigate neutron transmutation doped (NTD) float zone silicon with resistivities ranging from 6.0 to 8.2 kΩ cm. The bulk properties of 150 mm NTD wafers are analyzed in detail by performing measurements of the carrier lifetime and the steady-state photoconductivity at various injection levels. The results are compared with MDP measurements of uncharged wafers as well as to the established charged microwave detected Photoconductance Decay (charge-PCD) method. Besides analyzing whole wafers, CMDP measurements are performed on oxide test-structures on a patterned wafer. Finally, the oxide properties are characterized by means of charge-PCD as well as capacitance-voltage measurements. With CMDP, average bulk lifetimes up to 33.1 ms are measured, whereby significant variations are observed among wafers, which are produced out of the same ingot but oxidized in different furnaces. The observed lifetime variations are assumed to be caused by contaminations, which are introduced during the oxidation process. The results obtained by CMDP were neither accessible by means of conventional MDP measurements of uncharged wafers nor with the established charge-PCD method.

Interfacial characterization of Al-Al thermocompression bonds

DOE Office of Scientific and Technical Information (OSTI.GOV)

Malik, N., E-mail: nishantmalik1987@gmail.com; SINTEF ICT, Department of Microsystems and Nanotechnology, P.O. Box 124 Blindern, N-0314 Oslo; Carvalho, P. A.

2016-05-28

Interfaces formed by Al-Al thermocompression bonding were studied by the transmission electron microscopy. Si wafer pairs having patterned bonding frames were bonded using Al films deposited on Si or SiO{sub 2} as intermediate bonding media. A bond force of 36 or 60 kN at bonding temperatures ranging from 400–550 °C was applied for a duration of 60 min. Differences in the bonded interfaces of 200 μm wide sealing frames were investigated. It was observed that the interface had voids for bonding with 36 kN at 400 °C for Al deposited both on Si and on SiO{sub 2}. However, the dicing yield was 33% for Al onmore » Si and 98% for Al on SiO{sub 2}, attesting for the higher quality of the latter bonds. Both a bond force of 60 kN applied at 400 °C and a bond force of 36 kN applied at 550 °C resulted in completely bonded frames with dicing yields of, respectively, 100% and 96%. A high density of long dislocations in the Al grains was observed for the 60 kN case, while the higher temperature resulted in grain boundary rotation away from the original Al-Al interface towards more stable configurations. Possible bonding mechanisms and reasons for the large difference in bonding quality of the Al films deposited on Si or SiO{sub 2} are discussed.« less

Guided ultrasonic wave beam skew in silicon wafers

NASA Astrophysics Data System (ADS)

Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

2018-04-01

In the photovoltaic industry, monocrystalline silicon wafers are employed for solar cells with high conversion efficiency. Micro-cracks induced by the cutting process in the thin wafers can lead to brittle wafer fracture. Guided ultrasonic waves would offer an efficient methodology for the in-process non-destructive testing of wafers to assess micro-crack density. The material anisotropy of the monocrystalline silicon leads to variations of the guided wave characteristics, depending on the propagation direction relative to the crystal orientation. Selective guided ultrasonic wave excitation was achieved using a contact piezoelectric transducer with custom-made wedges for the A0 and S0 Lamb wave modes and a transducer holder to achieve controlled contact pressure and orientation. The out-of-plane component of the guided wave propagation was measured using a non-contact laser interferometer. The phase slowness (velocity) of the two fundamental Lamb wave modes was measured experimentally for varying propagation directions relative to the crystal orientation and found to match theoretical predictions. Significant wave beam skew was observed experimentally, especially for the S0 mode, and investigated from 3D finite element simulations. Good agreement was found with the theoretical predictions based on nominal material properties of the silicon wafer. The important contribution of guided wave beam skewing effects for the non-destructive testing of silicon wafers was demonstrated.

Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene

DTIC Science & Technology

2014-08-01

Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene by Eugene Zakar, Wayne Churaman, Collin Becker, Bernard Rod, Luke...Laboratory Adelphi, MD 20783-1138 ARL-TR-7025 August 2014 Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene...Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER 6

Ultra-high heat flux cooling characteristics of cryogenic micro-solid nitrogen particles and its application to semiconductor wafer cleaning technology

NASA Astrophysics Data System (ADS)

Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya

2014-01-01

The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

PubMed

Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

2014-07-07

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Apparatus for use in examining the lattice of a semiconductor wafer by X-ray diffraction

NASA Technical Reports Server (NTRS)

Parker, D. L.; Porter, W. A. (Inventor)

1978-01-01

An improved apparatus for examining the crystal lattice of a semiconductor wafer utilizing X-ray diffraction techniques was presented. The apparatus is employed in a method which includes the step of recording the image of a wafer supported in a bent configuration conforming to a compound curve, produced through the use of a vacuum chuck provided for an X-ray camera. The entire surface thereof is illuminated simultaneously by a beam of incident X-rays which are projected from a distant point-source and satisfy conditions of the Bragg Law for all points on the surface of the water.

High-throughput automatic defect review for 300mm blank wafers with atomic force microscope

NASA Astrophysics Data System (ADS)

Zandiatashbar, Ardavan; Kim, Byong; Yoo, Young-kook; Lee, Keibock; Jo, Ahjin; Lee, Ju Suk; Cho, Sang-Joon; Park, Sang-il

2015-03-01

While feature size in lithography process continuously becomes smaller, defect sizes on blank wafers become more comparable to device sizes. Defects with nm-scale characteristic size could be misclassified by automated optical inspection (AOI) and require post-processing for proper classification. Atomic force microscope (AFM) is known to provide high lateral and the highest vertical resolution by mechanical probing among all techniques. However, its low throughput and tip life in addition to the laborious efforts for finding the defects have been the major limitations of this technique. In this paper we introduce automatic defect review (ADR) AFM as a post-inspection metrology tool for defect study and classification for 300 mm blank wafers and to overcome the limitations stated above. The ADR AFM provides high throughput, high resolution, and non-destructive means for obtaining 3D information for nm-scale defect review and classification.

A non-collinear mixing technique to measure the acoustic nonlinearity parameter of adhesive bond

NASA Astrophysics Data System (ADS)

Ju, Taeho; Achenbach, Jan. D.; Jacobs, Laurence J.; Qu, Jianmin

2018-04-01

In this work, we employed a wave mixing technique with an incident longitudinal wave and a shear wave to measure the Acoustic Nonlinearity Parameter (ANLP) of adhesive bonds. An adhesive transfer tape (F-9473PC) was used as an adhesive material: two aluminum plates are bonded together by the tape. To achieve a high signal to noise ratio, the optimal interaction angle and frequency ratio between the two incident waves were carefully selected so resonance occurs primarily in the adhesive layer, which somewhat suppressed the resonance in the aluminum plates. One of the most significant features of this method is that the measurements need only one-side access to the sample being measured. To demonstrate the effectiveness of the proposed technique, the adhesively bonded aluminum sample was placed in a temperature-controlled chamber for thermal aging. The ANLP of the thermally aged sample was compared with that of a freshly made adhesive sample. The results show that the ANLP increases with aging time and temperature.

Reticle variation influence on manufacturing line and wafer device performance

NASA Astrophysics Data System (ADS)

Nistler, John L.; Spurlock, Kyle

1994-01-01

Cost effective manufacturing of devices at 0.5, 0.35 and 0.25μm geometries will be highly dependent on a companys' ability to obtain an economic return on investment. The high capital investment in equipment and facilities, not to mention the related chemical and wafer costs, for producing 200mm silicon wafers requires aspects of wafer processing to be tightly controlled. Reduction in errors and enhanced yield management requires early correction or avoidance of reticle problems. It is becoming increasingly important to recognize and track all pertinent factors impacting both the technical and financial viability of a wafer manufacturing fabrication area. Reticle related effects on wafer manufacturing can be costly and affect the total quality perceived by the device customer.

High-wafer-yield, high-performance vertical cavity surface-emitting lasers

NASA Astrophysics Data System (ADS)

Li, Gabriel S.; Yuen, Wupen; Lim, Sui F.; Chang-Hasnain, Constance J.

1996-04-01

Vertical cavity surface emitting lasers (VCSELs) with very low threshold current and voltage of 340 (mu) A and 1.5 V is achieved. The molecular beam epitaxially grown wafers are grown with a highly accurate, low cost and versatile pre-growth calibration technique. One- hundred percent VCSEL wafer yield is obtained. Low threshold current is achieved with a native oxide confined structure with excellent current confinement. Single transverse mode with stable, predetermined polarization direction up to 18 times threshold is also achieved, due to stable index guiding provided by the structure. This is the highest value reported to data for VCSELs. We have established that p-contact annealing in these devices is crucial for low voltage operation, contrary to the general belief. Uniform doping in the mirrors also appears not to be inferior to complicated doping engineering. With these design rules, very low threshold voltage VCSELs are achieved with very simple growth and fabrication steps.

Silicon wafer-based tandem cells: The ultimate photovoltaic solution?

NASA Astrophysics Data System (ADS)

Green, Martin A.

2014-03-01

Recent large price reductions with wafer-based cells have increased the difficulty of dislodging silicon solar cell technology from its dominant market position. With market leaders expected to be manufacturing modules above 16% efficiency at 0.36/Watt by 2017, even the cost per unit area (60-70/m2) will be difficult for any thin-film photovoltaic technology to significantly undercut. This may make dislodgement likely only by appreciably higher energy conversion efficiency approaches. A silicon wafer-based cell able to capitalize on on-going cost reductions within the mainstream industry, but with an appreciably higher than present efficiency, might therefore provide the ultimate PV solution. With average selling prices of 156 mm quasi-square monocrystalline Si photovoltaic wafers recently approaching 1 (per wafer), wafers now provide clean, low cost templates for overgrowth of thin, wider bandgap high performance cells, nearly doubling silicon's ultimate efficiency potential. The range of possible Si-based tandem approaches is reviewed together with recent results and ultimate prospects.

Fabrication of spherical microlens array by combining lapping on silicon wafer and rapid surface molding

NASA Astrophysics Data System (ADS)

Liu, Xiaohua; Zhou, Tianfeng; Zhang, Lin; Zhou, Wenchen; Yu, Jianfeng; Lee, L. James; Yi, Allen Y.

2018-07-01

Silicon is a promising mold material for compression molding because of its properties of hardness and abrasion resistance. Silicon wafers with carbide-bonded graphene coating and micro-patterns were evaluated as molds for the fabrication of microlens arrays. This study presents an efficient but flexible manufacturing method for microlens arrays that combines a lapping method and a rapid molding procedure. Unlike conventional processes for microstructures on silicon wafers, such as diamond machining and photolithography, this research demonstrates a unique approach by employing precision steel balls and diamond slurries to create microlenses with accurate geometry. The feasibility of this method was demonstrated by the fabrication of several microlens arrays with different aperture sizes and pitches on silicon molds. The geometrical accuracy and surface roughness of the microlens arrays were measured using an optical profiler. The measurement results indicated good agreement with the optical profile of the design. The silicon molds were then used to copy the microstructures onto polymer substrates. The uniformity and quality of the samples molded through rapid surface molding were also assessed and statistically quantified. To further evaluate the optical functionality of the molded microlens arrays, the focal lengths of the microlens arrays were measured using a simple optical setup. The measurements showed that the microlens arrays molded in this research were compatible with conventional manufacturing methods. This research demonstrated an alternative low-cost and efficient method for microstructure fabrication on silicon wafers, together with the follow-up optical molding processes.

Suppression of interfacial voids formation during silane (SiH4)-based silicon oxide bonding with a thin silicon nitride capping layer

NASA Astrophysics Data System (ADS)

Lee, Kwang Hong; Bao, Shuyu; Wang, Yue; Fitzgerald, Eugene A.; Seng Tan, Chuan

2018-01-01

The material properties and bonding behavior of silane-based silicon oxide layers deposited by plasma-enhanced chemical vapor deposition were investigated. Fourier transform infrared spectroscopy was employed to determine the chemical composition of the silicon oxide films. The incorporation of hydroxyl (-OH) groups and moisture absorption demonstrates a strong correlation with the storage duration for both as-deposited and annealed silicon oxide films. It is observed that moisture absorption is prevalent in the silane-based silicon oxide film due to its porous nature. The incorporation of -OH groups and moisture absorption in the silicon oxide films increase with the storage time (even in clean-room environments) for both as-deposited and annealed silicon oxide films. Due to silanol condensation and silicon oxidation reactions that take place at the bonding interface and in the bulk silicon, hydrogen (a byproduct of these reactions) is released and diffused towards the bonding interface. The trapped hydrogen forms voids over time. Additionally, the absorbed moisture could evaporate during the post-bond annealing of the bonded wafer pair. As a consequence, defects, such as voids, form at the bonding interface. To address the problem, a thin silicon nitride capping film was deposited on the silicon oxide layer before bonding to serve as a diffusion barrier to prevent moisture absorption and incorporation of -OH groups from the ambient. This process results in defect-free bonded wafers.

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

NASA Astrophysics Data System (ADS)

Cunning, Benjamin V.; Ahmed, Mohsin; Mishra, Neeraj; Ranjbar Kermany, Atieh; Wood, Barry; Iacopi, Francesca

2014-08-01

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices.

Hybrid Integration of III-V Solar Microcells for High Efficiency Concentrated Photovoltaic Modules

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tauke-Pedretti, Anna; Cederberg, Jeffery; Cruz-Campa, Jose Luis

The design, fabrication and performance of InGaAs and InGaP/GaAs microcells are presented. These cells are integrated with a Si wafer providing a path for insertion in hybrid concentrated photovoltaic modules. Comparisons are made between bonded cells and cells fabricated on their native wafer. The bonded cells showed no evidence of degradation in spite of the integration process which involved significant processing including the removal of the III-V substrate. Results from a number of hybrid cell configurations were reported. These cells employed integration techniques including wafer level bonding of processed cells and solder bonding of the cells. Lastly, the cells themselvesmore » showed evidence of degradation in spite of the integration process, which involved significant processing including the removal of the III-V substrate.« less

Hybrid Integration of III-V Solar Microcells for High Efficiency Concentrated Photovoltaic Modules

DOE PAGES

Tauke-Pedretti, Anna; Cederberg, Jeffery; Cruz-Campa, Jose Luis; ...

2018-03-09

The design, fabrication and performance of InGaAs and InGaP/GaAs microcells are presented. These cells are integrated with a Si wafer providing a path for insertion in hybrid concentrated photovoltaic modules. Comparisons are made between bonded cells and cells fabricated on their native wafer. The bonded cells showed no evidence of degradation in spite of the integration process which involved significant processing including the removal of the III-V substrate. Results from a number of hybrid cell configurations were reported. These cells employed integration techniques including wafer level bonding of processed cells and solder bonding of the cells. Lastly, the cells themselvesmore » showed evidence of degradation in spite of the integration process, which involved significant processing including the removal of the III-V substrate.« less

The influence of different placement techniques on the microtensile bond strength of low-shrink silorane composite bonded to Class I cavities.

PubMed

Almeida e Silva, J S; Rolla, Juliana Nunes; Baratieri, Luiz Narciso; Monteiro, Sylvio

2011-01-01

The aim of this in vitro study was to evaluate the microtensile bond strength (µTBS) of a low-shrink silorane-based composite (Filtek Silorane) and a methacrylate-based composite (Filtek Z250) to the bottom dentin of a Class I cavity using different placement techniques. Twelve third molars were used. Standard, box-type Class I cavities (6.0 x 4.0 x 2.5 mm) were prepared at the occlusal crown center, with the pulpal floor ending approximately at the midcoronal dentin. The teeth were then randomly divided into four groups, according to each placement technique: ZI--Filtek Z250 placed incrementally; ZB--Filtek Z250 placed in bulk; SI--Filtek Silorane placed incrementally; and SB--Filtek Silorane placed in bulk. Each restored third molar was subjected to microtensile bond testing after 24 hours of storage in distilled water at 37 degrees C. After storage, each molar was longitudinally sectioned in both axes to obtain rectangular sticks with an approximate 0.49 mm2 cross-sectional area. Data were analyzed by one-way ANOVA followed by a Tukey post hoc test (P = 0.05). After debonding, the failure modes were analyzed using a stereomicroscope. The ZI group (72.6 MPa) showed the highest µTBS, followed by the ZB group (60.2 MPa), while the SI (34.4 MPa) and SB (42.6 MPa) groups demonstrated statistically significant lower bond strengths. The type of placement technique did not influence the µTBS of silorane-based composites to the bottom dentin of Class I cavities. The methacrylate-based composite showed superior performance, regardless of the placement technique.

Addressable Inverter Matrix Tests Integrated-Circuit Wafer

NASA Technical Reports Server (NTRS)

Buehler, Martin G.

1988-01-01

Addressing elements indirectly through shift register reduces number of test probes. With aid of new technique, complex test structure on silicon wafer tested with relatively small number of test probes. Conserves silicon area by reduction of area devoted to pads. Allows thorough evaluation of test structure characteristics and of manufacturing process parameters. Test structure consists of shift register and matrix of inverter/transmission-gate cells connected to two-by-ten array of probe pads. Entire pattern contained in square area having only 1.6-millimeter sides. Shift register is conventional static CMOS device using inverters and transmission gates in master/slave D flip-flop configuration.

Wafer level fabrication of single cell dispenser chips with integrated electrodes for particle detection

NASA Astrophysics Data System (ADS)

Schoendube, Jonas; Yusof, Azmi; Kalkandjiev, Kiril; Zengerle, Roland; Koltay, Peter

2015-02-01

This work presents the microfabrication and experimental evaluation of a dispenser chip, designed for isolation and printing of single cells by combining impedance sensing and drop-on-demand dispensing. The dispenser chip features 50  ×  55 µm (width × height) microchannels, a droplet generator and microelectrodes for impedance measurements. The chip is fabricated by sandwiching a dry film photopolymer (TMMF) between a silicon and a Pyrex wafer. TMMF has been used to define microfluidic channels, to serve as low temperature (75 °C) bonding adhesive and as etch mask during 300 µm deep HF etching of the Pyrex wafer. Due to the novel fabrication technology involving the dry film resist, it became possible to fabricate facing electrodes at the top and bottom of the channel and to apply electrical impedance sensing for particle detection with improved performance. The presented microchip is capable of dispensing liquid and detecting microparticles via impedance measurement. Single polystyrene particles of 10 µm size could be detected with a mean signal amplitude of 0.39  ±  0.13 V (n=439 ) at particle velocities of up to 9.6 mm s-1 inside the chip.

A novel patterning control strategy based on real-time fingerprint recognition and adaptive wafer level scanner optimization

NASA Astrophysics Data System (ADS)

Cekli, Hakki Ergun; Nije, Jelle; Ypma, Alexander; Bastani, Vahid; Sonntag, Dag; Niesing, Henk; Zhang, Linmiao; Ullah, Zakir; Subramony, Venky; Somasundaram, Ravin; Susanto, William; Matsunobu, Masazumi; Johnson, Jeff; Tabery, Cyrus; Lin, Chenxi; Zou, Yi

2018-03-01

In addition to lithography process and equipment induced variations, processes like etching, annealing, film deposition and planarization exhibit variations, each having their own intrinsic characteristics and leaving an effect, a `fingerprint', on the wafers. With ever tighter requirements for CD and overlay, controlling these process induced variations is both increasingly important and increasingly challenging in advanced integrated circuit (IC) manufacturing. For example, the on-product overlay (OPO) requirement for future nodes is approaching <3nm, requiring the allowable budget for process induced variance to become extremely small. Process variance control is seen as an bottleneck to further shrink which drives the need for more sophisticated process control strategies. In this context we developed a novel `computational process control strategy' which provides the capability of proactive control of each individual wafer with aim to maximize the yield, without introducing a significant impact on metrology requirements, cycle time or productivity. The complexity of the wafer process is approached by characterizing the full wafer stack building a fingerprint library containing key patterning performance parameters like Overlay, Focus, etc. Historical wafer metrology is decomposed into dominant fingerprints using Principal Component Analysis. By associating observed fingerprints with their origin e.g. process steps, tools and variables, we can give an inline assessment of the strength and origin of the fingerprints on every wafer. Once the fingerprint library is established, a wafer specific fingerprint correction recipes can be determined based on its processing history. Data science techniques are used in real-time to ensure that the library is adaptive. To realize this concept, ASML TWINSCAN scanners play a vital role with their on-board full wafer detection and exposure correction capabilities. High density metrology data is created by the scanner for each

Mask-to-wafer alignment system

DOEpatents

Sweatt, William C.; Tichenor, Daniel A.; Haney, Steven J.

2003-11-04

A modified beam splitter that has a hole pattern that is symmetric in one axis and anti-symmetric in the other can be employed in a mask-to-wafer alignment device. The device is particularly suited for rough alignment using visible light. The modified beam splitter transmits and reflects light from a source of electromagnetic radiation and it includes a substrate that has a first surface facing the source of electromagnetic radiation and second surface that is reflective of said electromagnetic radiation. The substrate defines a hole pattern about a central line of the substrate. In operation, an input beam from a camera is directed toward the modified beam splitter and the light from the camera that passes through the holes illuminates the reticle on the wafer. The light beam from the camera also projects an image of a corresponding reticle pattern that is formed on the mask surface of the that is positioned downstream from the camera. Alignment can be accomplished by detecting the radiation that is reflected from the second surface of the modified beam splitter since the reflected radiation contains both the image of the pattern from the mask and a corresponding pattern on the wafer.

Non-Contact Technique for Determining the Mechanical Stress in thin Films on Wafers by Profiler

NASA Astrophysics Data System (ADS)

Djuzhev, N. A.; Dedkova, A. A.; E Gusev, E.; Makhiboroda, M. A.; Glagolev, P. Y.

2017-04-01

This paper presents an algorithm for analysis of relief for the purpose of calculating mechanical stresses in a selected direction on the plate in the form of software package Matlab. The method allows for the measurement sample in the local area. It provides a visual representation of the data and allows to get stress distribution on wafer surface. Automated analysis process reduces the likelihood of errors researcher. Achieved time saving during processing results. In carrying out several measurements possible drawing card plate to predict yield crystals. According to this technique done in measurement of mechanical stresses of thermal silicon oxide film on a silicon substrate. Analysis of the results showed objectivity and reliability calculations. This method can be used for selecting the optimal parameters of the material deposition conditions. In software of device-technological simulation TCAD defined process time, temperature and oxidation of the operation of the sample environment for receiving the set value of the dielectric film thickness. Calculated thermal stresses are in the system silicon-silicon oxide. There is a good correlation between numerical simulations and analytical calculation. It is shown that the nature of occurrence of mechanical stress is not limited to the difference of thermal expansion coefficients of materials.

How Is the Enamel Affected by Different Orthodontic Bonding Agents and Polishing Techniques?

PubMed

Heravi, Farzin; Shafaee, Hooman; Abdollahi, Mojtaba; Rashed, Roozbeh

2015-03-01

The objective of this study was to assess the effect of new bonding techniques on enamel surface. Sixty upper central incisors were randomly divided into two equal groups. In the first group, metal brackets were bonded using TransbondXT and, in the second group, the same brackets were bonded with Maxcem Elite. The shear bond strength (SBS) of both agents to enamel was measured and the number and length of enamel cracks before bonding, after debonding and after polishing were compared. The number of visible cracks and the adhesive remnant index (ARI) scores in each group were also measured. There were significantly more enamel cracks in the Transbond XT group after debonding and polishing compared to the Maxcem Elite group. There was no significant difference in the length of enamel cracks between the two groups; but, in each group, a significant increase in the length of enamel cracks was noticeable after debonding. Polishing did not cause any statistically significant change in crack length. The SBS of Maxcem Elite was significantly lower than that of Transbond XT (95% confidence interval). Maxcem Elite offers clinically acceptable bond strength and can thus be used as a routine adhesive for orthodontic purposes since it is less likely to damage the enamel.

Emissivity properties of silicon wafers and their application to radiation thermometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Iuchi, T.; Seo, T.

We studied the spectral and directional emissivities of silicon wafers using an optical polarization technique. Based on the simulation and experimental results, we developed two different radiation thermometry methods for silicon wafers, the first based on a polarized emissivity-invariant condition, and the second based on the relationship between the ratio of the p-to s-polarized radiance and the polarized emissivity. These methods can be performed at temperatures above 600 °C and over a wide wavelength range (0.9∼5 μm), irrespective of dielectric film thickness and substrate resistivity due to the dopant concentrations. Temperature measurements were estimated to have expanded uncertainties (k=2) ofmore » less than 5 °C. A radiometer system with wavelengths above 4.5 μm was successfully developed because the system was not influenced by background noise caused by a high-intensity heating lamp.« less

Very large scale heterogeneous integration (VLSHI) and wafer-level vacuum packaging for infrared bolometer focal plane arrays

NASA Astrophysics Data System (ADS)

Forsberg, Fredrik; Roxhed, Niclas; Fischer, Andreas C.; Samel, Björn; Ericsson, Per; Hoivik, Nils; Lapadatu, Adriana; Bring, Martin; Kittilsland, Gjermund; Stemme, Göran; Niklaus, Frank

2013-09-01

Imaging in the long wavelength infrared (LWIR) range from 8 to 14 μm is an extremely useful tool for non-contact measurement and imaging of temperature in many industrial, automotive and security applications. However, the cost of the infrared (IR) imaging components has to be significantly reduced to make IR imaging a viable technology for many cost-sensitive applications. This paper demonstrates new and improved fabrication and packaging technologies for next-generation IR imaging detectors based on uncooled IR bolometer focal plane arrays. The proposed technologies include very large scale heterogeneous integration for combining high-performance, SiGe quantum-well bolometers with electronic integrated read-out circuits and CMOS compatible wafer-level vacuum packing. The fabrication and characterization of bolometers with a pitch of 25 μm × 25 μm that are arranged on read-out-wafers in arrays with 320 × 240 pixels are presented. The bolometers contain a multi-layer quantum well SiGe thermistor with a temperature coefficient of resistance of -3.0%/K. The proposed CMOS compatible wafer-level vacuum packaging technology uses Cu-Sn solid-liquid interdiffusion (SLID) bonding. The presented technologies are suitable for implementation in cost-efficient fabless business models with the potential to bring about the cost reduction needed to enable low-cost IR imaging products for industrial, security and automotive applications.

Single-shot optical recorder with sub-picosecond resolution and scalable record length on a semiconductor wafer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Muir, R.; Heebner, J.

In this study, we demonstrate a novel, single-shot recording technology for transient optical signals. A resolution of 0.4 ps over a record length of 54 ps was demonstrated. Here, a pump pulse crossing through a signal samples a diagonal “slice” of space–time, enabling a camera to record spatially the time content of the signal. Unlike related X (2)-based cross-correlation techniques, here the signal is sampled through optically pumped carriers that modify the refractive index of a silicon wafer. Surrounding the wafer with birefringent retarders enables two time-staggered, orthogonally polarized signal copies to probe the wafer. Recombining the copies at amore » final crossed polarizer destructively interferes with them, except during the brief stagger window, where a differential phase shift is incurred. This enables the integrating response of the rapidly excited but persistent carriers to be optically differentiated. Lastly, this sampling mechanism has several advantages that enable scaling to long record lengths, including making use of large, inexpensive semiconductor wafers, eliminating the need for phase matching, broad insensitivity to the spectral and angular properties of the pump, and overall hardware simplicity.« less

Single-shot optical recorder with sub-picosecond resolution and scalable record length on a semiconductor wafer

DOE PAGES

Muir, R.; Heebner, J.

2017-10-24

In this study, we demonstrate a novel, single-shot recording technology for transient optical signals. A resolution of 0.4 ps over a record length of 54 ps was demonstrated. Here, a pump pulse crossing through a signal samples a diagonal “slice” of space–time, enabling a camera to record spatially the time content of the signal. Unlike related X (2)-based cross-correlation techniques, here the signal is sampled through optically pumped carriers that modify the refractive index of a silicon wafer. Surrounding the wafer with birefringent retarders enables two time-staggered, orthogonally polarized signal copies to probe the wafer. Recombining the copies at amore » final crossed polarizer destructively interferes with them, except during the brief stagger window, where a differential phase shift is incurred. This enables the integrating response of the rapidly excited but persistent carriers to be optically differentiated. Lastly, this sampling mechanism has several advantages that enable scaling to long record lengths, including making use of large, inexpensive semiconductor wafers, eliminating the need for phase matching, broad insensitivity to the spectral and angular properties of the pump, and overall hardware simplicity.« less

Fabrication of WS2/GaN p-n Junction by Wafer-Scale WS2 Thin Film Transfer.

PubMed

Yu, Yang; Fong, Patrick W K; Wang, Shifeng; Surya, Charles

2016-11-29

High quality wafer-scale free-standing WS 2 grown by van der Waals rheotaxy (vdWR) using Ni as a texture promoting layer is reported. The microstructure of vdWR grown WS 2 was significantly modified from mixture of crystallites with their c-axes both parallel to (type I) and perpendicular to (type II) the substrate to large type II crystallites. Wafer-scale transfer of vdWR grown WS 2 onto different substrates by an etching-free technique was demonstrated for the first time that utilized the hydrophobic property of WS 2 and hydrophilic property of sapphire. Our results show that vdWR is a reliable technique to obtain type-II textured crystallites in WS 2 , which is the key factor for the wafer-scale etching-free transfer. The transferred films were found to be free of observable wrinkles, cracks, or polymer residues. High quality p-n junctions fabricated by room-temperature transfer of the p-type WS 2 onto an n-type GaN was demonstrated with a small leakage current density of 29.6 μA/cm 2 at -1 V which shows superior performances compared to the directly grown WS 2 /GaN heterojunctions.

Multifunctional medicated lyophilised wafer dressing for effective chronic wound healing.

PubMed

Pawar, Harshavardhan V; Boateng, Joshua S; Ayensu, Isaac; Tetteh, John

2014-06-01

Wafers combining weight ratios of Polyox with carrageenan (75/25) or sodium alginate (50/50) containing streptomycin and diclofenac were prepared to improve chronic wound healing. Gels were freeze-dried using a lyophilisation cycle incorporating an annealing step. Wafers were characterised for morphology, mechanical and in vitro functional (swelling, adhesion, drug release in the presence of simulated wound fluid) characteristics. Both blank (BLK) and drug-loaded (DL) wafers were soft, flexible, elegant in appearance and non-brittle in nature. Annealing helped to improve porous nature of wafers but was affected by the addition of drugs. Mechanical characterisation demonstrated that the wafers were strong enough to withstand normal stresses but also flexible to prevent damage to newly formed skin tissue. Differences in swelling, adhesion and drug release characteristics could be attributed to differences in pore size and sodium sulphate formed because of the salt forms of the two drugs. BLK wafers showed relatively higher swelling and adhesion than DL wafers with the latter showing controlled release of streptomycin and diclofenac. The optimised dressing has the potential to reduce bacterial infection and can also help to reduce swelling and pain associated with injury due to the anti-inflammatory action of diclofenac and help to achieve more rapid wound healing. © 2014 Wiley Periodicals, Inc. and the American Pharmacists Association.

P/N InP solar cells on Ge wafers

NASA Technical Reports Server (NTRS)

Wojtczuk, Steven; Vernon, Stanley; Burke, Edward A.

1994-01-01

Indium phosphide (InP) P-on-N one-sun solar cells were epitaxially grown using a metalorganic chemical vapor deposition process on germanium (Ge) wafers. The motivation for this work is to replace expensive InP wafers, which are fragile and must be thick and therefore heavy, with less expensive Ge wafers, which are stronger, allowing use of thinner, lighter weight wafers. An intermediate InxGs1-xP grading layer starting as In(0.49)Ga(0.51) at the GaAs-coated Ge wafer surface and ending as InP at the top of the grading layer (backside of the InP cell) was used to attempt to bend some of the threading dislocations generated by lattice-mismatch between the Ge wafer and InP cell so they would be harmlessly confined in this grading layer. The best InP/Ge cell was independently measured by NASA-Lewis with a one-sun 25 C AMO efficiently measured by NASA-Lewis with a one-circuit photocurrent 22.6 mA/sq cm. We believe this is the first published report of an InP cell grown on a Ge wafer. Why get excited over a 9 percent InP/Ge cell? If we look at the cell weight and efficiency, a 9 percent InP cell on an 8 mil Ge wafer has about the same cell power density, 118 W/kg (BOL), as the best InP cell ever made, a 19 percent InP cell on an 18 mil InP wafer, because of the lighter Ge wafer weight. As cell panel materials become lighter, the cell weight becomes more important, and the advantage of lightweight cells to the panel power density becomes more important. In addition, although InP/Ge cells have a low beginning-of-life (BOL) efficiency due to dislocation defects, the InP/Ge cells are very radiation hard (end-of-life power similar to beginning-of-life). We have irradiated an InP/Ge cell with alpha particles to an equivalent fluence of 1.6 x 10(exp 16) 1 MeV electrons/sq cm and the efficiency is still 83 percent of its BOL value. At this fluence level, the power output of these InP/Ge cells matches the GaAs/Ge cell data tabulated in the JPL handbook. Data are presented

Wafer level reliability testing: An idea whose time has come

NASA Technical Reports Server (NTRS)

Trapp, O. D.

1987-01-01

Wafer level reliability testing has been nurtured in the DARPA supported workshops, held each autumn since 1982. The seeds planted in 1982 have produced an active crop of very large scale integration manufacturers applying wafer level reliability test methods. Computer Aided Reliability (CAR) is a new seed being nurtured. Users are now being awakened by the huge economic value of the wafer reliability testing technology.

Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

PubMed

Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

2014-05-13

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

Ripple structure of crystalline layers in ion-beam-induced Si wafers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hazra, S.; Chini, T.K.; Sanyal, M.K.

Ion-beam-induced ripple formation in Si wafers was studied by two complementary surface sensitive techniques, namely atomic force microscopy (AFM) and depth-resolved x-ray grazing incidence diffraction (GID). The formation of ripple structure at high doses ({approx}7x10{sup 17} ions/cm{sup 2}), starting from initiation at low doses ({approx}1x10{sup 17} ions/cm{sup 2}) of ion beam, is evident from AFM, while that in the buried crystalline region below a partially crystalline top layer is evident from GID study. Such ripple structure of crystalline layers in a large area formed in the subsurface region of Si wafers is probed through a nondestructive technique. The GID techniquemore » reveals that these periodically modulated wavelike buried crystalline features become highly regular and strongly correlated as one increases the Ar ion-beam energy from 60 to 100 keV. The vertical density profile obtained from the analysis of a Vineyard profile shows that the density in the upper top part of ripples is decreased to about 15% of the crystalline density. The partially crystalline top layer at low dose transforms to a completely amorphous layer for high doses, and the top morphology was found to be conformal with the underlying crystalline ripple.« less

Wafer-Scale Integration of Graphene-based Electronic, Optoelectronic and Electroacoustic Devices

PubMed Central

Tian, He; Yang, Yi; Xie, Dan; Cui, Ya-Long; Mi, Wen-Tian; Zhang, Yuegang; Ren, Tian-Ling

2014-01-01

In virtue of its superior properties, the graphene-based device has enormous potential to be a supplement or an alternative to the conventional silicon-based device in varies applications. However, the functionality of the graphene devices is still limited due to the restriction of the high cost, the low efficiency and the low quality of the graphene growth and patterning techniques. We proposed a simple one-step laser scribing fabrication method to integrate wafer-scale high-performance graphene-based in-plane transistors, photodetectors, and loudspeakers. The in-plane graphene transistors have a large on/off ratio up to 5.34. And the graphene photodetector arrays were achieved with photo responsivity as high as 0.32 A/W. The graphene loudspeakers realize wide-band sound generation from 1 to 50 kHz. These results demonstrated that the laser scribed graphene could be used for wafer-scale integration of a variety of graphene-based electronic, optoelectronic and electroacoustic devices. PMID:24398542

Wafer-scale micro-optics fabrication

NASA Astrophysics Data System (ADS)

Voelkel, Reinhard

2012-07-01

Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

A Novel Technique for the Connection of Ceramic and Titanium Implant Components Using Glass Solder Bonding

PubMed Central

Mick, Enrico; Tinschert, Joachim; Mitrovic, Aurica; Bader, Rainer

2015-01-01

Both titanium and ceramic materials provide specific advantages in dental implant technology. However, some problems, like hypersensitivity reactions, corrosion and mechanical failure, have been reported. Therefore, the combining of both materials to take advantage of their pros, while eliminating their respective cons, would be desirable. Hence, we introduced a new technique to bond titanium and ceramic materials by means of a silica-based glass ceramic solder. Cylindrical compound samples (Ø10 mm × 56 mm) made of alumina toughened zirconia (ATZ), as well as titanium grade 5, were bonded by glass solder on their end faces. As a control, a two-component adhesive glue was utilized. The samples were investigated without further treatment, after 30 and 90 days of storage in distilled water at room temperature, and after aging. All samples were subjected to quasi-static four-point-bending tests. We found that the glass solder bonding provided significantly higher bending strength than adhesive glue bonding. In contrast to the glued samples, the bending strength of the soldered samples remained unaltered by the storage and aging treatments. Scanning electron microscopy (SEM) and energy-dispersive X-ray (EDX) analyses confirmed the presence of a stable solder-ceramic interface. Therefore, the glass solder technique represents a promising method for optimizing dental and orthopedic implant bondings. PMID:28793440

Test systems of the STS-XYTER2 ASIC: from wafer-level to in-system verification

NASA Astrophysics Data System (ADS)

Kasinski, Krzysztof; Zubrzycka, Weronika

2016-09-01

The STS/MUCH-XYTER2 ASIC is a full-size prototype chip for the Silicon Tracking System (STS) and Muon Chamber (MUCH) detectors in the new fixed-target experiment Compressed Baryonic Matter (CBM) at FAIR-center, Darmstadt, Germany. The STS assembly includes more than 14000 ASICs. The complicated, time-consuming, multi-step assembly process of the detector building blocks and tight quality assurance requirements impose several intermediate testing to be performed for verifying crucial assembly steps (e.g. custom microcable tab-bonding before wire-bonding to the PCB) and - if necessary - identifying channels or modules for rework. The chip supports the multi-level testing with different probing / contact methods (wafer probe-card, pogo-probes, in-system tests). A huge number of ASICs to be tested restricts the number and kind of tests possible to be performed within a reasonable time. The proposed architectures of test stand equipment and a brief summary of methodologies are presented in this paper.

Characterizing SOI Wafers By Use Of AOTF-PHI

NASA Technical Reports Server (NTRS)

Cheng, Li-Jen; Li, Guann-Pyng; Zang, Deyu

1995-01-01

Developmental nondestructive method of characterizing layers of silicon-on-insulator (SOI) wafer involves combination of polarimetric hyperspectral imaging by use of acousto-optical tunable filters (AOTF-PHI) and computational resources for extracting pertinent data on SOI wafers from polarimetric hyperspectral images. Offers high spectral resolution and both ease and rapidity of optical-wavelength tuning. Further efforts to implement all of processing of polarimetric spectral image data in special-purpose hardware for sake of procesing speed. Enables characterization of SOI wafers in real time for online monitoring and adjustment of production. Also accelerates application of AOTF-PHI to other applications in which need for high-resolution spectral imaging, both with and without polarimetry.

Silicon micromachined waveguides for millimeter and submillimeter wavelengths

NASA Technical Reports Server (NTRS)

Yap, Markus; Tai, Yu-Chong; Mcgrath, William R.; Walker, Christopher

1992-01-01

The majority of radio receivers, transmitters, and components operating at millimeter and submillimeter wavelengths utilize rectangular waveguides in some form. However, conventional machining techniques for waveguides operating above a few hundred GHz are complicated and costly. This paper reports on the development of silicon micromachining techniques to create silicon-based waveguide circuits which can operate at millimeter and submillimeter wavelengths. As a first step, rectangular WR-10 waveguide structures have been fabricated from (110) silicon wafers using micromachining techniques. The waveguide is split along the broad wall. Each half is formed by first etching a channel completely through a wafer. Potassium hydroxide is used to etch smooth mirror-like vertical walls and LPCVD silicon nitride is used as a masking layer. This wafer is then bonded to another flat wafer using a polyimide bonding technique and diced into the U-shaped half wavelengths. Finally, a gold layer is applied to the waveguide walls. Insertion loss measurements show losses comparable to those of standard metal waveguides. It is suggested that active devices and planar circuits can be integrated with the waveguides, solving the traditional mounting problems. Potential applications in terahertz instrumentation technology are further discussed.

VLED for Si wafer-level packaging

NASA Astrophysics Data System (ADS)

Chu, Chen-Fu; Chen, Chiming; Yen, Jui-Kang; Chen, Yung-Wei; Tsou, Chingfu; Chang, Chunming; Doan, Trung; Tran, Chuong Anh

2012-03-01

In this paper, we introduced the advantages of Vertical Light emitting diode (VLED) on copper alloy with Si-wafer level packaging technologies. The silicon-based packaging substrate starts with a <100> dou-ble-side polished p-type silicon wafer, then anisotropic wet etching technology is done to construct the re-flector depression and micro through-holes on the silicon substrate. The operating voltage, at a typical cur-rent of 350 milli-ampere (mA), is 3.2V. The operation voltage is less than 3.7V under higher current driving conditions of 1A. The VLED chip on Si package has excellent heat dissipation and can be operated at high currents up to 1A without efficiency degradation. The typical spatial radiation pattern emits a uniform light lambertian distribution from -65° to 65° which can be easily fit for secondary optics. The correlated color temperature (CCT) has only 5% variation for daylight and less than 2% variation for warm white, when the junction temperature is increased from 25°C to 110°C, suggesting a stable CCT during operation for general lighting application. Coupled with aspheric lens and micro lens array in a wafer level process, it has almost the same light distribution intensity for special secondary optics lighting applications. In addition, the ul-tra-violet (UV) VLED, featuring a silicon substrate and hard glass cover, manufactured by wafer level pack-aging emits high power UV wavelengths appropriate for curing, currency, document verification, tanning, medical, and sterilization applications.

Fluxless flip-chip bonding using a lead-free solder bumping technique

NASA Astrophysics Data System (ADS)

Hansen, K.; Kousar, S.; Pitzl, D.; Arab, S.

2017-09-01

With the LHC exceeding the nominal instantaneous luminosity, the current barrel pixel detector (BPIX) of the CMS experiment at CERN will reach its performance limits and undergo significant radiation damage. In order to improve detector performance in high luminosity conditions, the entire BPIX is replaced with an upgraded version containing an additional detection layer. Half of the modules comprising this additional layer are produced at DESY using fluxless and lead-free bumping and bonding techniques. Sequential solder-jetting technique is utilized to wet 40-μm SAC305 solder spheres on the silicon-sensor pads with electroless Ni, Pd and immersion Au (ENEPIG) under-bump metallization (UBM). The bumped sensors are flip-chip assembled with readout chips (ROCs) and then reflowed using a flux-less bonding facility. The challenges for jetting low solder volume have been analyzed and will be presented in this paper. An average speed of 3.4 balls per second is obtained to jet about 67 thousand solder balls on a single chip. On average, 7 modules have been produced per week. The bump-bond quality is evaluated in terms of electrical and mechanical properties. The peak-bump resistance is about 17.5 mΩ. The cross-section study revealed different types of intermetallic compounds (IMC) as a result of interfacial reactions between UBM and solder material. The effect of crystalline phases on the mechanical properties of the joint is discussed. The mean shear strength per bump after the final module reflow is about 16 cN. The results and sources of yield loss of module production are reported. The achieved yield is 95%.

A Wafer Transfer Technology for MEMS Adaptive Optics

NASA Technical Reports Server (NTRS)

Yang, Eui-Hyeok; Wiberg, Dean V.

2001-01-01

Adaptive optics systems require the combination of several advanced technologies such as precision optics, wavefront sensors, deformable mirrors, and lasers with high-speed control systems. The deformable mirror with a continuous membrane is a key component of these systems. This paper describes a new technique for transferring an entire wafer-level silicon membrane from one substrate to another. This technology is developed for the fabrication of a compact deformable mirror with a continuous facet. A 1 (mu)m thick silicon membrane, 100 mm in diameter, has been successfully transferred without using adhesives or polymers (i.e. wax, epoxy, or photoresist). Smaller or larger diameter membranes can also be transferred using this technique. The fabricated actuator membrane with an electrode gap of 1.5 (mu)m shows a vertical deflection of 0.37 (mu)m at 55 V.

Critical dimension control using ultrashort laser for improving wafer critical dimension uniformity

NASA Astrophysics Data System (ADS)

Avizemer, Dan; Sharoni, Ofir; Oshemkov, Sergey; Cohen, Avi; Dayan, Asaf; Khurana, Ranjan; Kewley, Dave

2015-07-01

Requirements for control of critical dimension (CD) become more demanding as the integrated circuit (IC) feature size specifications become tighter and tighter. Critical dimension control, also known as CDC, is a well-known laser-based process in the IC industry that has proven to be robust, repeatable, and efficient in adjusting wafer CD uniformity (CDU) [Proc. SPIE 6152, 615225 (2006)]. The process involves locally and selectively attenuating the deep ultraviolet light which goes through the photomask to the wafer. The input data for the CDC process in the wafer fab is typically taken from wafer CDU data, which is measured by metrology tools such as wafer-critical dimension-scanning electron microscopy (CD-SEM), wafer optical scatterometry, or wafer level CD (WLCD). The CD correction process uses the CDU data in order to create an attenuation correction contour, which is later applied by the in-situ ultrashort laser system of the CDC to locally change the transmission of the photomask. The ultrashort pulsed laser system creates small, partially scattered, Shade-In-Elements (also known as pixels) by focusing the laser beam inside the quartz bulk of the photomask. This results in the formation of a localized, intravolume, quartz modified area, which has a different refractive index than the quartz bulk itself. The CDC process flow for improving wafer CDU in a wafer fab with detailed explanations of the shading elements formation inside the quartz by the ultrashort pulsed laser is reviewed.

Effect of Instrumentation Techniques, Irrigant Solutions and Artificial accelerated Aging on Fiberglass Post Bond Strength to Intraradicular Dentin.

PubMed

Santana, Fernanda Ribeiro; Soares, Carlos José; Silva, Júlio Almeida; Alencar, Ana Helena Gonçalves; Renovato, Sara Rodrigues; Lopes, Lawrence Gonzaga; Estrela, Carlos

2015-07-01

To evaluate the effect of instrumentation techniques, irrigant solutions and specimen aging on fiberglass posts bond strength to intraradicular dentine. A total of 120 bovine teeth were prepared and randomized into control and experimental groups resulting from three study factors (instrumentation techniques, irrigant solutions, specimen aging). Posts were cemented with RelyX U100. Samples were submitted to push-out test and failure mode was evaluated under a confocal microscope. In specimens submitted to water artificial aging, nickel-titanium rotary instruments group presented higher bond strength values in apical third irrigated with NaOCl or chlorhexi-dine. Irrigation with NaOCl resulted in higher bond strength than ozonated water. Artificial aging resulted in significant bond strength increase. Adhesive cement-dentin failure was prevalent in all the groups. Root canal preparation with NiTi instruments associated with NaOCl irrigation and ethylenediaminetetra acetic acid (EDTA) increased bond strength of fiberglass posts cemented with self-adhesive resin cement to intraradicular dentine. Water artificial aging significantly increased post-Clinical significance: The understanding of factors that may influence the optimal bond between post-cement and cement-dentin are essential to the success of endodontically treated tooth restoration.

Intrinsic Gettering in Nitrogen-Doped and Hydrogen-Annealed Czochralski-Grown Silicon Wafers

NASA Astrophysics Data System (ADS)

Goto, Hiroyuki; Pan, Lian-Sheng; Tanaka, Masafumi; Kashima, Kazuhiko

2001-06-01

The properties of nitrogen-doped and hydrogen-annealed Czochralski-grown silicon (NHA-CZ-Si) wafers were investigated in this study. The quality of the subsurface was investigated by monitoring the generation lifetime of minority carriers, as measured by the capacitance-time measurements of a metal oxide silicon capacitor (MOS C-t). The intrinsic gettering (IG) ability was investigated by determining the nickel concentration on the surface and in the subsurface as measured by graphite furnace atomic absorption spectrometry (GFAAS) after the wafer was deliberately contaminated with nickel. From the results obtained, the generation lifetimes of these NHA-CZ-Si wafers were determined to be almost the same as, or a little longer than those of epitaxial wafers, and the IG ability was proportional to the total volume of oxygen precipitates [i.e., bulk micro defects (BMDs)], which was influenced by the oxygen and nitrogen concentrations in the wafers. Therefore, it is suggested that the subsurface of the NHA-CZ-Si wafers is of good quality and the IG capacity is controllable by the nitrogen and oxygen concentrations in the wafers.

Making Porous Luminescent Regions In Silicon Wafers

NASA Technical Reports Server (NTRS)

Fathauer, Robert W.; Jones, Eric W.

1994-01-01

Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

Strategy optimization for mask rule check in wafer fab

NASA Astrophysics Data System (ADS)

Yang, Chuen Huei; Lin, Shaina; Lin, Roger; Wang, Alice; Lee, Rachel; Deng, Erwin

2015-07-01

Photolithography process is getting more and more sophisticated for wafer production following Moore's law. Therefore, for wafer fab, consolidated and close cooperation with mask house is a key to achieve silicon wafer success. However, generally speaking, it is not easy to preserve such partnership because many engineering efforts and frequent communication are indispensable. The inattentive connection is obvious in mask rule check (MRC). Mask houses will do their own MRC at job deck stage, but the checking is only for identification of mask process limitation including writing, etching, inspection, metrology, etc. No further checking in terms of wafer process concerned mask data errors will be implemented after data files of whole mask are composed in mask house. There are still many potential data errors even post-OPC verification has been done for main circuits. What mentioned here are the kinds of errors which will only occur as main circuits combined with frame and dummy patterns to form whole reticle. Therefore, strategy optimization is on-going in UMC to evaluate MRC especially for wafer fab concerned errors. The prerequisite is that no impact on mask delivery cycle time even adding this extra checking. A full-mask checking based on job deck in gds or oasis format is necessary in order to secure acceptable run time. Form of the summarized error report generated by this checking is also crucial because user friendly interface will shorten engineers' judgment time to release mask for writing. This paper will survey the key factors of MRC in wafer fab.

Wafer plane inspection for advanced reticle defects

NASA Astrophysics Data System (ADS)

Nagpal, Rajesh; Ghadiali, Firoz; Kim, Jun; Huang, Tracy; Pang, Song

2008-05-01

Readiness of new mask defect inspection technology is one of the key enablers for insertion & transition of the next generation technology from development into production. High volume production in mask shops and wafer fabs demands a reticle inspection system with superior sensitivity complemented by a low false defect rate to ensure fast turnaround of reticle repair and defect disposition (W. Chou et al 2007). Wafer Plane Inspection (WPI) is a novel approach to mask defect inspection, complementing the high resolution inspection capabilities of the TeraScanHR defect inspection system. WPI is accomplished by using the high resolution mask images to construct a physical mask model (D. Pettibone et al 1999). This mask model is then used to create the mask image in the wafer aerial plane. A threshold model is applied to enhance the inspectability of printing defects. WPI can eliminate the mask restrictions imposed on OPC solutions by inspection tool limitations in the past. Historically, minimum image restrictions were required to avoid nuisance inspection stops and/or subsequent loss of sensitivity to defects. WPI has the potential to eliminate these limitations by moving the mask defect inspections to the wafer plane. This paper outlines Wafer Plane Inspection technology, and explores the application of this technology to advanced reticle inspection. A total of twelve representative critical layers were inspected using WPI die-to-die mode. The results from scanning these advanced reticles have shown that applying WPI with a pixel size of 90nm (WPI P90) captures all the defects of interest (DOI) with low false defect detection rates. In validating CD predictions, the delta CDs from WPI are compared against Aerial Imaging Measurement System (AIMS), where a good correlation is established between WPI and AIMSTM.

Fabrication of WS2/GaN p-n Junction by Wafer-Scale WS2 Thin Film Transfer

PubMed Central

Yu, Yang; Fong, Patrick W. K.; Wang, Shifeng; Surya, Charles

2016-01-01

High quality wafer-scale free-standing WS2 grown by van der Waals rheotaxy (vdWR) using Ni as a texture promoting layer is reported. The microstructure of vdWR grown WS2 was significantly modified from mixture of crystallites with their c-axes both parallel to (type I) and perpendicular to (type II) the substrate to large type II crystallites. Wafer-scale transfer of vdWR grown WS2 onto different substrates by an etching-free technique was demonstrated for the first time that utilized the hydrophobic property of WS2 and hydrophilic property of sapphire. Our results show that vdWR is a reliable technique to obtain type-II textured crystallites in WS2, which is the key factor for the wafer-scale etching-free transfer. The transferred films were found to be free of observable wrinkles, cracks, or polymer residues. High quality p-n junctions fabricated by room-temperature transfer of the p-type WS2 onto an n-type GaN was demonstrated with a small leakage current density of 29.6 μA/cm2 at −1 V which shows superior performances compared to the directly grown WS2/GaN heterojunctions. PMID:27897210

The uses of Man-Made diamond in wafering applications

NASA Technical Reports Server (NTRS)

Fallon, D. B.

1982-01-01

The continuing, rapid growth of the semiconductor industry requires the involvement of several specialized industries in the development of special products geared toward the unique requirements of this new industry. A specialized manufactured diamond to meet various material removal needs was discussed. The area of silicon wafer slicing has presented yet anothr challenge and it is met most effectively. The history, operation, and performance of Man-Made diamond and particularly as applied to silicon wafer slicing is discussed. Product development is underway to come up with a diamond specifically for sawing silicon wafers on an electroplated blade.

Effect of Rapid Thermal Processing on Light-Induced Degradation of Carrier Lifetime in Czochralski p-Type Silicon Bare Wafers

NASA Astrophysics Data System (ADS)

Kouhlane, Y.; Bouhafs, D.; Khelifati, N.; Belhousse, S.; Menari, H.; Guenda, A.; Khelfane, A.

2016-11-01

The electrical properties of Czochralski silicon (Cz-Si) p-type boron-doped bare wafers have been investigated after rapid thermal processing (RTP) with different peak temperatures. Treated wafers were exposed to light for various illumination times, and the effective carrier lifetime ( τ eff) measured using the quasi-steady-state photoconductance (QSSPC) technique. τ eff values dropped after prolonged illumination exposure due to light-induced degradation (LID) related to electrical activation of boron-oxygen (BO) complexes, except in the sample treated with peak temperature of 785°C, for which the τ eff degradation was less pronounced. Also, a reduction was observed when using the 830°C peak temperature, an effect that was enhanced by alteration of the wafer morphology (roughness). Furthermore, the electrical resistivity presented good stability under light exposure as a function of temperature compared with reference wafers. Additionally, the optical absorption edge shifted to higher wavelength, leading to increased free-carrier absorption by treated wafers. Moreover, a theoretical model is used to understand the lifetime degradation and regeneration behavior as a function of illumination time. We conclude that RTP plays an important role in carrier lifetime regeneration for Cz-Si wafers via modification of optoelectronic and structural properties. The balance between an optimized RTP cycle and the rest of the solar cell elaboration process can overcome the negative effect of LID and contribute to achievement of higher solar cell efficiency and module performance.

Developing quartz wafer mold manufacturing process for patterned media

NASA Astrophysics Data System (ADS)

Chiba, Tsuyoshi; Fukuda, Masaharu; Ishikawa, Mikio; Itoh, Kimio; Kurihara, Masaaki; Hoga, Morihisa

2009-04-01

Recently, patterned media have gained attention as a possible candidate for use in the next generation of hard disk drives (HDD). Feature sizes on media are predicted to be 20-25 nm half pitch (hp) for discrete-track media in 2010. One method of fabricating such a fine pattern is by using a nanoimprint. The imprint mold for the patterned media is created from a 150-millimeter, rounded, quartz wafer. The purpose of the process introduced here was to construct a quartz wafer mold and to fabricate line and space (LS) patterns at 24 nmhp for DTM. Additionally, we attempted to achieve a dense hole (HOLE) pattern at 12.5 nmhp for BPM for use in 2012. The manufacturing process of molds for patterned media is almost the same as that for semiconductors, with the exception of the dry-etching process. A 150-millimeter quartz wafer was etched on a special tray made from carving a 6025 substrate, by using the photo-mask tool. We also optimized the quartz etching conditions. As a result, 24 nmhp LS and HOLE patterns were manufactured on the quartz wafer. In conclusion, the quartz wafer mold manufacturing process was established. It is suggested that the etching condition should be further optimized to achieve a higher resolution of HOLE patterns.

The Imaging Properties of a Silicon Wafer X-Ray Telescope

NASA Technical Reports Server (NTRS)

Joy, M. K.; Kolodziejczak, J. J.; Weisskopf, M. C.; Fair, S.; Ramsey, B. D.

1994-01-01

Silicon wafers have excellent optical properties --- low microroughness and good medium-scale flatness --- which Make them suitable candidates for inexpensive flat-plate grazing-incidence x-ray mirrors. On short spatial scales (less than 3 mm) the surface quality of silicon wafers rivals that expected of the Advanced X-Ray Astrophysics Facility (AXAF) high-resolution optics. On larger spatial scales, however, performance may be degraded by the departure from flatness of the wafer and by distortions induced by the mounting scheme. In order to investigate such effects, we designed and constructed a prototype silicon-wafer x-ray telescope. The device was then tested in both visible light and x rays. The telescope module consists of 94 150-mm-diameter wafers, densely packed into the first stage of a Kirkpatrick-Baez configuration. X-ray tests at three energies (4.5, 6.4, and 8.0 keV) showed an energy-independent line spread function with full width at half maximum (FWHM) of 150 arcseconds, dominated by deviations from large-scale flatness.

A two-step sealing-and-reinforcement SU8 bonding paradigm for the fabrication of shallow microchannels

NASA Astrophysics Data System (ADS)

Mehboudi, Aryan; Yeom, Junghoon

2018-03-01

Adhesive bonding is a key technique to create microfluidic devices when two separate substrates are used to form microchannels. Among many adhesives explored in microchannel fabrication, SU8 has been widely used as an adhesive layer for sealing the microchannel sidewalls. The majority of the available SU8-based bonding methods, however, suffer from the difficulties associated with sealing of two important types of the microchannel architecture: (1) shallow microchannels with small patterns on a large area, and (2) microchannels with ultra-low aspect ratios (e.g. 6 mm in width and 2~μ m in height). In this paper, a new bonding paradigm based upon the low-temperature and low-pressure SU8 bonding, consisting of two steps of sealing using a thin-SU8-coated PET film and bonding reinforcement using a SU8-coated glass slide, is proposed to resolve the aforementioned difficulties. Since it does not need complicated instruments such as a wafer bonding machine and a lamination device, the developed bonding paradigm is convenient and economical. We successfully demonstrate the compatibility of the proposed bonding paradigm with the two microchannel fabrication approaches based on the glass wet etching and the SU8 photo-lithography, where small microchannels with the innermost surfaces fully made of SU8 are obtained. A theoretical model is employed to better investigate the flow characteristics and the structural behavior of the microchannel including the PET film deformation, strain and von Mises stress distributions, bonding strength, etc. Moreover, we demonstrate the fabrication of the multi-height deep-shallow microchannel sidewalls and their sealing using the SU8-coated PET film. Finally, as a proof-of-concept device, a microfluidic filter consisting of the double-height deep-shallow microchannel is fabricated for separation of 3 µm and 10 µm particles.

Applying a nonlinear, pitch-catch, ultrasonic technique for the detection of kissing bonds in friction stir welds.

PubMed

Delrue, Steven; Tabatabaeipour, Morteza; Hettler, Jan; Van Den Abeele, Koen

2016-05-01

Friction stir welding (FSW) is a promising technology for the joining of aluminum alloys and other metallic admixtures that are hard to weld by conventional fusion welding. Although FSW generally provides better fatigue properties than traditional fusion welding methods, fatigue properties are still significantly lower than for the base material. Apart from voids, kissing bonds for instance, in the form of closed cracks propagating along the interface of the stirred and heat affected zone, are inherent features of the weld and can be considered as one of the main causes of a reduced fatigue life of FSW in comparison to the base material. The main problem with kissing bond defects in FSW, is that they currently are very difficult to detect using existing NDT methods. Besides, in most cases, the defects are not directly accessible from the exposed surface. Therefore, new techniques capable of detecting small kissing bond flaws need to be introduced. In the present paper, a novel and practical approach is introduced based on a nonlinear, single-sided, ultrasonic technique. The proposed inspection technique uses two single element transducers, with the first transducer transmitting an ultrasonic signal that focuses the ultrasonic waves at the bottom side of the sample where cracks are most likely to occur. The large amount of energy at the focus activates the kissing bond, resulting in the generation of nonlinear features in the wave propagation. These nonlinear features are then captured by the second transducer operating in pitch-catch mode, and are analyzed, using pulse inversion, to reveal the presence of a defect. The performance of the proposed nonlinear, pitch-catch technique, is first illustrated using a numerical study of an aluminum sample containing simple, vertically oriented, incipient cracks. Later, the proposed technique is also applied experimentally on a real-life friction stir welded butt joint containing a kissing bond flaw. Copyright © 2016

Studying post-etching silicon crystal defects on 300mm wafer by automatic defect review AFM

NASA Astrophysics Data System (ADS)

Zandiatashbar, Ardavan; Taylor, Patrick A.; Kim, Byong; Yoo, Young-kook; Lee, Keibock; Jo, Ahjin; Lee, Ju Suk; Cho, Sang-Joon; Park, Sang-il

2016-03-01

Single crystal silicon wafers are the fundamental elements of semiconductor manufacturing industry. The wafers produced by Czochralski (CZ) process are very high quality single crystalline materials with known defects that are formed during the crystal growth or modified by further processing. While defects can be unfavorable for yield for some manufactured electrical devices, a group of defects like oxide precipitates can have both positive and negative impacts on the final device. The spatial distribution of these defects may be found by scattering techniques. However, due to limitations of scattering (i.e. light wavelength), many crystal defects are either poorly classified or not detected. Therefore a high throughput and accurate characterization of their shape and dimension is essential for reviewing the defects and proper classification. While scanning electron microscopy (SEM) can provide high resolution twodimensional images, atomic force microscopy (AFM) is essential for obtaining three-dimensional information of the defects of interest (DOI) as it is known to provide the highest vertical resolution among all techniques [1]. However AFM's low throughput, limited tip life, and laborious efforts for locating the DOI have been the limitations of this technique for defect review for 300 mm wafers. To address these limitations of AFM, automatic defect review AFM has been introduced recently [2], and is utilized in this work for studying DOI on 300 mm silicon wafer. In this work, we carefully etched a 300 mm silicon wafer with a gaseous acid in a reducing atmosphere at a temperature and for a sufficient duration to decorate and grow the crystal defects to a size capable of being detected as light scattering defects [3]. The etched defects form a shallow structure and their distribution and relative size are inspected by laser light scattering (LLS). However, several groups of defects couldn't be properly sized by the LLS due to the very shallow depth and low

Homogenization of CZ Si wafers by Tabula Rasa annealing

NASA Astrophysics Data System (ADS)

Meduňa, M.; Caha, O.; Kuběna, J.; Kuběna, A.; Buršík, J.

2009-12-01

The precipitation of interstitial oxygen in Czochralski grown silicon has been investigated by infrared absorption spectroscopy, chemical etching, transmission electron microscopy and X-ray diffraction after application of homogenization annealing process called Tabula Rasa. The influence of this homogenization step consisting in short time annealing at high temperature has been observed for various temperatures and times. The experimental results involving the interstitial oxygen decay in Si wafers and absorption spectra of SiOx precipitates during precipitation annealing at 1000∘ C were compared with other techniques for various Tabula Rasa temperatures. The differences in oxygen precipitation, precipitate morphology and evolution of point defects in samples with and without Tabula Rasa applied is evident from all used experimental techniques. The results qualitatively correlate with prediction of homogenization annealing process based on classical nucleation theory.

Evaluation of an alternative technique to optimize direct bonding of orthodontic brackets to temporary crowns.

PubMed

Dias, Francilena Maria Campos Santos; Pinzan-Vercelino, Célia Regina Maio; Tavares, Rudys Rodolfo de Jesus; Gurgel, Júlio de Araújo; Bramante, Fausto Silva; Fialho, Melissa Nogueira Proença

2015-01-01

To compare shear bond strength of different direct bonding techniques of orthodontic brackets to acrylic resin surfaces. The sample comprised 64 discs of chemically activated acrylic resin (CAAR) randomly divided into four groups: discs in group 1 were bonded by means of light-cured composite resin (conventional adhesive); discs in group 2 had surfaces roughened with a diamond bur followed by conventional direct bonding by means of light-cured composite resin; discs in group 3 were bonded by means of CAAR (alternative adhesive); and discs in group 4 had surfaces roughened with a diamond bur followed by direct bonding by means of CAAR. Shear bond strength values were determined after 24 hours by means of a universal testing machine at a speed of 0.5 mm/min, and compared by analysis of variance followed by post-hoc Tukey test. Adhesive remnant index (ARI) was measured and compared among groups by means of Kruskal-Wallis and Dunn tests. Groups 3 and 4 had significantly greater shear bond strength values in comparison to groups 1 and 2. Groups 3 and 4 yielded similar results. Group 2 showed better results when compared to group 1. In ARI analyses, groups 1 and 2 predominantly exhibited a score equal to 0, whereas groups 3 and 4 predominantly exhibited a score equal to 3. Direct bonding of brackets to acrylic resin surfaces using CAAR yielded better results than light-cured composite resin. Surface preparation with diamond bur only increased shear bond strength in group 2.

Bond-slip detection of concrete-encased composite structure using electro-mechanical impedance technique

NASA Astrophysics Data System (ADS)

Liang, Yabin; Li, Dongsheng; Parvasi, Seyed Mohammad; Kong, Qingzhao; Lim, Ing; Song, Gangbing

2016-09-01

Concrete-encased composite structure is a type of structure that takes the advantages of both steel and concrete materials, showing improved strength, ductility, and fire resistance compared to traditional reinforced concrete structures. The interface between concrete and steel profiles governs the interaction between these two materials under loading, however, debonding damage between these two materials may lead to severe degradation of the load transferring capacity which will affect the structural performance significantly. In this paper, the electro-mechanical impedance (EMI) technique using piezoceramic transducers was experimentally investigated to detect the bond-slip occurrence of the concrete-encased composite structure. The root-mean-square deviation is used to quantify the variations of the impedance signatures due to the presence of the bond-slip damage. In order to verify the validity of the proposed method, finite element model analysis was performed to simulate the behavior of concrete-steel debonding based on a 3D finite element concrete-steel bond model. The computed impedance signatures from the numerical results are compared with the results obtained from the experimental study, and both the numerical and experimental studies verify the proposed EMI method to detect bond slip of a concrete-encased composite structure.

Nonlinear resonance ultrasonic vibrations in Czochralski-silicon wafers

NASA Astrophysics Data System (ADS)

Ostapenko, S.; Tarasov, I.

2000-04-01

A resonance effect of generation of subharmonic acoustic vibrations is observed in as-grown, oxidized, and epitaxial silicon wafers. Ultrasonic vibrations were generated into a standard 200 mm Czochralski-silicon (Cz-Si) wafer using a circular ultrasound transducer with major frequency of the radial vibrations at about 26 kHz. By tuning frequency (f) of the transducer within a resonance curve, we observed a generation of intense f/2 subharmonic acoustic mode assigned as a "whistle." The whistle mode has a threshold amplitude behavior and narrow frequency band. The whistle is attributed to a nonlinear acoustic vibration of a silicon plate. It is demonstrated that characteristics of the whistle mode are sensitive to internal stress and can be used for quality control and in-line diagnostics of oxidized and epitaxial Cz-Si wafers.

Comparing the shear bond strength of direct and indirect composite inlays in relation to different surface conditioning and curing techniques

PubMed Central

Zorba, Yahya Orcun; Ilday, Nurcan Ozakar; Bayındır, Yusuf Ziya; Demirbuga, Sezer

2013-01-01

Objective: The aim of this study was to test the null hypothesis that different surface conditioning (etch and rinse and self-etch) and curing techniques (light cure/dual cure) had no effect on the shear bond strength of direct and indirect composite inlays. Materials and Methods: A total of 112 extracted human molar teeth were horizontally sectioned and randomly divided into two groups according to restoration technique (direct and indirect restorations). Each group was further subdivided into seven subgroups (n = 8) according to bonding agent (etch and rinse adhesives Scotchbond multi-purpose plus, All-Bond 3, Adper Single Bond and Prime Bond NT; and self-etch adhesives Clearfil Liner Bond, Futurabond DC and G bond). Indirect composites were cemented to dentin surfaces using dual-curing luting cement. Shear bond strength of specimens was tested using a Universal Testing Machine. Two samples from each subgroup were evaluated under Scanning electron microscopy to see the failing modes. Data was analyzed using independent sample t-tests and Tukey's tests. Results: Surface conditioning and curing of bonding agents were all found to have significant effects on shear bond strength (P < 0.05) of both direct and indirect composite inlays. With direct restoration, etch and rinse systems and dual-cured bonding agents yielded higher bond strengths than indirect restoration, self-etch systems and light-cured bonding agents. Conclusions: The results of the present study indicated that direct restoration to be a more reliable method than indirect restoration. Although etch and rinse bonding systems showed higher shear bond strength to dentin than self-etch systems, both systems can be safely used for the adhesion of direct as well as indirect restorations. PMID:24932118

Comparing the shear bond strength of direct and indirect composite inlays in relation to different surface conditioning and curing techniques.

PubMed

Zorba, Yahya Orcun; Ilday, Nurcan Ozakar; Bayındır, Yusuf Ziya; Demirbuga, Sezer

2013-10-01

The aim of this study was to test the null hypothesis that different surface conditioning (etch and rinse and self-etch) and curing techniques (light cure/dual cure) had no effect on the shear bond strength of direct and indirect composite inlays. A total of 112 extracted human molar teeth were horizontally sectioned and randomly divided into two groups according to restoration technique (direct and indirect restorations). Each group was further subdivided into seven subgroups (n = 8) according to bonding agent (etch and rinse adhesives Scotchbond multi-purpose plus, All-Bond 3, Adper Single Bond and Prime Bond NT; and self-etch adhesives Clearfil Liner Bond, Futurabond DC and G bond). Indirect composites were cemented to dentin surfaces using dual-curing luting cement. Shear bond strength of specimens was tested using a Universal Testing Machine. Two samples from each subgroup were evaluated under Scanning electron microscopy to see the failing modes. Data was analyzed using independent sample t-tests and Tukey's tests. Surface conditioning and curing of bonding agents were all found to have significant effects on shear bond strength (P < 0.05) of both direct and indirect composite inlays. With direct restoration, etch and rinse systems and dual-cured bonding agents yielded higher bond strengths than indirect restoration, self-etch systems and light-cured bonding agents. The results of the present study indicated that direct restoration to be a more reliable method than indirect restoration. Although etch and rinse bonding systems showed higher shear bond strength to dentin than self-etch systems, both systems can be safely used for the adhesion of direct as well as indirect restorations.

Maskless wafer-level microfabrication of optical penetrating neural arrays out of soda-lime glass: Utah Optrode Array.

PubMed

Boutte, Ronald W; Blair, Steve

2016-12-01

Borrowing from the wafer-level fabrication techniques of the Utah Electrode Array, an optical array capable of delivering light for neural optogenetic studies is presented in this paper: the Utah Optrode Array. Utah Optrode Arrays are micromachined out of sheet soda-lime-silica glass using standard backend processes of the semiconductor and microelectronics packaging industries such as precision diamond grinding and wet etching. 9 × 9 arrays with 1100μ m × 100μ m optrodes and a 500μ m back-plane are repeatably reproduced on 2i n wafers 169 arrays at a time. This paper describes the steps and some of the common errors of optrode fabrication.

A new fabrication technique for back-to-back varactor diodes

NASA Technical Reports Server (NTRS)

Smith, R. Peter; Choudhury, Debabani; Martin, Suzanne; Frerking, Margaret A.; Liu, John K.; Grunthaner, Frank A.

1992-01-01

A new varactor diode process has been developed in which much of the processing is done from the back of an extremely thin semiconductor wafer laminated to a low-dielectric substrate. Back-to-back BNN diodes were fabricated with this technique; excellent DC and low-frequency capacitance measurements were obtained. Advantages of the new technique relative to other techniques include greatly reduced frontside wafer damage from exposure to process chemicals, improved capability to integrate devices (e.g. for antenna patterns, transmission lines, or wafer-scale grids), and higher line yield. BNN diodes fabricated with this technique exhibit approximately the expected capacitance-voltage characteristics while showing leakage currents under 10 mA at voltages three times that needed to deplete the varactor. This leakage is many orders of magnitude better than comparable Schottky diodes.

Wafer chamber having a gas curtain for extreme-UV lithography

DOEpatents

Kanouff, Michael P.; Ray-Chaudhuri, Avijit K.

2001-01-01

An EUVL device includes a wafer chamber that is separated from the upstream optics by a barrier having an aperture that is permeable to the inert gas. Maintaining an inert gas curtain in the proximity of a wafer positioned in a chamber of an extreme ultraviolet lithography device can effectively prevent contaminants from reaching the optics in an extreme ultraviolet photolithography device even though solid window filters are not employed between the source of reflected radiation, e.g., the camera, and the wafer. The inert gas removes the contaminants by entrainment.

Mechanical Properties of Photovoltaic Silicon in Relation to Wafer Breakage

NASA Astrophysics Data System (ADS)

Kulshreshtha, Prashant Kumar

the surface/edge micro-cracks (i.e. sources of crack initiation). The low load (<10mN) nanoindentations using Hysitron Triboindenter RTM have been applied to estimate the zone of crack-propagation related plastic deformation and amorphization around the radial or the lateral cracks. The gradual reduction in hardness due to local stress field and phase change around the crack has been established using electron back scattered diffraction (EBSD), atomic force microscopy (AFM) and Raman spectroscopy, respectively, at nano- and micro-scale. The load (P) vs. displacement (h) curves depict characteristic phase transformation events (eg. elbow or pop-out) depending on the sign of residual stress in the silicon lattice. The formation of Si-XII/III phases (elastic phases) in large volumes during indentation of compressed Si lattice have been discussed as an option to eliminate the edge micro-cracks formed during wafer sawing by ductile flow. The stress gradient at an interface, which can be a grain-boundary (GB), twin or a interface between silicon and precipitate, has been evaluated for crack path modification. An direct-silicon-bonded (DSB) based ideal [110]/[100] interface has been examined to study the effect of crystallographic orientation variation across a planar silicon 2D boundary. Using constant source diffusion/annealing process, Fe and Cu impurities have been incorporated in model [110]/[100]GB to provide equivalence to a real decorated multi-crystalline grain boundary. We found that Fe precipitates harden the undecorated GB structure, whereas Cu precipitates introduce dislocation-induced plasticity to soften it. Aluminum Schottky diodes have been evaporated on the DSB samples to sensitively detect the instantaneous current response from the phase-transformed Si under nanoindenter tip. The impact of metallic impurity and their precipitates on characteristic phase transformations (i.e. pop-in or pop-out) demonstrate that scattered distribution of large Cu

Ultra-Gradient Test Cavity for Testing SRF Wafer Samples

DOE Office of Scientific and Technical Information (OSTI.GOV)

N.J. Pogue, P.M. McIntyre, A.I. Sattarov, C. Reece

2010-11-01

A 1.3 GHz test cavity has been designed to test wafer samples of superconducting materials. This mushroom shaped cavity, operating in TE01 mode, creates a unique distribution of surface fields. The surface magnetic field on the sample wafer is 3.75 times greater than elsewhere on the Niobium cavity surface. This field design is made possible through dielectrically loading the cavity by locating a hemisphere of ultra-pure sapphire just above the sample wafer. The sapphire pulls the fields away from the walls so the maximum field the Nb surface sees is 25% of the surface field on the sample. In thismore » manner, it should be possible to drive the sample wafer well beyond the BCS limit for Niobium while still maintaining a respectable Q. The sapphire's purity must be tested for its loss tangent and dielectric constant to finalize the design of the mushroom test cavity. A sapphire loaded CEBAF cavity has been constructed and tested. The results on the dielectric constant and loss tangent will be presented« less

In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

PubMed Central

Lim, Stephen CB; Paech, Michael J; Sunderland, Bruce; Liu, Yandi

2013-01-01

Background The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. PMID:23596347

Evaluation of metal-ceramic bond characteristics of three dental Co-Cr alloys prepared with different fabrication techniques.

PubMed

Wang, Hongmei; Feng, Qing; Li, Ning; Xu, Sheng

2016-12-01

Limited information is available regarding the metal-ceramic bond strength of dental Co-Cr alloys fabricated by casting (CAST), computer numerical control (CNC) milling, and selective laser melting (SLM). The purpose of this in vitro study was to evaluate the metal-ceramic bond characteristics of 3 dental Co-Cr alloys fabricated by casting, computer numerical control milling, and selective laser melting techniques using the 3-point bend test (International Organization for Standardization [ISO] standard 9693). Forty-five specimens (25×3×0.5 mm) made of dental Co-Cr alloys were prepared by CAST, CNC milling, and SLM techniques. The morphology of the oxidation surface of metal specimens was evaluated by scanning electron microscopy (SEM). After porcelain application, the interfacial characterization was evaluated by SEM equipped with energy-dispersive spectrometry (EDS) analysis, and the metal-ceramic bond strength was assessed with the 3-point bend test. Failure type and elemental composition on the debonding interface were assessed by SEM/EDS. The bond strength was statistically analyzed by 1-way ANOVA and Tukey honest significant difference test (α=.05). The oxidation surfaces of the CAST, CNC, and SLM groups were different. They were porous in the CAST group but compact and irregular in the CNC and SLM groups. The metal-ceramic interfaces of the SLM and CNC groups showed excellent combination compared with those of the CAST group. The bond strength was 37.7 ±6.5 MPa for CAST, 43.3 ±9.2 MPa for CNC, and 46.8 ±5.1 MPa for the SLM group. Statistically significant differences were found among the 3 groups tested (P=.028). The debonding surfaces of all specimens exhibited cohesive failure mode. The oxidation surface morphologies and thicknesses of dental Co-Cr alloys are dependent on the different fabrication techniques used. The bond strength of all 3 groups exceed the minimum acceptable value of 25 MPa recommended by ISO 9693; hence, dental Co-Cr alloy

Robust wafer identification recognition based on asterisk-shape filter and high-low score comparison method.

PubMed

Hsu, Wei-Chih; Yu, Tsan-Ying; Chen, Kuan-Liang

2009-12-10

Wafer identifications (wafer ID) can be used to identify wafers from each other so that wafer processing can be traced easily. Wafer ID recognition is one of the problems of optical character recognition. The process to recognize wafer IDs is similar to that used in recognizing car license-plate characters. However, due to some unique characteristics, such as the irregular space between two characters and the unsuccessive strokes of wafer ID, it will not get a good result to recognize wafer ID by directly utilizing the approaches used in car license-plate character recognition. Wafer ID scratches are engraved by a laser scribe almost along the following four fixed directions: horizontal, vertical, plus 45 degrees , and minus 45 degrees orientations. The closer to the center line of a wafer ID scratch, the higher the gray level will be. These and other characteristics increase the difficulty to recognize the wafer ID. In this paper a wafer ID recognition scheme based on an asterisk-shape filter and a high-low score comparison method is proposed to cope with the serious influence of uneven luminance and make recognition more efficiently. Our proposed approach consists of some processing stages. Especially in the final recognition stage, a template-matching method combined with stroke analysis is used as a recognizing scheme. This is because wafer IDs are composed of Semiconductor Equipment and Materials International (SEMI) standard Arabic numbers and English alphabets, and thus the template ID images are easy to obtain. Furthermore, compared with the approach that requires prior training, such as a support vector machine, which often needs a large amount of training image samples, no prior training is required for our approach. The testing results show that our proposed scheme can efficiently and correctly segment out and recognize the wafer ID with high performance.

Automated and inexpensive method to manufacture solid- state nanopores and micropores in robust silicon wafers

NASA Astrophysics Data System (ADS)

Vega, M.; Granell, P.; Lasorsa, C.; Lerner, B.; Perez, M.

2016-02-01

In this work an easy, reproducible and inexpensive technique for the production of solid state nanopores and micropores using silicon wafer substrate is proposed. The technique is based on control of pore formation, by neutralization etchant (KOH) with a strong acid (HCl). Thus, a local neutralization is produced around the nanopore, which stops the silicon etching. The etching process was performed with 7M KOH at 80°C, where 1.23µm/min etching speed was obtained, similar to those published in literature. The control of the pore formation with the braking acid method was done using 12M HCl and different extreme conditions: i) at 25°C, ii) at 80°C and iii) at 80°C applying an electric potential. In these studies, it was found that nanopores and micropores can be obtained automatically and at a low cost. Additionally, the process was optimized to obtain clean silicon wafers after the pore fabrication process. This method opens the possibility for an efficient scale-up from laboratory production.

Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.

PubMed

Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

2015-12-16

In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems

PubMed Central

Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

2015-01-01

In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction. PMID:26694407

Effect of an internal coating technique on tensile bond strengths of resin cements to zirconia ceramics.

PubMed

Kitayama, Shuzo; Nikaido, Toru; Maruoka, Rena; Zhu, Lei; Ikeda, Masaomi; Watanabe, Akihiko; Foxton, Richard M; Miura, Hiroyuki; Tagami, Junji

2009-07-01

This study was conducted to enhance the tensile bond strengths of resin cements to zirconia ceramics. Fifty-six zirconia ceramic specimens (Cercon Base) and twenty-eight silica-based ceramic specimens (GN-1, GN-1 Ceramic Block) were air-abraded using alumina. Thereafter, the zirconia ceramic specimens were divided into two subgroups of 28 each according to the surface pretreatment; no pretreatment (Zr); and the internal coating technique (INT). For INT, the surface of zirconia was coated by fusing silica-based ceramics (Cercon Ceram Kiss). Ceramic surfaces were conditioned with/without a silane coupling agent followed by bonding with one of two resin cements; Panavia F 2.0 (PF) and Superbond C&B (SB). After 24 hours storage in water, the tensile bond strengths were tested (n=7). For both PF and SB, silanization significantly improved the bond strength to GN-1 and INT (p<0.05). The INT coating followed by silanizaton demonstrated enhancement of bonding to zirconia ceramics.

A three-mask process for fabricating vacuum-sealed capacitive micromachined ultrasonic transducers using anodic bonding.

PubMed

Yamaner, F Yalçın; Zhang, Xiao; Oralkan, Ömer

2015-05-01

This paper introduces a simplified fabrication method for vacuum-sealed capacitive micromachined ultrasonic transducer (CMUT) arrays using anodic bonding. Anodic bonding provides the established advantages of wafer-bondingbased CMUT fabrication processes, including process simplicity, control over plate thickness and properties, high fill factor, and ability to implement large vibrating cells. In addition to these, compared with fusion bonding, anodic bonding can be performed at lower processing temperatures, i.e., 350°C as opposed to 1100°C; surface roughness requirement for anodic bonding is more than 10 times more relaxed, i.e., 5-nm rootmean- square (RMS) roughness as opposed to 0.5 nm for fusion bonding; anodic bonding can be performed on smaller contact area and hence improves the fill factor for CMUTs. Although anodic bonding has been previously used for CMUT fabrication, a CMUT with a vacuum cavity could not have been achieved, mainly because gas is trapped inside the cavities during anodic bonding. In the approach we present in this paper, the vacuum cavity is achieved by opening a channel in the plate structure to evacuate the trapped gas and subsequently sealing this channel by conformal silicon nitride deposition in the vacuum environment. The plate structure of the fabricated CMUT consists of the single-crystal silicon device layer of a silicon-on-insulator wafer and a thin silicon nitride insulation layer. The presented fabrication approach employs only three photolithographic steps and combines the advantages of anodic bonding with the advantages of a patterned metal bottom electrode on an insulating substrate, specifically low parasitic series resistance and low parasitic shunt capacitance. In this paper, the developed fabrication scheme is described in detail, including process recipes. The fabricated transducers are characterized using electrical input impedance measurements in air and hydrophone measurements in immersion. A representative

Control wafer bow of InGaP on 200 mm Si by strain engineering

NASA Astrophysics Data System (ADS)

Wang, Bing; Bao, Shuyu; Made, Riko I.; Lee, Kwang Hong; Wang, Cong; Eng Kian Lee, Kenneth; Fitzgerald, Eugene A.; Michel, Jurgen

2017-12-01

When epitaxially growing III-V compound semiconductors on Si substrates the mismatch of coefficients of thermal expansion (CTEs) between III-V and Si causes stress and wafer bow. The wafer bow is deleterious for some wafer-scale processing especially when the wafer size is large. Strain engineering was applied in the epitaxy of InGaP films on 200 mm silicon wafers having high quality germanium buffers. By applying compressive strain in the InGaP films to compensate the tensile strain induced by CTE mismatch, wafer bow was decreased from about 100 μm to less than 50 μm. X-ray diffraction studies show a clear trend between the decrease of wafer bow and the compensation of CTE mismatch induced tensile strain in the InGaP layers. In addition, the anisotropic strain relaxation in InGaP films resulted in anisotropic wafer bow along two perpendicular (110) directions. Etch pit density and plane-view transmission electron microscopy characterizations indicate that threading dislocation densities did not change significantly due to the lattice-mismatch applied in the InGaP films. This study shows that strain engineering is an effective method to control wafer bow when growing III-V semiconductors on large size Si substrates.

Fabrication of Silicon Backshorts with Improved Out-of-Band Rejection for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Metal-ceramic bond strength between a feldspathic porcelain and a Co-Cr alloy fabricated with Direct Metal Laser Sintering technique.

PubMed

Dimitriadis, Konstantinos; Spyropoulos, Konstantinos; Papadopoulos, Triantafillos

2018-02-01

The aim of the present study was to record the metal-ceramic bond strength of a feldspathic dental porcelain and a Co-Cr alloy, using the Direct Metal Laser Sintering technique (DMLS) for the fabrication of metal substrates. Ten metal substrates were fabricated with powder of a dental Co-Cr alloy using DMLS technique (test group) in dimensions according to ISO 9693. Another ten substrates were fabricated with a casing dental Co-Cr alloy using classic casting technique (control group) for comparison. Another three substrates were fabricated using each technique to record the Modulus of Elasticity ( E ) of the used alloys. All substrates were examined to record external and internal porosity. Feldspathic porcelain was applied on the substrates. Specimens were tested using the three-point bending test. The failure mode was determined using optical and scanning electron microscopy. The statistical analysis was performed using t-test. Substrates prepared using DMLS technique did not show internal porosity as compared to those produced using the casting technique. The E of control and test group was 222 ± 5.13 GPa and 227 ± 3 GPa, respectively. The bond strength was 51.87 ± 7.50 MPa for test group and 54.60 ± 6.20 MPa for control group. No statistically significant differences between the two groups were recorded. The mode of failure was mainly cohesive for all specimens. Specimens produced by the DMLS technique cover the lowest acceptable metal-ceramic bond strength of 25 MPa specified in ISO 9693 and present satisfactory bond strength for clinical use.

An Ex-vivo Shear and tensile bond strengths of orthodontic molar tubes bonded using different techniques.

PubMed

Abu-Alhaija, Elham; Jaradat, Mohammad; Alwahadni, Ahed

2017-03-01

Molar bonding procedures need continuous improvement to be widely accepted clinically and eventually replace molar bands. The purpose of this study was to determine the effects of enamel micro-abrasion and silane coating of the base of molar tubes on shear and tensile bond strengths of orthodontic molar tubes. A total of 200 third molars were randomly allocated into five groups of 40 teeth as follows: group 1: molar tubes bonded to etched teeth (37% phosphoric acid gel; control group); group 2: molar tubes bonded to etched teeth (37% phosphoric acid) with the addition of silane to the base of molar tubes; group 3: molar tubes bonded to teeth pre-treated with 18% hydrochloric acid and pumice (micro-abrasion); group 4: molar tubes bonded to teeth pre-treated with microabrasion with the addition of silane to the base of molar tubes; group 5: molar tubes bonded to teeth pre-treated with microabrasion before conventional acid etching combined with the addition of silane to the base of molar tubes. The bond strength testing was performed using a computer control electromechanical universal testing machine. The highest mean shear and tensile bond strengths were recorded in group 5 (13.81±2.54MPa and 13.97±2.29 MPa, respectively). Micro-abrasion alone (group 3) and the combination of enamel micro-abrasion and the addition of silane (group 4) produced bond strength values comparable to the control. Enamel surface pre-treatment (micro abrasion) before conventional acid etching combined with the addition of silane to the base of the molar tube produced the highest bond strengths among all tested groups. Key words: Molar, shear strength, tensile strength, orthodontic appliances.

Grism manufacturing by low temperature mineral bonding

NASA Astrophysics Data System (ADS)

Kalkowski, G.; Grabowski, K.; Harnisch, G.; Flügel-Paul, T.; Zeitner, U.; Risse, S.

2017-09-01

By uniting a grating with a prism to a GRISM compound, the optical characteristics of diffractive and refractive elements can be favorably combined to achieve outstanding spectral resolution features. Ruling the grating structure into the prism surface is common for wavelengths around 1 μm and beyond, while adhesive bonding of two separate parts is generally used for shorter wavelengths and finer structures. We report on a manufacturing approach for joining the corresponding glass elements by the technology of hydrophilic direct bonding. This allows to manufacture the individual parts separately and subsequently combine them quasimonolithically by generating stiff and durable bonds of vanishing thickness, high strength and excellent transmission. With this approach for GRISM bonding, standard direct-write- or mask-lithography equipment may be used for the fabrication of the grating structure and the drawbacks of adhesive bonding (thermal mismatch, creep, aging) are avoided. The technology of hydrophilic bonding originates from "classical" optical contacting [1], but has been much improved and perfected during the last decades in the context of 3-dimensinal stacking Si-wafers for microelectronic applications [2]. It provides joins through covalent bonds of the Si-O-Si type at the nanometer scale, i.e. the elementary bond type in many minerals and glasses. The mineral nature of the bond is perfectly adapted to most optical materials and the extremely thin bonding layers generated with this technology are well suited for transmission optics. Creeping under mechanical load, as commonly observed with adhesive bonding, is not an issue. With respect to diffusion bonding, which operates at rather high temperatures close to the glass transition or crystal melting point, hydrophilic bonding is a low temperature process that needs only moderate heating. This facilitates provision of handling and alignment means for the individual parts during the set-up stages and greatly

Alternatives for joining Si wafers to strain-accommodating Cu for high-power electronics

NASA Astrophysics Data System (ADS)

Faust, Nicholas; Messler, Robert W.; Khatri, Subhash

2001-10-01

Differences in the coefficients of thermal expansion (CTE) between silicon wafers and underlying copper electrodes have led to the use of purely mechanical dry pressure contacts for primary electrical and thermal connections in high-power solid-state electronic devices. These contacts are limited by their ability to dissipate I2R heat from within the device and by their thermal fatigue life. To increase heat dissipation and effectively deal with the CTE mismatch, metallurgical bonding of the silicon to a specially-structured, strain-accommodating copper electrode has been proposed. This study was intended to seek alternative methods for and demonstrate the feasibility of bonding Si to structured Cu in high-power solid-state devices. Three different but fundamentally related fluxless approaches identified and preliminarily assessed were: (1) conventional Sn-Ag eutectic solder; (2) a new, commercially-available active solder based on the Sn-Ag eutectic; and (3) solid-liquid interdiffusion bonding using the Au-In system. Metallurgical joints were made with varying quality levels (according to nonde-structive ultrasonic C-scan mapping, SEM, and electron microprobe) using each approach. Mechanical shear testing resulted in cohesive failure within the Si or the filler alloys. The best approach, in which eutectic Sn-Ag solder in pre-alloyed foil form was employed on Si and Cu substrates metallized (from the substrate outward) with Ti, Ni and Au, exhibited joint thermal conduction 74% better than dry pressure contacts.

Analysis of factors influencing the bond strength in roll bonding processes

NASA Astrophysics Data System (ADS)

Khaledi, Kavan; Wulfinghoff, Stephan; Reese, Stefanie

2018-05-01

Cold Roll Bonding (CRB) is recognized as an industrial technique in which the metal sheets are joined together in order to produce laminate metal composites. In this technique, a metallurgical bond resulting from severe plastic deformation is formed between the rolled metallic layers. The main objective of this paper is to analyse different factors which may affect the bond formation in rolling processes. To achieve this goal, first, an interface model is employed which describes both the bonding and debonding. In this model, the bond strength evolution between the metallic layers is calculated based on the film theory of bonding. On the other hand, the debonding process is modelled by means of a bilinear cohesive zone model. In the numerical section, different scenarios are taken into account to model the roll bonding process of metal sheets. The numerical simulation includes the modelling of joining during the roll bonding process followed by debonding in a Double Cantilever Beam (DCB) peeling test. In all simulations, the metallic layers are regarded as elastoplastic materials subjected to large plastic deformations. Finally, the effects of some important factors on the bond formation are numerically investigated.

An Ex-vivo Shear and tensile bond strengths of orthodontic molar tubes bonded using different techniques

PubMed Central

Alwahadni, Ahed

2017-01-01

Background Molar bonding procedures need continuous improvement to be widely accepted clinically and eventually replace molar bands. Material and Methods The purpose of this study was to determine the effects of enamel micro-abrasion and silane coating of the base of molar tubes on shear and tensile bond strengths of orthodontic molar tubes. A total of 200 third molars were randomly allocated into five groups of 40 teeth as follows: group 1: molar tubes bonded to etched teeth (37% phosphoric acid gel; control group); group 2: molar tubes bonded to etched teeth (37% phosphoric acid) with the addition of silane to the base of molar tubes; group 3: molar tubes bonded to teeth pre-treated with 18% hydrochloric acid and pumice (micro-abrasion); group 4: molar tubes bonded to teeth pre-treated with microabrasion with the addition of silane to the base of molar tubes; group 5: molar tubes bonded to teeth pre-treated with microabrasion before conventional acid etching combined with the addition of silane to the base of molar tubes. The bond strength testing was performed using a computer control electromechanical universal testing machine. Results The highest mean shear and tensile bond strengths were recorded in group 5 (13.81±2.54MPa and 13.97±2.29 MPa, respectively). Micro-abrasion alone (group 3) and the combination of enamel micro-abrasion and the addition of silane (group 4) produced bond strength values comparable to the control. Conclusions Enamel surface pre-treatment (micro abrasion) before conventional acid etching combined with the addition of silane to the base of the molar tube produced the highest bond strengths among all tested groups. Key words:Molar, shear strength, tensile strength, orthodontic appliances. PMID:28298990

A novel dentin bond strength measurement technique using a composite disk in diametral compression.

PubMed

Huang, Shih-Hao; Lin, Lian-Shan; Rudney, Joel; Jones, Rob; Aparicio, Conrado; Lin, Chun-Pin; Fok, Alex

2012-04-01

New methods are needed that can predict the clinical failure of dental restorations that primarily rely on dentin bonding. Existing methods have shortcomings, e.g. severe deviation in the actual stress distribution from theory and a large standard deviation in the measured bond strength. We introduce here a novel test specimen by examining an endodontic model for dentin bonding. Specifically, we evaluated the feasibility of using the modified Brazilian disk test to measure the post-dentin interfacial bond strength. Four groups of resin composite disks which contained a slice of dentin with or without an intracanal post in the center were tested under diametral compression until fracture. Advanced nondestructive examination and imaging techniques in the form of acoustic emission (AE) and digital image correlation (DIC) were used innovatively to capture the fracture process in real time. DIC showed strain concentration first appearing at one of the lateral sides of the post-dentin interface. The appearance of the interfacial strain concentration also coincided with the first AE signal detected. Utilizing both the experimental data and finite-element analysis, the bond/tensile strengths were calculated to be: 11.2 MPa (fiber posts), 12.9 MPa (metal posts), 8.9 MPa (direct resin fillings) and 82.6 MPa for dentin. We have thus established the feasibility of using the composite disk in diametral compression to measure the bond strength between intracanal posts and dentin. The new method has the advantages of simpler specimen preparation, no premature failure, more consistent failure mode and smaller variations in the calculated bond strength. Copyright © 2012 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

Multi-wire slurry wafering demonstrations. [slicing silicon ingots for solar arrays

NASA Technical Reports Server (NTRS)

Chen, C. P.

1978-01-01

Ten slicing demonstrations on a multi-wire slurry saw, made to evaluate the silicon ingot wafering capabilities, reveal that the present sawing capabilities can provide usable wafer area from an ingot 1.05m/kg (e.g. kerf width 0.135 mm and wafer thickness 0.265 mm). Satisfactory surface qualities and excellent yield of silicon wafers were found. One drawback is that the add-on cost of producing water from this saw, as presently used, is considerably higher than other systems being developed for the low-cost silicon solar array project (LSSA), primarily because the saw uses a large quantity of wire. The add-on cost can be significantly reduced by extending the wire life and/or by rescue of properly plated wire to restore the diameter.

Wafer-scale integrated micro-supercapacitors on an ultrathin and highly flexible biomedical platform.

PubMed

Maeng, Jimin; Meng, Chuizhou; Irazoqui, Pedro P

2015-02-01

We present wafer-scale integrated micro-supercapacitors on an ultrathin and highly flexible parylene platform, as progress toward sustainably powering biomedical microsystems suitable for implantable and wearable applications. All-solid-state, low-profile (<30 μm), and high-density (up to ~500 μF/mm(2)) micro-supercapacitors are formed on an ultrathin (~20 μm) freestanding parylene film by a wafer-scale parylene packaging process in combination with a polyaniline (PANI) nanowire growth technique assisted by surface plasma treatment. These micro-supercapacitors are highly flexible and shown to be resilient toward flexural stress. Further, direct integration of micro-supercapacitors into a radio frequency (RF) rectifying circuit is achieved on a single parylene platform, yielding a complete RF energy harvesting microsystem. The system discharging rate is shown to improve by ~17 times in the presence of the integrated micro-supercapacitors. This result suggests that the integrated micro-supercapacitor technology described herein is a promising strategy for sustainably powering biomedical microsystems dedicated to implantable and wearable applications.

High frequency guided wave propagation in monocrystalline silicon wafers

NASA Astrophysics Data System (ADS)

Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

2017-04-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full three-dimensional Finite Element simulations of the guided wave propagation were conducted to visualize and quantify these effects for a line source. The phase velocity (slowness) and skew angle of the two fundamental Lamb wave modes (first anti-symmetric mode A0 and first symmetric mode S0) for varying propagation directions relative to the crystal orientation were measured experimentally. Selective mode excitation was achieved using a contact piezoelectric transducer with a custom-made wedge and holder to achieve a controlled contact pressure. The out-of-plane component of the guided wave propagation was measured using a noncontact laser interferometer. Good agreement was found with the simulation results and theoretical predictions based on nominal material properties of the silicon wafer.

Wafer-scale fabrication of polymer-based microdevices via injection molding and photolithographic micropatterning protocols.

PubMed

Lee, Dae-Sik; Yang, Haesik; Chung, Kwang-Hyo; Pyo, Hyeon-Bong

2005-08-15

Because of their broad applications in biomedical analysis, integrated, polymer-based microdevices incorporating micropatterned metallic and insulating layers are significant in contemporary research. In this study, micropatterns for temperature sensing and microelectrode sets for electroanalysis have been implemented on an injection-molded thin polymer membrane by employing conventional semiconductor processing techniques (i.e., standard photolithographic methods). Cyclic olefin copolymer (COC) is chosen as the polymer substrate because of its high chemical and thermal stability. A COC 5-in. wafer (1-mm thickness) is manufactured using an injection molding method, in which polymer membranes (approximately 130 microm thick and 3 mm x 6 mm in area) are implemented simultaneously in order to reduce local thermal mass around micropatterned heaters and temperature sensors. The highly polished surface (approximately 4 nm within 40 microm x 40 microm area) of the fabricated COC wafer as well as its good resistance to typical process chemicals makes it possible to use the standard photolithographic and etching protocols on the COC wafer. Gold micropatterns with a minimum 5-microm line width are fabricated for making microheaters, temperature sensors, and microelectrodes. An insulating layer of aluminum oxide (Al2O3) is prepared at a COC-endurable low temperature (approximately 120 degrees C) by using atomic layer deposition and micropatterning for the electrode contacts. The fabricated microdevice for heating and temperature sensing shows improved performance of thermal isolation, and microelectrodes display good electrochemical performances for electrochemical sensors. Thus, this novel 5-in. wafer-level microfabrication method is a simple and cost-effective protocol to prepare polymer substrate and demonstrates good potential for application to highly integrated and miniaturized biomedical devices.

Characterization of perovskite layer on various nanostructured silicon wafer

NASA Astrophysics Data System (ADS)

Rostan, Nur Fairuz Mohd; Sepeai, Suhaila; Ramli, Noor Fadhilah; Azhari, Ayu Wazira; Ludin, Norasikin Ahmad; Teridi, Mohd Asri Mat; Ibrahim, Mohd Adib; Zaidi, Saleem H.

2017-05-01

Crystalline silicon (c-Si) solar cell dominates 90% of photovoltaic (PV) market. The c-Si is the most mature of all PV technologies and expected to remain leading the PV technology by 2050. The attractive characters of Si solar cell are stability, long lasting and higher lifetime. Presently, the efficiency of c-Si solar cell is still stuck at 25% for one and half decades. Tandem approach is one of the attempts to improve the Si solar cell efficiency with higher bandgap layer is stacked on top of Si bottom cell. Perovskite offers a big potential to be inserted into a tandem solar cell. Perovskite with bandgap of 1.6 to 1.9 eV will be able to absorb high energy photons, meanwhile c-Si with bandgap of 1.124 eV will absorb low energy photons. The high carrier mobility, high carrier lifetime, highly compatible with both solution and evaporation techniques makes perovskite an eligible candidate for perovskite-Si tandem configuration. The solution of methyl ammonium lead iodide (MAPbI3) was prepared by single step precursor process. The perovskite layer was deposited on different c-Si surface structure, namely planar, textured and Si nanowires (SiNWs) by using spin-coating technique at different rotation speeds. The nanostructure of Si surface was textured using alkaline based wet chemical etching process and SiNW was grown using metal assisted etching technique. The detailed surface morphology and absorbance of perovskite were studied in this paper. The results show that the thicknesses of MAPbI3 were reduced with the increasing of rotation speed. In addition, the perovskite layer deposited on the nanostructured Si wafer became rougher as the etching time and rotation speed increased. The average surface roughness increased from ˜24 nm to ˜38 nm for etching time range between 5-60 min at constant low rotation speed (2000 rpm) for SiNWs Si wafer.

Non-contact defect diagnostics in Cz-Si wafers using resonance ultrasonic vibrations

NASA Astrophysics Data System (ADS)

Belyaev, A.; Kochelap, V. A.; Tarasov, I.; Ostapenko, S.

2001-01-01

A new resonance effect of generation of sub-harmonic acoustic vibrations was applied to characterize defects in as-grown and processed Cz-Si wafers. Ultrasonic vibrations were generated into standard 8″ wafers using an external ultrasonic transducer and their amplitude recorded in a non-contact mode using a scanning acoustic probe. By tuning the frequency, f, of the transducer we observed generation of intense sub-harmonic acoustic mode ("whistle" or w-mode) with f/2 frequency. The characteristics of the w-mode-amplitude dependence, frequency scans, spatial distribution allow a clear distinction versus harmonic vibrations of the same wafer. The origin of sub-harmonic vibrations observed on 8″ Cz-Si wafers is attributed to a parametric resonance of flexural vibrations in thin silicon circular plates. We present evidence that "whistle" effect shows a strong dependence on the wafer's growth and processing history and can be used for quality assurance purposes.

Metal-ceramic bond strength between a feldspathic porcelain and a Co-Cr alloy fabricated with Direct Metal Laser Sintering technique

PubMed Central

Spyropoulos, Konstantinos

2018-01-01

PURPOSE The aim of the present study was to record the metal-ceramic bond strength of a feldspathic dental porcelain and a Co-Cr alloy, using the Direct Metal Laser Sintering technique (DMLS) for the fabrication of metal substrates. MATERIALS AND METHODS Ten metal substrates were fabricated with powder of a dental Co-Cr alloy using DMLS technique (test group) in dimensions according to ISO 9693. Another ten substrates were fabricated with a casing dental Co-Cr alloy using classic casting technique (control group) for comparison. Another three substrates were fabricated using each technique to record the Modulus of Elasticity (E) of the used alloys. All substrates were examined to record external and internal porosity. Feldspathic porcelain was applied on the substrates. Specimens were tested using the three-point bending test. The failure mode was determined using optical and scanning electron microscopy. The statistical analysis was performed using t-test. RESULTS Substrates prepared using DMLS technique did not show internal porosity as compared to those produced using the casting technique. The E of control and test group was 222 ± 5.13 GPa and 227 ± 3 GPa, respectively. The bond strength was 51.87 ± 7.50 MPa for test group and 54.60 ± 6.20 MPa for control group. No statistically significant differences between the two groups were recorded. The mode of failure was mainly cohesive for all specimens. CONCLUSION Specimens produced by the DMLS technique cover the lowest acceptable metal-ceramic bond strength of 25 MPa specified in ISO 9693 and present satisfactory bond strength for clinical use. PMID:29503711

N-Face GaN Electronics for Heteroepitaxial and Bonded Structures

DTIC Science & Technology

2015-08-27

GaN ! ?" InGaAs’Channel’ InAlAs’ !!!!!S! !!!!!!D! !!!!G! Ga (In)N’Dri2 ’Region! Wafer* Bonded! Junc2on! !!!!!S...Gate InGaAs InAlAs (In, Ga )N Source GaN on Sapphire Aperture CBL WBI InGaN n-InGaAs InAlAs n+ GaN S D WBI...about. Polarization effects at the interface may need to be considered. For Ga -polar InGaN- GaN homojunctions,

Effect of layered manufacturing techniques, alloy powders, and layer thickness on metal-ceramic bond strength.

PubMed

Ekren, Orhun; Ozkomur, Ahmet; Ucar, Yurdanur

2018-03-01

Direct metal laser sintering (DMLS) and direct metal laser melting (DMLM) have become popular for fabricating the metal frameworks of metal-ceramic restorations. How the type of layered manufacturing device, layer thickness, and alloy powder may affect the bond strength of ceramic to metal substructure is unclear. The purpose of this in vitro study was to evaluate the bond strength of dental porcelain to metal frameworks fabricated using different layered manufacturing techniques (DMLS and DMLM), Co-Cr alloy powders, and layer thicknesses and to evaluate whether a correlation exists between the bond strength and the number of ceramic remnants on the metal surface. A total of 75 bar-shaped metal specimens (n=15) were fabricated using either DMLS or DMLM. The powder alloys used were Keramit NP-S and EOS-Cobalt-Chrome SP-2 with layer thicknesses of 20 μm and 30 μm. After ceramic application, the metal-ceramic bond strength was evaluated with a 3-point-bend test. Three-way ANOVA followed by the Tukey honest significance difference test were used for statistical analysis (α=.05). De-bonding surface microstructure was observed with scanning electron microscopy. Energy dispersive spectroscopy analysis was conducted to evaluate the correlation between ceramic remnants on the metal surface and bond strength values. The mean bond strength value of DMLS was significantly higher than that of DMLM. While no statistically significant difference was found between layer thicknesses, alloy powders closely affected bond strength. Statistical comparisons revealed that the highest bond strength could be achieved with DMLS-Cobalt-Chrome SP2-20μm, and the lowest bond strength was observed in DMLS-Keramit NP-S-20μm (P≤.05). No correlation was found between porcelain remnants on the metal surface and bond strength values. The layered manufacturing device and the alloy powders evaluated in the current study closely affected the bond strength of dental porcelain to a metal framework

Lamb wave propagation in monocrystalline silicon wafers.

PubMed

Fromme, Paul; Pizzolato, Marco; Robyr, Jean-Luc; Masserey, Bernard

2018-01-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness and beam skewing of the two fundamental Lamb wave modes A 0 and S 0 were investigated. Experimental measurements using contact wedge transducer excitation and laser measurement were conducted. Good agreement was found between the theoretically calculated angular dependency of the phase slowness and measurements for different propagation directions relative to the crystal orientation. Significant wave skew and beam widening was observed experimentally due to the anisotropy, especially for the S 0 mode. Explicit finite element simulations were conducted to visualize and quantify the guided wave beam skew. Good agreement was found for the A 0 mode, but a systematic discrepancy was observed for the S 0 mode. These effects need to be considered for the non-destructive testing of wafers using guided waves.

Microleakage of light-cured resin and resin-modified glass-ionomer dentin bonding agents applied with co-cure vs pre-cure technique.

PubMed

Tulunoglu, O; Uçtaşh, M; Alaçam, A; Omürlü, H

2000-01-01

This in vitro study evaluated the effect of dentin bonding agents in reducing microleakage after three months in Class V restorations restored with Z100 resin composite. Materials tested were three types of resin-based dentin bonding agents: a multi-step (Scotchbond Multi-Purpose); a one-step (Scotchbond One-Step); a self-etching, self-priming (Clearfil Liner Bond) and a resin-modified glass ionomer (GC Fuji Bond LC). Class V cavity preparations with occlusal margins in enamel and gingival margins in cementum were prepared both on labial and lingual surfaces of extracted premolar teeth. Restorations (two per tooth) were distributed randomly into nine test groups (n = 10) consisting of the various DBAs applied with co-cure and pre-cure techniques, and no dentin bonding as a negative control group. Samples were stored in saline for three months, thermocycled, stained with silver nitrate, then sectioned through the middle of the preparation to facilitate the removal of the composite resin restoration. For groups treated with the pre-cure technique, the differences between the enamel leakage values of SBMP-control, CFLB-control and SB1S-control subgroups were significant (p < 0.05). For enamel leakage values of groups treated with the co-cure technique, the differences between the SBMP-control, SB1S-control, CFLB-control and Fuji LC-control subgroups were significant (p < 0.05). For cementum leakage values of groups treated with pre-cure technique, the difference between the CFLB-control and the Fuji, SBMP and SB1S groups was significant (p < 0.05). No significant differences could be detected between the cementum leakage values of groups treated with the co-cure technique (p > 0.05). The differences between the values obtained with application of CFLB with the pre-cure and co-cure techniques at the cementum margins were found to be statistically significant (p = 0.02). No statistically significant differences could be detected between the pre-cure and co-cure values

450mm wafer patterning with jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Thompson, Ecron; Hellebrekers, Paul; Hofemann, Paul; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2013-09-01

The next step in the evolution of wafer size is 450mm. Any transition in sizing is an enormous task that must account for fabrication space, environmental health and safety concerns, wafer standards, metrology capability, individual process module development and device integration. For 450mm, an aggressive goal of 2018 has been set, with pilot line operation as early as 2016. To address these goals, consortiums have been formed to establish the infrastructure necessary to the transition, with a focus on the development of both process and metrology tools. Central to any process module development, which includes deposition, etch and chemical mechanical polishing is the lithography tool. In order to address the need for early learning and advance process module development, Molecular Imprints Inc. has provided the industry with the first advanced lithography platform, the Imprio® 450, capable of patterning a full 450mm wafer. The Imprio 450 was accepted by Intel at the end of 2012 and is now being used to support the 450mm wafer process development demands as part of a multi-year wafer services contract to facilitate the semiconductor industry's transition to lower cost 450mm wafer production. The Imprio 450 uses a Jet and Flash Imprint Lithography (J-FILTM) process that employs drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for markets including NAND Flash memory, patterned media for hard disk drives and displays. This paper reviews the recent performance of the J-FIL technology (including overlay, throughput and defectivity), mask development improvements provided by Dai Nippon Printing, and the application of the technology to a 450mm lithography platform.

Wood Bond Testing

NASA Technical Reports Server (NTRS)

1989-01-01

A joint development program between Hartford Steam Boiler Inspection Technologies and The Weyerhaeuser Company resulted in an internal bond analyzer (IBA), a device which combines ultrasonics with acoustic emission testing techniques. It is actually a spinoff from a spinoff, stemming from a NASA Lewis invented acousto-ultrasonic technique that became a system for testing bond strength of composite materials. Hartford's parent company, Acoustic Emission Technology Corporation (AET) refined and commercialized the technology. The IBA builds on the original system and incorporates on-line process control systems. The IBA determines bond strength by measuring changes in pulsar ultrasonic waves injected into a board. Analysis of the wave determines the average internal bond strength for the panel. Results are displayed immediately. Using the system, a mill operator can adjust resin/wood proportion, reduce setup time and waste, produce internal bonds of a consistent quality and automatically mark deficient products.

X-ray characterization techniques for the assessment of surface damage in crystalline wafers: A model study in AlN

NASA Astrophysics Data System (ADS)

Bobea, M.; Tweedie, J.; Bryan, I.; Bryan, Z.; Rice, A.; Dalmau, R.; Xie, J.; Collazo, R.; Sitar, Z.

2013-03-01

A high-resolution X-ray diffraction method with enhanced surface sensitivity has been used to investigate the effects of various polishing steps on the near-surface region of single crystal substrates. The method involves the study of a highly asymmetric reflection, observable under grazing incidence conditions. Analysis of rocking curve measurements and reciprocal space maps (RSMs) revealed subtle structural differences between the polished substrates. For aluminum nitride wafers, damage induced from diamond sawing and mechanical polishing was readily identifiable by on-axis rocking curves, but this method was unable to distinguish between sample surfaces subjected to various degrees of chemical mechanical polishing (CMP). To characterize sufficiently these surfaces, (10.3) RSMs were measured to provide both qualitative and quantitative information about the near-surface region. Two features present in the RSMs were utilized to quantitatively assess the polished wafers: the magnitude of the diffuse scatter in the omega-scans and the elongation of the crystal truncation rod. The method is able to distinguish between different degrees of CMP surface preparation and provides metrics to quantify subsurface damage after this polishing step.

Method and Apparatus for Obtaining a Precision Thickness in Semiconductor and Other Wafers

NASA Technical Reports Server (NTRS)

Okojie, Robert S. (Inventor)

2002-01-01

A method and apparatus for processing a wafer comprising a material selected from an electrical semiconducting material and an electrical insulating material is presented. The wafer has opposed generally planar front and rear sides and a peripheral edge, wherein said wafer is pressed against a pad in the presence of a slurry to reduce its thickness. The thickness of the wafer is controlled by first forming a recess such as a dimple on the rear side of the wafer. A first electrical conducting strip extends from a first electrical connection means to the base surface of the recess to the second electrical connector. The first electrical conducting strip overlies the base surface of the recess. There is also a second electrical conductor with an electrical potential source between the first electrical connector and the second electrical connector to form. In combination with the first electrical conducting strip, the second electrical conductor forms a closed electrical circuit, and an electrical current flows through the closed electrical circuit. From the front side of the wafer the initial thickness of the wafer is reduced by lapping until the base surface of the recess is reached. The conductive strip is at least partially removed from the base surface to automatically stop the lapping procedure and thereby achieve the desired thickness.

Predictive modeling of composite material degradation using piezoelectric wafer sensors electromechanical impedance spectroscopy

NASA Astrophysics Data System (ADS)

Gresil, Matthieu; Yu, Lingyu; Sutton, Mike; Guo, Siming; Pollock, Patrick

2012-04-01

The advancement of composite materials in aircraft structures has led to on increased need for effective structural health monitoring (SHM) technologies that are able to detect and assess damage present in composites structures. The work presented in this paper is interested in understanding using self-sensing piezoelectric wafer active sensors (PWAS) to conduct electromechanical impedance spectroscopy (EMIS) in glass fiber reinforced plastic (GFRP) to perform structures health monitoring. PWAS are bonded to the composite material and the EMIS method is used to analyze the changes in the structural resonance and anti-resonance. As the damage progresses in the specimen, the impedance spectrum will change. In addition, multi-physics based finite element method (MP-FEM) is used to model the electromechanical behavior of a free PWAS and its interaction with the host structure on which it is bonded. The MPFEM permits the input and the output variables to be expressed directly in electric terms while the two way electromechanical conversion is done internally in the MP_FEM formulation. To reach the goal of using the EMIS approach to detect damage, several damages models are generated on laminated GFRP structures. The effects of the modeling are carefully studied through experimental validation. A good match has been observed for low and very high frequencies.

Diffusion Bonding Beryllium to Reduced Activation Ferritic Martensitic Steel: Development of Processes and Techniques

NASA Astrophysics Data System (ADS)

Hunt, Ryan Matthew

Pressing (HIP) process (at a temperature between 700 °C and 750 °C for 2 hours at 103 M Pa) with 10 mu m of titanium and 20 mum of copper deposited between substrates. Without the copper and titanium interlayers, the bond formed an intermetallic that lead to fracture from internal residual stresses. Also, slowing the rate of cooling and adding an intermediate hold temperature during cool-down significantly increased bond strength. These beneficial effects were confirmed by the numerical simulations, which showed reduced residual stress resulting from all bonding techniques. Both metals interlayers, as well as the reduced cooling rate were critical in overcoming the otherwise brittle quality of the beryllium to ferritic steel joint. However, the introduced interlayers are not an ideal solution to the problem. They introduced both Be-Ti and Cu-Ti compounds, which proved to be the eventual failure location in the bond. Further optimization of this joint is necessary, and can potentially be achieved with variation of cooling rates. To make the joint ready for implementation will require larger scale fabrication to verify reliability and to test the joint under operational loads.

Automated Array Assembly Task In-depth Study of Silicon Wafer Surface Texturizing

NASA Technical Reports Server (NTRS)

Jones, G. T.; Chitre, S.; Rhee, S. S.; Allison, K. L.

1979-01-01

A low cost wafer surface texturizing process was studied. An investigation of low cost cleaning operations to clean residual wax and organics from the surface of silicon wafers was made. The feasibility of replacing dry nitrogen with clean dry air for drying silicon wafers was examined. The two stage texturizing process was studied for the purpose of characterizing relevant parameters in large volume applications. The effect of gettering solar cells on photovoltaic energy conversion efficiency is described.

SEMICONDUCTOR TECHNOLOGY: Influence of nitrogen dose on the charge density of nitrogen-implanted buried oxide in SOI wafers

NASA Astrophysics Data System (ADS)

Zhongshan, Zheng; Zhongli, Liu; Ning, Li; Guohua, Li; Enxia, Zhang

2010-02-01

To harden silicon-on-insulator (SOI) wafers fabricated using separation by implanted oxygen (SIMOX) to total-dose irradiation, the technique of nitrogen implantation into the buried oxide (BOX) layer of SIMOX wafers can be used. However, in this work, it has been found that all the nitrogen-implanted BOX layers reveal greater initial positive charge densities, which increased with increasing nitrogen implantation dose. Also, the results indicate that excessively large nitrogen implantation dose reduced the radiation tolerance of BOX for its high initial positive charge density. The bigger initial positive charge densities can be ascribed to the accumulation of implanted nitrogen near the Si-BOX interface after annealing. On the other hand, in our work, it has also been observed that, unlike nitrogen-implanted BOX, all the fluorine-implanted BOX layers show a negative charge density. To obtain the initial charge densities of the BOX layers, the tested samples were fabricated with a metal-BOX-silicon (MBS) structure based on SIMOX wafers for high-frequency capacitance-voltage (C-V) analysis.

Investigation of ball bond integrity for 0.8 mil (20 microns) diameter gold bonding wire on low k die in wire bonding technology

NASA Astrophysics Data System (ADS)

Kudtarkar, Santosh Anil

Microelectronics technology has been undergoing continuous scaling to accommodate customer driven demand for smaller, faster and cheaper products. This demand has been satisfied by using novel materials, design techniques and processes. This results in challenges for the chip connection technology and also the package technology. The focus of this research endeavor was restricted to wire bond interconnect technology using gold bonding wires. Wire bond technology is often regarded as a simple first level interconnection technique. In reality, however, this is a complex process that requires a thorough understanding of the interactions between the design, material and process variables, and their impact on the reliability of the bond formed during this process. This research endeavor primarily focused on low diameter, 0.8 mil thick (20 mum) diameter gold bonding wire. Within the scope of this research, the integrity of the ball bond formed by 1.0 mil (25 mum) and 0.8 mil (20 mum) diameter wires was compared. This was followed by the evaluation of bonds formed on bond pads having doped SiO2 (low k) as underlying structures. In addition, the effect of varying the percentage of the wire dopant, palladium and bonding process parameters (bonding force, bond time, ultrasonic energy) for 0.8 mil (20 mum) bonding wire was also evaluated. Finally, a degradation empirical model was developed to understand the decrease in the wire strength. This research effort helped to develop a fundamental understanding of the various factors affecting the reliability of a ball bond from a design (low diameter bonding wire), material (low k and bonding wire dopants), and process (wire bonding process parameters) perspective for a first level interconnection technique, namely wire bonding. The significance of this research endeavor was the systematic investigation of the ball bonds formed using 0.8 mil (20 microm) gold bonding wire within the wire bonding arena. This research addressed low k

Fabrication of a Silicon Backshort Assembly for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Engineering Controlled Spalling in (100)-Oriented GaAs for Wafer Reuse

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sweet, Cassi A.; McNeely, Joshua E.; Gorman, Brian

Controlled spalling offers a way to cleave thin, single-crystal films or devices from wafers, particularly if the fracture planes in the material are oriented parallel to the wafer surface. Unfortunately, misalignment between the favored fracture planes and the wafer surface preferred for photovoltaic growth in (100)-oriented GaAs produces a highly faceted surface when subject to controlled spalling. This highly faceted cleavage surface is problematic in several ways: (1) it can result in large variations of spall depth due to unstable crack propagation; (2) it may introduce defects into the device zone or underlying substrate; and (3) it consumes many micronsmore » of material outside of the device zone. We present the ways in which we have engineered controlled spalling for (100)-oriented GaAs to minimize these effects. We expand the operational window for controlled spalling to avoid spontaneous spalling, find no evidence of dislocation activity in the spalled film or the parent wafer, and reduce facet height and facet height irregularity. Resolving these issues provides a viable path forward for reducing III-V device cost through the controlled spalling of (100)-oriented GaAs devices and subsequent wafer reuse when these processes are combined with a high-throughput growth method such as Hydride Vapor Phase Epitaxy.« less

Comparison on mechanical properties of heavily phosphorus- and arsenic-doped Czochralski silicon wafers

NASA Astrophysics Data System (ADS)

Yuan, Kang; Sun, Yuxin; Lu, Yunhao; Liang, Xingbo; Tian, Daxi; Ma, Xiangyang; Yang, Deren

2018-04-01

Heavily phosphorus (P)- and arsenic (As)-doped Czochralski silicon (CZ-Si) wafers generally act as the substrates for the epitaxial silicon wafers used to fabricate power and communication devices. The mechanical properties of such two kinds of n-type heavily doped CZ silicon wafers are vital to ensure the quality of epitaxial silicon wafers and the manufacturing yields of devices. In this work, the mechanical properties including the hardness, Young's modulus, indentation fracture toughness and the resistance to dislocation motion have been comparatively investigated for heavily P- and As-doped CZ-Si wafers. It is found that heavily P-doped CZ-Si possesses somewhat higher hardness, lower Young's modulus, larger indentation fracture toughness and stronger resistance to dislocation motion than heavily As-doped CZ-Si. The mechanisms underlying this finding have been tentatively elucidated by considering the differences in the doping effects of P and As in silicon.

A Novel Defect Inspection Method for Semiconductor Wafer Based on Magneto-Optic Imaging

NASA Astrophysics Data System (ADS)

Pan, Z.; Chen, L.; Li, W.; Zhang, G.; Wu, P.

2013-03-01

The defects of semiconductor wafer may be generated from the manufacturing processes. A novel defect inspection method of semiconductor wafer is presented in this paper. The method is based on magneto-optic imaging, which involves inducing eddy current into the wafer under test, and detecting the magnetic flux associated with eddy current distribution in the wafer by exploiting the Faraday rotation effect. The magneto-optic image being generated may contain some noises that degrade the overall image quality, therefore, in this paper, in order to remove the unwanted noise present in the magneto-optic image, the image enhancement approach using multi-scale wavelet is presented, and the image segmentation approach based on the integration of watershed algorithm and clustering strategy is given. The experimental results show that many types of defects in wafer such as hole and scratch etc. can be detected by the method proposed in this paper.

Enhanced capture rate for haze defects in production wafer inspection

NASA Astrophysics Data System (ADS)

Auerbach, Ditza; Shulman, Adi; Rozentsvige, Moshe

2010-03-01

Photomask degradation via haze defect formation is an increasing troublesome yield problem in the semiconductor fab. Wafer inspection is often utilized to detect haze defects due to the fact that it can be a bi-product of process control wafer inspection; furthermore, the detection of the haze on the wafer is effectively enhanced due to the multitude of distinct fields being scanned. In this paper, we demonstrate a novel application for enhancing the wafer inspection tool's sensitivity to haze defects even further. In particular, we present results of bright field wafer inspection using the on several photo layers suffering from haze defects. One way in which the enhanced sensitivity can be achieved in inspection tools is by using a double scan of the wafer: one regular scan with the normal recipe and another high sensitivity scan from which only the repeater defects are extracted (the non-repeater defects consist largely of noise which is difficult to filter). Our solution essentially combines the double scan into a single high sensitivity scan whose processing is carried out along two parallel routes (see Fig. 1). Along one route, potential defects follow the standard recipe thresholds to produce a defect map at the nominal sensitivity. Along the alternate route, potential defects are used to extract only field repeater defects which are identified using an optimal repeater algorithm that eliminates "false repeaters". At the end of the scan, the two defect maps are merged into one with optical scan images available for all the merged defects. It is important to note, that there is no throughput hit; in addition, the repeater sensitivity is increased relative to a double scan, due to a novel runtime algorithm implementation whose memory requirements are minimized, thus enabling to search a much larger number of potential defects for repeaters. We evaluated the new application on photo wafers which consisted of both random and haze defects. The evaluation procedure

Microleakage and shear punch bond strength in class II primary molars cavities restored with low shrink silorane based versus methacrylate based composite using three different techniques.

PubMed

Fahmy, Amal Ezzeldin; Farrag, Nadia Moustafa

2010-01-01

This in vitro study aimed to evaluate the gingival microleakage in class II cavities in primary molars restored with a low shrink silorane resin composite (Filtek P90) or a nanohybride composite resin (Filtek supreme XT) using three different techniques, (total bonding, closed or open sandwich techniques) lined by nano-filled resin modified glass ionomer cement RMGIC (Ketac N100). Additionally, the shear punch bond strength between the two types of composite and KNIO0 was also examined. For microleakage test, two standardized class II slot cavities were prepared in proximal surfaces of 60 sound extracted primary molars which were divided into 2 groups of 30 each according to the type of composite. Each group was subdivided into 3 groups (n = 10) according to the restorative technique used. The restored teeth were examined for microleakage after immersion in 2% methylene blue dye using stereomicroscope at 20 X. Microleakage scores among the groups were compared using Kruskal Wallis test followed by pair wise Mann Whitney U test at P < or = 0.05. Thirty disc specimens were prepared for determining the shear punch bond strength between the two composite materials and the KN100. Specimens were divided into 5 groups (n = 6) according to the adhesive protocol. The differences in mean bond strength values in MPa between groups were statistically analyzed using ANOVA followed by pair wise Tukey Post hoc test at P < or = 0. 05. Mode of failure was also evaluated for all groups. Both the silorane resin and nano-composite resin showed superior marginal seal with the total bonding technique compared to closed and open sandwich techniques. The recorded mean shear punch bond strength values showed no statistical significant difference between the two resin composites without or with their adhesive bonding systems when bonded to the nano-ionomer. All specimens showed cohesive mode of failures except for silorane resin with Adper Easy Bond Self Etch Adhesive (AEBSEA) which showed

Increasing reticle inspection efficiency and reducing wafer print-checks using automated defect classification and simulation

NASA Astrophysics Data System (ADS)

Ryu, Sung Jae; Lim, Sung Taek; Vacca, Anthony; Fiekowsky, Peter; Fiekowsky, Dan

2013-09-01

IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the "requal" phase for extended, non-productive periods of time. The overall "requal" cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs. Fortunately, a software program has been developed which automates defect classification with simulated printability measurement greatly reducing requal cycle time and improving overall disposition accuracy. This product, called ADAS (Auto Defect Analysis System), has been tested in both engineering and high-volume production environments with very successful results. In this paper, data is presented supporting significant reduction for costly wafer print checks, improved inspection area productivity, and minimized risk of misclassified yield limiting defects.

Comparison of the metal-to-ceramic bond strengths of four noble alloys with press-on-metal and conventional porcelain layering techniques.

PubMed

Khmaj, Mofida R; Khmaj, Abdulfatah B; Brantley, William A; Johnston, William M; Dasgupta, Tridib

2014-11-01

New noble alloys for metal ceramic restorations introduced by manufacturers are generally lower-cost alternatives to traditional higher-gold alloys. Information about the metal-to-ceramic bond strength for these alloys, which is needed for rational clinical selection, is often lacking. The purpose of this study was to evaluate the bond strength of 4 recently introduced noble alloys by using 2 techniques for porcelain application. Aquarius Hard (high-gold: 86.1 gold, 8.5 platinum, 2.6 palladium, 1.4 indium; values in wt. %), Evolution Lite (reduced-gold: 40.3 gold, 39.3 palladium, 9.3 indium, 9.2 silver, 1.8 gallium), Callisto 75 Pd (palladium-silver containing gold: 75.2 palladium, 7.1 silver, 2.5 gold, 9.3 tin, 1.0 indium), and Aries, (conventional palladium-silver: 63.7 palladium, 26.0 silver, 7.0 tin, 1.8 gallium, 1.5 indium) were selected for bonding to leucite-containing veneering porcelains. Ten metal ceramic specimens that met dimensional requirements for International Organization for Standardization (ISO) Standard 9693 were prepared for each alloy by using conventional porcelain layering and press-on-metal methods. The 3-point bending test in ISO Standard 9693 was used to determine bond strength. Values were compared with 2-way ANOVA (maximum likelihood analysis, SAS Mixed Procedure) and the Tukey test (α=.05). Means (standard deviations) for bond strength with conventional porcelain layering were as follows: Aquarius Hard (50.7 ±5.5 MPa), Evolution Lite (40.2 ±3.3 MPa), Callisto 75 Pd (37.2 ±3.9 MPa), and Aries (34.0 ±4.9 MPa). For the press-on-metal technique, bond strength results were as follows: Aquarius Hard (33.7 ±11.5 MPa), Evolution Lite (34.9 ±4.5 MPa), Callisto 75 Pd (37.2 ±11.9 MPa), and Aries (30.7 ±10.8 MPa). From statistical analyses, the following 3 significant differences were found for metal-to-ceramic bond strength: the bond strength for Aquarius Hard was significantly higher for conventional porcelain layers compared with

Examining the free radical bonding mechanism of benzoquinone- and hydroquinone-methanol passivation of silicon surfaces

NASA Astrophysics Data System (ADS)

Kotulak, Nicole A.; Chen, Meixi; Schreiber, Nikolas; Jones, Kevin; Opila, Robert L.

2015-11-01

The surface passivation of p-benzoquinone (BQ) and hydroquinone (HQ) when dissolved in methanol (ME) has been examined through effective lifetime testing of crystalline silicon (c-Si) wafers treated with the aforementioned solutions. Changes in the availability of both photons and protons in the solutions were demonstrated to affect the level of passivation achieved. The requirement of both excess protons and ambient light exposure to maintain high effective lifetimes supports the presence of a free radical species that drives the surface passivation. Surface analysis suggests a 1:1 ratio of HQ-like bonds to methoxy bonds on the c-Si surface after treatment with a BQ/ME solution.

Intentional defect array wafers: their practical use in semiconductor control and monitoring systems

NASA Astrophysics Data System (ADS)

Emami, Iraj; McIntyre, Michael; Retersdorf, Michael

2003-07-01

In the competitive world of semiconductor manufacturing today, control of the process and manufacturing equipment is paramount to success of the business. Consistent with the need for rapid development of process technology, is a need for development wiht respect to equipment control including defect metrology tools. Historical control methods for defect metrology tools included a raw count of defects detected on a characterized production or test wafer with little or not regard to the attributes of the detected defects. Over time, these characterized wafers degrade with multiple passes on the tools and handling requiring the tool owner to create and characterize new samples periodically. With the complex engineering software analysis systems used today, there is a strong reliance on the accuracy of defect size, location, and classification in order to provide the best value when correlating the in line to sort type of data. Intentional Defect Array (IDA) wafers were designed and manufacturered at International Sematech (ISMT) in Austin, Texas and is a product of collaboration between ISMT member companies and suppliers of advanced defect inspection equipment. These wafers provide the use with known defect types and sizes in predetermined locations across the entire wafer. The wafers are designed to incorporate several desired flows and use critical dimensions consistent with current and future technology nodes. This paper briefly describes the design of the IDA wafer and details many practical applications in the control of advanced defect inspection equipment.

Direct bonded HOPG - Analyzer support without background source

NASA Astrophysics Data System (ADS)

Groitl, Felix; Kitaura, Hidetoshi; Nishiki, Naomi; Rønnow, Henrik M.

2018-04-01

A new production process allows a direct bonding of HOPG crystals on Si wafers. This new method facilitates the production of analyzer crystals with support structure without the use of additional, background inducing fixation material, e.g. glue, wax and screws. This new method is especially interesting for the upcoming generation of CAMEA-type multiplexing spectrometers. These instruments allow for a drastic performance increase due to the increased angular coverage and multiple energy analysis. Exploiting the transparency of multiple HOPG for cold neutrons, a consecutive arrangement of HOPG analyzer crystals per Q-channel can be achieved. This implies that neutrons travel through up to 10 arrays of analyzer crystals before reaching the analyzer corresponding to their energy. Hence, a careful choice of the fixation method for the analyzer crystals in regards to transparency and background is necessary. Here, we present first results on the diffraction and mechanical performance of direct bonded analyzer crystals.

Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves

NASA Astrophysics Data System (ADS)

Ju, Yang; Inoue, Kojiro; Saka, Masumi; Abe, Hiroyuki

2002-11-01

We present a method for quantitative measurement of electrical conductivity of semiconductor wafers in a contactless fashion by using millimeter waves. A focusing sensor was developed to focus a 110 GHz millimeter wave beam on the surface of a silicon wafer. The amplitude and the phase of the reflection coefficient of the millimeter wave signal were measured by which electrical conductivity of the wafer was determined quantitatively, independent of the permittivity and thickness of the wafers. The conductivity obtained by this method agrees well with that measured by the conventional four-point-probe method.

ILT based defect simulation of inspection images accurately predicts mask defect printability on wafer

NASA Astrophysics Data System (ADS)

Deep, Prakash; Paninjath, Sankaranarayanan; Pereira, Mark; Buck, Peter

2016-05-01

At advanced technology nodes mask complexity has been increased because of large-scale use of resolution enhancement technologies (RET) which includes Optical Proximity Correction (OPC), Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO). The number of defects detected during inspection of such mask increased drastically and differentiation of critical and non-critical defects are more challenging, complex and time consuming. Because of significant defectivity of EUVL masks and non-availability of actinic inspection, it is important and also challenging to predict the criticality of defects for printability on wafer. This is one of the significant barriers for the adoption of EUVL for semiconductor manufacturing. Techniques to decide criticality of defects from images captured using non actinic inspection images is desired till actinic inspection is not available. High resolution inspection of photomask images detects many defects which are used for process and mask qualification. Repairing all defects is not practical and probably not required, however it's imperative to know which defects are severe enough to impact wafer before repair. Additionally, wafer printability check is always desired after repairing a defect. AIMSTM review is the industry standard for this, however doing AIMSTM review for all defects is expensive and very time consuming. Fast, accurate and an economical mechanism is desired which can predict defect printability on wafer accurately and quickly from images captured using high resolution inspection machine. Predicting defect printability from such images is challenging due to the fact that the high resolution images do not correlate with actual mask contours. The challenge is increased due to use of different optical condition during inspection other than actual scanner condition, and defects found in such images do not have correlation with actual impact on wafer. Our automated defect simulation tool predicts

1366 Project Automate: Enabling Automation for <$0.10/W High-Efficiency Kerfless Wafers Manufactured in the US

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lorenz, Adam

For photovoltaic (PV) manufacturing to thrive in the U.S., there must be an innovative core to the technology. Project Automate builds on 1366’s proprietary Direct Wafer® kerfless wafer technology and aims to unlock the cost and efficiency advantages of thin kerfless wafers. Direct Wafer is an innovative, U.S.-friendly (efficient, low-labor content) manufacturing process that addresses the main cost barrier limiting silicon PV cost-reductions – the 35-year-old grand challenge of manufacturing quality wafers (40% of the cost of modules) without the cost and waste of sawing. This simple, scalable process will allow 1366 to manufacture “drop-in” replacement wafers for the $10more » billion silicon PV wafer market at 50% of the cost, 60% of the capital, and 30% of the electricity of conventional casting and sawing manufacturing processes. This SolarMat project developed the Direct Wafer processes’ unique capability to tailor the shape of wafers to simultaneously make thinner AND stronger wafers (with lower silicon usage) that enable high-efficiency cell architectures. By producing wafers with a unique target geometry including a thick border (which determines handling characteristics) and thin interior regions (which control light capture and electron transport and therefore determine efficiency), 1366 can simultaneously improve quality and lower cost (using less silicon).« less

Big data driven cycle time parallel prediction for production planning in wafer manufacturing

NASA Astrophysics Data System (ADS)

Wang, Junliang; Yang, Jungang; Zhang, Jie; Wang, Xiaoxi; Zhang, Wenjun Chris

2018-07-01

Cycle time forecasting (CTF) is one of the most crucial issues for production planning to keep high delivery reliability in semiconductor wafer fabrication systems (SWFS). This paper proposes a novel data-intensive cycle time (CT) prediction system with parallel computing to rapidly forecast the CT of wafer lots with large datasets. First, a density peak based radial basis function network (DP-RBFN) is designed to forecast the CT with the diverse and agglomerative CT data. Second, the network learning method based on a clustering technique is proposed to determine the density peak. Third, a parallel computing approach for network training is proposed in order to speed up the training process with large scaled CT data. Finally, an experiment with respect to SWFS is presented, which demonstrates that the proposed CTF system can not only speed up the training process of the model but also outperform the radial basis function network, the back-propagation-network and multivariate regression methodology based CTF methods in terms of the mean absolute deviation and standard deviation.

Characteristics of nanocomposites and semiconductor heterostructure wafers using THz spectroscopy

NASA Astrophysics Data System (ADS)

Altan, Hakan

All optical, THz-Time Domain Spectroscopic (THz-TDS) methods were employed towards determining the electrical characteristics of Single Walled Carbon Nanotubes, Ion Implanted Si nanoclusters and Si1-xGe x, HFO2, SiO2 on p-type Si wafers. For the nanoscale composite materials, Visible Pump/THz Probe spectroscopy measurements were performed after observing that the samples were not sensitive to the THz radiation alone. The results suggest that the photoexcited nanotubes exhibit localized transport due to Lorentz-type photo-induced localized states from 0.2 to 0.7THz. The THz transmission is modeled through the photoexcited layer with an effective dielectric constant described by a Drude + Lorentz model and given by Maxwell-Garnett theory. Comparisons are made with other prevalent theories that describe electronic transport. Similar experiments were repeated for ion-implanted, 3-4nm Si nanoclusters in fused silica for which a similar behavior was observed. In addition, a change in reflection from Si1-xGex on Si, 200mm diameter semiconductor heterostructure wafers with 10% or 15% Ge content, was measured using THz-TDS methods. Drude model is utilized for the transmission/reflection measurements and from the reflection data the mobility of each wafer is estimated. Furthermore, the effect of high-kappa dielectric material (HfO2) on the electrical properties of p-type silicon wafers was characterized by utilizing non-contact, differential (pump-pump off) spectroscopic methods to differ between HfO2 and SiO 2 on Si wafers. The measurements are analyzed in two distinct transmission models, where one is an exact representation of the layered structure for each wafer and the other assumed that the response observed from the differential THz transmission was solely due to effects from interfacial traps between the dielectric layer and the substrate. The latter gave a more accurate picture of the carrier dynamics. From these measurements the effect of interfacial defects on

Wafer integrated micro-scale concentrating photovoltaics

NASA Astrophysics Data System (ADS)

Gu, Tian; Li, Duanhui; Li, Lan; Jared, Bradley; Keeler, Gordon; Miller, Bill; Sweatt, William; Paap, Scott; Saavedra, Michael; Das, Ujjwal; Hegedus, Steve; Tauke-Pedretti, Anna; Hu, Juejun

2017-09-01

Recent development of a novel micro-scale PV/CPV technology is presented. The Wafer Integrated Micro-scale PV approach (WPV) seamlessly integrates multijunction micro-cells with a multi-functional silicon platform that provides optical micro-concentration, hybrid photovoltaic, and mechanical micro-assembly. The wafer-embedded micro-concentrating elements is shown to considerably improve the concentration-acceptance-angle product, potentially leading to dramatically reduced module materials and fabrication costs, sufficient angular tolerance for low-cost trackers, and an ultra-compact optical architecture, which makes the WPV module compatible with commercial flat panel infrastructures. The PV/CPV hybrid architecture further allows the collection of both direct and diffuse sunlight, thus extending the geographic and market domains for cost-effective PV system deployment. The WPV approach can potentially benefits from both the high performance of multijunction cells and the low cost of flat plate Si PV systems.

X-Ray Diffraction (XRD) Characterization Methods for Sigma=3 Twin Defects in Cubic Semiconductor (100) Wafers

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Kim, Hyun Jung (Inventor); Skuza, Jonathan R. (Inventor); Lee, Kunik (Inventor); Choi, Sang Hyouk (Inventor); King, Glen C. (Inventor)

2017-01-01

An X-ray defraction (XRD) characterization method for sigma=3 twin defects in cubic semiconductor (100) wafers includes a concentration measurement method and a wafer mapping method for any cubic tetrahedral semiconductor wafers including GaAs (100) wafers and Si (100) wafers. The methods use the cubic semiconductor's (004) pole figure in order to detect sigma=3/{111} twin defects. The XRD methods are applicable to any (100) wafers of tetrahedral cubic semiconductors in the diamond structure (Si, Ge, C) and cubic zinc-blend structure (InP, InGaAs, CdTe, ZnSe, and so on) with various growth methods such as Liquid Encapsulated Czochralski (LEC) growth, Molecular Beam Epitaxy (MBE), Organometallic Vapor Phase Epitaxy (OMVPE), Czochralski growth and Metal Organic Chemical Vapor Deposition (MOCVD) growth.

Development of a nondestructive vibration technique for bond assessment of Space Shuttle tiles

NASA Technical Reports Server (NTRS)

Moslehy, Faissal A.

1994-01-01

This final report describes the achievements of the above titled project. The project is funded by NASA-KSC (Grant No. NAG 10-0117) for the period of 1 Jan. to 31 Dec. 1993. The purpose of this project was to develop a nondestructive, noncontact technique based on 'vibration signature' of tile systems to quantify the bond conditions of the thermal protection system) tiles of Space Shuttle orbiters. The technique uses a laser rapid scan system, modal measurements, and finite element modeling. Finite element models were developed for tiles bonded to both clamped and deformable integrated skin-stringer orbiter mid-fuselage. Results showed that the size and location of a disbonded tile can be determined from frequency and mode shape information. Moreover, a frequency response survey was used to quickly identify the disbonded tiles. The finite element results were compared with experimentally determined frequency responses of a 17-tile test panel, where a rapidscan laser system was employed. An excellent degree of correlation between the mathematical simulation and experimental results was realized. An inverse solution for single-tile assemblies was also derived and is being implemented into a computer program that can interact with the modal testing software. The output of the program displays the size and location of disbond. This program has been tested with simulated input (i.e., finite element data), and excellent agreement between predicted and simulated disbonds was shown. Finally, laser vibration imaging and acoustic emission techniques were shown to be well suited for detecting and monitoring the progressive damage in Graphite/Epoxy composite materials.

Resin–dentin bonds to EDTA-treated vs. acid-etched dentin using ethanol wet-bonding

PubMed Central

Sauro, Salvatore; Toledano, Manuel; Aguilera, Fatima Sánchez; Mannocci, Francesco; Pashley, David H.; Tay, Franklin R.; Watson, Timothy F.; Osorio, Raquel

2013-01-01

Objective To compare resin–dentin bond strengths and the micropermeability of hydrophobic vs. hydrophilic resins bonded to acid-etched or EDTA-treated dentin, using the ethanol wet-bonding technique. Methods Flat dentin surfaces from extracted human third molars were conditioned before bonding with: 37% H3PO4 (15 s) or 0.1 M EDTA (60 s). Five experimental resin blends of different hydrophilicities and one commercial adhesive (SBMP: Scotchbond Multi-Purpose) were applied to ethanol wet-dentin (1 min) and light-cured (20 s). The solvated resins were used as primers (50% ethanol/50% comonomers) and their respective neat resins were used as the adhesive. The resin-bonded teeth were stored in distilled water (24 h) and sectioned in beams for microtensile bond strength testing. Modes of failure were examined by stereoscopic light microscopy and SEM. Confocal tandem scanning microscopy (TSM) interfacial characterization and micropermeability were also performed after filling the pulp chamber with 1 wt% aqueous rhodamine-B. Results The most hydrophobic resin 1 gave the lowest bond strength values to acid-etched dentin and all beams failed prematurely when the resin was applied to EDTA-treated dentin. Resins 2 and 3 gave intermediate bond strengths to both conditioned substrates. Resin 4, an acidic hydrophilic resin, gave the highest bond strengths to both EDTA-treated and acid-etched dentin. Resin 5 was the only hydrophilic resin showing poor resin infiltration when applied on acid-etched dentin. Significance The ethanol wet-bonding technique may improve the infiltration of most of the adhesives used in this study into dentin, especially when applied to EDTA-treated dentin. The chemical composition of the resin blends was a determining factor influencing the ability of adhesives to bond to EDTA-treated or 37% H3PO4 acid-etched dentin, when using the ethanol wet-bonding technique in a clinically relevant time period. PMID:20074787

Control of grown-in defects and oxygen precipitates in silicon wafers with DZ-IG structure by ultrahigh-temperature rapid thermal oxidation

NASA Astrophysics Data System (ADS)

Maeda, Susumu; Sudo, Haruo; Okamura, Hideyuki; Nakamura, Kozo; Sueoka, Koji; Izunome, Koji

2018-04-01

A new control technique for achieving compatibility between crystal quality and gettering ability for heavy metal impurities was demonstrated for a nitrogen-doped Czochralski silicon wafer with a diameter of 300 mm via ultra-high temperature rapid thermal oxidation (UHT-RTO) processing. We have found that the DZ-IG structure with surface denuded zone and the wafer bulk with dense oxygen precipitates were formed by the control of vacancies in UHT-RTO process at temperature exceeding 1300 °C. It was also confirmed that most of the void defects were annihilated from the sub-surface of the wafer due to the interstitial Si atoms that were generated at the SiO2/Si interface. These results indicated that vacancies corresponded to dominant species, despite numerous interstitial silicon injections. We have explained these prominent features by the degree of super-saturation for the interstitial silicon due to oxidation and the precise thermal properties of the vacancy and interstitial silicon.

Signal processing techniques for damage detection with piezoelectric wafer active sensors and embedded ultrasonic structural radar

NASA Astrophysics Data System (ADS)

Yu, Lingyu; Bao, Jingjing; Giurgiutiu, Victor

2004-07-01

Embedded ultrasonic structural radar (EUSR) algorithm is developed for using piezoelectric wafer active sensor (PWAS) array to detect defects within a large area of a thin-plate specimen. Signal processing techniques are used to extract the time of flight of the wave packages, and thereby to determine the location of the defects with the EUSR algorithm. In our research, the transient tone-burst wave propagation signals are generated and collected by the embedded PWAS. Then, with signal processing, the frequency contents of the signals and the time of flight of individual frequencies are determined. This paper starts with an introduction of embedded ultrasonic structural radar algorithm. Then we will describe the signal processing methods used to extract the time of flight of the wave packages. The signal processing methods being used include the wavelet denoising, the cross correlation, and Hilbert transform. Though hardware device can provide averaging function to eliminate the noise coming from the signal collection process, wavelet denoising is included to ensure better signal quality for the application in real severe environment. For better recognition of time of flight, cross correlation method is used. Hilbert transform is applied to the signals after cross correlation in order to extract the envelope of the signals. Signal processing and EUSR are both implemented by developing a graphical user-friendly interface program in LabView. We conclude with a description of our vision for applying EUSR signal analysis to structural health monitoring and embedded nondestructive evaluation. To this end, we envisage an automatic damage detection application utilizing embedded PWAS, EUSR, and advanced signal processing.

Scatterometry on pelliclized masks: an option for wafer fabs

NASA Astrophysics Data System (ADS)

Gallagher, Emily; Benson, Craig; Higuchi, Masaru; Okumoto, Yasuhiro; Kwon, Michael; Yedur, Sanjay; Li, Shifang; Lee, Sangbong; Tabet, Milad

2007-03-01

Optical scatterometry-based metrology is now widely used in wafer fabs for lithography, etch, and CMP applications. This acceptance of a new metrology method occurred despite the abundance of wellestablished CD-SEM and AFM methods. It was driven by the desire to make measurements faster and with a lower cost of ownership. Over the last year, scatterometry has also been introduced in advanced mask shops for mask measurements. Binary and phase shift masks have been successfully measured at all desired points during photomask production before the pellicle is mounted. There is a significant benefit to measuring masks with the pellicle in place. From the wafer fab's perspective, through-pellicle metrology would verify mask effects on the same features that are characterized on wafer. On-site mask verification would enable quality control and trouble-shooting without returning the mask to a mask house. Another potential application is monitoring changes to mask films once the mask has been delivered to the fab (haze, oxide growth, etc.). Similar opportunities apply to the mask metrologist receiving line returns from a wafer fab. The ability to make line-return measurements without risking defect introduction is clearly attractive. This paper will evaluate the feasibility of collecting scatterometry data on pelliclized masks. We explore the effects of several different pellicle types on scatterometry measurements made with broadband light in the range of 320-780 nm. The complexity introduced by the pellicles' optical behavior will be studied.

Wafer plane inspection with soft resist thresholding

NASA Astrophysics Data System (ADS)

Hess, Carl; Shi, Rui-fang; Wihl, Mark; Xiong, Yalin; Pang, Song

2008-10-01

Wafer Plane Inspection (WPI) is an inspection mode on the KLA-Tencor TeraScaTM platform that uses the high signalto- noise ratio images from the high numerical aperture microscope, and then models the entire lithographic process to enable defect detection on the wafer plane[1]. This technology meets the needs of some advanced mask manufacturers to identify the lithographically-significant defects while ignoring the other non-lithographically-significant defects. WPI accomplishes this goal by performing defect detection based on a modeled image of how the mask features would actually print in the photoresist. There are several advantages to this approach: (1) the high fidelity of the images provide a sensitivity advantage over competing approaches; (2) the ability to perform defect detection on the wafer plane allows one to only see those defects that have a printing impact on the wafer; (3) the use of modeling on the lithographic portion of the flow enables unprecedented flexibility to support arbitrary illumination profiles, process-window inspection in unit time, and combination modes to find both printing and non-printing defects. WPI is proving to be a valuable addition to the KLA-Tencor detection algorithm suite. The modeling portion of WPI uses a single resist threshold as the final step in the processing. This has been shown to be adequate on several advanced customer layers, but is not ideal for all layers. Actual resist chemistry has complicated processes including acid and base-diffusion and quench that are not consistently well-modeled with a single resist threshold. We have considered the use of an advanced resist model for WPI, but rejected it because the burdensome requirements for the calibration of the model were not practical for reticle inspection. This paper describes an alternative approach that allows for a "soft" resist threshold to be applied that provides a more robust solution for the most challenging processes. This approach is just

MiRNA-181d Expression Significantly Affects Treatment Responses to Carmustine Wafer Implantation.

PubMed

Sippl, Christoph; Ketter, Ralf; Bohr, Lisa; Kim, Yoo Jin; List, Markus; Oertel, Joachim; Urbschat, Steffi

2018-05-26

Standard therapeutic protocols for glioblastoma, the most aggressive type of brain cancer, include surgery followed by chemoradiotherapy. Additionally, carmustine-eluting wafers can be implanted locally into the resection cavity. To evaluate microRNA (miRNA)-181d as a prognostic marker of responses to carmustine wafer implantation. A total of 80 glioblastoma patients (40/group) were included in a matched pair analysis. One group (carmustine wafer group) received concomitant chemoradiotherapy with carmustine wafer implantation (Stupp protocol). The second group (control group) received only concomitant chemoradiotherapy. All tumor specimens were subjected to evaluations of miRNA-181d expression, results were correlated with further individual clinical data. The Cancer Genome Atlas (TCGA) dataset of 149 patients was used as an independent cohort to validate the results. Patients in the carmustine wafer group with low miRNA-181d expression had significantly longer overall (hazard ratio [HR], 35.03, [95% confidence interval (CI): 3.50-350.23], P = .002) and progression-free survival (HR, 20.23, [95% CI: 2.19-186.86], P = .008) than patients of the same group with a high miRNA-181d expression. These correlations were not observed in the control group. The nonsignificance in the control group was confirmed in the independent TCGA dataset. The carmustine wafer group patients with low miRNA-181d expression also had a significantly longer progression-free (P = .049) and overall survival (OS) (P = .034), compared with control group patients. Gross total resection correlated significantly with longer OS (P = .023). MiRNA-181d expression significantly affects treatment responses to carmustine wafer implantation.

Grain-boundary type and distribution in silicon carbide coatings and wafers

NASA Astrophysics Data System (ADS)

Cancino-Trejo, Felix; López-Honorato, Eddie; Walker, Ross C.; Ferrer, Romelia Salomon

2018-03-01

Silicon carbide is the main diffusion barrier against metallic fission products in TRISO (tristructural isotropic) coated fuel particles. The explanation of the accelerated diffusion of silver through SiC has remained a challenge for more than four decades. Although, it is now well accepted that silver diffuse through SiC by grain boundary diffusion, little is known about the characteristics of the grain boundaries in SiC and how these change depending on the type of sample. In this work five different types (coatings and wafers) of SiC produced by chemical vapor deposition were characterized by electron backscatter diffraction (EBSD). The SiC in TRISO particles had a higher concentration of high angle grain boundaries (aprox. 70%) compared to SiC wafers, which ranged between 30 and 60%. Similarly, SiC wafers had a higher concentration of low angle grain boundaries ranging between 15 and 30%, whereas TRISO particles only reached values of around 7%. The same trend remained when comparing the content of coincidence site lattice (CSL) boundaries, since SiC wafers showed a concentration of more than 30%, whilst TRISO particles had contents of around 20%. In all samples the largest fractions of CSL boundaries (3 ≤ Σ ≤ 17) were the Σ3 boundaries. We show that there are important differences between the SiC in TRISO particles and SiC wafers which could explain some of the differences observed in diffusion experiments in the literature.

Propagation of resist heating mask error to wafer level

NASA Astrophysics Data System (ADS)

Babin, S. V.; Karklin, Linard

2006-10-01

As technology is approaching 45 nm and below the IC industry is experiencing a severe product yield hit due to rapidly shrinking process windows and unavoidable manufacturing process variations. Current EDA tools are unable by their nature to deliver optimized and process-centered designs that call for 'post design' localized layout optimization DFM tools. To evaluate the impact of different manufacturing process variations on final product it is important to trace and evaluate all errors through design to manufacturing flow. Photo mask is one of the critical parts of this flow, and special attention should be paid to photo mask manufacturing process and especially to mask tight CD control. Electron beam lithography (EBL) is a major technique which is used for fabrication of high-end photo masks. During the writing process, resist heating is one of the sources for mask CD variations. Electron energy is released in the mask body mainly as heat, leading to significant temperature fluctuations in local areas. The temperature fluctuations cause changes in resist sensitivity, which in turn leads to CD variations. These CD variations depend on mask writing speed, order of exposure, pattern density and its distribution. Recent measurements revealed up to 45 nm CD variation on the mask when using ZEP resist. The resist heating problem with CAR resists is significantly smaller compared to other types of resists. This is partially due to higher resist sensitivity and the lower exposure dose required. However, there is no data yet showing CD errors on the wafer induced by CAR resist heating on the mask. This effect can be amplified by high MEEF values and should be carefully evaluated at 45nm and below technology nodes where tight CD control is required. In this paper, we simulated CD variation on the mask due to resist heating; then a mask pattern with the heating error was transferred onto the wafer. So, a CD error on the wafer was evaluated subject to only one term of the

Critical and subcritical damage monitoring of bonded composite repairs using innovative non-destructive techniques

NASA Astrophysics Data System (ADS)

Grammatikos, S. A.; Kordatos, E. Z.; Aggelis, D. G.; Matikas, T. E.; Paipetis, A. S.

2012-04-01

Infrared Thermography (IrT) has been shown to be capable of detecting and monitoring service induced damage of repair composite structures. Full-field imaging, along with portability are the primary benefits of the thermographic technique. On-line lock-in thermography has been reported to successfully monitor damage propagation or/and stress concentration in composite coupons, as mechanical stresses in structures induce heat concentration phenomena around flaws. During mechanical fatigue, cyclic loading plays the role of the heating source and this allows for critical and subcritical damage identification and monitoring using thermography. The Electrical Potential Change Technique (EPCT) is a new method for damage identification and monitoring during loading. The measurement of electrical potential changes at specific points of Carbon Fiber Reinforced Polymers (CFRPs) under load are reported to enable the monitoring of strain or/and damage accumulation. Along with the aforementioned techniques Finally, Acoustic Emission (AE) method is well known to provide information about the location and type of damage. Damage accumulation due to cyclic loading imposes differentiation of certain parameters of AE like duration and energy. Within the scope of this study, infrared thermography is employed along with AE and EPCT methods in order to assess the integrity of bonded repair patches on composite substrates and to monitor critical and subcritical damage induced by the mechanical loading. The combined methodologies were effective in identifying damage initiation and propagation of bonded composite repairs.

Particle detection for patterned wafers of 100nm design rule by evanescent light illumination: analysis of evanescent light scattering using Finite-Difference Time-Domain (FDTD) method

NASA Astrophysics Data System (ADS)

Yoshioka, Toshie; Miyoshi, Takashi; Takaya, Yasuhiro

2005-12-01

To realize high productivity and reliability of the semiconductor, patterned wafers inspection technology to maintain high yield becomes essential in modern semiconductor manufacturing processes. As circuit feature is scaled below 100nm, the conventional imaging and light scattering methods are impossible to apply to the patterned wafers inspection technique, because of diffraction limit and lower S/N ratio. So, we propose a new particle detection method using annular evanescent light illumination. In this method, a converging annular light used as a light source is incident on a micro-hemispherical lens. When the converging angle is larger than critical angle, annular evanescent light is generated under the bottom surface of the hemispherical lens. Evanescent light is localized near by the bottom surface and decays exponentially away from the bottom surface. So, the evanescent light selectively illuminates the particles on the patterned wafer surface, because it can't illuminate the patterned wafer surface. The proposed method evaluates particles on a patterned wafer surface by detecting scattered evanescent light distribution from particles. To analyze the fundamental characteristics of the proposed method, the computer simulation was performed using FDTD method. The simulation results show that the proposed method is effective for detecting 100nm size particle on patterned wafer of 100nm lines and spaces, particularly under the condition that the evanescent light illumination with p-polarization and parallel incident to the line orientation. Finally, the experiment results suggest that 220nm size particle on patterned wafer of about 200nm lines and spaces can be detected.

A pin-assisted retention technique for resin-bonded restorations.

PubMed

Miara, P; Touati, B

1992-09-01

The value of pins for auxiliary retention has been demonstrated many times. The use of pins with resin-bonded restorations allows for improved aesthetics and less tooth reduction while increasing resistance to dislodging forces. Clinical and technical procedures for resin-bonded bridges with pin-assisted retention are presented.

Efficiency Improvement of HIT Solar Cells on p-Type Si Wafers.

PubMed

Wei, Chun-You; Lin, Chu-Hsuan; Hsiao, Hao-Tse; Yang, Po-Chuan; Wang, Chih-Ming; Pan, Yen-Chih

2013-11-22

Single crystal silicon solar cells are still predominant in the market due to the abundance of silicon on earth and their acceptable efficiency. Different solar-cell structures of single crystalline Si have been investigated to boost efficiency; the heterojunction with intrinsic thin layer (HIT) structure is currently the leading technology. The record efficiency values of state-of-the art HIT solar cells have always been based on n-type single-crystalline Si wafers. Improving the efficiency of cells based on p-type single-crystalline Si wafers could provide broader options for the development of HIT solar cells. In this study, we varied the thickness of intrinsic hydrogenated amorphous Si layer to improve the efficiency of HIT solar cells on p-type Si wafers.

Diffusion bonding aeroengine components

NASA Astrophysics Data System (ADS)

Fitzpatrick, G. A.; Broughton, T.

1988-10-01

The use of diffusion bonding processes at Rolls-Royce for the manufacture of titanium-alloy aircraft engine components and structures is described. A liquid-phase diffusion bonding process called activated diffusion bonding has been developed for the manufacture of the hollow titanium wide chord fan blade. In addition, solid-state diffusion bonding is being used in the manufacture of hollow vane/blade airfoil constructions mainly in conjunction with superplastic forming and hot forming techniques.

Smoother Scribing of Silicon Wafers

NASA Technical Reports Server (NTRS)

Danyluk, S.

1986-01-01

Proposed new tool used to scribe silicon wafers into chips more smoothly than before. New scriber produces surface that appears ductile. Scribed groove cuts have relatively smooth walls. Scriber consists of diamond pyramid point on rigid shaft. Ethanol flows through shaft and around point, like ink in ballpoint pen. Ethanol has significantly different effect for scribing silicon than water, used in conventional diamond scribers.

System and Method for Fabricating Super Conducting Circuitry on Both Sides of an Ultra-Thin Layer

NASA Technical Reports Server (NTRS)

Brown, Ari D. (Inventor); Mikula, Vilem (Inventor)

2017-01-01

A method of fabricating circuitry in a wafer includes depositing a superconducting metal on a silicon on insulator wafer having a handle wafer, coating the wafer with a sacrificial layer and bonding the wafer to a thermally oxide silicon wafer with a first epoxy. The method includes flipping the wafer, thinning the flipped wafer by removing a handle wafer, etching a buried oxide layer, depositing a superconducting layer, bonding the wafer to a thermally oxidized silicon wafer having a handle wafer using an epoxy, flipping the wafer again, thinning the flipped wafer, etching a buried oxide layer from the wafer and etching the sacrificial layer from the wafer. The result is a wafer having superconductive circuitry on both sides of an ultra-thin silicon layer.

A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging.

PubMed

Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo

2015-09-21

This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.

Method for wafer edge profile extraction using optical images obtained in edge defect inspection process

NASA Astrophysics Data System (ADS)

Okamoto, Hiroaki; Sakaguchi, Naoshi; Hayano, Fuminori

2010-03-01

It is becoming increasingly important to monitor wafer edge profiles in the immersion lithography era. A Nikon edge defect inspection tool acquires the circumferential optical images of the wafer edge during its inspection process. Nikon's unique illumination system and optics make it possible to then convert the brightness data of the captured images to quantifiable edge profile information. During this process the wafer's outer shape is also calculated. Test results show that even newly shipped bare wafers may not have a constant shape over 360 degree. In some cases repeated deformations with 90 degree pitch are observed.

Welding, Bonding and Fastening, 1984

NASA Technical Reports Server (NTRS)

Buckley, J. D. (Editor); Stein, B. A. (Editor)

1985-01-01

A compilation of papers presented in a joint NASA, American Society for Metals, The George Washington University, American Welding Soceity, and Society of Manufacturing Engineers conference on Welding, Bonding, and Fastening at Langley Research Center, Hampton, VA, on October 23 to 25, 1984 is given. Papers were presented on technology developed in current research programs relevant to welding, bonding, and fastening of structural materials required in fabricating structures and mechanical systems used in the aerospace, hydrospace, and automotive industries. Topics covered in the conference included equipment, hardware and materials used when welding, brazing, and soldering, mechanical fastening, explosive welding, use of unique selected joining techniques, adhesives bonding, and nondestructive evaluation. A concept of the factory of the future was presented, followed by advanced welding techniques, automated equipment for welding, welding in a cryogenic atmosphere, blind fastening, stress corrosion resistant fasteners, fastening equipment, explosive welding of different configurations and materials, solid-state bonding, electron beam welding, new adhesives, effects of cryogenics on adhesives, and new techniques and equipment for adhesive bonding.

CD-measurement technique for hole patterns on stencil mask

NASA Astrophysics Data System (ADS)

Ishikawa, Mikio; Yusa, Satoshi; Takikawa, Tadahiko; Fujita, Hiroshi; Sano, Hisatake; Hoga, Morihisa; Hayashi, Naoya

2004-12-01

EB lithography has a potential to successfully form hole patterns as small as 80 nm with a stencil mask. In a previous paper we proposed a technique using a HOLON dual-mode critical dimension (CD) SEM ESPA-75S in the transmission mode for CD measurement of line-and-space patterns on a stencil mask. In this paper we extend our effort of developing a CD measurement technique to contact hole features and determine it in comparison of measured values between features on mask and those printed on wafer. We have evaluated the width method and the area methods using designed 80-500 nm wide contact hole patterns on a large area membrane mask and their resist images on wafer printed by a LEEPL3000. We find that 1) the width method and the area methods show an excellent mask-wafer correlation for holes over 110 nm, and 2) the area methods show a better mask-wafer correlation than the width method does for holes below 110 nm. We conclude that the area calculated from the transmission SEM image is more suitable in defining the hole dimensions than the width for contact holes on a stencil mask.

Wafer-level radiometric performance testing of uncooled microbolometer arrays

NASA Astrophysics Data System (ADS)

Dufour, Denis G.; Topart, Patrice; Tremblay, Bruno; Julien, Christian; Martin, Louis; Vachon, Carl

2014-03-01

A turn-key semi-automated test system was constructed to perform on-wafer testing of microbolometer arrays. The system allows for testing of several performance characteristics of ROIC-fabricated microbolometer arrays including NETD, SiTF, ROIC functionality, noise and matrix operability, both before and after microbolometer fabrication. The system accepts wafers up to 8 inches in diameter and performs automated wafer die mapping using a microscope camera. Once wafer mapping is completed, a custom-designed quick insertion 8-12 μm AR-coated Germanium viewport is placed and the chamber is pumped down to below 10-5 Torr, allowing for the evaluation of package-level focal plane array (FPA) performance. The probe card is electrically connected to an INO IRXCAM camera core, a versatile system that can be adapted to many types of ROICs using custom-built interface printed circuit boards (PCBs). We currently have the capability for testing 384x288, 35 μm pixel size and 160x120, 52 μm pixel size FPAs. For accurate NETD measurements, the system is designed to provide an F/1 view of two rail-mounted blackbodies seen through the Germanium window by the die under test. A master control computer automates the alignment of the probe card to the dies, the positioning of the blackbodies, FPA image frame acquisition using IRXCAM, as well as data analysis and storage. Radiometric measurement precision has been validated by packaging dies measured by the automated probing system and re-measuring the SiTF and Noise using INO's pre-existing benchtop system.

Validation of Direct Analysis Real Time source/Time-of-Flight Mass Spectrometry for organophosphate quantitation on wafer surface.

PubMed

Hayeck, Nathalie; Ravier, Sylvain; Gemayel, Rachel; Gligorovski, Sasho; Poulet, Irène; Maalouly, Jacqueline; Wortham, Henri

2015-11-01

Microelectronic wafers are exposed to airborne molecular contamination (AMC) during the fabrication process of microelectronic components. The organophosphate compounds belonging to the dopant group are one of the most harmful groups. Once adsorbed on the wafer surface these compounds hardly desorb and could diffuse in the bulk of the wafer and invert the wafer from p-type to n-type. The presence of these compounds on wafer surface could have electrical effect on the microelectronic components. For these reasons, it is of importance to control the amount of these compounds on the surface of the wafer. As a result, a fast quantitative and qualitative analytical method, nondestructive for the wafers, is needed to be able to adjust the process and avoid the loss of an important quantity of processed wafers due to the contamination by organophosphate compounds. Here we developed and validated an analytical method for the determination of organic compounds adsorbed on the surface of microelectronic wafers using the Direct Analysis in Real Time-Time of Flight-Mass Spectrometry (DART-ToF-MS) system. Specifically, the developed methodology concerns the organophosphate group. Copyright © 2015 Elsevier B.V. All rights reserved.

Epitaxial gallium arsenide wafers

NASA Technical Reports Server (NTRS)

Black, J. F.; Robinson, L. B.

1971-01-01

The preparation of GaAs epitaxial layers by a vapor transport process using AsCl3, Ga and H2 was pursued to provide epitaxial wafers suitable for the fabrication of transferred electron oscillators and amplifiers operating in the subcritical region. Both n-n(+) structures, and n(++)-n-n(+) sandwich structures were grown using n(+) (Si-doped) GaAs substrates. Process variables such as the input AsCl3 concentration, gallium temperature, and substrate temperature and temperature gradient and their effects on properties are presented and discussed.

Nanoimprint wafer and mask tool progress and status for high volume semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Matsuoka, Yoichi; Seki, Junichi; Nakayama, Takahiro; Nakagawa, Kazuki; Azuma, Hisanobu; Yamamoto, Kiyohito; Sato, Chiaki; Sakai, Fumio; Takabayashi, Yukio; Aghili, Ali; Mizuno, Makoto; Choi, Jin; Jones, Chris E.

2016-10-01

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. There are many criteria that determine whether a particular technology is ready for wafer manufacturing. Defectivity and mask life play a significant role relative to meeting the cost of ownership (CoO) requirements in the production of semiconductor devices. Hard particles on a wafer or mask create the possibility of inducing a permanent defect on the mask that can impact device yield and mask life. By using material methods to reduce particle shedding and by introducing an air curtain system, the lifetime of both the master mask and the replica mask can be extended. In this work, we report results that demonstrate a path towards achieving mask lifetimes of better than 1000 wafers. On the mask side, a new replication tool, the FPA-1100 NR2 is introduced. Mask replication is required for nanoimprint lithography (NIL), and criteria that are crucial to the success of a replication platform include both particle control, resolution and image placement accuracy. In this paper we discuss the progress made in both feature resolution and in meeting the image placement specification for replica masks.

Wafer-level fabrication of arrays of glass lens doublets

NASA Astrophysics Data System (ADS)

Passilly, Nicolas; Perrin, Stéphane; Albero, Jorge; Krauter, Johann; Gaiffe, Olivier; Gauthier-Manuel, Ludovic; Froehly, Luc; Lullin, Justine; Bargiel, Sylwester; Osten, Wolfgang; Gorecki, Christophe

2016-04-01

Systems for imaging require to employ high quality optical components in order to dispose of optical aberrations and thus reach sufficient resolution. However, well-known methods to get rid of optical aberrations, such as aspherical profiles or diffractive corrections are not easy to apply to micro-optics. In particular, some of these methods rely on polymers which cannot be associated when such lenses are to be used in integrated devices requiring high temperature process for their further assembly and separation. Among the different approaches, the most common is the lens splitting that consists in dividing the focusing power between two or more optical components. In here, we propose to take advantage of a wafer-level technique, devoted to the generation of glass lenses, which involves thermal reflow in silicon cavities to generate lens doublets. After the convex lens sides are generated, grinding and polishing of both stack sides allow, on the first hand, to form the planar lens backside and, on the other hand, to open the silicon cavity. Nevertheless, silicon frames are then kept and thinned down to form well-controlled and auto-aligned spacers between the lenses. Subsequent accurate vertical assembly of the glass lens arrays is performed by anodic bonding. The latter ensures a high level of alignment both laterally and axially since no additional material is required. Thanks to polishing, the generated lens doublets are then as thin as several hundreds of microns and compatible with micro-opto-electro-systems (MOEMS) technologies since they are only made of glass and silicon. The generated optical module is then robust and provide improved optical performances. Indeed, theoretically, two stacked lenses with similar features and spherical profiles can be almost diffraction limited whereas a single lens characterized by the same numerical aperture than the doublet presents five times higher wavefront error. To demonstrate such assumption, we fabricated glass

Advances in process overlay on 300-mm wafers

NASA Astrophysics Data System (ADS)

Staecker, Jens; Arendt, Stefanie; Schumacher, Karl; Mos, Evert C.; van Haren, Richard J. F.; van der Schaar, Maurits; Edart, Remi; Demmerle, Wolfgang; Tolsma, Hoite

2002-07-01

Overlay budgets are getting tighter within 300 mm volume production and as a consequence the process effects on alignment and off-line metrology becomes more important. In a short loop experiment, with cleared reference marks in each image field, the isolated effect of processing was measured with a sub-nanometer accuracy. The examined processes are Shallow Trench Isolation (STI), Tungsten-Chemical Mechanical Processing (W-CMP) and resist spinning. The alignment measurements were done on an ASML TWINSCANT scanner and the off-line metrology measurements on a KLA Tencor. Mark type and mark position dependency of the process effects are analyzed. The mean plus 3 (sigma) of the maximum overlay after correcting batch average wafer parameters is used as an overlay performance indicator (OPI). 3 (sigma) residuals to the wafer-model are used as an indicator of the noise that is added by the process. The results are in agreement with existing knowledge of process effects on 200 mm wafers. The W-CMP process introduces an additional wafer rotation and scaling that is similar for alignment marks and metrology targets. The effects depend on the mark type; in general they get less severe for higher spatial frequencies. For a 7th order alignment mark, the OPI measured about 12 nm and the added noise about 12 nm. For the examined metrology targets the OPI is about 20 nm with an added noise of about 90 nm. Two different types of alignment marks were tested in the STI process, i.e., zero layer marks and marks that were exposed together with the STI product. The overlay contribution due to processing on both types of alignment marks is very low (smaller than 5 nm OPI) and independent on mark type. Some flyers are observed fot the zero layer marks. The flyers can be explained by the residues of oxide and nitride that is left behind in the spaces of the alignment marks. Resist spinning is examined on single layer resist and resist with an organic Bottom Anti-Reflective Coating (BARC

Wafer-size free-standing single-crystalline graphene device arrays

NASA Astrophysics Data System (ADS)

Li, Peng; Jing, Gaoshan; Zhang, Bo; Sando, Shota; Cui, Tianhong

2014-08-01

We report an approach of wafer-scale addressable single-crystalline graphene (SCG) arrays growth by using pre-patterned seeds to control the nucleation. The growth mechanism and superb properties of SCG were studied. Large array of free-standing SCG devices were realized. Characterization of SCG as nano switches shows excellent performance with life time (>22 000 times) two orders longer than that of other graphene nano switches reported so far. This work not only shows the possibility of producing wafer-scale high quality SCG device arrays but also explores the superb performance of SCG as nano devices.

Computational Modeling in Plasma Processing for 300 mm Wafers

NASA Technical Reports Server (NTRS)

Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

1997-01-01

Migration toward 300 mm wafer size has been initiated recently due to process economics and to meet future demands for integrated circuits. A major issue facing the semiconductor community at this juncture is development of suitable processing equipment, for example, plasma processing reactors that can accomodate 300 mm wafers. In this Invited Talk, scaling of reactors will be discussed with the aid of computational fluid dynamics results. We have undertaken reactor simulations using CFD with reactor geometry, pressure, and precursor flow rates as parameters in a systematic investigation. These simulations provide guidelines for scaling up in reactor design.

Rapid adhesive bonding concepts

NASA Technical Reports Server (NTRS)

Stein, B. A.; Tyeryar, J. R.; Hodges, W. T.

1984-01-01

Adhesive bonding in the aerospace industry typically utilizes autoclaves or presses which have considerable thermal mass. As a consequence, the rates of heatup and cooldown of the bonded parts are limited and the total time and cost of the bonding process is often relatively high. Many of the adhesives themselves do not inherently require long processing times. Bonding could be performed rapidly if the heat was concentrated in the bond lines or at least in the adherends. Rapid adhesive bonding concepts were developed to utilize induction heating techniques to provide heat directly to the bond line and/or adherends without heating the entire structure, supports, and fixtures of a bonding assembly. Bonding times for specimens are cut by a factor of 10 to 100 compared to standard press bonding. The development of rapid adhesive bonding for lap shear specimens (per ASTM D1003 and D3163), for aerospace panel bonding, and for field repair needs of metallic and advanced fiber reinforced polymeric matrix composite structures are reviewed.

Laser treatment of plasma-hydrogenated silicon wafers for thin layer exfoliation

NASA Astrophysics Data System (ADS)

Ghica, Corneliu; Nistor, Leona Cristina; Teodorescu, Valentin Serban; Maraloiu, Adrian; Vizireanu, Sorin; Scarisoreanu, Nae Doinel; Dinescu, Maria

2011-03-01

We have studied by transmission electron microscopy the microstructural effects induced by pulsed laser annealing in comparison with thermal treatments of RF plasma hydrogenated Si wafers aiming for further application in the smart-cut procedure. While thermal annealing mainly produces a slight decrease of the density of plasma-induced planar defects and an increase of the size and number of plasma-induced nanocavities in the Si matrix, pulsed laser annealing of RF plasma hydrogenated Si wafers with a 355 nm wavelength radiation results in both the healing of defects adjacent to the wafer surface and the formation of a well defined layer of nanometric cavities at a depth of 25-50 nm. In this way, a controlled fracture of single crystal layers of Si thinner than 50 nm is favored.

Ultrasonic, microwave, and millimeter wave inspection techniques for adhesively bonded stacked open honeycomb core composites

NASA Astrophysics Data System (ADS)

Thomson, Clint D.; Cox, Ian; Ghasr, Mohammad Tayeb Ahmed; Ying, Kuang P.; Zoughi, Reza

2015-03-01

Honeycomb sandwich composites are used extensively in the aerospace industry to provide stiffness and thickness to lightweight structures. A common fabrication method for thick, curved sandwich structures is to stack and bond multiple honeycomb layers prior to machining core curvatures. Once bonded, each adhesive layer must be inspected for delaminations and the presence of unwanted foreign materials. From a manufacturing and cost standpoint, it can be advantageous to inspect the open core prior to face sheet closeout in order to reduce end-article scrap rates. However, by nature, these honeycomb sandwich composite structures are primarily manufactured from low permittivity and low loss materials making detection of delamination and some of the foreign materials (which also are low permittivity and low loss) quite challenging in the microwave and millimeter wave regime. Likewise, foreign materials such as release film in adhesive layers can be sufficiently thin as to not cause significant attenuation in through-transmission ultrasonic signals, making them difficult to detect. This paper presents a collaborative effort intended to explore the efficacy of different non-contact NDI techniques for detecting flaws in a stacked open fiberglass honeycomb core panel. These techniques primarily included air-coupled through-transmission ultrasonics, single-sided wideband synthetic aperture microwave and millimeter-wave imaging, and lens-focused technique. The goal of this investigation has been to not only evaluate the efficacy of these techniques, but also to determine their unique advantages and limitations for evaluating parameters such as flaw type, flaw size, and flaw depth.

Rapid adhesive bonding of advanced composites and titanium

NASA Technical Reports Server (NTRS)

Stein, B. A.; Tyeryart, J. R.; Hodgest, W. T.

1985-01-01

Rapid adhesive bonding (RAB) concepts utilize a toroid induction technique to heat the adhesive bond line directly. This technique was used to bond titanium overlap shear specimens with 3 advanced thermoplastic adhesives and APC-2 (graphite/PEEK) composites with PEEK film. Bond strengths equivalent to standard heated-platen press bonds were produced with large reductions in process time. RAB produced very strong bonds in APC-2 adherend specimens; the APC-2 adherends were highly resistant to delamination. Thermal cycling did not significantly affect the shear strengths of RAB titanium bonds with polyimide adhesives. A simple ultrasonic non-destructive evaluation process was found promising for evaluating bond quality.

Combined surface activated bonding using H-containing HCOOH vapor treatment for Cu/Adhesive hybrid bonding at below 200 °C

NASA Astrophysics Data System (ADS)

He, Ran; Fujino, Masahisa; Akaike, Masatake; Sakai, Taiji; Sakuyama, Seiki; Suga, Tadatomo

2017-08-01

Cu/adhesive hybrid bonding is an attractive approach to three-dimensional (3D) integration because it provides direct Cusbnd Cu vertical interconnects and high mechanical stability. However, Cu/adhesive hybrid bonding at below 200 °C is still challenging because of bonding temperature mismatch between Cusbnd Cu and polymer adhesives and lacking of effective adhesive-compatible Cu surface activation methods. In this paper, we investigate and demonstrate a ;Cu-first; hybrid bonding technique by using hydrogen(H)-containing formic acid (HCOOH) vapor prebonding surface treatment for the first time. In this technique, high-quality Cusbnd Cu bonding is obtained at 180-200 °C that is close to or even lower than the temperature of subsequent adhesive curing. We experimentally investigate the effects of the H-containing HCOOH vapor treatment for Cusbnd Cu bonding and cyclo-olefin polymer adhesive-adhesive bonding. This technique enables Cu/adhesive hybrid bonding at below 200 °C, promising smaller thermal stress, higher throughput, and lower cost comparing to the existing ;adhesive-first; hybrid bonding method.

Resonance ultrasonic diagnostics of defects in full-size silicon wafers

NASA Astrophysics Data System (ADS)

Belyaev, A.; Ostapenko, S.

2001-12-01

A resonance acoustic effect was observed recently in full-size 200 mm Cz-Si wafers and applied to characterize as-grown and process-induced defects. Ultrasonic vibrations can be excited into wafers using an external ultrasonic transducer and their amplitude is recorded using a scanning air-coupled acoustic probe operated in a non-contact mode. By sweeping driving frequency, f, of the transducer, we observed an amplification of a specific acoustic mode referred to as ‘whistle’. In this paper, we performed theoretical modeling of the whistle which allowed in attributing this mode to resonant flexural vibrations in a thin circular plate. We calculated normal frequencies of the flexural vibrations of a circular plate of radius ρ in the case of the free edge. The model gives an excellent fit to experimental data with regard to whistle spatial distribution. The results of calculation allow the evaluation of resonance acoustic effect in wafers of different geometries employed in the industry.

Nondestructive Evaluation of Adhesive Bonds via Ultrasonic Phase Measurements

NASA Technical Reports Server (NTRS)

Haldren, Harold A.; Perey, Daniel F.; Yost, William T.; Cramer, K. Elliott; Gupta, Mool C.

2016-01-01

The use of advanced composites utilizing adhesively bonded structures offers advantages in weight and cost for both the aerospace and automotive industries. Conventional nondestructive evaluation (NDE) has proved unable to reliably detect weak bonds or bond deterioration during service life conditions. A new nondestructive technique for quantitatively measuring adhesive bond strength is demonstrated. In this paper, an ultrasonic technique employing constant frequency pulsed phased-locked loop (CFPPLL) circuitry to monitor the phase response of a bonded structure from change in thermal stress is discussed. Theoretical research suggests that the thermal response of a bonded interface relates well with the quality of the adhesive bond. In particular, the effective stiffness of the adhesive-adherent interface may be extracted from the thermal phase response of the structure. The sensitivity of the CFPPLL instrument allows detection of bond pathologies that have been previously difficult-to-detect. Theoretical results with this ultrasonic technique on single epoxy lap joint (SLJ) specimens are presented and discussed. This technique has the potential to advance the use of adhesive bonds - and by association, advanced composite structures - by providing a reliable method to measure adhesive bond strength, thus permitting more complex, lightweight, and safe designs.

Optical cavity furnace for semiconductor wafer processing

DOEpatents

Sopori, Bhushan L.

2014-08-05

An optical cavity furnace 10 having multiple optical energy sources 12 associated with an optical cavity 18 of the furnace. The multiple optical energy sources 12 may be lamps or other devices suitable for producing an appropriate level of optical energy. The optical cavity furnace 10 may also include one or more reflectors 14 and one or more walls 16 associated with the optical energy sources 12 such that the reflectors 14 and walls 16 define the optical cavity 18. The walls 16 may have any desired configuration or shape to enhance operation of the furnace as an optical cavity 18. The optical energy sources 12 may be positioned at any location with respect to the reflectors 14 and walls defining the optical cavity. The optical cavity furnace 10 may further include a semiconductor wafer transport system 22 for transporting one or more semiconductor wafers 20 through the optical cavity.

"Performance Of A Wafer Stepper With Automatic Intra-Die Registration Correction."

NASA Astrophysics Data System (ADS)

van den Brink, M. A.; Wittekoek, S.; Linders, H. F. D.; van Hout, F. J.; George, R. A.

1987-01-01

An evaluation of a wafer stepper with the new improved Philips/ASM-L phase grating alignment system is reported. It is shown that an accurate alignment system needs an accurate X-Y-0 wafer stage and an accurate reticle Z stage to realize optimum overlay accuracy. This follows from a discussion of the overlay budget and an alignment procedure model. The accurate wafer stage permits high overlay accuracy using global alignment only, thus eliminating the throughput penalty of align-by-field schemes. The accurate reticle Z stage enables an intra-die magnification control with respect to the wafer scale. Various overlay data are reported, which have been measured with the automatic metrology program of the stepper. It is demonstrated that the new dual alignment system (with the external spatial filter) has improved the ability to align to weakly reflecting layers. The results are supported by a Fourier analysis of the alignment signal. Resolution data are given for the PAS 2500 projection lenses, which show that the high overlay accuracy of the system is properly matched with submicron linewidth control. The results of a recently introduced 20mm i-line lens with a numerical aperture of 0.4 (Zeiss 10-78-58) are included.

Etching Selectivity of Cr, Fe and Ni Masks on Si & SiO2 Wafers

NASA Astrophysics Data System (ADS)

Garcia, Jorge; Lowndes, Douglas H.

2000-10-01

During this Summer 2000 I joined the Semiconductors and Thin Films group led by Dr. Douglas H. Lowndes at Oak Ridge National Laboratory’s Solid State Division. Our objective was to evaluate the selectivity that Trifluoromethane (CHF3), and Sulfur Hexafluoride (SF6) plasmas have for Si, SiO2 wafers and the Ni, Cr, and Fe masks; being this etching selectivity the ratio of the etching rates of the plasmas for each of the materials. We made use of Silicon and Silicon Dioxide-coated wafers that have Fe, Cr or Ni masks. In the semiconductor field, metal layers are often used as masks to protect layers underneath during processing steps; when these wafers are taken to the dry etching process, both the wafer and the mask layers’ thickness are reduced.

Dissolution of Oxygen Precipitate Nuclei in n-Type CZ-Si Wafers to Improve Their Material Quality: Experimental Results

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sopori, Bhushan; Basnyat, Prakash; Devayajanam, Srinivas

2017-01-01

We present experimental results which show that oxygen-related precipitate nuclei (OPN) present in p-doped, n-type, Czochralski wafers can be dissolved using a flash-annealing process, yielding very high quality wafers for high-efficiency solar cells. Flash annealing consists of heating a wafer in an optical furnace to temperature between 1150 and 1250 degrees C for a short time. This process produces a large increase in the minority carrier lifetime (MCLT) and homogenizes each wafer. We have tested wafers from different axial locations of two ingots. All wafers reach nearly the same high value of MCLT. The OPN dissolution is confirmed by oxygenmore » analysis using Fourier transform infrared spectra and injection-level dependence of MCLT.« less

Graphene-Decorated Nanocomposites for Printable Electrodes in Thin Wafer Devices

NASA Astrophysics Data System (ADS)

Bakhshizadeh, N.; Sivoththaman, S.

2017-12-01

Printable electrodes that induce less stress and require lower curing temperatures compared to traditional screen-printed metal pastes are needed in thin wafer devices such as future solar cells, and in flexible electronics. The synthesis of nanocomposites by incorporating graphene nanopowders as well as silver nanowires into epoxy-based electrically conductive adhesives (ECA) is examined to improve electrical conductivity and to develop alternate printable electrode materials that induce less stress on the wafer. For the synthesized graphene and Ag nanowire-decorated ECA nanocomposites, the curing kinetics were studied by dynamic and isothermal differential scanning calorimetry measurements. Thermogravimetric analysis on ECA, ECA-AG and ECA/graphene nanopowder nanocomposites showed that the temperatures for onset of decomposition are higher than their corresponding glass transition temperature ( T g) indicating an excellent thermal resistance. Printed ECA/Ag nanowire nanocomposites showed 90% higher electrical conductivity than ECA films, whereas the ECA/graphene nanocomposites increased the conductivity by over two orders of magnitude. Scanning electron microscopy results also revealed the effect of fillers morphology on the conductivity improvement and current transfer mechanisms in nanocomposites. Residual stress analysis performed on Si wafers showed that the ECA and nanocomposite printed wafers are subjected to much lower stress compared to those printed with metallic pastes. The observed parameters of low curing temperature, good thermal resistance, reasonably high conductivity, and low residual stress in the ECA/graphene nanocomposite makes this material a promising alternative in screen-printed electrode formation in thin substrates.

Chemical method for producing smooth surfaces on silicon wafers

DOEpatents

Yu, Conrad

2003-01-01

An improved method for producing optically smooth surfaces in silicon wafers during wet chemical etching involves a pre-treatment rinse of the wafers before etching and a post-etching rinse. The pre-treatment with an organic solvent provides a well-wetted surface that ensures uniform mass transfer during etching, which results in optically smooth surfaces. The post-etching treatment with an acetic acid solution stops the etching instantly, preventing any uneven etching that leads to surface roughness. This method can be used to etch silicon surfaces to a depth of 200 .mu.m or more, while the finished surfaces have a surface roughness of only 15-50 .ANG. (RMS).

Polarized Optical Scattering Measurements of Metallic Nanoparticles on a Thin Film Silicon Wafer

NASA Astrophysics Data System (ADS)

Liu, Cheng-Yang; Liu, Tze-An; Fu, Wei-En

2009-09-01

Light scattering has shown its powerful diagnostic capability to characterize optical quality surfaces. In this study, the theory of bidirectional reflectance distribution function (BRDF) was used to analyze the metallic nanoparticles' sizes on wafer surfaces. The BRDF of a surface is defined as the angular distribution of radiance scattered by the surface normalized by the irradiance incident on the surface. A goniometric optical scatter instrument has been developed to perform the BRDF measurements on polarized light scattering on wafer surfaces for the diameter and distribution measurements of metallic nanoparticles. The designed optical scatter instrument is capable of distinguishing various types of optical scattering characteristics, which are corresponding to the diameters of the metallic nanoparticles, near surfaces by using the Mueller matrix calculation. The metallic nanoparticle diameter of measurement is 60 nm on 2 inch thin film wafers. These measurement results demonstrate that the polarization of light scattered by metallic particles can be used to determine the size of metallic nanoparticles on silicon wafers.

A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging

PubMed Central

Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo

2015-01-01

This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%. PMID:26402679

Evaluation of a cyanoacrylate dressing to manage peristomal skin alterations under ostomy skin barrier wafers.

PubMed