Sample records for wafer inspection tools

  1. Wafer plane inspection for advanced reticle defects

    NASA Astrophysics Data System (ADS)

    Nagpal, Rajesh; Ghadiali, Firoz; Kim, Jun; Huang, Tracy; Pang, Song

    2008-05-01

    Readiness of new mask defect inspection technology is one of the key enablers for insertion & transition of the next generation technology from development into production. High volume production in mask shops and wafer fabs demands a reticle inspection system with superior sensitivity complemented by a low false defect rate to ensure fast turnaround of reticle repair and defect disposition (W. Chou et al 2007). Wafer Plane Inspection (WPI) is a novel approach to mask defect inspection, complementing the high resolution inspection capabilities of the TeraScanHR defect inspection system. WPI is accomplished by using the high resolution mask images to construct a physical mask model (D. Pettibone et al 1999). This mask model is then used to create the mask image in the wafer aerial plane. A threshold model is applied to enhance the inspectability of printing defects. WPI can eliminate the mask restrictions imposed on OPC solutions by inspection tool limitations in the past. Historically, minimum image restrictions were required to avoid nuisance inspection stops and/or subsequent loss of sensitivity to defects. WPI has the potential to eliminate these limitations by moving the mask defect inspections to the wafer plane. This paper outlines Wafer Plane Inspection technology, and explores the application of this technology to advanced reticle inspection. A total of twelve representative critical layers were inspected using WPI die-to-die mode. The results from scanning these advanced reticles have shown that applying WPI with a pixel size of 90nm (WPI P90) captures all the defects of interest (DOI) with low false defect detection rates. In validating CD predictions, the delta CDs from WPI are compared against Aerial Imaging Measurement System (AIMS), where a good correlation is established between WPI and AIMSTM.

  2. Automated reticle inspection data analysis for wafer fabs

    NASA Astrophysics Data System (ADS)

    Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

    2008-10-01

    To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity DefecTM data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

  3. Automated reticle inspection data analysis for wafer fabs

    NASA Astrophysics Data System (ADS)

    Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

    2009-04-01

    To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity Defect(R) data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

  4. Automated reticle inspection data analysis for wafer fabs

    NASA Astrophysics Data System (ADS)

    Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

    2009-03-01

    To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity DefectTM data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

  5. Enhanced capture rate for haze defects in production wafer inspection

    NASA Astrophysics Data System (ADS)

    Auerbach, Ditza; Shulman, Adi; Rozentsvige, Moshe

    2010-03-01

    Photomask degradation via haze defect formation is an increasing troublesome yield problem in the semiconductor fab. Wafer inspection is often utilized to detect haze defects due to the fact that it can be a bi-product of process control wafer inspection; furthermore, the detection of the haze on the wafer is effectively enhanced due to the multitude of distinct fields being scanned. In this paper, we demonstrate a novel application for enhancing the wafer inspection tool's sensitivity to haze defects even further. In particular, we present results of bright field wafer inspection using the on several photo layers suffering from haze defects. One way in which the enhanced sensitivity can be achieved in inspection tools is by using a double scan of the wafer: one regular scan with the normal recipe and another high sensitivity scan from which only the repeater defects are extracted (the non-repeater defects consist largely of noise which is difficult to filter). Our solution essentially combines the double scan into a single high sensitivity scan whose processing is carried out along two parallel routes (see Fig. 1). Along one route, potential defects follow the standard recipe thresholds to produce a defect map at the nominal sensitivity. Along the alternate route, potential defects are used to extract only field repeater defects which are identified using an optimal repeater algorithm that eliminates "false repeaters". At the end of the scan, the two defect maps are merged into one with optical scan images available for all the merged defects. It is important to note, that there is no throughput hit; in addition, the repeater sensitivity is increased relative to a double scan, due to a novel runtime algorithm implementation whose memory requirements are minimized, thus enabling to search a much larger number of potential defects for repeaters. We evaluated the new application on photo wafers which consisted of both random and haze defects. The evaluation procedure

  6. Method for wafer edge profile extraction using optical images obtained in edge defect inspection process

    NASA Astrophysics Data System (ADS)

    Okamoto, Hiroaki; Sakaguchi, Naoshi; Hayano, Fuminori

    2010-03-01

    It is becoming increasingly important to monitor wafer edge profiles in the immersion lithography era. A Nikon edge defect inspection tool acquires the circumferential optical images of the wafer edge during its inspection process. Nikon's unique illumination system and optics make it possible to then convert the brightness data of the captured images to quantifiable edge profile information. During this process the wafer's outer shape is also calculated. Test results show that even newly shipped bare wafers may not have a constant shape over 360 degree. In some cases repeated deformations with 90 degree pitch are observed.

  7. ILT based defect simulation of inspection images accurately predicts mask defect printability on wafer

    NASA Astrophysics Data System (ADS)

    Deep, Prakash; Paninjath, Sankaranarayanan; Pereira, Mark; Buck, Peter

    2016-05-01

    At advanced technology nodes mask complexity has been increased because of large-scale use of resolution enhancement technologies (RET) which includes Optical Proximity Correction (OPC), Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO). The number of defects detected during inspection of such mask increased drastically and differentiation of critical and non-critical defects are more challenging, complex and time consuming. Because of significant defectivity of EUVL masks and non-availability of actinic inspection, it is important and also challenging to predict the criticality of defects for printability on wafer. This is one of the significant barriers for the adoption of EUVL for semiconductor manufacturing. Techniques to decide criticality of defects from images captured using non actinic inspection images is desired till actinic inspection is not available. High resolution inspection of photomask images detects many defects which are used for process and mask qualification. Repairing all defects is not practical and probably not required, however it's imperative to know which defects are severe enough to impact wafer before repair. Additionally, wafer printability check is always desired after repairing a defect. AIMSTM review is the industry standard for this, however doing AIMSTM review for all defects is expensive and very time consuming. Fast, accurate and an economical mechanism is desired which can predict defect printability on wafer accurately and quickly from images captured using high resolution inspection machine. Predicting defect printability from such images is challenging due to the fact that the high resolution images do not correlate with actual mask contours. The challenge is increased due to use of different optical condition during inspection other than actual scanner condition, and defects found in such images do not have correlation with actual impact on wafer. Our automated defect simulation tool predicts

  8. A novel approach: high resolution inspection with wafer plane defect detection

    NASA Astrophysics Data System (ADS)

    Hess, Carl; Wihl, Mark; Shi, Rui-fang; Xiong, Yalin; Pang, Song

    2008-05-01

    High Resolution reticle inspection is well-established as a proven, effective, and efficient means of detecting yield-limiting mask defects as well as defects which are not immediately yield-limiting yet can enable manufacturing process improvements. Historically, RAPID products have enabled detection of both classes of these defects. The newly-developed Wafer Plane Inspection (WPI) detector technology meets the needs of some advanced mask manufacturers to identify the lithographically-significant defects while ignoring the other non-lithographically-significant defects. Wafer Plane Inspection accomplishes this goal by performing defect detection based on a modeled image of how the mask features would actually print in the photoresist. This has the effect of reducing sensitivity to non-printing defects while enabling higher sensitivity focused in high MEEF areas where small reticle defects still yield significant printing defects on wafers. WPI is a new inspection mode that has been developed by KLA-Tencor and is currently under test with multiple customers. It employs the same transmitted and reflected-light high-resolution images as the industry-standard high-resolution inspections, but with much more sophisticated processing involved. A rigorous mask pattern recovery algorithm is used to convert the transmitted and reflected light images into a modeled representation of the reticle. Lithographic modeling of the scanner is then used to generate an aerial image of the mask. This is followed by resist modeling to determine the exposure of the photoresist. The defect detectors are then applied on this photoresist plane so that only printing defects are detected. Note that no hardware modifications to the inspection system are required to enable this detector. The same tool will be able to perform both our standard High Resolution inspections and the Wafer Plane Inspection detector. This approach has several important features. The ability to ignore non

  9. Optical surface analysis: a new technique for the inspection and metrology of optoelectronic films and wafers

    NASA Astrophysics Data System (ADS)

    Bechtler, Laurie; Velidandla, Vamsi

    2003-04-01

    In response to demand for higher volumes and greater product capability, integrated optoelectronic device processing is rapidly increasing in complexity, benefiting from techniques developed for conventional silicon integrated circuit processing. The needs for high product yield and low manufacturing cost are also similar to the silicon wafer processing industry. This paper discusses the design and use of an automated inspection instrument called the Optical Surface Analyzer (OSA) to evaluate two critical production issues in optoelectronic device manufacturing: (1) film thickness uniformity, and (2) defectivity at various process steps. The OSA measurement instrument is better suited to photonics process development than most equipment developed for conventional silicon wafer processing in two important ways: it can handle both transparent and opaque substrates (unlike most inspection and metrology tools), and it is a full-wafer inspection method that captures defects and film variations over the entire substrate surface (unlike most film thickness measurement tools). Measurement examples will be provided in the paper for a variety of films and substrates used for optoelectronics manufacturing.

  10. Novel two channel self-registering integrated macro inspection tool

    NASA Astrophysics Data System (ADS)

    Aiyer, Arun A.; Meloni, Mark; Kueny, Andrew; Whelan, Mike

    2005-05-01

    After Develop Inspection (ADI) of every wafer in a lot is quite appealing, since that provides an opportunity to rework defective wafers instead of scrapping them later on. To achieve this level of inspection in manufacturing, automated macro inspection tools with higher throughput, better detection sensitivity and repeatability are needed. Moreover, such an inspector will have to be located within the Coater Developer track. To have a smaller footprint inspector, one might consider spiral-scan of the wafer surface using an off-axis illumination beam. In product wafers, one comes across Manhattan geometry with L/S patterns that are usually smaller than or comparable to the illumination wavelength. Since the reflectance of such a surface depends on the incident polarization and the pattern orientation with respect to the plane of incidence, the acquired wafer surface image will have dark and bright regions. Occurrence of this type of inhomogeneity in the surface image is referred to as the bow tie effect. The bow tie feature degrades S/N ratio of the acquired image and therefore reduces the inspector"s detection sensitivity. In this paper we will describe a macro inspection tool based on a fast spiral-scan technique that eliminates the bow tie effect by propagating the illumination beam in two orthogonal planes of incidence. In addition, by employing two counter-propagating beams, the tool is shown to have the ability to generate real time defect images that are immune to noise from die-to-die thickness variations, die-to-die alignment errors, and under layer contributions.

  11. Wafer plane inspection with soft resist thresholding

    NASA Astrophysics Data System (ADS)

    Hess, Carl; Shi, Rui-fang; Wihl, Mark; Xiong, Yalin; Pang, Song

    2008-10-01

    Wafer Plane Inspection (WPI) is an inspection mode on the KLA-Tencor TeraScaTM platform that uses the high signalto- noise ratio images from the high numerical aperture microscope, and then models the entire lithographic process to enable defect detection on the wafer plane[1]. This technology meets the needs of some advanced mask manufacturers to identify the lithographically-significant defects while ignoring the other non-lithographically-significant defects. WPI accomplishes this goal by performing defect detection based on a modeled image of how the mask features would actually print in the photoresist. There are several advantages to this approach: (1) the high fidelity of the images provide a sensitivity advantage over competing approaches; (2) the ability to perform defect detection on the wafer plane allows one to only see those defects that have a printing impact on the wafer; (3) the use of modeling on the lithographic portion of the flow enables unprecedented flexibility to support arbitrary illumination profiles, process-window inspection in unit time, and combination modes to find both printing and non-printing defects. WPI is proving to be a valuable addition to the KLA-Tencor detection algorithm suite. The modeling portion of WPI uses a single resist threshold as the final step in the processing. This has been shown to be adequate on several advanced customer layers, but is not ideal for all layers. Actual resist chemistry has complicated processes including acid and base-diffusion and quench that are not consistently well-modeled with a single resist threshold. We have considered the use of an advanced resist model for WPI, but rejected it because the burdensome requirements for the calibration of the model were not practical for reticle inspection. This paper describes an alternative approach that allows for a "soft" resist threshold to be applied that provides a more robust solution for the most challenging processes. This approach is just

  12. High throughput wafer defect monitor for integrated metrology applications in photolithography

    NASA Astrophysics Data System (ADS)

    Rao, Nagaraja; Kinney, Patrick; Gupta, Anand

    2008-03-01

    The traditional approach to semiconductor wafer inspection is based on the use of stand-alone metrology tools, which while highly sensitive, are large, expensive and slow, requiring inspection to be performed off-line and on a lot sampling basis. Due to the long cycle times and sparse sampling, the current wafer inspection approach is not suited to rapid detection of process excursions that affect yield. The semiconductor industry is gradually moving towards deploying integrated metrology tools for real-time "monitoring" of product wafers during the manufacturing process. Integrated metrology aims to provide end-users with rapid feedback of problems during the manufacturing process, and the benefit of increased yield, and reduced rework and scrap. The approach of monitoring 100% of the wafers being processed requires some trade-off in sensitivity compared to traditional standalone metrology tools, but not by much. This paper describes a compact, low-cost wafer defect monitor suitable for integrated metrology applications and capable of detecting submicron defects on semiconductor wafers at an inspection rate of about 10 seconds per wafer (or 360 wafers per hour). The wafer monitor uses a whole wafer imaging approach to detect defects on both un-patterned and patterned wafers. Laboratory tests with a prototype system have demonstrated sensitivity down to 0.3 µm on un-patterned wafers and down to 1 µm on patterned wafers, at inspection rates of 10 seconds per wafer. An ideal application for this technology is preventing photolithography defects such as "hot spots" by implementing a wafer backside monitoring step prior to exposing wafers in the lithography step.

  13. A Novel Defect Inspection Method for Semiconductor Wafer Based on Magneto-Optic Imaging

    NASA Astrophysics Data System (ADS)

    Pan, Z.; Chen, L.; Li, W.; Zhang, G.; Wu, P.

    2013-03-01

    The defects of semiconductor wafer may be generated from the manufacturing processes. A novel defect inspection method of semiconductor wafer is presented in this paper. The method is based on magneto-optic imaging, which involves inducing eddy current into the wafer under test, and detecting the magnetic flux associated with eddy current distribution in the wafer by exploiting the Faraday rotation effect. The magneto-optic image being generated may contain some noises that degrade the overall image quality, therefore, in this paper, in order to remove the unwanted noise present in the magneto-optic image, the image enhancement approach using multi-scale wavelet is presented, and the image segmentation approach based on the integration of watershed algorithm and clustering strategy is given. The experimental results show that many types of defects in wafer such as hole and scratch etc. can be detected by the method proposed in this paper.

  14. Increasing reticle inspection efficiency and reducing wafer print-checks using automated defect classification and simulation

    NASA Astrophysics Data System (ADS)

    Ryu, Sung Jae; Lim, Sung Taek; Vacca, Anthony; Fiekowsky, Peter; Fiekowsky, Dan

    2013-09-01

    IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the "requal" phase for extended, non-productive periods of time. The overall "requal" cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs. Fortunately, a software program has been developed which automates defect classification with simulated printability measurement greatly reducing requal cycle time and improving overall disposition accuracy. This product, called ADAS (Auto Defect Analysis System), has been tested in both engineering and high-volume production environments with very successful results. In this paper, data is presented supporting significant reduction for costly wafer print checks, improved inspection area productivity, and minimized risk of misclassified yield limiting defects.

  15. Intentional defect array wafers: their practical use in semiconductor control and monitoring systems

    NASA Astrophysics Data System (ADS)

    Emami, Iraj; McIntyre, Michael; Retersdorf, Michael

    2003-07-01

    In the competitive world of semiconductor manufacturing today, control of the process and manufacturing equipment is paramount to success of the business. Consistent with the need for rapid development of process technology, is a need for development wiht respect to equipment control including defect metrology tools. Historical control methods for defect metrology tools included a raw count of defects detected on a characterized production or test wafer with little or not regard to the attributes of the detected defects. Over time, these characterized wafers degrade with multiple passes on the tools and handling requiring the tool owner to create and characterize new samples periodically. With the complex engineering software analysis systems used today, there is a strong reliance on the accuracy of defect size, location, and classification in order to provide the best value when correlating the in line to sort type of data. Intentional Defect Array (IDA) wafers were designed and manufacturered at International Sematech (ISMT) in Austin, Texas and is a product of collaboration between ISMT member companies and suppliers of advanced defect inspection equipment. These wafers provide the use with known defect types and sizes in predetermined locations across the entire wafer. The wafers are designed to incorporate several desired flows and use critical dimensions consistent with current and future technology nodes. This paper briefly describes the design of the IDA wafer and details many practical applications in the control of advanced defect inspection equipment.

  16. Massively parallel E-beam inspection: enabling next-generation patterned defect inspection for wafer and mask manufacturing

    NASA Astrophysics Data System (ADS)

    Malloy, Matt; Thiel, Brad; Bunday, Benjamin D.; Wurm, Stefan; Mukhtar, Maseeh; Quoi, Kathy; Kemen, Thomas; Zeidler, Dirk; Eberle, Anna Lena; Garbowski, Tomasz; Dellemann, Gregor; Peters, Jan Hendrik

    2015-03-01

    SEMATECH aims to identify and enable disruptive technologies to meet the ever-increasing demands of semiconductor high volume manufacturing (HVM). As such, a program was initiated in 2012 focused on high-speed e-beam defect inspection as a complement, and eventual successor, to bright field optical patterned defect inspection [1]. The primary goal is to enable a new technology to overcome the key gaps that are limiting modern day inspection in the fab; primarily, throughput and sensitivity to detect ultra-small critical defects. The program specifically targets revolutionary solutions based on massively parallel e-beam technologies, as opposed to incremental improvements to existing e-beam and optical inspection platforms. Wafer inspection is the primary target, but attention is also being paid to next generation mask inspection. During the first phase of the multi-year program multiple technologies were reviewed, a down-selection was made to the top candidates, and evaluations began on proof of concept systems. A champion technology has been selected and as of late 2014 the program has begun to move into the core technology maturation phase in order to enable eventual commercialization of an HVM system. Performance data from early proof of concept systems will be shown along with roadmaps to achieving HVM performance. SEMATECH's vision for moving from early-stage development to commercialization will be shown, including plans for development with industry leading technology providers.

  17. Accuracy improvement of the H-drive air-levitating wafer inspection stage based on error analysis and compensation

    NASA Astrophysics Data System (ADS)

    Zhang, Fan; Liu, Pinkuan

    2018-04-01

    In order to improve the inspection precision of the H-drive air-bearing stage for wafer inspection, in this paper the geometric error of the stage is analyzed and compensated. The relationship between the positioning errors and error sources are initially modeled, and seven error components are identified that are closely related to the inspection accuracy. The most effective factor that affects the geometric error is identified by error sensitivity analysis. Then, the Spearman rank correlation method is applied to find the correlation between different error components, aiming at guiding the accuracy design and error compensation of the stage. Finally, different compensation methods, including the three-error curve interpolation method, the polynomial interpolation method, the Chebyshev polynomial interpolation method, and the B-spline interpolation method, are employed within the full range of the stage, and their results are compared. Simulation and experiment show that the B-spline interpolation method based on the error model has better compensation results. In addition, the research result is valuable for promoting wafer inspection accuracy and will greatly benefit the semiconductor industry.

  18. The challenges encountered in the integration of an early test wafer surface scanning inspection system into a 450mm manufacturing line

    NASA Astrophysics Data System (ADS)

    Lee, Jeffrey; McGarvey, Steve

    2013-04-01

    The introduction of early test wafer (ETW) 450mm Surface Scanning Inspection Systems (SSIS) into Si manufacturing has brought with it numerous technical, commercial, and logistical challenges on the path to rapid recipe development and subsequent qualification of other 450mm wafer processing equipment. This paper will explore the feasibility of eliminating the Polystyrene Latex Sphere deposition process step and the subsequent creation of SSIS recipes based upon the theoretical optical properties of both the SSIS and the process film stack(s). The process of Polystyrene Latex Sphere deposition for SSIS recipe generation and development is generally accepted on the previous technology nodes for 150/200/300mm wafers. PSL is deposited with a commercially available deposition system onto a non-patterned bare Si or non-patterned filmed Si wafer. After deposition of multiple PSL spots, located in different positions on a wafer, the wafer is inspected on a SSIS and a response curve is generated. The response curve is based on the the light scattering intensity of the NIST certified PSL that was deposited on the wafer. As the initial 450mm Si wafer manufacturing began, there were no inspection systems with sub-90nm sensitivities available for defect and haze level verification. The introduction of a 450mm sub-30nm inspection system into the manufacturing line generated instant challenges. Whereas the 450mm wafers were relatively defect free at 90nm, at 40nm the wafers contained several hundred thousand defects. When PSL was deposited onto wafers with these kinds of defect levels, PSL with signals less than the sub-90nm defects were difficult to extract. As the defectivity level of the wafers from the Si suppliers rapidly improves the challenges of SSIS recipe creation with high defectivity decreases while at the same time the cost of PSL deposition increases. The current cost per wafer is fifteen thousand dollars for a 450mm PSL deposition service. When viewed from the

  19. Increasing reticle inspection efficiency and reducing wafer printchecks at 14nm using automated defect classification and simulation

    NASA Astrophysics Data System (ADS)

    Paracha, Shazad; Goodman, Eliot; Eynon, Benjamin G.; Noyes, Ben F.; Ha, Steven; Kim, Jong-Min; Lee, Dong-Seok; Lee, Dong-Heok; Cho, Sang-Soo; Ham, Young M.; Vacca, Anthony D.; Fiekowsky, Peter J.; Fiekowsky, Daniel I.

    2014-10-01

    IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the "requal" phase for extended, non-productive periods of time. The overall "requal" cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs An automatic defect analysis system (ADAS), which has been in fab production for numerous years, has been improved to handle the new challenges of 14nm node automate reticle defect classification by simulating each defect's printability under the intended illumination conditions. In this study, we have created programmed defects on a production 14nm node critical-layer reticle. These defects have been analyzed with lithographic simulation software and compared to the results of both AIMS optical simulation and to actual wafer prints.

  20. Noncontact sheet resistance measurement technique for wafer inspection

    NASA Astrophysics Data System (ADS)

    Kempa, Krzysztof; Rommel, J. Martin; Litovsky, Roman; Becla, Peter; Lojek, Bohumil; Bryson, Frank; Blake, Julian

    1995-12-01

    A new technique, MICROTHERM, has been developed for noncontact sheet resistance measurements of semiconductor wafers. It is based on the application of microwave energy to the wafer, and simultaneous detection of the infrared radiation resulting from ohmic heating. The pattern of the emitted radiation corresponds to the sheet resistance distribution across the wafer. This method is nondestructive, noncontact, and allows for measurements of very small areas (several square microns) of the wafer.

  1. Contamination-Free Manufacturing: Tool Component Qualification, Verification and Correlation with Wafers

    NASA Astrophysics Data System (ADS)

    Tan, Samantha H.; Chen, Ning; Liu, Shi; Wang, Kefei

    2003-09-01

    As part of the semiconductor industry "contamination-free manufacturing" effort, significant emphasis has been placed on reducing potential sources of contamination from process equipment and process equipment components. Process tools contain process chambers and components that are exposed to the process environment or process chemistry and in some cases are in direct contact with production wafers. Any contamination from these sources must be controlled or eliminated in order to maintain high process yields, device performance, and device reliability. This paper discusses new nondestructive analytical methods for quantitative measurement of the cleanliness of metal, quartz, polysilicon and ceramic components that are used in process equipment tools. The goal of these new procedures is to measure the effectiveness of cleaning procedures and to verify whether a tool component part is sufficiently clean for installation and subsequent routine use in the manufacturing line. These procedures provide a reliable "qualification method" for tool component certification and also provide a routine quality control method for reliable operation of cleaning facilities. Cost advantages to wafer manufacturing include higher yields due to improved process cleanliness and elimination of yield loss and downtime resulting from the installation of "bad" components in process tools. We also discuss a representative example of wafer contamination having been linked to a specific process tool component.

  2. Methodology For Reduction Of Sampling On The Visual Inspection Of Developed And Etched Wafers

    NASA Astrophysics Data System (ADS)

    van de Ven, Jamie S.; Khorasani, Fred

    1989-07-01

    There is a lot of inspection in the manufacturing of semiconductor devices. Generally, the more important a manufacturing step, the higher is the level of inspection. In some cases 100% of the wafers are inspected after certain steps. Inspection is a non-value added and expensive activity. It requires an army of "inspectors," often times expensive equipment and becomes a "bottle neck" when the level of inspection is high. Although inspection helps identify quality problems, it hurts productivity. The new management, quality and productivity philosophies recommend against over inspection. [Point #3 in Dr. Deming's 14 Points for Management (1)] 100% inspection is quite unnecessary . Often the nature of a process allows us to reduce inspection drastically and still maintain a high level of confidence in quality. In section 2, we discuss such situations and show that some elementary probability theory allows us to determine sample sizes and measure the chances of catching a bad "lot" and accepting a good lot. In section 3, we provide an example and application of the theory, and make a few comments on money and time saved because of this work. Finally, in section 4, we draw some conclusions about the new quality and productivity philosophies and how applied statisticians and engineers should study every situation individually and avoid blindly using methods and tables given in books.

  3. Fabrication Characterization of Solar-Cell Silicon Wafers Using a Circular-Rhombus Tool

    NASA Astrophysics Data System (ADS)

    Pa, Pai-Shan

    2010-01-01

    A new recycling fabrication method using a custom-built designed circular-rhombus tool for a process combining of micro-electroetching and electrochemical machining for removal of the surface layers from silicon wafers of solar cells is demonstrated. The low yields of epoxy film and Si3N4 thin-film depositions are important factors in semiconductor production. The aim of the proposed recycling fabrication method is to replace the current approach, which uses strong acid and grinding and may damage the physical structure of silicon wafers and pollute to the environment. A precisely engineered clean production approach for removal of surface microstructure layers from silicon wafers is to develop a mass production system for recycling defective or discarded silicon wafers of solar cells that can reduce pollution and cost. A large diameter cathode of the circular-rhombus tool (with a small gap between the anode and the cathode) corresponds to a high rate of epoxy film removal. A high feed rate of the silicon wafers combined with a high continuous DC electric voltage results in a high removal rate. The high rotational speed of the circular-rhombus tool increases the discharge mobility and improves the removal effect associated with the high feed rate of the workpiece. A small port radius or large end angle of the rhombus anode provides a large discharge space and good removal effect only a short period of time is required to remove the Si3N4 layer and epoxy film easily and cleanly.

  4. Ultimate intra-wafer critical dimension uniformity control by using lithography and etch tool corrections

    NASA Astrophysics Data System (ADS)

    Kubis, Michael; Wise, Rich; Reijnen, Liesbeth; Viatkina, Katja; Jaenen, Patrick; Luca, Melisa; Mernier, Guillaume; Chahine, Charlotte; Hellin, David; Kam, Benjamin; Sobieski, Daniel; Vertommen, Johan; Mulkens, Jan; Dusa, Mircea; Dixit, Girish; Shamma, Nader; Leray, Philippe

    2016-03-01

    With shrinking design rules, the overall patterning requirements are getting aggressively tighter. For the 7-nm node and below, allowable CD uniformity variations are entering the Angstrom region (ref [1]). Optimizing inter- and intra-field CD uniformity of the final pattern requires a holistic tuning of all process steps. In previous work, CD control with either litho cluster or etch tool corrections has been discussed. Today, we present a holistic CD control approach, combining the correction capability of the etch tool with the correction capability of the exposure tool. The study is done on 10-nm logic node wafers, processed with a test vehicle stack patterning sequence. We include wafer-to-wafer and lot-to-lot variation and apply optical scatterometry to characterize the fingerprints. Making use of all available correction capabilities (lithography and etch), we investigated single application of exposure tool corrections and of etch tool corrections as well as combinations of both to reach the lowest CD uniformity. Results of the final pattern uniformity based on single and combined corrections are shown. We conclude on the application of this holistic lithography and etch optimization to 7nm High-Volume manufacturing, paving the way to ultimate within-wafer CD uniformity control.

  5. The verification of printability about marginal defects and the detectability at the inspection tool in sub 50nm node

    NASA Astrophysics Data System (ADS)

    Lee, Hyemi; Jeong, Goomin; Seo, Kangjun; Kim, Sangchul; kim, changreol

    2008-05-01

    Since mask design rule is smaller and smaller, Defects become one of the issues dropping the mask yield. Furthermore controlled defect size become smaller while masks are manufactured. According to ITRS roadmap on 2007, controlled defect size is 46nm in 57nm node and 36nm in 45nm node on a mask. However the machine development is delayed in contrast with the speed of the photolithography development. Generally mask manufacturing process is divided into 3 parts. First part is patterning on a mask and second part is inspecting the pattern and repairing the defect on the mask. At that time, inspection tools of transmitted light type are normally used and are the most trustful as progressive type in the developed inspection tools until now. Final part is shipping the mask after the qualifying the issue points and weak points. Issue points on a mask are qualified by using the AIMS (Aerial image measurement system). But this system is including the inherent error possibility, which is AIMS measures the issue points based on the inspection results. It means defects printed on a wafer are over the specific size detected by inspection tools and the inspection tool detects the almost defects. Even though there are no tools to detect the 46nm and 36nm defects suggested by ITRS roadmap, this assumption is applied to manufacturing the 57nm and 45nm device. So we make the programmed defect mask consisted with various defect type such as spot, clear extension, dark extension and CD variation on L/S(line and space), C/H(contact hole) and Active pattern in 55nm and 45nm node. And the programmed defect mask was inspected by using the inspection tool of transmitted light type and was measured by using AIMS 45-193i. Then the marginal defects were compared between the inspection tool and AIMS. Accordingly we could verify whether defect size is proper or not, which was suggested to be controlled on a mask by ITRS roadmap. Also this result could suggest appropriate inspection tools for

  6. A reflection TIE system for 3D inspection of wafer structures

    NASA Astrophysics Data System (ADS)

    Yan, Yizhen; Qu, Weijuan; Yan, Lei; Wang, Zhaomin; Zhao, Hongying

    2017-10-01

    A reflection TIE system consisting of a reflecting microscope and a 4f relay system is presented in this paper, with which the transport of intensity equation (TIE) is applied to reconstruct the three-dimensional (3D) profile of opaque micro objects like wafer structures for 3D inspection. As the shape of an object can affect the phases of waves, the 3D information of the object can be easily acquired with the multiple phases at different refocusing planes. By electronically controlled refocusing, multi-focal images can be captured and used in solving TIE to obtain the phase and depth of the object. In order to validate the accuracy and efficiency of the proposed system, the phase and depth values of several samples are calculated, and the experimental results is presented to demonstrate the performance of the system.

  7. Inspection of imprint lithography patterns for semiconductor and patterned media

    NASA Astrophysics Data System (ADS)

    Resnick, Douglas J.; Haase, Gaddi; Singh, Lovejeet; Curran, David; Schmid, Gerard M.; Luo, Kang; Brooks, Cindy; Selinidis, Kosta; Fretwell, John; Sreenivasan, S. V.

    2010-03-01

    Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the requirements of cost-effective device production. This work summarizes the results of defect inspections of semiconductor masks, wafers and hard disks patterned using Jet and Flash Imprint Lithography (J-FILTM). Inspections were performed with optical and e-beam based automated inspection tools. For the semiconductor market, a test mask was designed which included dense features (with half pitches ranging between 32 nm and 48 nm) containing an extensive array of programmed defects. For this work, both e-beam inspection and optical inspection were used to detect both random defects and the programmed defects. Analytical SEMs were then used to review the defects detected by the inspection. Defect trends over the course of many wafers were observed with another test mask using a KLA-T 2132 optical inspection tool. The primary source of defects over 2000 imprints were particle related. For the hard drive market, it is important to understand the defectivity of both the template and the imprinted disk. This work presents a methodology for automated pattern inspection and defect classification for imprint-patterned media. Candela CS20 and 6120 tools from KLA-Tencor map the optical properties of the disk surface, producing highresolution grayscale images of surface reflectivity, scattered light, phase shift, etc. Defects that have been identified in this manner are further characterized according to the morphology

  8. New optoelectronic methodology for nondestructive evaluation of MEMS at the wafer level

    NASA Astrophysics Data System (ADS)

    Furlong, Cosme; Ferguson, Curtis F.; Melson, Michael J.

    2004-02-01

    One of the approaches to fabrication of MEMS involves surface micromachining to define dies on single crystal silicon wafers, dicing of the wafers to separate the dies, and electronic packaging of the individual dies. Dicing and packaging of MEMS accounts for a large fraction of the fabrication costs, therefore, nondestructive evaluation at the wafer level, before dicing, can have significant implications on improving production yield and costs. In this paper, advances in development of optoelectronic holography (OEH) techniques for nondestructive, noninvasive, full-field of view evaluation of MEMS at the wafer level are described. With OEH techniques, quantitative measurements of shape and deformation of MEMS, as related to their performance and integrity, are obtained with sub-micrometer spatial resolution and nanometer measuring accuracy. To inspect an entire wafer with OEH methodologies, measurements of overlapping regions of interest (ROI) on a wafer are recorded and adjacent ROIs are stitched together through efficient 3D correlation analysis algorithms. Capabilities of the OEH techniques are illustrated with representative applications, including determination of optimal inspection conditions to minimize inspection time while achieving sufficient levels of accuracy and resolution.

  9. Enabling inspection solutions for future mask technologies through the development of massively parallel E-Beam inspection

    NASA Astrophysics Data System (ADS)

    Malloy, Matt; Thiel, Brad; Bunday, Benjamin D.; Wurm, Stefan; Jindal, Vibhu; Mukhtar, Maseeh; Quoi, Kathy; Kemen, Thomas; Zeidler, Dirk; Eberle, Anna Lena; Garbowski, Tomasz; Dellemann, Gregor; Peters, Jan Hendrik

    2015-09-01

    The new device architectures and materials being introduced for sub-10nm manufacturing, combined with the complexity of multiple patterning and the need for improved hotspot detection strategies, have pushed current wafer inspection technologies to their limits. In parallel, gaps in mask inspection capability are growing as new generations of mask technologies are developed to support these sub-10nm wafer manufacturing requirements. In particular, the challenges associated with nanoimprint and extreme ultraviolet (EUV) mask inspection require new strategies that enable fast inspection at high sensitivity. The tradeoffs between sensitivity and throughput for optical and e-beam inspection are well understood. Optical inspection offers the highest throughput and is the current workhorse of the industry for both wafer and mask inspection. E-beam inspection offers the highest sensitivity but has historically lacked the throughput required for widespread adoption in the manufacturing environment. It is unlikely that continued incremental improvements to either technology will meet tomorrow's requirements, and therefore a new inspection technology approach is required; one that combines the high-throughput performance of optical with the high-sensitivity capabilities of e-beam inspection. To support the industry in meeting these challenges SUNY Poly SEMATECH has evaluated disruptive technologies that can meet the requirements for high volume manufacturing (HVM), for both the wafer fab [1] and the mask shop. Highspeed massively parallel e-beam defect inspection has been identified as the leading candidate for addressing the key gaps limiting today's patterned defect inspection techniques. As of late 2014 SUNY Poly SEMATECH completed a review, system analysis, and proof of concept evaluation of multiple e-beam technologies for defect inspection. A champion approach has been identified based on a multibeam technology from Carl Zeiss. This paper includes a discussion on the

  10. High-throughput automatic defect review for 300mm blank wafers with atomic force microscope

    NASA Astrophysics Data System (ADS)

    Zandiatashbar, Ardavan; Kim, Byong; Yoo, Young-kook; Lee, Keibock; Jo, Ahjin; Lee, Ju Suk; Cho, Sang-Joon; Park, Sang-il

    2015-03-01

    While feature size in lithography process continuously becomes smaller, defect sizes on blank wafers become more comparable to device sizes. Defects with nm-scale characteristic size could be misclassified by automated optical inspection (AOI) and require post-processing for proper classification. Atomic force microscope (AFM) is known to provide high lateral and the highest vertical resolution by mechanical probing among all techniques. However, its low throughput and tip life in addition to the laborious efforts for finding the defects have been the major limitations of this technique. In this paper we introduce automatic defect review (ADR) AFM as a post-inspection metrology tool for defect study and classification for 300 mm blank wafers and to overcome the limitations stated above. The ADR AFM provides high throughput, high resolution, and non-destructive means for obtaining 3D information for nm-scale defect review and classification.

  11. Inspection Tools

    NASA Astrophysics Data System (ADS)

    1989-01-01

    A "NASA Tech Briefs" article describing an inspection tool and technique known as Optically Stimulated Electron Emission (OSEE) led to the formation of Photo Acoustic Technology, Inc. (PAT). PAT produces sensors and scanning systems which assure surface cleanliness prior to bonding, coating, painting, etc. The company's OP1000 series realtime pre-processing detection capability assures 100 percent surface quality testing. The technique involves brief exposure of the inspection surface to ultraviolet radiation. The energy interacts with the surface layer, causing free electrons to be emitted from the surface to be picked up by the detector. When contamination is present, it interferes with the electron flow in proportion to the thickness of the contaminant layer enabling measurement by system signal output. OP1000 systems operate in conventional atmospheres on all types of material and detect both organic and inorganic contamination.

  12. Wafer edge overlay control solution for N7 and beyond

    NASA Astrophysics Data System (ADS)

    van Haren, Richard; Calado, Victor; van Dijk, Leon; Hermans, Jan; Kumar, Kaushik; Yamashita, Fumiko

    2018-03-01

    Historically, the on-product overlay performance close to the wafer edge is lagging with respect to the inner part of the wafer. The reason for this is that wafer processing is less controlled close to the wafer edge as opposed to the rest of the wafer. It is generally accepted that Chemical Vapor Deposition (CVD) of stressed layers that cause wafer warp, wafer table contamination, Chemical Mechanical Polishing (CMP), and Reactive Ion Etch (RIE) may deteriorate the overlay performance and/or registration close to the wafer edge. For the N7 technology node and beyond, it is anticipated that the tight on-product overlay specification is required across the full wafer which includes the edge region. In this work, we highlight one contributor that may negatively impact the on-product overlay performance, namely the etch step. The focus will be mainly on the wafer edge region but the remaining part of the wafer is considered as well. Three use-cases are examined: multiple Litho-Etch steps (LEn), contact hole layer etch, and the copper dual damascene etch. We characterize the etch contribution by considering the overlay measurement after resist development inspect (ADI) and after etch inspect (AEI). We show that the Yieldstar diffraction based overlay (μDBO) measurements can be utilized to characterize the etch contribution to the overlay budget. The effects of target asymmetry as well as overlay shifts are considered and compared with SEM measurements. Based on the results above, we propose a control solution aiming to reduce or even eliminate the delta between ADI and AEI. By doing so, target/mark to device offsets due to etch might be avoided.

  13. An open-architecture approach to defect analysis software for mask inspection systems

    NASA Astrophysics Data System (ADS)

    Pereira, Mark; Pai, Ravi R.; Reddy, Murali Mohan; Krishna, Ravi M.

    2009-04-01

    Industry data suggests that Mask Inspection represents the second biggest component of Mask Cost and Mask Turn Around Time (TAT). Ever decreasing defect size targets lead to more sensitive mask inspection across the chip, thus generating too many defects. Hence, more operator time is being spent in analyzing and disposition of defects. Also, the fact that multiple Mask Inspection Systems and Defect Analysis strategies would typically be in use in a Mask Shop or a Wafer Foundry further complicates the situation. In this scenario, there is a need for a versatile, user friendly and extensible Defect Analysis software that reduces operator analysis time and enables correct classification and disposition of mask defects by providing intuitive visual and analysis aids. We propose a new vendor-neutral defect analysis software, NxDAT, based on an open architecture. The open architecture of NxDAT makes it easily extensible to support defect analysis for mask inspection systems from different vendors. The capability to load results from mask inspection systems from different vendors either directly or through a common interface enables the functionality of establishing correlation between inspections carried out by mask inspection systems from different vendors. This capability of NxDAT enhances the effectiveness of defect analysis as it directly addresses the real-life scenario where multiple types of mask inspection systems from different vendors co-exist in mask shops or wafer foundries. The open architecture also potentially enables loading wafer inspection results as well as loading data from other related tools such as Review Tools, Repair Tools, CD-SEM tools etc, and correlating them with the corresponding mask inspection results. A unique concept of Plug-In interface to NxDAT further enhances the openness of the architecture of NxDAT by enabling end-users to add their own proprietary defect analysis and image processing algorithms. The plug-in interface makes it

  14. Quantitative phase measurement for wafer-level optics

    NASA Astrophysics Data System (ADS)

    Qu, Weijuan; Wen, Yongfu; Wang, Zhaomin; Yang, Fang; Huang, Lei; Zuo, Chao

    2015-07-01

    Wafer-level-optics now is widely used in smart phone camera, mobile video conferencing or in medical equipment that require tiny cameras. Extracting quantitative phase information has received increased interest in order to quantify the quality of manufactured wafer-level-optics, detect defective devices before packaging, and provide feedback for manufacturing process control, all at the wafer-level for high-throughput microfabrication. We demonstrate two phase imaging methods, digital holographic microscopy (DHM) and Transport-of-Intensity Equation (TIE) to measure the phase of the wafer-level lenses. DHM is a laser-based interferometric method based on interference of two wavefronts. It can perform a phase measurement in a single shot. While a minimum of two measurements of the spatial intensity of the optical wave in closely spaced planes perpendicular to the direction of propagation are needed to do the direct phase retrieval by solving a second-order differential equation, i.e., with a non-iterative deterministic algorithm from intensity measurements using the Transport-of-Intensity Equation (TIE). But TIE is a non-interferometric method, thus can be applied to partial-coherence light. We demonstrated the capability and disability for the two phase measurement methods for wafer-level optics inspection.

  15. Tool for Inspecting Alignment of Twinaxial Connectors

    NASA Technical Reports Server (NTRS)

    Smith, Christopher R.

    2008-01-01

    A proposed tool would be used to inspect alignments of mating twinaxial-connector assemblies on interconnecting wiring harnesses. More specifically, the tool would be used to inspect the alignment of each contact pin of each connector on one assembly with the corresponding socket in the corresponding connector on the other assembly. It is necessary to inspect the alignment because if mating of the assemblies is attempted when any pin/socket pair is misaligned beyond tolerance, the connection will not be completed and the dielectric material in the socket will be damaged (see Figure 1). Although the basic principle of the tool is applicable to almost any type of mating connector assemblies, the specific geometry of the tool must match the pin-and-socket geometry of the specific mating assemblies to be inspected. In the original application for which the tool was conceived, each of the mating assemblies contains eight twinaxial connectors; the pin diameter is 0.014 in. (.0.35 mm), and the maximum allowable pin/socket misalignment is 0.007 in. (.0.18 mm). Incomplete connections can result in loss of flight data within the functional path to the space shuttle crew cockpit displays. The tool (see Figure 2) would consist mainly of a transparent disk with alignment clocking tabs that can be fitted onto either connector assembly. Sets of circles or equivalent reference markings are affixed to the face of the tool, located at the desired positions of the mating contact pairs. An inspector would simply fit the tool onto a connector assembly, engaging the clocking tabs until the tool fits tightly. The inspector would then align one set of circles positioning a line of sight perpendicular to one contact within the connector assembly. Mis alignments would be evidenced by the tip of a pin contact straying past the inner edge of the circle. Socket contact misalignments would be evidenced by a crescent-shaped portion of the white dielectric appearing within the circle. The tool

  16. Inspection tool for butt-welded tubing

    NASA Technical Reports Server (NTRS)

    Horman, D. P.

    1977-01-01

    Inspection tool for tubing consists of metal casing housing elastic collar. Collar is clamped around weld site under test. Leakage through weld is contained within chamber and is bled to detector via tubing attached to fitting. Tool, originally designed to detect fluid leakage in tubing, can be used to detect gas leaks.

  17. Within-wafer CD variation induced by wafer shape

    NASA Astrophysics Data System (ADS)

    Huang, Chi-hao; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

    2016-03-01

    In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked vertical flash cell array has been proposed. In constructing 3D NAND flash memories, the bit number per unit area is increased as increasing the number of stacked layers. However, the increased number of stacked layers has made the film stress control extremely important for maintaining good process quality. The residual film stress alters the wafer shape accordingly several process impacts have been readily observed across wafer, such as film deposition non-uniformity, etch rate non-uniformity, wafer chucking error on scanner, materials coating/baking defects, overlay degradation and critical dimension (CD) non-uniformity. The residual tensile and compressive stresses on wafers will result in concave and convex wafer shapes, respectively. This study investigates within-wafer CD uniformity (CDU) associated with wafer shape change induced by the 3D NAND flash memory processes. Within-wafer CDU was correlated with several critical parameters including different wafer bow heights of concave and convex wafer shapes, photo resists with different post exposure baking (PEB) temperature sensitivities, and DoseMapper compensation. The results indicated the trend of within-wafer CDU maintains flat for convex wafer shapes with bow height up to +230um and concave wafer shapes with bow height ranging from 0 ~ -70um, while the within-wafer CDU trends up from -70um to -246um wafer bow heights. To minimize the within-wafer CD distribution induced by wafer warpage, carefully tailoring the film stack and thermal budget in the process flow for maintaining the wafer shape at CDU friendly range is indispensable and using photo-resist materials with lower PEB temperature sensitivity is also suggested. In addition, DoseMapper compensation is also an alternative to greatly suppress the within-wafer CD non-uniformity but the photo-resist profile variation induced by across-wafer

  18. Defect inspection and printability study for 14 nm node and beyond photomask

    NASA Astrophysics Data System (ADS)

    Seki, Kazunori; Yonetani, Masashi; Badger, Karen; Dechene, Dan J.; Akima, Shinji

    2016-10-01

    Two different mask inspection techniques are developed and compared for 14 nm node and beyond photomasks, High resolution and Litho-based inspection. High resolution inspection is the general inspection method in which a 19x nm wavelength laser is used with the High NA inspection optics. Litho-based inspection is a new inspection technology. This inspection uses the wafer lithography information, and as such, this method has automatic defect classification capability which is based on wafer printability. Both High resolution and Litho-based inspection methods are compared using 14 nm and 7 nm node programmed defect and production design masks. The defect sensitivity and mask inspectability is compared, in addition to comparing the defect classification and throughput. Additionally, the Cost / Infrastructure comparison is analyzed and the impact of each inspection method is discussed.

  19. Wafer screening device and methods for wafer screening

    DOEpatents

    Sopori, Bhushan; Rupnowski, Przemyslaw

    2014-07-15

    Wafer breakage is a serious problem in the photovoltaic industry because a large fraction of wafers (between 5 and 10%) break during solar cell/module fabrication. The major cause of this excessive wafer breakage is that these wafers have residual microcracks--microcracks that were not completely etched. Additional propensity for breakage is caused by texture etching and incomplete edge grinding. To eliminate the cost of processing the wafers that break, it is best to remove them prior to cell fabrication. Some attempts have been made to develop optical techniques to detect microcracks. Unfortunately, it is very difficult to detect microcracks that are embedded within the roughness/texture of the wafers. Furthermore, even if such detection is successful, it is not straightforward to relate them to wafer breakage. We believe that the best way to isolate the wafers with fatal microcracks is to apply a stress to wafers--a stress that mimics the highest stress during cell/module processing. If a wafer survives this stress, it has a high probability of surviving without breakage during cell/module fabrication. Based on this, we have developed a high throughput, noncontact method for applying a predetermined stress to a wafer. The wafers are carried on a belt through a chamber that illuminates the wafer with an intense light of a predetermined intensity distribution that can be varied by changing the power to the light source. As the wafers move under the light source, each wafer undergoes a dynamic temperature profile that produces a preset elastic stress. If this stress exceeds the wafer strength, the wafer will break. The broken wafers are separated early, eliminating cost of processing into cell/module. We will describe details of the system and show comparison of breakage statistics with the breakage on a production line.

  20. Interferometric thickness calibration of 300 mm silicon wafers

    NASA Astrophysics Data System (ADS)

    Wang, Quandou; Griesmann, Ulf; Polvani, Robert

    2005-12-01

    The "Improved Infrared Interferometer" (IR 3) at the National Institute of Standards and Technology (NIST) is a phase-measuring interferometer, operating at a wavelength of 1550 nm, which is being developed for measuring the thickness and thickness variation of low-doped silicon wafers with diameters up to 300 mm. The purpose of the interferometer is to produce calibrated silicon wafers, with a certified measurement uncertainty, which can be used as reference wafers by wafer manufacturers and metrology tool manufacturers. We give an overview of the design of the interferometer and discuss its application to wafer thickness measurements. The conversion of optical thickness, as measured by the interferometer, to the wafer thickness requires knowledge of the refractive index of the material of the wafer. We describe a method for measuring the refractive index which is then used to establish absolute thickness and thickness variation maps for the wafer.

  1. Automated mask and wafer defect classification using a novel method for generalized CD variation measurements

    NASA Astrophysics Data System (ADS)

    Verechagin, V.; Kris, R.; Schwarzband, I.; Milstein, A.; Cohen, B.; Shkalim, A.; Levy, S.; Price, D.; Bal, E.

    2018-03-01

    Over the years, mask and wafers defects dispositioning has become an increasingly challenging and time consuming task. With design rules getting smaller, OPC getting complex and scanner illumination taking on free-form shapes - the probability of a user to perform accurate and repeatable classification of defects detected by mask inspection tools into pass/fail bins is reducing. The critical challenging of mask defect metrology for small nodes ( < 30 nm) was reviewed in [1]. While Critical Dimension (CD) variation measurement is still the method of choice for determining a mask defect future impact on wafer, the high complexity of OPCs combined with high variability in pattern shapes poses a challenge for any automated CD variation measurement method. In this study, a novel approach for measurement generalization is presented. CD variation assessment performance is evaluated on multiple different complex shape patterns, and is benchmarked against an existing qualified measurement methodology.

  2. Effect of wafer geometry on lithography chucking processes

    NASA Astrophysics Data System (ADS)

    Turner, Kevin T.; Sinha, Jaydeep K.

    2015-03-01

    Wafer flatness during exposure in lithography tools is critical and is becoming more important as feature sizes in devices shrink. While chucks are used to support and flatten the wafer during exposure, it is essential that wafer geometry be controlled as well. Thickness variations of the wafer and high-frequency wafer shape components can lead to poor flatness of the chucked wafer and ultimately patterning problems, such as defocus errors. The objective of this work is to understand how process-induced wafer geometry, resulting from deposited films with non-uniform stress, can lead to high-frequency wafer shape variations that prevent complete chucking in lithography scanners. In this paper, we discuss both the acceptable limits of wafer shape that permit complete chucking to be achieved, and how non-uniform residual stresses in films, either due to patterning or process non-uniformity, can induce high spatial frequency wafer shape components that prevent chucking. This paper describes mechanics models that relate non-uniform film stress to wafer shape and presents results for two example cases. The models and results can be used as a basis for establishing control strategies for managing process-induced wafer geometry in order to avoid wafer flatness-induced errors in lithography processes.

  3. Development of a Wafer Positioning System for the Sandia Extreme Ultraviolet Lithography Tool

    NASA Technical Reports Server (NTRS)

    Wronosky, John B.; Smith, Tony G.; Darnold, Joel R.

    1996-01-01

    A wafer positioning system was recently developed by Sandia National Laboratories for an Extreme Ultraviolet Lithography (EUVL) tool. The system, which utilizes a magnetically levitated fine stage to provide ultra-precise positioning in all six degrees of freedom, incorporates technological improvements resulting from four years of prototype development. This paper describes the design, implementation, and functional capability of the system. Specifics regarding control system electronics, including software and control algorithm structure, as well as performance design goals and test results are presented. Potential system enhancements, some of which are in process, are also discussed.

  4. Silicon wafer temperature monitoring using all-fiber laser ultrasonics

    NASA Astrophysics Data System (ADS)

    Alcoz, Jorge J.; Duffer, Charles E.

    1998-03-01

    Laser-ultrasonics is a very attractive technique for in-line process control in the semiconductor industry as it is compatible with the clean room environment and offers the capability to inspect parts at high-temperature. We describe measurements of the velocity of laser-generated Lamb waves in silicon wafers as a function of temperature using fiber- optic laser delivery and all-fiber interferometric sensing. Fundamental anti-symmetric Lamb-wave modes were generated in 5 inches < 111 > silicon wafers using a Nd:YAG laser coupled to a large-core multimode fiber. Generation was also performed using an array of sources created with a diffraction grating. For detection a compact fiber-optic sensor was used which is well suited for industrial environments as it is compact, rugged, stable, and low-cost. The wafers were heated up to 1000 degrees C and the temperature correlated with ultrasonic velocity measurements.

  5. Process tool monitoring and matching using interferometry technique

    NASA Astrophysics Data System (ADS)

    Anberg, Doug; Owen, David M.; Mileham, Jeffrey; Lee, Byoung-Ho; Bouche, Eric

    2016-03-01

    The semiconductor industry makes dramatic device technology changes over short time periods. As the semiconductor industry advances towards to the 10 nm device node, more precise management and control of processing tools has become a significant manufacturing challenge. Some processes require multiple tool sets and some tools have multiple chambers for mass production. Tool and chamber matching has become a critical consideration for meeting today's manufacturing requirements. Additionally, process tools and chamber conditions have to be monitored to ensure uniform process performance across the tool and chamber fleet. There are many parameters for managing and monitoring tools and chambers. Particle defect monitoring is a well-known and established example where defect inspection tools can directly detect particles on the wafer surface. However, leading edge processes are driving the need to also monitor invisible defects, i.e. stress, contamination, etc., because some device failures cannot be directly correlated with traditional visualized defect maps or other known sources. Some failure maps show the same signatures as stress or contamination maps, which implies correlation to device performance or yield. In this paper we present process tool monitoring and matching using an interferometry technique. There are many types of interferometry techniques used for various process monitoring applications. We use a Coherent Gradient Sensing (CGS) interferometer which is self-referencing and enables high throughput measurements. Using this technique, we can quickly measure the topography of an entire wafer surface and obtain stress and displacement data from the topography measurement. For improved tool and chamber matching and reduced device failure, wafer stress measurements can be implemented as a regular tool or chamber monitoring test for either unpatterned or patterned wafers as a good criteria for improved process stability.

  6. Nanoimprint wafer and mask tool progress and status for high volume semiconductor manufacturing

    NASA Astrophysics Data System (ADS)

    Matsuoka, Yoichi; Seki, Junichi; Nakayama, Takahiro; Nakagawa, Kazuki; Azuma, Hisanobu; Yamamoto, Kiyohito; Sato, Chiaki; Sakai, Fumio; Takabayashi, Yukio; Aghili, Ali; Mizuno, Makoto; Choi, Jin; Jones, Chris E.

    2016-10-01

    Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. There are many criteria that determine whether a particular technology is ready for wafer manufacturing. Defectivity and mask life play a significant role relative to meeting the cost of ownership (CoO) requirements in the production of semiconductor devices. Hard particles on a wafer or mask create the possibility of inducing a permanent defect on the mask that can impact device yield and mask life. By using material methods to reduce particle shedding and by introducing an air curtain system, the lifetime of both the master mask and the replica mask can be extended. In this work, we report results that demonstrate a path towards achieving mask lifetimes of better than 1000 wafers. On the mask side, a new replication tool, the FPA-1100 NR2 is introduced. Mask replication is required for nanoimprint lithography (NIL), and criteria that are crucial to the success of a replication platform include both particle control, resolution and image placement accuracy. In this paper we discuss the progress made in both feature resolution and in meeting the image placement specification for replica masks.

  7. An automated tool-joint inspection device for the drillstring

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Moyer, M.C.; Dale, B.A.; Kusenberger, F.N.

    1984-06-01

    This paper discusses the development of an automated tool joint inspection device-i.e., the fatigue crack detector (FCD), which can detect defects in the threaded region of drillpipe and drill collars. Inspection tests conducted at a research test facility and at drilling rig sites indicate that this device can detect both simulated defects (saw slots and drilled holes) and service-induced defects, such as fatigue cracks, pin stretch (plastic deformation), mashed threads, and corrosion pitting. The system operates on an electromagnetic-flux leakage principle and has several advantages over the conventional method of magnetic particle inspection.

  8. Strategy optimization for mask rule check in wafer fab

    NASA Astrophysics Data System (ADS)

    Yang, Chuen Huei; Lin, Shaina; Lin, Roger; Wang, Alice; Lee, Rachel; Deng, Erwin

    2015-07-01

    Photolithography process is getting more and more sophisticated for wafer production following Moore's law. Therefore, for wafer fab, consolidated and close cooperation with mask house is a key to achieve silicon wafer success. However, generally speaking, it is not easy to preserve such partnership because many engineering efforts and frequent communication are indispensable. The inattentive connection is obvious in mask rule check (MRC). Mask houses will do their own MRC at job deck stage, but the checking is only for identification of mask process limitation including writing, etching, inspection, metrology, etc. No further checking in terms of wafer process concerned mask data errors will be implemented after data files of whole mask are composed in mask house. There are still many potential data errors even post-OPC verification has been done for main circuits. What mentioned here are the kinds of errors which will only occur as main circuits combined with frame and dummy patterns to form whole reticle. Therefore, strategy optimization is on-going in UMC to evaluate MRC especially for wafer fab concerned errors. The prerequisite is that no impact on mask delivery cycle time even adding this extra checking. A full-mask checking based on job deck in gds or oasis format is necessary in order to secure acceptable run time. Form of the summarized error report generated by this checking is also crucial because user friendly interface will shorten engineers' judgment time to release mask for writing. This paper will survey the key factors of MRC in wafer fab.

  9. High brightness electrodeless Z-Pinch EUV source for mask inspection tools

    NASA Astrophysics Data System (ADS)

    Horne, Stephen F.; Partlow, Matthew J.; Gustafson, Deborah S.; Besen, Matthew M.; Smith, Donald K.; Blackborow, Paul A.

    2012-03-01

    Energetiq Technology has been shipping the EQ-10 Electrodeless Z-pinchTM light source since 1995. The source is currently being used for metrology, mask inspection, and resist development. Energetiq's higher brightness source has been selected as the source for pre-production actinic mask inspection tools. This improved source enables the mask inspection tool suppliers to build prototype tools with capabilities of defect detection and review down to 16nm design rules. In this presentation we will present new source technology being developed at Energetiq to address the critical source brightness issue. The new technology will be shown to be capable of delivering brightness levels sufficient to meet the HVM requirements of AIMS and ABI and potentially API tools. The basis of the source technology is to use the stable pinch of the electrodeless light source and have a brightness of up to 100W/mm(carat)2-sr. We will explain the source design concepts, discuss the expected performance and present the modeling results for the new design.

  10. Immersion lithography defectivity analysis at DUV inspection wavelength

    NASA Astrophysics Data System (ADS)

    Golan, E.; Meshulach, D.; Raccah, N.; Yeo, J. Ho.; Dassa, O.; Brandl, S.; Schwarz, C.; Pierson, B.; Montgomery, W.

    2007-03-01

    Significant effort has been directed in recent years towards the realization of immersion lithography at 193nm wavelength. Immersion lithography is likely a key enabling technology for the production of critical layers for 45nm and 32nm design rule (DR) devices. In spite of the significant progress in immersion lithography technology, there remain several key technology issues, with a critical issue of immersion lithography process induced defects. The benefits of the optical resolution and depth of focus, made possible by immersion lithography, are well understood. Yet, these benefits cannot come at the expense of increased defect counts and decreased production yield. Understanding the impact of the immersion lithography process parameters on wafer defects formation and defect counts, together with the ability to monitor, control and minimize the defect counts down to acceptable levels is imperative for successful introduction of immersion lithography for production of advanced DR's. In this report, we present experimental results of immersion lithography defectivity analysis focused on topcoat layer thickness parameters and resist bake temperatures. Wafers were exposed on the 1150i-α-immersion scanner and 1200B Scanner (ASML), defect inspection was performed using a DUV inspection tool (UVision TM, Applied Materials). Higher sensitivity was demonstrated at DUV through detection of small defects not detected at the visible wavelength, indicating on the potential high sensitivity benefits of DUV inspection for this layer. The analysis indicates that certain types of defects are associated with different immersion process parameters. This type of analysis at DUV wavelengths would enable the optimization of immersion lithography processes, thus enabling the qualification of immersion processes for volume production.

  11. An automated tool joint inspection device for the drill string

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Moyer, M.C.; Dale, B.A.; Kusenberger, F.N.

    1983-02-01

    This paper discusses the development of an automated tool joint inspection device (i.e., the Fatigue Crack Detector), which is capable of detecting defects in the threaded region of drill pipe and drill collars. On the basis of inspection tests conducted at a research test facility and at drilling rig sites, this device is capable of detecting both simulated defects (saw slots and drilled holes) and service-induced defects, such as fatigue cracks, pin stretch (plastic deformation), mashed threads, and corrosion pitting. The system employs an electromagnetic flux-leakage principle and has several advantages over the conventional method of magnetic particle inspection.

  12. The use of computational inspection to identify process window limiting hotspots and predict sub-15nm defects with high capture rate

    NASA Astrophysics Data System (ADS)

    Ham, Boo-Hyun; Kim, Il-Hwan; Park, Sung-Sik; Yeo, Sun-Young; Kim, Sang-Jin; Park, Dong-Woon; Park, Joon-Soo; Ryu, Chang-Hoon; Son, Bo-Kyeong; Hwang, Kyung-Bae; Shin, Jae-Min; Shin, Jangho; Park, Ki-Yeop; Park, Sean; Liu, Lei; Tien, Ming-Chun; Nachtwein, Angelique; Jochemsen, Marinus; Yan, Philip; Hu, Vincent; Jones, Christopher

    2017-03-01

    As critical dimensions for advanced two dimensional (2D) DUV patterning continue to shrink, the exact process window becomes increasingly difficult to determine. The defect size criteria shrink with the patterning critical dimensions and are well below the resolution of current optical inspection tools. As a result, it is more challenging for traditional bright field inspection tools to accurately discover the hotspots that define the process window. In this study, we use a novel computational inspection method to identify the depth-of-focus limiting features of a 10 nm node mask with 2D metal structures (single exposure) and compare the results to those obtained with a traditional process windows qualification (PWQ) method based on utilizing a focus modulated wafer and bright field inspection (BFI) to detect hotspot defects. The method is extended to litho-etch litho-etch (LELE) on a different test vehicle to show that overlay related bridging hotspots also can be identified.

  13. Studying post-etching silicon crystal defects on 300mm wafer by automatic defect review AFM

    NASA Astrophysics Data System (ADS)

    Zandiatashbar, Ardavan; Taylor, Patrick A.; Kim, Byong; Yoo, Young-kook; Lee, Keibock; Jo, Ahjin; Lee, Ju Suk; Cho, Sang-Joon; Park, Sang-il

    2016-03-01

    Single crystal silicon wafers are the fundamental elements of semiconductor manufacturing industry. The wafers produced by Czochralski (CZ) process are very high quality single crystalline materials with known defects that are formed during the crystal growth or modified by further processing. While defects can be unfavorable for yield for some manufactured electrical devices, a group of defects like oxide precipitates can have both positive and negative impacts on the final device. The spatial distribution of these defects may be found by scattering techniques. However, due to limitations of scattering (i.e. light wavelength), many crystal defects are either poorly classified or not detected. Therefore a high throughput and accurate characterization of their shape and dimension is essential for reviewing the defects and proper classification. While scanning electron microscopy (SEM) can provide high resolution twodimensional images, atomic force microscopy (AFM) is essential for obtaining three-dimensional information of the defects of interest (DOI) as it is known to provide the highest vertical resolution among all techniques [1]. However AFM's low throughput, limited tip life, and laborious efforts for locating the DOI have been the limitations of this technique for defect review for 300 mm wafers. To address these limitations of AFM, automatic defect review AFM has been introduced recently [2], and is utilized in this work for studying DOI on 300 mm silicon wafer. In this work, we carefully etched a 300 mm silicon wafer with a gaseous acid in a reducing atmosphere at a temperature and for a sufficient duration to decorate and grow the crystal defects to a size capable of being detected as light scattering defects [3]. The etched defects form a shallow structure and their distribution and relative size are inspected by laser light scattering (LLS). However, several groups of defects couldn't be properly sized by the LLS due to the very shallow depth and low

  14. Study of temperature distributions in wafer exposure process

    NASA Astrophysics Data System (ADS)

    Lin, Zone-Ching; Wu, Wen-Jang

    During the exposure process of photolithography, wafer absorbs the exposure energy, which results in rising temperature and the phenomenon of thermal expansion. This phenomenon was often neglected due to its limited effect in the previous generation of process. However, in the new generation of process, it may very likely become a factor to be considered. In this paper, the finite element model for analyzing the transient behavior of the distribution of wafer temperature during exposure was established under the assumption that the wafer was clamped by a vacuum chuck without warpage. The model is capable of simulating the distribution of the wafer temperature under different exposure conditions. The flowchart of analysis begins with the simulation of transient behavior in a single exposure region to the variation of exposure energy, interval of exposure locations and interval of exposure time under continuous exposure to investigate the distribution of wafer temperature. The simulation results indicate that widening the interval of exposure locations has a greater impact in improving the distribution of wafer temperature than extending the interval of exposure time between neighboring image fields. Besides, as long as the distance between the field center locations of two neighboring exposure regions exceeds the straight distance equals to three image fields wide, the interacting thermal effect during wafer exposure can be ignored. The analysis flow proposed in this paper can serve as a supporting reference tool for engineers in planning exposure paths.

  15. Inspection planning development: An evolutionary approach using reliability engineering as a tool

    NASA Technical Reports Server (NTRS)

    Graf, David A.; Huang, Zhaofeng

    1994-01-01

    This paper proposes an evolutionary approach for inspection planning which introduces various reliability engineering tools into the process and assess system trade-offs among reliability, engineering requirement, manufacturing capability and inspection cost to establish an optimal inspection plan. The examples presented in the paper illustrate some advantages and benefits of the new approach. Through the analysis, reliability and engineering impacts due to manufacturing process capability and inspection uncertainty are clearly understood; the most cost effective and efficient inspection plan can be established and associated risks are well controlled; some inspection reductions and relaxations are well justified; and design feedbacks and changes may be initiated from the analysis conclusion to further enhance reliability and reduce cost. The approach is particularly promising as global competitions and customer quality improvement expectations are rapidly increasing.

  16. Stable wafer-carrier system

    DOEpatents

    Rozenzon, Yan; Trujillo, Robert T; Beese, Steven C

    2013-10-22

    One embodiment of the present invention provides a wafer-carrier system used in a deposition chamber for carrying wafers. The wafer-carrier system includes a base susceptor and a top susceptor nested inside the base susceptor with its wafer-mounting side facing the base susceptor's wafer-mounting side, thereby forming a substantially enclosed narrow channel. The base susceptor provides an upward support to the top susceptor.

  17. Plasma etched surface scanning inspection recipe creation based on bidirectional reflectance distribution function and polystyrene latex spheres

    NASA Astrophysics Data System (ADS)

    Saldana, Tiffany; McGarvey, Steve; Ayres, Steve

    2014-04-01

    The continual increasing demands upon Plasma Etching systems to self-clean and continue Plasma Etching with minimal downtime allows for the examination of SiCN, SiO2 and SiN defectivity based upon Surface Scanning Inspection Systems (SSIS) wafer scan results. Historically all Surface Scanning Inspection System wafer scanning recipes have been based upon Polystyrene Spheres wafer deposition for each film stack and the subsequent creation of light scattering sizing response curves. This paper explores the feasibility of the elimination of Polystyrene Latex Sphere (PSL) and/or process particle deposition on both filmed and bare Silicon wafers prior to Surface Scanning Inspection System recipe creation. The study will explore the theoretical maximal Surface Scanning Inspection System sensitivity based on PSL recipe creation in conjunction with the maximal sensitivity derived from Bidirectional Reflectance Distribution Function (BRDF) maximal sensitivity modeling recipe creation. The surface roughness (Root Mean Square) of plasma etched wafers varies dependent upon the process film stack. Decrease of the root mean square value of the wafer sample surface equates to higher surface scanning inspection system sensitivity. Maximal sensitivity SSIS scan results from bare and filmed wafers inspected with recipes created based upon Polystyrene/Particle Deposition and recipes created based upon BRDF modeling will be overlaid against each other to determine maximal sensitivity and capture rate for each type of recipe that was created with differing recipe creation modes. A statistically valid sample of defects from each Surface Scanning Inspection system recipe creation mode and each bare wafer/filmed substrate will be reviewed post SSIS System processing on a Defect Review Scanning Electron Microscope (DRSEM). Native defects, Polystyrene Latex Spheres will be collected from each statistically valid defect bin category/size. The data collected from the DRSEM will be utilized to

  18. Tool holder for preparation and inspection of a radiused edge cutting tool

    DOEpatents

    Asmanes, Charles

    1979-01-01

    A tool holding fixture is provided for removably holding a radiused edge cutting tool in a tool edge lapping apparatus. The fixture allows the operator to preset the lapping radius and angle before the tool holder is placed in the fixture and the holder may be removed from the lapping apparatus to inspect the tool and simply replaced in the fixture to continue lapping in accordance with a precise alignment without realignment of the tool relative to the lap. The tool holder includes a pair of self aligning bearings in the form of precision formed steel balls connected together by a rigid shaft. The tool is held by an arm extending from the shaft and the balls set in fixed position bearing cups and the holder is oscillated back and forth about a fixed axis of rotation to lap the tool radius by means of a reversibly driven belt-pulley arrangement coupled to the shaft between the bearings. To temporarily remove the holder, the drive belt is slipped over the rearward end of the holder and the holder is lifted out of the bearing cups.

  19. Eddy current inspection tool. [Patent application

    DOEpatents

    Petrini, R.R.; Van Lue, D.F.

    1980-10-29

    A miniaturized inspection tool, for testing and inspection of metal objects in locations with difficult accessibility, which comprises eddy current sensing equipment with a probe coil, and associated coaxial coil cable, oil energizing means, and circuit means responsive to impedance changes in the coil as effected by induced eddy currents in a test object to produce a data output signal proportional to such changes. The coil and cable are slideably received in the utility channel of the flexible insertion tube of a fiberoptic scope. The scope is provided with light transmitting and receiving fiberoptics for viewing through the flexible tube, and articulation means for articulating the distal end of the tube and permitting close control of coil placement relative to a test object. The eddy current sensing equipment includes a tone generator for generating audible signals responsive to the data output signal. In one selected mode of operation, the tone generator responsive to the output signal above a selected level generates a constant single frequency tone for signalling detection of a discontinuity and, in a second selected mode, generates a tone whose frequency is proportional to the difference between the output signal and a predetermined selected threshold level.

  20. Smoother Scribing of Silicon Wafers

    NASA Technical Reports Server (NTRS)

    Danyluk, S.

    1986-01-01

    Proposed new tool used to scribe silicon wafers into chips more smoothly than before. New scriber produces surface that appears ductile. Scribed groove cuts have relatively smooth walls. Scriber consists of diamond pyramid point on rigid shaft. Ethanol flows through shaft and around point, like ink in ballpoint pen. Ethanol has significantly different effect for scribing silicon than water, used in conventional diamond scribers.

  1. Take a byte out of MEEF: VAMPIRE: Vehicle for Advanced Mask Pattern Inspection Readiness Evaluations

    NASA Astrophysics Data System (ADS)

    Badger, Karen D.; Rankin, Jed; Turley, Christina; Seki, Kazunori; Dechene, Dan J.; Abdelghany, Hesham

    2016-09-01

    MEEF, or Mask Error Enhancement Factor, is simply defined as the ratio of the change in printed wafer feature width to the change in mask feature width scaled to wafer level. It is important in chip manufacturing that leads to the amplification of mask errors, creating challenges with both achieving dimensional control tolerances and ensuring defect free masks, as measured by on-wafer image quality. As lithographic imaging continues to be stressed, using lower and lower k1 factor resolution enhancement techniques, the high MEEF areas present on advanced optical masks creates an environment where the need for increased mask defect sensitivity in high-MEEF areas becomes more and more critical. There are multiple approaches to mask inspection that may or may not provide enough sensitivity to detect all wafer-printable defects; the challenge in the application of these techniques is simultaneously maintaining an acceptable level of mask inspectability. The higher the MEEF, the harder the challenge will be to achieve and appropriate level of sensitivity while maintaining inspectability…and to do so on the geometries that matter. The predominant photomask fabrication inspection approach in use today compares the features on the reticle directly with the design database using high-NA optics. This approach has the ability to detect small defects, however, when inspecting aggressive OPC, it can lead to the over-detection of inconsequential, or nuisance defects. To minimize these nuisance detections, changing the sensitivity of the inspection can improve the inspectability of a mask inspected in high-NA mode, however, it leads to the inability to detect subtle, yet wafer-printable defects in High-MEEF geometry, due to the fact that this `desense' must be applied globally. There are also `lithography-emulating' approaches to inspection that use various means to provide high defect sensitivity and the ability to tolerate inconsequential, non-printing defects by using scanner

  2. 450mm wafer patterning with jet and flash imprint lithography

    NASA Astrophysics Data System (ADS)

    Thompson, Ecron; Hellebrekers, Paul; Hofemann, Paul; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

    2013-09-01

    The next step in the evolution of wafer size is 450mm. Any transition in sizing is an enormous task that must account for fabrication space, environmental health and safety concerns, wafer standards, metrology capability, individual process module development and device integration. For 450mm, an aggressive goal of 2018 has been set, with pilot line operation as early as 2016. To address these goals, consortiums have been formed to establish the infrastructure necessary to the transition, with a focus on the development of both process and metrology tools. Central to any process module development, which includes deposition, etch and chemical mechanical polishing is the lithography tool. In order to address the need for early learning and advance process module development, Molecular Imprints Inc. has provided the industry with the first advanced lithography platform, the Imprio® 450, capable of patterning a full 450mm wafer. The Imprio 450 was accepted by Intel at the end of 2012 and is now being used to support the 450mm wafer process development demands as part of a multi-year wafer services contract to facilitate the semiconductor industry's transition to lower cost 450mm wafer production. The Imprio 450 uses a Jet and Flash Imprint Lithography (J-FILTM) process that employs drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for markets including NAND Flash memory, patterned media for hard disk drives and displays. This paper reviews the recent performance of the J-FIL technology (including overlay, throughput and defectivity), mask development improvements provided by Dai Nippon Printing, and the application of the technology to a 450mm lithography platform.

  3. Optical inspection of hidden MEMS structures

    NASA Astrophysics Data System (ADS)

    Krauter, Johann; Gronle, Marc; Osten, Wolfgang

    2017-06-01

    Micro-electro-mechanical system's (MEMS) applications have greatly expanded over the recent years, and the MEMS industry has grown almost exponentially. One of the strongest drivers are the automotive and consumer markets. A 100% test is necessary especially in the production of automotive MEMS sensors since they are subject to safety relevant functions. This inspection should be carried out before dicing and packaging since more than 90% of the production costs are incurred during these steps. An electrical test is currently being carried out with each MEMS component. In the case of a malfunction, the defect can not be located on the wafer because the MEMS are no longer optically accessible due to the encapsulation. This paper presents a low coherence interferometer for the topography measurement of MEMS structures located within the wafer stack. Here, a high axial and lateral resolution is necessary to identify defects such as stuck or bent MEMS fingers. First, the boundary conditions for an optical inspection system will be discussed. The setup is then shown with some exemplary measurements.

  4. Structured wafer for device processing

    DOEpatents

    Okandan, Murat; Nielson, Gregory N

    2014-05-20

    A structured wafer that includes through passages is used for device processing. Each of the through passages extends from or along one surface of the structured wafer and forms a pattern on a top surface area of the structured wafer. The top surface of the structured wafer is bonded to a device layer via a release layer. Devices are processed on the device layer, and are released from the structured wafer using etchant. The through passages within the structured wafer allow the etchant to access the release layer to thereby remove the release layer.

  5. Structured wafer for device processing

    DOEpatents

    Okandan, Murat; Nielson, Gregory N

    2014-11-25

    A structured wafer that includes through passages is used for device processing. Each of the through passages extends from or along one surface of the structured wafer and forms a pattern on a top surface area of the structured wafer. The top surface of the structured wafer is bonded to a device layer via a release layer. Devices are processed on the device layer, and are released from the structured wafer using etchant. The through passages within the structured wafer allow the etchant to access the release layer to thereby remove the release layer.

  6. Wafer-to-wafer bonding of nonplanarized MEMS surfaces using solder

    NASA Astrophysics Data System (ADS)

    Sparks, D.; Queen, G.; Weston, R.; Woodward, G.; Putty, M.; Jordan, L.; Zarabadi, S.; Jayakar, K.

    2001-11-01

    The fabrication and reliability of a solder wafer-to-wafer bonding process is discussed. Using a solder reflow process allows vacuum packaging to be accomplished with unplanarized complementary metal-oxide semiconductor (CMOS) surface topography. This capability enables standard CMOS processes, and integrated microelectromechanical systems devices to be packaged at the chip-level. Alloy variations give this process the ability to bond at lower temperatures than most alternatives. Factors affecting hermeticity, shorts, Q values, shifting cavity pressure, wafer saw cleanliness and corrosion resistance will be covered.

  7. Fast in-situ tool inspection based on inverse fringe projection and compact sensor heads

    NASA Astrophysics Data System (ADS)

    Matthias, Steffen; Kästner, Markus; Reithmeier, Eduard

    2016-11-01

    Inspection of machine elements is an important task in production processes in order to ensure the quality of produced parts and to gather feedback for the continuous improvement process. A new measuring system is presented, which is capable of performing the inspection of critical tool geometries, such as gearing elements, inside the forming machine. To meet the constraints on sensor head size and inspection time imposed by the limited space inside the machine and the cycle time of the process, the measuring device employs a combination of endoscopy techniques with the fringe projection principle. Compact gradient index lenses enable a compact design of the sensor head, which is connected to a CMOS camera and a flexible micro-mirror based projector via flexible fiber bundles. Using common fringe projection patterns, the system achieves measuring times of less than five seconds. To further reduce the time required for inspection, the generation of inverse fringe projection patterns has been implemented for the system. Inverse fringe projection speeds up the inspection process by employing object-adapted patterns, which enable the detection of geometry deviations in a single image. Two different approaches to generate object adapted patterns are presented. The first approach uses a reference measurement of a manufactured tool master to generate the inverse pattern. The second approach is based on a virtual master geometry in the form of a CAD file and a ray-tracing model of the measuring system. Virtual modeling of the measuring device and inspection setup allows for geometric tolerancing for free-form surfaces by the tool designer in the CAD-file. A new approach is presented, which uses virtual tolerance specifications and additional simulation steps to enable fast checking of metric tolerances. Following the description of the pattern generation process, the image processing steps required for inspection are demonstrated on captures of gearing geometries.

  8. Developing quartz wafer mold manufacturing process for patterned media

    NASA Astrophysics Data System (ADS)

    Chiba, Tsuyoshi; Fukuda, Masaharu; Ishikawa, Mikio; Itoh, Kimio; Kurihara, Masaaki; Hoga, Morihisa

    2009-04-01

    Recently, patterned media have gained attention as a possible candidate for use in the next generation of hard disk drives (HDD). Feature sizes on media are predicted to be 20-25 nm half pitch (hp) for discrete-track media in 2010. One method of fabricating such a fine pattern is by using a nanoimprint. The imprint mold for the patterned media is created from a 150-millimeter, rounded, quartz wafer. The purpose of the process introduced here was to construct a quartz wafer mold and to fabricate line and space (LS) patterns at 24 nmhp for DTM. Additionally, we attempted to achieve a dense hole (HOLE) pattern at 12.5 nmhp for BPM for use in 2012. The manufacturing process of molds for patterned media is almost the same as that for semiconductors, with the exception of the dry-etching process. A 150-millimeter quartz wafer was etched on a special tray made from carving a 6025 substrate, by using the photo-mask tool. We also optimized the quartz etching conditions. As a result, 24 nmhp LS and HOLE patterns were manufactured on the quartz wafer. In conclusion, the quartz wafer mold manufacturing process was established. It is suggested that the etching condition should be further optimized to achieve a higher resolution of HOLE patterns.

  9. Wafer-level colinearity monitoring for TFH applications

    NASA Astrophysics Data System (ADS)

    Moore, Patrick; Newman, Gary; Abreau, Kelly J.

    2000-06-01

    Advances in thin film head (TFH) designs continue to outpace those in the IC industry. The transition to giant magneto resistive (GMR) designs is underway along with the push toward areal densities in the 20 Gbit/inch2 regime and beyond. This comes at a time when the popularity of the low-cost personal computer (PC) is extremely high, and PC prices are continuing to fall. Consequently, TFH manufacturers are forced to deal with pricing pressure in addition to technological demands. New methods of monitoring and improving yield are required along with advanced head designs. TFH manufacturing is a two-step process. The first is a wafer-level process consisting of manufacturing devices on substrates using processes similar to those in the IC industry. The second half is a slider-level process where wafers are diced into 'rowbars' containing many heads. Each rowbar is then lapped to obtain the desired performance from each head. Variation in the placement of specific layers of each device on the bar, known as a colinearity error, causes a change in device performance and directly impacts yield. The photolithography tool and process contribute to colinearity errors. These components include stepper lens distortion errors, stepper stage errors, reticle fabrication errors, and CD uniformity errors. Currently, colinearity is only very roughly estimated during wafer-level TFH production. An absolute metrology tool, such as a Nikon XY, could be used to quantify colinearity with improved accuracy, but this technique is impractical since TFH manufacturers typically do not have this type of equipment at the production site. More importantly, this measurement technique does not provide the rapid feedback needed in a high-volume production facility. Consequently, the wafer-fab must rely on resistivity-based measurements from slider-fab to quantify colinearity errors. The feedback of this data may require several weeks, making it useless as a process diagnostic. This study examines

  10. I-line stepper based overlay evaluation method for wafer bonding applications

    NASA Astrophysics Data System (ADS)

    Kulse, P.; Sasai, K.; Schulz, K.; Wietstruck, M.

    2018-03-01

    offsets between all different FIA's into account, after correcting the wafer rotation induced FIA position errors, hence an overlay for the stacked wafers can be determined. The developed approach has been validated by a standard front side resist in resist experiment. After the successful validation of the developed technique, special wafer stacks with FIA alignment marks in the bonding interface are fabricated and exposed. Following overlay calculation shows an overlay of less than 200 nm, which enables very accurate process condition for highly scaled TSV integration and advanced substrate integration into IHP's 0.25/0.13 µm SiGe:C BiCMOS technology. The developed technique also allows using significantly smaller alignment marks (i.e. standard FIA alignment marks). Furthermore, the presented method is used, in case of wafer bow related overlay tool problems, for the overlay evaluation of the last two metal layers from production wafers prepared in IHP's standard 0.25/0.13 µm SiGe:C BiCMOS technology. In conclusion, the exposure and measurement job can be done with the same tool, minimizing the back to front side/interface top layer misalignment which leads to a significant device performance improvement of backside/TSV integrated components and technologies.

  11. Automated Visual Inspection Of Integrated Circuits

    NASA Astrophysics Data System (ADS)

    Noppen, G.; Oosterlinck, Andre J.

    1989-07-01

    One of the major application fields of image processing techniques is the 'visual inspection'. For a number of rea-sons, the automated visual inspection of Integrated Circuits (IC's) has drawn a lot of attention. : Their very strict design makes them very suitable for an automated inspection. : There is already a lot of experience in the comparable Printed Circuit Board (PCB) and mask inspection. : The mechanical handling of wafers and dice is already an established technology. : Military and medical IC's should be a 100 % failproof. : IC inspection gives a high and allinost immediate payback. In this paper we wil try to give an outline of the problems involved in IC inspection, and the algorithms and methods used to overcome these problems. We will not go into de-tail, but we will try to give a general understanding. Our attention will go to the following topics. : An overview of the inspection process, with an emphasis on the second visual inspection. : The problems encountered in IC inspection, as opposed to the comparable PCB and mask inspection. : The image acquisition devices that can be used to obtain 'inspectable' images. : A general overview of the algorithms that can be used. : A short description of the algorithms developed at the ESAT-MI2 division of the katholieke Universiteit Leuven.

  12. Critical dimension control using ultrashort laser for improving wafer critical dimension uniformity

    NASA Astrophysics Data System (ADS)

    Avizemer, Dan; Sharoni, Ofir; Oshemkov, Sergey; Cohen, Avi; Dayan, Asaf; Khurana, Ranjan; Kewley, Dave

    2015-07-01

    Requirements for control of critical dimension (CD) become more demanding as the integrated circuit (IC) feature size specifications become tighter and tighter. Critical dimension control, also known as CDC, is a well-known laser-based process in the IC industry that has proven to be robust, repeatable, and efficient in adjusting wafer CD uniformity (CDU) [Proc. SPIE 6152, 615225 (2006)]. The process involves locally and selectively attenuating the deep ultraviolet light which goes through the photomask to the wafer. The input data for the CDC process in the wafer fab is typically taken from wafer CDU data, which is measured by metrology tools such as wafer-critical dimension-scanning electron microscopy (CD-SEM), wafer optical scatterometry, or wafer level CD (WLCD). The CD correction process uses the CDU data in order to create an attenuation correction contour, which is later applied by the in-situ ultrashort laser system of the CDC to locally change the transmission of the photomask. The ultrashort pulsed laser system creates small, partially scattered, Shade-In-Elements (also known as pixels) by focusing the laser beam inside the quartz bulk of the photomask. This results in the formation of a localized, intravolume, quartz modified area, which has a different refractive index than the quartz bulk itself. The CDC process flow for improving wafer CDU in a wafer fab with detailed explanations of the shading elements formation inside the quartz by the ultrashort pulsed laser is reviewed.

  13. Particle detection for patterned wafers of 100nm design rule by evanescent light illumination: analysis of evanescent light scattering using Finite-Difference Time-Domain (FDTD) method

    NASA Astrophysics Data System (ADS)

    Yoshioka, Toshie; Miyoshi, Takashi; Takaya, Yasuhiro

    2005-12-01

    To realize high productivity and reliability of the semiconductor, patterned wafers inspection technology to maintain high yield becomes essential in modern semiconductor manufacturing processes. As circuit feature is scaled below 100nm, the conventional imaging and light scattering methods are impossible to apply to the patterned wafers inspection technique, because of diffraction limit and lower S/N ratio. So, we propose a new particle detection method using annular evanescent light illumination. In this method, a converging annular light used as a light source is incident on a micro-hemispherical lens. When the converging angle is larger than critical angle, annular evanescent light is generated under the bottom surface of the hemispherical lens. Evanescent light is localized near by the bottom surface and decays exponentially away from the bottom surface. So, the evanescent light selectively illuminates the particles on the patterned wafer surface, because it can't illuminate the patterned wafer surface. The proposed method evaluates particles on a patterned wafer surface by detecting scattered evanescent light distribution from particles. To analyze the fundamental characteristics of the proposed method, the computer simulation was performed using FDTD method. The simulation results show that the proposed method is effective for detecting 100nm size particle on patterned wafer of 100nm lines and spaces, particularly under the condition that the evanescent light illumination with p-polarization and parallel incident to the line orientation. Finally, the experiment results suggest that 220nm size particle on patterned wafer of about 200nm lines and spaces can be detected.

  14. Photolithography diagnostic expert systems: a systematic approach to problem solving in a wafer fabrication facility

    NASA Astrophysics Data System (ADS)

    Weatherwax Scott, Caroline; Tsareff, Christopher R.

    1990-06-01

    One of the main goals of process engineering in the semiconductor industry is to improve wafer fabrication productivity and throughput. Engineers must work continuously toward this goal in addition to performing sustaining and development tasks. To accomplish these objectives, managers must make efficient use of engineering resources. One of the tools being used to improve efficiency is the diagnostic expert system. Expert systems are knowledge based computer programs designed to lead the user through the analysis and solution of a problem. Several photolithography diagnostic expert systems have been implemented at the Hughes Technology Center to provide a systematic approach to process problem solving. This systematic approach was achieved by documenting cause and effect analyses for a wide variety of processing problems. This knowledge was organized in the form of IF-THEN rules, a common structure for knowledge representation in expert system technology. These rules form the knowledge base of the expert system which is stored in the computer. The systems also include the problem solving methodology used by the expert when addressing a problem in his area of expertise. Operators now use the expert systems to solve many process problems without engineering assistance. The systems also facilitate the collection of appropriate data to assist engineering in solving unanticipated problems. Currently, several expert systems have been implemented to cover all aspects of the photolithography process. The systems, which have been in use for over a year, include wafer surface preparation (HMDS), photoresist coat and softbake, align and expose on a wafer stepper, and develop inspection. These systems are part of a plan to implement an expert system diagnostic environment throughout the wafer fabrication facility. In this paper, the systems' construction is described, including knowledge acquisition, rule construction, knowledge refinement, testing, and evaluation. The roles

  15. Mechanics of wafer bonding: Effect of clamping

    NASA Astrophysics Data System (ADS)

    Turner, K. T.; Thouless, M. D.; Spearing, S. M.

    2004-01-01

    A mechanics-based model is developed to examine the effects of clamping during wafer bonding processes. The model provides closed-form expressions that relate the initial geometry and elastic properties of the wafers to the final shape of the bonded pair and the strain energy release rate at the interface for two different clamping configurations. The results demonstrate that the curvature of bonded pairs may be controlled through the use of specific clamping arrangements during the bonding process. Furthermore, it is demonstrated that the strain energy release rate depends on the clamping configuration and that using applied loads usually leads to an undesirable increase in the strain energy release rate. The results are discussed in detail and implications for process development and bonding tool design are highlighted.

  16. Correlation study of actual temperature profile and in-line metrology measurements for within-wafer uniformity improvement and wafer edge yield enhancement (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Fang, Fang; Vaid, Alok; Vinslava, Alina; Casselberry, Richard; Mishra, Shailendra; Dixit, Dhairya; Timoney, Padraig; Chu, Dinh; Porter, Candice; Song, Da; Ren, Zhou

    2018-03-01

    It is getting more important to monitor all aspects of influencing parameters in critical etch steps and utilize them as tuning knobs for within-wafer uniformity improvement and wafer edge yield enhancement. Meanwhile, we took a dive in pursuing "measuring what matters" and challenged ourselves for more aspects of signals acquired in actual process conditions. Among these factors which are considered subtle previously, we identified Temperature, especially electrostatic chuck (ESC) Temperature measurement in real etch process conditions have direct correlation to in-line measurements. In this work, we used SensArray technique (EtchTemp-SE wafer) to measure ESC temperature profile on a 300mm wafer with plasma turning on to reproduce actual temperature pattern on wafers in real production process conditions. In field applications, we observed substantial correlation between ESC temperature and in-line optical metrology measurements and since temperature is a process factor that can be tuning through set-temperature modulations, we have identified process knobs with known impact on physical profile variations. Furthermore, ESC temperature profile on a 300mm wafer is configured as multiple zones upon radius and SensArray measurements mechanism could catch such zonal distribution as well, which enables detailed temperature modulations targeting edge ring only where most of chips can be harvested and critical zone for yield enhancement. Last but not least, compared with control reference (ESC Temperature in static plasma-off status), we also get additional factors to investigate in chamber-to-chamber matching study and make process tool fleet match on the basis really matters in production. KLA-Tencor EtchTemp-SE wafer enables Plasma On wafer temperature monitoring of silicon etch process. This wafer is wireless and has 65 sensors with measurement range from 20 to 140°C. the wafer is designed to run in real production recipe plasma on condition with maximum RF power up

  17. MEMS packaging with etching and thinning of lid wafer to form lids and expose device wafer bond pads

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chanchani, Rajen; Nordquist, Christopher; Olsson, Roy H

    In wafer-level packaging of microelectromechanical (MEMS) devices a lid wafer is bonded to a MEMS wafer in a predermined aligned relationship. Portions of the lid wafer are removed to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, and to expose areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices.

  18. Surface Inspection Tool for Optical Detection of Surface Defects

    NASA Technical Reports Server (NTRS)

    Nurge, Mark; Youngquist, Robert; Dyer, Dustin

    2013-01-01

    The Space Shuttle Orbiter windows were damaged both by micrometeor impacts and by handling, and required careful inspection before they could be reused. The launch commit criteria required that no defect be deeper than a critical depth. The shuttle program used a refocus microscope to perform a quick pass/fail determination, and then followed up with mold impressions to better quantify any defect. However, the refocus microscope is slow and tedious to use due to its limited field of view, only focusing on one small area of glass at a time. Additionally, the unit is bulky and unable to be used in areas with tight access, such as defects near the window frame or on the glass inside the Orbiter due to interference with the dashboard. The surface inspection tool is a low-profile handheld instrument that provides two digital video images on a computer for monitoring surface defects. The first image is a wide-angle view to assist the user in locating defects. The second provides an enlarged view of a defect centered in the window of the first image. The focus is adjustable for each of the images. However, the enlarged view was designed to have a focal plane with a short depth. This allows the user to get a feel for the depth of different parts of the defect under inspection as the focus control is varied. A light source is also provided to illuminate the defect, precluding the need for separate lighting tools. The software provides many controls to adjust image quality, along with the ability to zoom digitally the images and to capture and store them for later processing.

  19. Modeling of direct wafer bonding: Effect of wafer bow and etch patterns

    NASA Astrophysics Data System (ADS)

    Turner, K. T.; Spearing, S. M.

    2002-12-01

    Direct wafer bonding is an important technology for the manufacture of silicon-on-insulator substrates and microelectromechanical systems. As devices become more complex and require the bonding of multiple patterned wafers, there is a need to understand the mechanics of the bonding process. A general bonding criterion based on the competition between the strain energy accumulated in the wafers and the surface energy that is dissipated as the bond front advances is developed. The bonding criterion is used to examine the case of bonding bowed wafers. An analytical expression for the strain energy accumulation rate, which is the quantity that controls bonding, and the final curvature of a bonded stack is developed. It is demonstrated that the thickness of the wafers plays a large role and bonding success is independent of wafer diameter. The analytical results are verified through a finite element model and a general method for implementing the bonding criterion numerically is presented. The bonding criterion developed permits the effect of etched features to be assessed. Shallow etched patterns are shown to make bonding more difficult, while it is demonstrated that deep etched features can facilitate bonding. Model results and their process design implications are discussed in detail.

  20. Optimal mask characterization by Surrogate Wafer Print (SWaP) method

    NASA Astrophysics Data System (ADS)

    Kimmel, Kurt R.; Hoellein, Ingo; Peters, Jan Hendrick; Ackmann, Paul; Connolly, Brid; West, Craig

    2008-10-01

    Traditionally, definition of mask specifications is done completely by the mask user, while characterization of the mask relative to the specifications is done completely by the mask maker. As the challenges of low-k1 imaging continue to grow in scope of designs and in absolute complexity, the inevitable partnership between wafer lithographers and mask makers has strengthened as well. This is reflected in the jointly owned mask facilities and device manufacturers' continued maintenance of fully captive mask shops which foster the closer mask-litho relationships. However, while some device manufacturers have leveraged this to optimize mask specifications before the mask is built and, therefore, improve mask yield and cost, the opportunity for post-fabrication partnering on mask characterization is more apparent and compelling. The Advanced Mask Technology Center (AMTC) has been investigating the concept of assessing how a mask images, rather than the mask's physical attributes, as a technically superior and lower-cost method to characterize a mask. The idea of printing a mask under its intended imaging conditions, then characterizing the imaged wafer as a surrogate for traditional mask inspections and measurements represents the ultimate method to characterize a mask's performance, which is most meaningful to the user. Surrogate wafer print (SWaP) is already done as part of leading-edge wafer fab mask qualification to validate defect and dimensional performance. In the past, the prospect of executing this concept has generally been summarily discarded as technically untenable and logistically intractable. The AMTC published a paper at BACUS 2007 successfully demonstrating the performance of SWaP for the characterization of defects as an alternative to traditional mask inspection [1]. It showed that this concept is not only feasible, but, in some cases, desirable. This paper expands on last year's work at AMTC to assess the full implementation of SWaP as an

  1. Yield impact for wafer shape misregistration-based binning for overlay APC diagnostic enhancement

    NASA Astrophysics Data System (ADS)

    Jayez, David; Jock, Kevin; Zhou, Yue; Govindarajulu, Venugopal; Zhang, Zhen; Anis, Fatima; Tijiwa-Birk, Felipe; Agarwal, Shivam

    2018-03-01

    The importance of traditionally acceptable sources of variation has started to become more critical as semiconductor technologies continue to push into smaller technology nodes. New metrology techniques are needed to pursue the process uniformity requirements needed for controllable lithography. Process control for lithography has the advantage of being able to adjust for cross-wafer variability, but this requires that all processes are close in matching between process tools/chambers for each process. When this is not the case, the cumulative line variability creates identifiable groups of wafers1 . This cumulative shape based effect is described as impacting overlay measurements and alignment by creating misregistration of the overlay marks. It is necessary to understand what requirements might go into developing a high volume manufacturing approach which leverages this grouping methodology, the key inputs and outputs, and what can be extracted from such an approach. It will be shown that this line variability can be quantified into a loss of electrical yield primarily at the edge of the wafer and proposes a methodology for root cause identification and improvement. This paper will cover the concept of wafer shape based grouping as a diagnostic tool for overlay control and containment, the challenges in implementing this in a manufacturing setting, and the limitations of this approach. This will be accomplished by showing that there are identifiable wafer shape based signatures. These shape based wafer signatures will be shown to be correlated to overlay misregistration, primarily at the edge. It will also be shown that by adjusting for this wafer shape signal, improvements can be made to both overlay as well as electrical yield. These improvements show an increase in edge yield, and a reduction in yield variability.

  2. High throughput web inspection system using time-stretch real-time imaging

    NASA Astrophysics Data System (ADS)

    Kim, Chanju

    Photonic time-stretch is a novel technology that enables capturing of fast, rare and non-repetitive events. Therefore, it operates in real-time with ability to record over long period of time while having fine temporal resolution. The powerful property of photonic time-stretch has already been employed in various fields of application such as analog-to-digital conversion, spectroscopy, laser scanner and microscopy. Further expanding the scope, we fully exploit the time-stretch technology to demonstrate a high throughput web inspection system. Web inspection, namely surface inspection is a nondestructive evaluation method which is crucial for semiconductor wafer and thin film production. We successfully report a dark-field web inspection system with line scan speed of 90.9 MHz which is up to 1000 times faster than conventional inspection instruments. The manufacturing of high quality semiconductor wafer and thin film may directly benefit from this technology as it can easily locate defects with area of less than 10 microm x 10 microm where it allows maximum web flow speed of 1.8 km/s. The thesis provides an overview of our web inspection technique, followed by description of the photonic time-stretch technique which is the keystone in our system. A detailed explanation of each component is covered to provide quantitative understanding of the system. Finally, imaging results from a hard-disk sample and flexible films are presented along with performance analysis of the system. This project was the first application of time-stretch to industrial inspection, and was conducted under financial support and with close involvement by Hitachi, Ltd.

  3. Performance Evaluations of Ceramic Wafer Seals

    NASA Technical Reports Server (NTRS)

    Dunlap, Patrick H., Jr.; DeMange, Jeffrey J.; Steinetz, Bruce M.

    2006-01-01

    Future hypersonic vehicles will require high temperature, dynamic seals in advanced ramjet/scramjet engines and on the vehicle airframe to seal the perimeters of movable panels, flaps, and doors. Seal temperatures in these locations can exceed 2000 F, especially when the seals are in contact with hot ceramic matrix composite sealing surfaces. NASA Glenn Research Center is developing advanced ceramic wafer seals to meet the needs of these applications. High temperature scrub tests performed between silicon nitride wafers and carbon-silicon carbide rub surfaces revealed high friction forces and evidence of material transfer from the rub surfaces to the wafer seals. Stickage between adjacent wafers was also observed after testing. Several design changes to the wafer seals were evaluated as possible solutions to these concerns. Wafers with recessed sides were evaluated as a potential means of reducing friction between adjacent wafers. Alternative wafer materials are also being considered as a means of reducing friction between the seals and their sealing surfaces and because the baseline silicon nitride wafer material (AS800) is no longer commercially available.

  4. Microemulsion-Based Mucoadhesive Buccal Wafers: Wafer Formation, In Vitro Release, and Ex Vivo Evaluation.

    PubMed

    Pham, Minh Nguyet; Van Vo, Toi; Tran, Van-Thanh; Tran, Phuong Ha-Lien; Tran, Thao Truong-Dinh

    2017-10-01

    Microemulsion has the potentials to enhance dissolution as well as facilitate absorption and permeation of poorly water-soluble drugs through biological membranes. However, its application to govern a controlled release buccal delivery for local treatment has not been discovered. The aim of this study is to develop microemulsion-based mucoadhesive wafers for buccal delivery based on an incorporation of the microemulsion with mucoadhesive agents and mannitol. Ratio of oil to surfactant to water in the microemulsion significantly impacted quality of the wafers. Furthermore, the combination of carbopol and mannitol played a key role in forming the desired buccal wafers. The addition of an extra 50% of water to the formulation was suitable for wafer formation by freeze-drying, which affected the appearance and distribution of carbopol in the wafers. The amount of carbopol was critical for the enhancement of mucoadhesive properties and the sustained drug release patterns. Release study presented a significant improvement of the drug release profile following sustained release for 6 h. Ex vivo mucoadhesive studies provided decisive evidence to the increased retention time of wafers along with the increased carbopol content. The success of this study indicates an encouraging strategy to formulate a controlled drug delivery system by incorporating microemulsions into mucoadhesive wafers.

  5. Wafer-scale layer transfer of GaAs and Ge onto Si wafers using patterned epitaxial lift-off

    NASA Astrophysics Data System (ADS)

    Mieda, Eiko; Maeda, Tatsuro; Miyata, Noriyuki; Yasuda, Tetsuji; Kurashima, Yuichi; Maeda, Atsuhiko; Takagi, Hideki; Aoki, Takeshi; Yamamoto, Taketsugu; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko; Ogawa, Arito; Kikuchi, Toshiyuki; Kunii, Yasuo

    2015-03-01

    We have developed a wafer-scale layer-transfer technique for transferring GaAs and Ge onto Si wafers of up to 300 mm in diameter. Lattice-matched GaAs or Ge layers were epitaxially grown on GaAs wafers using an AlAs release layer, which can subsequently be transferred onto a Si handle wafer via direct wafer bonding and patterned epitaxial lift-off (ELO). The crystal properties of the transferred GaAs layers were characterized by X-ray diffraction (XRD), photoluminescence, and the quality of the transferred Ge layers was characterized using Raman spectroscopy. We find that, after bonding and the wet ELO processes, the quality of the transferred GaAs and Ge layers remained the same compared to that of the as-grown epitaxial layers. Furthermore, we realized Ge-on-insulator and GaAs-on-insulator wafers by wafer-scale pattern ELO technique.

  6. Support apparatus for semiconductor wafer processing

    DOEpatents

    Griffiths, Stewart K.; Nilson, Robert H.; Torres, Kenneth J.

    2003-06-10

    A support apparatus for minimizing gravitational stress in semiconductor wafers, and particularly silicon wafers, during thermal processing. The support apparatus comprises two concentric circular support structures disposed on a common support fixture. The two concentric circular support structures, located generally at between 10 and 70% and 70 and 100% and preferably at 35 and 82.3% of the semiconductor wafer radius, can be either solid rings or a plurality of spaced support points spaced apart from each other in a substantially uniform manner. Further, the support structures can have segments removed to facilitate wafer loading and unloading. In order to withstand the elevated temperatures encountered during semiconductor wafer processing, the support apparatus, including the concentric circular support structures and support fixture can be fabricated from refractory materials, such as silicon carbide, quartz and graphite. The claimed wafer support apparatus can be readily adapted for use in either batch or single-wafer processors.

  7. Wafer characteristics via reflectometry

    DOEpatents

    Sopori, Bhushan L.

    2010-10-19

    Various exemplary methods (800, 900, 1000, 1100) are directed to determining wafer thickness and/or wafer surface characteristics. An exemplary method (900) includes measuring reflectance of a wafer and comparing the measured reflectance to a calculated reflectance or a reflectance stored in a database. Another exemplary method (800) includes positioning a wafer on a reflecting support to extend a reflectance range. An exemplary device (200) has an input (210), analysis modules (222-228) and optionally a database (230). Various exemplary reflectometer chambers (1300, 1400) include radiation sources positioned at a first altitudinal angle (1308, 1408) and at a second altitudinal angle (1312, 1412). An exemplary method includes selecting radiation sources positioned at various altitudinal angles. An exemplary element (1650, 1850) includes a first aperture (1654, 1854) and a second aperture (1658, 1858) that can transmit reflected radiation to a fiber and an imager, respectfully.

  8. Resolving critical dimension drift over time in plasma etching through virtual metrology based wafer-to-wafer control

    NASA Astrophysics Data System (ADS)

    Lee, Ho Ki; Baek, Kye Hyun; Shin, Kyoungsub

    2017-06-01

    As semiconductor devices are scaled down to sub-20 nm, process window of plasma etching gets extremely small so that process drift or shift becomes more significant. This study addresses one of typical process drift issues caused by consumable parts erosion over time and provides feasible solution by using virtual metrology (VM) based wafer-to-wafer control. Since erosion of a shower head has center-to-edge area dependency, critical dimensions (CDs) at the wafer center and edge area get reversed over time. That CD trend is successfully estimated on a wafer-to-wafer basis by a partial least square (PLS) model which combines variables from optical emission spectroscopy (OES), VI-probe and equipment state gauges. R 2 of the PLS model reaches 0.89 and its prediction performance is confirmed in a mass production line. As a result, the model can be exploited as a VM for wafer-to-wafer control. With the VM, advanced process control (APC) strategy is implemented to solve the CD drift. Three σ of CD across wafer is improved from the range (1.3-2.9 nm) to the range (0.79-1.7 nm). Hopefully, results introduced in this paper will contribute to accelerating implementation of VM based APC strategy in semiconductor industry.

  9. Wafer scale oblique angle plasma etching

    DOEpatents

    Burckel, David Bruce; Jarecki, Jr., Robert L.; Finnegan, Patrick Sean

    2017-05-23

    Wafer scale oblique angle etching of a semiconductor substrate is performed in a conventional plasma etch chamber by using a fixture that supports a multiple number of separate Faraday cages. Each cage is formed to include an angled grid surface and is positioned such that it will be positioned over a separate one of the die locations on the wafer surface when the fixture is placed over the wafer. The presence of the Faraday cages influences the local electric field surrounding each wafer die, re-shaping the local field to be disposed in alignment with the angled grid surface. The re-shaped plasma causes the reactive ions to follow a linear trajectory through the plasma sheath and angled grid surface, ultimately impinging the wafer surface at an angle. The selected geometry of the Faraday cage angled grid surface thus determines the angle at with the reactive ions will impinge the wafer.

  10. Controlling Wafer Contamination Using Automated On-Line Metrology during Wet Chemical Cleaning

    NASA Astrophysics Data System (ADS)

    Wang, Jason; Kingston, Skip; Han, Ye; Saini, Harmesh; McDonald, Robert; Mui, Rudy

    2003-09-01

    The capabilities of a trace contamination analyzer are discussed and demonstrated. This analytical tool utilizes an electrospray, time-of-flight mass spectrometer (ES-TOF-MS) for fully automated on-line monitoring of wafer cleaning solutions. The analyzer provides rich information on metallic, anionic, cationic, elemental, and organic species through its ability to provide harsh (elemental) and soft (molecular) ionization under both positive and negative modes. It is designed to meet semiconductor process control and yield management needs for the ever increasing complex new chemistries present in wafer fabrication.

  11. Laser wafering for silicon solar.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

    2011-03-01

    Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W{sub p} (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs ({approx}20%), embodied energy, and green-house gas GHG emissions ({approx}50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurfacemore » damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 {micro}m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.« less

  12. Multiproject wafers: not just for million-dollar mask sets

    NASA Astrophysics Data System (ADS)

    Morse, Richard D.

    2003-06-01

    With the advent of Reticle Enhancement Technologies (RET) such as Optical Proximity Correction (OPC) and Phase Shift Masks (PSM) required to manufacture semiconductors in the sub-wavelength era, the cost of photomask tooling has skyrocketed. On the leading edge of technology, mask set prices often exceed $1 million. This shifts an enormous burden back to designers and Electronic Design Automation (EDA) software vendors to create perfect designs at a time when the number of transistors per chip is measured in the hundreds of millions, and gigachips are on the drawing boards. Moore's Law has driven technology to incredible feats. The prime beneficiaries of the technology - memory and microprocessor (MPU) manufacturers - can continue to fit the model because wafer volumes (and chip prices in the MPU case) render tooling costs relatively insignificant. However, Application-Specific IC (ASIC) manufacturers and most foundry clients average very small wafer per reticle ratios causing a dramatic and potentially insupportable rise in the cost of manufacturing. Multi-Project wafers (MPWs) are a way to share the cost of tooling and silicon by putting more than one chip on each reticle. Lacking any unexpected breakthroughs in simulation, verification, or mask technology to reduce the cost of prototyping, more efficient use of reticle space becomes a viable and increasingly attractive choice. It is worthwhile therefore, to discuss the economics of prototyping in the sub-wavelength era and the increasing advantages of the MPW, shared-silicon approach. However, putting together a collection of different-sized chips during tapeout can be challenging and time consuming. Design compatibility, reticle field optimization, and frame generation have traditionally been the biggest worries but, with the advent of dummy-fill for planarization and RET for resolution, another layer of complexity has been added. MPW automation software is quite advanced today, but the size of the task

  13. Carbon dioxide capture using resin-wafer electrodeionization

    DOEpatents

    Lin, YuPo J.; Snyder, Seth W.; Trachtenberg, Michael S.; Cowan, Robert M.; Datta, Saurav

    2015-09-08

    The present invention provides a resin-wafer electrodeionization (RW-EDI) apparatus including cathode and anode electrodes separated by a plurality of porous solid ion exchange resin wafers, which when in use are filled with an aqueous fluid. The apparatus includes one or more wafers comprising a basic ion exchange medium, and preferably includes one or more wafers comprising an acidic ion exchange medium. The wafers are separated from one another by ion exchange membranes. The fluid within the acidic and/or basic ion exchange wafers preferably includes, or is in contact with, a carbonic anhydrase (CA) enzyme to facilitate conversion of bicarbonate ion to carbon dioxide within the acidic medium. A pH suitable for exchange of CO.sub.2 is electrochemically maintained within the basic and acidic ion exchange wafers by applying an electric potential across the cathode and anode.

  14. Methane production using resin-wafer electrodeionization

    DOEpatents

    Snyder, Seth W; Lin, YuPo; Urgun-Demirtas, Meltem

    2014-03-25

    The present invention provides an efficient method for creating natural gas including the anaerobic digestion of biomass to form biogas, and the electrodeionization of biogas to form natural gas and carbon dioxide using a resin-wafer deionization (RW-EDI) system. The method may be further modified to include a wastewater treatment system and can include a chemical conditioning/dewatering system after the anaerobic digestion system. The RW-EDI system, which includes a cathode and an anode, can either comprise at least one pair of wafers, each a basic and acidic wafer, or at least one wafer comprising of a basic portion and an acidic portion. A final embodiment of the RW-EDI system can include only one basic wafer for creating natural gas.

  15. Evaluation of anti-sticking layers performances for 200mm wafer scale Smart NILTM process through surface and defectivity characterizations

    NASA Astrophysics Data System (ADS)

    Delachat, F.; Phillipe, J.-C.; Larrey, V.; Fournel, F.; Bos, S.; Teyssèdre, H.; Chevalier, Xavier; Nicolet, Célia; Navarro, Christophe; Cayrefourcq, Ian

    2018-03-01

    In this work, an evaluation of various ASL processes for 200 mm wafer scale in the HERCULES® NIL equipment platform available at the CEA-Leti through the INSPIRE program is reported. The surface and adherence energies were correlated to the AFM and defectivity results in order to select the most promising ASL process for high resolution etch mask applications. The ASL performances of the selected process were evaluated by multiple working stamp fabrication using unpatterned and patterned masters though defectivity monitoring on optical based-inspection tools. Optical and SEM defect reviews were systematically performed. Multiple working stamps fabrication without degradation of the master defectivity was witnessed. This evaluation enabled to benchmark several ASL solutions based on the grafted technology develop by ARKEMA in order to reduce and optimize the soft stamp defectivity prior to its replication and therefore considerably reduce the final imprint defectivity for the Smart NIL process.

  16. Thinning of PLZT ceramic wafers for sensor integration

    NASA Astrophysics Data System (ADS)

    Jin, Na; Liu, Weiguo

    2010-08-01

    Characteristics of transparent PLZT ceramics can be tailored by controlling the component of them, and therefore showed excellent dielectric, piezoelectric, pyroelectric and ferroelectric properties. To integrate the ceramics with microelectronic circuit to realize integrated applications, the ceramic wafers have to be thinned down to micrometer scale in thickness. A7/65/35 PLZT ceramic wafer was selected in this study for the thinning process. Size of the wafer was 10×10mm with an initial thickness of 300μm. A novel membrane transfer process (MTP) was developed for the thinning and integration of the ceramic wafers. In the MTP process, the ceramic wafer was bonded to silicon wafer using a polymer bonding method. Mechanical grinding method was applied to reduce the thickness of the ceramic. To minimize the surface damage in the ceramic wafer caused by the mechanical grinding, magnetorheological finishing (MRF) method was utilized to polish the wafer. White light interference (WLI) apparatus was used to monitor the surface qualities of the grinded and ploished ceramic wafers. For the PLZT membrane obtained from the MTP process, the final thickness of the thinned and polished wafer was 10μm, the surface roughness was below 1nm in rms, and the flatness was better than λ/5.

  17. Temperature Dependent Electrical Properties of PZT Wafer

    NASA Astrophysics Data System (ADS)

    Basu, T.; Sen, S.; Seal, A.; Sen, A.

    2016-04-01

    The electrical and electromechanical properties of lead zirconate titanate (PZT) wafers were investigated and compared with PZT bulk. PZT wafers were prepared by tape casting technique. The transition temperature of both the PZT forms remained the same. The transition from an asymmetric to a symmetric shape was observed for PZT wafers at higher temperature. The piezoelectric coefficient (d 33) values obtained were 560 pc/N and 234 pc/N, and the electromechanical coupling coefficient (k p) values were 0.68 and 0.49 for bulk and wafer, respectively. The reduction in polarization after fatigue was only ~3% in case of PZT bulk and ~7% for PZT wafer.

  18. Porous solid ion exchange wafer for immobilizing biomolecules

    DOEpatents

    Arora, Michelle B.; Hestekin, Jamie A.; Lin, YuPo J.; St. Martin, Edward J.; Snyder, Seth W.

    2007-12-11

    A porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer. Also disclosed is a porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer containing a biomolecule with a tag. A separate bioreactor is also disclosed incorporating the wafer described above.

  19. Overlay Tolerances For VLSI Using Wafer Steppers

    NASA Astrophysics Data System (ADS)

    Levinson, Harry J.; Rice, Rory

    1988-01-01

    In order for VLSI circuits to function properly, the masking layers used in the fabrication of those devices must overlay each other to within the manufacturing tolerance incorporated in the circuit design. The capabilities of the alignment tools used in the masking process determine the overlay tolerances to which circuits can be designed. It is therefore of considerable importance that these capabilities be well characterized. Underestimation of the overlay accuracy results in unnecessarily large devices, resulting in poor utilization of wafer area and possible degradation of device performance. Overestimation will result in significant yield loss because of the failure to conform to the tolerances of the design rules. The proper methodology for determining the overlay capabilities of wafer steppers, the most commonly used alignment tool for the production of VLSI circuits, is the subject of this paper. Because cost-effective manufacturing process technology has been the driving force of VLSI, the impact on productivity is a primary consideration in all discussions. Manufacturers of alignment tools advertise the capabilities of their equipment. It is notable that no manufacturer currently characterizes his aligners in a manner consistent with the requirements of producing very large integrated circuits, as will be discussed. This has resulted in the situation in which the evaluation and comparison of the capabilities of alignment tools require the attention of a lithography specialist. Unfortunately, lithographic capabilities must be known by many other people, particularly the circuit designers and the managers responsible for the financial consequences of the high prices of modern alignment tools. All too frequently, the designer or manager is confronted with contradictory data, one set coming from his lithography specialist, and the other coming from a sales representative of an equipment manufacturer. Since the latter generally attempts to make his

  20. Influence of Wafer Edge Geometry on Removal Rate Profile in Chemical Mechanical Polishing: Wafer Edge Roll-Off and Notch

    NASA Astrophysics Data System (ADS)

    Fukuda, Akira; Fukuda, Tetsuo; Fukunaga, Akira; Tsujimura, Manabu

    2012-05-01

    In the chemical mechanical polishing (CMP) process, uniform polishing up to near the wafer edge is essential to reduce edge exclusion and improve yield. In this study, we examine the influences of inherent wafer edge geometries, i.e., wafer edge roll-off and notch, on the CMP removal rate profile. We clarify the areas in which the removal rate profile is affected by the wafer edge roll-off and the notch, as well as the intensity of their effects on the removal rate profile. In addition, we propose the use of a small notch to reduce the influence of the wafer notch and present the results of an examination by finite element method (FEM) analysis.

  1. Optical inspection of NGL masks

    NASA Astrophysics Data System (ADS)

    Pettibone, Donald W.; Stokowski, Stanley E.

    2004-12-01

    For the last five years KLA-Tencor and our joint venture partners have pursued a research program studying the ability of optical inspection tools to meet the inspection needs of possible NGL lithographies. The NGL technologies that we have studied include SCALPEL, PREVAIL, EUV lithography, and Step and Flash Imprint Lithography. We will discuss the sensitivity of the inspection tools and mask design factors that affect tool sensitivity. Most of the work has been directed towards EUV mask inspection and how to optimize the mask to facilitate inspection. Our partners have succeeded in making high contrast EUV masks ranging in contrast from 70% to 98%. Die to die and die to database inspection of EUV masks have been achieved with a sensitivity that is comparable to what can be achieved with conventional photomasks, approximately 80nm defect sensitivity. We have inspected SCALPEL masks successfully. We have found a limitation of optical inspection when applied to PREVAIL stencil masks. We have run inspections on SFIL masks in die to die, reflected light, in an effort to provide feedback to improve the masks. We have used a UV inspection system to inspect both unpatterned EUV substrates (no coatings) and blanks (with EUV multilayer coatings). These inspection results have proven useful in driving down the substrate and blank defect levels.

  2. A wafer-level vacuum package using glass-reflowed silicon through-wafer interconnection for nano/micro devices.

    PubMed

    Jin, Joo-Young; Yoo, Seung-Hyun; Yoo, Byung-Wook; Kim, Yong-Kweon

    2012-07-01

    We propose a vacuum wafer-level packaging (WLP) process using glass-reflowed silicon via for nano/micro devices (NMDs). A through-wafer interconnection (TWIn) substrate with silicon vias and reflowed glass is introduced to accomplish a vertical feed-through of device. NMDs are fabricated in the single crystal silicon (SCS) layer which is formed on the TWIn substrate by Au eutectic bonding including Cr adhesion layer. The WLPof the devices is achieved with the capping glass wafer anodically bonded to the SCS layer. In order to demonstrate the successful hermetic packaging, we fabricated the micro-Pirani gauge in the SCS layer, and packaged it in the wafer-level. The vacuum level inside the packaging was measured to be 3.1 Torr with +/- 0.12 Torr uncertainty, and the packaging leakage was not detected during 24 hour after the packaging.

  3. Wafer-fused semiconductor radiation detector

    DOEpatents

    Lee, Edwin Y.; James, Ralph B.

    2002-01-01

    Wafer-fused semiconductor radiation detector useful for gamma-ray and x-ray spectrometers and imaging systems. The detector is fabricated using wafer fusion to insert an electrically conductive grid, typically comprising a metal, between two solid semiconductor pieces, one having a cathode (negative electrode) and the other having an anode (positive electrode). The wafer fused semiconductor radiation detector functions like the commonly used Frisch grid radiation detector, in which an electrically conductive grid is inserted in high vacuum between the cathode and the anode. The wafer-fused semiconductor radiation detector can be fabricated using the same or two different semiconductor materials of different sizes and of the same or different thicknesses; and it may utilize a wide range of metals, or other electrically conducting materials, to form the grid, to optimize the detector performance, without being constrained by structural dissimilarity of the individual parts. The wafer-fused detector is basically formed, for example, by etching spaced grooves across one end of one of two pieces of semiconductor materials, partially filling the grooves with a selected electrical conductor which forms a grid electrode, and then fusing the grooved end of the one semiconductor piece to an end of the other semiconductor piece with a cathode and an anode being formed on opposite ends of the semiconductor pieces.

  4. Wafer-Level Membrane-Transfer Process for Fabricating MEMS

    NASA Technical Reports Server (NTRS)

    Yang, Eui-Hyeok; Wiberg, Dean

    2003-01-01

    A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

  5. Post exposure bake unit equipped with wafer-shape compensation technology

    NASA Astrophysics Data System (ADS)

    Goto, Shigehiro; Morita, Akihiko; Oyama, Kenichi; Hori, Shimpei; Matsuchika, Keiji; Taniguchi, Hideyuki

    2007-03-01

    In 193nm lithography, it is well known that Critical Dimension Uniformity (CDU) within wafer is especially influenced by temperature variation during Post Exposure Bake (PEB) process. This temperature variation has been considered to be caused by the hot plate unit, and improvement of temperature uniformity within hot plate itself has been focused to achieve higher CDU. However, we have found that the impact of the wafer shape on temperature uniformity within wafer can not be ignored when the conventional PEB processing system is applied to an advanced resist technology. There are two factors concerned with the wafer shape. First, gravity force of the wafer itself generates wafer shape bending because wafer is simply supported by a few proximity gaps on the conventional hot plate. Next, through the semiconductor manufacturing process, wafer is gradually warped due to the difference of the surface stress between silicon and deposited film layers (Ex. Si-Oxide, Si-Nitride). Therefore, the variation of the clearance between wafer backside and hot plate surface leads to non-uniform thermal conductivity within wafer during PEB processing, and eventually impacts on the CDU within wafer. To overcome this problem concerned with wafer shape during PEB processing, we have developed the new hot plate equipped with the wafer shape compensation technology. As a result of evaluation, we have confirmed that this new PEB system has an advantage not only for warped wafer but also for flat (bare) wafer.

  6. Forming electrical interconnections through semiconductor wafers

    NASA Technical Reports Server (NTRS)

    Anthony, T. R.

    1981-01-01

    An information processing system based on CMOS/SOS technology is being developed by NASA to process digital image data collected by satellites. An array of holes is laser drilled in a semiconductor wafer, and a conductor is formed in the holes to fabricate electrical interconnections through the wafers. Six techniques are used to form conductors in the silicon-on-sapphire (SOS) wafers, including capillary wetting, wedge extrusion, wire intersection, electroless plating, electroforming, double-sided sputtering and through-hole electroplating. The respective strengths and weaknesses of these techniques are discussed and compared, with double-sided sputtering and the through-hole plating method achieving best results. In addition, hollow conductors provided by the technique are available for solder refill, providing a natural way of forming an electrically connected stack of SOS wafers.

  7. Wafer-Level Vacuum Packaging of Smart Sensors.

    PubMed

    Hilton, Allan; Temple, Dorota S

    2016-10-31

    The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors-"low cost" for ubiquitous presence, and "smart" for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

  8. Wafer-Level Vacuum Packaging of Smart Sensors

    PubMed Central

    Hilton, Allan; Temple, Dorota S.

    2016-01-01

    The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors—“low cost” for ubiquitous presence, and “smart” for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology. PMID:27809249

  9. Heating device for semiconductor wafers

    DOEpatents

    Vosen, Steven R.

    1999-01-01

    An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernable pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light.

  10. Heating device for semiconductor wafers

    DOEpatents

    Vosen, S.R.

    1999-07-27

    An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernible pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light. 4 figs.

  11. Intelligent Monitoring? Assessing the ability of the Care Quality Commission's statistical surveillance tool to predict quality and prioritise NHS hospital inspections.

    PubMed

    Griffiths, Alex; Beaussier, Anne-Laure; Demeritt, David; Rothstein, Henry

    2017-02-01

    The Care Quality Commission (CQC) is responsible for ensuring the quality of the health and social care delivered by more than 30 000 registered providers in England. With only limited resources for conducting on-site inspections, the CQC has used statistical surveillance tools to help it identify which providers it should prioritise for inspection. In the face of planned funding cuts, the CQC plans to put more reliance on statistical surveillance tools to assess risks to quality and prioritise inspections accordingly. To evaluate the ability of the CQC's latest surveillance tool, Intelligent Monitoring (IM), to predict the quality of care provided by National Health Service (NHS) hospital trusts so that those at greatest risk of providing poor-quality care can be identified and targeted for inspection. The predictive ability of the IM tool is evaluated through regression analyses and χ 2 testing of the relationship between the quantitative risk score generated by the IM tool and the subsequent quality rating awarded following detailed on-site inspection by large expert teams of inspectors. First, the continuous risk scores generated by the CQC's IM statistical surveillance tool cannot predict inspection-based quality ratings of NHS hospital trusts (OR 0.38 (0.14 to 1.05) for Outstanding/Good, OR 0.94 (0.80 to -1.10) for Good/Requires improvement, and OR 0.90 (0.76 to 1.07) for Requires improvement/Inadequate). Second, the risk scores cannot be used more simply to distinguish the trusts performing poorly-those subsequently rated either 'Requires improvement' or 'Inadequate'-from the trusts performing well-those subsequently rated either 'Good' or 'Outstanding' (OR 1.07 (0.91 to 1.26)). Classifying CQC's risk bandings 1-3 as high risk and 4-6 as low risk, 11 of the high risk trusts were performing well and 43 of the low risk trusts were performing poorly, resulting in an overall accuracy rate of 47.6%. Third, the risk scores cannot be used even more simply to

  12. From the Paper to the Tablet: On the Design of an AR-Based Tool for the Inspection of Pre-Fab Buildings. Preliminary Results of the SIRAE Project

    PubMed Central

    Fernández, Marcos; Poza, Montse

    2018-01-01

    Energy-efficient Buildings (EeB) are demanded in today’s constructions, fulfilling the requirements for green cities. Pre-fab buildings, which are modularly fully-built in factories, are a good example of this. Although this kind of building is quite new, the in situ inspection is documented using traditional tools, mainly based on paper annotations. Thus, the inspection process is not taking advantage of new technologies. In this paper, we present the preliminary results of the SIRAE project that aims to provide an Augmented Reality (AR) tool that can seamlessly aid in the regular processes of pre-fab building inspections to detect and eliminate the possible existing quality and energy efficiency deviations. In this regards, we show a description of the current inspection process and how an interactive tool can be designed and adapted to it. Our first results show the design and implementation of our tool, which is highly interactive and involves AR visualizations and 3D data-gathering, allowing the inspectors to quickly manage it without altering the way the inspection process is done. First trials on a real environment show that the tool is promising for massive inspection processes. PMID:29671799

  13. From the Paper to the Tablet: On the Design of an AR-Based Tool for the Inspection of Pre-Fab Buildings. Preliminary Results of the SIRAE Project.

    PubMed

    Portalés, Cristina; Casas, Sergio; Gimeno, Jesús; Fernández, Marcos; Poza, Montse

    2018-04-19

    Energy-efficient Buildings (EeB) are demanded in today’s constructions, fulfilling the requirements for green cities. Pre-fab buildings, which are modularly fully-built in factories, are a good example of this. Although this kind of building is quite new, the in situ inspection is documented using traditional tools, mainly based on paper annotations. Thus, the inspection process is not taking advantage of new technologies. In this paper, we present the preliminary results of the SIRAE project that aims to provide an Augmented Reality (AR) tool that can seamlessly aid in the regular processes of pre-fab building inspections to detect and eliminate the possible existing quality and energy efficiency deviations. In this regards, we show a description of the current inspection process and how an interactive tool can be designed and adapted to it. Our first results show the design and implementation of our tool, which is highly interactive and involves AR visualizations and 3D data-gathering, allowing the inspectors to quickly manage it without altering the way the inspection process is done. First trials on a real environment show that the tool is promising for massive inspection processes.

  14. Automatic welding detection by an intelligent tool pipe inspection

    NASA Astrophysics Data System (ADS)

    Arizmendi, C. J.; Garcia, W. L.; Quintero, M. A.

    2015-07-01

    This work provide a model based on machine learning techniques in welds recognition, based on signals obtained through in-line inspection tool called “smart pig” in Oil and Gas pipelines. The model uses a signal noise reduction phase by means of pre-processing algorithms and attribute-selection techniques. The noise reduction techniques were selected after a literature review and testing with survey data. Subsequently, the model was trained using recognition and classification algorithms, specifically artificial neural networks and support vector machines. Finally, the trained model was validated with different data sets and the performance was measured with cross validation and ROC analysis. The results show that is possible to identify welding automatically with an efficiency between 90 and 98 percent.

  15. Patterned wafer geometry grouping for improved overlay control

    NASA Astrophysics Data System (ADS)

    Lee, Honggoo; Han, Sangjun; Woo, Jaeson; Park, Junbeom; Song, Changrock; Anis, Fatima; Vukkadala, Pradeep; Jeon, Sanghuck; Choi, DongSub; Huang, Kevin; Heo, Hoyoung; Smith, Mark D.; Robinson, John C.

    2017-03-01

    Process-induced overlay errors from outside the litho cell have become a significant contributor to the overlay error budget including non-uniform wafer stress. Previous studies have shown the correlation between process-induced stress and overlay and the opportunity for improvement in process control, including the use of patterned wafer geometry (PWG) metrology to reduce stress-induced overlay signatures. Key challenges of volume semiconductor manufacturing are how to improve not only the magnitude of these signatures, but also the wafer to wafer variability. This work involves a novel technique of using PWG metrology to provide improved litho-control by wafer-level grouping based on incoming process induced overlay, relevant for both 3D NAND and DRAM. Examples shown in this study are from 19 nm DRAM manufacturing.

  16. Wafer hot spot identification through advanced photomask characterization techniques

    NASA Astrophysics Data System (ADS)

    Choi, Yohan; Green, Michael; McMurran, Jeff; Ham, Young; Lin, Howard; Lan, Andy; Yang, Richer; Lung, Mike

    2016-10-01

    As device manufacturers progress through advanced technology nodes, limitations in standard 1-dimensional (1D) mask Critical Dimension (CD) metrics are becoming apparent. Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer's process margin is shrinking at advanced nodes to a point that the classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on subresolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. These items are not quantifiable with the 1D metrology techniques of today. Likewise, the mask maker needs advanced characterization methods in order to optimize the mask process to meet the wafer lithographer's needs. These advanced characterization metrics are what is needed to harmonize mask and wafer processes for enhanced wafer hot spot analysis. In this paper, we study advanced mask pattern characterization techniques and their correlation with modeled wafer performance.

  17. Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

    NASA Astrophysics Data System (ADS)

    Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

    2004-08-01

    The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

  18. Optima XE Single Wafer High Energy Ion Implanter

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Satoh, Shu; Ferrara, Joseph; Bell, Edward

    2008-11-03

    The Optima XE is the first production worthy single wafer high energy implanter. The new system combines a state-of-art single wafer endstation capable of throughputs in excess of 400 wafers/hour with a production-proven RF linear accelerator technology. Axcelis has been evolving and refining RF Linac technology since the introduction of the NV1000 in 1986. The Optima XE provides production worthy beam currents up to energies of 1.2 MeV for P{sup +}, 2.9 MeV for P{sup ++}, and 1.5 MeV for B{sup +}. Energies as low as 10 keV and tilt angles as high as 45 degrees are also available., allowingmore » the implanter to be used for a wide variety of traditional medium current implants to ensure high equipment utilization. The single wafer endstation provides precise implant angle control across wafer and wafer to wafer. In addition, Optima XE's unique dose control system allows compensation of photoresist outgassing effects without relying on traditional pressure-based methods. We describe the specific features, angle control and dosimetry of the Optima XE and their applications in addressing the ever-tightening demands for more precise process controls and higher productivity.« less

  19. Micro-miniature gas chromatograph column disposed in silicon wafers

    DOEpatents

    Yu, Conrad M.

    2000-01-01

    A micro-miniature gas chromatograph column is fabricated by forming matching halves of a circular cross-section spiral microcapillary in two silicon wafers and then bonding the two wafers together using visual or physical alignment methods. Heating wires are deposited on the outside surfaces of each wafer in a spiral or serpentine pattern large enough in area to cover the whole microcapillary area inside the joined wafers. The visual alignment method includes etching through an alignment window in one wafer and a precision-matching alignment target in the other wafer. The two wafers are then bonded together using the window and target. The physical alignment methods include etching through vertical alignment holes in both wafers and then using pins or posts through corresponding vertical alignment holes to force precision alignment during bonding. The pins or posts may be withdrawn after curing of the bond. Once the wafers are bonded together, a solid phase of very pure silicone is injected in a solution of very pure chloroform into one end of the microcapillary. The chloroform lowers the viscosity of the silicone enough that a high pressure hypodermic needle with a thumbscrew plunger can force the solution into the whole length of the spiral microcapillary. The chloroform is then evaporated out slowly to leave the silicone behind in a deposit.

  20. Design Study of Wafer Seals for Future Hypersonic Vehicles

    NASA Technical Reports Server (NTRS)

    Dunlap, Patrick H.; Finkbeiner, Joshua R.; Steinetz, Bruce M.; DeMange, Jeffrey J.

    2005-01-01

    Future hypersonic vehicles require high temperature, dynamic seals in advanced hypersonic engines and on the vehicle airframe to seal the perimeters of movable panels, flaps, and doors. Current seals do not meet the demanding requirements of these applications, so NASA Glenn Research Center is developing improved designs to overcome these shortfalls. An advanced ceramic wafer seal design has shown promise in meeting these needs. Results from a design of experiments study performed on this seal revealed that several installation variables played a role in determining the amount of leakage past the seals. Lower leakage rates were achieved by using a tighter groove width around the seals, a higher seal preload, a tighter wafer height tolerance, and a looser groove length. During flow testing, a seal activating pressure acting behind the wafers combined with simulated vibrations to seat the seals more effectively against the sealing surface and produce lower leakage rates. A seal geometry study revealed comparable leakage for full-scale wafers with 0.125 and 0.25 in. thicknesses. For applications in which lower part counts are desired, fewer 0.25-in.-thick wafers may be able to be used in place of 0.125-in.-thick wafers while achieving similar performance. Tests performed on wafers with a rounded edge (0.5 in. radius) in contact with the sealing surface resulted in flow rates twice as high as those for wafers with a flat edge. Half-size wafers had leakage rates approximately three times higher than those for full-size wafers.

  1. Wafer-level packaging with compression-controlled seal ring bonding

    DOEpatents

    Farino, Anthony J

    2013-11-05

    A device may be provided in a sealed package by aligning a seal ring provided on a first surface of a first semiconductor wafer in opposing relationship with a seal ring that is provided on a second surface of a second semiconductor wafer and surrounds a portion of the second wafer that contains the device. Forcible movement of the first and second wafer surfaces toward one another compresses the first and second seal rings against one another. A physical barrier against the movement, other than the first and second seal rings, is provided between the first and second wafer surfaces.

  2. Recovery Act: Novel Kerf-Free PV Wafering that provides a low-cost approach to generate wafers from 150um to 50um in thickness

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Fong, Theodore E.

    2013-05-06

    The technical paper summarizes the project work conducted in the development of Kerf-Free silicon wafering equipment for silicon solar wafering. This new PolyMax technology uses a two step process of implantation and cleaving to exfoliate 50um to 120um wafers with thicknesses ranging from 50um to 120um from a 125mm or 156mm pseudo-squared silicon ingot. No kerf is generated using this method of wafering. This method of wafering contrasts with the current method of making silicon solar wafers using the industry standard wire saw equipment. The report summarizes the activity conducted by Silicon Genesis Corporation in working to develop this technologymore » further and to define the roadmap specifications for the first commercial proto-type equipment for high volume solar wafer manufacturing using the PolyMax technology.« less

  3. Applications of the silicon wafer direct-bonding technique to electron devices

    NASA Astrophysics Data System (ADS)

    Furukawa, K.; Nakagawa, A.

    1990-01-01

    A silicon wafer direct-bonding (SDB) technique has been developed. A pair of bare silicon wafers, as well as an oxidized wafer pair, are bonded throughout the wafer surfaces without any bonding material. Conventional semiconductor device processes can be used for the bonded wafers, since the bonded interface is stable thermally, chemically, mechanically and electrically. Therefore, the SDB technique is very attractive, and has been applied to several kinds of electron devices. Bare silicon to bare silicon bonding is an alternative for epitaxial growth. A thick, high quality and high resistivity layer on a low resistivity substrate was obtained without autodoping. 1800 V insulated gate bipolar transistors were developed using these SDB wafers. No electrical resistance was observed at the bonded bare silicon interfaces. If oxidized wafers are bonded, the two wafers are electrically isolated, providing silicon on insulator (SOI) wafers. Dielectrically isolated photodiode arrays were fabricated on the SOI wafers and 500 V power IC's are now being developed.

  4. A highly redundant robot system for inspection

    NASA Technical Reports Server (NTRS)

    Lee, Thomas S.; Ohms, Tim; Hayati, Samad

    1994-01-01

    The work on the serpentine inspection system at JPL is described. The configuration of the inspection system consists of 20 degrees of freedom in total. In particular, the design and development of the serpentine micromanipulator end-effector tool which has 12 degrees of freedom is described. The inspection system is used for application in JPL's Remote Surface Inspection project and as a research tool in redundant manipulator control.

  5. Differences between wafer and bake plate temperature uniformity in proximity bake: a theoretical and experimental study

    NASA Astrophysics Data System (ADS)

    Ramanan, Natarajan; Kozman, Austin; Sims, James B.

    2000-06-01

    As the lithography industry moves toward finer features, specifications on temperature uniformity of the bake plates are expected to become more stringent. Consequently, aggressive improvements are needed to conventional bake station designs to make them perform significantly better than current market requirements. To this end, we have conducted a rigorous study that combines state-of-the-art simulation tools and experimental methods to predict the impact of the parameters that influence the uniformity of the wafer in proximity bake. The key observation from this detailed study is that the temperature uniformity of the wafer in proximity mode depends on a number of parameters in addition to the uniformity of the bake plate itself. These parameters include the lid design, the air flow distribution around the bake chamber, bake plate design and flatness of the bake plate and wafer. By performing careful experimental studies that were guided by extensive numerical simulations, we were able to understand the relative importance of each of these parameters. In an orderly fashion, we made appropriate design changes to curtail or eliminate the nonuniformity caused by each of these parameters. After implementing all these changes, we have now been able to match or improve the temperature uniformity of the wafer in proximity with that of a contact measurement on the bake plate. The wafer temperature uniformity is also very close to the theoretically predicted uniformity of the wafer.

  6. Wafer-level vacuum/hermetic packaging technologies for MEMS

    NASA Astrophysics Data System (ADS)

    Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil

    2010-02-01

    An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.

  7. Laser furnace and method for zone refining of semiconductor wafers

    NASA Technical Reports Server (NTRS)

    Griner, Donald B. (Inventor); zur Burg, Frederick W. (Inventor); Penn, Wayne M. (Inventor)

    1988-01-01

    A method of zone refining a crystal wafer (116 FIG. 1) comprising the steps of focusing a laser beam to a small spot (120) of selectable size on the surface of the crystal wafer (116) to melt a spot on the crystal wafer, scanning the small laser beam spot back and forth across the surface of the crystal wafer (116) at a constant velocity, and moving the scanning laser beam across a predetermined zone of the surface of the crystal wafer (116) in a direction normal to the laser beam scanning direction and at a selectible velocity to melt and refine the entire crystal wafer (116).

  8. Interactions of double patterning technology with wafer processing, OPC and design flows

    NASA Astrophysics Data System (ADS)

    Lucas, Kevin; Cork, Chris; Miloslavsky, Alex; Luk-Pat, Gerry; Barnes, Levi; Hapli, John; Lewellen, John; Rollins, Greg; Wiaux, Vincent; Verhaegen, Staf

    2008-03-01

    Double patterning technology (DPT) is one of the main options for printing logic devices with half-pitch less than 45nm; and flash and DRAM memory devices with half-pitch less than 40nm. DPT methods decompose the original design intent into two individual masking layers which are each patterned using single exposures and existing 193nm lithography tools. The results of the individual patterning layers combine to re-create the design intent pattern on the wafer. In this paper we study interactions of DPT with lithography, masks synthesis and physical design flows. Double exposure and etch patterning steps create complexity for both process and design flows. DPT decomposition is a critical software step which will be performed in physical design and also in mask synthesis. Decomposition includes cutting (splitting) of original design intent polygons into multiple polygons where required; and coloring of the resulting polygons. We evaluate the ability to meet key physical design goals such as: reduce circuit area; minimize rework; ensure DPT compliance; guarantee patterning robustness on individual layer targets; ensure symmetric wafer results; and create uniform wafer density for the individual patterning layers.

  9. Novel wafer stepper with violet LED light source

    NASA Astrophysics Data System (ADS)

    Ting, Yung-Chiang; Shy, Shyi-Long

    2014-03-01

    Novel wafer stepper by using contact or proximity printing will be developed, using violet LED light source to replace Hg Arc. lamp or laser. Mirror, filter and condenser lens for Hg Arc. Lamp or laser and reduction lens for projection printing can be discarded. Reliability and manufacturing cost of wafer stepper can be improved. Exposure result by using IP3600 resist and wafer stepper with violet LED light source (wave-length 360nm to 410 nm) will be obtained. This novel wafer stepper can be used for 3DIC, MEMS and bio-chip lithography application by using thin and thick resist with sub-micron to 100 micron thickness.

  10. Genesis Ultrapure Water Megasonic Wafer Spin Cleaner

    NASA Technical Reports Server (NTRS)

    Allton, Judith H.; Stansbery, Eileen K.; Calaway, Michael J.; Rodriquez, Melissa C.

    2013-01-01

    A device removes, with high precision, the majority of surface particle contamination greater than 1-micron-diameter in size from ultrapure semiconductor wafer materials containing implanted solar wind samples returned by NASA's Genesis mission. This cleaning device uses a 1.5-liter/minute flowing stream of heated ultrapure water (UPW) with 1- MHz oscillating megasonic pulse energy focused at 3 to 5 mm away from the wafer surface spinning at 1,000 to 10,000 RPM, depending on sample size. The surface particle contamination is removed by three processes: flowing UPW, megasonic cavitations, and centripetal force from the spinning wafer. The device can also dry the wafer fragment after UPW/megasonic cleaning by continuing to spin the wafer in the cleaning chamber, which is purged with flowing ultrapure nitrogen gas at 65 psi (.448 kPa). The cleaner also uses three types of vacuum chucks that can accommodate all Genesis-flown array fragments in any dimensional shape between 3 and 100 mm in diameter. A sample vacuum chuck, and the manufactured UPW/megasonic nozzle holder, replace the human deficiencies by maintaining a consistent distance between the nozzle and wafer surface as well as allowing for longer cleaning time. The 3- to 5-mm critical distance is important for the ability to remove particles by megasonic cavitations. The increased UPW sonication time and exposure to heated UPW improve the removal of 1- to 5-micron-sized particles.

  11. Apparatus and method for measuring the thickness of a semiconductor wafer

    DOEpatents

    Ciszek, Theodoer F.

    1995-01-01

    Apparatus for measuring thicknesses of semiconductor wafers, comprising: housing means for supporting a wafer in a light-tight environment; a light source mounted to the housing at one side of the wafer to emit light of a predetermined wavelength to normally impinge the wafer; a light detector supported at a predetermined distance from a side of the wafer opposite the side on which a light source impinges and adapted to receive light transmitted through the wafer; and means for measuring the transmitted light.

  12. Particulate contamination removal from wafers using plasmas and mechanical agitation

    DOEpatents

    Selwyn, G.S.

    1998-12-15

    Particulate contamination removal from wafers is disclosed using plasmas and mechanical agitation. The present invention includes the use of plasmas with mechanical agitation for removing particulate matter from the surface of a wafer. The apparatus hereof comprises a mechanical activator, at least one conducting contact pin for transferring the vibration from the activator to the wafer, clamp fingers that maintain the wafer`s position, and means for generating a plasma in the vicinity of the surface of the wafer, all parts of the cleaning apparatus except the mechanical activator and part of the contact pin being contained inside the processing chamber. By exposing a wafer to a plasma and providing motion thereto in a direction perpendicular to its surface, the bonding between the particulate matter and the surface may be overcome. Once free of the wafer surface, the particulates become charged by electrons from the plasma and are drawn into the plasma by attractive forces which keep them from redepositing. The introduction of a flowing gas through the plasma sweeps the particulates away from the wafer and out of the plasma. The entire surface is cleaned during one cleaning step. The use of an rf plasma to accomplish the particulate removal was found to remove more than 90% of the particulates. 4 figs.

  13. Steel bridge fatigue crack detection with piezoelectric wafer active sensors

    NASA Astrophysics Data System (ADS)

    Yu, Lingyu; Giurgiutiu, Victor; Ziehl, Paul; Ozevin, Didem; Pollock, Patrick

    2010-04-01

    Piezoelectric wafer active sensors (PWAS) are well known for its dual capabilities in structural health monitoring, acting as either actuators or sensors. Due to the variety of deterioration sources and locations of bridge defects, there is currently no single method that can detect and address the potential sources globally. In our research, our use of the PWAS based sensing has the novelty of implementing both passive (as acoustic emission) and active (as ultrasonic transducers) sensing with a single PWAS network. The combined schematic is using acoustic emission to detect the presence of fatigue cracks in steel bridges in their early stage since methods such as ultrasonics are unable to quantify the initial condition of crack growth since most of the fatigue life for these details is consumed while the fatigue crack is too small to be detected. Hence, combing acoustic emission with ultrasonic active sensing will strengthen the damage detection process. The integration of passive acoustic emission detection with active sensing will be a technological leap forward from the current practice of periodic and subjective visual inspection, and bridge management based primarily on history of past performance. In this study, extensive laboratory investigation is performed supported by theoretical modeling analysis. A demonstration system will be presented to show how piezoelectric wafer active sensor is used for acoustic emission. Specimens representing complex structures are tested. The results will also be compared with traditional acoustic emission transducers to identify the application barriers.

  14. Apparatus and method for measuring the thickness of a semiconductor wafer

    DOEpatents

    Ciszek, T.F.

    1995-03-07

    Apparatus for measuring thicknesses of semiconductor wafers is discussed, comprising: housing means for supporting a wafer in a light-tight environment; a light source mounted to the housing at one side of the wafer to emit light of a predetermined wavelength to normally impinge the wafer; a light detector supported at a predetermined distance from a side of the wafer opposite the side on which a light source impinges and adapted to receive light transmitted through the wafer; and means for measuring the transmitted light. 4 figs.

  15. Electrochemical method for defect delineation in silicon-on-insulator wafers

    DOEpatents

    Guilinger, Terry R.; Jones, Howland D. T.; Kelly, Michael J.; Medernach, John W.; Stevenson, Joel O.; Tsao, Sylvia S.

    1991-01-01

    An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.

  16. Modelling deformation and fracture in confectionery wafers

    NASA Astrophysics Data System (ADS)

    Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon; Rasburn, John

    2015-01-01

    The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which was then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.

  17. Development of megasonic cleaning for silicon wafers

    NASA Technical Reports Server (NTRS)

    Mayer, A.

    1980-01-01

    A cleaning and drying system for processing at least 2500 three in. diameter wafers per hour was developed with a reduction in process cost. The system consists of an ammonia hydrogen peroxide bath in which both surfaces of 3/32 in. spaced, ion implanted wafers are cleaned in quartz carriers moved on a belt past two pairs of megasonic transducers. The wafers are dried in the novel room temperature, high velocity air dryer in the same carriers used for annealing. A new laser scanner was used effectively to monitor the cleaning ability on a sampling basis.

  18. New overlay measurement technique with an i-line stepper using embedded standard field image alignment marks for wafer bonding applications

    NASA Astrophysics Data System (ADS)

    Kulse, P.; Sasai, K.; Schulz, K.; Wietstruck, M.

    2017-06-01

    In the last decades the semiconductor technology has been driven by Moore's law leading to high performance CMOS technologies with feature sizes of less than 10 nm [1]. It has been pointed out that not only scaling but also the integration of novel components and technology modules into CMOS/BiCMOS technologies is becoming more attractive to realize smart and miniaturized systems [2]. Driven by new applications in the area of communication, health and automation, new components and technology modules such as BiCMOS embedded RF-MEMS, high-Q passives, Sibased microfluidics and InP-SiGe BiCMOS heterointegration have been demonstrated [3-6]. In contrast to standard VLSI processes fabricated on front side of the silicon wafer, these new technology modules require addition backside processing of the wafer; thus an accurate alignment between the front and backside of the wafer is mandatory. In previous work an advanced back to front side alignment technique and implementation into IHP's 0.25/0.13 μm high performance SiGe:C BiCMOS backside process module has been presented [7]. The developed technique enables a high resolution and accurate lithography on the backside of BiCMOS wafer for additional backside processing. In addition to the aforementioned back side process technologies, new applications like Through-Silicon Vias (TSV) for interposers and advanced substrate technologies for 3D heterogeneous integration demand not only single wafer fabrication but also processing of wafer stacks provided by temporary and permanent wafer bonding [8]. Therefore, the available overlay measurement techniques are not suitable if overlay and alignment marks are realized at the bonding interface of a wafer stack which consists of both a silicon device and a silicon carrier wafer. The former used EVG 40NT automated overlay measurement system, which use two opposite positioned microscopes inspecting simultaneous the wafer back and front side, is not capable measuring embedded overlay

  19. Aerial image based die-to-model inspections of advanced technology masks

    NASA Astrophysics Data System (ADS)

    Kim, Jun; Lei, Wei-Guo; McCall, Joan; Zaatri, Suheil; Penn, Michael; Nagpal, Rajesh; Faivishevsky, Lev; Ben-Yishai, Michael; Danino, Udy; Tam, Aviram; Dassa, Oded; Balasubramanian, Vivek; Shah, Tejas H.; Wagner, Mark; Mangan, Shmoolik

    2009-10-01

    Die-to-Model (D2M) inspection is an innovative approach to running inspection based on a mask design layout data. The D2M concept takes inspection from the traditional domain of mask pattern to the preferred domain of the wafer aerial image. To achieve this, D2M transforms the mask layout database into a resist plane aerial image, which in turn is compared to the aerial image of the mask, captured by the inspection optics. D2M detection algorithms work similarly to an Aerial D2D (die-to-die) inspection, but instead of comparing a die to another die it is compared to the aerial image model. D2M is used whenever D2D inspection is not practical (e.g., single die) or when a validation of mask conformity to design is needed, i.e., for printed pattern fidelity. D2M is of particular importance for inspection of logic single die masks, where no simplifying assumption of pattern periodicity may be done. The application can tailor the sensitivity to meet the needs at different locations, such as device area, scribe lines and periphery. In this paper we present first test results of the D2M mask inspection application at a mask shop. We describe the methodology of using D2M, and review the practical aspects of the D2M mask inspection.

  20. Modelling deformation and fracture in confectionery wafers

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon

    2015-01-22

    The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which wasmore » then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.« less

  1. Controllable laser thermal cleavage of sapphire wafers

    NASA Astrophysics Data System (ADS)

    Xu, Jiayu; Hu, Hong; Zhuang, Changhui; Ma, Guodong; Han, Junlong; Lei, Yulin

    2018-03-01

    Laser processing of substrates for light-emitting diodes (LEDs) offers advantages over other processing techniques and is therefore an active research area in both industrial and academic sectors. The processing of sapphire wafers is problematic because sapphire is a hard and brittle material. Semiconductor laser scribing processing suffers certain disadvantages that have yet to be overcome, thereby necessitating further investigation. In this work, a platform for controllable laser thermal cleavage was constructed. A sapphire LED wafer was modeled using the finite element method to simulate the thermal and stress distributions under different conditions. A guide groove cut by laser ablation before the cleavage process was observed to guide the crack extension and avoid deviation. The surface and cross section of sapphire wafers processed using controllable laser thermal cleavage were characterized by scanning electron microscopy and optical microscopy, and their morphology was compared to that of wafers processed using stealth dicing. The differences in luminous efficiency between substrates prepared using these two processing methods are explained.

  2. A novel patterning control strategy based on real-time fingerprint recognition and adaptive wafer level scanner optimization

    NASA Astrophysics Data System (ADS)

    Cekli, Hakki Ergun; Nije, Jelle; Ypma, Alexander; Bastani, Vahid; Sonntag, Dag; Niesing, Henk; Zhang, Linmiao; Ullah, Zakir; Subramony, Venky; Somasundaram, Ravin; Susanto, William; Matsunobu, Masazumi; Johnson, Jeff; Tabery, Cyrus; Lin, Chenxi; Zou, Yi

    2018-03-01

    In addition to lithography process and equipment induced variations, processes like etching, annealing, film deposition and planarization exhibit variations, each having their own intrinsic characteristics and leaving an effect, a `fingerprint', on the wafers. With ever tighter requirements for CD and overlay, controlling these process induced variations is both increasingly important and increasingly challenging in advanced integrated circuit (IC) manufacturing. For example, the on-product overlay (OPO) requirement for future nodes is approaching <3nm, requiring the allowable budget for process induced variance to become extremely small. Process variance control is seen as an bottleneck to further shrink which drives the need for more sophisticated process control strategies. In this context we developed a novel `computational process control strategy' which provides the capability of proactive control of each individual wafer with aim to maximize the yield, without introducing a significant impact on metrology requirements, cycle time or productivity. The complexity of the wafer process is approached by characterizing the full wafer stack building a fingerprint library containing key patterning performance parameters like Overlay, Focus, etc. Historical wafer metrology is decomposed into dominant fingerprints using Principal Component Analysis. By associating observed fingerprints with their origin e.g. process steps, tools and variables, we can give an inline assessment of the strength and origin of the fingerprints on every wafer. Once the fingerprint library is established, a wafer specific fingerprint correction recipes can be determined based on its processing history. Data science techniques are used in real-time to ensure that the library is adaptive. To realize this concept, ASML TWINSCAN scanners play a vital role with their on-board full wafer detection and exposure correction capabilities. High density metrology data is created by the scanner for each

  3. Particulate contamination removal from wafers using plasmas and mechanical agitation

    DOEpatents

    Selwyn, Gary S.

    1998-01-01

    Particulate contamination removal from wafers using plasmas and mechanical agitation. The present invention includes the use of plasmas with mechanical agitation for removing particulate matter from the surface of a wafer. The apparatus hereof comprises a mechanical activator, at least one conducting contact pin for transferring the vibration from the activator to the wafer, clamp fingers that maintain the wafer's position, and means for generating a plasma in the vicinity of the surface of the wafer, all parts of the cleaning apparatus except the mechanical activator and part of the contact pin being contained inside the processing chamber. By exposing a wafer to a plasma and providing motion thereto in a direction perpendicular to its surface, the bonding between the particulate matter and the surface may be overcome. Once free of the wafer surface, the particulates become charged by electrons from the plasma and are drawn into the plasma by attractive forces which keep them from redepositing. The introduction of a flowing gas through the plasma sweeps the particulates away from the wafer and out of the plasma. The entire surface is cleaned during one cleaning step. The use of an rf plasma to accomplish the particulate removal was found to remove more than 90% of the particulates.

  4. Guided ultrasonic wave beam skew in silicon wafers

    NASA Astrophysics Data System (ADS)

    Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

    2018-04-01

    In the photovoltaic industry, monocrystalline silicon wafers are employed for solar cells with high conversion efficiency. Micro-cracks induced by the cutting process in the thin wafers can lead to brittle wafer fracture. Guided ultrasonic waves would offer an efficient methodology for the in-process non-destructive testing of wafers to assess micro-crack density. The material anisotropy of the monocrystalline silicon leads to variations of the guided wave characteristics, depending on the propagation direction relative to the crystal orientation. Selective guided ultrasonic wave excitation was achieved using a contact piezoelectric transducer with custom-made wedges for the A0 and S0 Lamb wave modes and a transducer holder to achieve controlled contact pressure and orientation. The out-of-plane component of the guided wave propagation was measured using a non-contact laser interferometer. The phase slowness (velocity) of the two fundamental Lamb wave modes was measured experimentally for varying propagation directions relative to the crystal orientation and found to match theoretical predictions. Significant wave beam skew was observed experimentally, especially for the S0 mode, and investigated from 3D finite element simulations. Good agreement was found with the theoretical predictions based on nominal material properties of the silicon wafer. The important contribution of guided wave beam skewing effects for the non-destructive testing of silicon wafers was demonstrated.

  5. Advanced manufacturing rules check (MRC) for fully automated assessment of complex reticle designs

    NASA Astrophysics Data System (ADS)

    Gladhill, R.; Aguilar, D.; Buck, P. D.; Dawkins, D.; Nolke, S.; Riddick, J.; Straub, J. A.

    2005-11-01

    Advanced electronic design automation (EDA) tools, with their simulation, modeling, design rule checking, and optical proximity correction capabilities, have facilitated the improvement of first pass wafer yields. While the data produced by these tools may have been processed for optimal wafer manufacturing, it is possible for the same data to be far from ideal for photomask manufacturing, particularly at lithography and inspection stages, resulting in production delays and increased costs. The same EDA tools used to produce the data can be used to detect potential problems for photomask manufacturing in the data. A production implementation of automated photomask manufacturing rule checking (MRC) is presented and discussed for various photomask lithography and inspection lines. This paper will focus on identifying data which may cause production delays at the mask inspection stage. It will be shown how photomask MRC can be used to discover data related problems prior to inspection, separating jobs which are likely to have problems at inspection from those which are not. Photomask MRC can also be used to identify geometries requiring adjustment of inspection parameters for optimal inspection, and to assist with any special handling or change of routing requirements. With this foreknowledge, steps can be taken to avoid production delays that increase manufacturing costs. Finally, the data flow implemented for MRC can be used as a platform for other photomask data preparation tasks.

  6. Lens-mount stability trade-off: a survey exemplified for DUV wafer inspection objectives

    NASA Astrophysics Data System (ADS)

    Bouazzam, Achmed; Erbe, Torsten; Fahr, Stephan; Werschnik, Jan

    2015-09-01

    The position stability of optical elements is an essential part of the tolerance budget of an optical system because its compensation would require an alignment step after the lens has left the factory. In order to achieve a given built performance the stability error contribution needs to be known and accounted for. Given a high-end lens touching the edge of technology not knowing, under- or overestimating this contribution becomes a serious cost and risk factor. If overestimated the remaining parts of the budget need to be tighter. If underestimated the total project might fail. For many mounting principles the stability benchmark is based on previous systems or information gathered by elaborated testing of complete optical systems. This renders the development of a new system into a risky endeavour, because these experiences are not sufficiently precise and tend to be not transferable when scaling of the optical elements is intended. This contribution discusses the influences of different optical mounting concepts on the position stability using the example of high numerical aperture (HNA) inspection lenses working in the deep ultraviolet (DUV) spectrum. A method to investigate the positional stability is presented for selected mounting examples typical for inspection lenses.

  7. Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene

    DTIC Science & Technology

    2014-08-01

    Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene by Eugene Zakar, Wayne Churaman, Collin Becker, Bernard Rod, Luke...Laboratory Adelphi, MD 20783-1138 ARL-TR-7025 August 2014 Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene...Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER 6

  8. Cohesive zone model for direct silicon wafer bonding

    NASA Astrophysics Data System (ADS)

    Kubair, D. V.; Spearing, S. M.

    2007-05-01

    Direct silicon wafer bonding and decohesion are simulated using a spectral scheme in conjunction with a rate-dependent cohesive model. The cohesive model is derived assuming the presence of a thin continuum liquid layer at the interface. Cohesive tractions due to the presence of a liquid meniscus always tend to reduce the separation distance between the wafers, thereby opposing debonding, while assisting the bonding process. In the absence of the rate-dependence effects the energy needed to bond a pair of wafers is equal to that needed to separate them. When rate-dependence is considered in the cohesive law, the experimentally observed asymmetry in the energetics can be explained. The derived cohesive model has the potential to form a bridge between experiments and a multiscale-modelling approach to understand the mechanics of wafer bonding.

  9. Inspection of Piezoceramic Transducers Used for Structural Health Monitoring

    PubMed Central

    Mueller, Inka; Fritzen, Claus-Peter

    2017-01-01

    The use of piezoelectric wafer active sensors (PWAS) for structural health monitoring (SHM) purposes is state of the art for acousto-ultrasonic-based methods. For system reliability, detailed information about the PWAS itself is necessary. This paper gives an overview on frequent PWAS faults and presents the effects of these faults on the wave propagation, used for active acousto-ultrasonics-based SHM. The analysis of the wave field is based on velocity measurements using a laser Doppler vibrometer (LDV). New and established methods of PWAS inspection are explained in detail, listing advantages and disadvantages. The electro-mechanical impedance spectrum as basis for these methods is discussed for different sensor faults. This way this contribution focuses on a detailed analysis of PWAS and the need of their inspection for an increased reliability of SHM systems. PMID:28772431

  10. Pathology Residents Comprise Inspection Team for a CAP Self-Inspection.

    PubMed

    Beal, Stacy G; Kresak, Jesse L; Yachnis, Anthony T

    2017-01-01

    We report our experience at the University of Florida in which residents and fellows served as the inspection team for a College of American Pathologists (CAP) self-inspection. We aimed to determine whether the CAP self-inspection could serve as a learning opportunity for pathology residents and fellows. To prepare for the inspection, we provided a series of 4 lunchtime seminars covering numerous laboratory management topics relating to inspections and laboratory quality. Preparation for the inspection began approximately 4 months prior to the date of the inspection. The intent was to simulate a CAP peer inspection, with the exception that the date was announced. The associate residency program director served as the team leader. All residents and fellows completed inspector training provided by CAP, and the team leader completed the team leader training. A 20 question pre- and posttest was administered; additionally, an anonymous survey was given after the inspection. The residents' and fellows' posttest scores were an average of 15% higher than on the pretest ( P < .01). The surveys as well as subjective comments were overwhelmingly positive. In conclusion, the resident's and fellow's experience as an inspector during a CAP self-inspection was a useful tool to learn accreditation and laboratory management.

  11. Pathology Residents Comprise Inspection Team for a CAP Self-Inspection

    PubMed Central

    Kresak, Jesse L.; Yachnis, Anthony T.

    2017-01-01

    We report our experience at the University of Florida in which residents and fellows served as the inspection team for a College of American Pathologists (CAP) self-inspection. We aimed to determine whether the CAP self-inspection could serve as a learning opportunity for pathology residents and fellows. To prepare for the inspection, we provided a series of 4 lunchtime seminars covering numerous laboratory management topics relating to inspections and laboratory quality. Preparation for the inspection began approximately 4 months prior to the date of the inspection. The intent was to simulate a CAP peer inspection, with the exception that the date was announced. The associate residency program director served as the team leader. All residents and fellows completed inspector training provided by CAP, and the team leader completed the team leader training. A 20 question pre- and posttest was administered; additionally, an anonymous survey was given after the inspection. The residents’ and fellows’ posttest scores were an average of 15% higher than on the pretest (P < .01). The surveys as well as subjective comments were overwhelmingly positive. In conclusion, the resident’s and fellow’s experience as an inspector during a CAP self-inspection was a useful tool to learn accreditation and laboratory management. PMID:28725788

  12. Wafer hot spot identification through advanced photomask characterization techniques: part 2

    NASA Astrophysics Data System (ADS)

    Choi, Yohan; Green, Michael; Cho, Young; Ham, Young; Lin, Howard; Lan, Andy; Yang, Richer; Lung, Mike

    2017-03-01

    Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for mask end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer's process margin is shrinking at advanced nodes to a point that classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on sub-resolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. To overcome the limitation of 1D metrics, there are numerous on-going industry efforts to better define wafer-predictive metrics through both standard mask metrology and aerial CD methods. Even with these improvements, the industry continues to struggle to define useful correlative metrics that link the mask to final device performance. In part 1 of this work, we utilized advanced mask pattern characterization techniques to extract potential hot spots on the mask and link them, theoretically, to issues with final wafer performance. In this paper, part 2, we complete the work by verifying these techniques at wafer level. The test vehicle (TV) that was used for hot spot detection on the mask in part 1 will be used to expose wafers. The results will be used to verify the mask-level predictions. Finally, wafer performance with predicted and verified mask/wafer condition will be shown as the result of advanced mask characterization. The goal is to maximize mask end user yield through mask-wafer technology harmonization. This harmonization will provide the necessary feedback to determine optimum design, mask specifications, and mask-making conditions for optimal wafer process margin.

  13. Wafering economies for industrialization from a wafer manufacturer's viewpoint

    NASA Technical Reports Server (NTRS)

    Rosenfield, T. P.; Fuerst, F. P.

    1982-01-01

    The key technical limitations which inhibit the lowering of value-added costs for state-of-the-art wafering techniques are assessed. From the best experimental results to date, a projection was made to identify those parts of each system which need to be developed in order to meet or improve upon the value-added cost reduction necessary for $0.70/Wp photovoltaics modules.

  14. Simultsonic: A Simulation Tool for Ultrasonic Inspection

    NASA Astrophysics Data System (ADS)

    Krishnamurthy, Adarsh; Karthikeyan, Soumya; Krishnamurthy, C. V.; Balasubramaniam, Krishnan

    2006-03-01

    A simulation program SIMULTSONIC is under development at CNDE to help determine and/or help optimize ultrasonic probe locations for inspection of complex components. SIMULTSONIC provides a ray-trace based assessment initially followed by a displacement or pressure field-based assessment for user-specified probe positions and user-selected component. Immersion and contact modes of inspection are available in SIMULTSONIC. The code written in Visual C++ operating in Microsoft Windows environment provides an interactive user interface. In this paper, the application of SIMULTSONIC to the inspection of very thin-walled pipes (with 450 um wall thickness) is described. Ray trace based assessment was done using SIMULTSONIC to determine the standoff distance and the angle of oblique incidence for an immersion mode focused transducer. A 3-cycle Hanning window pulse was chosen for simulations. Experiments were carried out to validate the simulations. The A-scans and the associated B-Scan images obtained through simulations show good correlation with experimental results, both with the arrival time of the signal as well as with the signal amplitudes. The scope of SIMULTSONIC to deal with parametrically represented surfaces will also be discussed.

  15. Fabrication of uniform nanoscale cavities via silicon direct wafer bonding.

    PubMed

    Thomson, Stephen R D; Perron, Justin K; Kimball, Mark O; Mehta, Sarabjit; Gasparini, Francis M

    2014-01-09

    Measurements of the heat capacity and superfluid fraction of confined (4)He have been performed near the lambda transition using lithographically patterned and bonded silicon wafers. Unlike confinements in porous materials often used for these types of experiments(3), bonded wafers provide predesigned uniform spaces for confinement. The geometry of each cell is well known, which removes a large source of ambiguity in the interpretation of data. Exceptionally flat, 5 cm diameter, 375 µm thick Si wafers with about 1 µm variation over the entire wafer can be obtained commercially (from Semiconductor Processing Company, for example). Thermal oxide is grown on the wafers to define the confinement dimension in the z-direction. A pattern is then etched in the oxide using lithographic techniques so as to create a desired enclosure upon bonding. A hole is drilled in one of the wafers (the top) to allow for the introduction of the liquid to be measured. The wafers are cleaned(2) in RCA solutions and then put in a microclean chamber where they are rinsed with deionized water(4). The wafers are bonded at RT and then annealed at ~1,100 °C. This forms a strong and permanent bond. This process can be used to make uniform enclosures for measuring thermal and hydrodynamic properties of confined liquids from the nanometer to the micrometer scale.

  16. Compensating measured intra-wafer ring oscillator stage delay with intra-wafer exposure dose corrections

    NASA Astrophysics Data System (ADS)

    Verhaegen, Staf; Nackaerts, Axel; Dusa, Mircea; Carpaij, Rene; Vandenberghe, Geert; Finders, Jo

    2006-03-01

    The purpose of this paper is to use measurements on real working devices to derive more information than typically measured by the classic line-width measurement techniques. The first part of the paper will discuss the principle of the measurements with a ring oscillator, a circuit used to measure the speed of elementary logic gates. These measurements contribute to the understanding of the exact timing dependencies in circuits, which is of utmost importance for the design and simulation of these circuits. When connecting an odd number of digital inverting stages in a ring, the circuit has no stable digital state but acts as an analog oscillator with the oscillation frequency dependent on the analog propagation delay of the signals through the stages. By varying some conditions during a litho step, the delay change caused by the process condition change can be measured very accurately. The response of the ring oscillator delay to exposure dose is measured and presented in this paper together with a comparison of measured line-width values of the poly gate lines. The second part of the paper will focus on improving the intra-wafer variation of the stage delay. A number of ring oscillators are put in a design at different slit and scan locations. 200mm wafers are processed with 48 full dies present. From the intra-wafer delay fingerprint and the dose sensitivity of the delay an intra-wafer dose correction, also called a dose recipe, is calculated. This dose recipe is used on the scanner to compensate for effects that are the root cause for the delay profile; including reticle and processing such as track, etch and annealing.

  17. Model-Based Infrared Metrology for Advanced Technology Nodes and 300 mm Wafer Processing

    NASA Astrophysics Data System (ADS)

    Rosenthal, Peter A.; Duran, Carlos; Tower, Josh; Mazurenko, Alex; Mantz, Ulrich; Weidner, Peter; Kasic, Alexander

    2005-09-01

    The use of infrared spectroscopy for production semiconductor process monitoring has evolved recently from primarily unpatterned, i.e. blanket test wafer measurements in a limited historical application space of blanket epitaxial, BPSG, and FSG layers to new applications involving patterned product wafer measurements, and new measurement capabilities. Over the last several years, the semiconductor industry has adopted a new set of materials associated with copper/low-k interconnects, and new structures incorporating exotic materials including silicon germanium, SOI substrates and high aspect ratio trenches. The new device architectures and more chemically sophisticated materials have raised new process control and metrology challenges that are not addressed by current measurement technology. To address the challenges we have developed a new infrared metrology tool designed for emerging semiconductor production processes, in a package compatible with modern production and R&D environments. The tool incorporates recent advances in reflectance instrumentation including highly accurate signal processing, optimized reflectometry optics, and model-based calibration and analysis algorithms. To meet the production requirements of the modern automated fab, the measurement hardware has been integrated with a fully automated 300 mm platform incorporating front opening unified pod (FOUP) interfaces, automated pattern recognition and high throughput ultra clean robotics. The tool employs a suite of automated dispersion-model analysis algorithms capable of extracting a variety of layer properties from measured spectra. The new tool provides excellent measurement precision, tool matching, and a platform for deploying many new production and development applications. In this paper we will explore the use of model based infrared analysis as a tool for characterizing novel bottle capacitor structures employed in high density dynamic random access memory (DRAM) chips. We will explore

  18. Ultrafast web inspection with hybrid dispersion laser scanner.

    PubMed

    Chen, Hongwei; Wang, Chao; Yazaki, Akio; Kim, Chanju; Goda, Keisuke; Jalali, Bahram

    2013-06-10

    We report an ultrafast web inspector that operates at a 1000 times higher scan rate than conventional methods. This system is based on a hybrid dispersion laser scanner that performs line scans at nearly 100 MHz. Specifically, we demonstrate web inspection with detectable resolution of 48.6 μm/pixel (scan direction) × 23 μm (web flow direction) within a width of view of 6 mm at a record high scan rate of 90.9 MHz. We demonstrate the identification and evaluation of particles on silicon wafers. This method holds great promise for speeding up quality control and hence reducing manufacturing costs.

  19. A dynamic scheduling algorithm for singe-arm two-cluster tools with flexible processing times

    NASA Astrophysics Data System (ADS)

    Li, Xin; Fung, Richard Y. K.

    2018-02-01

    This article presents a dynamic algorithm for job scheduling in two-cluster tools producing multi-type wafers with flexible processing times. Flexible processing times mean that the actual times for processing wafers should be within given time intervals. The objective of the work is to minimize the completion time of the newly inserted wafer. To deal with this issue, a two-cluster tool is decomposed into three reduced single-cluster tools (RCTs) in a series based on a decomposition approach proposed in this article. For each single-cluster tool, a dynamic scheduling algorithm based on temporal constraints is developed to schedule the newly inserted wafer. Three experiments have been carried out to test the dynamic scheduling algorithm proposed, comparing with the results the 'earliest starting time' heuristic (EST) adopted in previous literature. The results show that the dynamic algorithm proposed in this article is effective and practical.

  20. Optical technologies for TSV inspection

    NASA Astrophysics Data System (ADS)

    Aiyer, Arun A.; Maltsev, Nikolai; Ryu, Jae

    2014-04-01

    In this paper, Frontier Semiconductor will introduce a new technology that is referred to as Virtual Interface Technology (VIT™). VIT™ is a Fourier domain technique that utilizes temporal phase shear of the measurement beam. The unique configuration of the sensor enables measurement of wafer and bonded stack thicknesses ranging from a few microns to millimeters with measurement repeatability ~ nm and resolution of approximately 0.1% of nominal thickness or depth. We will present data on high aspect ratio via measurements (depth, top critical dimension, bottom critical dimension, via bottom profile and side wall angle), bonded wafer stack thickness, and Cu bump measurements. A complimentary tool developed at FSM is a high resolution μRaman spectrometer to measure stress-change in Si lattice induced by Through Silicon Via (TSV) processes. These measurements are important to determine Keep-Out-Zone in the areas where devices are built so that the engineered gate strain is not altered by TSV processing induced strain. Applications include via post-etch; via post fill, and bottom Cu nail stress measurements. The capabilities of and measurement results from both tools are discussed below.

  1. Propagation of resist heating mask error to wafer level

    NASA Astrophysics Data System (ADS)

    Babin, S. V.; Karklin, Linard

    2006-10-01

    As technology is approaching 45 nm and below the IC industry is experiencing a severe product yield hit due to rapidly shrinking process windows and unavoidable manufacturing process variations. Current EDA tools are unable by their nature to deliver optimized and process-centered designs that call for 'post design' localized layout optimization DFM tools. To evaluate the impact of different manufacturing process variations on final product it is important to trace and evaluate all errors through design to manufacturing flow. Photo mask is one of the critical parts of this flow, and special attention should be paid to photo mask manufacturing process and especially to mask tight CD control. Electron beam lithography (EBL) is a major technique which is used for fabrication of high-end photo masks. During the writing process, resist heating is one of the sources for mask CD variations. Electron energy is released in the mask body mainly as heat, leading to significant temperature fluctuations in local areas. The temperature fluctuations cause changes in resist sensitivity, which in turn leads to CD variations. These CD variations depend on mask writing speed, order of exposure, pattern density and its distribution. Recent measurements revealed up to 45 nm CD variation on the mask when using ZEP resist. The resist heating problem with CAR resists is significantly smaller compared to other types of resists. This is partially due to higher resist sensitivity and the lower exposure dose required. However, there is no data yet showing CD errors on the wafer induced by CAR resist heating on the mask. This effect can be amplified by high MEEF values and should be carefully evaluated at 45nm and below technology nodes where tight CD control is required. In this paper, we simulated CD variation on the mask due to resist heating; then a mask pattern with the heating error was transferred onto the wafer. So, a CD error on the wafer was evaluated subject to only one term of the

  2. Reticle variation influence on manufacturing line and wafer device performance

    NASA Astrophysics Data System (ADS)

    Nistler, John L.; Spurlock, Kyle

    1994-01-01

    Cost effective manufacturing of devices at 0.5, 0.35 and 0.25μm geometries will be highly dependent on a companys' ability to obtain an economic return on investment. The high capital investment in equipment and facilities, not to mention the related chemical and wafer costs, for producing 200mm silicon wafers requires aspects of wafer processing to be tightly controlled. Reduction in errors and enhanced yield management requires early correction or avoidance of reticle problems. It is becoming increasingly important to recognize and track all pertinent factors impacting both the technical and financial viability of a wafer manufacturing fabrication area. Reticle related effects on wafer manufacturing can be costly and affect the total quality perceived by the device customer.

  3. Silicon wafer-based tandem cells: The ultimate photovoltaic solution?

    NASA Astrophysics Data System (ADS)

    Green, Martin A.

    2014-03-01

    Recent large price reductions with wafer-based cells have increased the difficulty of dislodging silicon solar cell technology from its dominant market position. With market leaders expected to be manufacturing modules above 16% efficiency at 0.36/Watt by 2017, even the cost per unit area (60-70/m2) will be difficult for any thin-film photovoltaic technology to significantly undercut. This may make dislodgement likely only by appreciably higher energy conversion efficiency approaches. A silicon wafer-based cell able to capitalize on on-going cost reductions within the mainstream industry, but with an appreciably higher than present efficiency, might therefore provide the ultimate PV solution. With average selling prices of 156 mm quasi-square monocrystalline Si photovoltaic wafers recently approaching 1 (per wafer), wafers now provide clean, low cost templates for overgrowth of thin, wider bandgap high performance cells, nearly doubling silicon's ultimate efficiency potential. The range of possible Si-based tandem approaches is reviewed together with recent results and ultimate prospects.

  4. Characterization of wafer-level bonded hermetic packages using optical leak detection

    NASA Astrophysics Data System (ADS)

    Duan, Ani; Wang, Kaiying; Aasmundtveit, Knut; Hoivik, Nils

    2009-07-01

    For MEMS devices required to be operated in a hermetic environment, one of the main reliability issues is related to the packaging methods applied. In this paper, an optical method for testing low volume hermetic cavities formed by anodic bonding between glass and SOI (silicon on insulator) wafer is presented. Several different cavity-geometry structures have been designed, fabricated and applied to monitor the hermeticity of wafer level anodic bonding. SOI wafer was used as the cap wafer on which the different-geometry structures were fabricated using standard MEMS technology. The test cavities were bonded using SOI wafers to glass wafers at 400C and 1000mbar pressure inside a vacuum bonding chamber. The bonding voltage varies from 200V to 600V. The bonding strength between glass and SOI wafer was mechanically tested using shear tester. The deformation amplitudes of the cavity cap surface were monitored by using an optical interferometer. The hermeticity of the glass-to-SOI wafer level bonding was characterized through observing the surface deformation in a 6 months period in atmospheric environment. We have observed a relatively stable micro vacuum-cavity.

  5. Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

    NASA Astrophysics Data System (ADS)

    Cunning, Benjamin V.; Ahmed, Mohsin; Mishra, Neeraj; Ranjbar Kermany, Atieh; Wood, Barry; Iacopi, Francesca

    2014-08-01

    Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices.

  6. From magic to technology: materials integration by wafer bonding

    NASA Astrophysics Data System (ADS)

    Dragoi, Viorel

    2006-02-01

    Wafer bonding became in the last decade a very powerful technology for MEMS/MOEMS manufacturing. Being able to offer a solution to overcome some problems of the standard processes used for materials integration (e.g. epitaxy, thin films deposition), wafer bonding is nowadays considered an important item in the MEMS engineer toolbox. Different principles governing the wafer bonding processes will be reviewed in this paper. Various types of applications will be presented as examples.

  7. Device Rotates Bearing Balls For Inspection

    NASA Technical Reports Server (NTRS)

    Burley, R. K.

    1988-01-01

    Entire surface of ball inspected automatically and quickly. Device holds and rotates bearing ball for inspection by optical or mechanical surface-quality probe, eddy-current probe for detection of surface or subsurface defects, or circumference-measuring tool. Ensures entire surface of ball moves past inspection head quickly. New device saves time and increases reliability of inspections of spherical surfaces. Simple to operate and provides quick and easy access for loading and unloading of balls during inspection.

  8. Mask-to-wafer alignment system

    DOEpatents

    Sweatt, William C.; Tichenor, Daniel A.; Haney, Steven J.

    2003-11-04

    A modified beam splitter that has a hole pattern that is symmetric in one axis and anti-symmetric in the other can be employed in a mask-to-wafer alignment device. The device is particularly suited for rough alignment using visible light. The modified beam splitter transmits and reflects light from a source of electromagnetic radiation and it includes a substrate that has a first surface facing the source of electromagnetic radiation and second surface that is reflective of said electromagnetic radiation. The substrate defines a hole pattern about a central line of the substrate. In operation, an input beam from a camera is directed toward the modified beam splitter and the light from the camera that passes through the holes illuminates the reticle on the wafer. The light beam from the camera also projects an image of a corresponding reticle pattern that is formed on the mask surface of the that is positioned downstream from the camera. Alignment can be accomplished by detecting the radiation that is reflected from the second surface of the modified beam splitter since the reflected radiation contains both the image of the pattern from the mask and a corresponding pattern on the wafer.

  9. WaferOptics® mass volume production and reliability

    NASA Astrophysics Data System (ADS)

    Wolterink, E.; Demeyer, K.

    2010-05-01

    The Anteryon WaferOptics® Technology platform contains imaging optics designs, materials, metrologies and combined with wafer level based Semicon & MEMS production methods. WaferOptics® first required complete new system engineering. This system closes the loop between application requirement specifications, Anteryon product specification, Monte Carlo Analysis, process windows, process controls and supply reject criteria. Regarding the Anteryon product Integrated Lens Stack (ILS), new design rules, test methods and control systems were assessed, implemented, validated and customer released for mass production. This includes novel reflowable materials, mastering process, replication, bonding, dicing, assembly, metrology, reliability programs and quality assurance systems. Many of Design of Experiments were performed to assess correlations between optical performance parameters and machine settings of all process steps. Lens metrologies such as FFL, BFL, and MTF were adapted for wafer level production and wafer mapping was introduced for yield management. Test methods for screening and validating suitable optical materials were designed. Critical failure modes such as delamination and popcorning were assessed and modeled with FEM. Anteryon successfully managed to integrate the different technologies starting from single prototypes to high yield mass volume production These parallel efforts resulted in a steep yield increase from 30% to over 90% in a 8 months period.

  10. Silicon Alignment Pins: An Easy Way to Realize a Wafer-to-Wafer Alignment

    NASA Technical Reports Server (NTRS)

    Jung-Kubiak, Cecile; Reck, Theodore J.; Lin, Robert H.; Peralta, Alejandro; Gill, John J.; Lee, Choonsup; Siles, Jose; Toda, Risaku; Chattopadhyay, Goutam; Cooper, Ken B.; hide

    2013-01-01

    Submillimeter heterodyne instruments play a critical role in addressing fundamental questions regarding the evolution of galaxies as well as being a crucial tool in planetary science. To make these instruments compatible with small platforms, especially for the study of the outer planets, or to enable the development of multi-pixel arrays, it is essential to reduce the mass, power, and volume of the existing single-pixel heterodyne receivers. Silicon micromachining technology is naturally suited for making these submillimeter and terahertz components, where precision and accuracy are essential. Waveguide and channel cavities are etched in a silicon bulk material using deep reactive ion etching (DRIE) techniques. Power amplifiers, multiplier and mixer chips are then integrated and the silicon pieces are stacked together to form a supercompact receiver front end. By using silicon micromachined packages for these components, instrument mass can be reduced and higher levels of integration can be achieved. A method is needed to assemble accurately these silicon pieces together, and a technique was developed here using etched pockets and silicon pins to align two wafers together.

  11. Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers

    NASA Astrophysics Data System (ADS)

    Kim, Munho; Cho, Sang June; Jayeshbhai Dave, Yash; Mi, Hongyi; Mikael, Solomon; Seo, Jung-Hun; Yoon, Jung U.; Ma, Zhenqiang

    2018-01-01

    Newly engineered substrates consisting of semiconductor-on-insulator are gaining much attention as starting materials for the subsequent transfer of semiconductor nanomembranes via selective etching of the insulating layer. Germanium-on-insulator (GeOI) substrates are critically important because of the versatile applications of Ge nanomembranes (Ge NMs) toward electronic and optoelectronic devices. Among various fabrication techniques, the Smart-CutTM technique is more attractive than other methods because a high temperature annealing process can be avoided. Another advantage of Smart-CutTM is the reusability of the donor Ge wafer. However, it is very difficult to realize an undamaged Ge wafer because there exists a large mismatch in the coefficient of thermal expansion among the layers. Although an undamaged donor Ge wafer is a prerequisite for its reuse, research related to this issue has not yet been reported. Here we report the fabrication of 4-inch GeOI substrates using the direct wafer bonding and Smart-CutTM process with a low thermal budget. In addition, a thermo-mechanical simulation of GeOI was performed by COMSOL to analyze induced thermal stress in each layer of GeOI. Crack-free donor Ge wafers were obtained by annealing at 250 °C for 10 h. Raman spectroscopy and x-ray diffraction (XRD) indicated similarly favorable crystalline quality of the Ge layer in GeOI compared to that of bulk Ge. In addition, Ge p-n diodes using transferred Ge NM indicate a clear rectifying behavior with an on and off current ratio of 500 at ±1 V. This demonstration offers great promise for high performance transferrable Ge NM-based device applications.

  12. Lighting Studies for Fuelling Machine Deployed Visual Inspection Tool

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Stoots, Carl; Griffith, George

    2015-04-01

    Under subcontract to James Fisher Nuclear, Ltd., INL has been reviewing advanced vision systems for inspection of graphite in high radiation, high temperature, and high pressure environments. INL has performed calculations and proof-of-principle measurements of optics and lighting techniques to be considered for visual inspection of graphite fuel channels in AGR reactors in UK.

  13. Multifunctional medicated lyophilised wafer dressing for effective chronic wound healing.

    PubMed

    Pawar, Harshavardhan V; Boateng, Joshua S; Ayensu, Isaac; Tetteh, John

    2014-06-01

    Wafers combining weight ratios of Polyox with carrageenan (75/25) or sodium alginate (50/50) containing streptomycin and diclofenac were prepared to improve chronic wound healing. Gels were freeze-dried using a lyophilisation cycle incorporating an annealing step. Wafers were characterised for morphology, mechanical and in vitro functional (swelling, adhesion, drug release in the presence of simulated wound fluid) characteristics. Both blank (BLK) and drug-loaded (DL) wafers were soft, flexible, elegant in appearance and non-brittle in nature. Annealing helped to improve porous nature of wafers but was affected by the addition of drugs. Mechanical characterisation demonstrated that the wafers were strong enough to withstand normal stresses but also flexible to prevent damage to newly formed skin tissue. Differences in swelling, adhesion and drug release characteristics could be attributed to differences in pore size and sodium sulphate formed because of the salt forms of the two drugs. BLK wafers showed relatively higher swelling and adhesion than DL wafers with the latter showing controlled release of streptomycin and diclofenac. The optimised dressing has the potential to reduce bacterial infection and can also help to reduce swelling and pain associated with injury due to the anti-inflammatory action of diclofenac and help to achieve more rapid wound healing. © 2014 Wiley Periodicals, Inc. and the American Pharmacists Association.

  14. Environmentally benign processing of YAG transparent wafers

    NASA Astrophysics Data System (ADS)

    Yang, Yan; Wu, Yiquan

    2015-12-01

    Transparent yttrium aluminum garnet (YAG) wafers were successfully produced via aqueous tape casting and vacuum sintering techniques using a new environmentally friendly binder, a copolymer of isobutylene and maleic anhydride with the commercial name ISOBAM (noted as ISOBAM). Aqueous YAG slurries were mixed by ball-milling, which was followed by de-gassing and tape casting of wafers. The final YAG green tapes were homogenous and flexible, and could be bent freely without cracking. After the drying and sintering processes, transparent YAG wafers were achieved. The microstructures of both the green tape and vacuum-sintered YAG ceramic were observed by scanning electronic microscopy (SEM). Phase compositions were examined by X-ray diffraction (XRD). Optical transmittance was measured in UV-VIS regions with the result that the transmittance is 82.6% at a wavelength of 800 nm.

  15. P/N InP solar cells on Ge wafers

    NASA Technical Reports Server (NTRS)

    Wojtczuk, Steven; Vernon, Stanley; Burke, Edward A.

    1994-01-01

    Indium phosphide (InP) P-on-N one-sun solar cells were epitaxially grown using a metalorganic chemical vapor deposition process on germanium (Ge) wafers. The motivation for this work is to replace expensive InP wafers, which are fragile and must be thick and therefore heavy, with less expensive Ge wafers, which are stronger, allowing use of thinner, lighter weight wafers. An intermediate InxGs1-xP grading layer starting as In(0.49)Ga(0.51) at the GaAs-coated Ge wafer surface and ending as InP at the top of the grading layer (backside of the InP cell) was used to attempt to bend some of the threading dislocations generated by lattice-mismatch between the Ge wafer and InP cell so they would be harmlessly confined in this grading layer. The best InP/Ge cell was independently measured by NASA-Lewis with a one-sun 25 C AMO efficiently measured by NASA-Lewis with a one-circuit photocurrent 22.6 mA/sq cm. We believe this is the first published report of an InP cell grown on a Ge wafer. Why get excited over a 9 percent InP/Ge cell? If we look at the cell weight and efficiency, a 9 percent InP cell on an 8 mil Ge wafer has about the same cell power density, 118 W/kg (BOL), as the best InP cell ever made, a 19 percent InP cell on an 18 mil InP wafer, because of the lighter Ge wafer weight. As cell panel materials become lighter, the cell weight becomes more important, and the advantage of lightweight cells to the panel power density becomes more important. In addition, although InP/Ge cells have a low beginning-of-life (BOL) efficiency due to dislocation defects, the InP/Ge cells are very radiation hard (end-of-life power similar to beginning-of-life). We have irradiated an InP/Ge cell with alpha particles to an equivalent fluence of 1.6 x 10(exp 16) 1 MeV electrons/sq cm and the efficiency is still 83 percent of its BOL value. At this fluence level, the power output of these InP/Ge cells matches the GaAs/Ge cell data tabulated in the JPL handbook. Data are presented

  16. Material electronic quality specifications for polycrystalline silicon wafers

    NASA Astrophysics Data System (ADS)

    Kalejs, J. P.

    1994-06-01

    As the use of polycrystalline silicon wafers has expanded in the photovoltaic industry, the need grows for monitoring and qualification techniques for as-grown material that can be used to optimize crystal growth and help predict solar cell performance. Particular needs are for obtaining quantitative measures over full wafer areas of the effects of lifetime limiting defects and of the lifetime upgrading taking place during solar cell processing. We review here the approaches being pursued in programs under way to develop material quality specifications for thin Edge-defined Film-fed Growth (EFG) polycrystalline silicon as-grown wafers. These studies involve collaborations between Mobil Solar, and NREL and university-based laboratories.

  17. Wafer level reliability testing: An idea whose time has come

    NASA Technical Reports Server (NTRS)

    Trapp, O. D.

    1987-01-01

    Wafer level reliability testing has been nurtured in the DARPA supported workshops, held each autumn since 1982. The seeds planted in 1982 have produced an active crop of very large scale integration manufacturers applying wafer level reliability test methods. Computer Aided Reliability (CAR) is a new seed being nurtured. Users are now being awakened by the huge economic value of the wafer reliability testing technology.

  18. Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

    PubMed

    Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

    2014-05-13

    The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

  19. Deep machine learning based Image classification in hard disk drive manufacturing (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Rana, Narender; Chien, Chester

    2018-03-01

    A key sensor element in a Hard Disk Drive (HDD) is the read-write head device. The device is complex 3D shape and its fabrication requires over thousand process steps with many of them being various types of image inspection and critical dimension (CD) metrology steps. In order to have high yield of devices across a wafer, very tight inspection and metrology specifications are implemented. Many images are collected on a wafer and inspected for various types of defects and in CD metrology the quality of image impacts the CD measurements. Metrology noise need to be minimized in CD metrology to get better estimate of the process related variations for implementing robust process controls. Though there are specialized tools available for defect inspection and review allowing classification and statistics. However, due to unavailability of such advanced tools or other reasons, many times images need to be manually inspected. SEM Image inspection and CD-SEM metrology tools are different tools differing in software as well. SEM Image inspection and CD-SEM metrology tools are separate tools differing in software and purpose. There have been cases where a significant numbers of CD-SEM images are blurred or have some artefact and there is a need for image inspection along with the CD measurement. Tool may not report a practical metric highlighting the quality of image. Not filtering CD from these blurred images will add metrology noise to the CD measurement. An image classifier can be helpful here for filtering such data. This paper presents the use of artificial intelligence in classifying the SEM images. Deep machine learning is used to train a neural network which is then used to classify the new images as blurred and not blurred. Figure 1 shows the image blur artefact and contingency table of classification results from the trained deep neural network. Prediction accuracy of 94.9 % was achieved in the first model. Paper covers other such applications of the deep neural

  20. Process Performance of Optima XEx Single Wafer High Energy Implanter

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kim, J. H.; Yoon, Jongyoon; Kondratenko, S.

    2011-01-07

    To meet the process requirements for well formation in future CMOS memory production, high energy implanters require more robust angle, dose, and energy control while maintaining high productivity. The Optima XEx high energy implanter meets these requirements by integrating a traditional LINAC beamline with a robust single wafer handling system. To achieve beam angle control, Optima XEx can control both the horizontal and vertical beam angles to within 0.1 degrees using advanced beam angle measurement and correction. Accurate energy calibration and energy trim functions accelerate process matching by eliminating energy calibration errors. The large volume process chamber and UDC (upstreammore » dose control) using faraday cups outside of the process chamber precisely control implant dose regardless of any chamber pressure increase due to PR (photoresist) outgassing. An optimized RF LINAC accelerator improves reliability and enables singly charged phosphorus and boron energies up to 1200 keV and 1500 keV respectively with higher beam currents. A new single wafer endstation combined with increased beam performance leads to overall increased productivity. We report on the advanced performance of Optima XEx observed during tool installation and volume production at an advanced memory fab.« less

  1. Rapid Multi-Damage Identification for Health Monitoring of Laminated Composites Using Piezoelectric Wafer Sensor Arrays

    PubMed Central

    Si, Liang; Wang, Qian

    2016-01-01

    Through the use of the wave reflection from any damage in a structure, a Hilbert spectral analysis-based rapid multi-damage identification (HSA-RMDI) technique with piezoelectric wafer sensor arrays (PWSA) is developed to monitor and identify the presence, location and severity of damage in carbon fiber composite structures. The capability of the rapid multi-damage identification technique to extract and estimate hidden significant information from the collected data and to provide a high-resolution energy-time spectrum can be employed to successfully interpret the Lamb waves interactions with single/multiple damage. Nevertheless, to accomplish the precise positioning and effective quantification of multiple damage in a composite structure, two functional metrics from the RMDI technique are proposed and used in damage identification, which are the energy density metric and the energy time-phase shift metric. In the designed damage experimental tests, invisible damage to the naked eyes, especially delaminations, were detected in the leftward propagating waves as well as in the selected sensor responses, where the time-phase shift spectra could locate the multiple damage whereas the energy density spectra were used to quantify the multiple damage. The increasing damage was shown to follow a linear trend calculated by the RMDI technique. All damage cases considered showed completely the developed RMDI technique potential as an effective online damage inspection and assessment tool. PMID:27153070

  2. Wafer-scale micro-optics fabrication

    NASA Astrophysics Data System (ADS)

    Voelkel, Reinhard

    2012-07-01

    Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

  3. Tip/tilt-compensated through-focus scanning optical microscopy

    NASA Astrophysics Data System (ADS)

    Lee, Jun Ho; Park, Jun Hyung; Jeong, Dohwan; Shin, Eun Ji; Park, Chris

    2016-11-01

    Through-Focus Optical Microscopy (TSOM), with nanometer scale lateral and vertical sensitivity matching those of scanning electron microscopy, has been demonstrated to be utilized for 3D inspection and metrology. There have been sensitivity and instability issues in acquiring through-focus images because TSOM 3D information is indirectly extracted by differentiating a target TSOM image from reference TSOM images. This paper first reports on the optical axis instability that occurs during the scanning process of TSOM when implemented in an existing patterned wafer inspection tool by moving the wafer plane; this is followed by quantitative confirmation of the optical/mechanical instability using a new TSOM tool on an optical bench with a Shack-Hartmann wavefront sensor and a tip/tilt sensor. Then, this paper proposes two tip/tilt compensated TSOM optical acquisition methods that can be applied with adaptive optics. The first method simply adopts a tip/tilt mirror with a quad cell in a simple closed loop, while the second method adopts a highorder deformable mirror with a Shack-Hartmann sensor. The second method is able to correct high-order residual aberrations as well as to perform through-focus scanning without z-axis movement, while the first method is easier to implement in pre-existing wafer inspection systems with only minor modification.

  4. Characterizing SOI Wafers By Use Of AOTF-PHI

    NASA Technical Reports Server (NTRS)

    Cheng, Li-Jen; Li, Guann-Pyng; Zang, Deyu

    1995-01-01

    Developmental nondestructive method of characterizing layers of silicon-on-insulator (SOI) wafer involves combination of polarimetric hyperspectral imaging by use of acousto-optical tunable filters (AOTF-PHI) and computational resources for extracting pertinent data on SOI wafers from polarimetric hyperspectral images. Offers high spectral resolution and both ease and rapidity of optical-wavelength tuning. Further efforts to implement all of processing of polarimetric spectral image data in special-purpose hardware for sake of procesing speed. Enables characterization of SOI wafers in real time for online monitoring and adjustment of production. Also accelerates application of AOTF-PHI to other applications in which need for high-resolution spectral imaging, both with and without polarimetry.

  5. Good animal welfare makes economic sense: potential of pig abattoir meat inspection as a welfare surveillance tool

    PubMed Central

    2012-01-01

    During abattoir meat inspection pig carcasses are partially or fully condemned upon detection of disease that poses a risk to public health or welfare conditions that cause animal suffering e.g. fractures. This incurs direct financial losses to producers and processors. Other health and welfare-related conditions may not result in condemnation but can necessitate ‘trimming’ of the carcass e.g. bruising, and result in financial losses to the processor. Since animal health is a component of animal welfare these represent a clear link between suboptimal pig welfare and financial losses to the pig industry. Meat inspection data can be used to inform herd health programmes, thereby reducing the risk of injury and disease and improving production efficiency. Furthermore, meat inspection has the potential to contribute to surveillance of animal welfare. Such data could contribute to reduced losses to producers and processors through lower rates of carcass condemnations, trimming and downgrading in conjunction with higher pig welfare standards on farm. Currently meat inspection data are under-utilised in the EU, even as a means of informing herd health programmes. This includes the island of Ireland but particularly the Republic. This review describes the current situation with regard to meat inspection regulation, method, data capture and utilisation across the EU, with special reference to the island of Ireland. It also describes the financial losses arising from poor animal welfare (and health) on farms. This review seeks to contribute to efforts to evaluate the role of meat inspection as a surveillance tool for animal welfare on-farm, using pigs as a case example. PMID:22738170

  6. VLED for Si wafer-level packaging

    NASA Astrophysics Data System (ADS)

    Chu, Chen-Fu; Chen, Chiming; Yen, Jui-Kang; Chen, Yung-Wei; Tsou, Chingfu; Chang, Chunming; Doan, Trung; Tran, Chuong Anh

    2012-03-01

    In this paper, we introduced the advantages of Vertical Light emitting diode (VLED) on copper alloy with Si-wafer level packaging technologies. The silicon-based packaging substrate starts with a <100> dou-ble-side polished p-type silicon wafer, then anisotropic wet etching technology is done to construct the re-flector depression and micro through-holes on the silicon substrate. The operating voltage, at a typical cur-rent of 350 milli-ampere (mA), is 3.2V. The operation voltage is less than 3.7V under higher current driving conditions of 1A. The VLED chip on Si package has excellent heat dissipation and can be operated at high currents up to 1A without efficiency degradation. The typical spatial radiation pattern emits a uniform light lambertian distribution from -65° to 65° which can be easily fit for secondary optics. The correlated color temperature (CCT) has only 5% variation for daylight and less than 2% variation for warm white, when the junction temperature is increased from 25°C to 110°C, suggesting a stable CCT during operation for general lighting application. Coupled with aspheric lens and micro lens array in a wafer level process, it has almost the same light distribution intensity for special secondary optics lighting applications. In addition, the ul-tra-violet (UV) VLED, featuring a silicon substrate and hard glass cover, manufactured by wafer level pack-aging emits high power UV wavelengths appropriate for curing, currency, document verification, tanning, medical, and sterilization applications.

  7. Intrinsic Gettering in Nitrogen-Doped and Hydrogen-Annealed Czochralski-Grown Silicon Wafers

    NASA Astrophysics Data System (ADS)

    Goto, Hiroyuki; Pan, Lian-Sheng; Tanaka, Masafumi; Kashima, Kazuhiko

    2001-06-01

    The properties of nitrogen-doped and hydrogen-annealed Czochralski-grown silicon (NHA-CZ-Si) wafers were investigated in this study. The quality of the subsurface was investigated by monitoring the generation lifetime of minority carriers, as measured by the capacitance-time measurements of a metal oxide silicon capacitor (MOS C-t). The intrinsic gettering (IG) ability was investigated by determining the nickel concentration on the surface and in the subsurface as measured by graphite furnace atomic absorption spectrometry (GFAAS) after the wafer was deliberately contaminated with nickel. From the results obtained, the generation lifetimes of these NHA-CZ-Si wafers were determined to be almost the same as, or a little longer than those of epitaxial wafers, and the IG ability was proportional to the total volume of oxygen precipitates [i.e., bulk micro defects (BMDs)], which was influenced by the oxygen and nitrogen concentrations in the wafers. Therefore, it is suggested that the subsurface of the NHA-CZ-Si wafers is of good quality and the IG capacity is controllable by the nitrogen and oxygen concentrations in the wafers.

  8. Pattern Inspection of EUV Masks Using DUV Light

    NASA Astrophysics Data System (ADS)

    Liang, Ted; Tejnil, Edita; Stivers, Alan R.

    2002-12-01

    Inspection of extreme ultraviolet (EUV) lithography masks requires reflected light and this poses special challenges for inspection tool suppliers as well as for mask makers. Inspection must detect all the printable defects in the absorber pattern as well as printable process-related defects. Progress has been made under the NIST ATP project on "Intelligent Mask Inspection Systems for Next Generation Lithography" in assessing the factors that impact the inspection tool sensitivity. We report in this paper the inspection of EUV masks with programmed absorber defects using 257nm light. All the materials of interests for masks are highly absorptive to EUV light as compared to deep ultraviolet (DUV) light. Residues and contamination from mask fabrication process and handling are prone to be printable. Therefore, it is critical to understand their EUV printability and optical inspectability. Process related defects may include residual buffer layer such as oxide, organic contaminants and possible over-etch to the multilayer surface. Both simulation and experimental results will be presented in this paper.

  9. Making Porous Luminescent Regions In Silicon Wafers

    NASA Technical Reports Server (NTRS)

    Fathauer, Robert W.; Jones, Eric W.

    1994-01-01

    Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

  10. Recipe creation for automated defect classification with a 450mm surface scanning inspection system based on the bidirectional reflectance distribution function of native defects

    NASA Astrophysics Data System (ADS)

    Yathapu, Nithin; McGarvey, Steve; Brown, Justin; Zhivotovsky, Alexander

    2016-03-01

    This study explores the feasibility of Automated Defect Classification (ADC) with a Surface Scanning Inspection System (SSIS). The defect classification was based upon scattering sensitivity sizing curves created via modeling of the Bidirectional Reflectance Distribution Function (BRDF). The BRDF allowed for the creation of SSIS sensitivity/sizing curves based upon the optical properties of both the filmed wafer samples and the optical architecture of the SSIS. The elimination of Polystyrene Latex Sphere (PSL) and Silica deposition on both filmed and bare Silicon wafers prior to SSIS recipe creation and ADC creates a challenge for light scattering surface intensity based defect binning. This study explored the theoretical maximal SSIS sensitivity based on native defect recipe creation in conjunction with the maximal sensitivity derived from BRDF modeling recipe creation. Single film and film stack wafers were inspected with recipes based upon BRDF modeling. Following SSIS recipe creation, initially targeting maximal sensitivity, selected recipes were optimized to classify defects commonly found on non-patterned wafers. The results were utilized to determine the ADC binning accuracy of the native defects and evaluate the SSIS recipe creation methodology. A statistically valid sample of defects from the final inspection results of each SSIS recipe and filmed substrate were reviewed post SSIS ADC processing on a Defect Review Scanning Electron Microscope (SEM). Native defect images were collected from each statistically valid defect bin category/size for SEM Review. The data collected from the Defect Review SEM was utilized to determine the statistical purity and accuracy of each SSIS defect classification bin. This paper explores both, commercial and technical, considerations of the elimination of PSL and Silica deposition as a precursor to SSIS recipe creation targeted towards ADC. Successful integration of SSIS ADC in conjunction with recipes created via BRDF

  11. The uses of Man-Made diamond in wafering applications

    NASA Technical Reports Server (NTRS)

    Fallon, D. B.

    1982-01-01

    The continuing, rapid growth of the semiconductor industry requires the involvement of several specialized industries in the development of special products geared toward the unique requirements of this new industry. A specialized manufactured diamond to meet various material removal needs was discussed. The area of silicon wafer slicing has presented yet anothr challenge and it is met most effectively. The history, operation, and performance of Man-Made diamond and particularly as applied to silicon wafer slicing is discussed. Product development is underway to come up with a diamond specifically for sawing silicon wafers on an electroplated blade.

  12. The Imaging Properties of a Silicon Wafer X-Ray Telescope

    NASA Technical Reports Server (NTRS)

    Joy, M. K.; Kolodziejczak, J. J.; Weisskopf, M. C.; Fair, S.; Ramsey, B. D.

    1994-01-01

    Silicon wafers have excellent optical properties --- low microroughness and good medium-scale flatness --- which Make them suitable candidates for inexpensive flat-plate grazing-incidence x-ray mirrors. On short spatial scales (less than 3 mm) the surface quality of silicon wafers rivals that expected of the Advanced X-Ray Astrophysics Facility (AXAF) high-resolution optics. On larger spatial scales, however, performance may be degraded by the departure from flatness of the wafer and by distortions induced by the mounting scheme. In order to investigate such effects, we designed and constructed a prototype silicon-wafer x-ray telescope. The device was then tested in both visible light and x rays. The telescope module consists of 94 150-mm-diameter wafers, densely packed into the first stage of a Kirkpatrick-Baez configuration. X-ray tests at three energies (4.5, 6.4, and 8.0 keV) showed an energy-independent line spread function with full width at half maximum (FWHM) of 150 arcseconds, dominated by deviations from large-scale flatness.

  13. Imaging Study of Multi-Crystalline Silicon Wafers Throughout the Manufacturing Process: Preprint

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Johnston, S.; Yan, F.; Zaunbracher, K.

    2011-07-01

    Imaging techniques are applied to multi-crystalline silicon bricks, wafers at various process steps, and finished solar cells. Photoluminescence (PL) imaging is used to characterize defects and material quality on bricks and wafers. Defect regions within the wafers are influenced by brick position within an ingot and height within the brick. The defect areas in as-cut wafers are compared to imaging results from reverse-bias electroluminescence and dark lock-in thermography and cell parameters of near-neighbor finished cells. Defect areas are also characterized by defect band emissions. The defect areas measured by these techniques on as-cut wafers are shown to correlate to finishedmore » cell performance.« less

  14. Edge printability: techniques used to evaluate and improve extreme wafer edge printability

    NASA Astrophysics Data System (ADS)

    Roberts, Bill; Demmert, Cort; Jekauc, Igor; Tiffany, Jason P.

    2004-05-01

    The economics of semiconductor manufacturing have forced process engineers to develop techniques to increase wafer yield. Improvements in process controls and uniformities in all areas of the fab have reduced film thickness variations at the very edge of the wafer surface. This improved uniformity has provided the opportunity to consider decreasing edge exclusions, and now the outermost extents of the wafer must be considered in the yield model and expectations. These changes have increased the requirements on lithography to improve wafer edge printability in areas that previously were not even coated. This has taxed all software and hardware components used in defining the optical focal plane at the wafer edge. We have explored techniques to determine the capabilities of extreme wafer edge printability and the components of the systems that influence this printability. We will present current capabilities and new detection techniques and the influence that the individual hardware and software components have on edge printability. We will show effects of focus sensor designs, wafer layout, utilization of dummy edge fields, the use of non-zero overlay targets and chemical/optical edge bead optimization.

  15. Wafer-shape metrics based foundry lithography

    NASA Astrophysics Data System (ADS)

    Kim, Sungtae; Liang, Frida; Mileham, Jeffrey; Tsai, Damon; Bouche, Eric; Lee, Sean; Huang, Albert; Hua, C. F.; Wei, Ming Sheng

    2017-03-01

    As device shrink, there are many difficulties with process integration and device yield. Lithography process control is expected to be a major challenge due to tighter overlay and focus control requirement. The understanding and control of stresses accumulated during device fabrication has becoming more critical at advanced technology nodes. Within-wafer stress variations cause local wafer distortions which in turn present challenges for managing overlay and depth of focus during lithography. A novel technique for measuring distortion is Coherent Gradient Sensing (CGS) interferometry, which is capable of generating a high-density distortion data set of the full wafer within a time frame suitable for a high volume manufacturing (HVM) environment. In this paper, we describe the adoption of CGS (Coherent Gradient Sensing) interferometry into high volume foundry manufacturing to overcome these challenges. Leveraging this high density 3D metrology, we characterized its In-plane distortion as well as its topography capabilities applied to the full flow of an advanced foundry manufacturing. Case studies are presented that summarize the use of CGS data to reveal correlations between in-plane distortion and overlay variation as well as between topography and device yield.

  16. Nonlinear resonance ultrasonic vibrations in Czochralski-silicon wafers

    NASA Astrophysics Data System (ADS)

    Ostapenko, S.; Tarasov, I.

    2000-04-01

    A resonance effect of generation of subharmonic acoustic vibrations is observed in as-grown, oxidized, and epitaxial silicon wafers. Ultrasonic vibrations were generated into a standard 200 mm Czochralski-silicon (Cz-Si) wafer using a circular ultrasound transducer with major frequency of the radial vibrations at about 26 kHz. By tuning frequency (f) of the transducer within a resonance curve, we observed a generation of intense f/2 subharmonic acoustic mode assigned as a "whistle." The whistle mode has a threshold amplitude behavior and narrow frequency band. The whistle is attributed to a nonlinear acoustic vibration of a silicon plate. It is demonstrated that characteristics of the whistle mode are sensitive to internal stress and can be used for quality control and in-line diagnostics of oxidized and epitaxial Cz-Si wafers.

  17. Automated Inspection And Precise Grinding Of Gears

    NASA Technical Reports Server (NTRS)

    Frint, Harold; Glasow, Warren

    1995-01-01

    Method of precise grinding of spiral bevel gears involves automated inspection of gear-tooth surfaces followed by adjustments of machine-tool settings to minimize differences between actual and nominal surfaces. Similar to method described in "Computerized Inspection of Gear-Tooth Surfaces" (LEW-15736). Yields gears of higher quality, with significant reduction in manufacturing and inspection time.

  18. Multi-wafer bonding technology for the integration of a micromachined Mirau interferometer

    NASA Astrophysics Data System (ADS)

    Wang, Wei-Shan; Lullin, Justine; Froemel, Joerg; Wiemer, Maik; Bargiel, Sylwester; Passilly, Nicolas; Gorecki, Christophe; Gessner, Thomas

    2015-02-01

    The paper presents the multi-wafer bonding technology as well as the integration of electrical connection to the zscanner wafer of the micromachined array-type Mirau interferometer. A Mirau interferometer, which is a key-component of optical coherence tomography (OCT) microsystem, consists of a microlens doublet, a MOEMS Z-scanner, a focusadjustment spacer and a beam splitter plate. For the integration of this MOEMS device heterogeneous bonding of Si, glass and SOI wafers is necessary. Previously, most of the existing methods for multilayer wafer bonding require annealing at high temperature, i.e., 1100°C. To be compatible with MEMS devices, bonding of different material stacks at temperatures lower than 400°C has also been investigated. However, if more components are involved, it becomes less effective due to the alignment accuracy or degradation of surface quality of the not-bonded side after each bonding operation. The proposed technology focuses on 3D integration of heterogeneous building blocks, where the assembly process is compatible with the materials of each wafer stack and with position accuracy which fits optical requirement. A demonstrator with up to 5 wafers bonded lower than 400°C is presented and bond interfaces are evaluated. To avoid the complexity of through wafer vias, a design which creates electrical connections along vertical direction by mounting a wafer stack on a flip chip PCB is proposed. The approach, which adopts vertically-stacked wafers along with electrical connection functionality, provides not only a space-effective integration of MOEMS device but also a design where the Mirau stack can be further integrated with other components of the OCT microsystem easily.

  19. Procedures for precap visual inspection

    NASA Technical Reports Server (NTRS)

    1984-01-01

    Screening procedures for the final precap visual inspection of microcircuits used in electronic system components are described as an aid in training personnel unfamiliar with microcircuits. Processing techniques used in industry for the manufacture of monolithic and hybrid components are presented and imperfections that may be encountered during this inspection are discussed. Problem areas such as scratches, voids, adhesions, and wire bonding are illustrated by photomicrographs. This guide can serve as an effective tool in training personnel to perform precap visual inspections efficiently and reliably.

  20. Extending i-line capabilities through variance characterization and tool enhancement

    NASA Astrophysics Data System (ADS)

    Miller, Dan; Salinas, Adrian; Peterson, Joel; Vickers, David; Williams, Dan

    2006-03-01

    Continuous economic pressures have moved a large percent of integrated device manufacturing (IDM) operations either overseas or to foundry operations over the last 10 years. These pressures have left the IDM fabs in the U.S. with required COO improvements in order to maintain operations domestically. While the assets of many of these factories are at a very favorable point in the depreciation life cycle, the equipment and processes are constrained to the quality of the equipment in its original state and the degradation over its installed life. With the objective to enhance output and improve process performance, this factory and their primary lithography process tool supplier have been able to extend the usable life of the existing process tools, increase the output of the tool base, and improve the distribution of the CDs on the product produced. Texas Instruments Incorporated lead an investigation with the POLARIS ® Systems & Services business of FSI International to determine the sources of variance in the i-line processing of a wide array of IC device types. Data from the sources of variance were investigated such as PEB temp, PEB delay time, develop recipe, develop time, and develop programming. While PEB processes are a primary driver of acid catalyzed resists, the develop mode is shown in this work to have an overwhelming impact on the wafer to wafer and across wafer CD performance of these i-line processes. These changes have been able to improve the wafer to wafer CD distribution by more than 80 %, and the within wafer CD distribution by more than 50 % while enabling a greater than 50 % increase in lithography cluster throughput. The paper will discuss the contribution from each of the sources of variance and their importance in overall system performance.

  1. Wafer chamber having a gas curtain for extreme-UV lithography

    DOEpatents

    Kanouff, Michael P.; Ray-Chaudhuri, Avijit K.

    2001-01-01

    An EUVL device includes a wafer chamber that is separated from the upstream optics by a barrier having an aperture that is permeable to the inert gas. Maintaining an inert gas curtain in the proximity of a wafer positioned in a chamber of an extreme ultraviolet lithography device can effectively prevent contaminants from reaching the optics in an extreme ultraviolet photolithography device even though solid window filters are not employed between the source of reflected radiation, e.g., the camera, and the wafer. The inert gas removes the contaminants by entrainment.

  2. Ultra-Gradient Test Cavity for Testing SRF Wafer Samples

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    N.J. Pogue, P.M. McIntyre, A.I. Sattarov, C. Reece

    2010-11-01

    A 1.3 GHz test cavity has been designed to test wafer samples of superconducting materials. This mushroom shaped cavity, operating in TE01 mode, creates a unique distribution of surface fields. The surface magnetic field on the sample wafer is 3.75 times greater than elsewhere on the Niobium cavity surface. This field design is made possible through dielectrically loading the cavity by locating a hemisphere of ultra-pure sapphire just above the sample wafer. The sapphire pulls the fields away from the walls so the maximum field the Nb surface sees is 25% of the surface field on the sample. In thismore » manner, it should be possible to drive the sample wafer well beyond the BCS limit for Niobium while still maintaining a respectable Q. The sapphire's purity must be tested for its loss tangent and dielectric constant to finalize the design of the mushroom test cavity. A sapphire loaded CEBAF cavity has been constructed and tested. The results on the dielectric constant and loss tangent will be presented« less

  3. In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

    PubMed Central

    Lim, Stephen CB; Paech, Michael J; Sunderland, Bruce; Liu, Yandi

    2013-01-01

    Background The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. PMID:23596347

  4. Robust wafer identification recognition based on asterisk-shape filter and high-low score comparison method.

    PubMed

    Hsu, Wei-Chih; Yu, Tsan-Ying; Chen, Kuan-Liang

    2009-12-10

    Wafer identifications (wafer ID) can be used to identify wafers from each other so that wafer processing can be traced easily. Wafer ID recognition is one of the problems of optical character recognition. The process to recognize wafer IDs is similar to that used in recognizing car license-plate characters. However, due to some unique characteristics, such as the irregular space between two characters and the unsuccessive strokes of wafer ID, it will not get a good result to recognize wafer ID by directly utilizing the approaches used in car license-plate character recognition. Wafer ID scratches are engraved by a laser scribe almost along the following four fixed directions: horizontal, vertical, plus 45 degrees , and minus 45 degrees orientations. The closer to the center line of a wafer ID scratch, the higher the gray level will be. These and other characteristics increase the difficulty to recognize the wafer ID. In this paper a wafer ID recognition scheme based on an asterisk-shape filter and a high-low score comparison method is proposed to cope with the serious influence of uneven luminance and make recognition more efficiently. Our proposed approach consists of some processing stages. Especially in the final recognition stage, a template-matching method combined with stroke analysis is used as a recognizing scheme. This is because wafer IDs are composed of Semiconductor Equipment and Materials International (SEMI) standard Arabic numbers and English alphabets, and thus the template ID images are easy to obtain. Furthermore, compared with the approach that requires prior training, such as a support vector machine, which often needs a large amount of training image samples, no prior training is required for our approach. The testing results show that our proposed scheme can efficiently and correctly segment out and recognize the wafer ID with high performance.

  5. Manufacturability of the X Architecture at the 90-nm technology node

    NASA Astrophysics Data System (ADS)

    Smayling, Michael C.; Sarma, Robin C.; Nagata, Toshiyuki; Arora, Narain; Duane, Michael P.; Oemardani, Shiany; Shah, Santosh

    2004-05-01

    In this paper, we discuss the results from a test chip that demonstrate the manufacturability and integration-worthiness of the X Architecture at the 90-nm technology node. We discuss how a collaborative effort between the design and chip making communities used the current generation of mask, lithography, wafer processing, inspection and metrology equipment to create 45 degree wires in typical metal pitches for the upper layers on a 90-nm device in a production environment. Cadence Design Systems created the test structure design and chip validation tools for the project. Canon"s KrF ES3 and ArF AS2 scanners were used for the lithography. Applied Materials used its interconnect fabrication technologies to produce the multilayer copper, low-k interconnect on 300-mm wafers. The results were confirmed for critical dimension and defect levels using Applied Materials" wafer inspection and metrology systems.

  6. Control wafer bow of InGaP on 200 mm Si by strain engineering

    NASA Astrophysics Data System (ADS)

    Wang, Bing; Bao, Shuyu; Made, Riko I.; Lee, Kwang Hong; Wang, Cong; Eng Kian Lee, Kenneth; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-12-01

    When epitaxially growing III-V compound semiconductors on Si substrates the mismatch of coefficients of thermal expansion (CTEs) between III-V and Si causes stress and wafer bow. The wafer bow is deleterious for some wafer-scale processing especially when the wafer size is large. Strain engineering was applied in the epitaxy of InGaP films on 200 mm silicon wafers having high quality germanium buffers. By applying compressive strain in the InGaP films to compensate the tensile strain induced by CTE mismatch, wafer bow was decreased from about 100 μm to less than 50 μm. X-ray diffraction studies show a clear trend between the decrease of wafer bow and the compensation of CTE mismatch induced tensile strain in the InGaP layers. In addition, the anisotropic strain relaxation in InGaP films resulted in anisotropic wafer bow along two perpendicular (110) directions. Etch pit density and plane-view transmission electron microscopy characterizations indicate that threading dislocation densities did not change significantly due to the lattice-mismatch applied in the InGaP films. This study shows that strain engineering is an effective method to control wafer bow when growing III-V semiconductors on large size Si substrates.

  7. Smart infrared inspection system field operational test.

    DOT National Transportation Integrated Search

    2014-04-01

    The Smart InfraRed Inspection System (SIRIS) is a tool designed to assist inspectors in determining which vehicles : passing through the system are in need of further inspection by measuring the thermal data from the wheel : components. As a vehicle ...

  8. Direct Mask Overlay Inspection

    NASA Astrophysics Data System (ADS)

    Hsia, Liang-Choo; Su, Lo-Soun

    1983-11-01

    In this paper, we present a mask inspection methodology and procedure that involves direct X-Y measurements. A group of dice is selected for overlay measurement; four measurement targets were laid out in the kerf of each die. The measured coordinates are then fit-ted to either a "historical" grid, which reflects the individual tool bias, or to an ideal grid squares fashion. Measurements are done using a Nikon X-Y laser interferometric measurement system, which provides a reference grid. The stability of the measurement system is essential. We then apply appropriate statistics to the residual after the fit to determine the overlay performance. Statistical methods play an important role in the product disposition. The acceptance criterion is, however, a compromise between the cost for mask making and the final device yield. In order to satisfy the demand on mask houses for quality of masks and high volume, mixing lithographic tools in mask making has become more popular, in particular, mixing optical and E-beam tools. In this paper, we also discuss the inspection procedure for mixing different lithographic tools.

  9. W-Band On-Wafer Measurement of Uniplanar Slot-Type Antennas

    NASA Technical Reports Server (NTRS)

    Raman, Sanjay; Gauthier, Gildas P.; Rebeiz, Gabriel M.

    1997-01-01

    Uniplanar slot-type antennas such as coplanar waveguide fed single- and dual-polarized slot-ring antennas and double folded-slot antennas are characterized using a millimeter-wave network analyzer and on-wafer measurement techniques. The antennas are designed to be mounted on a dielectric lens to minimize power loss into substrate modes and realize high-gain antenna patterns. On-wafer measurements are performed by placing the antenna wafer on a thick dielectric spacer of similar e(sub t) and eliminating the reflection from the probe station chuck with time-domain gating. The measured results agree well with method-of-moments simulations.

  10. Investigation of radiation hardened SOI wafer fabricated by ion-cut technique

    NASA Astrophysics Data System (ADS)

    Chang, Yongwei; Wei, Xing; Zhu, Lei; Su, Xin; Gao, Nan; Dong, Yemin

    2018-07-01

    Total ionizing dose (TID) effect on Silicon-on-Insulator (SOI) wafers due to inherent buried oxide (BOX) is a significant concern as it leads to the degradation of electrical properties of SOI-based devices and circuits, even failures of the systems associated with them. This paper reports the radiation hardening implementation of SOI wafer fabricated by ion-cut technique integrated with low-energy Si+ implantation. The electrical properties and radiation response of pseudo-MOS transistors are analyzed. The results demonstrate that the hardening process can significantly improve the TID tolerance of SOI wafers by generating Si nanocrystals (Si-NCs) within the BOX. The presence of Si-NCs created through Si+ implantation is evidenced by high-resolution transmission electron microscopy (HR-TEM). Under the pass gate (PG) irradiation bias, the anti-radiation properties of H-gate SOI nMOSFETs suggest that the radiation hardened SOI wafers with optimized Si implantation dose can perform effectively in a radiation environment. The radiation hardening process provides an excellent way to reinforce the TID tolerance of SOI wafers.

  11. Integration of an Axcelis Optima HD Single Wafer High Current Implanter for p- and n-S/D Implants in an Existing Batch Implanter Production Line

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Schmeide, Matthias; Kontratenko, Serguei; Krimbacher, Bernhard

    2008-11-03

    This paper is focused on the integration and qualification of an Axcelis Optima HD single wafer high current spot beam implanter in an existing 200 mm production line with different types of Axcelis batch implanters for high current applications. Both the design of the beamline and the beam shape are comparable between single wafer and batch high current spot beam implanters. In contrast to the single wafer high current ribbon beam implanter, energy contamination is not a concern for the considered spot beam tool because the drift mode can be used down to energies in the 2 keV region. Themore » most important difference between single wafer and batch high current implanters is the significantly higher dose rate and, therefore, the higher damage rate for the single wafer tool due to the different scanning architecture. The results of the integration of high dose implantations, mainly for p- and n-S/D formation, for DRAM 110 nm without pre-amorphization implantation (PAI), CMOS Logic from around 250 nm down to 90 nm without and with PAI, are presented and discussed. Dopant concentration profile analysis using SIMS was performed for different technologies and implantation conditions. The impurity activation was measured using sheet resistance and in some cases spreading resistance technique was applied. The amorphous layer thickness was measured using TEM. Finally, device data are presented in combination with dose, energy and beam current variations. The results have shown that the integration of implantation processes into crystalline structure without PAI is more complex and time consuming than implantations into amorphous layer where the damage difference due to the different dose rates is negligible.« less

  12. Applications of colored petri net and genetic algorithms to cluster tool scheduling

    NASA Astrophysics Data System (ADS)

    Liu, Tung-Kuan; Kuo, Chih-Jen; Hsiao, Yung-Chin; Tsai, Jinn-Tsong; Chou, Jyh-Horng

    2005-12-01

    In this paper, we propose a method, which uses Coloured Petri Net (CPN) and genetic algorithm (GA) to obtain an optimal deadlock-free schedule and to solve re-entrant problem for the flexible process of the cluster tool. The process of the cluster tool for producing a wafer usually can be classified into three types: 1) sequential process, 2) parallel process, and 3) sequential parallel process. But these processes are not economical enough to produce a variety of wafers in small volume. Therefore, this paper will propose the flexible process where the operations of fabricating wafers are randomly arranged to achieve the best utilization of the cluster tool. However, the flexible process may have deadlock and re-entrant problems which can be detected by CPN. On the other hand, GAs have been applied to find the optimal schedule for many types of manufacturing processes. Therefore, we successfully integrate CPN and GAs to obtain an optimal schedule with the deadlock and re-entrant problems for the flexible process of the cluster tool.

  13. Multi-wire slurry wafering demonstrations. [slicing silicon ingots for solar arrays

    NASA Technical Reports Server (NTRS)

    Chen, C. P.

    1978-01-01

    Ten slicing demonstrations on a multi-wire slurry saw, made to evaluate the silicon ingot wafering capabilities, reveal that the present sawing capabilities can provide usable wafer area from an ingot 1.05m/kg (e.g. kerf width 0.135 mm and wafer thickness 0.265 mm). Satisfactory surface qualities and excellent yield of silicon wafers were found. One drawback is that the add-on cost of producing water from this saw, as presently used, is considerably higher than other systems being developed for the low-cost silicon solar array project (LSSA), primarily because the saw uses a large quantity of wire. The add-on cost can be significantly reduced by extending the wire life and/or by rescue of properly plated wire to restore the diameter.

  14. High frequency guided wave propagation in monocrystalline silicon wafers

    NASA Astrophysics Data System (ADS)

    Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

    2017-04-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full three-dimensional Finite Element simulations of the guided wave propagation were conducted to visualize and quantify these effects for a line source. The phase velocity (slowness) and skew angle of the two fundamental Lamb wave modes (first anti-symmetric mode A0 and first symmetric mode S0) for varying propagation directions relative to the crystal orientation were measured experimentally. Selective mode excitation was achieved using a contact piezoelectric transducer with a custom-made wedge and holder to achieve a controlled contact pressure. The out-of-plane component of the guided wave propagation was measured using a noncontact laser interferometer. Good agreement was found with the simulation results and theoretical predictions based on nominal material properties of the silicon wafer.

  15. Some Inspection Methods for Quality Control and In-service Inspection of GLARE

    NASA Astrophysics Data System (ADS)

    Sinke, J.

    2003-07-01

    Quality control of materials and structures is an important issue, also for GLARE. During the manufacturing stage the processes and materials should be monitored and checked frequently in order to obtain a qualified product. During the operation of the aircraft, frequent monitoring and inspections are performed to maintain the quality at a prescribed level. Therefore, in-service inspection methods are applied, and when necessary repair activities are conducted. For the quality control of the GLARE panels and components during manufacturing, the C-scan method proves to be an effective tool. For in-service inspection the Eddy Current Method is one of the suitable options. In this paper a brief overview is presented of both methods and their application on GLARE products.

  16. Wafer-scale synthesis of monolayer and few-layer MoS2 via thermal vapor sulfurization

    NASA Astrophysics Data System (ADS)

    Robertson, John; Liu, Xue; Yue, Chunlei; Escarra, Matthew; Wei, Jiang

    2017-12-01

    Monolayer molybdenum disulfide (MoS2) is an atomically thin, direct bandgap semiconductor crystal potentially capable of miniaturizing optoelectronic devices to an atomic scale. However, the development of 2D MoS2-based optoelectronic devices depends upon the existence of a high optical quality and large-area monolayer MoS2 synthesis technique. To address this need, we present a thermal vapor sulfurization (TVS) technique that uses powder MoS2 as a sulfur vapor source. The technique reduces and stabilizes the flow of sulfur vapor, enabling monolayer wafer-scale MoS2 growth. MoS2 thickness is also controlled with great precision; we demonstrate the ability to synthesize MoS2 sheets between 1 and 4 layers thick, while also showing the ability to create films with average thickness intermediate between integer layer numbers. The films exhibit wafer-scale coverage and uniformity, with electrical quality varying depending on the final thickness of the grown MoS2. The direct bandgap of grown monolayer MoS2 is analyzed using internal and external photoluminescence quantum efficiency. The photoluminescence quantum efficiency is shown to be competitive with untreated exfoliated MoS2 monolayer crystals. The ability to consistently grow wafer-scale monolayer MoS2 with high optical quality makes this technique a valuable tool for the development of 2D optoelectronic devices such as photovoltaics, detectors, and light emitters.

  17. Non-contact defect diagnostics in Cz-Si wafers using resonance ultrasonic vibrations

    NASA Astrophysics Data System (ADS)

    Belyaev, A.; Kochelap, V. A.; Tarasov, I.; Ostapenko, S.

    2001-01-01

    A new resonance effect of generation of sub-harmonic acoustic vibrations was applied to characterize defects in as-grown and processed Cz-Si wafers. Ultrasonic vibrations were generated into standard 8″ wafers using an external ultrasonic transducer and their amplitude recorded in a non-contact mode using a scanning acoustic probe. By tuning the frequency, f, of the transducer we observed generation of intense sub-harmonic acoustic mode ("whistle" or w-mode) with f/2 frequency. The characteristics of the w-mode-amplitude dependence, frequency scans, spatial distribution allow a clear distinction versus harmonic vibrations of the same wafer. The origin of sub-harmonic vibrations observed on 8″ Cz-Si wafers is attributed to a parametric resonance of flexural vibrations in thin silicon circular plates. We present evidence that "whistle" effect shows a strong dependence on the wafer's growth and processing history and can be used for quality assurance purposes.

  18. A front-end wafer-level microsystem packaging technique with micro-cap array

    NASA Astrophysics Data System (ADS)

    Chiang, Yuh-Min

    2002-09-01

    The back-end packaging process is the remaining challenge for the micromachining industry to commercialize microsystem technology (MST) devices at low cost. This dissertation presents a novel wafer level protection technique as a final step of the front-end fabrication process for MSTs. It facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array, which consists of an assortment of small caps micro-molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments during packaging. The micro-cap array is first constructed by a micromachining process with micro-molding technique, then sealed to the device wafer at wafer level. Epoxy-based wafer-level micro cap array has been successfully fabricated and showed good compatibility with conventional back-end packaging processes. An adhesive transfer technique was demonstrated to seal the micro cap array with a MEMS device wafer. No damage or gross leak was observed while wafer dicing or later during a gross leak test. Applications of the micro cap array are demonstrated on MEMS, microactuators fabricated using CRONOS MUMPS process. Depending on the application needs, the micro-molded cap can be designed and modified to facilitate additional component functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. Successful fabrication of a micro cap array comprised with microlenses can provide active functions as well as passive protection. An optical tweezer array could be one possibility for applications of a micro cap with microlenses. The micro cap itself could serve as micro well for DNA or bacteria amplification as well.

  19. Wafer-scale plasmonic and photonic crystal sensors

    NASA Astrophysics Data System (ADS)

    George, M. C.; Liu, J.-N.; Farhang, A.; Williamson, B.; Black, M.; Wangensteen, T.; Fraser, J.; Petrova, R.; Cunningham, B. T.

    2015-08-01

    200 mm diameter wafer-scale fabrication, metrology, and optical modeling results are reviewed for surface plasmon resonance (SPR) sensors based on 2-D metallic nano-dome and nano-hole arrays (NHA's) as well as 1-D photonic crystal sensors based on a leaky-waveguide mode resonance effect, with potential applications in label free sensing, surface enhanced Raman spectroscopy (SERS), and surface-enhanced fluorescence spectroscopy (SEFS). Potential markets include micro-arrays for medical diagnostics, forensic testing, environmental monitoring, and food safety. 1-D and 2-D nanostructures were fabricated on glass, fused silica, and silicon wafers using optical lithography and semiconductor processing techniques. Wafer-scale optical metrology results are compared to FDTD modeling and presented along with application-based performance results, including label-free plasmonic and photonic crystal sensing of both surface binding kinetics and bulk refractive index changes. In addition, SEFS and SERS results are presented for 1-D photonic crystal and 2-D metallic nano-array structures. Normal incidence transmittance results for a 550 nm pitch NHA showed good bulk refractive index sensitivity, however an intensity-based design with 665 nm pitch was chosen for use as a compact, label-free sensor at both 650 and 632.8 nm wavelengths. The optimized NHA sensor gives an SPR shift of about 480 nm per refractive index unit when detecting a series of 0-40% glucose solutions, but according to modeling shows about 10 times greater surface sensitivity when operating at 532 nm. Narrow-band photonic crystal resonance sensors showed quality factors over 200, with reasonable wafer-uniformity in terms of both resonance position and peak height.

  20. Lamb wave propagation in monocrystalline silicon wafers.

    PubMed

    Fromme, Paul; Pizzolato, Marco; Robyr, Jean-Luc; Masserey, Bernard

    2018-01-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness and beam skewing of the two fundamental Lamb wave modes A 0 and S 0 were investigated. Experimental measurements using contact wedge transducer excitation and laser measurement were conducted. Good agreement was found between the theoretically calculated angular dependency of the phase slowness and measurements for different propagation directions relative to the crystal orientation. Significant wave skew and beam widening was observed experimentally due to the anisotropy, especially for the S 0 mode. Explicit finite element simulations were conducted to visualize and quantify the guided wave beam skew. Good agreement was found for the A 0 mode, but a systematic discrepancy was observed for the S 0 mode. These effects need to be considered for the non-destructive testing of wafers using guided waves.

  1. Manifold tool guide

    DOEpatents

    Djordjevic, A.

    1982-07-08

    A tool guide that makes possible the insertion of cleaning and/or inspection tools into a manifold pipe that will dislocate and extract the accumulated sediment in such manifold pipes. The tool guide basically comprises a right angled tube (or other angled tube as required) which can be inserted in a large tube and locked into a radially extending cross pipe by adjustable spacer rods and a spring-loaded cone, whereby appropriate cleaning tools can be inserted into to cross pipe for cleaning, inspection, etc.

  2. Manifold tool guide

    DOEpatents

    Djordjevic, Aleksandar

    1983-12-27

    A tool guide that makes possible the insertion of cleaning and/or inspection tools into a manifold pipe that will dislocate and extract the accumulated sediment in such manifold pipes. The tool guide basically comprises a right angled tube (or other angled tube as required) which can be inserted in a large tube and locked into a radially extending cross pipe by adjustable spacer rods and a spring-loaded cone, whereby appropriate cleaning tools can be inserted into to cross pipe for cleaning, inspection, etc.

  3. Replica-based Crack Inspection

    NASA Technical Reports Server (NTRS)

    Newman, John A.; Smith, Stephen W.; Piascik, R. S.; Willard, Scott A.; Dawicke, David S.

    2007-01-01

    A surface replica-based crack inspection method has recently been developed for use in Space Shuttle main engine (SSME) hydrogen feedline flowliners. These flowliners exist to ensure favorable flow of liquid hydrogen over gimble joint bellows, and consist of two rings each containing 38 elongated slots. In the summer of 2002, multiple cracks ranging from 0.1 inches to 0.6 inches long were discovered; each orbiter contained at least one cracked flowliner. These long cracks were repaired and eddy current inspections ensured that no cracks longer than 0.075 inches were present. However, subsequent fracture-mechanics review of flight rationale required detection of smaller cracks, and was the driving force for development of higher-resolution inspection method. Acetate tape surface replicas have been used for decades to detect and monitor small cracks. However, acetate tape replicas have primarily been limited to laboratory specimens because complexities involved in making these replicas - requiring acetate tape to be dissolved with acetone - are not well suited for a crack inspection tool. More recently developed silicon-based replicas are better suited for use as a crack detection tool. A commercially available silicon-based replica product has been determined to be acceptable for use in SSME hydrogen feedlines. A method has been developed using this product and a scanning electron microscope for analysis, which can find cracks as small as 0.005 inches and other features (e.g., pits, scratches, tool marks, etc.) as small as 0.001 inches. The resolution of this method has been validated with dozens of cracks generated in a laboratory setting and this method has been used to locate 55 cracks (ranging in size from 0.040 inches to 0.004 inches) on space flight hardware. These cracks were removed by polishing away the cracked material and a second round of replicas confirmed the repair.

  4. Method and Apparatus for Obtaining a Precision Thickness in Semiconductor and Other Wafers

    NASA Technical Reports Server (NTRS)

    Okojie, Robert S. (Inventor)

    2002-01-01

    A method and apparatus for processing a wafer comprising a material selected from an electrical semiconducting material and an electrical insulating material is presented. The wafer has opposed generally planar front and rear sides and a peripheral edge, wherein said wafer is pressed against a pad in the presence of a slurry to reduce its thickness. The thickness of the wafer is controlled by first forming a recess such as a dimple on the rear side of the wafer. A first electrical conducting strip extends from a first electrical connection means to the base surface of the recess to the second electrical connector. The first electrical conducting strip overlies the base surface of the recess. There is also a second electrical conductor with an electrical potential source between the first electrical connector and the second electrical connector to form. In combination with the first electrical conducting strip, the second electrical conductor forms a closed electrical circuit, and an electrical current flows through the closed electrical circuit. From the front side of the wafer the initial thickness of the wafer is reduced by lapping until the base surface of the recess is reached. The conductive strip is at least partially removed from the base surface to automatically stop the lapping procedure and thereby achieve the desired thickness.

  5. Microwave Induced Direct Bonding of Single Crystal Silicon Wafers

    NASA Technical Reports Server (NTRS)

    Budraa, N. K.; Jackson, H. W.; Barmatz, M.

    1999-01-01

    We have heated polished doped single-crystal silicon wafers in a single mode microwave cavity to temperatures where surface to surface bonding occurred. The absorption of microwaves and heating of the wafers is attributed to the inclusion of n-type or p-type impurities into these substrates. A cylindrical cavity TM (sub 010) standing wave mode was used to irradiate samples of various geometry's at positions of high magnetic field. This process was conducted in vacuum to exclude plasma effects. This initial study suggests that the inclusion of impurities in single crystal silicon significantly improved its microwave absorption (loss factor) to a point where heating silicon wafers directly can be accomplished in minimal time. Bonding of these substrates, however, occurs only at points of intimate surface to surface contact. The inclusion of a thin metallic layer on the surfaces enhances the bonding process.

  6. Cost of ownership for inspection equipment

    NASA Astrophysics Data System (ADS)

    Dance, Daren L.; Bryson, Phil

    1993-08-01

    Cost of Ownership (CoO) models are increasingly a part of the semiconductor equipment evaluation and selection process. These models enable semiconductor manufacturers and equipment suppliers to quantify a system in terms of dollars per wafer. Because of the complex nature of the semiconductor manufacturing process, there are several key attributes that must be considered in order to accurately reflect the true 'cost of ownership'. While most CoO work to date has been applied to production equipment, the need to understand cost of ownership for inspection and metrology equipment presents unique challenges. Critical parameters such as detection sensitivity as a function of size and type of defect are not included in current CoO models yet are, without question, major factors in the technical evaluation process and life-cycle cost. This paper illustrates the relationship between these parameters, as components of the alpha and beta risk, and cost of ownership.

  7. Automated Array Assembly Task In-depth Study of Silicon Wafer Surface Texturizing

    NASA Technical Reports Server (NTRS)

    Jones, G. T.; Chitre, S.; Rhee, S. S.; Allison, K. L.

    1979-01-01

    A low cost wafer surface texturizing process was studied. An investigation of low cost cleaning operations to clean residual wax and organics from the surface of silicon wafers was made. The feasibility of replacing dry nitrogen with clean dry air for drying silicon wafers was examined. The two stage texturizing process was studied for the purpose of characterizing relevant parameters in large volume applications. The effect of gettering solar cells on photovoltaic energy conversion efficiency is described.

  8. Manifold tool guide

    DOEpatents

    Djordjevic, A.

    1983-12-27

    A tool guide is described that makes possible the insertion of cleaning and/or inspection tools into a manifold pipe that will dislocate and extract the accumulated sediment in such manifold pipes. The tool guide basically comprises a right angled tube (or other angled tube as required) which can be inserted in a large tube and locked into a radially extending cross pipe by adjustable spacer rods and a spring-loaded cone, whereby appropriate cleaning tools can be inserted into the cross pipe for cleaning, inspection, etc. 3 figs.

  9. Warpage Measurement of Thin Wafers by Reflectometry

    NASA Astrophysics Data System (ADS)

    Ng, Chi Seng; Asundi, Anand Krishna

    To cope with advances in the electronic and portable devices, electronic packaging industries have employed thinner and larger wafers to produce thinner packages/ electronic devices. As the thickness of the wafer decrease (below 250um), there is an increased tendency for it to warp. Large stresses are induced during manufacturing processes, particularly during backside metal deposition. The wafers bend due to these stresses. Warpage results from the residual stress will affect subsequent manufacturing processes. For example, warpage due to this residual stresses lead to crack dies during singulation process which will severely reorient the residual stress distributions, thus, weakening the mechanical and electrical properties of the singulated die. It is impossible to completely prevent the residual stress induced on thin wafers during the manufacturing processes. Monitoring of curvature/flatness is thus necessary to ensure reliability of device and its uses. A simple whole-field curvature measurement system using a novel computer aided phase shift reflection grating method has been developed and this project aims to take it to the next step for residual stress and full field surface shape measurement. The system was developed from our earlier works on Computer Aided Moiré Methods and Novel Techniques in Reflection Moiré, Experimental Mechanics (1994) in which novel structured light approach was shown for surface slope and curvature measurement. This method uses similar technology but coupled with a novel phase shift system to accurately measure slope and curvature. In this study, slope of the surface were obtain using the versatility of computer aided reflection grating method to manipulate and generate gratings in two orthogonal directions. The curvature and stress can be evaluated by performing a single order differentiation on slope data.

  10. Engineering Controlled Spalling in (100)-Oriented GaAs for Wafer Reuse

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sweet, Cassi A.; McNeely, Joshua E.; Gorman, Brian

    Controlled spalling offers a way to cleave thin, single-crystal films or devices from wafers, particularly if the fracture planes in the material are oriented parallel to the wafer surface. Unfortunately, misalignment between the favored fracture planes and the wafer surface preferred for photovoltaic growth in (100)-oriented GaAs produces a highly faceted surface when subject to controlled spalling. This highly faceted cleavage surface is problematic in several ways: (1) it can result in large variations of spall depth due to unstable crack propagation; (2) it may introduce defects into the device zone or underlying substrate; and (3) it consumes many micronsmore » of material outside of the device zone. We present the ways in which we have engineered controlled spalling for (100)-oriented GaAs to minimize these effects. We expand the operational window for controlled spalling to avoid spontaneous spalling, find no evidence of dislocation activity in the spalled film or the parent wafer, and reduce facet height and facet height irregularity. Resolving these issues provides a viable path forward for reducing III-V device cost through the controlled spalling of (100)-oriented GaAs devices and subsequent wafer reuse when these processes are combined with a high-throughput growth method such as Hydride Vapor Phase Epitaxy.« less

  11. Comparison on mechanical properties of heavily phosphorus- and arsenic-doped Czochralski silicon wafers

    NASA Astrophysics Data System (ADS)

    Yuan, Kang; Sun, Yuxin; Lu, Yunhao; Liang, Xingbo; Tian, Daxi; Ma, Xiangyang; Yang, Deren

    2018-04-01

    Heavily phosphorus (P)- and arsenic (As)-doped Czochralski silicon (CZ-Si) wafers generally act as the substrates for the epitaxial silicon wafers used to fabricate power and communication devices. The mechanical properties of such two kinds of n-type heavily doped CZ silicon wafers are vital to ensure the quality of epitaxial silicon wafers and the manufacturing yields of devices. In this work, the mechanical properties including the hardness, Young's modulus, indentation fracture toughness and the resistance to dislocation motion have been comparatively investigated for heavily P- and As-doped CZ-Si wafers. It is found that heavily P-doped CZ-Si possesses somewhat higher hardness, lower Young's modulus, larger indentation fracture toughness and stronger resistance to dislocation motion than heavily As-doped CZ-Si. The mechanisms underlying this finding have been tentatively elucidated by considering the differences in the doping effects of P and As in silicon.

  12. InP-based photonic integrated circuit platform on SiC wafer.

    PubMed

    Takenaka, Mitsuru; Takagi, Shinichi

    2017-11-27

    We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

  13. Curvature evolution of 200 mm diameter GaN-on-insulator wafer fabricated through metalorganic chemical vapor deposition and bonding

    NASA Astrophysics Data System (ADS)

    Zhang, Li; Lee, Kwang Hong; Kadir, Abdul; Wang, Yue; Lee, Kenneth E.; Tan, Chuan Seng; Chua, Soo Jin; Fitzgerald, Eugene A.

    2018-05-01

    Crack-free 200 mm diameter N-polar GaN-on-insulator (GaN-OI) wafers are demonstrated by the transfer of metalorganic chemical vapor deposition (MOCVD)-grown Ga-polar GaN layers from Si(111) wafers onto SiO2/Si(100) wafers. The wafer curvature of the GaN-OI wafers after the removal of the original Si(111) substrate is correlated with the wafer curvature of the starting GaN-on-Si wafers and the voids on the GaN-on-Si surface that evolve into cracks on the GaN-OI wafers. In crack-free GaN-OI wafers, the wafer curvature during the removal of the AlN nucleation layer, AlGaN strain-compensation buffer layers and GaN layers is correlated with the residual stress distribution within individual layers in the GaN-OI wafer.

  14. Surface scanning inspection system particle detection dependence on aluminum film morphology

    NASA Astrophysics Data System (ADS)

    Prater, Walter; Tran, Natalie; McGarvey, Steve

    2012-03-01

    Physical vapor deposition (PVD) aluminum films present unique challenges when detecting particulate defects with a Surface Scanning Inspection System (SSIS). Aluminum (Al) films 4500Å thick were deposited on 300mm particle grade bare Si wafers at two temperatures using a Novellus Systems INOVA® NExT,.. Film surface roughness and morphology measurements were performed using a Veeco Vx310® atomic force microscope (AFM). AFM characterization found the high deposition temperature (TD) Al roughness (Root Mean Square 16.5 nm) to be five-times rougher than the low-TD Al roughness (rms 3.7 nm). High-TD Al had grooves at the grain boundaries that were measured to be 20 to 80 nm deep. Scanning electron microscopy (SEM) examination, with a Hitachi RS6000 defect review SEM, confirmed the presence of pronounced grain grooves. SEM images established that the low-TD filmed wafers have fine grains (0.1 to 0.3 um diameter) and the high-TD film wafers have fifty-times larger equiaxed plateletshape grains (5 to 15 um diameter). Calibrated Poly-Styrene Latex (PSL) spheres ranging in size from 90 nm to 1 μm were deposited in circular patterns on the wafers using an aerosol deposition chamber. PSL sphere depositions at each spot were controlled to yield 2000 to 5000 counts. A Hitachi LS9100® dark field full wafer SSIS was used to experimentally determine the relationship of the PSL sphere scattered light intensity with S-polarized light, a measure of scattering cross-section, with respect to the calibrated PSL sphere diameter. Comparison of the SSIS scattered light versus PSL spot size calibration curves shows two distinct differences. Scattering cross-section (intensity) of the PSL spheres increased on the low-TD Al film with smooth surface roughness and the low-TD Al film defect detection sensitivity was 126 nm compared to 200 nm for the rougher high- TD Al film. This can be explained by the higher signal to noise attributed to the smooth low-TD Al. Dark field defect detection on

  15. Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves

    NASA Astrophysics Data System (ADS)

    Ju, Yang; Inoue, Kojiro; Saka, Masumi; Abe, Hiroyuki

    2002-11-01

    We present a method for quantitative measurement of electrical conductivity of semiconductor wafers in a contactless fashion by using millimeter waves. A focusing sensor was developed to focus a 110 GHz millimeter wave beam on the surface of a silicon wafer. The amplitude and the phase of the reflection coefficient of the millimeter wave signal were measured by which electrical conductivity of the wafer was determined quantitatively, independent of the permittivity and thickness of the wafers. The conductivity obtained by this method agrees well with that measured by the conventional four-point-probe method.

  16. The Effectiveness of Sanitary Inspections as a Risk Assessment Tool for Thermotolerant Coliform Bacteria Contamination of Rural Drinking Water: A Review of Data from West Bengal, India

    PubMed Central

    Snoad, Christian; Nagel, Corey; Bhattacharya, Animesh; Thomas, Evan

    2017-01-01

    The use of sanitary inspections combined with periodic water quality testing has been recommended in some cases as screening tools for fecal contamination. We conducted sanitary inspections and tested for thermotolerant coliforms (TTCs), a fecal indicator bacteria, among 7,317 unique water sources in West Bengal, India. Our results indicate that the sanitary inspection score has poor ability to identify TTC-contaminated sources. Among deep and shallow hand pumps, the area under curve (AUC) for prediction of TTC > 0 was 0.58 (95% confidence interval [CI] = 0.53–0.61) and 0.58 (95% CI = 0.54–0.62), respectively, indicating that the sanitary inspection score was only marginally better than chance in discriminating between contaminated and uncontaminated sources of this type. A slightly higher AUC value of 0.64 (95% CI=0.57–0.71) was observed when the sanitary inspection score was used for prediction of TTC > 0 among the gravity-fed piped sources. Among unprotected springs (AUC = 0.48, 95% CI = 0.38–0.55) and unprotected dug wells (AUC = 0.41, 95% CI = 0.20–0.66), the sanitary inspection score performed more poorly than chance in discriminating between sites with TTC < 1 and TTC > 0. Aggregating over all source types, the sensitivity (true positive rate) of a high/very high sanitary inspection score for TTC contamination (TTC > 1 CFU/100 mL) was 29.4% and the specificity (true negative rate) was 77.9%, resulting in substantial misclassification of the sites when using the established risk categories. These findings suggest that sanitary surveys are inappropriate screening tools for identifying TTC contamination at water points. PMID:28115676

  17. The Effectiveness of Sanitary Inspections as a Risk Assessment Tool for Thermotolerant Coliform Bacteria Contamination of Rural Drinking Water: A Review of Data from West Bengal, India.

    PubMed

    Snoad, Christian; Nagel, Corey; Bhattacharya, Animesh; Thomas, Evan

    2017-04-01

    AbstractThe use of sanitary inspections combined with periodic water quality testing has been recommended in some cases as screening tools for fecal contamination. We conducted sanitary inspections and tested for thermotolerant coliforms (TTCs), a fecal indicator bacteria, among 7,317 unique water sources in West Bengal, India. Our results indicate that the sanitary inspection score has poor ability to identify TTC-contaminated sources. Among deep and shallow hand pumps, the area under curve (AUC) for prediction of TTC > 0 was 0.58 (95% confidence interval [CI] = 0.53-0.61) and 0.58 (95% CI = 0.54-0.62), respectively, indicating that the sanitary inspection score was only marginally better than chance in discriminating between contaminated and uncontaminated sources of this type. A slightly higher AUC value of 0.64 (95% CI=0.57-0.71) was observed when the sanitary inspection score was used for prediction of TTC > 0 among the gravity-fed piped sources. Among unprotected springs (AUC = 0.48, 95% CI = 0.38-0.55) and unprotected dug wells (AUC = 0.41, 95% CI = 0.20-0.66), the sanitary inspection score performed more poorly than chance in discriminating between sites with TTC < 1 and TTC > 0. Aggregating over all source types, the sensitivity (true positive rate) of a high/very high sanitary inspection score for TTC contamination (TTC > 1 CFU/100 mL) was 29.4% and the specificity (true negative rate) was 77.9%, resulting in substantial misclassification of the sites when using the established risk categories. These findings suggest that sanitary surveys are inappropriate screening tools for identifying TTC contamination at water points.

  18. 1366 Project Automate: Enabling Automation for <$0.10/W High-Efficiency Kerfless Wafers Manufactured in the US

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lorenz, Adam

    For photovoltaic (PV) manufacturing to thrive in the U.S., there must be an innovative core to the technology. Project Automate builds on 1366’s proprietary Direct Wafer® kerfless wafer technology and aims to unlock the cost and efficiency advantages of thin kerfless wafers. Direct Wafer is an innovative, U.S.-friendly (efficient, low-labor content) manufacturing process that addresses the main cost barrier limiting silicon PV cost-reductions – the 35-year-old grand challenge of manufacturing quality wafers (40% of the cost of modules) without the cost and waste of sawing. This simple, scalable process will allow 1366 to manufacture “drop-in” replacement wafers for the $10more » billion silicon PV wafer market at 50% of the cost, 60% of the capital, and 30% of the electricity of conventional casting and sawing manufacturing processes. This SolarMat project developed the Direct Wafer processes’ unique capability to tailor the shape of wafers to simultaneously make thinner AND stronger wafers (with lower silicon usage) that enable high-efficiency cell architectures. By producing wafers with a unique target geometry including a thick border (which determines handling characteristics) and thin interior regions (which control light capture and electron transport and therefore determine efficiency), 1366 can simultaneously improve quality and lower cost (using less silicon).« less

  19. Surface etching technologies for monocrystalline silicon wafer solar cells

    NASA Astrophysics Data System (ADS)

    Tang, Muzhi

    With more than 200 GW of accumulated installations in 2015, photovoltaics (PV) has become an important green energy harvesting method. The PV market is dominated by solar cells made from crystalline silicon wafers. The engineering of the wafer surfaces is critical to the solar cell cost reduction and performance enhancement. Therefore, this thesis focuses on the development of surface etching technologies for monocrystalline silicon wafer solar cells. It aims to develop a more efficient alkaline texturing method and more effective surface cleaning processes. Firstly, a rapid, isopropanol alcohol free texturing method is successfully demonstrated to shorten the process time and reduce the consumption of chemicals. This method utilizes the special chemical properties of triethylamine, which can form Si-N bonds with wafer surface atoms. Secondly, a room-temperature anisotropic emitter etch-back process is developed to improve the n+ emitter passivation. Using this method, 19.0% efficient screen-printed aluminium back surface field solar cells are developed that show an efficiency gain of 0.15% (absolute) compared with conventionally made solar cells. Finally, state-of-the-art silicon surface passivation results are achieved using hydrogen plasma etching as a dry alternative to the classical hydrofluoric acid wet-chemical process. The effective native oxide removal and the hydrogenation of the silicon surface are shown to be the reasons for the excellent level of surface passivation achieved with this novel method.

  20. Low-temperature wafer-level gold thermocompression bonding: modeling of flatness deviations and associated process optimization for high yield and tough bonds

    NASA Astrophysics Data System (ADS)

    Stamoulis, Konstantinos; Tsau, Christine H.; Spearing, S. Mark

    2005-01-01

    Wafer-level, thermocompression bonding is a promising technique for MEMS packaging. The quality of the bond is critically dependent on the interaction between flatness deviations, the gold film properties and the process parameters and tooling used to achieve the bonds. The effect of flatness deviations on the resulting bond is investigated in the current work. The strain energy release rate associated with the elastic deformation required to overcome wafer bow is calculated. A contact yield criterion is used to examine the pressure and temperature conditions required to flatten surface roughness asperities in order to achieve bonding over the full apparent area. The results are compared to experimental data of bond yield and toughness obtained from four-point bend delamination testing and microscopic observations of the fractured surfaces. Conclusions from the modeling and experiments indicate that wafer bow has negligible effect on determining the variability of bond quality and that the well-bonded area is increased with increasing bonding pressure. The enhanced understanding of the underlying deformation mechanisms allows for a better controlled trade-off between the bonding pressure and temperature.

  1. Low-temperature wafer-level gold thermocompression bonding: modeling of flatness deviations and associated process optimization for high yield and tough bonds

    NASA Astrophysics Data System (ADS)

    Stamoulis, Konstantinos; Tsau, Christine H.; Spearing, S. Mark

    2004-12-01

    Wafer-level, thermocompression bonding is a promising technique for MEMS packaging. The quality of the bond is critically dependent on the interaction between flatness deviations, the gold film properties and the process parameters and tooling used to achieve the bonds. The effect of flatness deviations on the resulting bond is investigated in the current work. The strain energy release rate associated with the elastic deformation required to overcome wafer bow is calculated. A contact yield criterion is used to examine the pressure and temperature conditions required to flatten surface roughness asperities in order to achieve bonding over the full apparent area. The results are compared to experimental data of bond yield and toughness obtained from four-point bend delamination testing and microscopic observations of the fractured surfaces. Conclusions from the modeling and experiments indicate that wafer bow has negligible effect on determining the variability of bond quality and that the well-bonded area is increased with increasing bonding pressure. The enhanced understanding of the underlying deformation mechanisms allows for a better controlled trade-off between the bonding pressure and temperature.

  2. Advanced FTIR technology for the chemical characterization of product wafers

    NASA Astrophysics Data System (ADS)

    Rosenthal, P. A.; Bosch-Charpenay, S.; Xu, J.; Yakovlev, V.; Solomon, P. R.

    2001-01-01

    Advances in chemically sensitive diagnostic techniques are needed for the characterization of compositionally variable materials such as chemically amplified resists, low-k dielectrics and BPSG films on product wafers. In this context, Fourier Transform Infrared (FTIR) reflectance spectroscopy is emerging as a preferred technique to characterize film chemistry and composition, due to its non-destructive nature and excellent sensitivity to molecular bonds and free carriers. While FTIR has been widely used in R&D environments, its application to mainstream production metrology and process monitoring on product wafers has historically been limited. These limitations have been eliminated in a series of recent FTIR technology advances, which include the use of 1) new sampling optics, which suppress artifact backside reflections and 2) comprehensive model-based analysis. With these recent improvements, it is now possible to characterize films on standard single-side polished product wafers with much simpler training wafer sets and machine-independent calibrations. In this new approach, the chemistry of the films is tracked via the measured infrared optical constants as opposed to conventional absorbance measurements. The extracted spectral optical constants can then be reduced to a limited set of parameters for process control. This paper describes the application of this new FTIR methodology to the characterization of 1) DUV photoresists after various processing steps, 2) low-k materials of different types and after various curing conditions, and 3) doped glass BPSG films of various concentration and, for the first time, widely different thicknesses. Such measurements can be used for improved process control on actual product wafers.

  3. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    NASA Astrophysics Data System (ADS)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  4. Scanning electron microscope automatic defect classification of process induced defects

    NASA Astrophysics Data System (ADS)

    Wolfe, Scott; McGarvey, Steve

    2017-03-01

    With the integration of high speed Scanning Electron Microscope (SEM) based Automated Defect Redetection (ADR) in both high volume semiconductor manufacturing and Research and Development (R and D), the need for reliable SEM Automated Defect Classification (ADC) has grown tremendously in the past few years. In many high volume manufacturing facilities and R and D operations, defect inspection is performed on EBeam (EB), Bright Field (BF) or Dark Field (DF) defect inspection equipment. A comma separated value (CSV) file is created by both the patterned and non-patterned defect inspection tools. The defect inspection result file contains a list of the inspection anomalies detected during the inspection tools' examination of each structure, or the examination of an entire wafers surface for non-patterned applications. This file is imported into the Defect Review Scanning Electron Microscope (DRSEM). Following the defect inspection result file import, the DRSEM automatically moves the wafer to each defect coordinate and performs ADR. During ADR the DRSEM operates in a reference mode, capturing a SEM image at the exact position of the anomalies coordinates and capturing a SEM image of a reference location in the center of the wafer. A Defect reference image is created based on the Reference image minus the Defect image. The exact coordinates of the defect is calculated based on the calculated defect position and the anomalies stage coordinate calculated when the high magnification SEM defect image is captured. The captured SEM image is processed through either DRSEM ADC binning, exporting to a Yield Analysis System (YAS), or a combination of both. Process Engineers, Yield Analysis Engineers or Failure Analysis Engineers will manually review the captured images to insure that either the YAS defect binning is accurately classifying the defects or that the DRSEM defect binning is accurately classifying the defects. This paper is an exploration of the feasibility of the

  5. Characteristics of nanocomposites and semiconductor heterostructure wafers using THz spectroscopy

    NASA Astrophysics Data System (ADS)

    Altan, Hakan

    All optical, THz-Time Domain Spectroscopic (THz-TDS) methods were employed towards determining the electrical characteristics of Single Walled Carbon Nanotubes, Ion Implanted Si nanoclusters and Si1-xGe x, HFO2, SiO2 on p-type Si wafers. For the nanoscale composite materials, Visible Pump/THz Probe spectroscopy measurements were performed after observing that the samples were not sensitive to the THz radiation alone. The results suggest that the photoexcited nanotubes exhibit localized transport due to Lorentz-type photo-induced localized states from 0.2 to 0.7THz. The THz transmission is modeled through the photoexcited layer with an effective dielectric constant described by a Drude + Lorentz model and given by Maxwell-Garnett theory. Comparisons are made with other prevalent theories that describe electronic transport. Similar experiments were repeated for ion-implanted, 3-4nm Si nanoclusters in fused silica for which a similar behavior was observed. In addition, a change in reflection from Si1-xGex on Si, 200mm diameter semiconductor heterostructure wafers with 10% or 15% Ge content, was measured using THz-TDS methods. Drude model is utilized for the transmission/reflection measurements and from the reflection data the mobility of each wafer is estimated. Furthermore, the effect of high-kappa dielectric material (HfO2) on the electrical properties of p-type silicon wafers was characterized by utilizing non-contact, differential (pump-pump off) spectroscopic methods to differ between HfO2 and SiO 2 on Si wafers. The measurements are analyzed in two distinct transmission models, where one is an exact representation of the layered structure for each wafer and the other assumed that the response observed from the differential THz transmission was solely due to effects from interfacial traps between the dielectric layer and the substrate. The latter gave a more accurate picture of the carrier dynamics. From these measurements the effect of interfacial defects on

  6. Mechanical Properties of Photovoltaic Silicon in Relation to Wafer Breakage

    NASA Astrophysics Data System (ADS)

    Kulshreshtha, Prashant Kumar

    This thesis focuses on the fundamental understanding of stress-modified crack-propagation in photovoltaic (PV) silicon in relation to the critical issue of PV silicon "wafer breakage". The interactions between a propagating crack and impurities/defects/residual stresses have been evaluated for consequential fracture path in a thin PV Si wafer. To investigate the mechanism of brittle fracture in silicon, the phase transformations induced by elastic energy released at a propagating crack-tip have been evaluated by locally stressing the diamond cubic Si lattice using a rigid Berkovich nanoindenter tip (radius ≈50 nm). Unique pressure induced phase transformations and hardness variations have been then related to the distribution of precipitates (O, Cu, Fe etc.), and the local stresses in the wafer. This research demonstrates for the first time the "ductile-like fracture" in almost circular crack path that significantly deviates from its energetically favorable crystallographic [110](111) system. These large diameter (≈ 200 mm) Si wafers were sliced to less than 180 microm thickness from a Czochralski (CZ) ingot that was grown at faster than normal growth rates. The vacancy (vSi) driven precipitation of oxygen at enhanced thermal gradients in the wafer core develops large localized stresses (upto 100 MPa) which we evaluated using Raman spectral analysis. Additional micro-FTIR mapping and microscopic etch pit measurements in the wafer core have related the observed crack path deviations to the presence of concentric ring-like distributions of oxygen precipitates (OPs). To replicate these "real-world" breakage scenarios and provide better insight on crack-propagation, several new and innovative tools/devices/methods have been developed in this study. An accurate quantitative profiling of local stress, phase changes and load-carrying ability of Si lattice has been performed in the vicinity of the controlled micro-cracks created using micro-indentations to represent

  7. Wafer integrated micro-scale concentrating photovoltaics

    NASA Astrophysics Data System (ADS)

    Gu, Tian; Li, Duanhui; Li, Lan; Jared, Bradley; Keeler, Gordon; Miller, Bill; Sweatt, William; Paap, Scott; Saavedra, Michael; Das, Ujjwal; Hegedus, Steve; Tauke-Pedretti, Anna; Hu, Juejun

    2017-09-01

    Recent development of a novel micro-scale PV/CPV technology is presented. The Wafer Integrated Micro-scale PV approach (WPV) seamlessly integrates multijunction micro-cells with a multi-functional silicon platform that provides optical micro-concentration, hybrid photovoltaic, and mechanical micro-assembly. The wafer-embedded micro-concentrating elements is shown to considerably improve the concentration-acceptance-angle product, potentially leading to dramatically reduced module materials and fabrication costs, sufficient angular tolerance for low-cost trackers, and an ultra-compact optical architecture, which makes the WPV module compatible with commercial flat panel infrastructures. The PV/CPV hybrid architecture further allows the collection of both direct and diffuse sunlight, thus extending the geographic and market domains for cost-effective PV system deployment. The WPV approach can potentially benefits from both the high performance of multijunction cells and the low cost of flat plate Si PV systems.

  8. X-Ray Diffraction (XRD) Characterization Methods for Sigma=3 Twin Defects in Cubic Semiconductor (100) Wafers

    NASA Technical Reports Server (NTRS)

    Park, Yeonjoon (Inventor); Kim, Hyun Jung (Inventor); Skuza, Jonathan R. (Inventor); Lee, Kunik (Inventor); Choi, Sang Hyouk (Inventor); King, Glen C. (Inventor)

    2017-01-01

    An X-ray defraction (XRD) characterization method for sigma=3 twin defects in cubic semiconductor (100) wafers includes a concentration measurement method and a wafer mapping method for any cubic tetrahedral semiconductor wafers including GaAs (100) wafers and Si (100) wafers. The methods use the cubic semiconductor's (004) pole figure in order to detect sigma=3/{111} twin defects. The XRD methods are applicable to any (100) wafers of tetrahedral cubic semiconductors in the diamond structure (Si, Ge, C) and cubic zinc-blend structure (InP, InGaAs, CdTe, ZnSe, and so on) with various growth methods such as Liquid Encapsulated Czochralski (LEC) growth, Molecular Beam Epitaxy (MBE), Organometallic Vapor Phase Epitaxy (OMVPE), Czochralski growth and Metal Organic Chemical Vapor Deposition (MOCVD) growth.

  9. Thermal stress during RTP processes and its possible effect on the light induced degradation in Cz-Si wafers

    NASA Astrophysics Data System (ADS)

    Kouhlane, Yacine; Bouhafs, Djoudi; Khelifati, Nabil; Guenda, Abdelkader; Demagh, Nacer-Eddine; Demagh, Assia; Pfeiffer, Pierre; Mezghiche, Salah; Hetatache, Warda; Derkaoui, Fahima; Nasraoui, Chahinez; Nwadiaru, Ogechi Vivian

    2018-04-01

    In this study, the carrier lifetime variation of p-type boron-doped Czochralski silicon (Cz-Si) wafers was investigated after a direct rapid thermal processing (RTP). Two wafers were passivated by silicon nitride (SiNx:H) layers, deposited by a PECVD system on both surfaces. Then the wafers were subjected to an RTP cycle at a peak temperature of 620 °C. The first wafer was protected (PW) from the direct radiative heating of the RTP furnace by placing the wafer between two as-cut Cz-Si shield wafers during the heat processing. The second wafer was not protected (NPW) and followed the same RTP cycle procedure. The carrier lifetime τ eff was measured using the QSSPC technique before and after illumination for 5 h duration at 0.5 suns. The immediate results of the measured lifetime (τ RTP ) after the RTP process have shown a regeneration in the lifetime of the two wafers with the PW wafer exhibiting an important enhancement in τ RTP as compared to the NPW wafer. The QSSPC measurements have indicated a good stable lifetime (τ d ) and a weak degradation effect was observed in the case of the PW wafer as compared to their initial lifetime value. Interferometry technique analyses have shown an enhancement in the surface roughness for the NPW wafer as compared to the protected one. Additionally, to improve the correlation between the RTP heat radiation stress and the carrier lifetime behavior, a simulation of the thermal stress and temperature profile using the finite element method on the wafers surface at RTP peak temperature of 620 °C was performed. The results confirm the reduction of the thermal stress with less heat losses for the PW wafer. Finally, the proposed method can lead to improving the lifetime of wafers by an RTP process at minimum energy costs.

  10. Crystallographic Orientation Identification in Multicrystalline Silicon Wafers Using NIR Transmission Intensity

    NASA Astrophysics Data System (ADS)

    Skenes, Kevin; Kumar, Arkadeep; Prasath, R. G. R.; Danyluk, Steven

    2018-02-01

    Near-infrared (NIR) polariscopy is a technique used for the non-destructive evaluation of the in-plane stresses in photovoltaic silicon wafers. Accurate evaluation of these stresses requires correct identification of the stress-optic coefficient, a material property which relates photoelastic parameters to physical stresses. The material stress-optic coefficient of silicon varies with crystallographic orientation. This variation poses a unique problem when measuring stresses in multicrystalline silicon (mc-Si) wafers. This paper concludes that the crystallographic orientation of silicon can be estimated by measuring the transmission of NIR light through the material. The transmission of NIR light through monocrystalline wafers of known orientation were compared with the transmission of NIR light through various grains in mc-Si wafers. X-ray diffraction was then used to verify the relationship by obtaining the crystallographic orientations of these assorted mc-Si grains. Variation of transmission intensity for different crystallographic orientations is further explained by using planar atomic density. The relationship between transmission intensity and planar atomic density appears to be linear.

  11. Accurate characterization of wafer bond toughness with the double cantilever specimen

    NASA Astrophysics Data System (ADS)

    Turner, Kevin T.; Spearing, S. Mark

    2008-01-01

    The displacement loaded double cantilever test, also referred to as the "Maszara test" and the "crack opening method" by the wafer bonding community, is a common technique used to evaluate the interface toughness or surface energy of direct wafer bonds. While the specimen is widely used, there has been a persistent question as to the accuracy of the method since the actual specimen geometry differs from the ideal beam geometry assumed in the expression used for data reduction. The effect of conducting the test on whole wafer pairs, in which the arms of cantilevers are wide plates rather than slender beams, is examined in this work using finite element analysis. A model is developed to predict the equilibrium shape of the crack front and to develop a corrected expression for calculating interface toughness from crack length measurements obtained in tests conducted on whole wafer pairs. The finite element model, which is validated through comparison to experiments, demonstrates that using the traditional beam theory-based expressions for data reduction can lead to errors of up to 25%.

  12. Scatterometry on pelliclized masks: an option for wafer fabs

    NASA Astrophysics Data System (ADS)

    Gallagher, Emily; Benson, Craig; Higuchi, Masaru; Okumoto, Yasuhiro; Kwon, Michael; Yedur, Sanjay; Li, Shifang; Lee, Sangbong; Tabet, Milad

    2007-03-01

    Optical scatterometry-based metrology is now widely used in wafer fabs for lithography, etch, and CMP applications. This acceptance of a new metrology method occurred despite the abundance of wellestablished CD-SEM and AFM methods. It was driven by the desire to make measurements faster and with a lower cost of ownership. Over the last year, scatterometry has also been introduced in advanced mask shops for mask measurements. Binary and phase shift masks have been successfully measured at all desired points during photomask production before the pellicle is mounted. There is a significant benefit to measuring masks with the pellicle in place. From the wafer fab's perspective, through-pellicle metrology would verify mask effects on the same features that are characterized on wafer. On-site mask verification would enable quality control and trouble-shooting without returning the mask to a mask house. Another potential application is monitoring changes to mask films once the mask has been delivered to the fab (haze, oxide growth, etc.). Similar opportunities apply to the mask metrologist receiving line returns from a wafer fab. The ability to make line-return measurements without risking defect introduction is clearly attractive. This paper will evaluate the feasibility of collecting scatterometry data on pelliclized masks. We explore the effects of several different pellicle types on scatterometry measurements made with broadband light in the range of 320-780 nm. The complexity introduced by the pellicles' optical behavior will be studied.

  13. Very large scale heterogeneous integration (VLSHI) and wafer-level vacuum packaging for infrared bolometer focal plane arrays

    NASA Astrophysics Data System (ADS)

    Forsberg, Fredrik; Roxhed, Niclas; Fischer, Andreas C.; Samel, Björn; Ericsson, Per; Hoivik, Nils; Lapadatu, Adriana; Bring, Martin; Kittilsland, Gjermund; Stemme, Göran; Niklaus, Frank

    2013-09-01

    Imaging in the long wavelength infrared (LWIR) range from 8 to 14 μm is an extremely useful tool for non-contact measurement and imaging of temperature in many industrial, automotive and security applications. However, the cost of the infrared (IR) imaging components has to be significantly reduced to make IR imaging a viable technology for many cost-sensitive applications. This paper demonstrates new and improved fabrication and packaging technologies for next-generation IR imaging detectors based on uncooled IR bolometer focal plane arrays. The proposed technologies include very large scale heterogeneous integration for combining high-performance, SiGe quantum-well bolometers with electronic integrated read-out circuits and CMOS compatible wafer-level vacuum packing. The fabrication and characterization of bolometers with a pitch of 25 μm × 25 μm that are arranged on read-out-wafers in arrays with 320 × 240 pixels are presented. The bolometers contain a multi-layer quantum well SiGe thermistor with a temperature coefficient of resistance of -3.0%/K. The proposed CMOS compatible wafer-level vacuum packaging technology uses Cu-Sn solid-liquid interdiffusion (SLID) bonding. The presented technologies are suitable for implementation in cost-efficient fabless business models with the potential to bring about the cost reduction needed to enable low-cost IR imaging products for industrial, security and automotive applications.

  14. MiRNA-181d Expression Significantly Affects Treatment Responses to Carmustine Wafer Implantation.

    PubMed

    Sippl, Christoph; Ketter, Ralf; Bohr, Lisa; Kim, Yoo Jin; List, Markus; Oertel, Joachim; Urbschat, Steffi

    2018-05-26

    Standard therapeutic protocols for glioblastoma, the most aggressive type of brain cancer, include surgery followed by chemoradiotherapy. Additionally, carmustine-eluting wafers can be implanted locally into the resection cavity. To evaluate microRNA (miRNA)-181d as a prognostic marker of responses to carmustine wafer implantation. A total of 80 glioblastoma patients (40/group) were included in a matched pair analysis. One group (carmustine wafer group) received concomitant chemoradiotherapy with carmustine wafer implantation (Stupp protocol). The second group (control group) received only concomitant chemoradiotherapy. All tumor specimens were subjected to evaluations of miRNA-181d expression, results were correlated with further individual clinical data. The Cancer Genome Atlas (TCGA) dataset of 149 patients was used as an independent cohort to validate the results. Patients in the carmustine wafer group with low miRNA-181d expression had significantly longer overall (hazard ratio [HR], 35.03, [95% confidence interval (CI): 3.50-350.23], P = .002) and progression-free survival (HR, 20.23, [95% CI: 2.19-186.86], P = .008) than patients of the same group with a high miRNA-181d expression. These correlations were not observed in the control group. The nonsignificance in the control group was confirmed in the independent TCGA dataset. The carmustine wafer group patients with low miRNA-181d expression also had a significantly longer progression-free (P = .049) and overall survival (OS) (P = .034), compared with control group patients. Gross total resection correlated significantly with longer OS (P = .023). MiRNA-181d expression significantly affects treatment responses to carmustine wafer implantation.

  15. Grain-boundary type and distribution in silicon carbide coatings and wafers

    NASA Astrophysics Data System (ADS)

    Cancino-Trejo, Felix; López-Honorato, Eddie; Walker, Ross C.; Ferrer, Romelia Salomon

    2018-03-01

    Silicon carbide is the main diffusion barrier against metallic fission products in TRISO (tristructural isotropic) coated fuel particles. The explanation of the accelerated diffusion of silver through SiC has remained a challenge for more than four decades. Although, it is now well accepted that silver diffuse through SiC by grain boundary diffusion, little is known about the characteristics of the grain boundaries in SiC and how these change depending on the type of sample. In this work five different types (coatings and wafers) of SiC produced by chemical vapor deposition were characterized by electron backscatter diffraction (EBSD). The SiC in TRISO particles had a higher concentration of high angle grain boundaries (aprox. 70%) compared to SiC wafers, which ranged between 30 and 60%. Similarly, SiC wafers had a higher concentration of low angle grain boundaries ranging between 15 and 30%, whereas TRISO particles only reached values of around 7%. The same trend remained when comparing the content of coincidence site lattice (CSL) boundaries, since SiC wafers showed a concentration of more than 30%, whilst TRISO particles had contents of around 20%. In all samples the largest fractions of CSL boundaries (3 ≤ Σ ≤ 17) were the Σ3 boundaries. We show that there are important differences between the SiC in TRISO particles and SiC wafers which could explain some of the differences observed in diffusion experiments in the literature.

  16. Pipeline inspection using an autonomous underwater vehicle

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Egeskov, P.; Bech, M.; Bowley, R.

    1995-12-31

    Pipeline inspection can be carried out by means of small Autonomous Underwater Vehicles (AUVs), operating either with a control link to a surface vessel, or totally independently. The AUV offers an attractive alternative to conventional inspection methods where Remotely Operated Vehicles (ROVs) or paravanes are used. A flatfish type AUV ``MARTIN`` (Marine Tool for Inspection) has been developed for this purpose. The paper describes the proposed types of inspection jobs to be carried out by ``MARTIN``. The design and construction of the vessel, its hydrodynamic properties, its propulsion and control systems are discussed. The pipeline tracking and survey systems, asmore » well as the launch and recovery systems are described.« less

  17. The Design of a Multi-Agent NDE Inspection Qualification System

    NASA Astrophysics Data System (ADS)

    McLean, N.; McKenna, J. P.; Gachagan, A.; McArthur, S.; Hayward, G.

    2007-03-01

    A novel Multi-Agent system (MAS) for NDE inspection qualification is being developed to facilitate a scalable environment allowing integration and automation of new and existing inspection qualification tools. This paper discusses the advantages of using a MAS approach to integrate the large number of disparate NDE software tools. The design and implementation of the system architecture is described, including the development of an ontology to describe the NDE domain.

  18. Effect of nanoscale surface roughness on the bonding energy of direct-bonded silicon wafers

    NASA Astrophysics Data System (ADS)

    Miki, N.; Spearing, S. M.

    2003-11-01

    Direct wafer bonding of silicon wafers is a promising technology for manufacturing three-dimensional complex microelectromechanical systems as well as silicon-on-insulator substrates. Previous work has reported that the bond quality declines with increasing surface roughness, however, this relationship has not been quantified. This article explicitly correlates the bond quality, which is quantified by the apparent bonding energy, and the surface morphology via the bearing ratio, which describes the area of surface lying above a given depth. The apparent bonding energy is considered to be proportional to the real area of contact. The effective area of contact is defined as the area sufficiently close to contribute to the attractive force between the two bonding wafers. Experiments were conducted with silicon wafers whose surfaces were roughened by a buffered oxide etch solution (BOE, HF:NH4F=1:7) and/or a potassium hydroxide solution. The surface roughness was measured by atomic force microscopy. The wafers were direct bonded to polished "monitor" wafers following a standard RCA cleaning and the resulting bonding energy was measured by the crack-opening method. The experimental results revealed a clear correlation between the bonding energy and the bearing ratio. A bearing depth of ˜1.4 nm was found to be appropriate for the characterization of direct-bonded silicon at room temperature, which is consistent with the thickness of the water layer at the interface responsible for the hydrogen bonds that link the mating wafers.

  19. Fabrication of Total-Dose-Radiation-Hardened (TDRH) SOI wafer with embedded silicon nanoclusters

    NASA Astrophysics Data System (ADS)

    Wu, Aimin; Wang, Xi; Wei, Xing; Chen, Jing; Chen, Ming; Zhang, Zhengxuan

    2009-05-01

    Si ion-implantation and post annealing of silicon wafers prior to wafer bonding were used to radiation-harden the thermal oxide layer of Silicon on Insulator structures. After grinding and polishing, Total-Dose-Radiation-Hardened SOI (TDRH-SOI) wafers with several-micron-thick device layers were prepared. Electrical characterization before and after X-ray irradiation showed that the flatband voltage shift induced by irradiation was reduced by this preprocessing. Photoluminescence Spectroscopy (PL), Transmission Electron Microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) results indicated that the improvement of the total dose response of the TDRH-SOI wafer was associated with formation of Si nanoclusters in the implanted oxide layer, suggesting that these were the likely candidates for electron and proton trapping centers that reduce the positive charge buildup effect in the buried oxide.

  20. Ultrashort pulse laser dicing of thin Si wafers: the influence of laser-induced periodic surface structures on the backside breaking strength

    NASA Astrophysics Data System (ADS)

    Domke, Matthias; Egle, Bernadette; Piredda, Giovanni; Stroj, Sandra; Fasching, Gernot; Bodea, Marius; Schwarz, Elisabeth

    2016-11-01

    High power electronic chips are usually fabricated on about 50 µm thin Si wafers to improve heat dissipation. At these chip thicknesses mechanical dicing becomes challenging. Chippings may occur at the cutting edges, which reduce the mechanical stability of the die. Thermal load changes could then lead to sudden chip failure. Ultrashort pulsed lasers are a promising tool to improve the cutting quality, because thermal side effects can be reduced to a minimum. However, laser-induced periodic surface structures occur at the sidewalls and at the trench bottom during scribing. The goal of this study was to investigate the influence of these periodic structures on the backside breaking strength of the die. An ultrafast laser with a pulse duration of 380 fs and a wavelength of 1040 nm was used to cut a wafer into single chips. The pulse energy and the number of scans was varied. The cuts in the wafer were investigated using transmitted light microscopy, the sidewalls of the cut chips were investigated using scanning electron and confocal microscopy, and the breaking strength was evaluated using the 3-point bending test. The results indicated that periodic holes with a distance of about 20-30 µm were formed at the bottom of the trench, if the number of scans was set too low to completely cut the wafer; the wafer was only perforated. Mechanical breaking of the bridges caused 5 µm deep kerfs in the sidewall. These kerfs reduced the breaking strength at the backside of the chip to about 300 MPa. As the number of scans was increased, the bridges were ablated and the wafer was cut completely. Periodic structures were observed on the sidewall; the roughness was below 1 µm. The surface roughness remained on a constant level even when the number of scans was doubled. However, the periodic structures on the sidewall seemed to vanish and the probability to remove local flaws increases with the number of scans. As a consequence, the breaking strength was increased to about

  1. Efficiency Improvement of HIT Solar Cells on p-Type Si Wafers.

    PubMed

    Wei, Chun-You; Lin, Chu-Hsuan; Hsiao, Hao-Tse; Yang, Po-Chuan; Wang, Chih-Ming; Pan, Yen-Chih

    2013-11-22

    Single crystal silicon solar cells are still predominant in the market due to the abundance of silicon on earth and their acceptable efficiency. Different solar-cell structures of single crystalline Si have been investigated to boost efficiency; the heterojunction with intrinsic thin layer (HIT) structure is currently the leading technology. The record efficiency values of state-of-the art HIT solar cells have always been based on n-type single-crystalline Si wafers. Improving the efficiency of cells based on p-type single-crystalline Si wafers could provide broader options for the development of HIT solar cells. In this study, we varied the thickness of intrinsic hydrogenated amorphous Si layer to improve the efficiency of HIT solar cells on p-type Si wafers.

  2. Comparison of Photoluminescence Imaging on Starting Multi-Crystalline Silicon Wafers to Finished Cell Performance: Preprint

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Johnston, S.; Yan, F.; Dorn, D.

    2012-06-01

    Photoluminescence (PL) imaging techniques can be applied to multicrystalline silicon wafers throughout the manufacturing process. Both band-to-band PL and defect-band emissions, which are longer-wavelength emissions from sub-bandgap transitions, are used to characterize wafer quality and defect content on starting multicrystalline silicon wafers and neighboring wafers processed at each step through completion of finished cells. Both PL imaging techniques spatially highlight defect regions that represent dislocations and defect clusters. The relative intensities of these imaged defect regions change with processing. Band-to-band PL on wafers in the later steps of processing shows good correlation to cell quality and performance. The defect bandmore » images show regions that change relative intensity through processing, and better correlation to cell efficiency and reverse-bias breakdown is more evident at the starting wafer stage as opposed to later process steps. We show that thermal processing in the 200 degrees - 400 degrees C range causes impurities to diffuse to different defect regions, changing their relative defect band emissions.« less

  3. Non-invasive thermal profiling of silicon wafer surface during RTP using acoustic and signal processing techniques

    NASA Astrophysics Data System (ADS)

    Syed, Ahmed Rashid

    Among the great physical challenges faced by the current front-end semiconductor equipment manufacturers is the accurate and repeatable surface temperature measurement of wafers during various fabrication steps. Close monitoring of temperature is essential in that it ensures desirable device characteristics to be reliably reproduced across various wafer lots. No where is the need to control temperature more pronounced than it is during Rapid Thermal Processing (RTP) which involves temperature ramp rates in excess of 200°C/s. This dissertation presents an elegant and practical approach to solve the wafer surface temperature estimation problem, in context of RTP, by deploying hardware that acquires the necessary data while preserving the integrity and purity of the wafer. In contrast to the widely used wafer-contacting (and hence contaminating) methods, such as bonded thermocouples, or environment sensitive schemes, such as light-pipes and infrared pyrometry, the proposed research explores the concept of utilizing Lamb (acoustic) waves to detect changes in wafer surface temperature, during RTP. Acoustic waves are transmitted to the wafer via an array of quartz rods that normally props the wafer inside an RTP chamber. These waves are generated using piezoelectric transducers affixed to the bases of the quartz rods. The group velocity of Lamb waves traversing the wafer surface undergoes a monotonic decrease with rise in wafer temperature. The correspondence of delay in phase of the received Lamb waves and the ambient temperature, along all direct paths between sending and receiving transducers, yields a psuedo real-time thermal image of the wafer. Although the custom built hardware-setup implements the above "proof-of-concept" scheme by transceiving acoustic signals at a single frequency, the real-world application will seek to enhance the data acquistion. rate (>1000 temperature measurements per seconds) by sending and receiving Lamb waves at multiple frequencies (by

  4. Commercial production of QWIP wafers by molecular beam epitaxy

    NASA Astrophysics Data System (ADS)

    Fastenau, J. M.; Liu, W. K.; Fang, X. M.; Lubyshev, D. I.; Pelzel, R. I.; Yurasits, T. R.; Stewart, T. R.; Lee, J. H.; Li, S. S.; Tidrow, M. Z.

    2001-06-01

    As the performance of quantum well infrared photodetectors (QWIPs) and QWIP-based imaging systems continues to improve, their demand will undoubtedly grow. This points to the importance of a reliable commercial supplier of semiconductor QWIP material on three inch and, in the near future, four-inch substrates. Molecular beam epitaxy (MBE) is the preferred technique for growing the demanding QWIP structure, as tight control is required over the material composition and layer thickness. We report the current status of MBE-grown GaAs-based QWIP structures in a commercial production environment at IQE. Uniformity data and run-to-run reproducibility on both three-inch and four-inch GaAs substrates are quantified using alloy composition and QW thickness. Initial results on growth technology transfer to a multi-wafer MBE reactor are also presented. High-resolution X-ray diffraction measurements demonstrate GaAs QW thickness variations and AlGaAs barrier compositions changes to be less than 4% and 1% Al, respectively, across four-inch QWIP wafers from both single- and multiple-wafer MBE platforms.

  5. Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

    NASA Astrophysics Data System (ADS)

    Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

    2017-10-01

    Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

  6. Agile Machining and Inspection Non-Nuclear Report (NNR) Project

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lazarus, Lloyd

    This report is a high level summary of the eight major projects funded by the Agile Machining and Inspection Non-Nuclear Readiness (NNR) project (FY06.0422.3.04.R1). The largest project of the group is the Rapid Response project in which the six major sub categories are summarized. This project focused on the operations of the machining departments that will comprise Special Applications Machining (SAM) in the Kansas City Responsive Infrastructure Manufacturing & Sourcing (KCRIMS) project. This project was aimed at upgrading older machine tools, developing new inspection tools, eliminating Classified Removable Electronic Media (CREM) in the handling of classified Numerical Control (NC) programsmore » by installing the CRONOS network, and developing methods to automatically load Coordinated-Measuring Machine (CMM) inspection data into bomb books and product score cards. Finally, the project personnel leaned perations of some of the machine tool cells, and now have the model to continue this activity.« less

  7. Thermo-acousto-photonics for noncontact temperature measurement in silicon wafer processing

    NASA Astrophysics Data System (ADS)

    Suh, Chii-Der S.; Rabroker, G. Andrew; Chona, Ravinder; Burger, Christian P.

    1999-10-01

    A non-contact thermometry technique has been developed to characterize the thermal state of silicon wafers during rapid thermal processing. Information on thermal variations is obtained from the dispersion relations of the propagating waveguide mode excited in wafers using a non-contact, broadband optical system referred to as Thermal Acousto- Photonics for Non-Destructive Evaluation. Variations of thermo-mechanical properties in silicon wafers are correlated to temperature changes by performing simultaneous time-frequency analyses on Lamb waveforms acquired with a fiber-tip interferometer sensor. Experimental Lamb wave data collected for cases ranging from room temperature to 400 degrees C is presented. The results show that the temporal progressions of all spectral elements found in the fundamental antisymmetric mode are strong functions of temperature. This particular attribute is exploited to achieve a thermal resolution superior to the +/- 5 degrees C attainable through current pyrometric techniques. By analyzing the temperature-dependent group velocity of a specific frequency component over the temperature range considered and then comparing the results to an analytical model developed for silicon wafers undergoing annealing, excellent agreement was obtained. Presented results demonstrate the feasibility of applying laser-induced stress waves as a temperature diagnostic during rapid thermal processing.

  8. Wafer-level radiometric performance testing of uncooled microbolometer arrays

    NASA Astrophysics Data System (ADS)

    Dufour, Denis G.; Topart, Patrice; Tremblay, Bruno; Julien, Christian; Martin, Louis; Vachon, Carl

    2014-03-01

    A turn-key semi-automated test system was constructed to perform on-wafer testing of microbolometer arrays. The system allows for testing of several performance characteristics of ROIC-fabricated microbolometer arrays including NETD, SiTF, ROIC functionality, noise and matrix operability, both before and after microbolometer fabrication. The system accepts wafers up to 8 inches in diameter and performs automated wafer die mapping using a microscope camera. Once wafer mapping is completed, a custom-designed quick insertion 8-12 μm AR-coated Germanium viewport is placed and the chamber is pumped down to below 10-5 Torr, allowing for the evaluation of package-level focal plane array (FPA) performance. The probe card is electrically connected to an INO IRXCAM camera core, a versatile system that can be adapted to many types of ROICs using custom-built interface printed circuit boards (PCBs). We currently have the capability for testing 384x288, 35 μm pixel size and 160x120, 52 μm pixel size FPAs. For accurate NETD measurements, the system is designed to provide an F/1 view of two rail-mounted blackbodies seen through the Germanium window by the die under test. A master control computer automates the alignment of the probe card to the dies, the positioning of the blackbodies, FPA image frame acquisition using IRXCAM, as well as data analysis and storage. Radiometric measurement precision has been validated by packaging dies measured by the automated probing system and re-measuring the SiTF and Noise using INO's pre-existing benchtop system.

  9. Validation of Direct Analysis Real Time source/Time-of-Flight Mass Spectrometry for organophosphate quantitation on wafer surface.

    PubMed

    Hayeck, Nathalie; Ravier, Sylvain; Gemayel, Rachel; Gligorovski, Sasho; Poulet, Irène; Maalouly, Jacqueline; Wortham, Henri

    2015-11-01

    Microelectronic wafers are exposed to airborne molecular contamination (AMC) during the fabrication process of microelectronic components. The organophosphate compounds belonging to the dopant group are one of the most harmful groups. Once adsorbed on the wafer surface these compounds hardly desorb and could diffuse in the bulk of the wafer and invert the wafer from p-type to n-type. The presence of these compounds on wafer surface could have electrical effect on the microelectronic components. For these reasons, it is of importance to control the amount of these compounds on the surface of the wafer. As a result, a fast quantitative and qualitative analytical method, nondestructive for the wafers, is needed to be able to adjust the process and avoid the loss of an important quantity of processed wafers due to the contamination by organophosphate compounds. Here we developed and validated an analytical method for the determination of organic compounds adsorbed on the surface of microelectronic wafers using the Direct Analysis in Real Time-Time of Flight-Mass Spectrometry (DART-ToF-MS) system. Specifically, the developed methodology concerns the organophosphate group. Copyright © 2015 Elsevier B.V. All rights reserved.

  10. Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

    PubMed Central

    Brito, Nuno; Ferreira, Carlos; Alves, Filipe; Cabral, Jorge; Gaspar, João; Monteiro, João; Rocha, Luís

    2016-01-01

    The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr), quality factor (Q), and pull-in voltage (Vpi) within 1.5 s with repeatability better than 5 ppt (parts per thousand). A full-wafer with 420 devices under test (DUTs) has been evaluated detecting the faulty devices and providing important design specification feedback to the designers. PMID:27657087

  11. Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response.

    PubMed

    Brito, Nuno; Ferreira, Carlos; Alves, Filipe; Cabral, Jorge; Gaspar, João; Monteiro, João; Rocha, Luís

    2016-09-21

    The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr), quality factor (Q), and pull-in voltage (Vpi) within 1.5 s with repeatability better than 5 ppt (parts per thousand). A full-wafer with 420 devices under test (DUTs) has been evaluated detecting the faulty devices and providing important design specification feedback to the designers.

  12. Epitaxial gallium arsenide wafers

    NASA Technical Reports Server (NTRS)

    Black, J. F.; Robinson, L. B.

    1971-01-01

    The preparation of GaAs epitaxial layers by a vapor transport process using AsCl3, Ga and H2 was pursued to provide epitaxial wafers suitable for the fabrication of transferred electron oscillators and amplifiers operating in the subcritical region. Both n-n(+) structures, and n(++)-n-n(+) sandwich structures were grown using n(+) (Si-doped) GaAs substrates. Process variables such as the input AsCl3 concentration, gallium temperature, and substrate temperature and temperature gradient and their effects on properties are presented and discussed.

  13. Advances in process overlay on 300-mm wafers

    NASA Astrophysics Data System (ADS)

    Staecker, Jens; Arendt, Stefanie; Schumacher, Karl; Mos, Evert C.; van Haren, Richard J. F.; van der Schaar, Maurits; Edart, Remi; Demmerle, Wolfgang; Tolsma, Hoite

    2002-07-01

    Overlay budgets are getting tighter within 300 mm volume production and as a consequence the process effects on alignment and off-line metrology becomes more important. In a short loop experiment, with cleared reference marks in each image field, the isolated effect of processing was measured with a sub-nanometer accuracy. The examined processes are Shallow Trench Isolation (STI), Tungsten-Chemical Mechanical Processing (W-CMP) and resist spinning. The alignment measurements were done on an ASML TWINSCANT scanner and the off-line metrology measurements on a KLA Tencor. Mark type and mark position dependency of the process effects are analyzed. The mean plus 3 (sigma) of the maximum overlay after correcting batch average wafer parameters is used as an overlay performance indicator (OPI). 3 (sigma) residuals to the wafer-model are used as an indicator of the noise that is added by the process. The results are in agreement with existing knowledge of process effects on 200 mm wafers. The W-CMP process introduces an additional wafer rotation and scaling that is similar for alignment marks and metrology targets. The effects depend on the mark type; in general they get less severe for higher spatial frequencies. For a 7th order alignment mark, the OPI measured about 12 nm and the added noise about 12 nm. For the examined metrology targets the OPI is about 20 nm with an added noise of about 90 nm. Two different types of alignment marks were tested in the STI process, i.e., zero layer marks and marks that were exposed together with the STI product. The overlay contribution due to processing on both types of alignment marks is very low (smaller than 5 nm OPI) and independent on mark type. Some flyers are observed fot the zero layer marks. The flyers can be explained by the residues of oxide and nitride that is left behind in the spaces of the alignment marks. Resist spinning is examined on single layer resist and resist with an organic Bottom Anti-Reflective Coating (BARC

  14. Wafer-size free-standing single-crystalline graphene device arrays

    NASA Astrophysics Data System (ADS)

    Li, Peng; Jing, Gaoshan; Zhang, Bo; Sando, Shota; Cui, Tianhong

    2014-08-01

    We report an approach of wafer-scale addressable single-crystalline graphene (SCG) arrays growth by using pre-patterned seeds to control the nucleation. The growth mechanism and superb properties of SCG were studied. Large array of free-standing SCG devices were realized. Characterization of SCG as nano switches shows excellent performance with life time (>22 000 times) two orders longer than that of other graphene nano switches reported so far. This work not only shows the possibility of producing wafer-scale high quality SCG device arrays but also explores the superb performance of SCG as nano devices.

  15. Computational Modeling in Plasma Processing for 300 mm Wafers

    NASA Technical Reports Server (NTRS)

    Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

    1997-01-01

    Migration toward 300 mm wafer size has been initiated recently due to process economics and to meet future demands for integrated circuits. A major issue facing the semiconductor community at this juncture is development of suitable processing equipment, for example, plasma processing reactors that can accomodate 300 mm wafers. In this Invited Talk, scaling of reactors will be discussed with the aid of computational fluid dynamics results. We have undertaken reactor simulations using CFD with reactor geometry, pressure, and precursor flow rates as parameters in a systematic investigation. These simulations provide guidelines for scaling up in reactor design.

  16. Laser treatment of plasma-hydrogenated silicon wafers for thin layer exfoliation

    NASA Astrophysics Data System (ADS)

    Ghica, Corneliu; Nistor, Leona Cristina; Teodorescu, Valentin Serban; Maraloiu, Adrian; Vizireanu, Sorin; Scarisoreanu, Nae Doinel; Dinescu, Maria

    2011-03-01

    We have studied by transmission electron microscopy the microstructural effects induced by pulsed laser annealing in comparison with thermal treatments of RF plasma hydrogenated Si wafers aiming for further application in the smart-cut procedure. While thermal annealing mainly produces a slight decrease of the density of plasma-induced planar defects and an increase of the size and number of plasma-induced nanocavities in the Si matrix, pulsed laser annealing of RF plasma hydrogenated Si wafers with a 355 nm wavelength radiation results in both the healing of defects adjacent to the wafer surface and the formation of a well defined layer of nanometric cavities at a depth of 25-50 nm. In this way, a controlled fracture of single crystal layers of Si thinner than 50 nm is favored.

  17. Method for making circular tubular channels with two silicon wafers

    DOEpatents

    Yu, C.M.; Hui, W.C.

    1996-11-19

    A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si{sub 3}N{sub 4}) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO{sub 3}/CH{sub 3}COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary. 11 figs.

  18. Method for making circular tubular channels with two silicon wafers

    DOEpatents

    Yu, Conrad M.; Hui, Wing C.

    1996-01-01

    A two-wafer microcapillary structure is fabricated by depositing boron nitride (BN) or silicon nitride (Si.sub.3 N.sub.4) on two separate silicon wafers (e.g., crystal-plane silicon with [100] or [110] crystal orientation). Photolithography is used with a photoresist to create exposed areas in the deposition for plasma etching. A slit entry through to the silicon is created along the path desired for the ultimate microcapillary. Acetone is used to remove the photoresist. An isotropic etch, e.g., such as HF/HNO.sub.3 /CH.sub.3 COOH, then erodes away the silicon through the trench opening in the deposition layer. A channel with a half-circular cross section is then formed in the silicon along the line of the trench in the deposition layer. Wet etching is then used to remove the deposition layer. The two silicon wafers are aligned and then bonded together face-to-face to complete the microcapillary.

  19. Resonance ultrasonic diagnostics of defects in full-size silicon wafers

    NASA Astrophysics Data System (ADS)

    Belyaev, A.; Ostapenko, S.

    2001-12-01

    A resonance acoustic effect was observed recently in full-size 200 mm Cz-Si wafers and applied to characterize as-grown and process-induced defects. Ultrasonic vibrations can be excited into wafers using an external ultrasonic transducer and their amplitude is recorded using a scanning air-coupled acoustic probe operated in a non-contact mode. By sweeping driving frequency, f, of the transducer, we observed an amplification of a specific acoustic mode referred to as ‘whistle’. In this paper, we performed theoretical modeling of the whistle which allowed in attributing this mode to resonant flexural vibrations in a thin circular plate. We calculated normal frequencies of the flexural vibrations of a circular plate of radius ρ in the case of the free edge. The model gives an excellent fit to experimental data with regard to whistle spatial distribution. The results of calculation allow the evaluation of resonance acoustic effect in wafers of different geometries employed in the industry.

  20. Characterization of silicon-on-insulator wafers

    NASA Astrophysics Data System (ADS)

    Park, Ki Hoon

    The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

  1. Laser cutting sandwich structure glass-silicon-glass wafer with laser induced thermal-crack propagation

    NASA Astrophysics Data System (ADS)

    Cai, Yecheng; Wang, Maolu; Zhang, Hongzhi; Yang, Lijun; Fu, Xihong; Wang, Yang

    2017-08-01

    Silicon-glass devices are widely used in IC industry, MEMS and solar energy system because of their reliability and simplicity of the manufacturing process. With the trend toward the wafer level chip scale package (WLCSP) technology, the suitable dicing method of silicon-glass bonded structure wafer has become necessary. In this paper, a combined experimental and computational approach is undertaken to investigate the feasibility of cutting the sandwich structure glass-silicon-glass (SGS) wafer with laser induced thermal-crack propagation (LITP) method. A 1064 nm semiconductor laser cutting system with double laser beams which could simultaneously irradiate on the top and bottom of the sandwich structure wafer has been designed. A mathematical model for describing the physical process of the interaction between laser and SGS wafer, which consists of two surface heating sources and two volumetric heating sources, has been established. The temperature stress distribution are simulated by using finite element method (FEM) analysis software ABAQUS. The crack propagation process is analyzed by using the J-integral method. In the FEM model, a stationary planar crack is embedded in the wafer and the J-integral values around the crack front edge are determined using the FEM. A verification experiment under typical parameters is conducted and the crack propagation profile on the fracture surface is examined by the optical microscope and explained from the stress distribution and J-integral value.

  2. Field documentation and client presentation of IR inspections on new masonry structures

    NASA Astrophysics Data System (ADS)

    McMullan, Phillip C.

    1991-03-01

    With the adoption of American Concrete Institute's Design Standard 530 (ACI 530-88/ASCE 5-88) and Specifications (ACI 530.1-88/ASCE 6-88) by more governing bodies throughout the United States, the level and method of inspecting masonry structures is rapidly changing. These new standards set forth inspection criteria such that the Professional of Record (i.e., Architect), can determine the level of inspection based on the type and complexity of the structure being built. For example, a hospital would require considerably more inspection than a Seven-Eleven mini-market. However, the standards require that all new masonry buildings must be inspected. Infrared thermography has proven to be an effective tool to assist in the required inspections. These inspections focus on evaluating masonry for compliance with the design specifications with regard to material, structural strength and thermal performance, the use of video infrared thermography provides a thorough systematic method for inspection of structural solids and thermal integrity of masonry structures. In conducting masonry inspections, the creation of a permanent, well-documented record is valuable in avoiding potential controversy over the inspection findings. Therefore, the inspection method, verification of findings, and presentation of the inspection data are key to the successful use of infrared thermography as an inspection tool. This paper will focus on the method of inspection which TSI employs in conducting new masonry inspections. Additionally, an important component of any work is the presentation of the data. We will look at the information which is generated during this type of inspection and how that data can be converted into a usable report for the various parties involved in construction of a new masonry building.

  3. Optical cavity furnace for semiconductor wafer processing

    DOEpatents

    Sopori, Bhushan L.

    2014-08-05

    An optical cavity furnace 10 having multiple optical energy sources 12 associated with an optical cavity 18 of the furnace. The multiple optical energy sources 12 may be lamps or other devices suitable for producing an appropriate level of optical energy. The optical cavity furnace 10 may also include one or more reflectors 14 and one or more walls 16 associated with the optical energy sources 12 such that the reflectors 14 and walls 16 define the optical cavity 18. The walls 16 may have any desired configuration or shape to enhance operation of the furnace as an optical cavity 18. The optical energy sources 12 may be positioned at any location with respect to the reflectors 14 and walls defining the optical cavity. The optical cavity furnace 10 may further include a semiconductor wafer transport system 22 for transporting one or more semiconductor wafers 20 through the optical cavity.

  4. "Performance Of A Wafer Stepper With Automatic Intra-Die Registration Correction."

    NASA Astrophysics Data System (ADS)

    van den Brink, M. A.; Wittekoek, S.; Linders, H. F. D.; van Hout, F. J.; George, R. A.

    1987-01-01

    An evaluation of a wafer stepper with the new improved Philips/ASM-L phase grating alignment system is reported. It is shown that an accurate alignment system needs an accurate X-Y-0 wafer stage and an accurate reticle Z stage to realize optimum overlay accuracy. This follows from a discussion of the overlay budget and an alignment procedure model. The accurate wafer stage permits high overlay accuracy using global alignment only, thus eliminating the throughput penalty of align-by-field schemes. The accurate reticle Z stage enables an intra-die magnification control with respect to the wafer scale. Various overlay data are reported, which have been measured with the automatic metrology program of the stepper. It is demonstrated that the new dual alignment system (with the external spatial filter) has improved the ability to align to weakly reflecting layers. The results are supported by a Fourier analysis of the alignment signal. Resolution data are given for the PAS 2500 projection lenses, which show that the high overlay accuracy of the system is properly matched with submicron linewidth control. The results of a recently introduced 20mm i-line lens with a numerical aperture of 0.4 (Zeiss 10-78-58) are included.

  5. Etching Selectivity of Cr, Fe and Ni Masks on Si & SiO2 Wafers

    NASA Astrophysics Data System (ADS)

    Garcia, Jorge; Lowndes, Douglas H.

    2000-10-01

    During this Summer 2000 I joined the Semiconductors and Thin Films group led by Dr. Douglas H. Lowndes at Oak Ridge National Laboratory’s Solid State Division. Our objective was to evaluate the selectivity that Trifluoromethane (CHF3), and Sulfur Hexafluoride (SF6) plasmas have for Si, SiO2 wafers and the Ni, Cr, and Fe masks; being this etching selectivity the ratio of the etching rates of the plasmas for each of the materials. We made use of Silicon and Silicon Dioxide-coated wafers that have Fe, Cr or Ni masks. In the semiconductor field, metal layers are often used as masks to protect layers underneath during processing steps; when these wafers are taken to the dry etching process, both the wafer and the mask layers’ thickness are reduced.

  6. Dissolution of Oxygen Precipitate Nuclei in n-Type CZ-Si Wafers to Improve Their Material Quality: Experimental Results

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sopori, Bhushan; Basnyat, Prakash; Devayajanam, Srinivas

    2017-01-01

    We present experimental results which show that oxygen-related precipitate nuclei (OPN) present in p-doped, n-type, Czochralski wafers can be dissolved using a flash-annealing process, yielding very high quality wafers for high-efficiency solar cells. Flash annealing consists of heating a wafer in an optical furnace to temperature between 1150 and 1250 degrees C for a short time. This process produces a large increase in the minority carrier lifetime (MCLT) and homogenizes each wafer. We have tested wafers from different axial locations of two ingots. All wafers reach nearly the same high value of MCLT. The OPN dissolution is confirmed by oxygenmore » analysis using Fourier transform infrared spectra and injection-level dependence of MCLT.« less

  7. Error Sources in Proccessing LIDAR Based Bridge Inspection

    NASA Astrophysics Data System (ADS)

    Bian, H.; Chen, S. E.; Liu, W.

    2017-09-01

    Bridge inspection is a critical task in infrastructure management and is facing unprecedented challenges after a series of bridge failures. The prevailing visual inspection was insufficient in providing reliable and quantitative bridge information although a systematic quality management framework was built to ensure visual bridge inspection data quality to minimize errors during the inspection process. The LiDAR based remote sensing is recommended as an effective tool in overcoming some of the disadvantages of visual inspection. In order to evaluate the potential of applying this technology in bridge inspection, some of the error sources in LiDAR based bridge inspection are analysed. The scanning angle variance in field data collection and the different algorithm design in scanning data processing are the found factors that will introduce errors into inspection results. Besides studying the errors sources, advanced considerations should be placed on improving the inspection data quality, and statistical analysis might be employed to evaluate inspection operation process that contains a series of uncertain factors in the future. Overall, the development of a reliable bridge inspection system requires not only the improvement of data processing algorithms, but also systematic considerations to mitigate possible errors in the entire inspection workflow. If LiDAR or some other technology can be accepted as a supplement for visual inspection, the current quality management framework will be modified or redesigned, and this would be as urgent as the refine of inspection techniques.

  8. Wafer-level manufacturing technology of glass microlenses

    NASA Astrophysics Data System (ADS)

    Gossner, U.; Hoeftmann, T.; Wieland, R.; Hansch, W.

    2014-08-01

    In high-tech products, there is an increasing demand to integrate glass lenses into complex micro systems. Especially in the lighting industry LEDs and laser diodes used for automotive applications require encapsulated micro lenses. To enable low-cost production, manufacturing of micro lenses on wafer level base using a replication technology is a key technology. This requires accurate forming of thousands of lenses with a diameter of 1-2 mm on a 200 mm wafer compliant with mass production. The article will discuss the technical aspects of a lens manufacturing replication process and the challenges, which need to be solved: choice of an appropriate master for replication, thermally robust interlayer coating, choice of replica glass, bonding and separation procedure. A promising approach for the master substrate material is based on a lens structured high-quality glass wafer with high melting point covered by a coating layer of amorphous silicon or germanium. This layer serves as an interlayer for the glass bonding process. Low pressure chemical vapor deposition and plasma enhanced chemical vapor deposition processes allow a deposition of layer coatings with different hydrogen and doping content influencing their chemical and physical behavior. A time reduced molding process using a float glass enables the formation of high quality lenses while preserving the recyclability of the mother substrate. The challenge is the separation of the replica from the master mold. An overview of chemical methods based on optimized etching of coating layer through small channels will be given and the impact of glass etching on surface roughness is discussed.

  9. Graphene-Decorated Nanocomposites for Printable Electrodes in Thin Wafer Devices

    NASA Astrophysics Data System (ADS)

    Bakhshizadeh, N.; Sivoththaman, S.

    2017-12-01

    Printable electrodes that induce less stress and require lower curing temperatures compared to traditional screen-printed metal pastes are needed in thin wafer devices such as future solar cells, and in flexible electronics. The synthesis of nanocomposites by incorporating graphene nanopowders as well as silver nanowires into epoxy-based electrically conductive adhesives (ECA) is examined to improve electrical conductivity and to develop alternate printable electrode materials that induce less stress on the wafer. For the synthesized graphene and Ag nanowire-decorated ECA nanocomposites, the curing kinetics were studied by dynamic and isothermal differential scanning calorimetry measurements. Thermogravimetric analysis on ECA, ECA-AG and ECA/graphene nanopowder nanocomposites showed that the temperatures for onset of decomposition are higher than their corresponding glass transition temperature ( T g) indicating an excellent thermal resistance. Printed ECA/Ag nanowire nanocomposites showed 90% higher electrical conductivity than ECA films, whereas the ECA/graphene nanocomposites increased the conductivity by over two orders of magnitude. Scanning electron microscopy results also revealed the effect of fillers morphology on the conductivity improvement and current transfer mechanisms in nanocomposites. Residual stress analysis performed on Si wafers showed that the ECA and nanocomposite printed wafers are subjected to much lower stress compared to those printed with metallic pastes. The observed parameters of low curing temperature, good thermal resistance, reasonably high conductivity, and low residual stress in the ECA/graphene nanocomposite makes this material a promising alternative in screen-printed electrode formation in thin substrates.

  10. Chemical method for producing smooth surfaces on silicon wafers

    DOEpatents

    Yu, Conrad

    2003-01-01

    An improved method for producing optically smooth surfaces in silicon wafers during wet chemical etching involves a pre-treatment rinse of the wafers before etching and a post-etching rinse. The pre-treatment with an organic solvent provides a well-wetted surface that ensures uniform mass transfer during etching, which results in optically smooth surfaces. The post-etching treatment with an acetic acid solution stops the etching instantly, preventing any uneven etching that leads to surface roughness. This method can be used to etch silicon surfaces to a depth of 200 .mu.m or more, while the finished surfaces have a surface roughness of only 15-50 .ANG. (RMS).

  11. Polarized Optical Scattering Measurements of Metallic Nanoparticles on a Thin Film Silicon Wafer

    NASA Astrophysics Data System (ADS)

    Liu, Cheng-Yang; Liu, Tze-An; Fu, Wei-En

    2009-09-01

    Light scattering has shown its powerful diagnostic capability to characterize optical quality surfaces. In this study, the theory of bidirectional reflectance distribution function (BRDF) was used to analyze the metallic nanoparticles' sizes on wafer surfaces. The BRDF of a surface is defined as the angular distribution of radiance scattered by the surface normalized by the irradiance incident on the surface. A goniometric optical scatter instrument has been developed to perform the BRDF measurements on polarized light scattering on wafer surfaces for the diameter and distribution measurements of metallic nanoparticles. The designed optical scatter instrument is capable of distinguishing various types of optical scattering characteristics, which are corresponding to the diameters of the metallic nanoparticles, near surfaces by using the Mueller matrix calculation. The metallic nanoparticle diameter of measurement is 60 nm on 2 inch thin film wafers. These measurement results demonstrate that the polarization of light scattered by metallic particles can be used to determine the size of metallic nanoparticles on silicon wafers.

  12. Evaluation of a cyanoacrylate dressing to manage peristomal skin alterations under ostomy skin barrier wafers.

    PubMed

    Milne, Catherine T; Saucier, Darlene; Trevellini, Chenel; Smith, Juliet

    2011-01-01

    Peristomal skin alterations under ostomy barrier wafers are a commonly reported problem. While a number of interventions to manage this issue have been reported, the use of a topically applied cyanoacrylate has received little attention. This case series describes the use of a topical cyanoacrylate for the management of peristomal skin alterations in persons living with an ostomy. Using a convenience sample, the topical cyanoacrylate dressing was applied to 11 patients with peristomal skin disruption under ostomy wafers in acute care and outpatient settings. The causes of barrier function interruption were also addressed to enhance outcomes. Patients were assessed for wound discomfort using a Likert Scale, time to healing, and number of appliance changes. Patient satisfaction was also examined. Average reported discomfort levels were 9.5 out of 10 at the initial peristomal irritation assessment visit decreased to 3.5 at the first wafer change and were absent by the second wafer change. Wafers had increasing wear time between changes in both settings with acute care patients responding faster. Epidermal resurfacing occurred within 10.2 days in outpatients and within 7 days in acute care patients. Because of the skin sealant action of this dressing, immediate adherence of the wafer was reported at all pouch changes.

  13. Wafer level reliability for high-performance VLSI design

    NASA Technical Reports Server (NTRS)

    Root, Bryan J.; Seefeldt, James D.

    1987-01-01

    As very large scale integration architecture requires higher package density, reliability of these devices has approached a critical level. Previous processing techniques allowed a large window for varying reliability. However, as scaling and higher current densities push reliability to its limit, tighter control and instant feedback becomes critical. Several test structures developed to monitor reliability at the wafer level are described. For example, a test structure was developed to monitor metal integrity in seconds as opposed to weeks or months for conventional testing. Another structure monitors mobile ion contamination at critical steps in the process. Thus the reliability jeopardy can be assessed during fabrication preventing defective devices from ever being placed in the field. Most importantly, the reliability can be assessed on each wafer as opposed to an occasional sample.

  14. Perceptions of Physical Inspections as a Tool to Protect Housing Quality and Promote Health Equity.

    PubMed

    Holtzen, Holly; Klein, Elizabeth G; Keller, Brittney; Hood, Nancy

    2016-01-01

    Physical inspections that assess how well affordable housing properties meet quality and safety standards help to ensure that low-income tenants live in a healthy built environment. This study was part of a larger Health Impact Assessment (HIA) conducted between January 2012 and November 2013 to inform policymakers about the potential health consequences of a proposed policy decision to align the physical inspections required by housing funding agencies, which would result in a reduction of the frequency of physical inspections. Key informant interviews (n=18) of property managers and tenants were used to explore the inspection process, identification of housing quality issues, and potential effects on the health of affordable housing tenants and the impact on property management practices. Results indicate that physical inspection frequency may be an important trigger for property managers and tenants to adhere to proper maintenance schedules.

  15. Correlation of 150-mm silicon wafer site flatness with stepper performance for deep submicron applications

    NASA Astrophysics Data System (ADS)

    Huff, Howard R.; Vigil, Joseph C.; Kuyel, Birol; Chan, David Y.; Nguyen, Long P.

    1992-06-01

    An experimental study was conducted to correlate wafer site flatness SFQD with stepper performance for half-micron lines and spaces. CD measurements were taken on wafers patterned on both GCA pre-production XLS i-line and SVGL Micrascan-90 DUV steppers as well as focus measurements on the Micrascan-90. Wafer site flatness SFQD less than 0.3 micrometers was observed to be a sufficiently small variable in CD non-uniformities for these initial half-micron stepper applications.

  16. Functional Testing and Characterisation of ISFETs on Wafer Level by Means of a Micro-droplet Cell#

    PubMed Central

    Poghossian, Arshak; Schumacher, Kerstin; Kloock, Joachim P.; Rosenkranz, Christian; Schultze, Joachim W.; Müller-Veggian, Mattea; Schöning, Michael J.

    2006-01-01

    A wafer-level functionality testing and characterisation system for ISFETs (ion-sensitive field-effect transistor) is realised by means of integration of a specifically designed capillary electrochemical micro-droplet cell into a commercial wafer prober-station. The developed system allows the identification and selection of “good” ISFETs at the earliest stage and to avoid expensive bonding, encapsulation and packaging processes for non-functioning ISFETs and thus, to decrease costs, which are wasted for bad dies. The developed system is also feasible for wafer-level characterisation of ISFETs in terms of sensitivity, hysteresis and response time. Additionally, the system might be also utilised for wafer-level testing of further electrochemical sensors.

  17. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

    PubMed

    Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

    2014-07-07

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  18. Control of cavitation using dissolved carbon dioxide for damage-free megasonic cleaning of wafers

    NASA Astrophysics Data System (ADS)

    Kumari, Sangita

    equilibria revealed that the loss of released CO2(aq) upon increase in pH can be compensated by moderate increase in added NH4HCO3. Using this method, simultaneous control of SL and solution pH was demonstrated in two systems, NH4HCO3/HCl and NH4OH/CO2, at two nominal pH values; 5.7 and 7.0. Damage studies were performed on wafer samples with line/space patterns donated by IMEC and FSI International bearing Si/metal/a-Si gate stacks of thickness ~36 nm and Si/Poly-Si gate stacks of thickness ~67 nm, respectively. A single wafer spin cleaning tool MegPieRTM was used for the generation of megasonic energy for inducing damage to the structures. It was demonstrated that CO2 dissolution in DI water suppresses damage to the gate stacks in a dose-dependent manner. Together, these studies establish a systematic and strong correlation between CO2(aq) concentration, SL suppression and damage suppression. Significant damage reduction (~50 % to ~90 %) was observed at [CO2(aq)] > ~300 ppm. It was also demonstrated that CO2(aq) suppresses damage under alkaline pH condition too. This demonstration was made possible by the successful design of two new cleaning systems NH4HCO3/NH4OH and CO2/NH 4OH that could generate CO2(aq) under alkaline conditions. Damage suppressing ability of the newly designed cleaning systems were compared to the standard cleaning system NH4OH at pH 8.2 and it was found that NH4HCO3/NH4OH and CO2/NH 4OH systems were 80 % more efficient in suppressing damage compared to the standard NH4OH cleaning system. Finally, megasonic cleaning studies were conducted in the same single wafer spin cleaning tool MegPieRTM, using SiO2 particles (size 185 nm) deposited on 200 mm oxide Si wafers, as the contaminant. It was found that the standard cleaning chemical, NH4OH, pH 8.2, was effective in achieving > 95 % particle removal for 2 min irradiation of megasonic energy at power densities > 0.7 W/cm2. Based on these results, a new system, NH4HCO3/NH4OH, was designed with an aim to

  19. Local interstitial delivery of z-butylidenephthalide by polymer wafers against malignant human gliomas

    PubMed Central

    Harn, Horng-Jyh; Lin, Shinn-Zong; Lin, Po-Cheng; Liu, Cyong-Yue; Liu, Po-Yen; Chang, Li-Fu; Yen, Ssu-Yin; Hsieh, Dean-Kuo; Liu, Fu-Chen; Tai, Dar-Fu; Chiou, Tzyy-Wen

    2011-01-01

    We have shown that the natural compound z-butylidenephthalide (Bdph), isolated from the chloroform extract of Angelica sinensis, has antitumor effects. Because of the limitation of the blood-brain barrier, the Bdph dosage required for treatment of glioma is relatively high. To solve this problem, we developed a local-release system with Bdph incorporated into a biodegradable polyanhydride material, p(CPP-SA; Bdph-Wafer), and investigated its antitumor effects. On the basis of in vitro release kinetics, we demonstrated that the Bdph-Wafer released 50% of the available Bdph by the sixth day, and the release reached a plateau phase (90% of Bdph) by the 30th day. To investigate the in situ antitumor effects of the Bdph-Wafer on glioblastoma multiforme (GBM), we used 2 xenograft animal models—F344 rats (for rat GBM) and nude mice (for human GBM)—which were injected with RG2 and DBTRG-05MG cells, respectively, for tumor formation and subsequently treated subcutaneously with Bdph-Wafers. We observed a significant inhibitory effect on tumor growth, with no significant adverse effects on the rodents. Moreover, we demonstrated that the antitumor effect of Bdph on RG2 cells was via the PKC pathway, which upregulated Nurr77 and promoted its translocation from the nucleus to the cytoplasm. Finally, to study the effect of the interstitial administration of Bdph in cranial brain tumor, Bdph-Wafers were surgically placed in FGF-SV40 transgenic mice. Our Bdph-Wafer significantly reduced tumor size in a dose-dependent manner. In summary, our study showed that p(CPP-SA) containing Bdph delivered a sufficient concentration of Bdph to the tumor site and effectively inhibited the tumor growth in the glioma. PMID:21565841

  20. Industrial applications of shearography for inspections of aircraft components

    NASA Astrophysics Data System (ADS)

    Krupka, Rene; Waltz, T.; Ettemeyer, Andreas

    2003-05-01

    Shearography has been validated as fast and reliable inspection technique for aerospace components. Following several years phase of evaluation of the technique, meanwhile, shearography has entered the industrial production inspection. The applications basically range from serial inspection in the production line to field inspection in assembly and to applications in the maintenance and repair area. In all applications, the main advantages of shearography, as very fast and full field inspection and high sensitivity even on very complex composite materials have led to the decision for laser shearography as inspection tool. In this paper, we present examples of recent industrial shearography inspection systems in the field of aerospace. One of the first industrial installations of laser shearography in Europe was a fully automatic inspection system for helicopter rotorblades. Complete rotor blades are inspected within 10 minutes on delaminations and debondings in the composite structure. In case of more complex components, robotic manipulation of the shearography camera has proven to be the optimum solution. An industry 6-axis robot gives utmost flexibility to position the camera in any angle and distance. Automatic defect marking systems have also been introduced to indicate the exact position of the defect directly on the inspected component. Other applications cover the inspection of abradable seals in jet engines and portable shearography inspection systems for maintenance and repair inspection in the field.

  1. Array-type miniature interferometer as the core optical microsystem of an optical coherence tomography device for tissue inspection

    NASA Astrophysics Data System (ADS)

    Passilly, Nicolas; Perrin, Stéphane; Lullin, Justine; Albero, Jorge; Bargiel, Sylwester; Froehly, Luc; Gorecki, Christophe; Krauter, Johann; Osten, Wolfgang; Wang, Wei-Shan; Wiemer, Maik

    2016-04-01

    Some of the critical limitations for widespread use in medical applications of optical devices, such as confocal or optical coherence tomography (OCT) systems, are related to their cost and large size. Indeed, although quite efficient systems are available on the market, e.g. in dermatology, they equip only a few hospitals and hence, are far from being used as an early detection tool, for instance in screening of patients for early detection of cancers. In this framework, the VIAMOS project aims at proposing a concept of miniaturized, batch-fabricated and lower-cost, OCT system dedicated to non-invasive skin inspection. In order to image a large skin area, the system is based on a full-field approach. Moreover, since it relies on micro-fabricated devices whose fields of view are limited, 16 small interferometers are arranged in a dense array to perform multi-channel simultaneous imaging. Gaps between each channel are then filled by scanning of the system followed by stitching. This approach allows imaging a large area without the need of large optics. It also avoids the use of very fast and often expensive laser sources, since instead of a single point detector, almost 250 thousands pixels are used simultaneously. The architecture is then based on an array of Mirau interferometers which are interesting for their vertical arrangement compatible with vertical assembly at the wafer-level. Each array is consequently a local part of a stack of seven wafers. This stack includes a glass lens doublet, an out-of-plane actuated micro-mirror for phase shifting, a spacer and a planar beam-splitter. Consequently, different materials, such as silicon and glass, are bonded together and well-aligned thanks to lithographic-based fabrication processes.

  2. Evaluation of the Technical Feasibility and Effective Cost of Various Wafer Thicknesses for the Manufacture of Solar Cells

    NASA Technical Reports Server (NTRS)

    1979-01-01

    Fourteen wafering characterization runs were completed on a wire saw. Wafer thickness/taper uniformity was excellent. Several alternations and design adjustments were made, facilitating saw operation. A wafering characterization cycle was initiated, and is close to completion. A cell characterization cycle was initiated.

  3. Evaluation of the technical feasibility and effective cost of various wafer thicknesses for the manufacture of solar cells

    NASA Technical Reports Server (NTRS)

    1978-01-01

    Three wafering demonstration runs were completed on the Yasunaga wire saw. Wafer thickness/taper uniformity is excellent. Many small problems were encountered with Yasunaga accessories, slowing the effort. A wafer characterization cycle was defined and will be initiated during the next period.

  4. Terahertz transmission properties of silicon wafers using continuous-wave terahertz spectroscopy

    NASA Astrophysics Data System (ADS)

    Kim, Chihoon; Ahn, Jae Sung; Ji, Taeksoo; Eom, Joo Beom

    2017-04-01

    We present the spectral properties of Si wafers using continuous-wave terahertz (CW-THz) spectroscopy. By using a tunable laser source and a fixed distributed-feedback laser diode (DFB-LD), a stably tunable beat source for CW-THz spectroscopy system can be implemented. THz radiation is generated in the frequency range of 100 GHz-800 GHz by photomixing in a photoconductive antenna. We also measured CW-THz waveforms by changing the beat frequency and confirmed repeatability through repeated measurement. We calculated the peaks of the THz frequency by taking fast Fourier transforms (FFTs) of measured THz waveforms. The feasibility of CW-THz spectroscopy is demonstrated by the THz spectra of Si wafers with different resistivities, mobilities, and carrier concentrations. The results show that Si wafers with a lower resistivity absorb more THz waves. Thus, we expect our CW-THz system to have the advantage of being able to perform fast non-destructive analysis.

  5. Wafer-scale pixelated detector system

    DOEpatents

    Fahim, Farah; Deptuch, Grzegorz; Zimmerman, Tom

    2017-10-17

    A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

  6. Texturization of diamond-wire-sawn multicrystalline silicon wafer using Cu, Ag, or Ag/Cu as a metal catalyst

    NASA Astrophysics Data System (ADS)

    Wang, Shing-Dar; Chen, Ting-Wei

    2018-06-01

    In this work, Cu, Ag, or Ag/Cu was used as a metal catalyst to study the surface texturization of diamond-wire-sawn (DWS) multi-crystalline silicon (mc-Si) wafer by a metal-assisted chemical etching (MACE) method. The DWS wafer was first etched by standard HF-HNO3 acidic etching, and it was labeled as AE-DWS wafer. The effects of ratios of Cu(NO3)2:HF, AgNO3:HF, and AgNO3:Cu(NO3)2 on the morphology of AE-DWS wafer were investigated. After the process of MACE, the wafer was treated with a NaF/H2O2 solution. In this process, H2O2 etched the nanostructure, and NaF removed the oxidation layer. The Si {1 1 1} plane was revealed by etching the wafer in a mixture of 0.03 M Cu(NO3)2 and 1 M HF at 55 °C for 2.5 min. These parallel Si {1 1 1} planes replaced some parallel saw marks on the surface of AE-DWS wafers without forming a positive pyramid or an inverted pyramid structure. The main topography of the wafer is comprised of silicon nanowires grown in <1 0 0> direction when Ag or Ag/Cu was used as a metal catalyst. When silicon is etched in a mixed solution of Cu(NO3)2, AgNO3, HF and H2O2 at 55 °C with a concentration ratio of [Cu2+]/[Ag+] of 50 or at 65 °C with a concentration ratio of [Cu2+]/[Ag+] of 33, a quasi-inverted pyramid structure can be obtained. The reflectivity of the AE-DWS wafers treated with MACE is lower than that of the multiwire-slurry-sawn (MWSS) mc-Si wafers treated with traditional HF + HNO3 etching.

  7. Non-Reciprocal on Wafer Microwave Devices

    DTIC Science & Technology

    2015-05-27

    filter uses a barium hexagonal ferrite film incorporated into the dielectric layer of a microstrip transmission line. The zero-field operational...Fal,, Robert E. Camley. Millimeter wave phase shifter based on ferromagnetic resonancein a hexagonal barium ferrite thin film, Applied Physics...materials for on-wafer microwave devices concentrated on barium hexagonal ferrite (BaM) films grown on Si because these material is a good candidate

  8. Stability and imaging of the ASML EUV alpha demo tool

    NASA Astrophysics Data System (ADS)

    Hermans, Jan V.; Baudemprez, Bart; Lorusso, Gian; Hendrickx, Eric; van Dijk, Andre; Jonckheere, Rik; Goethals, Anne-Marie

    2009-03-01

    Extreme Ultra-Violet (EUV) lithography is the leading candidate for semiconductor manufacturing of the 22nm technology node and beyond, due to the very short wavelength of 13.5nm. However, reducing the wavelength adds complexity to the lithographic process. The impact of the EUV specific conditions on lithographic performance needs to be understood, before bringing EUV lithography into pre-production. To provide early learning on EUV, an EUV fullfield scanner, the Alpha Demo Tool (ADT) from ASML was installed at IMEC, using a Numerical Aperture (NA) of 0.25. In this paper we report on different aspects of the ADT: the imaging and overlay performance and both short and long-term stability. For 40nm dense Lines-Spaces (LS), the ADT shows an across field overlapping process window of 270nm Depth Of Focus (DOF) at 10% Exposure Latitude (EL) and a wafer CD Uniformity (CDU) of 3nm 3σ, without any corrections for process or reticle. The wafer CDU is correlated to different factors that are known to influence the CD fingerprint from traditional lithography: slit intensity uniformity, focus plane deviation and reticle CD error. Taking these contributions into account, the CD through slit fingerprint for 40nm LS is simulated with excellent agreement to experimental data. The ADT shows good CD stability over 9 months of operation, both intrafield and across wafer. The projection optics reflectivity has not degraded over 9 months. Measured overlay performance with respect to a dry tool shows |Mean|+3σ below 20nm with more correction potential by applying field-by-field corrections (|Mean|+3σ <=10nm). For 22nm SRAM application, both contact hole and metal layer were printed in EUV with 10% CD and 15nm overlay control. Below 40nm, the ADT shows good wafer CDU for 30nm dense and isolated lines (on the same wafer) and 38nm dense Contact Holes (CH). First 28nm dense line CDU data are achieved. The results indicate that the ADT can be used effectively for EUV process development

  9. Kerfless epitaxial silicon wafers with 7 ms carrier lifetimes and a wide lift-off process window

    NASA Astrophysics Data System (ADS)

    Gemmel, Catherin; Hensen, Jan; David, Lasse; Kajari-Schröder, Sarah; Brendel, Rolf

    2018-04-01

    Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm-3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.

  10. Design of an aid to visual inspection workstation

    NASA Astrophysics Data System (ADS)

    Tait, Robert; Harding, Kevin

    2016-05-01

    Visual Inspection is the most common means for inspecting manufactured parts for random defects such as pits, scratches, breaks, corrosion or general wear. The reason for the need for visual inspection is the very random nature of what might be a defect. Some defects may be very rare, being seen once or twice a year, but May still be critical to part performance. Because of this random and rare nature, even the most sophisticated image analysis programs have not been able to recognize all possible defects. Key to any future automation of inspection is obtaining good sample images of what might be a defect. However, most visual check take no images and consequently generate no digital data or historical record beyond a simple count. Any additional tool to captures such images must be able to do so without taking addition time. This paper outlines the design of a potential visual inspection station that would be compatible with current visual inspection methods, but afford the means for reliable digital imaging and in many cases augmented capabilities to assist the inspection. Considerations in this study included: resolution, depth of field, feature highlighting, and ease of digital capture, annotations and inspection augmentation for repeatable registration as well as operator assistance and training.

  11. The Novel Preparation of P-N Junction Mesa Diodes by Silicon-Wafer Direct Bonding (SDB)

    NASA Astrophysics Data System (ADS)

    Yeh, Ching-Fa; Hwangleu, Shyang

    1992-05-01

    The key processes of silicon-wafer direct bonding (SDB), including hydrophilic surface formation and optimal two-step heat treatment, have been developed However, H2SO4/H2O2 solution being a strong oxidized acid solution, native oxide is found to have grown on the wafer surface as soon as a wafer is treated in this solution. In the case of a wafer further treated in diluted HF solution after hydrophilic surface formation, it is shown that the wafer surface can not only be cleaned of its native oxide but also remains hydrophilic, and can provide excellent voidless bonding. The N+/P and N/P combination junction mesa diodes fabricated on the wafers prepared by these novel SDB technologies are examined. The ideality factor n of the N/P mesa diode is 2.4˜2.8 for the voltage range 0.2˜0.3 V; hence, the lowering of the ideality factor n is evidently achieved. As for the N+/P mesa diode, the ideality factor n shows a value of 1.10˜1.30 for the voltage range 0.2˜0.6 V; the low value of n is attributed to an autodoping phenomenon which has caused the junction interface to form in the P-silicon bulk. However, the fact that the sustaining voltage of the N/P mesa diode showed a value greater than 520 V reveals the effectiveness of our novel SDB processes.

  12. Industrial Inspection with Open Eyes: Advance with Machine Vision Technology

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Liu, Zheng; Ukida, H.; Niel, Kurt

    Machine vision systems have evolved significantly with the technology advances to tackle the challenges from modern manufacturing industry. A wide range of industrial inspection applications for quality control are benefiting from visual information captured by different types of cameras variously configured in a machine vision system. This chapter screens the state of the art in machine vision technologies in the light of hardware, software tools, and major algorithm advances for industrial inspection. The inspection beyond visual spectrum offers a significant complementary to the visual inspection. The combination with multiple technologies makes it possible for the inspection to achieve a bettermore » performance and efficiency in varied applications. The diversity of the applications demonstrates the great potential of machine vision systems for industry.« less

  13. SEMICONDUCTOR TECHNOLOGY: Material removal rate in chemical-mechanical polishing of wafers based on particle trajectories

    NASA Astrophysics Data System (ADS)

    Jianxiu, Su; Xiqu, Chen; Jiaxi, Du; Renke, Kang

    2010-05-01

    Distribution forms of abrasives in the chemical mechanical polishing (CMP) process are analyzed based on experimental results. Then the relationships between the wafer, the abrasive and the polishing pad are analyzed based on kinematics and contact mechanics. According to the track length of abrasives on the wafer surface, the relationships between the material removal rate and the polishing velocity are obtained. The analysis results are in accord with the experimental results. The conclusion provides a theoretical guide for further understanding the material removal mechanism of wafers in CMP.

  14. Silicon Hybrid Wafer Scale Integration Interconnect Evaluation

    DTIC Science & Technology

    1989-12-01

    perform Wafer Scale Integration on a routine basis is being vigorously pursued by a number of interests in military, academic , and commercial sectors...A iliciosi rip1 St -110 illic. (;11ptai / W. -a ;,tcd Ihat Ilesc hybhrid futl liods separiltely soI lie llixiiiul’upw~v~ ielts andl ~il (otii’ie thli

  15. Industrial applications of shearography for inspection of aircraft components

    NASA Astrophysics Data System (ADS)

    Krupka, Rene; Walz, Thomas; Ettemeyer, Andreas

    2005-04-01

    Shearography has been validated as fast and reliable inspection technique for aerospace components. Following several years phase of evaluation of the technique, meanwhile, shearography has entered the industrial production inspection. The applications basically range from serial inspection in the production line to field inspection in assembly and to applications in the maintenance and repair area. In all applications, the main advantages of shearography, as very fast and full field insection and high sensitivity even on very complex on composite materials have led to the decision for laser shearography as inspection tool. In this paper, we present some highlights of industrial shearography inspection. One of the first industrial installations of laser shearography in Europe was a fully automatic inspection system for helicopter rotorblades. Complete rotor blades are inspected within 10 minutes on delaminations and debondingg in the composite structure. In case of more complex components, robotic manipulation of the shearography camera has proven to be the optimal solution. An industry 6-axis robot give utmost flexibility to position the camera in any angle and distance. Automatic defect marking systems have also been introduced to indicate the exact position of the defect directly on the inspected component. Other applications are shearography inspection systems for abradable seals in jet engines and portable shearography inspection systems for maintenance and repair inspection in the field. In this paper, recent installations of automatice inspection systems in aerospace industries are presented.

  16. External self-gettering of nickel in float zone silicon wafers

    NASA Astrophysics Data System (ADS)

    Gay, N.; Martinuzzi, S.

    1997-05-01

    During indiffusion of Ni atoms in silicon crystals at 950 °C from a nickel layer source, Ni-Si alloys can be formed close to the surface. Metal solubility in these alloys is higher than in silicon, which induces a marked segregation gettering of the Ni atoms which have diffused in the bulk of the wafers. Consequently, the regions of the wafers covered with the Ni layer are less contaminated than adjacent regions in which Ni atoms have also penetrated, as shown by the absence of precipitates and the higher diffusion length of minority carriers. The results suggest the existence of external self-gettering of Ni atoms by the nickel source.

  17. Bulk lifetime characterization of corona charged silicon wafers with high resistivity by means of microwave detected photoconductivity

    NASA Astrophysics Data System (ADS)

    Engst, C. R.; Rommel, M.; Bscheid, C.; Eisele, I.; Kutter, C.

    2017-12-01

    Minority carrier lifetime (lifetime) measurements are performed on corona-charged silicon wafers by means of Microwave Detected Photoconductivity (MDP). The corona charge is deposited on the front and back sides of oxidized wafers in order to adjust accumulation conditions. Once accumulation is established, interface recombination is suppressed and bulk lifetimes are obtained. Neither contacts nor non-CMOS compatible preparation techniques are required in order to achieve accumulation conditions, which makes the method ideally suited for inline characterization. The novel approach, termed ChargedMDP (CMDP), is used to investigate neutron transmutation doped (NTD) float zone silicon with resistivities ranging from 6.0 to 8.2 kΩ cm. The bulk properties of 150 mm NTD wafers are analyzed in detail by performing measurements of the carrier lifetime and the steady-state photoconductivity at various injection levels. The results are compared with MDP measurements of uncharged wafers as well as to the established charged microwave detected Photoconductance Decay (charge-PCD) method. Besides analyzing whole wafers, CMDP measurements are performed on oxide test-structures on a patterned wafer. Finally, the oxide properties are characterized by means of charge-PCD as well as capacitance-voltage measurements. With CMDP, average bulk lifetimes up to 33.1 ms are measured, whereby significant variations are observed among wafers, which are produced out of the same ingot but oxidized in different furnaces. The observed lifetime variations are assumed to be caused by contaminations, which are introduced during the oxidation process. The results obtained by CMDP were neither accessible by means of conventional MDP measurements of uncharged wafers nor with the established charge-PCD method.

  18. Degradation of bare and silanized silicon wafer surfaces by constituents of biological fluids.

    PubMed

    Dekeyser, C M; Buron, C C; Derclaye, S R; Jonas, A M; Marchand-Brynaert, J; Rouxhet, P G

    2012-07-15

    The 24 h stability of bare silicon wafers as such or silanized with CH(3)O-(CH(2)-CH(2)-O)(n)-C(3)H(6)-trichlorosilane (n=6-9) was investigated in water, NaCl, phosphate and carbonate solutions, and in phosphate buffered saline (PBS) at 37 °C (close to biological conditions regarding temperature, high ionic strength, and pH). The resulting surfaces were analyzed using ellipsometry, X-ray Reflectometry (XRR), X-ray Photoelectron Spectroscopy (XPS), and Atomic Force Microscopy (AFM). Incubation of the silanized wafers in phosphate solution and PBS provokes a detachment of the silane layer. This is due to a hydrolysis of Si-O bonds which is favored by the action of phosphate, also responsible for a corrosion of non-silanized wafers. The surface alteration (detachment of silane layer and corrosion of the non-silanized wafer) is also important with carbonate solution, due to a higher pH (8.3). The protection of the silicon oxide layer brought by silane against the action of the salts is noticeable for phosphate but not for carbonate. Copyright © 2012 Elsevier Inc. All rights reserved.

  19. Preparation of wafer-level glass cavities by a low-cost chemical foaming process (CFP).

    PubMed

    Shang, Jintang; Chen, Boyin; Lin, Wei; Wong, Ching-Ping; Zhang, Di; Xu, Chao; Liu, Junwen; Huang, Qing-An

    2011-04-21

    A novel foaming process-chemical foaming process (CFP)-using foaming agents to fabricate wafer-level micro glass cavities including channels and bubbles was investigated. The process consists of the following steps sequentially: (1) shallow cavities were fabricated by a wet etching on a silicon wafer; (2) powders of a proper foaming agent were placed in a silicon cavity, named 'mother cavity', on the etched silicon surface; (3) the silicon cavities were sealed with a glass wafer by anodic bonding; (4) the bonded wafers were heated to above the softening point of the glass, and baked for several minutes, when the gas released by the decomposition of the foaming agent in the 'mother cavity' went into the other sealed interconnected silicon cavities to foam the softened glass into cylindrical channels named 'daughter channels', or spherical bubbles named 'son bubbles'. Results showed that wafer-level micro glass cavities with smooth wall surfaces were achieved successfully without contamination by the CFP. A model for the CFP was proposed to predict the final shape of the glass cavity. Experimental results corresponded with model predictions. The CFP provides a low-cost avenue to preparation of micro glass cavities of high quality for applications such as micro-reactors, micro total analysis systems (μTAS), analytical and bio-analytical applications, and MEMS packaging.

  20. Degradation of Gate Oxide Integrity by Formation of Tiny Holes by Metal Contamination of Raw Wafer

    NASA Astrophysics Data System (ADS)

    Chen, Po-Ying

    2008-12-01

    Heavy metal atoms (such as Cu) spontaneously undergo a dissolution reaction when they come into contact with silicon. Most investigations in this extensively studied area begin with a clean, bare wafer and focus on metal contamination during the IC manufacturing stage. In this work, the effect of Fe and Cu contamination on raw wafers was elucidated. When two batches of raw wafers are scheduled, one uncontaminated and one with various degrees of contamination ranging from 0.1 to 10 ppb undergo the typical steps of the 90 nm LOGIC complementary metal-oxide-semiconductor (CMOS) semiconductor manufacturing process. The main contribution of this work is the discovery of a previously unidentified cause of gate oxide leakage: the formation of tiny holes by metal contamination during the wafer manufacturing stage. Because tiny holes are formed, a spontaneous reaction can occur even with at very low metal concentration (0.2 ppb), revealing that the wafer manufacturing stage is more vulnerable to metal contamination than the IC manufacturing stage and therefore requires stricter contamination control.

  1. Proceedings of the Low-Cost Solar Array Wafering Workshop

    NASA Technical Reports Server (NTRS)

    Morrison, A. D.

    1982-01-01

    The technology and economics of silicon ingot wafering for low cost solar arrays were discussed. Fixed and free abrasive sawing wire, ID, and multiblade sawing, materials, mechanisms, characterization, and innovative concepts were considered.

  2. Development of Hand-Held Thermographic Inspection Technologies

    DOT National Transportation Integrated Search

    2009-09-01

    This study explored the application of hand-held thermographic cameras for the detection of subsurface delaminations in concrete bridges. The goal of the research was to provide maintenance and inspection personnel with an effective tool for detectin...

  3. Development of hand-held thermographic inspection technologies.

    DOT National Transportation Integrated Search

    2009-09-01

    This study explored the application of hand-held thermographic cameras for the detection of subsurface delaminations in concrete : bridges. The goal of the research was to provide maintenance and inspection personnel with an effective tool for detect...

  4. Neutron-based nonintrusive inspection techniques

    NASA Astrophysics Data System (ADS)

    Gozani, Tsahi

    1997-02-01

    Non-intrusive inspection of large objects such as trucks, sea-going shipping containers, air cargo containers and pallets is gaining attention as a vital tool in combating terrorism, drug smuggling and other violation of international and national transportation and Customs laws. Neutrons are the preferred probing radiation when material specificity is required, which is most often the case. Great strides have been made in neutron based inspection techniques. Fast and thermal neutrons, whether in steady state or in microsecond, or even nanosecond pulses are being employed to interrogate, at high speeds, for explosives, drugs, chemical agents, and nuclear and many other smuggled materials. Existing neutron techniques will be compared and their current status reported.

  5. Method for protecting chip corners in wet chemical etching of wafers

    DOEpatents

    Hui, Wing C.

    1994-01-01

    The present invention is a corner protection mask design that protects chip corners from undercutting during anisotropic etching of wafers. The corner protection masks abut the chip corner point and extend laterally from segments along one or both corner sides of the corner point, forming lateral extensions. The protection mask then extends from the lateral extensions, parallel to the direction of the corner side of the chip and parallel to scribe lines, thus conserving wafer space. Unmasked bomb regions strategically formed in the protection mask facilitate the break-up of the protection mask during etching. Corner protection masks are useful for chip patterns with deep grooves and either large or small chip mask areas. Auxiliary protection masks form nested concentric frames that etch from the center outward are useful for small chip mask patterns. The protection masks also form self-aligning chip mask areas. The present invention is advantageous for etching wafers with thin film windows, microfine and micromechanical structures, and for forming chip structures more elaborate than presently possible.

  6. Method for protecting chip corners in wet chemical etching of wafers

    DOEpatents

    Hui, W.C.

    1994-02-15

    The present invention is a corner protection mask design that protects chip corners from undercutting during anisotropic etching of wafers. The corner protection masks abut the chip corner point and extend laterally from segments along one or both corner sides of the corner point, forming lateral extensions. The protection mask then extends from the lateral extensions, parallel to the direction of the corner side of the chip and parallel to scribe lines, thus conserving wafer space. Unmasked bomb regions strategically formed in the protection mask facilitate the break-up of the protection mask during etching. Corner protection masks are useful for chip patterns with deep grooves and either large or small chip mask areas. Auxiliary protection masks form nested concentric frames that etch from the center outward are useful for small chip mask patterns. The protection masks also form self-aligning chip mask areas. The present invention is advantageous for etching wafers with thin film windows, microfine and micromechanical structures, and for forming chip structures more elaborate than presently possible. 63 figures.

  7. Comparison of line shortening assessed by aerial image and wafer measurements

    NASA Astrophysics Data System (ADS)

    Ziegler, Wolfram; Pforr, Rainer; Thiele, Joerg; Maurer, Wilhelm

    1997-02-01

    Increasing number of patterns per area and decreasing linewidth demand enhancement technologies for optical lithography. OPC, the correction of systematic non-linearity in the pattern transfer process by correction of design data is one possibility to tighten process control and to increase the lifetime of existing lithographic equipment. The two most prominent proximity effects to be corrected by OPC are CD variation and line shortening. Line shortening measured on a wafer is up to 2 times larger than full resist simulation results. Therefore, the influence of mask geometry to line shortening is a key item to parameterize lithography. The following paper discusses the effect of adding small serifs to line ends with 0.25 micrometer ground-rule design. For reticles produced on an ALTA 3000 with standard wet etch process, the corner rounding on them mask can be reduced by adding serifs of a certain size. The corner rounding was measured and the effect on line shortening on the wafer is determined. This was investigated by resist measurements on wafer, aerial image plus resist simulation and aerial image measurements on the AIMS microscope.

  8. Printability and inspectability of programmed pit defects on teh masks in EUV lithography

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kang, I.-Y.; Seo, H.-S.; Ahn, B.-S.

    2010-03-12

    Printability and inspectability of phase defects in ELlVL mask originated from substrate pit were investigated. For this purpose, PDMs with programmed pits on substrate were fabricated using different ML sources from several suppliers. Simulations with 32-nm HP L/S show that substrate pits with below {approx}20 nm in depth would not be printed on the wafer if they could be smoothed by ML process down to {approx}1 nm in depth on ML surface. Through the investigation of inspectability for programmed pits, minimum pit sizes detected by KLA6xx, AIT, and M7360 depend on ML smoothing performance. Furthermore, printability results for pit defectsmore » also correlate with smoothed pit sizes. AIT results for pattemed mask with 32-nm HP L/S represents that minimum printable size of pits could be {approx}28.3 nm of SEVD. In addition, printability of pits became more printable as defocus moves to (-) directions. Consequently, printability of phase defects strongly depends on their locations with respect to those of absorber patterns. This indicates that defect compensation by pattern shift could be a key technique to realize zero printable phase defects in EUVL masks.« less

  9. Process for the controlled growth of single-crystal films of silicon carbide polytypes on silicon carbide wafers

    NASA Technical Reports Server (NTRS)

    Powell, J. Anthony (Inventor)

    1991-01-01

    This invention is a method for the controlled growth of single-crystal semiconductor device quality films of SiC polytypes on vicinal (0001) SiC wafers with low tilt angles. Both homoepitaxial and heteroepitaxial SiC films can be produced on the same wafer. In particular, 3C-SiC and 6H-SiC films can be produced within selected areas of the same 6H-SiC wafer.

  10. Process for the controlled growth of single-crystal films of silicon carbide polytypes on silicon carbide wafers

    NASA Technical Reports Server (NTRS)

    Larkin, David J. (Inventor); Powell, J. Anthony (Inventor)

    1992-01-01

    A method for the controlled growth of single-crystal semiconductor-device-quality films of SiC polytypes on vicinal (0001) SiC wafers with low tilt angles is presented. Both homoepitaxial and heteroepitaxial SiC films can be produced on the same wafer. In particular, 3C-SiC and 6H-SiC films can be produced within selected areas of the same 6H-SiC wafer.

  11. Influence of Si wafer thinning processes on (sub)surface defects

    NASA Astrophysics Data System (ADS)

    Inoue, Fumihiro; Jourdain, Anne; Peng, Lan; Phommahaxay, Alain; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik; Beyne, Eric; Uedono, Akira

    2017-05-01

    Wafer-to-wafer three-dimensional (3D) integration with minimal Si thickness can produce interacting multiple devices with significantly scaled vertical interconnections. Realizing such a thin 3D structure, however, depends critically on the surface and subsurface of the remaining backside Si after the thinning processes. The Si (sub)surface after mechanical grinding has already been characterized fruitfully for a range of few dozen of μm. Here, we expand the characterization of Si (sub)surface to 5 μm thickness after thinning process on dielectric bonded wafers. The subsurface defects and damage layer were investigated after grinding, chemical mechanical polishing (CMP), wet etching and plasma dry etching. The (sub)surface defects were characterized using transmission microscopy, atomic force microscopy, and positron annihilation spectroscopy. Although grinding provides the fastest removal rate of Si, the surface roughness was not compatible with subsequent processing. Furthermore, mechanical damage such as dislocations and amorphous Si cannot be reduced regardless of Si thickness and thin wafer handling systems. The CMP after grinding showed excellent performance to remove this grinding damage, even though the removal amount is 1 μm. For the case of Si thinning towards 5 μm using grinding and CMP, the (sub)surface is atomic scale of roughness without vacancy. For the case of grinding + dry etch, vacancy defects were detected in subsurface around 0.5-2 μm. The finished surface after wet etch remains in the nm scale in the strain region. By inserting a CMP step in between grinding and dry etch it is possible to significantly reduce not only the roughness, but also the remaining vacancies at the subsurface. The surface of grinding + CMP + dry etching gives an equivalent mono vacancy result as to that of grinding + CMP. This combination of thinning processes allows development of extremely thin 3D integration devices with minimal roughness and vacancy surface.

  12. Cohesive zone modelling of wafer bonding and fracture: effect of patterning and toughness variations

    NASA Astrophysics Data System (ADS)

    Kubair, D. V.; Spearing, S. M.

    2006-03-01

    Direct wafer bonding has increasingly become popular in the manufacture of microelectromechanical systems and semiconductor microelectronics components. The success of the bonding process is controlled by variables such as wafer flatness and surface preparation. In order to understand the effects of these variables, spontaneous planar crack propagation simulations were performed using the spectral scheme in conjunction with a cohesive zone model. The fracture-toughness on the bond interface is varied to simulate the effect of surface roughness (nanotopography) and patterning. Our analysis indicated that the energetics of crack propagation is sensitive to the local surface property variations. The patterned wafers are tougher (well bonded) than the unpatterned ones of the same average fracture-toughness.

  13. Fabrication of wafer-scale nanopatterned sapphire substrate through phase separation lithography

    NASA Astrophysics Data System (ADS)

    Guo, Xu; Ni, Mengyang; Zhuang, Zhe; Dai, Jiangping; Wu, Feixiang; Cui, Yushuang; Yuan, Changsheng; Ge, Haixiong; Chen, Yanfeng

    2016-04-01

    A phase separation lithography (PSL) based on polymer blend provides an extremely simple, low-cost, and high-throughput way to fabricate wafer-scale disordered nanopatterns. This method was introduced to fabricate nanopatterned sapphire substrates (NPSSs) for GaN-based light-emitting diodes (LEDs). The PSL process only involved in spin-coating of polystyrene (PS)/polyethylene glycol (PEG) polymer blend on sapphire substrate and followed by a development with deionized water to remove PEG moiety. The PS nanoporous network was facilely obtained, and the structural parameters could be effectively tuned by controlling the PS/PEG weight ratio of the spin-coating solution. 2-in. wafer-scale NPSSs were conveniently achieved through the PS nanoporous network in combination with traditional nanofabrication methods, such as O2 reactive ion etching (RIE), e-beam evaporation deposition, liftoff, and chlorine-based RIE. In order to investigate the performance of such NPSSs, typical blue LEDs with emission wavelengths of ~450 nm were grown on the NPSS and a flat sapphire substrate (FSS) by metal-organic chemical vapor deposition, respectively. The integral photoluminescence (PL) intensity of the NPSS LED was enhanced by 32.3 % compared to that of the FSS-LED. The low relative standard deviation of 4.7 % for PL mappings of NPSS LED indicated the high uniformity of PL data across the whole 2-in. wafer. Extremely simple, low cost, and high throughput of the process and the ability to fabricate at the wafer scale make PSL a potential method for production of nanopatterned sapphire substrates.

  14. Photomask quality evaluation using lithography simulation and multi-detector MVM-SEM

    NASA Astrophysics Data System (ADS)

    Ito, Keisuke; Murakawa, Tsutomu; Fukuda, Naoki; Shida, Soichi; Iwai, Toshimichi; Matsumoto, Jun; Nakamura, Takayuki; Matsushita, Shohei; Hagiwara, Kazuyuki; Hara, Daisuke

    2013-06-01

    The detection and management of mask defects which are transferred onto wafer becomes more important day by day. As the photomask patterns becomes smaller and more complicated, using Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO) with Optical Proximity Correction (OPC). To evaluate photomask quality, the current method uses aerial imaging by optical inspection tools. This technique at 1Xnm node has a resolution limit because small defects will be difficult to detect. We already reported the MEEF influence of high-end photomask using wide FOV SEM contour data of "E3630 MVM-SEM®" and lithography simulator "TrueMask® DS" of D2S Inc. in the prior paper [1]. In this paper we evaluate the correlation between our evaluation method and optical inspection tools as ongoing assessment. Also in order to reduce the defect classification work, we can compose the 3 Dimensional (3D) information of defects and can judge whether repairs of defects would be required. Moreover, we confirm the possibility of wafer plane CD measurement based on the combination between E3630 MVM-SEM® and 3D lithography simulation.

  15. Contacting graphene in a 200 mm wafer silicon technology environment

    NASA Astrophysics Data System (ADS)

    Lisker, Marco; Lukosius, Mindaugas; Kitzmann, Julia; Fraschke, Mirko; Wolansky, Dirk; Schulze, Sebastian; Lupina, Grzegorz; Mai, Andreas

    2018-06-01

    Two different approaches for contacting graphene in a 200 mm wafer silicon technology environment were tested. The key is the opportunity to create a thin SiN passivation layer on top of the graphene protecting it from the damage by plasma processes. The first approach uses pure Ni contacts with a thickness of 200 nm. For the second attempt, Ni is used as the contact metal which substitutes the Ti compared to a standard contact hole filling process. Accordingly, the contact hole filling of this "stacked via" approach is Ni/TiN/W. We demonstrate that the second "stacked Via" is beneficial and shows contact resistances of a wafer scale process with values below 200 Ohm μm.

  16. Alignment-enhancing feed-through conductors for stackable silicon-on-sapphire wafers

    NASA Technical Reports Server (NTRS)

    Anthony, Thomas R. (Inventor)

    1983-01-01

    Alignment-enhancing electrically conductive feed-through paths are provided for the high-speed low-loss transfer of electrical signals between integrated circuits of a plurality of silicon-on-sapphire bodies arrayed in a stack. The alignment-enhancing feed-throughs are made by a process involving the drilling of holes through the body, double-sided sputtering, electroplating, and the filling of the holes with solder by capillary action. The alignment-enhancing feed-throughs are activated by forming a stack of wafers and remelting the solder whereupon the wafers, and the feed-through paths, are pulled into alignment by surface tension forces.

  17. 1.3-microm optically-pumped semiconductor disk laser by wafer fusion.

    PubMed

    Lyytikäinen, Jari; Rautiainen, Jussi; Toikkanen, Lauri; Sirbu, Alexei; Mereuta, Alexandru; Caliman, Andrei; Kapon, Eli; Okhotnikov, Oleg G

    2009-05-25

    We report a wafer-fused high power optically-pumped semiconductor disk laser operating at 1.3 microm. An InP-based active medium was fused with a GaAs/AlGaAs distributed Bragg reflector, resulting in an integrated monolithic gain mirror. Over 2.7 W of output power, obtained at temperature of 15 degrees C, represents the best achievement reported to date for this type of lasers. The results reveal an essential advantage of the wafer fusing technique over both monolithically grown AlGaInAs/GaInAsP- and GaInNAs-based structures.

  18. SL2+: H5 use case

    NASA Astrophysics Data System (ADS)

    Ito, Kosuke; Liu, Steven; Lee, Isaac; Dover, Russell; Yu, Paul

    2008-10-01

    Photomask contamination inspections, whether performed at maskshops as an outgoing inspection or at wafer fabs for incoming shipping and handling or progressive defect monitoring, have been performed by KLA-Tencor STARlight systems for a number of design nodes. STARlight has evolved since it first appeared on the 3xx generation of KLA-Tencor mask inspection tools. It was improved with the TeraStar (also known as SLF) based tools with the SL1 algorithm. SL2 first appeared on the TeraScan systems (also known as 5xx) and has been widely adopted in both mask shops and wafer fabs. Design rules continue to advance as do inspection challenges. Advances in computer processing power have enabled more complex and powerful algorithms to be developed and applied to the STARlight technology. The current generation of STARlight, which is known as SL2+, implements improved modeling fidelity as well as a completely new paradigm to the existing STARlight technology known as HiRes5, or simply "H5". H5 is integrated seamlessly within SL2+ and provides die-to-die-like performance in both transmitted and reflected light, in addition to the STARlight detection, in unit time. It achieves this by automatically identifying repeating structures in both X and Y directions and applying image alignment and difference threshold. A leading mask shop partnered with KLA-Tencor in order to evaluate SL2+ at its facility. SL2+ demonstrated a high level of sensitivity on all test reticles, with good inspectability on advanced production reticles. High sensitivity settings were used for 45 nm HP and smaller design rule masks and low false detections were achieved. H5 provided additional sensitivity on production plates, demonstrating the ability to extend the use of SL2+ to cover 32 nm DR plate inspections. This paper reports the findings and results of this evaluation.

  19. Wafer-scale growth of VO2 thin films using a combinatorial approach

    PubMed Central

    Zhang, Hai-Tian; Zhang, Lei; Mukherjee, Debangshu; Zheng, Yuan-Xia; Haislmaier, Ryan C.; Alem, Nasim; Engel-Herbert, Roman

    2015-01-01

    Transition metal oxides offer functional properties beyond conventional semiconductors. Bridging the gap between the fundamental research frontier in oxide electronics and their realization in commercial devices demands a wafer-scale growth approach for high-quality transition metal oxide thin films. Such a method requires excellent control over the transition metal valence state to avoid performance deterioration, which has been proved challenging. Here we present a scalable growth approach that enables a precise valence state control. By creating an oxygen activity gradient across the wafer, a continuous valence state library is established to directly identify the optimal growth condition. Single-crystalline VO2 thin films have been grown on wafer scale, exhibiting more than four orders of magnitude change in resistivity across the metal-to-insulator transition. It is demonstrated that ‘electronic grade' transition metal oxide films can be realized on a large scale using a combinatorial growth approach, which can be extended to other multivalent oxide systems. PMID:26450653

  20. Wafer defect detection by a polarization-insensitive external differential interference contrast module.

    PubMed

    Nativ, Amit; Feldman, Haim; Shaked, Natan T

    2018-05-01

    We present a system that is based on a new external, polarization-insensitive differential interference contrast (DIC) module specifically adapted for detecting defects in semiconductor wafers. We obtained defect signal enhancement relative to the surrounding wafer pattern when compared with bright-field imaging. The new DIC module proposed is based on a shearing interferometer that connects externally at the output port of an optical microscope and enables imaging thin samples, such as wafer defects. This module does not require polarization optics (such as Wollaston or Nomarski prisms) and is insensitive to polarization, unlike traditional DIC techniques. In addition, it provides full control of the DIC shear and orientation, which allows obtaining a differential phase image directly on the camera (with no further digital processing) while enhancing defect detection capabilities, even if the size of the defect is smaller than the resolution limit. Our technique has the potential of future integration into semiconductor production lines.

  1. Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals

    NASA Astrophysics Data System (ADS)

    Carey, Benjamin J.; Ou, Jian Zhen; Clark, Rhiannon M.; Berean, Kyle J.; Zavabeti, Ali; Chesman, Anthony S. R.; Russo, Salvy P.; Lau, Desmond W. M.; Xu, Zai-Quan; Bao, Qiaoliang; Kevehei, Omid; Gibson, Brant C.; Dickey, Michael D.; Kaner, Richard B.; Daeneke, Torben; Kalantar-Zadeh, Kourosh

    2017-02-01

    A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (~1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes.

  2. Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals.

    PubMed

    Carey, Benjamin J; Ou, Jian Zhen; Clark, Rhiannon M; Berean, Kyle J; Zavabeti, Ali; Chesman, Anthony S R; Russo, Salvy P; Lau, Desmond W M; Xu, Zai-Quan; Bao, Qiaoliang; Kevehei, Omid; Gibson, Brant C; Dickey, Michael D; Kaner, Richard B; Daeneke, Torben; Kalantar-Zadeh, Kourosh

    2017-02-17

    A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (∼1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes.

  3. Wafer-scale two-dimensional semiconductors from printed oxide skin of liquid metals

    PubMed Central

    Carey, Benjamin J.; Ou, Jian Zhen; Clark, Rhiannon M.; Berean, Kyle J.; Zavabeti, Ali; Chesman, Anthony S. R.; Russo, Salvy P.; Lau, Desmond W. M.; Xu, Zai-Quan; Bao, Qiaoliang; Kavehei, Omid; Gibson, Brant C.; Dickey, Michael D.; Kaner, Richard B.; Daeneke, Torben; Kalantar-Zadeh, Kourosh

    2017-01-01

    A variety of deposition methods for two-dimensional crystals have been demonstrated; however, their wafer-scale deposition remains a challenge. Here we introduce a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds by transforming the native interfacial metal oxide layer of low melting point metal precursors (group III and IV) in liquid form. In an oxygen-containing atmosphere, these metals establish an atomically thin oxide layer in a self-limiting reaction. The layer increases the wettability of the liquid metal placed on oxygen-terminated substrates, leaving the thin oxide layer behind. In the case of liquid gallium, the oxide skin attaches exclusively to a substrate and is then sulfurized via a relatively low temperature process. By controlling the surface chemistry of the substrate, we produce large area two-dimensional semiconducting GaS of unit cell thickness (∼1.5 nm). The presented deposition and patterning method offers great commercial potential for wafer-scale processes. PMID:28211538

  4. Wave-front propagation of rinsing flows on rotating semiconductor wafers

    NASA Astrophysics Data System (ADS)

    Frostad, John M.; Ylitalo, Andy; Walls, Daniel J.; Mui, David S. L.; Fuller, Gerald G.

    2016-11-01

    The semiconductor manufacturing industry is migrating to a cleaning technology that involves dispersing cleaning solutions onto a rotating wafer, similar to spin-coating. Advantages include a more continuous overall fabrication process, lower particle level, no cross contamination from the back side of a wafer, and less usage of harsh chemicals for a lower environmental impact. Rapid rotation of the wafer during rinsing can be more effective, but centrifugal forces can pull spiral-like ribbons of liquid radially outward from the advancing wave-front where particles can build up, causing higher instances of device failure at these locations. A better understanding of the rinsing flow is essential for reducing yield losses while taking advantage of the benefits of rotation. In the present work, high-speed video and image processing are used to study the dynamics of the advancing wave-front from an impinging jet on a rotating substrate. The flow-rate and rotation-speed are varied for substrates coated with a thin layer of a second liquid that has a different surface tension than the jet liquid. The difference in surface tension of the two fluids gives rise to Marangoni stresses at the interface that have a significant impact on the rinsing process, despite the extremely short time-scales involved.

  5. Finite element analysis simulations for ultrasonic array NDE inspections

    NASA Astrophysics Data System (ADS)

    Dobson, Jeff; Tweedie, Andrew; Harvey, Gerald; O'Leary, Richard; Mulholland, Anthony; Tant, Katherine; Gachagan, Anthony

    2016-02-01

    Advances in manufacturing techniques and materials have led to an increase in the demand for reliable and robust inspection techniques to maintain safety critical features. The application of modelling methods to develop and evaluate inspections is becoming an essential tool for the NDE community. Current analytical methods are inadequate for simulation of arbitrary components and heterogeneous materials, such as anisotropic welds or composite structures. Finite element analysis software (FEA), such as PZFlex, can provide the ability to simulate the inspection of these arrangements, providing the ability to economically prototype and evaluate improved NDE methods. FEA is often seen as computationally expensive for ultrasound problems however, advances in computing power have made it a more viable tool. This paper aims to illustrate the capability of appropriate FEA to produce accurate simulations of ultrasonic array inspections - minimizing the requirement for expensive test-piece fabrication. Validation is afforded via corroboration of the FE derived and experimentally generated data sets for a test-block comprising 1D and 2D defects. The modelling approach is extended to consider the more troublesome aspects of heterogeneous materials where defect dimensions can be of the same length scale as the grain structure. The model is used to facilitate the implementation of new ultrasonic array inspection methods for such materials. This is exemplified by considering the simulation of ultrasonic NDE in a weld structure in order to assess new approaches to imaging such structures.

  6. New getter configuration at wafer level for assuring long term stability of MEMs

    NASA Astrophysics Data System (ADS)

    Moraja, Marco; Amiotti, Marco; Kullberg, Richard C.

    2003-01-01

    The evolution from ceramic packages to wafer to wafer hermetic sealing poses tremendous technical challenges to integrate a proper getter inside the MEMs to assure a long term stability and reliability of the devices. The state of the art solution to integrate a getter inside the MEMs of the last generation consists in patterning the getter material with a specific geometry onto the Si cap wafer. The practical implementation of this solution consists in a 4" or 6" Si wafers with grooves or particular incisures, where the getter material is placed in form of a thick film. The typical thickness of these thick films is in the range of few microns, depending on the gas load to be handled during the lifetime of the device. The structure of the thick getter film is highly porous in order to improve sorption performances, but at the same time there are no loose particles thanks to a proprietary manufacturing method. The getter thick film is composed of a Zr special alloy with a proper composition to optimize the sorption performances. The getter thick film can be placed selectively into grooves without affecting the lateral regions, surrounding the grooves where the hermetic sealing is performed.

  7. Camera-Based Lock-in and Heterodyne Carrierographic Photoluminescence Imaging of Crystalline Silicon Wafers

    NASA Astrophysics Data System (ADS)

    Sun, Q. M.; Melnikov, A.; Mandelis, A.

    2015-06-01

    Carrierographic (spectrally gated photoluminescence) imaging of a crystalline silicon wafer using an InGaAs camera and two spread super-bandgap illumination laser beams is introduced in both low-frequency lock-in and high-frequency heterodyne modes. Lock-in carrierographic images of the wafer up to 400 Hz modulation frequency are presented. To overcome the frame rate and exposure time limitations of the camera, a heterodyne method is employed for high-frequency carrierographic imaging which results in high-resolution near-subsurface information. The feasibility of the method is guaranteed by the typical superlinearity behavior of photoluminescence, which allows one to construct a slow enough beat frequency component from nonlinear mixing of two high frequencies. Intensity-scan measurements were carried out with a conventional single-element InGaAs detector photocarrier radiometry system, and the nonlinearity exponent of the wafer was found to be around 1.7. Heterodyne images of the wafer up to 4 kHz have been obtained and qualitatively analyzed. With the help of the complementary lock-in and heterodyne modes, camera-based carrierographic imaging in a wide frequency range has been realized for fundamental research and industrial applications toward in-line nondestructive testing of semiconductor materials and devices.

  8. Wafer-Scale Integration of Systolic Arrays,

    DTIC Science & Technology

    1985-10-01

    hus wtha rbaiith hig robabili, e aubrbe orutysta mostck b(e)adstotoefwsi the cenofther cnnel thati are connted to (g.The kery ato the alevel of t...problems considered heretofore in this paper also have an interpretation in a purely graph theoretic model. Suppose we are given a two-dimensional...graphs," Magyar 7Td. Akad. Math . Kut. Int. Kozl, Vol. 5, 1960, pp. 17-61. [6] D. Fussell and P. Varman, "Fault-tolerant wafer-scale architectures for

  9. Study of a risk-based piping inspection guideline system.

    PubMed

    Tien, Shiaw-Wen; Hwang, Wen-Tsung; Tsai, Chih-Hung

    2007-02-01

    A risk-based inspection system and a piping inspection guideline model were developed in this study. The research procedure consists of two parts--the building of a risk-based inspection model for piping and the construction of a risk-based piping inspection guideline model. Field visits at the plant were conducted to develop the risk-based inspection and strategic analysis system. A knowledge-based model had been built in accordance with international standards and local government regulations, and the rational unified process was applied for reducing the discrepancy in the development of the models. The models had been designed to analyze damage factors, damage models, and potential damage positions of piping in the petrochemical plants. The purpose of this study was to provide inspection-related personnel with the optimal planning tools for piping inspections, hence, to enable effective predictions of potential piping risks and to enhance the better degree of safety in plant operations that the petrochemical industries can be expected to achieve. A risk analysis was conducted on the piping system of a petrochemical plant. The outcome indicated that most of the risks resulted from a small number of pipelines.

  10. Eddy current inspection tool which is selectively operable in a discontinuity detection mode and a discontinuity magnitude mode

    DOEpatents

    Petrini, Richard R.; Van Lue, Dorin F.

    1983-01-01

    A miniaturized inspection tool, for testing and inspection of metal objects in locations with difficult accessibility, which comprises eddy current sensing equipment (12) with a probe coil (11), and associated coaxial coil cable (13), coil energizing means (21), and circuit means (21, 12) responsive to impedance changes in the coil as effected by induced eddy currents in a test object to produce a data output signal proportional to such changes. The coil and cable are slideably received in the utility channel of the flexible insertion tube 17 of fiberoptic scope 10. The scope 10 is provided with light transmitting and receiving fiberoptics for viewing through the flexible tube, and articulation means (19, 20) for articulating the distal end of the tube and permitting close control of coil placement relative to a test object. The eddy current sensing equipment includes a tone generator 30 for generating audibly signals responsive to the data output signal. In one selected mode of operation, the tone generator responsive to the output signal above a selected level generates a constant single frequency tone for signalling detection of a discontinuity and, in a second selected mode, generates a tone whose frequency is proportional to the difference between the output signal and a predetermined selected threshold level.

  11. Eddy current inspection tool which is selectively operable in a discontinuity detection mode and a discontinuity magnitude mode

    DOEpatents

    Petrini, R.R.; Van Lue, D.F.

    1983-10-25

    A miniaturized inspection tool, for testing and inspection of metal objects in locations with difficult accessibility, which comprises eddy current sensing equipment with a probe coil, and associated coaxial coil cable, coil energizing means, and circuit means responsive to impedance changes in the coil as effected by induced eddy currents in a test object to produce a data output signal proportional to such changes. The coil and cable are slideably received in the utility channel of the flexible insertion tube of fiberoptic scope. The scope is provided with light transmitting and receiving fiberoptics for viewing through the flexible tube, and articulation means for articulating the distal end of the tube and permitting close control of coil placement relative to a test object. The eddy current sensing equipment includes a tone generator 30 for generating audibly signals responsive to the data output signal. In one selected mode of operation, the tone generator responsive to the output signal above a selected level generates a constant single frequency tone for signaling detection of a discontinuity and, in a second selected mode, generates a tone whose frequency is proportional to the difference between the output signal and a predetermined selected threshold level. 5 figs.

  12. Optical surface contouring for non-destructive inspection of turbomachinery

    NASA Astrophysics Data System (ADS)

    Modarress, Dariush; Schaack, David F.

    1994-03-01

    Detection of stress cracks and other surface defects during maintenance and in-service inspection of propulsion system components, including turbine blades and combustion compartments, is presently performed visually. There is a need for a non-contact, miniaturized, and fully fieldable instrument that may be used as an automated inspection tool for inspection of aircraft engines. During this SBIR Phase 1 program, the feasibility of a ruggedized optical probe for automatic and nondestructive inspection of complex shaped objects will be established. Through a careful analysis of the measurement requirements, geometrical and optical constraints, and consideration of issues such as manufacturability, compactness, simplicity, and cost, one or more conceptual optical designs will be developed. The proposed concept will be further developed and a prototype will be fabricated during Phase 2.

  13. Optical surface contouring for non-destructive inspection of turbomachinery

    NASA Technical Reports Server (NTRS)

    Modarress, Dariush; Schaack, David F.

    1994-01-01

    Detection of stress cracks and other surface defects during maintenance and in-service inspection of propulsion system components, including turbine blades and combustion compartments, is presently performed visually. There is a need for a non-contact, miniaturized, and fully fieldable instrument that may be used as an automated inspection tool for inspection of aircraft engines. During this SBIR Phase 1 program, the feasibility of a ruggedized optical probe for automatic and nondestructive inspection of complex shaped objects will be established. Through a careful analysis of the measurement requirements, geometrical and optical constraints, and consideration of issues such as manufacturability, compactness, simplicity, and cost, one or more conceptual optical designs will be developed. The proposed concept will be further developed and a prototype will be fabricated during Phase 2.

  14. Switchable static friction of piezoelectric composite—silicon wafer contacts

    NASA Astrophysics Data System (ADS)

    van den Ende, D. A.; Fischer, H. R.; Groen, W. A.; van der Zwaag, S.

    2013-04-01

    The meso-scale surface roughness of piezoelectric fiber composites can be manipulated by applying an electric field to a piezocomposite with a polished surface. In the absence of an applied voltage, the tips of the embedded piezoelectric ceramic fibers are below the surface of the piezocomposite and a silicon wafer counter surface rests solely on the matrix region of the piezocomposite surface. When actuated, the piezoelectric ceramic fibers protrude from the surface and the wafer rests solely on these protrusions. A threefold decrease in engineering static friction coefficient upon actuation of the piezocomposite was observed: from μ* = 1.65 to μ* = 0.50. These experimental results could be linked to the change in contact surface area and roughness using capillary adhesion theory, which relates the adhesive force to the number and size of the contacting asperities for the different surface states.

  15. Preliminary results for mask metrology using spatial heterodyne interferometry

    NASA Astrophysics Data System (ADS)

    Bingham, Philip R.; Tobin, Kenneth; Bennett, Marylyn H.; Marmillion, Pat

    2003-12-01

    Spatial heterodyne interferometry (SHI) is an imaging technique that captures both the phase and amplitude of a complex wavefront in a single high-speed image. This technology was developed at the Oak Ridge National Laboratory (ORNL) and is currently being implemented for semiconductor wafer inspection by nLine Corporation. As with any system that measures phase, metrology and inspection of surface structures is possible by capturing a wavefront reflected from the surface. The interpretation of surface structure heights for metrology applications can become very difficult with the many layers of various materials used on semiconductor wafers, so inspection (defect detection) has been the primary focus for semiconductor wafers. However, masks used for photolithography typically only contain a couple well-defined materials opening the doors to high-speed mask metrology in 3 dimensions in addition to inspection. Phase shift masks often contain structures etched out of the transparent substrate material for phase shifting. While these structures are difficult to inspect using only intensity, the phase and amplitude images captured with SHI can produce very good resolution of these structures. The phase images also provide depth information that is crucial for these phase shift regions. Preliminary testing has been performed to determine the feasibility of SHI for high-speed non-contact mask metrology using a prototype SHI system with 532 nm wavelength illumination named the Visible Alpha Tool (VAT). These results show that prototype SHI system is capable of performing critical dimension measurements on 400nm lines with a repeatability of 1.4nm and line height measurements with a repeatability of 0.26nm. Additionally initial imaging of an alternating aperture phase shift mask has shown the ability of SHI to discriminate between typical phase shift heights.

  16. Affordable housing and health: a health impact assessment on physical inspection frequency.

    PubMed

    Klein, Elizabeth G; Keller, Brittney; Hood, Nancy; Holtzen, Holly

    2015-01-01

    To characterize the prevalence of health-related housing quality exposure for the vulnerable populations that live in affordable housing. Retrospective cross-sectional study. Affordable housing properties in Ohio inspected between 2007 and 2011. Stratified random sample of physical inspection reports (n = 370), including a case study of properties receiving multiple inspections (n = 35). Health-related housing factors, including mold, fire hazard, and others. The majority of affordable housing property inspections (85.1%) included at least 1 health-related housing quality issue. The prevalence of specific health-related violations was varied, with appliance and plumbing issues being the most common, followed by fire, mold, and pest violations. Across funding agencies, the actual implementation of inspection protocols differed. The majority of physical inspections identified housing quality issues that have the potential to impact human health. If the frequency of physical inspections is reduced as a result of inspection alignment, the most health protective inspection protocol should be selected for funding agency inspections; a standardized physical inspection tool is recommended to improve the consistency of inspection findings between mandatory physical inspections in order to promote optimum tenant health.

  17. Sulfur passivation techniques for III-V wafer bonding

    NASA Astrophysics Data System (ADS)

    Jackson, Michael James

    The use of direct wafer bonding in a multijunction III-V solar cell structure requires the formation of a low resistance bonded interface with minimal thermal treatment. A wafer bonded interface behaves as two independent surfaces in close proximity, hence a major source of resistance is Fermi level pinning common in III-V surfaces. This study demonstrates the use of sulfur passivation in III-V wafer bonding to reduce the energy barrier at the interface. Two different sulfur passivation processes are addressed. A dry sulfur passivation method that utilizes elemental sulfur vapor activated by ultraviolet light in vacuum is compared with aqueous sulfide and native oxide etch treatments. Through the addition of a sulfur desorption step in vacuum, the UV-S treatment achieves bondable surfaces free of particles contamination or surface roughening. X-ray photoelectron spectroscopy measurements of the sulfur treated GaAs surfaces find lower levels of oxide and the appearance of sulfide species. After 4 hrs of air exposure, the UV-S treated GaAs actually showed an increase in the amount of sulfide bonded to the semiconductor, resulting in less oxidation compared to the aqueous sulfide treatment. Large area bonding is achieved for sulfur treated GaAs / GaAs and InP / InP with bulk fracture strength achieved after annealing at 400 °C and 300 °C respectively, without large compressive forces. The electrical conductivity across a sulfur treated 400 °C bonded n-GaAs/n-GaAs interface significantly increased with a short anneal (1-2 minutes) at elevated temperatures (50--600 °C). Interfaces treated with the NH4OH oxide etch, on the other hand, exhibited only mild improvement in accordance with previously published studies in this area. TEM and STEM images revealed similar interfacial microstructure changes with annealing for both sulfur treated and NH4OH interfaces, whereby some areas have direct semiconductor-semiconductor contact without any interfacial layer. Fitting the

  18. Wafer-scale aluminum nano-plasmonics

    NASA Astrophysics Data System (ADS)

    George, Matthew C.; Nielson, Stew; Petrova, Rumyana; Frasier, James; Gardner, Eric

    2014-09-01

    The design, characterization, and optical modeling of aluminum nano-hole arrays are discussed for potential applications in surface plasmon resonance (SPR) sensing, surface-enhanced Raman scattering (SERS), and surface-enhanced fluorescence spectroscopy (SEFS). In addition, recently-commercialized work on narrow-band, cloaked wire grid polarizers composed of nano-stacked metal and dielectric layers patterned over 200 mm diameter wafers for projection display applications is reviewed. The stacked sub-wavelength nanowire grid results in a narrow-band reduction in reflectance by 1-2 orders of magnitude, which can be tuned throughout the visible spectrum for stray light control.

  19. Oblique Aerial Photography Tool for Building Inspection and Damage Assessment

    NASA Astrophysics Data System (ADS)

    Murtiyoso, A.; Remondino, F.; Rupnik, E.; Nex, F.; Grussenmeyer, P.

    2014-11-01

    Aerial photography has a long history of being employed for mapping purposes due to some of its main advantages, including large area imaging from above and minimization of field work. Since few years multi-camera aerial systems are becoming a practical sensor technology across a growing geospatial market, as complementary to the traditional vertical views. Multi-camera aerial systems capture not only the conventional nadir views, but also tilted images at the same time. In this paper, a particular use of such imagery in the field of building inspection as well as disaster assessment is addressed. The main idea is to inspect a building from four cardinal directions by using monoplotting functionalities. The developed application allows to measure building height and distances and to digitize man-made structures, creating 3D surfaces and building models. The realized GUI is capable of identifying a building from several oblique points of views, as well as calculates the approximate height of buildings, ground distances and basic vectorization. The geometric accuracy of the results remains a function of several parameters, namely image resolution, quality of available parameters (DEM, calibration and orientation values), user expertise and measuring capability.

  20. Fabricating capacitive micromachined ultrasonic transducers with a novel silicon-nitride-based wafer bonding process.

    PubMed

    Logan, Andrew; Yeow, John T W

    2009-05-01

    We report the fabrication and experimental testing of 1-D 23-element capacitive micromachined ultrasonic transducer (CMUT) arrays that have been fabricated using a novel wafer-bonding process whereby the membrane and the insulation layer are both silicon nitride. The membrane and cell cavities are deposited and patterned on separate wafers and fusion-bonded in a vacuum environment to create CMUT cells. A user-grown silicon-nitride membrane layer avoids the need for expensive silicon-on-insulator (SOI) wafers, reduces parasitic capacitance, and reduces dielectric charging. It allows more freedom in selecting the membrane thickness while also providing the benefits of wafer-bonding fabrication such as excellent fill factor, ease of vacuum sealing, and a simplified fabrication process when compared with the more standard sacrificial release process. The devices fabricated have a cell diameter of 22 microm, a membrane thickness of 400 nm, a gap depth of 150 nm, and an insulation thickness of 250 nm. The resonant frequency of the CMUT in air is 17 MHz and has an attenuation compensated center frequency of approximately 9 MHz in immersion with a -6 dB fractional bandwidth of 123%. This paper presents the fabrication process and some characterization results.

  1. Design Expert Supported Mathematical Optimization and Predictability Study of Buccoadhesive Pharmaceutical Wafers of Loratadine

    PubMed Central

    Dey, Surajit; Parcha, Versha; Bhattacharya, Shiv Sankar; Ghosh, Amitava

    2013-01-01

    Objective. The objective of this work encompasses the application of the response surface approach in the development of buccoadhesive pharmaceutical wafers of Loratadine (LOR). Methods. Experiments were performed according to a 32 factorial design to evaluate the effects of buccoadhesive polymer, sodium alginate (A), and lactose monohydrate as ingredient, of hydrophilic matrix former (B) on the bioadhesive force, disintegration time, percent (%) swelling index, and time taken for 70% drug release (t 70%). The effect of the two independent variables on the response variables was studied by response surface plots and contour plots generated by the Design-Expert software. The desirability function was used to optimize the response variables. Results. The compatibility between LOR and the wafer excipients was confirmed by differential scanning calorimetry, FTIR spectroscopy, and X-ray diffraction (XRD) analysis. Bioadhesion force, measured with TAXT2i texture analyzer, showed that the wafers had a good bioadhesive property which could be advantageous for retaining the drug into the buccal cavity. Conclusion. The observed responses taken were in agreement with the experimental values, and Loratadine wafers were produced with less experimental trials, and a patient compliant product was achieved with the concept of formulation by design. PMID:23781498

  2. Understanding EUV mask blank surface roughness induced LWR and associated roughness requirement

    NASA Astrophysics Data System (ADS)

    Yan, Pei-Yang; Zhang, Guojing; Gullikson, Eric M.; Goldberg, Ken A.; Benk, Markus P.

    2015-03-01

    Extreme ultraviolet lithography (EUVL) mask multi-layer (ML) blank surface roughness specification historically comes from blank defect inspection tool requirement. Later, new concerns on ML surface roughness induced wafer pattern line width roughness (LWR) arise. In this paper, we have studied wafer level pattern LWR as a function of EUVL mask surface roughness via High-NA Actinic Reticle Review Tool. We found that the blank surface roughness induced LWR at current blank roughness level is in the order of 0.5nm 3σ for NA=0.42 at the best focus. At defocus of ±40nm, the corresponding LWR will be 0.2nm higher. Further reducing EUVL mask blank surface roughness will increase the blank cost with limited benefit in improving the pattern LWR, provided that the intrinsic resist LWR is in the order of 1nm and above.

  3. Automatic vision-based grain optimization and analysis of multi-crystalline solar wafers using hierarchical region growing

    NASA Astrophysics Data System (ADS)

    Fan, Shu-Kai S.; Tsai, Du-Ming; Chuang, Wei-Che

    2017-04-01

    Solar power has become an attractive alternative source of energy. The multi-crystalline solar cell has been widely accepted in the market because it has a relatively low manufacturing cost. Multi-crystalline solar wafers with larger grain sizes and fewer grain boundaries are higher quality and convert energy more efficiently than mono-crystalline solar cells. In this article, a new image processing method is proposed for assessing the wafer quality. An adaptive segmentation algorithm based on region growing is developed to separate the closed regions of individual grains. Using the proposed method, the shape and size of each grain in the wafer image can be precisely evaluated. Two measures of average grain size are taken from the literature and modified to estimate the average grain size. The resulting average grain size estimate dictates the quality of the crystalline solar wafers and can be considered a viable quantitative indicator of conversion efficiency.

  4. Material requirements for the adoption of unconventional silicon crystal and wafer growth techniques for high-efficiency solar cells

    DOE PAGES

    Hofstetter, Jasmin; del Cañizo, Carlos; Wagner, Hannes; ...

    2015-10-15

    Silicon wafers comprise approximately 40% of crystalline silicon module cost and represent an area of great technological innovation potential. Paradoxically, unconventional wafer-growth techniques have thus far failed to displace multicrystalline and Czochralski silicon, despite four decades of innovation. One of the shortcomings of most unconventional materials has been a persistent carrier lifetime deficit in comparison to established wafer technologies, which limits the device efficiency potential. In this perspective article, we review a defect-management framework that has proven successful in enabling millisecond lifetimes in kerfless and cast materials. Control of dislocations and slowly diffusing metal point defects during growth, coupled tomore » effective control of fast-diffusing species during cell processing, is critical to enable high cell efficiencies. As a result, to accelerate the pace of novel wafer development, we discuss approaches to rapidly evaluate the device efficiency potential of unconventional wafers from injection-dependent lifetime measurements.« less

  5. Material requirements for the adoption of unconventional silicon crystal and wafer growth techniques for high-efficiency solar cells

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Hofstetter, Jasmin; del Cañizo, Carlos; Wagner, Hannes

    Silicon wafers comprise approximately 40% of crystalline silicon module cost and represent an area of great technological innovation potential. Paradoxically, unconventional wafer-growth techniques have thus far failed to displace multicrystalline and Czochralski silicon, despite four decades of innovation. One of the shortcomings of most unconventional materials has been a persistent carrier lifetime deficit in comparison to established wafer technologies, which limits the device efficiency potential. In this perspective article, we review a defect-management framework that has proven successful in enabling millisecond lifetimes in kerfless and cast materials. Control of dislocations and slowly diffusing metal point defects during growth, coupled tomore » effective control of fast-diffusing species during cell processing, is critical to enable high cell efficiencies. As a result, to accelerate the pace of novel wafer development, we discuss approaches to rapidly evaluate the device efficiency potential of unconventional wafers from injection-dependent lifetime measurements.« less

  6. Machine vision system: a tool for quality inspection of food and agricultural products.

    PubMed

    Patel, Krishna Kumar; Kar, A; Jha, S N; Khan, M A

    2012-04-01

    Quality inspection of food and agricultural produce are difficult and labor intensive. Simultaneously, with increased expectations for food products of high quality and safety standards, the need for accurate, fast and objective quality determination of these characteristics in food products continues to grow. However, these operations generally in India are manual which is costly as well as unreliable because human decision in identifying quality factors such as appearance, flavor, nutrient, texture, etc., is inconsistent, subjective and slow. Machine vision provides one alternative for an automated, non-destructive and cost-effective technique to accomplish these requirements. This inspection approach based on image analysis and processing has found a variety of different applications in the food industry. Considerable research has highlighted its potential for the inspection and grading of fruits and vegetables, grain quality and characteristic examination and quality evaluation of other food products like bakery products, pizza, cheese, and noodles etc. The objective of this paper is to provide in depth introduction of machine vision system, its components and recent work reported on food and agricultural produce.

  7. A fully wafer-level packaged RF MEMS switch with low actuation voltage using a piezoelectric actuator

    NASA Astrophysics Data System (ADS)

    Park, Jae-Hyoung; Lee, Hee-Chul; Park, Yong-Hee; Kim, Yong-Dae; Ji, Chang-Hyeon; Bu, Jonguk; Nam, Hyo-Jin

    2006-11-01

    In this paper, a fully wafer-level packaged RF MEMS switch has been demonstrated, which has low operation voltage, using a piezoelectric actuator. The piezoelectric actuator was designed to operate at low actuation voltage for application to advanced mobile handsets. The dc contact type RF switch was packaged using the wafer-level bonding process. The CPW transmission lines and piezoelectric actuators have been fabricated on separate wafers and assembled together by the wafer-level eutectic bonding process. A gold and tin composite was used for eutectic bonding at a low temperature of 300 °C. Via holes interconnecting the electrical contact pads through the wafer were filled completely with electroplated copper. The fully wafer-level packaged RF MEMS switch showed an insertion loss of 0.63 dB and an isolation of 26.4 dB at 5 GHz. The actuation voltage of the switch was 5 V. The resonant frequency of the piezoelectric actuator was 38.4 kHz and the spring constant of the actuator was calculated to be 9.6 N m-1. The size of the packaged SPST (single-pole single-through) switch was 1.2 mm × 1.2 mm including the packaging sealing rim. The effect of the proposed package structure on the RF performance was characterized with a device having CPW through lines and vertical feed lines excluding the RF switches. The measured packaging loss was 0.2 dB and the return loss was 33.6 dB at 5 GHz.

  8. EUV mask defect inspection and defect review strategies for EUV pilot line and high volume manufacturing

    NASA Astrophysics Data System (ADS)

    Chan, Y. David; Rastegar, Abbas; Yun, Henry; Putna, E. Steve; Wurm, Stefan

    2010-04-01

    Reducing mask blank and patterned mask defects is the number one challenge for extreme ultraviolet lithography. If the industry succeeds in reducing mask blank defects at the required rate of 10X every year for the next 2-3 years to meet high volume manufacturing defect requirements, new inspection and review tool capabilities will soon be needed to support this goal. This paper outlines the defect inspection and review tool technical requirements and suggests development plans to achieve pilot line readiness in 2011/12 and high volume manufacturing readiness in 2013. The technical specifications, tooling scenarios, and development plans were produced by a SEMATECH-led technical working group with broad industry participation from material suppliers, tool suppliers, mask houses, integrated device manufacturers, and consortia. The paper summarizes this technical working group's assessment of existing blank and mask inspection/review infrastructure capabilities to support pilot line introduction and outlines infrastructure development requirements and tooling strategies to support high volume manufacturing.

  9. TPS Inspection and Repair

    NASA Technical Reports Server (NTRS)

    Parazynski, Scott

    2012-01-01

    Dr. Scott Parazynski provided a retrospective on the EVA tools and procedures efforts NASA went through in the aftermath of Columbia for the Shuttle Thermal Protection System (TPS) inspection and repair. He describes his role as the lead astronaut on this effort, and covered all of the Neutral Buoyancy Lab (NBL), KC 135 (reduced gravity aircraft), Precision Air Bearing Floor (PABF), vacuum chamber and 1 G testing that was done in order to develop the tools and techniques that were flown. Parazynski also discusses how the EVA community worked together to resolve a huge safety issue, and how his work in the spacesuit was critical to overcoming a design limitation of the Space Shuttle.

  10. 46 CFR 153.812 - Inspection for Certificate of Inspection.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 5 2010-10-01 2010-10-01 false Inspection for Certificate of Inspection. 153.812... CARGOES SHIPS CARRYING BULK LIQUID, LIQUEFIED GAS, OR COMPRESSED GAS HAZARDOUS MATERIALS Design and Equipment Testing and Inspection § 153.812 Inspection for Certificate of Inspection. The rules governing the...

  11. Transfer of InP epilayers by wafer bonding

    NASA Astrophysics Data System (ADS)

    Hjort, Klas

    2004-08-01

    Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectronic integrated circuits, and optoelectronic devices using some material advantages of combining III-V with Si. Also, in the III-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate.

  12. A method for determining average damage depth of sawn crystalline silicon wafers

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sopori, B.; Devayajanam, S.; Basnyat, P.

    2016-04-01

    The depth of surface damage (or simply, damage) in crystalline silicon wafers, caused by wire sawing of ingots, is determined by performing a series of minority carrier lifetime (MCLT) measurements. Samples are sequentially etched to remove thin layers from each surface and MCLT is measured after each etch step. The thickness-removed (..delta..t) at which the lifetime reaches a peak value corresponds to the damage depth. This technique also allows the damage to be quantified in terms of effective surface recombination velocity (Seff). To accomplish this, the MCLT data are converted into an Seff vs ..delta..t plot, which represents a quantitativemore » distribution of the degree of damage within the surface layer. We describe a wafer preparation procedure to attain reproducible etching and MCLT measurement results. We also describe important characteristics of an etchant used for controllably removing thin layers from the wafer surfaces. Some typical results showing changes in the MCLT vs ..delta..t plots for different cutting parameters are given.« less

  13. Optimization of corn, rice and buckwheat formulations for gluten-free wafer production.

    PubMed

    Dogan, Ismail Sait; Yildiz, Onder; Meral, Raciye

    2016-07-01

    Gluten-free baked products for celiac sufferers are essential for healthy living. Cereals having gluten such as wheat and rye must be removed from the diet for the clinical and histological improvement. The variety of gluten-free foods should be offered for the sufferers. In the study, gluten-free wafer formulas were optimized using corn, rice and buckwheat flours, xanthan and guar gum blend as an alternative product for celiac sufferers. Wafer sheet attributes and textural properties were investigated. Considering all wafer sheet properties in gluten-free formulas, better results were obtained by using 163.5% water, 0.5% guar and 0.1% xanthan in corn formula; 173.3% water, 0.45% guar and 0.15% xanthan gum in rice formula; 176% water, 0.1% guar and 0.5% xanthan gum in buckwheat formula. Average desirability values in gluten-free formulas were between 0.86 and 0.91 indicating they had similar visual and textural profiles to control sheet made with wheat flour. © The Author(s) 2015.

  14. Fabricating a Microcomputer on a Single Silicon Wafer

    NASA Technical Reports Server (NTRS)

    Evanchuk, V. L.

    1983-01-01

    Concept for "microcomputer on a slice" reduces microcomputer costs by eliminating scribing, wiring, and packaging of individual circuit chips. Low-cost microcomputer on silicon slice contains redundant components. All components-central processing unit, input/output circuitry, read-only memory, and random-access memory (CPU, I/O, ROM, and RAM) on placed on single silicon wafer.

  15. Improving scanner wafer alignment performance by target optimization

    NASA Astrophysics Data System (ADS)

    Leray, Philippe; Jehoul, Christiane; Socha, Robert; Menchtchikov, Boris; Raghunathan, Sudhar; Kent, Eric; Schoonewelle, Hielke; Tinnemans, Patrick; Tuffy, Paul; Belen, Jun; Wise, Rich

    2016-03-01

    In the process nodes of 10nm and below, the patterning complexity along with the processing and materials required has resulted in a need to optimize alignment targets in order to achieve the required precision, accuracy and throughput performance. Recent industry publications on the metrology target optimization process have shown a move from the expensive and time consuming empirical methodologies, towards a faster computational approach. ASML's Design for Control (D4C) application, which is currently used to optimize YieldStar diffraction based overlay (DBO) metrology targets, has been extended to support the optimization of scanner wafer alignment targets. This allows the necessary process information and design methodology, used for DBO target designs, to be leveraged for the optimization of alignment targets. In this paper, we show how we applied this computational approach to wafer alignment target design. We verify the correlation between predictions and measurements for the key alignment performance metrics and finally show the potential alignment and overlay performance improvements that an optimized alignment target could achieve.

  16. Effect of Anisotropy on Shape Measurement Accuracy of Silicon Wafer Using Three-Point-Support Inverting Method

    NASA Astrophysics Data System (ADS)

    Ito, Yukihiro; Natsu, Wataru; Kunieda, Masanori

    This paper describes the influences of anisotropy found in the elastic modulus of monocrystalline silicon wafers on the measurement accuracy of the three-point-support inverting method which can measure the warp and thickness of thin large panels simultaneously. Deflection due to gravity depends on the crystal orientation relative to the positions of the three-point-supports. Thus the deviation of actual crystal orientation from the direction indicated by the notch fabricated on the wafer causes measurement errors. Numerical analysis of the deflection confirmed that the uncertainty of thickness measurement increases from 0.168µm to 0.524µm due to this measurement error. In addition, experimental results showed that the rotation of crystal orientation relative to the three-point-supports is effective for preventing wafer vibration excited by disturbance vibration because the resonance frequency of wafers can be changed. Thus, surface shape measurement accuracy was improved by preventing resonant vibration during measurement.

  17. Room-temperature bonding of epitaxial layer to carbon-cluster ion-implanted silicon wafers for CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Koga, Yoshihiro; Kadono, Takeshi; Shigematsu, Satoshi; Hirose, Ryo; Onaka-Masada, Ayumi; Okuyama, Ryousuke; Okuda, Hidehiko; Kurita, Kazunari

    2018-06-01

    We propose a fabrication process for silicon wafers by combining carbon-cluster ion implantation and room-temperature bonding for advanced CMOS image sensors. These carbon-cluster ions are made of carbon and hydrogen, which can passivate process-induced defects. We demonstrated that this combination process can be used to form an epitaxial layer on a carbon-cluster ion-implanted Czochralski (CZ)-grown silicon substrate with a high dose of 1 × 1016 atoms/cm2. This implantation condition transforms the top-surface region of the CZ-grown silicon substrate into a thin amorphous layer. Thus, an epitaxial layer cannot be grown on this implanted CZ-grown silicon substrate. However, this combination process can be used to form an epitaxial layer on the amorphous layer of this implanted CZ-grown silicon substrate surface. This bonding wafer has strong gettering capability in both the wafer-bonding region and the carbon-cluster ion-implanted projection range. Furthermore, this wafer inhibits oxygen out-diffusion to the epitaxial layer from the CZ-grown silicon substrate after device fabrication. Therefore, we believe that this bonding wafer is effective in decreasing the dark current and white-spot defect density for advanced CMOS image sensors.

  18. Detection and characterization of microdefects and microprecipitates in Si wafers by Brewster angle illumination using an optical fiber system

    NASA Astrophysics Data System (ADS)

    Taijing, Lu; Toyoda, Koichi; Nango, Nobuhito; Ogawa, Tomoya

    1991-10-01

    Microdefects and microprecipitates were non-destructively detected in bulk and near surface of a Si wafer by Brewster angle illumination using an optical fiber system, because the p-component of the illumination enters completely into the wafer and then makes scattering from the defects while the other s-component reflects on the wafer surface so as to deviate from an objective lens for the detection of the scattering. Some results of observations and discussions will be done here about the scatterers in epitaxially grown Si layers, denuded zones of Si wafers, annealed amorphous SiC films, SIMOX specimens and slip bands in Si crystals.

  19. First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

    NASA Technical Reports Server (NTRS)

    Fung, A. K.; Gaier, T.; Samoska, L.; Deal, W. R.; Radisic, V.; Mei, X. B.; Yoshida, W.; Liu, P. S.; Uyeda, J.; Barsky, M.; hide

    2008-01-01

    Recent developments in semiconductor technology have enabled advanced submillimeter wave (300 GHz) transistors and circuits. These new high speed components have required new test methods to be developed for characterizing performance, and to provide data for device modeling to improve designs. Current efforts in progressing high frequency testing have resulted in on-wafer-parameter measurements up to approximately 340 GHz and swept frequency vector network analyzer waveguide measurements to 508 GHz. On-wafer noise figure measurements in the 270-340 GHz band have been demonstrated. In this letter we report on on-wafer power measurements at 330 GHz of a three stage amplifier that resulted in a maximum measured output power of 1.78mW and maximum gain of 7.1 dB. The method utilized demonstrates the extension of traditional power measurement techniques to submillimeter wave frequencies, and is suitable for automated testing without packaging for production screening of submillimeter wave circuits.

  20. 3D interconnect metrology in CMS/ITRI

    NASA Astrophysics Data System (ADS)

    Ku, Y. S.; Shyu, D. M.; Hsu, W. T.; Chang, P. Y.; Chen, Y. C.; Pang, H. L.

    2011-05-01

    Semiconductor device packaging technology is rapidly advancing, in response to the demand for thinner and smaller electronic devices. Three-dimensional chip/wafer stacking that uses through-silicon vias (TSV) is a key technical focus area, and the continuous development of this novel technology has created a need for non-contact characterization. Many of these challenges are novel to the industry due to the relatively large variety of via sizes and density, and new processes such as wafer thinning and stacked wafer bonding. This paper summarizes the developing metrology that has been used during via-middle & via-last TSV process development at EOL/ITRI. While there is a variety of metrology and inspection applications for 3D interconnect processing, the main topics covered here are via CD/depth measurement, thinned wafer inspection and wafer warpage measurement.

  1. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111)sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 {mu}m wide (111) sidewalls was fabricated using a 220 {mu}m thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time,x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  2. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers.

    PubMed

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang, Zhen; Takano, Takayuki; Maeda, Ryutaro

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111) sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 microm wide (111) sidewalls was fabricated using a 220 microm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time, x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  3. Framework for Automated GD&T Inspection Using 3D Scanner

    NASA Astrophysics Data System (ADS)

    Pathak, Vimal Kumar; Singh, Amit Kumar; Sivadasan, M.; Singh, N. K.

    2018-04-01

    Geometric Dimensioning and Tolerancing (GD&T) is a typical dialect that helps designers, production faculty and quality monitors to convey design specifications in an effective and efficient manner. GD&T has been practiced since the start of machine component assembly but without overly naming it. However, in recent times industries have started increasingly emphasizing on it. One prominent area where most of the industries struggle with is quality inspection. Complete inspection process is mostly human intensive. Also, the use of conventional gauges and templates for inspection purpose highly depends on skill of workers and quality inspectors. In industries, the concept of 3D scanning is not new but is used only for creating 3D drawings or modelling of physical parts. However, the potential of 3D scanning as a powerful inspection tool is hardly explored. This study is centred on designing a procedure for automated inspection using 3D scanner. Linear, geometric and dimensional inspection of the most popular test bar-stepped bar, as a simple example was also carried out as per the new framework. The new generation engineering industries would definitely welcome this automated inspection procedure being quick and reliable with reduced human intervention.

  4. Pilot factors guidelines for the operational inspection of navigation systems

    NASA Technical Reports Server (NTRS)

    Sadler, J. F.; Boucek, G. P.

    1988-01-01

    A computerized human engineered inspection technique is developed for use by FAA inspectors in evaluating the pilot factors aspects of aircraft navigation systems. The short title for this project is Nav Handbook. A menu-driven checklist, computer program and data base (Human Factors Design Criteria) were developed and merged to form a self-contained, portable, human factors inspection checklist tool for use in a laboratory or field setting. The automated checklist is tailored for general aviation navigation systems and can be expanded for use with other aircraft systems, transports or military aircraft. The Nav Handbook inspection concept was demonstrated using a lap-top computer and an Omega/VLF CDU. The program generates standardized inspection reports. Automated checklists for LORAN/C and R NAV were also developed. A Nav Handbook User's Guide is included.

  5. Wafer-level micro-optics: trends in manufacturing, testing, packaging, and applications

    NASA Astrophysics Data System (ADS)

    Voelkel, Reinhard; Gong, Li; Rieck, Juergen; Zheng, Alan

    2012-11-01

    Micro-optics is an indispensable key enabling technology (KET) for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the last decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks (supercomputer, ROADM), bringing high-speed internet to our homes (FTTH). Even our modern smart phones contain a variety of micro-optical elements. For example, LED flashlight shaping elements, the secondary camera, and ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by semiconductor industry. Thousands of components are fabricated in parallel on a wafer. We report on the state of the art in wafer-based manufacturing, testing, packaging and present examples and applications for micro-optical components and systems.

  6. Reliable four-point flexion test and model for die-to-wafer direct bonding

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Tabata, T., E-mail: toshiyuki.tabata@cea.fr; Sanchez, L.; Fournel, F.

    2015-07-07

    For many years, wafer-to-wafer (W2W) direct bonding has been very developed particularly in terms of bonding energy measurement and bonding mechanism comprehension. Nowadays, die-to-wafer (D2W) direct bonding has gained significant attention, for instance, in photonics and microelectro-mechanics, which supposes controlled and reliable fabrication processes. So, whatever the stuck materials may be, it is not obvious whether bonded D2W structures have the same bonding strength as bonded W2W ones, because of possible edge effects of dies. For that reason, it has been strongly required to develop a bonding energy measurement technique which is suitable for D2W structures. In this paper, bothmore » D2W- and W2W-type standard SiO{sub 2}-to-SiO{sub 2} direct bonding samples are fabricated from the same full-wafer bonding. Modifications of the four-point flexion test (4PT) technique and applications for measuring D2W direct bonding energies are reported. Thus, the comparison between the modified 4PT and the double-cantilever beam techniques is drawn, also considering possible impacts of the conditions of measures such as the water stress corrosion at the debonding interface and the friction error at the loading contact points. Finally, reliability of a modified technique and a new model established for measuring D2W direct bonding energies is demonstrated.« less

  7. Developing a methodology to inspect and assess conditions of short span structures on county roads in Wyoming : [project brief].

    DOT National Transportation Integrated Search

    2015-12-01

    Even though the FHWAs National Bridge Inspection Standards are a very comprehensive tool for : bridge inspection, they only apply to structures with spans of more than 20 feet. WYDOT inspects : these larger bridges on regular intervals, but there ...

  8. Immersion and dry lithography monitoring for flash memories (after develop inspection and photo cell monitor) using a darkfield imaging inspector with advanced binning technology

    NASA Astrophysics Data System (ADS)

    Parisi, P.; Mani, A.; Perry-Sullivan, C.; Kopp, J.; Simpson, G.; Renis, M.; Padovani, M.; Severgnini, C.; Piacentini, P.; Piazza, P.; Beccalli, A.

    2009-12-01

    After-develop inspection (ADI) and photo-cell monitoring (PM) are part of a comprehensive lithography process monitoring strategy. Capturing defects of interest (DOI) in the lithography cell rather than at later process steps shortens the cycle time and allows for wafer re-work, reducing overall cost and improving yield. Low contrast DOI and multiple noise sources make litho inspection challenging. Broadband brightfield inspectors provide the highest sensitivity to litho DOI and are traditionally used for ADI and PM. However, a darkfield imaging inspector has shown sufficient sensitivity to litho DOI, providing a high-throughput option for litho defect monitoring. On the darkfield imaging inspector, a very high sensitivity inspection is used in conjunction with advanced defect binning to detect pattern issues and other DOI and minimize nuisance defects. For ADI, this darkfield inspection methodology enables the separation and tracking of 'color variation' defects that correlate directly to CD variations allowing a high-sampling monitor for focus excursions, thereby reducing scanner re-qualification time. For PM, the darkfield imaging inspector provides sensitivity to critical immersion litho defects at a lower cost-of-ownership. This paper describes litho monitoring methodologies developed and implemented for flash devices for 65nm production and 45nm development using the darkfield imaging inspector.

  9. Inspecting Engineering Samples

    NASA Image and Video Library

    2017-12-08

    Goddard's Ritsko Wins 2011 SAVE Award The winner of the 2011 SAVE Award is Matthew Ritsko, a Goddard financial manager. His tool lending library would track and enable sharing of expensive space-flight tools and hardware after projects no longer need them. This set of images represents the types of tools used at NASA. To read more go to: www.nasa.gov/topics/people/features/ritsko-save.html Dr. Doug Rabin (Code 671) and PI La Vida Cooper (Code 564) inspect engineering samples of the HAS-2 imager which will be tested and readout using a custom ASIC with a 16-bit ADC (analog to digital converter) and CDS (correlated double sampling) circuit designed by the Code 564 ASIC group as a part of an FY10 IRAD. The purpose of the IRAD was to develop and high resolution digitizer for Heliophysics applications such as imaging. Future goals for the collaboration include characterization testing and eventually a sounding rocket flight of the integrated system. *ASIC= Application Specific Integrated Circuit NASA/GSFC/Chris Gunn

  10. Inspection tester for explosives

    DOEpatents

    Haas, Jeffrey S.; Simpson, Randall L.; Satcher, Joe H.

    2007-11-13

    An inspection tester that can be used anywhere as a primary screening tool by non-technical personnel to determine whether a surface contains explosives. It includes a body with a sample pad. First and second explosives detecting reagent holders and dispensers are operatively connected to the body and the sample pad. The first and second explosives detecting reagent holders and dispensers are positioned to deliver the explosives detecting reagents to the sample pad. A is heater operatively connected to the sample pad.

  11. Inspection tester for explosives

    DOEpatents

    Haas, Jeffrey S.; Simpson, Randall L.; Satcher, Joe H.

    2010-10-05

    An inspection tester that can be used anywhere as a primary screening tool by non-technical personnel to determine whether a surface contains explosives. It includes a body with a sample pad. First and second explosives detecting reagent holders and dispensers are operatively connected to the body and the sample pad. The first and second explosives detecting reagent holders and dispensers are positioned to deliver the explosives detecting reagents to the sample pad. A is heater operatively connected to the sample pad.

  12. Through-wafer interrogation of microstructure motion for MEMS feedback control

    NASA Astrophysics Data System (ADS)

    Dawson, Jeremy M.; Chen, Jingdong; Brown, Kolin S.; Famouri, Parviz F.; Hornak, Lawrence A.

    1999-09-01

    Closed-loop MEMS control enables mechanical microsystems to adapt to the demands of the environment which they are actuating opening a new window of opportunity for future MEMS applications. Planar diffractive optical microsystems have the potential to enable the integrated optical interrogation of MEMS microstructure position fully decoupled from the means of mechanical actuation which is central to realization of feedback control. This paper presents the results of initial research evaluating through-wafer optical microsystems for MEMS integrated optical monitoring. Positional monitoring results obtained from a 1.3 micrometer wavelength through- wafer free-space optical probe of a lateral comb resonator fabricated using the Multi-User MEMS Process Service (MUMPS) are presented. Given the availability of positional information via probe signal feedback, a simulation of the application of nonlinear sliding control is presented illustrating position control of the lateral comb resonator structure.

  13. Evaluation of machine learning tools for inspection of steam generator tube structures using pulsed eddy current

    NASA Astrophysics Data System (ADS)

    Buck, J. A.; Underhill, P. R.; Morelli, J.; Krause, T. W.

    2017-02-01

    Degradation of nuclear steam generator (SG) tubes and support structures can result in a loss of reactor efficiency. Regular in-service inspection, by conventional eddy current testing (ECT), permits detection of cracks, measurement of wall loss, and identification of other SG tube degradation modes. However, ECT is challenged by overlapping degradation modes such as might occur for SG tube fretting accompanied by tube off-set within a corroding ferromagnetic support structure. Pulsed eddy current (PEC) is an emerging technology examined here for inspection of Alloy-800 SG tubes and associated carbon steel drilled support structures. Support structure hole size was varied to simulate uniform corrosion, while SG tube was off-set relative to hole axis. PEC measurements were performed using a single driver with an 8 pick-up coil configuration in the presence of flat-bottom rectangular frets as an overlapping degradation mode. A modified principal component analysis (MPCA) was performed on the time-voltage data in order to reduce data dimensionality. The MPCA scores were then used to train a support vector machine (SVM) that simultaneously targeted four independent parameters associated with; support structure hole size, tube off-centering in two dimensions and fret depth. The support vector machine was trained, tested, and validated on experimental data. Results were compared with a previously developed artificial neural network (ANN) trained on the same data. Estimates of tube position showed comparable results between the two machine learning tools. However, the ANN produced better estimates of hole inner diameter and fret depth. The better results from ANN analysis was attributed to challenges associated with the SVM when non-constant variance is present in the data.

  14. X-Ray Diffraction Wafer Mapping Method for Rhombohedral Super-Hetero-Epitaxy

    NASA Technical Reports Server (NTRS)

    Park, Yoonjoon; Choi, Sang Hyouk; King, Glen C.; Elliott, James R.; Dimarcantonio, Albert L.

    2010-01-01

    A new X-ray diffraction (XRD) method is provided to acquire XY mapping of the distribution of single crystals, poly-crystals, and twin defects across an entire wafer of rhombohedral super-hetero-epitaxial semiconductor material. In one embodiment, the method is performed with a point or line X-ray source with an X-ray incidence angle approximating a normal angle close to 90 deg, and in which the beam mask is preferably replaced with a crossed slit. While the wafer moves in the X and Y direction, a narrowly defined X-ray source illuminates the sample and the diffracted X-ray beam is monitored by the detector at a predefined angle. Preferably, the untilted, asymmetric scans are of {440} peaks, for twin defect characterization.

  15. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yan, Pei-Yang; Zhang, Guojing; Gullickson, Eric M.

    Extreme ultraviolet lithography (EUVL) mask multi-layer (ML) blank surface roughness specification historically comes from blank defect inspection tool requirement. Later, new concerns on ML surface roughness induced wafer pattern line width roughness (LWR) arise. In this paper, we have studied wafer level pattern LWR as a function of EUVL mask surface roughness via High-NA Actinic Reticle Review Tool. We found that the blank surface roughness induced LWR at current blank roughness level is in the order of 0.5nm 3σ for NA=0.42 at the best focus. At defocus of ±40nm, the corresponding LWR will be 0.2nm higher. Further reducing EUVL maskmore » blank surface roughness will increase the blank cost with limited benefit in improving the pattern LWR, provided that the intrinsic resist LWR is in the order of 1nm and above.« less

  16. CD control with defect inspection: you can teach an old dog a new trick

    NASA Astrophysics Data System (ADS)

    Utzny, Clemens; Ullrich, Albrecht; Heumann, Jan; Mohn, Elias; Meusemann, Stefan; Seltmann, Rolf

    2012-11-01

    Achieving the required critical dimensions (CD) with the best possible uniformity (CDU) on photo-masks has always played a pivotal role in enabling chip technology. Current control strategies are based on scanning electron microscopy (SEM) based measurements implying a sparse spatial resolution on the order of ~ 10-2 m to 10-1 m. A higher spatial resolution could be reached with an adequate measurement sampling, however the increase in the number of measurements makes this approach in the context of a productive environment unfeasible. With the advent of more powerful defect inspection tools a significantly higher spatial resolution of 10-4 m can be achieved by measuring also CD during the regular defect inspection. This method is not limited to the measurement of specific measurement features thus paving the way to a CD assessment of all electrically relevant mask patterns. Enabling such a CD measurement gives way to new realms of CD control. Deterministic short range CD effects which were previously interpreted as noise can be resolved and addressed by CD compensation methods. This in can lead to substantial improvements of the CD uniformity. Thus the defect inspection mediated CD control closes a substantial gap in the mask manufacturing process by allowing the control of short range CD effects which were up till now beyond the reach of regular CD SEM based control strategies. This increase in spatial resolution also counters the decrease in measurement precision due to the usage of an optical system. In this paper we present detailed results on a) the CD data generated during the inspection process, b) the analytical tools needed for relating this data to CD SEM measurement and c) how the CD inspection process enables new dimension of CD compensation within the mask manufacturing process. We find that the inspection based CD measurement generates typically around 500000 measurements with a homogeneous covering of the active mask area. In comparing the CD

  17. Electronically and ionically conductive porous material and method for manufacture of resin wafers therefrom

    DOEpatents

    Lin, YuPo J [Naperville, IL; Henry, Michael P [Batavia, IL; Snyder, Seth W [Lincolnwood, IL

    2011-07-12

    An electrically and ionically conductive porous material including a thermoplastic binder and one or more of anion exchange moieties or cation exchange moieties or mixtures thereof and/or one or more of a protein capture resin and an electrically conductive material. The thermoplastic binder immobilizes the moieties with respect to each other but does not substantially coat the moieties and forms the electrically conductive porous material. A wafer of the material and a method of making the material and wafer are disclosed.

  18. Production of Optical Quality Free Standing Diamond Wafer

    DTIC Science & Technology

    2008-05-19

    Title : Production of Optical Quality Free Standing Diamond Wafer Prime Contractor : Onyx Optics, Inc. 6551 Sierra Lane Dublin, Ca 94568...www.onyxoptics.com Program Manager : Helmuth Meissner Onyx Optics, Inc. 6551 Sierra Lane Dublin, CA 94568 Email: hmeissner@onyxoptics.com Ph: 925...PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) Onyx Optics, Inc. 6551 Sierra Lane Dublin, Ca 94568 8. PERFORMING ORGANIZATION REPORT NUMBER 9. SPONSORING

  19. Simplified nonplanar wafer bonding for heterogeneous device integration

    NASA Astrophysics Data System (ADS)

    Geske, Jon; Bowers, John E.; Riley, Anton

    2004-07-01

    We demonstrate a simplified nonplanar wafer bonding technique for heterogeneous device integration. The improved technique can be used to laterally integrate dissimilar semiconductor device structures on a lattice-mismatched substrate. Using the technique, two different InP-based vertical-cavity surface-emitting laser active regions have been integrated onto GaAs without compromising the quality of the photoluminescence. Experimental and numerical simulation results are presented.

  20. Determination of thicknesses and temperatures of crystalline silicon wafers from optical measurements in the far infrared region

    NASA Astrophysics Data System (ADS)

    Franta, Daniel; Franta, Pavel; Vohánka, Jiří; Čermák, Martin; Ohlídal, Ivan

    2018-05-01

    Optical measurements of transmittance in the far infrared region performed on crystalline silicon wafers exhibit partially coherent interference effects appropriate for the determination of thicknesses of the wafers. The knowledge of accurate spectral and temperature dependencies of the optical constants of crystalline silicon in this spectral region is crucial for the determination of its thickness and vice versa. The recently published temperature dependent dispersion model of crystalline silicon is suitable for this purpose. Because the linear thermal expansion of crystalline silicon is known, the temperatures of the wafers can be determined with high precision from the evolution of the interference patterns at elevated temperatures.

  1. Preparation of freestanding GaN wafer by hydride vapor phase epitaxy on porous silicon

    NASA Astrophysics Data System (ADS)

    Wu, Xian; Li, Peng; Liang, Renrong; Xiao, Lei; Xu, Jun; Wang, Jing

    2018-05-01

    A freestanding GaN wafer was prepared on porous Si (111) substrate using hydride vapor phase epitaxy (HVPE). To avoid undesirable effects of the porous surface on the crystallinity of the GaN, a GaN seed layer was first grown on the Si (111) bare wafer. A pattern with many apertures was fabricated in the GaN seed layer using lithography and etching processes. A porous layer was formed in the Si substrate immediately adjacent to the GaN seed layer by an anodic etching process. A 500-μm-thick GaN film was then grown on the patterned GaN seed layer using HVPE. The GaN film was separated from the Si substrate through the formation of cracks in the porous layer caused by thermal mismatch stress during the cooling stage of the HVPE. Finally, the GaN film was polished to obtain a freestanding GaN wafer.

  2. Vertical integration of array-type miniature interferometers at wafer level by using multistack anodic bonding

    NASA Astrophysics Data System (ADS)

    Wang, Wei-Shan; Wiemer, Maik; Froemel, Joerg; Enderlein, Tom; Gessner, Thomas; Lullin, Justine; Bargiel, Sylwester; Passilly, Nicolas; Albero, Jorge; Gorecki, Christophe

    2016-04-01

    In this work, vertical integration of miniaturized array-type Mirau interferometers at wafer level by using multi-stack anodic bonding is presented. Mirau interferometer is suitable for MEMS metrology and for medical imaging according to its vertical-, lateral- resolutions and working distances. Miniaturized Mirau interferometer can be a promising candidate as a key component of an optical coherence tomography (OCT) system. The miniaturized array-type interferometer consists of a microlens doublet, a Si-based MEMS Z scanner, a spacer for focus-adjustment and a beam splitter. Therefore, bonding technologies which are suitable for heterogeneous substrates are of high interest and necessary for the integration of MEMS/MOEMS devices. Multi-stack anodic bonding, which meets the optical and mechanical requirements of the MOEMS device, is adopted to integrate the array-type interferometers. First, the spacer and the beam splitter are bonded, followed by bonding of the MEMS Z scanner. In the meanwhile, two microlenses, which are composed of Si and glass wafers, are anodically bonded to form a microlens doublet. Then, the microlens doublet is aligned and bonded with the scanner/spacer/beam splitter stack. The bonded array-type interferometer is a 7- wafer stack and the thickness is approximately 5mm. To separate such a thick wafer stack with various substrates, 2-step laser cutting is used to dice the bonded stack into Mirau chips. To simplify fabrication process of each component, electrical connections are created at the last step by mounting a Mirau chip onto a flip chip PCB instead of through wafer vias. Stability of Au/Ti films on the MEMS Z scanner after anodic bonding, laser cutting and flip chip bonding are discussed as well.

  3. Development of Inspection for Friction Stir Welds for Rocket Fuel Tanks

    NASA Technical Reports Server (NTRS)

    Russell, Samuel S.

    2012-01-01

    During development of the Ares I weld processes nondestructive and destructive testing were used to identify and characterize defects that occurred. These defects were named and character noted. This catalogue of defects and characteristics was then used to develop inspection methods for Self Reacting Friction Stir Welds (SR ]FSW) and Conventional Friction Stir Welds (C ]FSW). Dye penetrant, eddy current, x ]radiography, single element ultrasonic, and phased array ultrasonic (PAUT) inspection procedures were developed to target the expected defects. Once the method procedure was developed a comparison was performed to allow for selection of the best inspection method. Tests of the effectiveness of the inspection were performed on purposely fabricated flawed specimens and electrodischarge machined notches. The initial test results prompted a revisit of the PAUT procedure and a redesign of the inspection. Subsequent testing showed that a multi ]angle PAUT inspection resulted in better detection capability. A discussion of the most effective orientations of the PAUT transducer will be presented. Also, the implementation of the inspection on production hardware will be presented. In some cases the weld tool is used as the transducer manipulator and in some cases a portable scanner is used

  4. 2-dimensional ion velocity distributions measured by laser-induced fluorescence above a radio-frequency biased silicon wafer

    NASA Astrophysics Data System (ADS)

    Moore, Nathaniel B.; Gekelman, Walter; Pribyl, Patrick; Zhang, Yiting; Kushner, Mark J.

    2013-08-01

    The dynamics of ions traversing sheaths in low temperature plasmas are important to the formation of the ion energy distribution incident onto surfaces during microelectronics fabrication. Ion dynamics have been measured using laser-induced fluorescence (LIF) in the sheath above a 30 cm diameter, 2.2 MHz-biased silicon wafer in a commercial inductively coupled plasma processing reactor. The velocity distribution of argon ions was measured at thousands of positions above and radially along the surface of the wafer by utilizing a planar laser sheet from a pulsed, tunable dye laser. Velocities were measured both parallel and perpendicular to the wafer over an energy range of 0.4-600 eV. The resulting fluorescence was recorded using a fast CCD camera, which provided resolution of 0.4 mm in space and 30 ns in time. Data were taken at eight different phases during the 2.2 MHz cycle. The ion velocity distributions (IVDs) in the sheath were found to be spatially non-uniform near the edge of the wafer and phase-dependent as a function of height. Several cm above the wafer the IVD is Maxwellian and independent of phase. Experimental results were compared with simulations. The experimental time-averaged ion energy distribution function as a function of height compare favorably with results from the computer model.

  5. Oxygen precipitation and bulk microdefects induced by the pre- and postepitaxial annealing in N/N + (100) silicon wafers

    NASA Astrophysics Data System (ADS)

    Wijaranakula, W.; Matlock, J. H.; Mollenkopf, H.

    1987-12-01

    Substrate wafers used for fabrication of epitaxial silicon wafers heavily doped with antimony at the concentration of 1020 atoms/cm3 were preannealed at a temperature between 500 and 900 °C prior to epitaxial deposition. Device fabrication thermal simulation was performed by heat treating the preannealed epitaxial wafers at 1050 °C in dry oxygen ambient for 16 h. Postepitaxial nucleation heat treatment at 750 °C for 4 h prior to the 1050 °C heat treament cycle was also applied on some epitaxial wafers for the purpose of enhancing the oxygen precipitation in silicon. It was observed that morphology and density of the bulk defects induced by the thermal treatment are affected by the preannealing temperature. The results also indicate that nucleation and growth kinetics of oxygen precipitates in preannealed n+ degenerate silicon substrate is strongly governed by oxygen and point defect diffusion.

  6. Advanced ACTPol Multichroic Polarimeter Array Fabrication Process for 150 mm Wafers

    NASA Astrophysics Data System (ADS)

    Duff, S. M.; Austermann, J.; Beall, J. A.; Becker, D.; Datta, R.; Gallardo, P. A.; Henderson, S. W.; Hilton, G. C.; Ho, S. P.; Hubmayr, J.; Koopman, B. J.; Li, D.; McMahon, J.; Nati, F.; Niemack, M. D.; Pappas, C. G.; Salatino, M.; Schmitt, B. L.; Simon, S. M.; Staggs, S. T.; Stevens, J. R.; Van Lanen, J.; Vavagiakis, E. M.; Ward, J. T.; Wollack, E. J.

    2016-08-01

    Advanced ACTPol (AdvACT) is a third-generation cosmic microwave background receiver to be deployed in 2016 on the Atacama Cosmology Telescope (ACT). Spanning five frequency bands from 25 to 280 GHz and having just over 5600 transition-edge sensor (TES) bolometers, this receiver will exhibit increased sensitivity and mapping speed compared to previously fielded ACT instruments. This paper presents the fabrication processes developed by NIST to scale to large arrays of feedhorn-coupled multichroic AlMn-based TES polarimeters on 150-mm diameter wafers. In addition to describing the streamlined fabrication process which enables high yields of densely packed detectors across larger wafers, we report the details of process improvements for sensor (AlMn) and insulator (SiN_x) materials and microwave structures, and the resulting performance improvements.

  7. Advanced ACTPol Multichroic Polarimeter Array Fabrication Process for 150 mm Wafers

    NASA Technical Reports Server (NTRS)

    Duff, S. M.; Austermann, J.; Beall, J. A.; Becker, D.; Datta, R.; Gallardo, P. A.; Henderson, S. W.; Hilton, G. C.; Ho, S. P.; Hubmayr, J.; hide

    2016-01-01

    Advanced ACTPol (AdvACT) is a third-generation cosmic microwave background receiver to be deployed in 2016 on the Atacama Cosmology Telescope (ACT). Spanning five frequency bands from 25 to 280 GHz and having just over 5600 transition-edge sensor (TES) bolometers, this receiver will exhibit increased sensitivity and mapping speed compared to previously fielded ACT instruments. This paper presents the fabrication processes developed by NIST to scale to large arrays of feedhorn-coupled multichroic AlMn-based TES polarimeters on 150-mm diameter wafers. In addition to describing the streamlined fabrication process which enables high yields of densely packed detectors across larger wafers, we report the details of process improvements for sensor (AlMn) and insulator (SiN(sub x)) materials and microwave structures, and the resulting performance improvements.

  8. Decontaminating Solar Wind Samples with the Genesis Ultra-Pure Water Megasonic Wafer Spin Cleaner

    NASA Technical Reports Server (NTRS)

    Calaway, Michael J.; Rodriquez, M. C.; Allton, J. H.; Stansbery, E. K.

    2009-01-01

    The Genesis sample return capsule, though broken during the landing impact, contained most of the shattered ultra-pure solar wind collectors comprised of silicon and other semiconductor wafers materials. Post-flight analysis revealed that all wafer fragments were littered with surface particle contamination from spacecraft debris as well as soil from the impact site. This particulate contamination interferes with some analyses of solar wind. In early 2005, the Genesis science team decided to investigate methods for removing the surface particle contamination prior to solar wind analysis.

  9. Disbond detection with piezoelectric wafer active sensors in RC structures strengthened with FRP composite overlays

    NASA Astrophysics Data System (ADS)

    Giurgiutiu, Victor; Harries, Kent; Petrou, Michael; Bost, Joel; Quattlebaum, Josh B.

    2003-12-01

    The capability of embedded piezoelectric wafer active sensors (PWAS) to perform in-situ nondestructive evaluation (NDE) for structural health monitoring (SHM) of reinforced concrete (RC) structures strengthened with fiber reinforced polymer (FRP) composite overlays is explored. First, the disbond detection method were developed on coupon specimens consisting of concrete blocks covered with an FRP composite layer. It was found that the presence of a disbond crack drastically changes the electromechanical (E/M) impedance spectrum measured at the PWAS terminals. The spectral changes depend on the distance between the PWAS and the crack tip. Second, large scale experiments were conducted on a RC beam strengthened with carbon fiber reinforced polymer (CFRP) composite overlay. The beam was subject to an accelerated fatigue load regime in a three-point bending configuration up to a total of 807,415 cycles. During these fatigue tests, the CFRP overlay experienced disbonding beginning at about 500,000 cycles. The PWAS were able to detect the disbonding before it could be reliably seen by visual inspection. Good correlation between the PWAS readings and the position and extent of disbond damage was observed. These preliminary results demonstrate the potential of PWAS technology for SHM of RC structures strengthened with FRP composite overlays.

  10. Single-shot optical recorder with sub-picosecond resolution and scalable record length on a semiconductor wafer

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Muir, R.; Heebner, J.

    In this study, we demonstrate a novel, single-shot recording technology for transient optical signals. A resolution of 0.4 ps over a record length of 54 ps was demonstrated. Here, a pump pulse crossing through a signal samples a diagonal “slice” of space–time, enabling a camera to record spatially the time content of the signal. Unlike related X (2)-based cross-correlation techniques, here the signal is sampled through optically pumped carriers that modify the refractive index of a silicon wafer. Surrounding the wafer with birefringent retarders enables two time-staggered, orthogonally polarized signal copies to probe the wafer. Recombining the copies at amore » final crossed polarizer destructively interferes with them, except during the brief stagger window, where a differential phase shift is incurred. This enables the integrating response of the rapidly excited but persistent carriers to be optically differentiated. Lastly, this sampling mechanism has several advantages that enable scaling to long record lengths, including making use of large, inexpensive semiconductor wafers, eliminating the need for phase matching, broad insensitivity to the spectral and angular properties of the pump, and overall hardware simplicity.« less

  11. Single-shot optical recorder with sub-picosecond resolution and scalable record length on a semiconductor wafer

    DOE PAGES

    Muir, R.; Heebner, J.

    2017-10-24

    In this study, we demonstrate a novel, single-shot recording technology for transient optical signals. A resolution of 0.4 ps over a record length of 54 ps was demonstrated. Here, a pump pulse crossing through a signal samples a diagonal “slice” of space–time, enabling a camera to record spatially the time content of the signal. Unlike related X (2)-based cross-correlation techniques, here the signal is sampled through optically pumped carriers that modify the refractive index of a silicon wafer. Surrounding the wafer with birefringent retarders enables two time-staggered, orthogonally polarized signal copies to probe the wafer. Recombining the copies at amore » final crossed polarizer destructively interferes with them, except during the brief stagger window, where a differential phase shift is incurred. This enables the integrating response of the rapidly excited but persistent carriers to be optically differentiated. Lastly, this sampling mechanism has several advantages that enable scaling to long record lengths, including making use of large, inexpensive semiconductor wafers, eliminating the need for phase matching, broad insensitivity to the spectral and angular properties of the pump, and overall hardware simplicity.« less

  12. Challenges of NDE Simulation Tool Challenges of NDE Simulation Tool

    NASA Technical Reports Server (NTRS)

    Leckey, Cara A. C.; Juarez, Peter D.; Seebo, Jeffrey P.; Frank, Ashley L.

    2015-01-01

    Realistic nondestructive evaluation (NDE) simulation tools enable inspection optimization and predictions of inspectability for new aerospace materials and designs. NDE simulation tools may someday aid in the design and certification of advanced aerospace components; potentially shortening the time from material development to implementation by industry and government. Furthermore, modeling and simulation are expected to play a significant future role in validating the capabilities and limitations of guided wave based structural health monitoring (SHM) systems. The current state-of-the-art in ultrasonic NDE/SHM simulation cannot rapidly simulate damage detection techniques for large scale, complex geometry composite components/vehicles with realistic damage types. This paper discusses some of the challenges of model development and validation for composites, such as the level of realism and scale of simulation needed for NASA' applications. Ongoing model development work is described along with examples of model validation studies. The paper will also discuss examples of the use of simulation tools at NASA to develop new damage characterization methods, and associated challenges of validating those methods.

  13. Analysis and modeling of wafer-level process variability in 28 nm FD-SOI using split C-V measurements

    NASA Astrophysics Data System (ADS)

    Pradeep, Krishna; Poiroux, Thierry; Scheer, Patrick; Juge, André; Gouget, Gilles; Ghibaudo, Gérard

    2018-07-01

    This work details the analysis of wafer level global process variability in 28 nm FD-SOI using split C-V measurements. The proposed approach initially evaluates the native on wafer process variability using efficient extraction methods on split C-V measurements. The on-wafer threshold voltage (VT) variability is first studied and modeled using a simple analytical model. Then, a statistical model based on the Leti-UTSOI compact model is proposed to describe the total C-V variability in different bias conditions. This statistical model is finally used to study the contribution of each process parameter to the total C-V variability.

  14. SCIL nanoimprint solutions: high-volume soft NIL for wafer scale sub-10nm resolution

    NASA Astrophysics Data System (ADS)

    Voorkamp, R.; Verschuuren, M. A.; van Brakel, R.

    2016-10-01

    Nano-patterning materials and surfaces can add unique functionalities and properties which cannot be obtained in bulk or micro-structured materials. Examples range from hetro-epitaxy of semiconductor nano-wires to guiding cell expression and growth on medical implants. [1] Due to the cost and throughput requirements conventional nano-patterning techniques such as deep UV lithography (cost and flat substrate demands) and electron-beam lithography (cost, throughput) are not an option. Self-assembly techniques are being considered for IC manufacturing, but require nano-sized guiding patterns, which have to be fabricated in any case.[2] Additionally, the self-assembly process is highly sensitive to the environment and layer thickness, which is difficult to control on non-flat surfaces such as PV silicon wafers or III/V substrates. Laser interference lithography can achieve wafer scale periodic patterns, but is limited by the throughput due to intensity of the laser at the pinhole and only regular patterns are possible where the pattern fill fraction cannot be chosen freely due to the interference condition.[3] Nanoimprint lithography (NIL) is a promising technology for the cost effective fabrication of sub-micron and nano-patterns on large areas. The challenges for NIL are related to the technique being a contact method where a stamp which holds the patterns is required to be brought into intimate contact with the surface of the product. In NIL a strong distinction is made between the type of stamp used, either rigid or soft. Rigid stamps are made from patterned silicon, silica or plastic foils and are capable of sub-10nm resolution and wafer scale patterning. All these materials behave similar at the micro- to nm scale and require high pressures (5 - 50 Bar) to enable conformal contact to be made on wafer scales. Real world conditions such as substrate bow and particle contaminants complicate the use of rigid stamps for wafer scale areas, reducing stamp lifetime and

  15. Surface morphology and dislocation characteristics near the surface of 4H-SiC wafer using multi-directional scanning transmission electron microscopy.

    PubMed

    Sato, Takahiro; Orai, Yoshihisa; Suzuki, Yuya; Ito, Hiroyuki; Isshiki, Toshiyuki; Fukui, Munetoshi; Nakamura, Kuniyasu; Schamp, C T

    2017-10-01

    To improve the reliability of silicon carbide (SiC) electronic power devices, the characteristics of various kinds of crystal defects should be precisely understood. Of particular importance is understanding the correlation between the surface morphology and the near surface dislocations. In order to analyze the dislocations near the surface of 4H-SiC wafers, a dislocation analysis protocol has been developed. This protocol consists of the following process: (1) inspection of surface defects using low energy scanning electron microscopy (LESEM), (2) identification of small and shallow etch pits using KOH low temperature etching, (3) classification of etch pits using LESEM, (4) specimen preparation of several hundred nanometer thick sample using the in-situ focused ion beam micro-sampling® technique, (5) crystallographic analysis using the selected diffraction mode of the scanning transmission electron microscope (STEM), and (6) determination of the Burgers vector using multi-directional STEM (MD-STEM). The results show a correlation between the triangular terrace shaped surface defects and an hexagonal etch pit arising from threading dislocations, linear shaped surface defects and elliptical shaped etch pits arising from basal plane dislocations. Through the observation of the sample from two orthogonal directions via the MD-STEM technique, a basal plane dislocation is found to dissociate into an extended dislocation bound by two partial dislocations. A protocol developed and presented in this paper enables one to correlate near surface defects of a 4H-SiC wafer with the root cause dislocations giving rise to those surface defects. © The Author 2017. Published by Oxford University Press on behalf of The Japanese Society of Microscopy. All rights reserved. For permissions, please e-mail: journals.permissions@oup.com.

  16. 24 CFR 3282.362 - Production Inspection Primary Inspection Agencies (IPIAs).

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... in production which fails to conform to the design or where the design is not specific, to the... 24 Housing and Urban Development 5 2010-04-01 2010-04-01 false Production Inspection Primary... REGULATIONS Primary Inspection Agencies § 3282.362 Production Inspection Primary Inspection Agencies (IPIAs...

  17. Effect of Rapid Thermal Processing on Light-Induced Degradation of Carrier Lifetime in Czochralski p-Type Silicon Bare Wafers

    NASA Astrophysics Data System (ADS)

    Kouhlane, Y.; Bouhafs, D.; Khelifati, N.; Belhousse, S.; Menari, H.; Guenda, A.; Khelfane, A.

    2016-11-01

    The electrical properties of Czochralski silicon (Cz-Si) p-type boron-doped bare wafers have been investigated after rapid thermal processing (RTP) with different peak temperatures. Treated wafers were exposed to light for various illumination times, and the effective carrier lifetime ( τ eff) measured using the quasi-steady-state photoconductance (QSSPC) technique. τ eff values dropped after prolonged illumination exposure due to light-induced degradation (LID) related to electrical activation of boron-oxygen (BO) complexes, except in the sample treated with peak temperature of 785°C, for which the τ eff degradation was less pronounced. Also, a reduction was observed when using the 830°C peak temperature, an effect that was enhanced by alteration of the wafer morphology (roughness). Furthermore, the electrical resistivity presented good stability under light exposure as a function of temperature compared with reference wafers. Additionally, the optical absorption edge shifted to higher wavelength, leading to increased free-carrier absorption by treated wafers. Moreover, a theoretical model is used to understand the lifetime degradation and regeneration behavior as a function of illumination time. We conclude that RTP plays an important role in carrier lifetime regeneration for Cz-Si wafers via modification of optoelectronic and structural properties. The balance between an optimized RTP cycle and the rest of the solar cell elaboration process can overcome the negative effect of LID and contribute to achievement of higher solar cell efficiency and module performance.

  18. 9 CFR 381.68 - Maximum inspection rates-New turkey inspection system.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 9 Animals and Animal Products 2 2012-01-01 2012-01-01 false Maximum inspection rates-New turkey... Procedures § 381.68 Maximum inspection rates—New turkey inspection system. (a) The maximum inspection rates for one inspector New Turkey Inspection (NTI-1 and NTI-1 Modified) and two inspectors New Turkey...

  19. 9 CFR 381.68 - Maximum inspection rates-New turkey inspection system.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 9 Animals and Animal Products 2 2013-01-01 2013-01-01 false Maximum inspection rates-New turkey... Procedures § 381.68 Maximum inspection rates—New turkey inspection system. (a) The maximum inspection rates for one inspector New Turkey Inspection (NTI-1 and NTI-1 Modified) and two inspectors New Turkey...

  20. 9 CFR 381.68 - Maximum inspection rates-New turkey inspection system.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 9 Animals and Animal Products 2 2014-01-01 2014-01-01 false Maximum inspection rates-New turkey... Procedures § 381.68 Maximum inspection rates—New turkey inspection system. (a) The maximum inspection rates for one inspector New Turkey Inspection (NTI-1 and NTI-1 Modified) and two inspectors New Turkey...

  1. 9 CFR 381.68 - Maximum inspection rates-New turkey inspection system.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 9 Animals and Animal Products 2 2011-01-01 2011-01-01 false Maximum inspection rates-New turkey... Procedures § 381.68 Maximum inspection rates—New turkey inspection system. (a) The maximum inspection rates for one inspector New Turkey Inspection (NTI-1 and NTI-1 Modified) and two inspectors New Turkey...

  2. 9 CFR 381.68 - Maximum inspection rates-New turkey inspection system.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 9 Animals and Animal Products 2 2010-01-01 2010-01-01 false Maximum inspection rates-New turkey... Procedures § 381.68 Maximum inspection rates—New turkey inspection system. (a) The maximum inspection rates for one inspector New Turkey Inspection (NTI-1 and NTI-1 Modified) and two inspectors New Turkey...

  3. Wafer-scale epitaxial graphene on SiC for sensing applications

    NASA Astrophysics Data System (ADS)

    Karlsson, Mikael; Wang, Qin; Zhao, Yichen; Zhao, Wei; Toprak, Muhammet S.; Iakimov, Tihomir; Ali, Amer; Yakimova, Rositza; Syväjärvi, Mikael; Ivanov, Ivan G.

    2015-12-01

    The epitaxial graphene-on-silicon carbide (SiC-G) has advantages of high quality and large area coverage owing to a natural interface between graphene and SiC substrate with dimension up to 100 mm. It enables cost effective and reliable solutions for bridging the graphene-based sensors/devices from lab to industrial applications and commercialization. In this work, the structural, optical and electrical properties of wafer-scale graphene grown on 2'' 4H semi-insulating (SI) SiC utilizing sublimation process were systemically investigated with focus on evaluation of the graphene's uniformity across the wafer. As proof of concept, two types of glucose sensors based on SiC-G/Nafion/Glucose-oxidase (GOx) and SiC-G/Nafion/Chitosan/GOx were fabricated and their electrochemical properties were characterized by cyclic voltammetry (CV) measurements. In addition, a few similar glucose sensors based on graphene by chemical synthesis using modified Hummer's method were also fabricated for comparison.

  4. High-wafer-yield, high-performance vertical cavity surface-emitting lasers

    NASA Astrophysics Data System (ADS)

    Li, Gabriel S.; Yuen, Wupen; Lim, Sui F.; Chang-Hasnain, Constance J.

    1996-04-01

    Vertical cavity surface emitting lasers (VCSELs) with very low threshold current and voltage of 340 (mu) A and 1.5 V is achieved. The molecular beam epitaxially grown wafers are grown with a highly accurate, low cost and versatile pre-growth calibration technique. One- hundred percent VCSEL wafer yield is obtained. Low threshold current is achieved with a native oxide confined structure with excellent current confinement. Single transverse mode with stable, predetermined polarization direction up to 18 times threshold is also achieved, due to stable index guiding provided by the structure. This is the highest value reported to data for VCSELs. We have established that p-contact annealing in these devices is crucial for low voltage operation, contrary to the general belief. Uniform doping in the mirrors also appears not to be inferior to complicated doping engineering. With these design rules, very low threshold voltage VCSELs are achieved with very simple growth and fabrication steps.

  5. Resonance ultrasonic vibrations in Cz-Si wafers as a possible diagnostic technique in ion implantation

    NASA Astrophysics Data System (ADS)

    Zhao, Z. Y.; Ostapenko, S.; Anundson, R.; Tvinnereim, M.; Belyaev, A.; Anthony, M.

    2001-07-01

    The semiconductor industry does not have effective metrology for well implants. The ability to measure such deep level implants will become increasingly important as we progress along the technology road map. This work explores the possibility of using the acoustic whistle effect on ion implanted silicon wafers. The technique detects the elastic stress and defects in silicon wafers by measuring the sub-harmonic f/2 resonant vibrations on a wafer induced via backside contact to create standing waves, which are measured by a non-contact ultrasonic probe. Preliminary data demonstrates that it is sensitive to implant damage, and there is a direct correlation between this sub-harmonic acoustic mode and some of the implant and anneal conditions. This work presents the results of a feasibility study to assess and quantify the correspondent whistle effect to implant damage, residual damage after annealing and intrinsic defects.

  6. Uncertainty evaluation of thickness and warp of a silicon wafer measured by a spectrally resolved interferometer

    NASA Astrophysics Data System (ADS)

    Praba Drijarkara, Agustinus; Gergiso Gebrie, Tadesse; Lee, Jae Yong; Kang, Chu-Shik

    2018-06-01

    Evaluation of uncertainty of thickness and gravity-compensated warp of a silicon wafer measured by a spectrally resolved interferometer is presented. The evaluation is performed in a rigorous manner, by analysing the propagation of uncertainty from the input quantities through all the steps of measurement functions, in accordance with the ISO Guide to the Expression of Uncertainty in Measurement. In the evaluation, correlation between input quantities as well as uncertainty attributed to thermal effect, which were not included in earlier publications, are taken into account. The temperature dependence of the group refractive index of silicon was found to be nonlinear and varies widely within a wafer and also between different wafers. The uncertainty evaluation described here can be applied to other spectral interferometry applications based on similar principles.

  7. Wafer-scale growth of highly textured piezoelectric thin films by pulsed laser deposition for micro-scale sensors and actuators

    NASA Astrophysics Data System (ADS)

    Nguyen, M. D.; Tiggelaar, R.; Aukes, T.; Rijnders, G.; Roelof, G.

    2017-11-01

    Piezoelectric lead-zirconate-titanate (PZT) thin films were deposited on 4-inch (111)Pt/Ti/SiO2/Si(001) wafers using large-area pulsed laser deposition (PLD). This study was focused on the homogeneity in film thickness, microstructure, ferroelectric and piezoelectric properties of PZT thin films. The results indicated that the highly textured (001)-oriented PZT thin films with wafer-scale thickness homogeneity (990 nm ± 0.8%) were obtained. The films were fabricated into piezoelectric cantilevers through a MEMS microfabrication process. The measured longitudinal piezoelectric coefficient (d 33f = 210 pm/V ± 1.6%) and piezoelectric transverse coefficient (e 31f = -18.8 C/m2 ± 2.8%) were high and homogeneity across wafers. The high piezoelectric properties on Si wafers will extend industrial application of PZT thin films and further development of piezoMEMS.

  8. A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

    PubMed Central

    Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

    2014-01-01

    This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S. PMID:25521385

  9. A high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging.

    PubMed

    Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

    2014-12-16

    This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in "H" type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than -0.01% F.S/°C in the range of -40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.

  10. Wireless data collection retrievals of bridge inspection/management information.

    DOT National Transportation Integrated Search

    2017-02-28

    To increase the efficiency and reliability of bridge inspections, MDOT contracted to have a 3D-model-based data entry application for mobile tablets developed to aid inspectors in the field. The 3D Bridge App is a mobile software tool designed to fac...

  11. Investigation of diffusion length distribution on polycrystalline silicon wafers via photoluminescence methods

    PubMed Central

    Lou, Shishu; Zhu, Huishi; Hu, Shaoxu; Zhao, Chunhua; Han, Peide

    2015-01-01

    Characterization of the diffusion length of solar cells in space has been widely studied using various methods, but few studies have focused on a fast, simple way to obtain the quantified diffusion length distribution on a silicon wafer. In this work, we present two different facile methods of doing this by fitting photoluminescence images taken in two different wavelength ranges or from different sides. These methods, which are based on measuring the ratio of two photoluminescence images, yield absolute values of the diffusion length and are less sensitive to the inhomogeneity of the incident laser beam. A theoretical simulation and experimental demonstration of this method are presented. The diffusion length distributions on a polycrystalline silicon wafer obtained by the two methods show good agreement. PMID:26364565

  12. A Wafer-Bonded, Floating Element Shear-Stress Sensor Using a Geometric Moire Optical Transduction Technique

    NASA Technical Reports Server (NTRS)

    Horowitz, Stephen; Chen, Tai-An; Chandrasekaran, Venkataraman; Tedjojuwono, Ken; Cattafesta, Louis; Nishida, Toshikazu; Sheplak, Mark

    2004-01-01

    This paper presents a geometric Moir optical-based floating-element shear stress sensor for wind tunnel turbulence measurements. The sensor was fabricated using an aligned wafer-bond/thin-back process producing optical gratings on the backside of a floating element and on the top surface of the support wafer. Measured results indicate a static sensitivity of 0.26 microns/Pa, a resonant frequency of 1.7 kHz, and a noise floor of 6.2 mPa/(square root)Hz.

  13. Surface characteristics and damage distributions of diamond wire sawn wafers for silicon solar cells

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sopori, Bhushan; Devayajanam, Srinivas; Basnyat, Prakash

    2016-01-01

    This paper describes surface characteristics, in terms of its morphology, roughness and near-surface damage of Si wafers cut by diamond wire sawing (DWS) of Si ingots under different cutting conditions. Diamond wire sawn Si wafers exhibit nearly-periodic surface features of different spatial wavelengths, which correspond to kinematics of various movements during wafering, such as ingot feed, wire reciprocation, and wire snap. The surface damage occurs in the form of frozen-in dislocations, phase changes, and microcracks. The in-depth damage was determined by conventional methods such as TEM, SEM and angle-polishing/defect-etching. However, because these methods only provide local information, we have alsomore » applied a new technique that determines average damage depth over a large area. This technique uses sequential measurement of the minority carrier lifetime after etching thin layers from the surfaces. The lateral spatial damage variations, which seem to be mainly related to wire reciprocation process, were observed by photoluminescence and minority carrier lifetime mapping. Our results show a strong correlation of damage depth on the diamond grit size and wire usage.« less

  14. Fabrication of a high aspect ratio thick silicon wafer mold and electroplating using flipchip bonding for MEMS applications

    NASA Astrophysics Data System (ADS)

    Kim, Bong-Hwan; Kim, Jong-Bok

    2009-06-01

    We have developed a microfabrication process for high aspect ratio thick silicon wafer molds and electroplating using flipchip bonding with THB 151N negative photoresist (JSR micro). This fabrication technique includes large area and high thickness silicon wafer mold electroplating. The process consists of silicon deep reactive ion etching (RIE) of the silicon wafer mold, photoresist bonding between the silicon mold and the substrate, nickel electroplating and a silicon removal process. High thickness silicon wafer molds were made by deep RIE and flipchip bonding. In addition, nickel electroplating was developed. Dry film resist (ORDYL MP112, TOK) and thick negative-tone photoresist (THB 151N, JSR micro) were used as bonding materials. In order to measure the bonding strength, the surface energy was calculated using a blade test. The surface energy of the bonding wafers was found to be 0.36-25.49 J m-2 at 60-180 °C for the dry film resist and 0.4-1.9 J m-2 for THB 151N in the same temperature range. Even though ORDYL MP112 has a better value of surface energy than THB 151N, it has a critical disadvantage when it comes to removing residue after electroplating. The proposed process can be applied to high aspect ratio MEMS structures, such as air gap inductors or vertical MEMS probe tips.

  15. Investigation of the heating behavior of carbide-bonded graphene coated silicon wafer used for hot embossing

    NASA Astrophysics Data System (ADS)

    Yang, Gao; Li, Lihua; Lee, Wing Bun; Ng, Man Cheung; Chan, Chang Yuen

    2018-03-01

    A recently developed carbide-bonded graphene (CBG) coated silicon wafer was found to be an effective micro-patterned mold material for implementing rapid heating in hot embossing processes owing to its superior electrical and thermal conductivity, in addition to excellent mechanical properties. To facilitate the achievement of precision temperature control in the hot embossing, the heating behavior of a CBG coated silicon wafer sample was experimentally investigated. First, two groups of controlled experiments were conducted for quantitatively evaluating the influence of the main factors such as the vacuum pressure and gaseous environment (vacuum versus nitrogen) on its heating performance. The electrical and thermal responses of this sample under a voltage of 60 V were then intensively analyzed, and revealed that it had somewhat semi-conducting properties. Further, we compared its thermal profiles under different settings of the input voltage and current limiting threshold. Moreover, the strong temperature dependence of electrical resistance for this material was observed and determined. Ultimately, the surface temperature of CBG coated silicon wafer could be as high as 1300 ℃, but surprisingly the graphene coating did not detach from the substrate under such an elevated temperature due to its strong thermal coupling with the silicon wafer.

  16. SEMICONDUCTOR TECHNOLOGY A new cleaning process for the metallic contaminants on a post-CMP wafer's surface

    NASA Astrophysics Data System (ADS)

    Baohong, Gao; Yuling, Liu; Chenwei, Wang; Yadong, Zhu; Shengli, Wang; Qiang, Zhou; Baimei, Tan

    2010-10-01

    This paper presents a new cleaning process using boron-doped diamond (BDD) film anode electrochemical oxidation for metallic contaminants on polished silicon wafer surfaces. The BDD film anode electrochemical oxidation can efficiently prepare pyrophosphate peroxide, pyrophosphate peroxide can oxidize organic contaminants, and pyrophosphate peroxide is deoxidized into pyrophosphate. Pyrophosphate, a good complexing agent, can form a metal complex, which is a structure consisting of a copper ion, bonded to a surrounding array of two pyrophosphate anions. Three polished wafers were immersed in the 0.01 mol/L CuSO4 solution for 2 h in order to make comparative experiments. The first one was cleaned by pyrophosphate peroxide, the second by RCA (Radio Corporation of America) cleaning, and the third by deionized (DI) water. The XPS measurement result shows that the metallic contaminants on wafers cleaned by the RCA method and by pyrophosphate peroxide is less than the XPS detection limits of 1 ppm. And the wafer's surface cleaned by pyrophosphate peroxide is more efficient in removing organic carbon residues than RCA cleaning. Therefore, BDD film anode electrochemical oxidation can be used for microelectronics cleaning, and it can effectively remove organic contaminants and metallic contaminants in one step. It also achieves energy saving and environmental protection.

  17. Development of parametric material, energy, and emission inventories for wafer fabrication in the semiconductor industry.

    PubMed

    Murphy, Cynthia F; Kenig, George A; Allen, David T; Laurent, Jean-Philippe; Dyer, David E

    2003-12-01

    Currently available data suggest that most of the energy and material consumption related to the production of an integrated circuit is due to the wafer fabrication process. The complexity of wafer manufacturing, requiring hundreds of steps that vary from product to product and from facility to facility and which change every few years, has discouraged the development of material, energy, and emission inventory modules for the purpose of insertion into life cycle assessments. To address this difficulty, a flexible, process-based system for estimating material requirements, energy requirements, and emissions in wafer fabrication has been developed. The method accounts for mass and energy use atthe unit operation level. Parametric unit operation modules have been developed that can be used to predict changes in inventory as the result of changes in product design, equipment selection, or process flow. A case study of the application of the modules is given for energy consumption, but a similar methodology can be used for materials, individually or aggregated.

  18. Inspection Checklist for Pharmaceuticals MACT Standard 40 CFR Part 63

    EPA Pesticide Factsheets

    This checklist is a compliance tool and/or a guidance document to be used by USEPA, State and Local agency inspectors, as well as the pharmaceutical industry, for the purposes of a facility compliance inspection or a self audit.

  19. Texturization of as-cut p-type monocrystalline silicon wafer using different wet chemical solutions

    NASA Astrophysics Data System (ADS)

    Hashmi, Galib; Hasanuzzaman, Muhammad; Basher, Mohammad Khairul; Hoq, Mahbubul; Rahman, Md. Habibur

    2018-06-01

    Implementing texturization process on the monocrystalline silicon substrate reduces reflection and enhances light absorption of the substrate. Thus texturization is one of the key elements to increase the efficiency of solar cell. Considering as-cut monocrystalline silicon wafer as base substrate, in this work different concentrations of Na2CO3 and NaHCO3 solution, KOH-IPA (isopropyl alcohol) solution and tetramethylammonium hydroxide solution with different time intervals have been investigated for texturization process. Furthermore, saw damage removal process was conducted with 10% NaOH solution, 20 wt% KOH-13.33 wt% IPA solution and HF/nitric/acetic acid solution. The surface morphology of saw damage, saw damage removed surface and textured wafer were observed using optical microscope and field emission scanning electron microscopy. Texturization causes pyramidal micro structures on the surface of (100) oriented monocrystalline silicon wafer. The height of the pyramid on the silicon surface varies from 1.5 to 3.2 µm and the inclined planes of the pyramids are acute angle. Contact angle value indicates that the textured wafer's surface fall in between near-hydrophobic to hydrophobic range. With respect to base material absolute reflectance 1.049-0.75% within 250-800 nm wavelength region, 0.1-0.026% has been achieved within the same wavelength region when textured with 0.76 wt% KOH-4 wt% IPA solution for 20 min. Furthermore, an alternative route of using 1 wt% Na2CO3-0.2 wt% NaHCO3 solution for 50 min has been exploited in the texturization process.

  20. In-situ wafer bowing measurements of GaN grown on Si (111) substrate by reflectivity mapping in metal organic chemical vapor deposition system

    NASA Astrophysics Data System (ADS)

    Yang, Yi-Bin; Liu, Ming-Gang; Chen, Wei-Jie; Han, Xiao-Biao; Chen, Jie; Lin, Xiu-Qi; Lin, Jia-Li; Luo, Hui; Liao, Qiang; Zang, Wen-Jie; Chen, Yin-Song; Qiu, Yun-Ling; Wu, Zhi-Sheng; Liu, Yang; Zhang, Bai-Jun

    2015-09-01

    In this work, the wafer bowing during growth can be in-situ measured by a reflectivity mapping method in the 3×2″ Thomas Swan close coupled showerhead metal organic chemical vapor deposition (MOCVD) system. The reflectivity mapping method is usually used to measure the film thickness and growth rate. The wafer bowing caused by stresses (tensile and compressive) during the epitaxial growth leads to a temperature variation at different positions on the wafer, and the lower growth temperature leads to a faster growth rate and vice versa. Therefore, the wafer bowing can be measured by analyzing the discrepancy of growth rates at different positions on the wafer. Furthermore, the wafer bowings were confirmed by the ex-situ wafer bowing measurement. High-resistivity and low-resistivity Si substrates were used for epitaxial growth. In comparison with low-resistivity Si substrate, GaN grown on high-resistivity substrate shows a larger wafer bowing caused by the highly compressive stress introduced by compositionally graded AlGaN buffer layer. This transition of wafer bowing can be clearly in-situ measured by using the reflectivity mapping method. Project supported by the National Natural Science Foundation of China (Grant Nos. 61274039 and 51177175), the National Basic Research Program of China (Grant No. 2011CB301903), the Ph.D. Programs Foundation of Ministry of Education of China (Grant No. 20110171110021), the International Science and Technology Collaboration Program of China (Grant No. 2012DFG52260), the International Science and Technology Collaboration Program of Guangdong Province, China (Grant No. 2013B051000041), the Science and Technology Plan of Guangdong Province, China (Grant No. 2013B010401013), the National High Technology Research and Development Program of China (Grant No. 2014AA032606), and the Opened Fund of the State Key Laboratory on Integrated Optoelectronics, China (Grant No. IOSKL2014KF17).

  1. EVA Hazards due to TPS Inspection and Repair

    NASA Technical Reports Server (NTRS)

    Stewart, Christine E.

    2007-01-01

    Tile inspection and repair activities have implicit hazards associated with them. When an Extra Vehicular Activities (EVA) crewmember and associated hardware are added into the equation, additional hazards are introduced. Potential hazards to the Extravehicular Mobility Unit (EMU), the Orbiter or the crew member themselves are created. In order to accurately assess the risk of performing a TPS inspection or repair, an accurate evaluation of potential hazards and how adequately these hazards are controlled is essential. The EMU could become damaged due to sharp edges, protrusions, thermal extremes, molten metal or impact with the Orbiter. Tools, tethers and the presence of a crew member in the vicinity of the Orbiter Thermal Protection System (TPS) pose hazards to the Orbiter. Hazards such as additional tile or Reinforced Carbon-Carbon (RCC) damage from a loose tool, safety tethers, crewmember or arm impact are introduced. Additionally, there are hazards to the crew which should be addressed. Crew hazards include laser injury, electrical shock, inability to return to the airlock for EMU failures or Orbiter rapid safing scenarios, as well as the potential inadvertent release of a crew member from the arm/boom. The aforementioned hazards are controlled in various ways. Generally, these controls are addressed operationally versus by design, as the majority of the interfaces are to the Orbiter and the Orbiter design did not originally account for tile repair. The Shuttle Remote Manipulator System (SRMS), for instance, was originally designed to deploy experiments, and therefore has insufficient design controls for retention of the Orbiter Boom Sensor System (OBSS). Although multiple methods to repair the Orbiter TPS exist, the majority of the hazards are applicable no matter which specific repair method is being performed. TPS Inspection performed via EVA also presents some of the same hazards. Therefore, the hazards common to all TPS inspection or repair methods will

  2. Real-time direct and diffraction X-ray imaging of irregular silicon wafer breakage.

    PubMed

    Rack, Alexander; Scheel, Mario; Danilewsky, Andreas N

    2016-03-01

    Fracture and breakage of single crystals, particularly of silicon wafers, are multi-scale problems: the crack tip starts propagating on an atomic scale with the breaking of chemical bonds, forms crack fronts through the crystal on the micrometre scale and ends macroscopically in catastrophic wafer shattering. Total wafer breakage is a severe problem for the semiconductor industry, not only during handling but also during temperature treatments, leading to million-dollar costs per annum in a device production line. Knowledge of the relevant dynamics governing perfect cleavage along the {111} or {110} faces, and of the deflection into higher indexed {hkl} faces of higher energy, is scarce due to the high velocity of the process. Imaging techniques are commonly limited to depicting only the state of a wafer before the crack and in the final state. This paper presents, for the first time, in situ high-speed crack propagation under thermal stress, imaged simultaneously in direct transmission and diffraction X-ray imaging. It shows how the propagating crack tip and the related strain field can be tracked in the phase-contrast and diffracted images, respectively. Movies with a time resolution of microseconds per frame reveal that the strain and crack tip do not propagate continuously or at a constant speed. Jumps in the crack tip position indicate pinning of the crack tip for about 1-2 ms followed by jumps faster than 2-6 m s(-1), leading to a macroscopically observed average velocity of 0.028-0.055 m s(-1). The presented results also give a proof of concept that the described X-ray technique is compatible with studying ultra-fast cracks up to the speed of sound.

  3. Robotic inspection of fiber reinforced composites using phased array UT

    NASA Astrophysics Data System (ADS)

    Stetson, Jeffrey T.; De Odorico, Walter

    2014-02-01

    Ultrasound is the current NDE method of choice to inspect large fiber reinforced airframe structures. Over the last 15 years Cartesian based scanning machines using conventional ultrasound techniques have been employed by all airframe OEMs and their top tier suppliers to perform these inspections. Technical advances in both computing power and commercially available, multi-axis robots now facilitate a new generation of scanning machines. These machines use multiple end effector tools taking full advantage of phased array ultrasound technologies yielding substantial improvements in inspection quality and productivity. This paper outlines the general architecture for these new robotic scanning systems as well as details the variety of ultrasonic techniques available for use with them including advances such as wide area phased array scanning and sound field adaptation for non-flat, non-parallel surfaces.

  4. Emissivity properties of silicon wafers and their application to radiation thermometry

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Iuchi, T.; Seo, T.

    We studied the spectral and directional emissivities of silicon wafers using an optical polarization technique. Based on the simulation and experimental results, we developed two different radiation thermometry methods for silicon wafers, the first based on a polarized emissivity-invariant condition, and the second based on the relationship between the ratio of the p-to s-polarized radiance and the polarized emissivity. These methods can be performed at temperatures above 600 °C and over a wide wavelength range (0.9∼5 μm), irrespective of dielectric film thickness and substrate resistivity due to the dopant concentrations. Temperature measurements were estimated to have expanded uncertainties (k=2) ofmore » less than 5 °C. A radiometer system with wavelengths above 4.5 μm was successfully developed because the system was not influenced by background noise caused by a high-intensity heating lamp.« less

  5. Hygiene inspections on passenger ships in Europe - an overview

    PubMed Central

    2010-01-01

    of 48) of the port authorities of other countries. Conclusion This study revealed a diversity of approaches and practices in the conduct of inspections, differences in the qualifications/knowledge/experience of inspectors, the legislation applied during inspections, and the lack of communication and training among many EU countries. An integrated European inspection programme involving competent expert inspectors in each EU Member States and special training for ship hygiene delivered to crew members and inspectors would help to minimize the risk of communicable diseases. Common inspection tools at a European level for hygiene inspection practices and port-to-port communication are needed. PMID:20219097

  6. Hygiene inspections on passenger ships in Europe - an overview.

    PubMed

    Mouchtouri, Varvara A; Westacott, Sandra; Nichols, Gordon; Riemer, Tobias; Skipp, Mel; Bartlett, Christopher L R; Kremastinou, Jenny; Hadjichristodoulou, Christos

    2010-03-10

    authorities of other countries. This study revealed a diversity of approaches and practices in the conduct of inspections, differences in the qualifications/knowledge/experience of inspectors, the legislation applied during inspections, and the lack of communication and training among many EU countries. An integrated European inspection programme involving competent expert inspectors in each EU Member States and special training for ship hygiene delivered to crew members and inspectors would help to minimize the risk of communicable diseases. Common inspection tools at a European level for hygiene inspection practices and port-to-port communication are needed.

  7. Improved delivery of the anticancer agent citral using BSA nanoparticles and polymeric wafers.

    PubMed

    White, Benjamin; Evison, Anna; Dombi, Eszter; Townley, Helen E

    2017-01-01

    Rhabdomyosarcoma (RMS) is the most common soft tissue sarcoma in children, with a 5-year survival rate of between 30 and 65%. Standard treatment involves surgery, radiation treatment, and chemotherapy. However, there is a high recurrence rate, particularly from locoregional spread. We investigated the use of the natural compound citral (3,7-dimethyl-2,6-octadienal), which can be found in a number of plants, but is particularly abundant in lemon grass ( Cymbopogon citratus ) oil, for activity against immortalized RMS cells. Significant cancer cell death was seen at concentrations above 150 μM citral, and mitochondrial morphological changes were seen after incubation with 10 μM citral. However, since citral is a highly volatile molecule, we prepared albumin particles by a desolvation method to encapsulate citral, as a means of stabilization. We then further incorporated the loaded nanoparticles into a biodegradable polyanhydride wafer to generate a slow release system. The wafers were shown to degrade by 50% over the course of 25 days and to release the active compound. We therefore propose the use of the citral-nanoparticle-polymer wafers for implantation into the tumor bed after surgical removal of a sarcoma as a means to control locoregional spread due to any remaining cancerous cells.

  8. Improved delivery of the anticancer agent citral using BSA nanoparticles and polymeric wafers

    PubMed Central

    White, Benjamin; Evison, Anna; Dombi, Eszter; Townley, Helen E

    2017-01-01

    Rhabdomyosarcoma (RMS) is the most common soft tissue sarcoma in children, with a 5-year survival rate of between 30 and 65%. Standard treatment involves surgery, radiation treatment, and chemotherapy. However, there is a high recurrence rate, particularly from locoregional spread. We investigated the use of the natural compound citral (3,7-dimethyl-2,6-octadienal), which can be found in a number of plants, but is particularly abundant in lemon grass (Cymbopogon citratus) oil, for activity against immortalized RMS cells. Significant cancer cell death was seen at concentrations above 150 μM citral, and mitochondrial morphological changes were seen after incubation with 10 μM citral. However, since citral is a highly volatile molecule, we prepared albumin particles by a desolvation method to encapsulate citral, as a means of stabilization. We then further incorporated the loaded nanoparticles into a biodegradable polyanhydride wafer to generate a slow release system. The wafers were shown to degrade by 50% over the course of 25 days and to release the active compound. We therefore propose the use of the citral-nanoparticle-polymer wafers for implantation into the tumor bed after surgical removal of a sarcoma as a means to control locoregional spread due to any remaining cancerous cells. PMID:29263655

  9. Rapid Inspection of Aerospace Structures - Is It Autonomous Yet?

    NASA Technical Reports Server (NTRS)

    Bar-Cohen, Yoseph; Backes, Paul; Joffe, Benjamin

    1996-01-01

    The trend to increase the usage of aging aircraft added a great deal of urgency to the ongoing need for low-cost, rapid, simple-to-operate, reliable and efficient NDE methods for detection and characterization of flaws in aircraft structures. In many cases, the problem of inspection is complex due to the limitation of current technology and the need to disassemble aircraft structures and testing them in lab conditions. To overcome these limitations, reliable field inspection tools are being developed for rapid NDE of large and complex-shape structures, that can operate at harsh, hostal and remote conditions with minimum human interface. In recent years, to address the need for rapid inspection in field conditions, numerous portable scanners were developed using NDE methods, including ultrasonics, shearography, thermography. This paper is written with emphasis on ultrasonic NDE scanners, their evolution and the expected direction of growth.

  10. Fabrication of SOI structures with buried cavities using Si wafer direct bonding and electrochemical etch-stop

    NASA Astrophysics Data System (ADS)

    Chung, Gwiy-Sang

    2003-10-01

    This paper describes the fabrication of SOI structures with buried cavities using SDB and electrochemical etch-stop. These methods are suitable for thick membrane fabrication with accurate thickness, uniformity, and flatness. After a feed-through hole for supplied voltage and buried cavities was formed on a handle Si wafer with p-type, the handle wafer was bonded to an active Si wafer consisting of a p-type substrate with an n-type epitaxial layer corresponding to membrane thickness. The bonded pair was then thinned until electrochemical etch-stop occurred at the pn junction during electrochemical etchback. By using the SDB SOI structure with buried cavities, active membranes, which have a free standing structure with a dimension of 900×900 μm2, were fabricated. It is confirmed that the fabrication process of the SDB SOI structure with buried cavities is a powerful and versatile technology for new MEMS applications.

  11. Fluorescent 'two-faced' polymer wafers with embedded pyrene-functionalised gelator nanofibres.

    PubMed

    Moffat, Jamie R; Smith, David K

    2011-11-21

    Pyrene-functionalised gelators self-assemble into nano-fibrillar organogels in DMSO/styrene/divinylbenzene mixtures, which when polymerised yield polymer wafers with two distinct faces, only one of which is fluorescent and has embedded gelator nanofibres. This journal is © The Royal Society of Chemistry 2011

  12. A thermal microprobe fabricated with wafer-stage processing

    NASA Astrophysics Data System (ADS)

    Zhang, Yongxia; Zhang, Yanwei; Blaser, Juliana; Sriram, T. S.; Enver, Ahsan; Marcus, R. B.

    1998-05-01

    A thermal microprobe has been designed and built for high resolution temperature sensing. The thermal sensor is a thin-film thermocouple junction at the tip of an atomic force microprobe (AFM) silicon probe needle. Only wafer-stage processing steps are used for the fabrication. For high resolution temperature sensing it is essential that the junction be confined to a short distance at the AFM tip. This confinement is achieved by a controlled photoresist coating process. Experiment prototypes have been made with an Au/Pd junction confined to within 0.5 μm of the tip, with the two metals separated elsewhere by a thin insulating oxide layer. Processing begins with double-polished, n-type, 4 in. diameter, 300-μm-thick silicon wafers. Atomically sharp probe tips are formed by a combination of dry and wet chemical etching, and oxidation sharpening. The metal layers are sputtering deposited and the cantilevers are released by a combination of KOH and dry etching. A resistively heated calibration device was made for temperature calibration of the thermal microprobe over the temperature range 25-110 °C. Over this range the thermal outputs of two microprobes are 4.5 and 5.6 μV/K and is linear. Thermal and topographical images are also obtained from a heated tungsten thin film fuse.

  13. Process for the homoepitaxial growth of single-crystal silicon carbide films on silicon carbide wafers

    NASA Technical Reports Server (NTRS)

    Powell, J. Anthony (Inventor)

    1993-01-01

    The invention is a method for growing homoepitaxial films of SiC on low tilt angle vicinal (0001) SiC wafers. The invention proposes and teaches a new theoretical model for the homoepitaxial growth of SiC films on (0001) SiC substrates. The inventive method consists of preparing the growth surface of SiC wafers slightly off-axis (from less the 0.1 to 6 deg) from the (0001) plane, subjecting the growth surface to a suitable etch, and then growing the homoepitaxial film using conventional SiC growth techniques.

  14. Inspection and Emotion

    ERIC Educational Resources Information Center

    Perryman, Jane

    2007-01-01

    In this paper I explore the emotional impact of inspection on the staff of a school in the two years between Ofsted inspections. Using data from one school undergoing inspection, I argue that the negative emotional impact of inspection of teachers goes beyond the oft-reported issues of stress and overwork. Teachers experience a loss of power and…

  15. Software Formal Inspections Guidebook

    NASA Technical Reports Server (NTRS)

    1993-01-01

    The Software Formal Inspections Guidebook is designed to support the inspection process of software developed by and for NASA. This document provides information on how to implement a recommended and proven method for conducting formal inspections of NASA software. This Guidebook is a companion document to NASA Standard 2202-93, Software Formal Inspections Standard, approved April 1993, which provides the rules, procedures, and specific requirements for conducting software formal inspections. Application of the Formal Inspections Standard is optional to NASA program or project management. In cases where program or project management decide to use the formal inspections method, this Guidebook provides additional information on how to establish and implement the process. The goal of the formal inspections process as documented in the above-mentioned Standard and this Guidebook is to provide a framework and model for an inspection process that will enable the detection and elimination of defects as early as possible in the software life cycle. An ancillary aspect of the formal inspection process incorporates the collection and analysis of inspection data to effect continual improvement in the inspection process and the quality of the software subjected to the process.

  16. Protocols for Image Processing based Underwater Inspection of Infrastructure Elements

    NASA Astrophysics Data System (ADS)

    O'Byrne, Michael; Ghosh, Bidisha; Schoefs, Franck; Pakrashi, Vikram

    2015-07-01

    Image processing can be an important tool for inspecting underwater infrastructure elements like bridge piers and pile wharves. Underwater inspection often relies on visual descriptions of divers who are not necessarily trained in specifics of structural degradation and the information may often be vague, prone to error or open to significant variation of interpretation. Underwater vehicles, on the other hand can be quite expensive to deal with for such inspections. Additionally, there is now significant encouragement globally towards the deployment of more offshore renewable wind turbines and wave devices and the requirement for underwater inspection can be expected to increase significantly in the coming years. While the merit of image processing based assessment of the condition of underwater structures is understood to a certain degree, there is no existing protocol on such image based methods. This paper discusses and describes an image processing protocol for underwater inspection of structures. A stereo imaging image processing method is considered in this regard and protocols are suggested for image storage, imaging, diving, and inspection. A combined underwater imaging protocol is finally presented which can be used for a variety of situations within a range of image scenes and environmental conditions affecting the imaging conditions. An example of detecting marine growth is presented of a structure in Cork Harbour, Ireland.

  17. Wafer-scale fabrication of polymer-based microdevices via injection molding and photolithographic micropatterning protocols.

    PubMed

    Lee, Dae-Sik; Yang, Haesik; Chung, Kwang-Hyo; Pyo, Hyeon-Bong

    2005-08-15

    Because of their broad applications in biomedical analysis, integrated, polymer-based microdevices incorporating micropatterned metallic and insulating layers are significant in contemporary research. In this study, micropatterns for temperature sensing and microelectrode sets for electroanalysis have been implemented on an injection-molded thin polymer membrane by employing conventional semiconductor processing techniques (i.e., standard photolithographic methods). Cyclic olefin copolymer (COC) is chosen as the polymer substrate because of its high chemical and thermal stability. A COC 5-in. wafer (1-mm thickness) is manufactured using an injection molding method, in which polymer membranes (approximately 130 microm thick and 3 mm x 6 mm in area) are implemented simultaneously in order to reduce local thermal mass around micropatterned heaters and temperature sensors. The highly polished surface (approximately 4 nm within 40 microm x 40 microm area) of the fabricated COC wafer as well as its good resistance to typical process chemicals makes it possible to use the standard photolithographic and etching protocols on the COC wafer. Gold micropatterns with a minimum 5-microm line width are fabricated for making microheaters, temperature sensors, and microelectrodes. An insulating layer of aluminum oxide (Al2O3) is prepared at a COC-endurable low temperature (approximately 120 degrees C) by using atomic layer deposition and micropatterning for the electrode contacts. The fabricated microdevice for heating and temperature sensing shows improved performance of thermal isolation, and microelectrodes display good electrochemical performances for electrochemical sensors. Thus, this novel 5-in. wafer-level microfabrication method is a simple and cost-effective protocol to prepare polymer substrate and demonstrates good potential for application to highly integrated and miniaturized biomedical devices.

  18. Through-wafer optical probe characterization for microelectromechanical systems positional state monitoring and feedback control

    NASA Astrophysics Data System (ADS)

    Dawson, Jeremy M.; Chen, Jingdong; Brown, Kolin S.; Famouri, Parviz F.; Hornak, Lawrence A.

    2000-12-01

    Implementation of closed-loop microelectromechanical system (MEMS) control enables mechanical microsystems to adapt to the demands of the environment that they are actuating, opening a broad range of new opportunities for future MEMS applications. Integrated optical microsystems have the potential to enable continuous in situ optical interrogation of MEMS microstructure position fully decoupled from the means of mechanical actuation that is necessary for realization of feedback control. We present the results of initial research evaluating through-wafer optical microprobes for surface micromachined MEMS integrated optical position monitoring. Results from the through-wafer free-space optical probe of a lateral comb resonator fabricated using the multiuser MEMS process service (MUMPS) indicate significant positional information content with an achievable return probe signal dynamic range of up to 80% arising from film transmission contrast. Static and dynamic deflection analysis and experimental results indicate a through-wafer probe positional signal sensitivity of 40 mV/micrometers for the present setup or 10% signal change per micrometer. A simulation of the application of nonlinear sliding control is presented illustrating position control of the lateral comb resonator structure given the availability of positional state information.

  19. Effect of void shape in Czochralski-Si wafers on the intensity of laser-scattering

    NASA Astrophysics Data System (ADS)

    Takahashi, J.; Kawakami, K.; Nakai, K.

    2001-06-01

    The shape effect of anisotropic-shaped microvoid defects in Czochralski-grown silicon wafers on the intensity of laser scattering has been investigated. The size and shape of the defects were examined by means of transmission electron microscopy. Octahedral voids in conventional (nitrogen-undoped) wafers showed an almost isotropic scattering property under the incident condition of a p-polarization beam. On the other hand, parallelepiped-plate-shaped voids in nitrogen-doped wafers showed an anisotropic scattering property on both p- and s-polarized components of scattered light, depending strongly on the incident laser direction. The measured results were explained not by scattering calculation using Born approximation but by calculation based on Rayleigh scattering. It was found that the s component is explained by an inclination of a dipole moment induced on a defect from the scattering plane. Furthermore, using numerical electromagnetic analysis it was shown that the asymmetric behavior of the s component on the parallelepiped-plate voids is ascribed to the parallelepiped shape effect. These results suggest that correction of the scattering intensity is necessary to evaluate the size and volume of anisotropic-shaped defects from the scattered intensity.

  20. Brewster's angle silicon wafer terahertz linear polarizer.

    PubMed

    Wojdyla, Antoine; Gallot, Guilhem

    2011-07-18

    We present a new cost-effective terahertz linear polarizer made from a stack of silicon wafers at Brewster's angle, andevaluate its performances. We show that this polarizer is wide-band, has a high extinction ratio (> 6 × 10(3)) and very small insertion losses (< 1%). We provide measurements of the temporal waveforms after linearly polarizing the THz beam and show that there is no distortion of the pulse. We compare its performances with a commercial wire-grid polarizer, and show that the Brewster's angle polarizer can conveniently be used to control the power of a terahertz beam.

  1. Room-temperature wafer bonding of LiNbO3 and SiO2 using a modified surface activated bonding method

    NASA Astrophysics Data System (ADS)

    Takigawa, Ryo; Higurashi, Eiji; Asano, Tanemasa

    2018-06-01

    In this paper, we report room-temperature bonding of LiNbO3 (LN) and SiO2/Si for the realization of a LN on insulator (LNOI)/Si hybrid wafer. We investigate the applicability of a modified surface activated bonding (SAB) method for the direct bonding of LN and a thermally grown SiO2 layer. The modified SAB method using ion beam bombardment demonstrates the room-temperature wafer bonding of LN and SiO2. The bonded wafer was successfully cut into 0.5 × 0.5 mm2 dies without interfacial debonding owing to the applied stress during dicing. In addition, the surface energy of the bonded wafer was estimated to be approximately 1.8 J/m2 using the crack opening method. These results indicate that a strong bond strength can be achieved, which may be sufficient for device applications.

  2. Graphical Means for Inspecting Qualitative Models of System Behaviour

    ERIC Educational Resources Information Center

    Bouwer, Anders; Bredeweg, Bert

    2010-01-01

    This article presents the design and evaluation of a tool for inspecting conceptual models of system behaviour. The basis for this research is the Garp framework for qualitative simulation. This framework includes modelling primitives, such as entities, quantities and causal dependencies, which are combined into model fragments and scenarios.…

  3. Kill ratio calculation for in-line yield prediction

    NASA Astrophysics Data System (ADS)

    Lorenzo, Alfonso; Oter, David; Cruceta, Sergio; Valtuena, Juan F.; Gonzalez, Gerardo; Mata, Carlos

    1999-04-01

    The search for better yields in IC manufacturing calls for a smarter use of the vast amount of data that can be generated by a world class production line.In this scenario, in-line inspection processes produce thousands of wafer maps, number of defects, defect type and pictures every day. A step forward is to correlate these with the other big data- generator area: test. In this paper, we present how these data can be put together and correlated to obtain a very useful yield predicting tool. This correlation will first allow us to calculate the kill ratio, i.e. the probability for a defect of a certain size in a certain layer to kill the die. Then we will use that number to estimate the cosmetic yield that a wafer will have.

  4. Wafer-Scale Integration of Graphene-based Electronic, Optoelectronic and Electroacoustic Devices

    PubMed Central

    Tian, He; Yang, Yi; Xie, Dan; Cui, Ya-Long; Mi, Wen-Tian; Zhang, Yuegang; Ren, Tian-Ling

    2014-01-01

    In virtue of its superior properties, the graphene-based device has enormous potential to be a supplement or an alternative to the conventional silicon-based device in varies applications. However, the functionality of the graphene devices is still limited due to the restriction of the high cost, the low efficiency and the low quality of the graphene growth and patterning techniques. We proposed a simple one-step laser scribing fabrication method to integrate wafer-scale high-performance graphene-based in-plane transistors, photodetectors, and loudspeakers. The in-plane graphene transistors have a large on/off ratio up to 5.34. And the graphene photodetector arrays were achieved with photo responsivity as high as 0.32 A/W. The graphene loudspeakers realize wide-band sound generation from 1 to 50 kHz. These results demonstrated that the laser scribed graphene could be used for wafer-scale integration of a variety of graphene-based electronic, optoelectronic and electroacoustic devices. PMID:24398542

  5. Using virtual reality technology for aircraft visual inspection training: presence and comparison studies.

    PubMed

    Vora, Jeenal; Nair, Santosh; Gramopadhye, Anand K; Duchowski, Andrew T; Melloy, Brian J; Kanki, Barbara

    2002-11-01

    The aircraft maintenance industry is a complex system consisting of several interrelated human and machine components. Recognizing this, the Federal Aviation Administration (FAA) has pursued human factors related research. In the maintenance arena the research has focused on the aircraft inspection process and the aircraft inspector. Training has been identified as the primary intervention strategy to improve the quality and reliability of aircraft inspection. If training is to be successful, it is critical that we provide aircraft inspectors with appropriate training tools and environment. In response to this need, the paper outlines the development of a virtual reality (VR) system for aircraft inspection training. VR has generated much excitement but little formal proof that it is useful. However, since VR interfaces are difficult and expensive to build, the computer graphics community needs to be able to predict which applications will benefit from VR. To address this important issue, this research measured the degree of immersion and presence felt by subjects in a virtual environment simulator. Specifically, it conducted two controlled studies using the VR system developed for visual inspection task of an aft-cargo bay at the VR Lab of Clemson University. Beyond assembling the visual inspection virtual environment, a significant goal of this project was to explore subjective presence as it affects task performance. The results of this study indicated that the system scored high on the issues related to the degree of presence felt by the subjects. As a next logical step, this study, then, compared VR to an existing PC-based aircraft inspection simulator. The results showed that the VR system was better and preferred over the PC-based training tool.

  6. Creating a single twin boundary between two CdTe (111) wafers with controlled rotation angle by wafer bonding

    NASA Astrophysics Data System (ADS)

    Sun, Ce; Lu, Ning; Wang, Jinguo; Lee, Jihyung; Peng, Xin; Klie, Robert F.; Kim, Moon J.

    2013-12-01

    The single twin boundary with crystallographic orientation relationship (1¯1¯1¯)//(111) [01¯1]//[011¯] was created by wafer bonding. Electron diffraction patterns and high-resolution transmission electron microscopy images demonstrated the well control of the rotation angle between the bonded pair. At the twin boundary, one unit of wurtzite structure was found between two zinc-blende matrices. High-angle annular dark-field scanning transmission electron microscopy images showed Cd- and Te-terminated for the two bonded portions, respectively. The I-V curve across the twin boundary showed increasingly nonlinear behavior, indicating a potential barrier at the bonded twin boundary.

  7. Ultra-high heat flux cooling characteristics of cryogenic micro-solid nitrogen particles and its application to semiconductor wafer cleaning technology

    NASA Astrophysics Data System (ADS)

    Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya

    2014-01-01

    The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.

  8. Shell Inspection History and Current CMM Inspection Efforts

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Montano, Joshua Daniel

    The following report provides a review of past and current CMM Shell Inspection efforts. Calibration of the Sheffield rotary contour gauge has expired and the primary inspector, Matthew Naranjo, has retired. Efforts within the Inspection team are transitioning from maintaining and training new inspectors on Sheffield to off-the-shelf CMM technology. Although inspection of a shell has many requirements, the scope of the data presented in this report focuses on the inner contour, outer contour, radial wall thickness and mass comparisons.

  9. On the design of GaN vertical MESFETs on commercial LED sapphire wafers

    NASA Astrophysics Data System (ADS)

    Atalla, Mahmoud R. M.; Noor Elahi, Asim M.; Mo, Chen; Jiang, Zhenyu; Liu, Jie; Ashok, S.; Xu, Jian

    2016-12-01

    Design of GaN-based vertical metal-semiconductor field-effect transistors (MESFETs) on commercial light-emitting-diode (LED) epi-wafers has been proposed and proof of principle devices have been fabricated. In order to better understand the IV curves, these devices have been simulated using the charge transport model. It was found that shrinking the drain pillar size would significantly help in reaching cut-off at much lower gate bias even at high carrier concentration of unintentionally doped GaN and considerable leakage current caused by the Schottky barrier lowering. The realization of these vertical MESFETs on LED wafers would allow their chip-level integration. This would open a way to many intelligent lighting applications like on-chip current regulator and signal regulation/communication in display technology.

  10. A novel setup for wafer curvature measurement at very high heating rates.

    PubMed

    Islam, T; Zechner, J; Bernardoni, M; Nelhiebel, M; Pippan, R

    2017-02-01

    The curvature evolution of a thin film layer stack containing a top Al layer is measured during temperature cycles with very high heating rates. The temperature cycles are generated by means of programmable electrical power pulses applied to miniaturized polysilicon heater systems embedded inside a semiconductor chip and the curvature is measured by a fast wafer curvature measurement setup. Fast temperature cycles with heating duration of 100 ms are created to heat the specimen up to 270 °C providing an average heating rate of 2500 K/s. As a second approach, curvature measurement utilizing laser scanning Doppler vibrometry is also demonstrated which verifies the results obtained from the fast wafer curvature measurement setup. Film stresses calculated from the measured curvature values compare well to literature results, indicating that the new method can be used to measure curvature during fast temperature cycling.

  11. Full wafer size investigation of N+ and P+ co-implanted layers in 4H-SiC

    NASA Astrophysics Data System (ADS)

    Blanqué, S.; Lyonnet, J.; Pérez, R.; Terziyska, P.; Contreras, S.; Godignon, P.; Mestres, N.; Pascual, J.; Camassel, J.

    2005-03-01

    We report a full wafer size investigation of the homogeneity of electrical properties in the case of co-implanted nitrogen and phosphorus ions in 4H-SiC semi-insulating wafers. To match standard industrial requirements, implantation was done at room temperature. To achieve a detailed electrical knowledge, we worked on a 35 mm wafer on which 77 different reticules have been processed. Every reticule includes one Hall cross, one Van der Pauw test structure and different TLM patterns. Hall measurements have been made on all 77 different reticules, using an Accent HL5500 Hall System® from BioRad fitted with an home-made support to collect data from room temperature down to about 150 K. At room temperature, we find that the sheet carrier concentration is only 1/4 of the total implanted dose while the average mobility is 80.6 cm2/Vs. The standard deviation is, typically, 1.5 cm2/Vs.

  12. Enhanced methodology of focus control and monitoring on scanner tool

    NASA Astrophysics Data System (ADS)

    Chen, Yen-Jen; Kim, Young Ki; Hao, Xueli; Gomez, Juan-Manuel; Tian, Ye; Kamalizadeh, Ferhad; Hanson, Justin K.

    2017-03-01

    As the demand of the technology node shrinks from 14nm to 7nm, the reliability of tool monitoring techniques in advanced semiconductor fabs to achieve high yield and quality becomes more critical. Tool health monitoring methods involve periodic sampling of moderately processed test wafers to detect for particles, defects, and tool stability in order to ensure proper tool health. For lithography TWINSCAN scanner tools, the requirements for overlay stability and focus control are very strict. Current scanner tool health monitoring methods include running BaseLiner to ensure proper tool stability on a periodic basis. The focus measurement on YIELDSTAR by real-time or library-based reconstruction of critical dimensions (CD) and side wall angle (SWA) has been demonstrated as an accurate metrology input to the control loop. The high accuracy and repeatability of the YIELDSTAR focus measurement provides a common reference of scanner setup and user process. In order to further improve the metrology and matching performance, Diffraction Based Focus (DBF) metrology enabling accurate, fast, and non-destructive focus acquisition, has been successfully utilized for focus monitoring/control of TWINSCAN NXT immersion scanners. The optimal DBF target was determined to have minimized dose crosstalk, dynamic precision, set-get residual, and lens aberration sensitivity. By exploiting this new measurement target design, 80% improvement in tool-to-tool matching, >16% improvement in run-to-run mean focus stability, and >32% improvement in focus uniformity have been demonstrated compared to the previous BaseLiner methodology. Matching <2.4 nm across multiple NXT immersion scanners has been achieved with the new methodology of set baseline reference. This baseline technique, with either conventional BaseLiner low numerical aperture (NA=1.20) mode or advanced illumination high NA mode (NA=1.35), has also been evaluated to have consistent performance. This enhanced methodology of focus

  13. Nondestructive inspection of a composite missile launcher

    NASA Astrophysics Data System (ADS)

    Ley, O.; Chung, S.; Butera, M.; Valatka, T.; Triplett, M. H.; Godinez, V.

    2012-05-01

    Lighter weight alternatives are being sought to replace metallic components currently used in high performance aviation and missile systems. Benefits of lightweight, high strength carbon fiber reinforced composites in missile launchers and rocket motor cases include improved fuel economy, increased flight times, enhanced lethality and/or increased velocity. In this work, various nondestructive inspection techniques are investigated for the damage assessment of a composite missile launcher system for use in U.S. Army attack helicopters. The launcher system, which includes rails and a hardback, can be subject to impact damage from accidental tool drops, routine operation, and/or ballistic threats. The composite hardback and the launch rails both have complex geometries that can challenge the inspection process. Scanning techniques such as line scanning thermography, ultrasonic, and acousto-ultrasonics will be used and compared to determine damage detection accuracy, reliability, and efficiency. Results will also be compared with visual observations to determine if there is a correlation. The goal is to establish an inspection method that quickly and accurately assesses damage extent in order to minimize service time and return the missile system back into the field [1].

  14. Space optics with silicon wafers and slumped glass

    NASA Astrophysics Data System (ADS)

    Hudec, R.; Semencova, V.; Inneman, A.; Skulinova, M.; Sveda, L.; Míka, M.; Sik, J.; Lorenc, M.

    2017-11-01

    The future space X-ray astronomy imaging missions require very large collecting areas at still fine angular resolution and reasonable weight. The novel substrates for X-ray mirrors such as Silicon wafers and thin thermally formed glass enable wide applications of precise and very light weight (volume densities 2.3 to 2.5 gcm-3) optics. The recent status of novel technologies as well as developed test samples with emphasis on precise optical surfaces based on novel materials and their space applications is presented and discussed.

  15. Switchable adhesion for wafer-handling based on dielectric elastomer stack transducers

    NASA Astrophysics Data System (ADS)

    Grotepaß, T.; Butz, J.; Förster-Zügel, F.; Schlaak, H. F.

    2016-04-01

    Vacuum grippers are often used for the handling of wafers and small devices. In order to evacuate the gripper, a gas flow is created that can harm the micro structures on the wafer. A promising alternative to vacuum grippers could be adhesive grippers with switchable adhesion. There have been some publications of gecko-inspired adhesive devices. Most of these former works consist of a structured surface which adheres to the object manipulated and an actuator for switching the adhesion. Until now different actuator principles have been investigated, like smart memory alloys and pneumatics. In this work for the first time dielectric elastomer stack transducers (DEST) are combined with a structured surface. DESTs are a promising new transducer technology with many applications in different industry sectors like medical devices, human-machine-interaction and soft robotics. Stacked dielectric elastomer transducers show thickness contraction originating from the electromechanical pressure of two compliant electrodes compressing an elastomeric dielectric when a voltage is applied. Since DESTs and the adhesive surfaces previously described are made of elastomers, it is self-evident to combine both systems in one device. The DESTs are fabricated by a spin coating process. If the flat surface of the spinning carrier is substituted for example by a perforated one, the structured elastomer surface and the DEST can be fabricated in one process. By electrical actuation the DEST contracts and laterally expands which causes the gecko-like cilia to adhere on the object to manipulate. This work describes the assembly and the experimental results of such a device using switchable adhesion. It is intended to be used for the handling of glass wafers.

  16. Visual Inspection Research Project Report on Benchmark Inspections

    DOT National Transportation Integrated Search

    1996-10-01

    Word document. Recognizing the importance of visual inspection in the maintenance of the civil air fleet, the FAA tasked the Aging Aircraft Nondestructive Inspection Validation Center (AANC) at Sandia National Labs in Albuquerque, NM, to establish a ...

  17. Apparatus for use in examining the lattice of a semiconductor wafer by X-ray diffraction

    NASA Technical Reports Server (NTRS)

    Parker, D. L.; Porter, W. A. (Inventor)

    1978-01-01

    An improved apparatus for examining the crystal lattice of a semiconductor wafer utilizing X-ray diffraction techniques was presented. The apparatus is employed in a method which includes the step of recording the image of a wafer supported in a bent configuration conforming to a compound curve, produced through the use of a vacuum chuck provided for an X-ray camera. The entire surface thereof is illuminated simultaneously by a beam of incident X-rays which are projected from a distant point-source and satisfy conditions of the Bragg Law for all points on the surface of the water.

  18. Large-aperture focusing of x rays with micropore optics using dry etching of silicon wafers.

    PubMed

    Ezoe, Yuichiro; Moriyama, Teppei; Ogawa, Tomohiro; Kakiuchi, Takuya; Mitsuishi, Ikuyuki; Mitsuda, Kazuhisa; Aoki, Tatsuhiko; Morishita, Kohei; Nakajima, Kazuo

    2012-03-01

    Large-aperture focusing of Al K(α) 1.49 keV x-ray photons using micropore optics made from a dry-etched 4 in. (100 mm) silicon wafer is demonstrated. Sidewalls of the micropores are smoothed with high-temperature annealing to work as x-ray mirrors. The wafer is bent to a spherical shape to collect parallel x rays into a focus. Our result supports that this new type of optics allows for the manufacturing of ultralight-weight and high-performance x-ray imaging optics with large apertures at low cost. © 2012 Optical Society of America

  19. Silicon crystals: Process for manufacturing wafer-like silicon crystals with a columnar structure

    NASA Technical Reports Server (NTRS)

    Authier, B.

    1978-01-01

    Wafer-like crystals suitable for making solar cells are formed by pouring molten Si containing suitable dopants into a mold of the desired shape and allowing it to solidify in a temperature gradient, whereby the large surface of the melt in contact with the mold is kept at less than 200 D and the free surface is kept at a temperature of 200-1000 D higher, but below the melting point of Si. The mold can also be made in the form of a slit, whereby the 2 sides of the mold are kept at different temperatures. A mold was milled in the surface of a cylindrical graphite block 200 mm in diameter. The granite block was induction heated and the bottom of the mold was cooled by means of a water-cooled Cu plate, so that the surface of the mold in contact with one of the largest surfaces of the melt was held at approximately 800 D. The free surface of the melt was subjected to thermal radiation from a graphite plate located 2 mm from the surface and heated to 1500 D. The Si crystal formed after slow cooling to room temperature had a columnar structure and was cut with a diamond saw into wafers approximately 500 mm thick. Solar cells prepared from these wafers had efficiencies of 10 to 11%.

  20. Reduction of across-wafer CDU via constrained optimization of a multichannel PEB plate controller based on in-situ measurements of thermal time constants

    NASA Astrophysics Data System (ADS)

    Tiffany, Jason E.; Cohen, Barney M.

    2004-05-01

    As line widths approach 90nm node in volume production, post exposure bake (PEB) uniformity becomes a much larger component of the across wafer critical dimension uniformity (CDU). In production, the need for PEB plate matching has led to novel solutions such as plate specific dose offsets. This type of correction does not help across wafer CDU. Due to unequal activation energies of the critical PEB processes, any thermal history difference can result in a corresponding CD variation. The rise time of the resist to the target temperature has been shown to affect CD, with the most critical time being the first 5-7 seconds. A typical PEB plate has multi-zone thermal control with one thermal sensor per zone. The current practice is to setup each plate to match the steady-state target temperature, ignoring any dynamic performance. Using an in-situ wireless RTD wafer, it is possible to characterize the dynamic performance, or time constant, of each RTD location on the sensing wafer. Constrained by the zone structure of the PEB plate, the proportional, integral and derivative (PID) settings of each controller channel could be optimized to reduce the variations in rise time across the RTD wafer, thereby reducing the PEB component of across wafer CDU.

  1. AN Fitting Reconditioning Tool

    NASA Technical Reports Server (NTRS)

    Lopez, Jason

    2011-01-01

    A tool was developed to repair or replace AN fittings on the shuttle external tank (ET). (The AN thread is a type of fitting used to connect flexible hoses and rigid metal tubing that carry fluid. It is a U.S. military-derived specification agreed upon by the Army and Navy, hence AN.) The tool is used on a drill and is guided by a pilot shaft that follows the inside bore. The cutting edge of the tool is a standard-size replaceable insert. In the typical Post Launch Maintenance/Repair process for the AN fittings, the six fittings are removed from the ET's GUCP (ground umbilical carrier plate) for reconditioning. The fittings are inspected for damage to the sealing surface per standard operations maintenance instructions. When damage is found on the sealing surface, the condition is documented. A new AN reconditioning tool is set up to cut and remove the surface damage. It is then inspected to verify the fitting still meets drawing requirements. The tool features a cone-shaped interior at 36.5 , and may be adjusted at a precise angle with go-no-go gauges to insure that the cutting edge could be adjusted as it wore down. One tool, one setting block, and one go-no-go gauge were fabricated. At the time of this reporting, the tool has reconditioned/returned to spec 36 AN fittings with 100-percent success of no leakage. This tool provides a quick solution to repair a leaky AN fitting. The tool could easily be modified with different-sized pilot shafts to different-sized fittings.

  2. Cargo container inspection test program at ARPA's Nonintrusive Inspection Technology Testbed

    NASA Astrophysics Data System (ADS)

    Volberding, Roy W.; Khan, Siraj M.

    1994-10-01

    An x-ray-based cargo inspection system test program is being conducted at the Advanced Research Project Agency (ARPA)-sponsored Nonintrusive Inspection Technology Testbed (NITT) located in the Port of Tacoma, Washington. The test program seeks to determine the performance that can be expected from a dual, high-energy x-ray cargo inspection system when inspecting ISO cargo containers. This paper describes an intensive, three-month, system test involving two independent test groups, one representing the criminal smuggling element and the other representing the law enforcement community. The first group, the `Red Team', prepares ISO containers for inspection at an off-site facility. An algorithm randomly selects and indicates the positions and preparation of cargoes within a container. The prepared container is dispatched to the NITT for inspection by the `Blue Team'. After in-gate processing, it is queued for examination. The Blue Team inspects the container and decides whether or not to pass the container. The shipment undergoes out-gate processing and returns to the Red Team. The results of the inspection are recorded for subsequent analysis. The test process, including its governing protocol, the cargoes, container preparation, the examination and results available at the time of submission are presented.

  3. Extreme ultraviolet patterned mask inspection performance of advanced projection electron microscope system for 11nm half-pitch generation

    NASA Astrophysics Data System (ADS)

    Hirano, Ryoichi; Iida, Susumu; Amano, Tsuyoshi; Watanabe, Hidehiro; Hatakeyama, Masahiro; Murakami, Takeshi; Suematsu, Kenichi; Terao, Kenji

    2016-03-01

    Novel projection electron microscope optics have been developed and integrated into a new inspection system named EBEYE-V30 ("Model EBEYE" is an EBARA's model code) , and the resulting system shows promise for application to half-pitch (hp) 16-nm node extreme ultraviolet lithography (EUVL) patterned mask inspection. To improve the system's inspection throughput for 11-nm hp generation defect detection, a new electron-sensitive area image sensor with a high-speed data processing unit, a bright and stable electron source, and an image capture area deflector that operates simultaneously with the mask scanning motion have been developed. A learning system has been used for the mask inspection tool to meet the requirements of hp 11-nm node EUV patterned mask inspection. Defects are identified by the projection electron microscope system using the "defectivity" from the characteristics of the acquired image. The learning system has been developed to reduce the labor and costs associated with adjustment of the detection capability to cope with newly-defined mask defects. We describe the integration of the developed elements into the inspection tool and the verification of the designed specification. We have also verified the effectiveness of the learning system, which shows enhanced detection capability for the hp 11-nm node.

  4. Actinic inspection of EUV reticles with arbitrary pattern design

    NASA Astrophysics Data System (ADS)

    Mochi, Iacopo; Helfenstein, Patrick; Rajeev, Rajendran; Fernandez, Sara; Kazazis, Dimitrios; Yoshitake, Shusuke; Ekinci, Yasin

    2017-10-01

    The re ective-mode EUV mask scanning lensless imaging microscope (RESCAN) is being developed to provide actinic mask inspection capabilities for defects and patterns with high resolution and high throughput, for 7 nm node and beyond. Here we, will report on our progress and present the results on programmed defect detection on random, logic-like patterns. The defects we investigated range from 200 nm to 50 nm size on the mask. We demonstrated the ability of RESCAN to detect these defects in die-to-die and die-to-database mode with a high signal to noise ratio. We also describe future plans for the upgrades to increase the resolution, the sensitivity, and the inspection speed of the demo tool.

  5. Electronic transport characterization of silicon wafers by spatially resolved steady-state photocarrier radiometric imaging

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, Qian; University of the Chinese Academy of Sciences, Beijing 100039; Li, Bincheng, E-mail: bcli@ioe.ac.cn

    2015-09-28

    Spatially resolved steady-state photocarrier radiometric (PCR) imaging technique is developed to characterize the electronic transport properties of silicon wafers. Based on a nonlinear PCR theory, simulations are performed to investigate the effects of electronic transport parameters (the carrier lifetime, the carrier diffusion coefficient, and the front surface recombination velocity) on the steady-state PCR intensity profiles. The electronic transport parameters of an n-type silicon wafer are simultaneously determined by fitting the measured steady-state PCR intensity profiles to the three-dimensional nonlinear PCR model. The determined transport parameters are in good agreement with the results obtained by the conventional modulated PCR technique withmore » multiple pump beam radii.« less

  6. Characterization of Carrier Concentration and Mobility in n-type SiC Wafers Using Infrared Reflectance Spectroscopy

    NASA Astrophysics Data System (ADS)

    Narita, Katsutoshi; Hijikata, Yasuto; Yaguchi, Hiroyuki; Yoshida, Sadafumi; Nakashima, Shinichi

    2004-08-01

    We have estimated the free-carrier concentration and drift mobility in n-type 6H-SiC wafers in the carrier concentration range of 1017-1019 cm-3 from far- and mid-infrared (30-2000 cm-1) reflectance spectra obtained at room temperature. A modified classical dielectric function model was employed for the analysis. We found good agreement between the electrical properties derived from infrared reflectance spectroscopy and those derived from Hall effect measurements. We have demonstrated the spatial mapping of carrier concentration and mobility for commercially produced 2 inch SiC wafers.

  7. Addressable Inverter Matrix Tests Integrated-Circuit Wafer

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G.

    1988-01-01

    Addressing elements indirectly through shift register reduces number of test probes. With aid of new technique, complex test structure on silicon wafer tested with relatively small number of test probes. Conserves silicon area by reduction of area devoted to pads. Allows thorough evaluation of test structure characteristics and of manufacturing process parameters. Test structure consists of shift register and matrix of inverter/transmission-gate cells connected to two-by-ten array of probe pads. Entire pattern contained in square area having only 1.6-millimeter sides. Shift register is conventional static CMOS device using inverters and transmission gates in master/slave D flip-flop configuration.

  8. Drone Mission Definition and Implementation for Automated Infrastructure Inspection Using Airborne Sensors

    PubMed Central

    Besada, Juan A.; Bergesio, Luca; Campaña, Iván; Vaquero-Melchor, Diego; Bernardos, Ana M.; Casar, José R.

    2018-01-01

    This paper describes a Mission Definition System and the automated flight process it enables to implement measurement plans for discrete infrastructure inspections using aerial platforms, and specifically multi-rotor drones. The mission definition aims at improving planning efficiency with respect to state-of-the-art waypoint-based techniques, using high-level mission definition primitives and linking them with realistic flight models to simulate the inspection in advance. It also provides flight scripts and measurement plans which can be executed by commercial drones. Its user interfaces facilitate mission definition, pre-flight 3D synthetic mission visualisation and flight evaluation. Results are delivered for a set of representative infrastructure inspection flights, showing the accuracy of the flight prediction tools in actual operations using automated flight control. PMID:29641506

  9. Fault Tree Analysis for an Inspection Robot in a Nuclear Power Plant

    NASA Astrophysics Data System (ADS)

    Ferguson, Thomas A.; Lu, Lixuan

    2017-09-01

    The life extension of current nuclear reactors has led to an increasing demand on inspection and maintenance of critical reactor components that are too expensive to replace. To reduce the exposure dosage to workers, robotics have become an attractive alternative as a preventative safety tool in nuclear power plants. It is crucial to understand the reliability of these robots in order to increase the veracity and confidence of their results. This study presents the Fault Tree (FT) analysis to a coolant outlet piper snake-arm inspection robot in a nuclear power plant. Fault trees were constructed for a qualitative analysis to determine the reliability of the robot. Insight on the applicability of fault tree methods for inspection robotics in the nuclear industry is gained through this investigation.

  10. Drone Mission Definition and Implementation for Automated Infrastructure Inspection Using Airborne Sensors.

    PubMed

    Besada, Juan A; Bergesio, Luca; Campaña, Iván; Vaquero-Melchor, Diego; López-Araquistain, Jaime; Bernardos, Ana M; Casar, José R

    2018-04-11

    This paper describes a Mission Definition System and the automated flight process it enables to implement measurement plans for discrete infrastructure inspections using aerial platforms, and specifically multi-rotor drones. The mission definition aims at improving planning efficiency with respect to state-of-the-art waypoint-based techniques, using high-level mission definition primitives and linking them with realistic flight models to simulate the inspection in advance. It also provides flight scripts and measurement plans which can be executed by commercial drones. Its user interfaces facilitate mission definition, pre-flight 3D synthetic mission visualisation and flight evaluation. Results are delivered for a set of representative infrastructure inspection flights, showing the accuracy of the flight prediction tools in actual operations using automated flight control.

  11. High-radiance LDP source for mask inspection and beam line applications (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Teramoto, Yusuke; Santos, Bárbara; Mertens, Guido; Kops, Ralf; Kops, Margarete; von Wezyk, Alexander; Bergmann, Klaus; Yabuta, Hironobu; Nagano, Akihisa; Ashizawa, Noritaka; Taniguchi, Yuta; Yamatani, Daiki; Shirai, Takahiro; Kasama, Kunihiko

    2017-04-01

    High-throughput actinic mask inspection tools are needed as EUVL begins to enter into volume production phase. One of the key technologies to realize such inspection tools is a high-radiance EUV source of which radiance is supposed to be as high as 100 W/mm2/sr. Ushio is developing laser-assisted discharge-produced plasma (LDP) sources. Ushio's LDP source is able to provide sufficient radiance as well as cleanliness, stability and reliability. Radiance behind the debris mitigation system was confirmed to be 120 W/mm2/sr at 9 kHz and peak radiance at the plasma was increased to over 200 W/mm2/sr in the recent development which supports high-throughput, high-precision mask inspection in the current and future technology nodes. One of the unique features of Ushio's LDP source is cleanliness. Cleanliness evaluation using both grazing-incidence Ru mirrors and normal-incidence Mo/Si mirrors showed no considerable damage to the mirrors other than smooth sputtering of the surface at the pace of a few nm per Gpulse. In order to prove the system reliability, several long-term tests were performed. Data recorded during the tests was analyzed to assess two-dimensional radiance stability. In addition, several operating parameters were monitored to figure out which contributes to the radiance stability. The latest model that features a large opening angle was recently developed so that the tool can utilize a large number of debris-free photons behind the debris shield. The model was designed both for beam line application and high-throughput mask inspection application. At the time of publication, the first product is supposed to be in use at the customer site.

  12. From Si wafers to cheap and efficient Si electrodes for Li-ion batteries

    NASA Astrophysics Data System (ADS)

    Gauthier, Magali; Reyter, David; Mazouzi, Driss; Moreau, Philippe; Guyomard, Dominique; Lestriez, Bernard; Roué, Lionel

    2014-06-01

    High-energy ball milling is used to recycle Si wafers to produce Si powders for negative electrodes of Li-ion batteries. The resulting Si powder consists in micrometric Si agglomerates made of cold-welded submicrometric nanocrystalline Si particles. Silicon-based composite electrodes prepared with ball-milled Si wafer can achieve more than 900 cycles with a capacity of 1200 mAh g-1 of Si (880 mAh g-1 of electrode) and a coulombic efficiency higher than 99%. This excellent electrochemical performance lies in the use of nanostructured Si produced by ball milling, the electrode formulation in a pH 3 buffer solution with CMC as binder and the use of FEC/VC additives in the electrolyte. This work opens the way to an economically attractive recycling of Si wastes.

  13. Chelant Enhanced Solution Processing for Wafer Scale Synthesis of Transition Metal Dichalcogenide Thin Films.

    PubMed

    Ionescu, Robert; Campbell, Brennan; Wu, Ryan; Aytan, Ece; Patalano, Andrew; Ruiz, Isaac; Howell, Stephen W; McDonald, Anthony E; Beechem, Thomas E; Mkhoyan, K Andre; Ozkan, Mihrimah; Ozkan, Cengiz S

    2017-07-25

    It is of paramount importance to improve the control over large area growth of high quality molybdenum disulfide (MoS 2 ) and other types of 2D dichalcogenides. Such atomically thin materials have great potential for use in electronics, and are thought to make possible the first real applications of spintronics. Here in, a facile and reproducible method of producing wafer scale atomically thin MoS 2 layers has been developed using the incorporation of a chelating agent in a common organic solvent, dimethyl sulfoxide (DMSO). Previously, solution processing of a MoS 2 precursor, ammonium tetrathiomolybdate ((NH 4 ) 2 MoS 4 ), and subsequent thermolysis was used to produce large area MoS 2 layers. Our work here shows that the use of ethylenediaminetetraacetic acid (EDTA) in DMSO exerts superior control over wafer coverage and film thickness, and the results demonstrate that the chelating action and dispersing effect of EDTA is critical in growing uniform films. Raman spectroscopy, photoluminescence (PL), x-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FTIR), atomic force microscopy (AFM) and high-resolution scanning transmission electron microscopy (HR-STEM) indicate the formation of homogenous few layer MoS 2 films at the wafer scale, resulting from the novel chelant-in-solution method.

  14. Cancer mortality among US workers employed in semiconductor wafer fabrication.

    PubMed

    Boice, John D; Marano, Donald E; Munro, Heather M; Chadda, Bandana K; Signorello, Lisa B; Tarone, Robert E; Blot, William J; McLaughlin, Joseph K

    2010-11-01

    To evaluate potential cancer risks in the US semiconductor wafer fabrication industry. A cohort of 100,081 semiconductor workers employed between 1968 and 2002 was studied. Standardized mortality ratios and relative risks (RRs) were estimated. Standardized mortality ratios were similar and significantly low among fabrication and nonfabrication workers for all causes (0.54 and 0.54) and all cancers (0.74 and 0.72). Internal comparisons also showed similar overall cancer risks among fabrication workers (RR = 0.98), including process equipment operators and process equipment service technicians (OP/EST) employed in cleanrooms (RR = 0.97), compared with nonfabrication workers. Nonsignificantly elevated RRs were observed for a few cancer sites among OP/EST workers, but the numbers of deaths were small and there were no trends of increasing risk with duration of employment. Work in the US semiconductor industry, including semiconductor wafer fabrication in cleanrooms, was not associated with increased cancer mortality overall or mortality from any specific form of cancer. However, due to the young average age of this cohort and its associated relatively low numbers of deaths, regular mortality updates of this semiconductor worker cohort are warranted.

  15. Extension of optical lithography by mask-litho integration with computational lithography

    NASA Astrophysics Data System (ADS)

    Takigawa, T.; Gronlund, K.; Wiley, J.

    2010-05-01

    Wafer lithography process windows can be enlarged by using source mask co-optimization (SMO). Recently, SMO including freeform wafer scanner illumination sources has been developed. Freeform sources are generated by a programmable illumination system using a micro-mirror array or by custom Diffractive Optical Elements (DOE). The combination of freeform sources and complex masks generated by SMO show increased wafer lithography process window and reduced MEEF. Full-chip mask optimization using source optimized by SMO can generate complex masks with small variable feature size sub-resolution assist features (SRAF). These complex masks create challenges for accurate mask pattern writing and low false-defect inspection. The accuracy of the small variable-sized mask SRAF patterns is degraded by short range mask process proximity effects. To address the accuracy needed for these complex masks, we developed a highly accurate mask process correction (MPC) capability. It is also difficult to achieve low false-defect inspections of complex masks with conventional mask defect inspection systems. A printability check system, Mask Lithography Manufacturability Check (M-LMC), is developed and integrated with 199-nm high NA inspection system, NPI. M-LMC successfully identifies printable defects from all of the masses of raw defect images collected during the inspection of a complex mask. Long range mask CD uniformity errors are compensated by scanner dose control. A mask CD uniformity error map obtained by mask metrology system is used as input data to the scanner. Using this method, wafer CD uniformity is improved. As reviewed above, mask-litho integration technology with computational lithography is becoming increasingly important.

  16. Optical fiber inspection system

    DOEpatents

    Moore, F.W.

    1985-04-05

    A remote optical inspection system including an inspection head. The inspection head has a passageway through which pellets or other objects are passed. A window is provided along the passageway through which light is beamed against the objects being inspected. A plurality of lens assemblies are arranged about the window so that reflected light can be gathered and transferred to a plurality of coherent optical fiber light guides. The light guides transfer the light images to a television or other image transducer which converts the optical images into a representative electronic signal. The electronic signal can then be displayed on a signal viewer such as a television monitor for inspection by a person. A staging means can be used to support the objects for viewing through the window. Routing means can be used to direct inspected objects into appropriate exit passages for accepted or rejected objects. The inspected objects are advantageously fed in a singular manner to the staging means and routing means. The inspection system is advantageously used in an enclosure when toxic or hazardous materials are being inspected. 10 figs.

  17. Optical fiber inspection system

    DOEpatents

    Moore, Francis W.

    1987-01-01

    A remote optical inspection system including an inspection head. The inspection head has a passageway through which pellets or other objects are passed. A window is provided along the passageway through which light is beamed against the objects being inspected. A plurality of lens assemblies are arranged about the window so that reflected light can be gathered and transferred to a plurality of coherent optical fiber light guides. The light guides transfer the light images to a television or other image transducer which converts the optical images into a representative electronic signal. The electronic signal can then be displayed on a signal viewer such as a television monitor for inspection by a person. A staging means can be used to support the objects for viewing through the window. Routing means can be used to direct inspected objects into appropriate exit passages for accepted or rejected objects. The inspected objects are advantageously fed in a singular manner to the staging means and routing means. The inspection system is advantageously used in an enclosure when toxic or hazardous materials are being inspected.

  18. Quality control and in-service inspection technology for hybrid-composite girder bridges.

    DOT National Transportation Integrated Search

    2014-08-01

    This report describes efforts to develop quality control tools and in-service inspection technologies for the fabrication and construction of Hybrid Composite Beams (HCBs). HCBs are a new bridge technology currently being evaluated by the Missouri De...

  19. Shot-noise limited throughput of soft x-ray ptychography for nanometrology applications

    NASA Astrophysics Data System (ADS)

    Koek, Wouter; Florijn, Bastiaan; Bäumer, Stefan; Kruidhof, Rik; Sadeghian, Hamed

    2018-03-01

    Due to its potential for high resolution and three-dimensional imaging, soft x-ray ptychography has received interest for nanometrology applications. We have analyzed the measurement time per unit area when using soft x-ray ptychography for various nanometrology applications including mask inspection and wafer inspection, and are thus able to predict (order of magnitude) throughput figures. Here we show that for a typical measurement system, using a typical sampling strategy, and when aiming for 10-15 nm resolution, it is expected that a wafer-based topology (2.5D) measurement takes approximately 4 minutes per μm2 , and a full three-dimensional measurement takes roughly 6 hours per μm2 . Due to their much higher reflectivity EUV masks can be measured considerably faster; a measurement speed of 0.1 seconds per μm2 is expected. However, such speeds do not allow for full wafer or mask inspection at industrially relevant throughput.

  20. Methodology for identifying and representing knowledge in the scope of CMM inspection resource selection

    NASA Astrophysics Data System (ADS)

    Martínez, S.; Barreiro, J.; Cuesta, E.; Álvarez, B. J.; González, D.

    2012-04-01

    This paper is focused on the task of elicitation and structuring of knowledge related to selection of inspection resources. The final goal is to obtain an informal model of knowledge oriented to the inspection planning in coordinate measuring machines. In the first tasks, where knowledge is captured, it is necessary to use tools that make easier the analysis and structuring of knowledge, so that rules of selection can be easily stated to configure the inspection resources. In order to store the knowledge a so-called Onto-Process ontology has been developed. This ontology may be of application to diverse processes in manufacturing engineering. This paper describes the decomposition of the ontology in terms of general units of knowledge and others more specific for selection of sensor assemblies in inspection planning with touch sensors.