A Re-programmable Platform for Dynamic Burn-in Test of Xilinx Virtexll 3000 FPGA for Military and Aerospace Applications

NASA Technical Reports Server (NTRS)

Roosta, Ramin; Wang, Xinchen; Sadigursky, Michael; Tracton, Phil

2004-01-01

Field Programmable Gate Arrays (FPGA) have played increasingly important roles in military and aerospace applications. Xilinx SRAM-based FPGAs have been extensively used in commercial applications. They have been used less frequently in space flight applications due to their susceptibility to single-event upsets. Reliability of these devices in space applications is a concern that has not been addressed. The objective of this project is to design a fully programmable hardware/software platform that allows (but is not limited to) comprehensive static/dynamic burn-in test of Virtex-II 3000 FPGAs, at speed test and SEU test. Conventional methods test very few discrete AC parameters (primarily switching) of a given integrated circuit. This approach will test any possible configuration of the FPGA and any associated performance parameters. It allows complete or partial re-programming of the FPGA and verification of the program by using read back followed by dynamic test. Designers have full control over which functional elements of the FPGA to stress. They can completely simulate all possible types of configurations/functions. Another benefit of this platform is that it allows collecting information on elevation of the junction temperature as a function of gate utilization, operating frequency and functionality. A software tool has been implemented to demonstrate the various features of the system. The software consists of three major parts: the parallel interface driver, main system procedure and a graphical user interface (GUI).

NASA Accelerates SpaceCube Technology into Orbit

NASA Technical Reports Server (NTRS)

Petrick, David

2010-01-01

On May 11, 2009, STS-125 Space Shuttle Atlantis blasted off from Kennedy Space Center on a historic mission to service the Hubble Space Telescope (HST). In addition to sending up the hardware and tools required to repair the observatory, the servicing team at NASA's Goddard Space Flight Center also sent along a complex experimental payload called Relative Navigation Sensors (RNS). The main objective of the RNS payload was to provide real-time image tracking of HST during rendezvous and docking operations. RNS was a complete success, and was brought to life by four Xilinx FPGAs (Field Programmable Gate Arrays) tightly packed into one integrated computer called SpaceCube. SpaceCube is a compact, reconfigurable, multiprocessor computing platform for space applications demanding extreme processing capabilities based on Xilinx Virtex 4 FX60 FPGAs. In a matter of months, the concept quickly went from the white board to a fully funded flight project. The 4-inch by 4-inch SpaceCube processor card was prototyped by a group of Goddard engineers using internal research funding. Once engineers were able to demonstrate the processing power of SpaceCube to NASA, HST management stood behind the product and invested in a flight qualified version, inserting it into the heart of the RNS system. With the determination of putting Xilinx into space, the team strengthened to a small army and delivered a fully functional, space qualified system to the mission.

Field-programmable gate array implementation of an all-digital IEEE 802.15.4-compliant transceiver

NASA Astrophysics Data System (ADS)

Cornetta, Gianluca; Touhafi, Abdellah; Santos, David J.; Vázquez, José M.

2010-12-01

An architecture for a low-cost, low-complexity digital transceiver is presented in this article. The proposed architecture targets the IEEE 802.15.4 standard for short-range wireless personal area networks and has been implemented as a synthesisable VHDL register transfer level description. The system has been evaluated and tested using a Xilinx 90 nm Virtex-4 field-programmable gate array as the target technology. Bit error rate (BER) and error vector magnitude (EVM) have been used as the figures of merit for modem performance. Simulations show that the recommended minimum BER is achieved at E b/N 0 = 8.7 dB, whereas the EVM is 19.5%. The implemented device occupies 10% of the target FPGA and has a normalised maximum power consumption of 44 mW in transmit mode and 53 mW in receiver mode.

Programmable logic controller performance enhancement by field programmable gate array based design.

PubMed

Patel, Dhruv; Bhatt, Jignesh; Trivedi, Sanjay

2015-01-01

PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported. Copyright © 2014 ISA. Published by Elsevier Ltd. All rights reserved.

High-Precision Pulse Generator

NASA Technical Reports Server (NTRS)

Katz, Richard; Kleyner, Igor

2011-01-01

A document discusses a pulse generator with subnanosecond resolution implemented with a low-cost field-programmable gate array (FPGA) at low power levels. The method used exploits the fast carry chains of certain FPGAs. Prototypes have been built and tested in both Actel AX and Xilinx Virtex 4 technologies. In-flight calibration or control can be performed by using a similar and related technique as a time interval measurement circuit by measuring a period of the stable oscillator, as the delays through the fast carry chains will vary as a result of manufacturing variances as well as the result of environmental conditions (voltage, aging, temperature, and radiation).

A MOdular System for Acquisition, Interface and Control (MOSAIC) of detectors and their related electronics for high energy physics experiment

NASA Astrophysics Data System (ADS)

Robertis, G. De; Fanizzi, G.; Loddo, F.; Manzari, V.; Rizzi, M.

2018-02-01

In this work the MOSAIC ("MOdular System for Acquisition, Interface and Control") board, designed for the readout and testing of the pixel modules for the silicon tracker upgrade of the ALICE (A Large Ion Collider Experiment) experiment at teh CERN LHC, is described. It is based on an Artix7 Field Programmable Gate Array device by Xilinx and is compliant with the six unit "Versa Modular Eurocard" standard (6U-VME) for easy housing in a standard VMEbus crate from which it takes only power supplies and cooling.

Controller for the Electronically Scanned Thinned Array Radiometer (ESTAR) instrument

NASA Technical Reports Server (NTRS)

Zomberg, Brian G.; Chren, William A., Jr.

1994-01-01

A prototype controller for the ESTAR (electronically scanned thinned array radiometer) instrument has been designed and tested. It manages the operation of the digital data subsystem (DDS) and its communication with the Small Explorer data system (SEDS). Among the data processing tasks that it coordinates are FEM data acquisition, noise removal, phase alignment and correlation. Its control functions include instrument calibration and testing of two critical subsystems, the output data formatter and Walsh function generator. It is implemented in a Xilinx XC3064PC84-100 field programmable gate array (FPGA) and has a maximum clocking frequency of 10 MHz.

Parallel Fixed Point Implementation of a Radial Basis Function Network in an FPGA

PubMed Central

de Souza, Alisson C. D.; Fernandes, Marcelo A. C.

2014-01-01

This paper proposes a parallel fixed point radial basis function (RBF) artificial neural network (ANN), implemented in a field programmable gate array (FPGA) trained online with a least mean square (LMS) algorithm. The processing time and occupied area were analyzed for various fixed point formats. The problems of precision of the ANN response for nonlinear classification using the XOR gate and interpolation using the sine function were also analyzed in a hardware implementation. The entire project was developed using the System Generator platform (Xilinx), with a Virtex-6 xc6vcx240t-1ff1156 as the target FPGA. PMID:25268918

Monitoring system for testing the radiation hardness of a KINTEX-7 FPGA

NASA Astrophysics Data System (ADS)

Cojocariu, L. N.; Placinta, V. M.; Dumitru, L.

2016-03-01

A much more efficient Ring Imaging Cherenkov sub-detector system will be rebuilt in the second long shutdown of Large Hadron Collider for the LHCb experiment. Radiation-hard electronic components together with Commercial Off-The-Shelf ones will be used in the new Cherenkov photon detection system architecture. An irradiation program was foreseen to determine the radiation tolerance for the new electronic devices, including a Field Programmable Gate Array from KINTEX-7 family of XILINX. An automated test bench for online monitoring of the XC7K70T KINTEX-7 device operation in radiation conditions was designed and implemented by the LHCb Romanian group.

Moving target detection for frequency agility radar by sparse reconstruction

NASA Astrophysics Data System (ADS)

Quan, Yinghui; Li, YaChao; Wu, Yaojun; Ran, Lei; Xing, Mengdao; Liu, Mengqi

2016-09-01

Frequency agility radar, with randomly varied carrier frequency from pulse to pulse, exhibits superior performance compared to the conventional fixed carrier frequency pulse-Doppler radar against the electromagnetic interference. A novel moving target detection (MTD) method is proposed for the estimation of the target's velocity of frequency agility radar based on pulses within a coherent processing interval by using sparse reconstruction. Hardware implementation of orthogonal matching pursuit algorithm is executed on Xilinx Virtex-7 Field Programmable Gata Array (FPGA) to perform sparse optimization. Finally, a series of experiments are performed to evaluate the performance of proposed MTD method for frequency agility radar systems.

Data Acquisition System for Silicon Ultra Fast Cameras for Electron and Gamma Sources in Medical Applications (sucima Imager)

NASA Astrophysics Data System (ADS)

Czermak, A.; Zalewska, A.; Dulny, B.; Sowicki, B.; Jastrząb, M.; Nowak, L.

2004-07-01

The needs for real time monitoring of the hadrontherapy beam intensity and profile as well as requirements for the fast dosimetry using Monolithic Active Pixel Sensors (MAPS) forced the SUCIMA collaboration to the design of the unique Data Acquisition System (DAQ SUCIMA Imager). The DAQ system has been developed on one of the most advanced XILINX Field Programmable Gate Array chip - VERTEX II. The dedicated multifunctional electronic board for the detector's analogue signals capture, their parallel digital processing and final data compression as well as transmission through the high speed USB 2.0 port has been prototyped and tested.

Applying a Genetic Algorithm to Reconfigurable Hardware

NASA Technical Reports Server (NTRS)

Wells, B. Earl; Weir, John; Trevino, Luis; Patrick, Clint; Steincamp, Jim

2004-01-01

This paper investigates the feasibility of applying genetic algorithms to solve optimization problems that are implemented entirely in reconfgurable hardware. The paper highlights the pe$ormance/design space trade-offs that must be understood to effectively implement a standard genetic algorithm within a modem Field Programmable Gate Array, FPGA, reconfgurable hardware environment and presents a case-study where this stochastic search technique is applied to standard test-case problems taken from the technical literature. In this research, the targeted FPGA-based platform and high-level design environment was the Starbridge Hypercomputing platform, which incorporates multiple Xilinx Virtex II FPGAs, and the Viva TM graphical hardware description language.

Moving target detection for frequency agility radar by sparse reconstruction.

PubMed

Quan, Yinghui; Li, YaChao; Wu, Yaojun; Ran, Lei; Xing, Mengdao; Liu, Mengqi

2016-09-01

Frequency agility radar, with randomly varied carrier frequency from pulse to pulse, exhibits superior performance compared to the conventional fixed carrier frequency pulse-Doppler radar against the electromagnetic interference. A novel moving target detection (MTD) method is proposed for the estimation of the target's velocity of frequency agility radar based on pulses within a coherent processing interval by using sparse reconstruction. Hardware implementation of orthogonal matching pursuit algorithm is executed on Xilinx Virtex-7 Field Programmable Gata Array (FPGA) to perform sparse optimization. Finally, a series of experiments are performed to evaluate the performance of proposed MTD method for frequency agility radar systems.

Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems.

PubMed

Park, Jongkil; Yu, Theodore; Joshi, Siddharth; Maier, Christoph; Cauwenberghs, Gert

2017-10-01

We present a hierarchical address-event routing (HiAER) architecture for scalable communication of neural and synaptic spike events between neuromorphic processors, implemented with five Xilinx Spartan-6 field-programmable gate arrays and four custom analog neuromophic integrated circuits serving 262k neurons and 262M synapses. The architecture extends the single-bus address-event representation protocol to a hierarchy of multiple nested buses, routing events across increasing scales of spatial distance. The HiAER protocol provides individually programmable axonal delay in addition to strength for each synapse, lending itself toward biologically plausible neural network architectures, and scales across a range of hierarchies suitable for multichip and multiboard systems in reconfigurable large-scale neuromorphic systems. We show approximately linear scaling of net global synaptic event throughput with number of routing nodes in the network, at 3.6×10 7 synaptic events per second per 16k-neuron node in the hierarchy.

Optimized smith waterman processor design for breast cancer early diagnosis

NASA Astrophysics Data System (ADS)

Nurdin, D. S.; Isa, M. N.; Ismail, R. C.; Ahmad, M. I.

2017-09-01

This paper presents an optimized design of Processing Element (PE) of Systolic Array (SA) which implements affine gap penalty Smith Waterman (SW) algorithm on the Xilinx Virtex-6 XC6VLX75T Field Programmable Gate Array (FPGA) for Deoxyribonucleic Acid (DNA) sequence alignment. The PE optimization aims to reduce PE logic resources to increase number of PEs in FPGA for higher degree of parallelism during alignment matrix computations. This is useful for aligning long DNA-based disease sequence such as Breast Cancer (BC) for early diagnosis. The optimized PE architecture has the smallest PE area with 15 slices in a PE and 776 PEs implemented in the Virtex - 6 FPGA.

A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

NASA Astrophysics Data System (ADS)

Chen, Yuan-Ho

2017-05-01

In this work, we propose a counting-weighted calibration method for field-programmable-gate-array (FPGA)-based time-to-digital converter (TDC) to provide non-linearity calibration for use in positron emission tomography (PET) scanners. To deal with the non-linearity in FPGA, we developed a counting-weighted delay line (CWD) to count the delay time of the delay cells in the TDC in order to reduce the differential non-linearity (DNL) values based on code density counts. The performance of the proposed CWD-TDC with regard to linearity far exceeds that of TDC with a traditional tapped delay line (TDL) architecture, without the need for nonlinearity calibration. When implemented in a Xilinx Vertix-5 FPGA device, the proposed CWD-TDC achieved time resolution of 60 ps with integral non-linearity (INL) and DNL of [-0.54, 0.24] and [-0.66, 0.65] least-significant-bit (LSB), respectively. This is a clear indication of the suitability of the proposed FPGA-based CWD-TDC for use in PET scanners.

Modular design and implementation of field-programmable-gate-array-based Gaussian noise generator

NASA Astrophysics Data System (ADS)

Li, Yuan-Ping; Lee, Ta-Sung; Hwang, Jeng-Kuang

2016-05-01

The modular design of a Gaussian noise generator (GNG) based on field-programmable gate array (FPGA) technology was studied. A new range reduction architecture was included in a series of elementary function evaluation modules and was integrated into the GNG system. The approximation and quantisation errors for the square root module with a first polynomial approximation were high; therefore, we used the central limit theorem (CLT) to improve the noise quality. This resulted in an output rate of one sample per clock cycle. We subsequently applied Newton's method for the square root module, thus eliminating the need for the use of the CLT because applying the CLT resulted in an output rate of two samples per clock cycle (>200 million samples per second). Two statistical tests confirmed that our GNG is of high quality. Furthermore, the range reduction, which is used to solve a limited interval of the function approximation algorithms of the System Generator platform using Xilinx FPGAs, appeared to have a higher numerical accuracy, was operated at >350 MHz, and can be suitably applied for any function evaluation.

Hardware realization of an SVM algorithm implemented in FPGAs

NASA Astrophysics Data System (ADS)

Wiśniewski, Remigiusz; Bazydło, Grzegorz; Szcześniak, Paweł

2017-08-01

The paper proposes a technique of hardware realization of a space vector modulation (SVM) of state function switching in matrix converter (MC), oriented on the implementation in a single field programmable gate array (FPGA). In MC the SVM method is based on the instantaneous space-vector representation of input currents and output voltages. The traditional computation algorithms usually involve digital signal processors (DSPs) which consumes the large number of power transistors (18 transistors and 18 independent PWM outputs) and "non-standard positions of control pulses" during the switching sequence. Recently, hardware implementations become popular since computed operations may be executed much faster and efficient due to nature of the digital devices (especially concurrency). In the paper, we propose a hardware algorithm of SVM computation. In opposite to the existing techniques, the presented solution applies COordinate Rotation DIgital Computer (CORDIC) method to solve the trigonometric operations. Furthermore, adequate arithmetic modules (that is, sub-devices) used for intermediate calculations, such as code converters or proper sectors selectors (for output voltages and input current) are presented in detail. The proposed technique has been implemented as a design described with the use of Verilog hardware description language. The preliminary results of logic implementation oriented on the Xilinx FPGA (particularly, low-cost device from Artix-7 family from Xilinx was used) are also presented.

Soft error evaluation and vulnerability analysis in Xilinx Zynq-7010 system-on chip

NASA Astrophysics Data System (ADS)

Du, Xuecheng; He, Chaohui; Liu, Shuhuan; Zhang, Yao; Li, Yonghong; Xiong, Ceng; Tan, Pengkang

2016-09-01

Radiation-induced soft errors are an increasingly important threat to the reliability of modern electronic systems. In order to evaluate system-on chip's reliability and soft error, the fault tree analysis method was used in this work. The system fault tree was constructed based on Xilinx Zynq-7010 All Programmable SoC. Moreover, the soft error rates of different components in Zynq-7010 SoC were tested by americium-241 alpha radiation source. Furthermore, some parameters that used to evaluate the system's reliability and safety were calculated using Isograph Reliability Workbench 11.0, such as failure rate, unavailability and mean time to failure (MTTF). According to fault tree analysis for system-on chip, the critical blocks and system reliability were evaluated through the qualitative and quantitative analysis.

Theory and implementation of a very high throughput true random number generator in field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Yonggang, E-mail: wangyg@ustc.edu.cn; Hui, Cong; Liu, Chong

The contribution of this paper is proposing a new entropy extraction mechanism based on sampling phase jitter in ring oscillators to make a high throughput true random number generator in a field programmable gate array (FPGA) practical. Starting from experimental observation and analysis of the entropy source in FPGA, a multi-phase sampling method is exploited to harvest the clock jitter with a maximum entropy and fast sampling speed. This parametrized design is implemented in a Xilinx Artix-7 FPGA, where the carry chains in the FPGA are explored to realize the precise phase shifting. The generator circuit is simple and resource-saving,more » so that multiple generation channels can run in parallel to scale the output throughput for specific applications. The prototype integrates 64 circuit units in the FPGA to provide a total output throughput of 7.68 Gbps, which meets the requirement of current high-speed quantum key distribution systems. The randomness evaluation, as well as its robustness to ambient temperature, confirms that the new method in a purely digital fashion can provide high-speed high-quality random bit sequences for a variety of embedded applications.« less

Theory and implementation of a very high throughput true random number generator in field programmable gate array.

PubMed

Wang, Yonggang; Hui, Cong; Liu, Chong; Xu, Chao

2016-04-01

The contribution of this paper is proposing a new entropy extraction mechanism based on sampling phase jitter in ring oscillators to make a high throughput true random number generator in a field programmable gate array (FPGA) practical. Starting from experimental observation and analysis of the entropy source in FPGA, a multi-phase sampling method is exploited to harvest the clock jitter with a maximum entropy and fast sampling speed. This parametrized design is implemented in a Xilinx Artix-7 FPGA, where the carry chains in the FPGA are explored to realize the precise phase shifting. The generator circuit is simple and resource-saving, so that multiple generation channels can run in parallel to scale the output throughput for specific applications. The prototype integrates 64 circuit units in the FPGA to provide a total output throughput of 7.68 Gbps, which meets the requirement of current high-speed quantum key distribution systems. The randomness evaluation, as well as its robustness to ambient temperature, confirms that the new method in a purely digital fashion can provide high-speed high-quality random bit sequences for a variety of embedded applications.

Full image-processing pipeline in field-programmable gate array for a small endoscopic camera

NASA Astrophysics Data System (ADS)

Mostafa, Sheikh Shanawaz; Sousa, L. Natércia; Ferreira, Nuno Fábio; Sousa, Ricardo M.; Santos, Joao; Wäny, Martin; Morgado-Dias, F.

2017-01-01

Endoscopy is an imaging procedure used for diagnosis as well as for some surgical purposes. The camera used for the endoscopy should be small and able to produce a good quality image or video, to reduce discomfort of the patients, and to increase the efficiency of the medical team. To achieve these fundamental goals, a small endoscopy camera with a footprint of 1 mm×1 mm×1.65 mm is used. Due to the physical properties of the sensors and human vision system limitations, different image-processing algorithms, such as noise reduction, demosaicking, and gamma correction, among others, are needed to faithfully reproduce the image or video. A full image-processing pipeline is implemented using a field-programmable gate array (FPGA) to accomplish a high frame rate of 60 fps with minimum processing delay. Along with this, a viewer has also been developed to display and control the image-processing pipeline. The control and data transfer are done by a USB 3.0 end point in the computer. The full developed system achieves real-time processing of the image and fits in a Xilinx Spartan-6LX150 FPGA.

FPGA implementation of image dehazing algorithm for real time applications

NASA Astrophysics Data System (ADS)

Kumar, Rahul; Kaushik, Brajesh Kumar; Balasubramanian, R.

2017-09-01

Weather degradation such as haze, fog, mist, etc. severely reduces the effective range of visual surveillance. This degradation is a spatially varying phenomena, which makes this problem non trivial. Dehazing is an essential preprocessing stage in applications such as long range imaging, border security, intelligent transportation system, etc. However, these applications require low latency of the preprocessing block. In this work, single image dark channel prior algorithm is modified and implemented for fast processing with comparable visual quality of the restored image/video. Although conventional single image dark channel prior algorithm is computationally expensive, it yields impressive results. Moreover, a two stage image dehazing architecture is introduced, wherein, dark channel and airlight are estimated in the first stage. Whereas, transmission map and intensity restoration are computed in the next stages. The algorithm is implemented using Xilinx Vivado software and validated by using Xilinx zc702 development board, which contains an Artix7 equivalent Field Programmable Gate Array (FPGA) and ARM Cortex A9 dual core processor. Additionally, high definition multimedia interface (HDMI) has been incorporated for video feed and display purposes. The results show that the dehazing algorithm attains 29 frames per second for the image resolution of 1920x1080 which is suitable of real time applications. The design utilizes 9 18K_BRAM, 97 DSP_48, 6508 FFs and 8159 LUTs.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lovell, Jack, E-mail: jack.lovell@durham.ac.uk; Culham Centre for Fusion Energy, Culham Science Centre, Abingdon, Oxon OX14 3DB; Naylor, Graham

A new resistive bolometer system has been developed for MAST-Upgrade. It will measure radiated power in the new Super-X divertor, with millisecond time resolution, along 16 vertical and 16 horizontal lines of sight. The system uses a Xilinx Zynq-7000 series Field-Programmable Gate Array (FPGA) in the D-TACQ ACQ2106 carrier to perform real time data acquisition and signal processing. The FPGA enables AC-synchronous detection using high performance digital filtering to achieve a high signal-to-noise ratio and will be able to output processed data in real time with millisecond latency. The system has been installed on 8 previously unused channels of themore » JET vertical bolometer system. Initial results suggest good agreement with data from existing vertical channels but with higher bandwidth and signal-to-noise ratio.« less

Data transmission optical link for RF-GUN project

NASA Astrophysics Data System (ADS)

Olowski, Krzysztof; Zielinski, Jerzy; Jalmuzna, Wojciech; Pozniak, Krzysztof; Romaniuk, Ryszard

2005-09-01

Today, the fast optical data transmission is one of the fundamentals of modern distributed control systems. The fibers are widely use as multi-gigabit data stream medium. For a short range transmission, the multimode fibers are in common use. The data rate for this kind of transmission exceeds 10 Gbps for 10 Gigabit Ethernet and 10G Fibre Channel protocols. The Field Programmable Gate Arrays are one of the opportunities of managing the optical transmission. This article is concerning a synchronous optical transmission system via a multimode fiber. The transmission is controlled by the FPGA of two manufacturers: Xilinx and Altera. This paper contains the newest technology overview and market device parameters. It also describes a board for the optical transmission, technical details of the transmission and optical transmission results.

Development of ROACH firmware for microwave multiplexed X-ray TES microcalorimeters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Madden, T. J.; Cecil, T. W.; Gades, L. M.

We are developing room temperature electronics based upon the ROACH platform for reading out microwave multiplexed X-ray TES. ROACH is an open-source hardware and software platform featuring a large Xilinx Field Programmable Gate Array (FPGA), Power PC processor, several 10GB Ethernet SFP+ interfaces, and a collection of daughter boards for analog signal generation and acquisition. The combination of a ROACH board, ADC/DAC conversion daughter boards, and hardware for RF mixing allows for the generation and capture of multiple RF tones for reading out microwave multiplexed x-ray TES microcalorimeters. The FPGA is used to generate multiple tones in base band, frommore » 10MHz to 250MHz, which are subsequently mixed to RF in the multiple GHz range and sent through the microwave multiplexer. The tones are generated in the FPGA by storing a large lookup table in Quad Data Rate (QDR) SRAM modules and playing out the waveform to a DAC board. Once the signal has been modulated to RF, passed through the microwave multiplexer, and has been modulated back to base band, the signal is digitized by an ADC board. The tones are modulated to 0Hz by using a FPGA circuit consisting of a polyphase filter bank, several Xilinx FFT blocks, Xilinx CORDIC blocks (for converting to magnitude and phase), and special phase accumulator circuit for mixing to exactly 0Hz. Upwards of 256 channels can be simultaneously captured and written into a bank of 256 First-In-First-Out (FIFO) memories, with each FIFO corresponding to a channel. Individual channel data can be further processed in the FPGA before being streamed through a 10GB Ethernet fiber-optic interface to a Linux system. The Linux system runs software written in Python and QT C++ for controlling the ROACH system, capturing data, and processing data.« less

Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit

NASA Technical Reports Server (NTRS)

French, Matthew; Graham, Paul; Wirthlin, Michael; Wang, Li; Larchev, Gregory

2005-01-01

The Reconfigurable Hardware in Orbit (RHinO)project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. In the second year of the project, design tools that leverage an established FPGA design environment have been created to visualize and analyze an FPGA circuit for radiation weaknesses and power inefficiencies. For radiation, a single event Upset (SEU) emulator, persistence analysis tool, and a half-latch removal tool for Xilinx/Virtex-II devices have been created. Research is underway on a persistence mitigation tool and multiple bit upsets (MBU) studies. For power, synthesis level dynamic power visualization and analysis tools have been completed. Power optimization tools are under development and preliminary test results are positive.

An FPGA-based bolometer for the MAST-U Super-X divertor.

PubMed

Lovell, Jack; Naylor, Graham; Field, Anthony; Drewelow, Peter; Sharples, Ray

2016-11-01

A new resistive bolometer system has been developed for MAST-Upgrade. It will measure radiated power in the new Super-X divertor, with millisecond time resolution, along 16 vertical and 16 horizontal lines of sight. The system uses a Xilinx Zynq-7000 series Field-Programmable Gate Array (FPGA) in the D-TACQ ACQ2106 carrier to perform real time data acquisition and signal processing. The FPGA enables AC-synchronous detection using high performance digital filtering to achieve a high signal-to-noise ratio and will be able to output processed data in real time with millisecond latency. The system has been installed on 8 previously unused channels of the JET vertical bolometer system. Initial results suggest good agreement with data from existing vertical channels but with higher bandwidth and signal-to-noise ratio.

FPGA for Power Control of MSL Avionics

NASA Technical Reports Server (NTRS)

Wang, Duo; Burke, Gary R.

2011-01-01

A PLGT FPGA (Field Programmable Gate Array) is included in the LCC (Load Control Card), GID (Guidance Interface & Drivers), TMC (Telemetry Multiplexer Card), and PFC (Pyro Firing Card) boards of the Mars Science Laboratory (MSL) spacecraft. (PLGT stands for PFC, LCC, GID, and TMC.) It provides the interface between the backside bus and the power drivers on these boards. The LCC drives power switches to switch power loads, and also relays. The GID drives the thrusters and latch valves, as well as having the star-tracker and Sun-sensor interface. The PFC drives pyros, and the TMC receives digital and analog telemetry. The FPGA is implemented both in Xilinx (Spartan 3- 400) and in Actel (RTSX72SU, ASX72S). The Xilinx Spartan 3 part is used for the breadboard, the Actel ASX part is used for the EM (Engineer Module), and the pin-compatible, radiation-hardened RTSX part is used for final EM and flight. The MSL spacecraft uses a FC (Flight Computer) to control power loads, relays, thrusters, latch valves, Sun-sensor, and star-tracker, and to read telemetry such as temperature. Commands are sent over a 1553 bus to the MREU (Multi-Mission System Architecture Platform Remote Engineering Unit). The MREU resends over a remote serial command bus c-bus to the LCC, GID TMC, and PFC. The MREU also sends out telemetry addresses via a remote serial telemetry address bus to the LCC, GID, TMC, and PFC, and the status is returned over the remote serial telemetry data bus.

FPGA implementation of neuro-fuzzy system with improved PSO learning.

PubMed

Karakuzu, Cihan; Karakaya, Fuat; Çavuşlu, Mehmet Ali

2016-07-01

This paper presents the first hardware implementation of neuro-fuzzy system (NFS) with its metaheuristic learning ability on field programmable gate array (FPGA). Metaheuristic learning of NFS for all of its parameters is accomplished by using the improved particle swarm optimization (iPSO). As a second novelty, a new functional approach, which does not require any memory and multiplier usage, is proposed for the Gaussian membership functions of NFS. NFS and its learning using iPSO are implemented on Xilinx Virtex5 xc5vlx110-3ff1153 and efficiency of the proposed implementation tested on two dynamic system identification problems and licence plate detection problem as a practical application. Results indicate that proposed NFS implementation and membership function approximation is as effective as the other approaches available in the literature but requires less hardware resources. Copyright © 2016 Elsevier Ltd. All rights reserved.

Multiple Embedded Processors for Fault-Tolerant Computing

NASA Technical Reports Server (NTRS)

Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

2005-01-01

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

A Practical, Hardware Friendly MMSE Detector for MIMO-OFDM-Based Systems

NASA Astrophysics Data System (ADS)

Kim, Hun Seok; Zhu, Weijun; Bhatia, Jatin; Mohammed, Karim; Shah, Anish; Daneshrad, Babak

2008-12-01

Design and implementation of a highly optimized MIMO (multiple-input multiple-output) detector requires cooptimization of the algorithm with the underlying hardware architecture. Special attention must be paid to application requirements such as throughput, latency, and resource constraints. In this work, we focus on a highly optimized matrix inversion free [InlineEquation not available: see fulltext.] MMSE (minimum mean square error) MIMO detector implementation. The work has resulted in a real-time field-programmable gate array-based implementation (FPGA-) on a Xilinx Virtex-2 6000 using only 9003 logic slices, 66 multipliers, and 24 Block RAMs (less than 33% of the overall resources of this part). The design delivers over 420 Mbps sustained throughput with a small 2.77-microsecond latency. The designed [InlineEquation not available: see fulltext.] linear MMSE MIMO detector is capable of complying with the proposed IEEE 802.11n standard.

MicroShell Minimalist Shell for Xilinx Microprocessors

NASA Technical Reports Server (NTRS)

Werne, Thomas A.

2011-01-01

MicroShell is a lightweight shell environment for engineers and software developers working with embedded microprocessors in Xilinx FPGAs. (MicroShell has also been successfully ported to run on ARM Cortex-M1 microprocessors in Actel ProASIC3 FPGAs, but without project-integration support.) Micro Shell decreases the time spent performing initial tests of field-programmable gate array (FPGA) designs, simplifies running customizable one-time-only experiments, and provides a familiar-feeling command-line interface. The program comes with a collection of useful functions and enables the designer to add an unlimited number of custom commands, which are callable from the command-line. The commands are parameterizable (using the C-based command-line parameter idiom), so the designer can use one function to exercise hardware with different values. Also, since many hardware peripherals instantiated in FPGAs have reasonably simple register-mapped I/O interfaces, the engineer can edit and view hardware parameter settings at any time without stopping the processor. MicroShell comes with a set of support scripts that interface seamlessly with Xilinx's EDK tool. Adding an instance of MicroShell to a project is as simple as marking a check box in a library configuration dialog box and specifying a software project directory. The support scripts then examine the hardware design, build design-specific functions, conditionally include processor-specific functions, and complete the compilation process. For code-size constrained designs, most of the stock functionality can be excluded from the compiled library. When all of the configurable options are removed from the binary, MicroShell has an unoptimized memory footprint of about 4.8 kB and a size-optimized footprint of about 2.3 kB. Since MicroShell allows unfettered access to all processor-accessible memory locations, it is possible to perform live patching on a running system. This can be useful, for instance, if a bug is discovered in a routine but the system cannot be rebooted: Shell allows a skilled operator to directly edit the binary executable in memory. With some forethought, MicroShell code can be located in a different memory location from custom code, permitting the custom functionality to be overwritten at any time without stopping the controlling shell.

Design for Security Workshop

DTIC Science & Technology

2014-09-30

fingerprint sensor etc.  Secure application execution  Trust established outwards  With normal world apps  With internet/cloud apps...Xilinx Zynq Security Components and Capabilities © Copyright 2014 Xilinx . Security Features Inherited from FPGAs Zynq Secure Boot TrustZone...2014 Xilinx . Security Features Inherited from FPGAs Zynq Secure Boot TrustZone Integration 4 Agenda © Copyright 2014 Xilinx . Device DNA and User

A Nonlinearity Minimization-Oriented Resource-Saving Time-to-Digital Converter Implemented in a 28 nm Xilinx FPGA

NASA Astrophysics Data System (ADS)

Wang, Yonggang; Liu, Chong

2015-10-01

Because large nonlinearity errors exist in the current tapped-delay line (TDL) style field programmable gate array (FPGA)-based time-to-digital converters (TDC), bin-by-bin calibration techniques have to be resorted for gaining a high measurement resolution. If the TDL in selected FPGAs is significantly affected by changes in ambient temperature, the bin-by-bin calibration table has to be updated as frequently as possible. The on-line calibration and calibration table updating increase the TDC design complexity and limit the system performance to some extent. This paper proposes a method to minimize the nonlinearity errors of TDC bins, so that the bin-by-bin calibration may not be needed while maintaining a reasonably high time resolution. The method is a two pass approach: By a bin realignment, the large number of wasted zero-width bins in the original TDL is reused and the granularity of the bins is improved; by a bin decimation, the bin size and its uniformity is traded-off, and the time interpolation by the delay line turns more precise so that the bin-by-bin calibration is not necessary. Using Xilinx 28 nm FPGAs, in which the TDL property is not very sensitive to ambient temperature, the proposed TDC achieves approximately 15 ps root-mean-square (RMS) time resolution by dual-channel measurements of time-intervals over the range of operating temperature. Because of removing the calibration and less logic resources required for the data post-processing, the method has bigger multi-channel capability.

Design space exploration of high throughput finite field multipliers for channel coding on Xilinx FPGAs

NASA Astrophysics Data System (ADS)

de Schryver, C.; Weithoffer, S.; Wasenmüller, U.; Wehn, N.

2012-09-01

Channel coding is a standard technique in all wireless communication systems. In addition to the typically employed methods like convolutional coding, turbo coding or low density parity check (LDPC) coding, algebraic codes are used in many cases. For example, outer BCH coding is applied in the DVB-S2 standard for satellite TV broadcasting. A key operation for BCH and the related Reed-Solomon codes are multiplications in finite fields (Galois Fields), where extension fields of prime fields are used. A lot of architectures for multiplications in finite fields have been published over the last decades. This paper examines four different multiplier architectures in detail that offer the potential for very high throughputs. We investigate the implementation performance of these multipliers on FPGA technology in the context of channel coding. We study the efficiency of the multipliers with respect to area, frequency and throughput, as well as configurability and scalability. The implementation data of the fully verified circuits are provided for a Xilinx Virtex-4 device after place and route.

A Hardware-Accelerated Quantum Monte Carlo framework (HAQMC) for N-body systems

NASA Astrophysics Data System (ADS)

Gothandaraman, Akila; Peterson, Gregory D.; Warren, G. Lee; Hinde, Robert J.; Harrison, Robert J.

2009-12-01

Interest in the study of structural and energetic properties of highly quantum clusters, such as inert gas clusters has motivated the development of a hardware-accelerated framework for Quantum Monte Carlo simulations. In the Quantum Monte Carlo method, the properties of a system of atoms, such as the ground-state energies, are averaged over a number of iterations. Our framework is aimed at accelerating the computations in each iteration of the QMC application by offloading the calculation of properties, namely energy and trial wave function, onto reconfigurable hardware. This gives a user the capability to run simulations for a large number of iterations, thereby reducing the statistical uncertainty in the properties, and for larger clusters. This framework is designed to run on the Cray XD1 high performance reconfigurable computing platform, which exploits the coarse-grained parallelism of the processor along with the fine-grained parallelism of the reconfigurable computing devices available in the form of field-programmable gate arrays. In this paper, we illustrate the functioning of the framework, which can be used to calculate the energies for a model cluster of helium atoms. In addition, we present the capabilities of the framework that allow the user to vary the chemical identities of the simulated atoms. Program summaryProgram title: Hardware Accelerated Quantum Monte Carlo (HAQMC) Catalogue identifier: AEEP_v1_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AEEP_v1_0.html Program obtainable from: CPC Program Library, Queen's University, Belfast, N. Ireland Licensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.html No. of lines in distributed program, including test data, etc.: 691 537 No. of bytes in distributed program, including test data, etc.: 5 031 226 Distribution format: tar.gz Programming language: C/C++ for the QMC application, VHDL and Xilinx 8.1 ISE/EDK tools for FPGA design and development Computer: Cray XD1 consisting of a dual-core, dualprocessor AMD Opteron 2.2 GHz with a Xilinx Virtex-4 (V4LX160) or Xilinx Virtex-II Pro (XC2VP50) FPGA per node. We use the compute node with the Xilinx Virtex-4 FPGA Operating system: Red Hat Enterprise Linux OS Has the code been vectorised or parallelized?: Yes Classification: 6.1 Nature of problem: Quantum Monte Carlo is a practical method to solve the Schrödinger equation for large many-body systems and obtain the ground-state properties of such systems. This method involves the sampling of a number of configurations of atoms and averaging the properties of the configurations over a number of iterations. We are interested in applying the QMC method to obtain the energy and other properties of highly quantum clusters, such as inert gas clusters. Solution method: The proposed framework provides a combined hardware-software approach, in which the QMC simulation is performed on the host processor, with the computationally intensive functions such as energy and trial wave function computations mapped onto the field-programmable gate array (FPGA) logic device attached as a co-processor to the host processor. We perform the QMC simulation for a number of iterations as in the case of our original software QMC approach, to reduce the statistical uncertainty of the results. However, our proposed HAQMC framework accelerates each iteration of the simulation, by significantly reducing the time taken to calculate the ground-state properties of the configurations of atoms, thereby accelerating the overall QMC simulation. We provide a generic interpolation framework that can be extended to study a variety of pure and doped atomic clusters, irrespective of the chemical identities of the atoms. For the FPGA implementation of the properties, we use a two-region approach for accurately computing the properties over the entire domain, employ deep pipelines and fixed-point for all our calculations guaranteeing the accuracy required for our simulation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fernandes, Ana; Pereira, Rita C.; Sousa, Jorge

The Instituto de Plasmas e Fusao Nuclear (IPFN) has developed dedicated re-configurable modules based on field programmable gate array (FPGA) devices for several nuclear fusion machines worldwide. Moreover, new Advanced Telecommunication Computing Architecture (ATCA) based modules developed by IPFN are already included in the ITER catalogue. One of the requirements for re-configurable modules operating in future nuclear environments including ITER is the remote update capability. Accordingly, this work presents an alternative method for FPGA remote programing to be implemented in new ATCA based re-configurable modules. FPGAs are volatile devices and their programming code is usually stored in dedicated flash memoriesmore » for properly configuration during module power-on. The presented method is capable to store new FPGA codes in Serial Peripheral Interface (SPI) flash memories using the PCIexpress (PCIe) network established on the ATCA back-plane, linking data acquisition endpoints and the data switch blades. The method is based on the Xilinx Quick Boot application note, adapted to PCIe protocol and ATCA based modules. (authors)« less

Spacecube: A Family of Reconfigurable Hybrid On-Board Science Data Processors

NASA Technical Reports Server (NTRS)

Flatley, Thomas P.

2015-01-01

SpaceCube is a family of Field Programmable Gate Array (FPGA) based on-board science data processing systems developed at the NASA Goddard Space Flight Center (GSFC). The goal of the SpaceCube program is to provide 10x to 100x improvements in on-board computing power while lowering relative power consumption and cost. SpaceCube is based on the Xilinx Virtex family of FPGAs, which include processor, FPGA logic and digital signal processing (DSP) resources. These processing elements are leveraged to produce a hybrid science data processing platform that accelerates the execution of algorithms by distributing computational functions to the most suitable elements. This approach enables the implementation of complex on-board functions that were previously limited to ground based systems, such as on-board product generation, data reduction, calibration, classification, eventfeature detection, data mining and real-time autonomous operations. The system is fully reconfigurable in flight, including data parameters, software and FPGA logic, through either ground commanding or autonomously in response to detected eventsfeatures in the instrument data stream.

Hardware Implementation of a MIMO Decoder Using Matrix Factorization Based Channel Estimation

NASA Astrophysics Data System (ADS)

Islam, Mohammad Tariqul; Numan, Mostafa Wasiuddin; Misran, Norbahiah; Ali, Mohd Alauddin Mohd; Singh, Mandeep

2011-05-01

This paper presents an efficient hardware realization of multiple-input multiple-output (MIMO) wireless communication decoder that utilizes the available resources by adopting the technique of parallelism. The hardware is designed and implemented on Xilinx Virtex™-4 XC4VLX60 field programmable gate arrays (FPGA) device in a modular approach which simplifies and eases hardware update, and facilitates testing of the various modules independently. The decoder involves a proficient channel estimation module that employs matrix factorization on least squares (LS) estimation to reduce a full rank matrix into a simpler form in order to eliminate matrix inversion. This results in performance improvement and complexity reduction of the MIMO system. Performance evaluation of the proposed method is validated through MATLAB simulations which indicate 2 dB improvement in terms of SNR compared to LS estimation. Moreover complexity comparison is performed in terms of mathematical operations, which shows that the proposed approach appreciably outperforms LS estimation at a lower complexity and represents a good solution for channel estimation technique.

JPL Space Telecommunications Radio System Operating Environment

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.; Duncan, Courtney B.; Orozco, David S.; Stern, Ryan A.; Ahten, Earl R.; Girard, Mike

2013-01-01

A flight-qualified implementation of a Software Defined Radio (SDR) Operating Environment for the JPL-SDR built for the CoNNeCT Project has been developed. It is compliant with the NASA Space Telecommunications Radio System (STRS) Architecture Standard, and provides the software infrastructure for STRS compliant waveform applications. This software provides a standards-compliant abstracted view of the JPL-SDR hardware platform. It uses industry standard POSIX interfaces for most functions, as well as exposing the STRS API (Application Programming In terface) required by the standard. This software includes a standardized interface for IP components instantiated within a Xilinx FPGA (Field Programmable Gate Array). The software provides a standardized abstracted interface to platform resources such as data converters, file system, etc., which can be used by STRS standards conformant waveform applications. It provides a generic SDR operating environment with a much smaller resource footprint than similar products such as SCA (Software Communications Architecture) compliant implementations, or the DoD Joint Tactical Radio Systems (JTRS).

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

FPGA Implementation of the Coupled Filtering Method and the Affine Warping Method.

PubMed

Zhang, Chen; Liang, Tianzhu; Mok, Philip K T; Yu, Weichuan

2017-07-01

In ultrasound image analysis, the speckle tracking methods are widely applied to study the elasticity of body tissue. However, "feature-motion decorrelation" still remains as a challenge for the speckle tracking methods. Recently, a coupled filtering method and an affine warping method were proposed to accurately estimate strain values, when the tissue deformation is large. The major drawback of these methods is the high computational complexity. Even the graphics processing unit (GPU)-based program requires a long time to finish the analysis. In this paper, we propose field-programmable gate array (FPGA)-based implementations of both methods for further acceleration. The capability of FPGAs on handling different image processing components in these methods is discussed. A fast and memory-saving image warping approach is proposed. The algorithms are reformulated to build a highly efficient pipeline on FPGA. The final implementations on a Xilinx Virtex-7 FPGA are at least 13 times faster than the GPU implementation on the NVIDIA graphic card (GeForce GTX 580).

Hardware Implementation of Lossless Adaptive Compression of Data From a Hyperspectral Imager

NASA Technical Reports Server (NTRS)

Keymeulen, Didlier; Aranki, Nazeeh I.; Klimesh, Matthew A.; Bakhshi, Alireza

2012-01-01

Efficient onboard data compression can reduce the data volume from hyperspectral imagers on NASA and DoD spacecraft in order to return as much imagery as possible through constrained downlink channels. Lossless compression is important for signature extraction, object recognition, and feature classification capabilities. To provide onboard data compression, a hardware implementation of a lossless hyperspectral compression algorithm was developed using a field programmable gate array (FPGA). The underlying algorithm is the Fast Lossless (FL) compression algorithm reported in Fast Lossless Compression of Multispectral- Image Data (NPO-42517), NASA Tech Briefs, Vol. 30, No. 8 (August 2006), p. 26 with the modification reported in Lossless, Multi-Spectral Data Comressor for Improved Compression for Pushbroom-Type Instruments (NPO-45473), NASA Tech Briefs, Vol. 32, No. 7 (July 2008) p. 63, which provides improved compression performance for data from pushbroom-type imagers. An FPGA implementation of the unmodified FL algorithm was previously developed and reported in Fast and Adaptive Lossless Onboard Hyperspectral Data Compression System (NPO-46867), NASA Tech Briefs, Vol. 36, No. 5 (May 2012) p. 42. The essence of the FL algorithm is adaptive linear predictive compression using the sign algorithm for filter adaption. The FL compressor achieves a combination of low complexity and compression effectiveness that exceeds that of stateof- the-art techniques currently in use. The modification changes the predictor structure to tolerate differences in sensitivity of different detector elements, as occurs in pushbroom-type imagers, which are suitable for spacecraft use. The FPGA implementation offers a low-cost, flexible solution compared to traditional ASIC (application specific integrated circuit) and can be integrated as an intellectual property (IP) for part of, e.g., a design that manages the instrument interface. The FPGA implementation was benchmarked on the Xilinx Virtex IV LX25 device, and ported to a Xilinx prototype board. The current implementation has a critical path of 29.5 ns, which dictated a clock speed of 33 MHz. The critical path delay is end-to-end measurement between the uncompressed input data and the output compression data stream. The implementation compresses one sample every clock cycle, which results in a speed of 33 Msample/s. The implementation has a rather low device use of the Xilinx Virtex IV LX25, making the total power consumption of the implementation about 1.27 W.

SpaceCube Mini

NASA Technical Reports Server (NTRS)

Lin, Michael; Petrick, David; Geist, Alessandro; Flatley, Thomas

2012-01-01

This version of the SpaceCube will be a full-fledged, onboard space processing system capable of 2500+ MIPS, and featuring a number of plug-andplay gigabit and standard interfaces, all in a condensed 3x3x3 form factor [less than 10 watts and less than 3 lb (approximately equal to 1.4 kg)]. The main processing engine is the Xilinx SIRF radiation- hardened-by-design Virtex-5 FX-130T field-programmable gate array (FPGA). Even as the SpaceCube 2.0 version (currently under test) is being targeted as the platform of choice for a number of the upcoming Earth Science Decadal Survey missions, GSFC has been contacted by customers who wish to see a system that incorporates key features of the version 2.0 architecture in an even smaller form factor. In order to fulfill that need, the SpaceCube Mini is being designed, and will be a very compact and low-power system. A similar flight system with this combination of small size, low power, low cost, adaptability, and extremely high processing power does not otherwise exist, and the SpaceCube Mini will be of tremendous benefit to GSFC and its partners. The SpaceCube Mini will utilize space-grade components. The primary processing engine of the Mini is the Xilinx Virtex-5 SIRF FX-130T radiation-hardened-by-design FPGA for critical flight applications in high-radiation environments. The Mini can also be equipped with a commercial Xilinx Virtex-5 FPGA with integrated PowerPCs for a low-cost, high-power computing platform for use in the relatively radiation- benign LEOs (low-Earth orbits). In either case, this version of the Space-Cube will weigh less than 3 pounds (.1.4 kg), conform to the CubeSat form-factor (10x10x10 cm), and will be low power (less than 10 watts for typical applications). The SpaceCube Mini will have a radiation-hardened Aeroflex FPGA for configuring and scrubbing the Xilinx FPGA by utilizing the onboard FLASH memory to store the configuration files. The FLASH memory will also be used for storing algorithm and application code for the PowerPCs and the Xilinx FPGA. In addition, it will feature highspeed DDR SDRAM (double data rate synchronous dynamic random-access memory) to store the instructions and data of active applications. This version will also feature SATA-II and Gigabit Ethernet interfaces. Furthermore, there will also be general-purpose, multi-gigabit interfaces. In addition, the system will have dozens of transceivers that can support LVDS (low-voltage differential signaling), RS-422, or SpaceWire. The SpaceCube Mini includes an I/O card that can be customized to meet the needs of each mission. This version of the SpaceCube will be designed so that multiple Minis can be networked together using SpaceWire, Ethernet, or even a custom protocol. Scalability can be provided by networking multiple SpaceCube Minis together. Rigid-Flex technology is being targeted for the construction of the SpaceCube Mini, which will make the extremely compact and low-weight design feasible. The SpaceCube Mini is designed to fit in the compact CubeSat form factor, thus allowing deployment in a new class of missions that the previous SpaceCube versions were not suited for. At the time of this reporting, engineering units should be available in the summer 2012.

Tradeoffs in Flight Design Upset Mitigation in State of the Art FPGAs: Hardened by Design vs. Design Level Hardening

NASA Technical Reports Server (NTRS)

Swift, Gary M.; Roosta, Ramin

2004-01-01

This presentation compares and contrasts the effectiveness and the system/designer impacts of the two main approaches to upset hardening: the Actel approach (RTSX-S and RTAX-S) of low-level (inside each flip-flop) triplication and the Xilinx approach (Virtex and Virtex2) of design-level triplication of both functional blocks and voters. The effectiveness of these approaches is compared using measurements made in conjunction with each of the FPGAs' manufacturer: for Actel, published data [1] and for Xilinx, recent results from the Xilinx SEE Test Consortium (note that the author is an active and founding member). The impacts involve Actel advantages in the areas of transistor-utilization efficiency and minimizing designer involvement in the triplication while the Xilinx advantages relate to the ability to custom tailor upset hardness and the flexibility of re-configurability. Additionally, there are currently clear Xilinx advantages in available features such as the number of I/O's, logic cells, and RAM blocks as well as speed. However, the advantage of the Actel anti-fuses for configuration over the Xilinx SRAM cells is that the latter need additional functionality and external circuitry (PROMs and, at least a watchdog timer) for configuration and configuration scrubbing. Further, although effectively mitigated if done correctly, the proton upset-ability of the Xilinx FPGAs is a concern in severe proton-rich environments. Ultimately, both manufacturers' upset hardening is limited by SEFI (single-event functional interrupt) rates where it appears the Actel results are better although the Xilinx Virtex2-family result of about one SEFI in 65 device-years in solar-min GCR (the more intense part of the galactic cosmic-ray background) should be acceptable to most missions

Subnanosecond time-to-digital converter implemented in a Kintex-7 FPGA

NASA Astrophysics Data System (ADS)

Sano, Y.; Horii, Y.; Ikeno, M.; Sasaki, O.; Tomoto, M.; Uchida, T.

2017-12-01

Time-to-digital converters (TDCs) are used in various fields, including high-energy physics. One advantage of implementing TDCs in field-programmable gate arrays (FPGAs) is the flexibility on the modification of the logics, which is useful to cope with the changes in the experimental conditions. Recent FPGAs make it possible to implement TDCs with a time resolution less than 10 ps. On the other hand, various drift chambers require a time resolution of O(0.1) ns, and a simple and easy-to-implement TDC is useful for a robust operation. Herein an eight-channel TDC with a variable bin size down to 0.28 ns is implemented in a Xilinx Kintex-7 FPGA and tested. The TDC is based on a multisampling scheme with quad phase clocks synchronised with an external reference clock. Calibration of the bin size is unnecessary if a stable reference clock is available, which is common in high-energy physics experiments. Depending on the channel, the standard deviation of the differential nonlinearity for a 0.28 ns bin size is 0.13-0.31. The performance has a negligible dependence on the temperature. The power consumption and the potential to extend the number of channels are also discussed.

A preliminary study of molecular dynamics on reconfigurable computers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wolinski, C.; Trouw, F. R.; Gokhale, M.

2003-01-01

In this paper we investigate the performance of platform FPGAs on a compute-intensive, floating-point-intensive supercomputing application, Molecular Dynamics (MD). MD is a popular simulation technique to track interacting particles through time by integrating their equations of motion. One part of the MD algorithm was implemented using the Fabric Generator (FG)[l I ] and mapped onto several reconfigurable logic arrays. FG is a Java-based toolset that greatly accelerates construction of the fabrics from an abstract technology independent representation. Our experiments used technology-independent IEEE 32-bit floating point operators so that the design could be easily re-targeted. Experiments were performed using both non-pipelinedmore » and pipelined floating point modules. We present results for the Altera Excalibur ARM System on a Programmable Chip (SoPC), the Altera Strath EPlS80, and the Xilinx Virtex-N Pro 2VP.50. The best results obtained were 5.69 GFlops at 8OMHz(Altera Strath EPlS80), and 4.47 GFlops at 82 MHz (Xilinx Virtex-II Pro 2VF50). Assuming a lOWpower budget, these results compare very favorably to a 4Gjlop/40Wprocessing/power rate for a modern Pentium, suggesting that reconfigurable logic can achieve high performance at low power on jloating-point-intensivea pplications.« less

A Method of Sky Ripple Residual Nonuniformity Reduction for a Cooled Infrared Imager and Hardware Implementation.

PubMed

Li, Yiyang; Jin, Weiqi; Li, Shuo; Zhang, Xu; Zhu, Jin

2017-05-08

Cooled infrared detector arrays always suffer from undesired ripple residual nonuniformity (RNU) in sky scene observations. The ripple residual nonuniformity seriously affects the imaging quality, especially for small target detection. It is difficult to eliminate it using the calibration-based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified temporal high-pass nonuniformity correction algorithm using fuzzy scene classification. The fuzzy scene classification is designed to control the correction threshold so that the algorithm can remove ripple RNU without degrading the scene details. We test the algorithm on a real infrared sequence by comparing it to several well-established methods. The result shows that the algorithm has obvious advantages compared with the tested methods in terms of detail conservation and convergence speed for ripple RNU correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA), which has two advantages: (1) low resources consumption; and (2) small hardware delay (less than 10 image rows). It has been successfully applied in an actual system.

A Test Methodology for Determining Space-Readiness of Xilinx SRAM-Based FPGA Designs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather M; Graham, Paul S; Morgan, Keith S

2008-01-01

Using reconfigurable, static random-access memory (SRAM) based field-programmable gate arrays (FPGAs) for space-based computation has been an exciting area of research for the past decade. Since both the circuit and the circuit's state is stored in radiation-tolerant memory, both could be alterd by the harsh space radiation environment. Both the circuit and the circuit's state can be prote cted by triple-moduler redundancy (TMR), but applying TMR to FPGA user designs is often an error-prone process. Faulty application of TMR could cause the FPGA user circuit to output incorrect data. This paper will describe a three-tiered methodology for testing FPGA usermore » designs for space-readiness. We will describe the standard approach to testing FPGA user designs using a particle accelerator, as well as two methods using fault injection and a modeling tool. While accelerator testing is the current 'gold standard' for pre-launch testing, we believe the use of fault injection and modeling tools allows for easy, cheap and uniform access for discovering errors early in the design process.« less

Intelligent FPGA Data Acquisition Framework

NASA Astrophysics Data System (ADS)

Bai, Yunpeng; Gaisbauer, Dominic; Huber, Stefan; Konorov, Igor; Levit, Dmytro; Steffen, Dominik; Paul, Stephan

2017-06-01

In this paper, we present the field programmable gate arrays (FPGA)-based framework intelligent FPGA data acquisition (IFDAQ), which is used for the development of DAQ systems for detectors in high-energy physics. The framework supports Xilinx FPGA and provides a collection of IP cores written in very high speed integrated circuit hardware description language, which use the common interconnect interface. The IP core library offers functionality required for the development of the full DAQ chain. The library consists of Serializer/Deserializer (SERDES)-based time-to-digital conversion channels, an interface to a multichannel 80-MS/s 10-b analog-digital conversion, data transmission, and synchronization protocol between FPGAs, event builder, and slow control. The functionality is distributed among FPGA modules built in the AMC form factor: front end and data concentrator. This modular design also helps to scale and adapt the DAQ system to the needs of the particular experiment. The first application of the IFDAQ framework is the upgrade of the read-out electronics for the drift chambers and the electromagnetic calorimeters (ECALs) of the COMPASS experiment at CERN. The framework will be presented and discussed in the context of this paper.

Implementation of a high precision multi-measurement time-to-digital convertor on a Kintex-7 FPGA

NASA Astrophysics Data System (ADS)

Kuang, Jie; Wang, Yonggang; Cao, Qiang; Liu, Chong

2018-05-01

Time-to-digital convertors (TDCs) based on field programmable gate array (FPGA) are becoming more and more popular. Multi-measurement is an effective method to improve TDC precision beyond the cell delay limitation. However, the implementation of TDC with multi-measurement on FPGAs manufactured with 28 nm and more advanced process is facing new challenges. Benefiting from the ones-counter encoding scheme, which was developed in our previous work, we implement a ring oscillator multi-measurement TDC on a Xilinx Kintex-7 FPGA. Using the two TDC channels to measure time-intervals in the range (0 ns-30 ns), the average RMS precision can be improved to 5.76 ps, meanwhile the logic resource usage remains the same with the one-measurement TDC, and the TDC dead time is only 22 ns. The investigation demonstrates that the multi-measurement methods are still available for current main-stream FPGAs. Furthermore, the new implementation in this paper could make the trade-off among the time precision, resource usage and TDC dead time better than ever before.

DeepX: Deep Learning Accelerator for Restricted Boltzmann Machine Artificial Neural Networks.

PubMed

Kim, Lok-Won

2018-05-01

Although there have been many decades of research and commercial presence on high performance general purpose processors, there are still many applications that require fully customized hardware architectures for further computational acceleration. Recently, deep learning has been successfully used to learn in a wide variety of applications, but their heavy computation demand has considerably limited their practical applications. This paper proposes a fully pipelined acceleration architecture to alleviate high computational demand of an artificial neural network (ANN) which is restricted Boltzmann machine (RBM) ANNs. The implemented RBM ANN accelerator (integrating network size, using 128 input cases per batch, and running at a 303-MHz clock frequency) integrated in a state-of-the art field-programmable gate array (FPGA) (Xilinx Virtex 7 XC7V-2000T) provides a computational performance of 301-billion connection-updates-per-second and about 193 times higher performance than a software solution running on general purpose processors. Most importantly, the architecture enables over 4 times (12 times in batch learning) higher performance compared with a previous work when both are implemented in an FPGA device (XC2VP70).

Exploiting the chaotic behaviour of atmospheric models with reconfigurable architectures

NASA Astrophysics Data System (ADS)

Russell, Francis P.; Düben, Peter D.; Niu, Xinyu; Luk, Wayne; Palmer, T. N.

2017-12-01

Reconfigurable architectures are becoming mainstream: Amazon, Microsoft and IBM are supporting such architectures in their data centres. The computationally intensive nature of atmospheric modelling is an attractive target for hardware acceleration using reconfigurable computing. Performance of hardware designs can be improved through the use of reduced-precision arithmetic, but maintaining appropriate accuracy is essential. We explore reduced-precision optimisation for simulating chaotic systems, targeting atmospheric modelling, in which even minor changes in arithmetic behaviour will cause simulations to diverge quickly. The possibility of equally valid simulations having differing outcomes means that standard techniques for comparing numerical accuracy are inappropriate. We use the Hellinger distance to compare statistical behaviour between reduced-precision CPU implementations to guide reconfigurable designs of a chaotic system, then analyse accuracy, performance and power efficiency of the resulting implementations. Our results show that with only a limited loss in accuracy corresponding to less than 10% uncertainty in input parameters, the throughput and energy efficiency of a single-precision chaotic system implemented on a Xilinx Virtex-6 SX475T Field Programmable Gate Array (FPGA) can be more than doubled.

Dual Super-Systolic Core for Real-Time Reconstructive Algorithms of High-Resolution Radar/SAR Imaging Systems

PubMed Central

Atoche, Alejandro Castillo; Castillo, Javier Vázquez

2012-01-01

A high-speed dual super-systolic core for reconstructive signal processing (SP) operations consists of a double parallel systolic array (SA) machine in which each processing element of the array is also conceptualized as another SA in a bit-level fashion. In this study, we addressed the design of a high-speed dual super-systolic array (SSA) core for the enhancement/reconstruction of remote sensing (RS) imaging of radar/synthetic aperture radar (SAR) sensor systems. The selected reconstructive SP algorithms are efficiently transformed in their parallel representation and then, they are mapped into an efficient high performance embedded computing (HPEC) architecture in reconfigurable Xilinx field programmable gate array (FPGA) platforms. As an implementation test case, the proposed approach was aggregated in a HW/SW co-design scheme in order to solve the nonlinear ill-posed inverse problem of nonparametric estimation of the power spatial spectrum pattern (SSP) from a remotely sensed scene. We show how such dual SSA core, drastically reduces the computational load of complex RS regularization techniques achieving the required real-time operational mode. PMID:22736964

Active vibration control of a full scale aircraft wing using a reconfigurable controller

NASA Astrophysics Data System (ADS)

Prakash, Shashikala; Renjith Kumar, T. G.; Raja, S.; Dwarakanathan, D.; Subramani, H.; Karthikeyan, C.

2016-01-01

This work highlights the design of a Reconfigurable Active Vibration Control (AVC) System for aircraft structures using adaptive techniques. The AVC system with a multichannel capability is realized using Filtered-X Least Mean Square algorithm (FxLMS) on Xilinx Virtex-4 Field Programmable Gate Array (FPGA) platform in Very High Speed Integrated Circuits Hardware Description Language, (VHDL). The HDL design is made based on Finite State Machine (FSM) model with Floating point Intellectual Property (IP) cores for arithmetic operations. The use of FPGA facilitates to modify the system parameters even during runtime depending on the changes in user's requirements. The locations of the control actuators are optimized based on dynamic modal strain approach using genetic algorithm (GA). The developed system has been successfully deployed for the AVC testing of the full-scale wing of an all composite two seater transport aircraft. Several closed loop configurations like single channel and multi-channel control have been tested. The experimental results from the studies presented here are very encouraging. They demonstrate the usefulness of the system's reconfigurability for real time applications.

Development of an embedded atmospheric turbulence mitigation engine

NASA Astrophysics Data System (ADS)

Paolini, Aaron; Bonnett, James; Kozacik, Stephen; Kelmelis, Eric

2017-05-01

Methods to reconstruct pictures from imagery degraded by atmospheric turbulence have been under development for decades. The techniques were initially developed for observing astronomical phenomena from the Earth's surface, but have more recently been modified for ground and air surveillance scenarios. Such applications can impose significant constraints on deployment options because they both increase the computational complexity of the algorithms themselves and often dictate a requirement for low size, weight, and power (SWaP) form factors. Consequently, embedded implementations must be developed that can perform the necessary computations on low-SWaP platforms. Fortunately, there is an emerging class of embedded processors driven by the mobile and ubiquitous computing industries. We have leveraged these processors to develop embedded versions of the core atmospheric correction engine found in our ATCOM software. In this paper, we will present our experience adapting our algorithms for embedded systems on a chip (SoCs), namely the NVIDIA Tegra that couples general-purpose ARM cores with their graphics processing unit (GPU) technology and the Xilinx Zynq which pairs similar ARM cores with their field-programmable gate array (FPGA) fabric.

Evaluation of FPGA to PC feedback loop

NASA Astrophysics Data System (ADS)

Linczuk, Pawel; Zabolotny, Wojciech M.; Wojenski, Andrzej; Krawczyk, Rafal D.; Pozniak, Krzysztof T.; Chernyshova, Maryna; Czarski, Tomasz; Gaska, Michal; Kasprowicz, Grzegorz; Kowalska-Strzeciwilk, Ewa; Malinowski, Karol

2017-08-01

The paper presents the evaluation study of the performance of the data transmission subsystem which can be used in High Energy Physics (HEP) and other High-Performance Computing (HPC) systems. The test environment consisted of Xilinx Artix-7 FPGA and server-grade PC connected via the PCIe 4xGen2 bus. The DMA engine was based on the Xilinx DMA for PCI Express Subsystem1 controlled by the modified Xilinx XDMA kernel driver.2 The research is focused on the influence of the system configuration on achievable throughput and latency of data transfer.

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array—Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique

PubMed Central

Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-01-01

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array—application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384. PMID:28672813

A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

PubMed

Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

2017-06-24

With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

Multiplier less high-speed squaring circuit for binary numbers

NASA Astrophysics Data System (ADS)

Sethi, Kabiraj; Panda, Rutuparna

2015-03-01

The squaring operation is important in many applications in signal processing, cryptography etc. In general, squaring circuits reported in the literature use fast multipliers. A novel idea of a squaring circuit without using multipliers is proposed in this paper. Ancient Indian method used for squaring decimal numbers is extended here for binary numbers. The key to our success is that no multiplier is used. Instead, one squaring circuit is used. The hardware architecture of the proposed squaring circuit is presented. The design is coded in VHDL and synthesised and simulated in Xilinx ISE Design Suite 10.1 (Xilinx Inc., San Jose, CA, USA). It is implemented in Xilinx Vertex 4vls15sf363-12 device (Xilinx Inc.). The results in terms of time delay and area is compared with both modified Booth's algorithm and squaring circuit using Vedic multipliers. Our proposed squaring circuit seems to have better performance in terms of both speed and area.

Implementation of the 2-D Wavelet Transform into FPGA for Image

NASA Astrophysics Data System (ADS)

León, M.; Barba, L.; Vargas, L.; Torres, C. O.

2011-01-01

This paper presents a hardware system implementation of the of discrete wavelet transform algoritm in two dimensions for FPGA, using the Daubechies filter family of order 2 (db2). The decomposition algorithm of this transform is designed and simulated with the Hardware Description Language VHDL and is implemented in a programmable logic device (FPGA) XC3S1200E reference, Spartan IIIE family, by Xilinx, take advantage the parallels properties of these gives us and speeds processing that can reach them. The architecture is evaluated using images input of different sizes. This implementation is done with the aim of developing a future images encryption hardware system using wavelet transform for security information.

Xilinx Virtex-5QV (V5QV) Independent SEU Data

NASA Technical Reports Server (NTRS)

Berg, Melanie D.; LaBel, Kenneth A.; Pellish, Jonathan

2014-01-01

This is an independent study to determine the single event destructive and transient susceptibility of the Xilinx Virtex-5QV (SIRF) device. A framework for evaluating complex digital systems targeted for harsh radiation environments such as space is presented.

Effectiveness of Internal vs. External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis

NASA Technical Reports Server (NTRS)

Berg, Melanie; Poivey C.; Petrick, D.; Espinosa, D.; Lesea, Austin; LaBel, K. A.; Friendlich, M; Kim, H; Phan, A.

2008-01-01

We compare two scrubbing mitigation schemes for Xilinx FPGA devices. The design of the scrubbers is briefly discussed along with an examination of mitigation limitations. Proton and Heavy Ion data are then presented and analyzed.

Single Event Effects in FPGA Devices 2015-2016

NASA Technical Reports Server (NTRS)

Berg, Melanie; LaBel, Kenneth; Pellish, Jonathan

2016-01-01

This presentation provides an overview of single event effects in FPGA devices 2015-2016 including commercial Xilinx V5 heavy ion accelerated testing, Xilinx Kintex-7 heavy ion accelerated testing. Mitigation study, and investigation of various types of triple modular redundancy (TMR) for commercial SRAM based FPGAs.

Single Event Effects in FPGA Devices 2014-2015

NASA Technical Reports Server (NTRS)

Berg, Melanie D.; LaBel, Kenneth A.; Pellish, Jonathan

2015-01-01

This presentation provides an overview of single event effects in FPGA devices 2014-2015 including commercial Xilinx V5 heavy ion accelerated testing, Xilinx Kintex-7 heavy ion accelerated testing. Mitigation study, and investigation of various types of triple modular redundancy (TMR) for commercial SRAM based FPGAs.

Single Event Effects in FPGA Devices 2015-2016

NASA Technical Reports Server (NTRS)

Berg, Melanie; LaBel, Kenneth; Pellish, Jonathan

2016-01-01

This presentation provides an overview of single event effects in FPGA devices 2015-2016 including commercial Xilinx V5 heavy ion accelerated testing, Xilinx Kintex-7 heavy ion accelerated testing, mitigation study, and investigation of various types of triple modular redundancy (TMR) for commercial SRAM based FPGAs.

A Method of Sky Ripple Residual Nonuniformity Reduction for a Cooled Infrared Imager and Hardware Implementation

PubMed Central

Li, Yiyang; Jin, Weiqi; Li, Shuo; Zhang, Xu; Zhu, Jin

2017-01-01

Cooled infrared detector arrays always suffer from undesired ripple residual nonuniformity (RNU) in sky scene observations. The ripple residual nonuniformity seriously affects the imaging quality, especially for small target detection. It is difficult to eliminate it using the calibration-based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified temporal high-pass nonuniformity correction algorithm using fuzzy scene classification. The fuzzy scene classification is designed to control the correction threshold so that the algorithm can remove ripple RNU without degrading the scene details. We test the algorithm on a real infrared sequence by comparing it to several well-established methods. The result shows that the algorithm has obvious advantages compared with the tested methods in terms of detail conservation and convergence speed for ripple RNU correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA), which has two advantages: (1) low resources consumption; and (2) small hardware delay (less than 10 image rows). It has been successfully applied in an actual system. PMID:28481320

Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications

PubMed Central

Canbay, Ferhat; Levent, Vecdi Emre; Serbes, Gorkem; Ugurdag, H. Fatih; Goren, Sezer

2016-01-01

The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed. PMID:27733925

A hybrid intelligent controller for a twin rotor MIMO system and its hardware implementation.

PubMed

Juang, Jih-Gau; Liu, Wen-Kai; Lin, Ren-Wei

2011-10-01

This paper presents a fuzzy PID control scheme with a real-valued genetic algorithm (RGA) to a setpoint control problem. The objective of this paper is to control a twin rotor MIMO system (TRMS) to move quickly and accurately to the desired attitudes, both the pitch angle and the azimuth angle in a cross-coupled condition. A fuzzy compensator is applied to the PID controller. The proposed control structure includes four PID controllers with independent inputs in 2-DOF. In order to reduce total error and control energy, all parameters of the controller are obtained by a RGA with the system performance index as a fitness function. The system performance index utilized the integral of time multiplied by the square error criterion (ITSE) to build a suitable fitness function in the RGA. A new method for RGA to solve more than 10 parameters in the control scheme is investigated. For real-time control, Xilinx Spartan II SP200 FPGA (Field Programmable Gate Array) is employed to construct a hardware-in-the-loop system through writing VHDL on this FPGA. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

Design and implementation of a high performance network security processor

NASA Astrophysics Data System (ADS)

Wang, Haixin; Bai, Guoqiang; Chen, Hongyi

2010-03-01

The last few years have seen many significant progresses in the field of application-specific processors. One example is network security processors (NSPs) that perform various cryptographic operations specified by network security protocols and help to offload the computation intensive burdens from network processors (NPs). This article presents a high performance NSP system architecture implementation intended for both internet protocol security (IPSec) and secure socket layer (SSL) protocol acceleration, which are widely employed in virtual private network (VPN) and e-commerce applications. The efficient dual one-way pipelined data transfer skeleton and optimised integration scheme of the heterogenous parallel crypto engine arrays lead to a Gbps rate NSP, which is programmable with domain specific descriptor-based instructions. The descriptor-based control flow fragments large data packets and distributes them to the crypto engine arrays, which fully utilises the parallel computation resources and improves the overall system data throughput. A prototyping platform for this NSP design is implemented with a Xilinx XC3S5000 based FPGA chip set. Results show that the design gives a peak throughput for the IPSec ESP tunnel mode of 2.85 Gbps with over 2100 full SSL handshakes per second at a clock rate of 95 MHz.

Logic design and implementation of FPGA for a high frame rate ultrasound imaging system

NASA Astrophysics Data System (ADS)

Liu, Anjun; Wang, Jing; Lu, Jian-Yu

2002-05-01

Recently, a method has been developed for high frame rate medical imaging [Jian-yu Lu, ``2D and 3D high frame rate imaging with limited diffraction beams,'' IEEE Trans. Ultrason. Ferroelectr. Freq. Control 44(4), 839-856 (1997)]. To realize this method, a complicated system [multiple-channel simultaneous data acquisition, large memory in each channel for storing up to 16 seconds of data at 40 MHz and 12-bit resolution, time-variable-gain (TGC) control, Doppler imaging, harmonic imaging, as well as coded transmissions] is designed. Due to the complexity of the system, field programmable gate array (FPGA) (Xilinx Spartn II) is used. In this presentation, the design and implementation of the FPGA for the system will be reported. This includes the synchronous dynamic random access memory (SDRAM) controller and other system controllers, time sharing for auto-refresh of SDRAMs to reduce peak power, transmission and imaging modality selections, ECG data acquisition and synchronization, 160 MHz delay locked loop (DLL) for accurate timing, and data transfer via either a parallel port or a PCI bus for post image processing. [Work supported in part by Grant 5RO1 HL60301 from NIH.

Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications.

PubMed

Canbay, Ferhat; Levent, Vecdi Emre; Serbes, Gorkem; Ugurdag, H Fatih; Goren, Sezer; Aydin, Nizamettin

2016-09-01

The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed.

Embedded Streaming Deep Neural Networks Accelerator With Applications.

PubMed

Dundar, Aysegul; Jin, Jonghoon; Martini, Berin; Culurciello, Eugenio

2017-07-01

Deep convolutional neural networks (DCNNs) have become a very powerful tool in visual perception. DCNNs have applications in autonomous robots, security systems, mobile phones, and automobiles, where high throughput of the feedforward evaluation phase and power efficiency are important. Because of this increased usage, many field-programmable gate array (FPGA)-based accelerators have been proposed. In this paper, we present an optimized streaming method for DCNNs' hardware accelerator on an embedded platform. The streaming method acts as a compiler, transforming a high-level representation of DCNNs into operation codes to execute applications in a hardware accelerator. The proposed method utilizes maximum computational resources available based on a novel-scheduled routing topology that combines data reuse and data concatenation. It is tested with a hardware accelerator implemented on the Xilinx Kintex-7 XC7K325T FPGA. The system fully explores weight-level and node-level parallelizations of DCNNs and achieves a peak performance of 247 G-ops while consuming less than 4 W of power. We test our system with applications on object classification and object detection in real-world scenarios. Our results indicate high-performance efficiency, outperforming all other presented platforms while running these applications.

Fast neuromimetic object recognition using FPGA outperforms GPU implementations.

PubMed

Orchard, Garrick; Martin, Jacob G; Vogelstein, R Jacob; Etienne-Cummings, Ralph

2013-08-01

Recognition of objects in still images has traditionally been regarded as a difficult computational problem. Although modern automated methods for visual object recognition have achieved steadily increasing recognition accuracy, even the most advanced computational vision approaches are unable to obtain performance equal to that of humans. This has led to the creation of many biologically inspired models of visual object recognition, among them the hierarchical model and X (HMAX) model. HMAX is traditionally known to achieve high accuracy in visual object recognition tasks at the expense of significant computational complexity. Increasing complexity, in turn, increases computation time, reducing the number of images that can be processed per unit time. In this paper we describe how the computationally intensive and biologically inspired HMAX model for visual object recognition can be modified for implementation on a commercial field-programmable aate Array, specifically the Xilinx Virtex 6 ML605 evaluation board with XC6VLX240T FPGA. We show that with minor modifications to the traditional HMAX model we can perform recognition on images of size 128 × 128 pixels at a rate of 190 images per second with a less than 1% loss in recognition accuracy in both binary and multiclass visual object recognition tasks.

Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing

PubMed Central

Bravo, Ignacio; Baliñas, Javier; Gardel, Alfredo; Lázaro, José L.; Espinosa, Felipe; García, Jorge

2011-01-01

This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely. PMID:22163739

A 256-channel, high throughput and precision time-to-digital converter with a decomposition encoding scheme in a Kintex-7 FPGA

NASA Astrophysics Data System (ADS)

Song, Z.; Wang, Y.; Kuang, J.

2018-05-01

Field Programmable Gate Arrays (FPGAs) made with 28 nm and more advanced process technology have great potentials for implementation of high precision time-to-digital convertors (TDC), because the delay cells in the tapped delay line (TDL) used for time interpolation are getting smaller and smaller. However, the bubble problems in the TDL status are becoming more complicated, which make it difficult to achieve TDCs on these chips with a high time precision. In this paper, we are proposing a novel decomposition encoding scheme, which not only can solve the bubble problem easily, but also has a high encoding efficiency. The potential of these chips to realize TDC can be fully released with the scheme. In a Xilinx Kintex-7 FPGA chip, we implemented a TDC system with 256 TDC channels, which doubles the number of TDC channels that our previous technique could achieve. Performances of all these TDC channels are evaluated. The average RMS time precision among them is 10.23 ps in the time-interval measurement range of (0–10 ns), and their measurement throughput reaches 277 M measures per second.

Ripple FPN reduced algorithm based on temporal high-pass filter and hardware implementation

NASA Astrophysics Data System (ADS)

Li, Yiyang; Li, Shuo; Zhang, Zhipeng; Jin, Weiqi; Wu, Lei; Jin, Minglei

2016-11-01

Cooled infrared detector arrays always suffer from undesired Ripple Fixed-Pattern Noise (FPN) when observe the scene of sky. The Ripple Fixed-Pattern Noise seriously affect the imaging quality of thermal imager, especially for small target detection and tracking. It is hard to eliminate the FPN by the Calibration based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified space low-pass and temporal high-pass nonuniformity correction algorithm using adaptive time domain threshold (THP&GM). The threshold is designed to significantly reduce ghosting artifacts. We test the algorithm on real infrared in comparison to several previously published methods. This algorithm not only can effectively correct common FPN such as Stripe, but also has obviously advantage compared with the current methods in terms of detail protection and convergence speed, especially for Ripple FPN correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA). The hardware implementation of the algorithm based on FPGA has two advantages: (1) low resources consumption, and (2) small hardware delay (less than 20 lines). The hardware has been successfully applied in actual system.

L1 track trigger for the CMS HL-LHC upgrade using AM chips and FPGAs

NASA Astrophysics Data System (ADS)

Fedi, Giacomo

2017-08-01

The increase of luminosity at the HL-LHC will require the introduction of tracker information in CMS's Level-1 trigger system to maintain an acceptable trigger rate when selecting interesting events, despite the order of magnitude increase in minimum bias interactions. To meet the latency requirements, dedicated hardware has to be used. This paper presents the results of tests of a prototype system (pattern recognition ezzanine) as core of pattern recognition and track fitting for the CMS experiment, combining the power of both associative memory custom ASICs and modern Field Programmable Gate Array (FPGA) devices. The mezzanine uses the latest available associative memory devices (AM06) and the most modern Xilinx Ultrascale FPGAs. The results of the test for a complete tower comprising about 0.5 million patterns is presented, using as simulated input events traversing the upgraded CMS detector. The paper shows the performance of the pattern matching, track finding and track fitting, along with the latency and processing time needed. The pT resolution over pT of the muons measured using the reconstruction algorithm is at the order of 1% in the range 3-100 GeV/c.

Fpga based L-band pulse doppler radar design and implementation

NASA Astrophysics Data System (ADS)

Savci, Kubilay

As its name implies RADAR (Radio Detection and Ranging) is an electromagnetic sensor used for detection and locating targets from their return signals. Radar systems propagate electromagnetic energy, from the antenna which is in part intercepted by an object. Objects reradiate a portion of energy which is captured by the radar receiver. The received signal is then processed for information extraction. Radar systems are widely used for surveillance, air security, navigation, weather hazard detection, as well as remote sensing applications. In this work, an FPGA based L-band Pulse Doppler radar prototype, which is used for target detection, localization and velocity calculation has been built and a general-purpose Pulse Doppler radar processor has been developed. This radar is a ground based stationary monopulse radar, which transmits a short pulse with a certain pulse repetition frequency (PRF). Return signals from the target are processed and information about their location and velocity is extracted. Discrete components are used for the transmitter and receiver chain. The hardware solution is based on Xilinx Virtex-6 ML605 FPGA board, responsible for the control of the radar system and the digital signal processing of the received signal, which involves Constant False Alarm Rate (CFAR) detection and Pulse Doppler processing. The algorithm is implemented in MATLAB/SIMULINK using the Xilinx System Generator for DSP tool. The field programmable gate arrays (FPGA) implementation of the radar system provides the flexibility of changing parameters such as the PRF and pulse length therefore it can be used with different radar configurations as well. A VHDL design has been developed for 1Gbit Ethernet connection to transfer digitized return signal and detection results to PC. An A-Scope software has been developed with C# programming language to display time domain radar signals and detection results on PC. Data are processed both in FPGA chip and on PC. FPGA uses fixed point arithmetic operations as it is fast and facilitates source requirement as it consumes less hardware than floating point arithmetic operations. The software uses floating point arithmetic operations, which ensure precision in processing at the expense of speed. The functionality of the radar system has been tested for experimental validation in the field with a moving car and the validation of submodules are tested with synthetic data simulated on MATLAB.

SpaceCube Version 1.5

NASA Technical Reports Server (NTRS)

Geist, Alessandro; Lin, Michael; Flatley, Tom; Petrick, David

2013-01-01

SpaceCube 1.5 is a high-performance and low-power system in a compact form factor. It is a hybrid processing system consisting of CPU (central processing unit), FPGA (field-programmable gate array), and DSP (digital signal processor) processing elements. The primary processing engine is the Virtex- 5 FX100T FPGA, which has two embedded processors. The SpaceCube 1.5 System was a bridge to the SpaceCube 2.0 and SpaceCube 2.0 Mini processing systems. The SpaceCube 1.5 system was the primary avionics in the successful SMART (Small Rocket/Spacecraft Technology) Sounding Rocket mission that was launched in the summer of 2011. For SMART and similar missions, an avionics processor is required that is reconfigurable, has high processing capability, has multi-gigabit interfaces, is low power, and comes in a rugged/compact form factor. The original SpaceCube 1.0 met a number of the criteria, but did not possess the multi-gigabit interfaces that were required and is a higher-cost system. The SpaceCube 1.5 was designed with those mission requirements in mind. The SpaceCube 1.5 features one Xilinx Virtex-5 FX100T FPGA and has excellent size, weight, and power characteristics [4×4×3 in. (approx. = 10×10×8 cm), 3 lb (approx. = 1.4 kg), and 5 to 15 W depending on the application]. The estimated computing power of the two PowerPC 440s in the Virtex-5 FPGA is 1100 DMIPS each. The SpaceCube 1.5 includes two Gigabit Ethernet (1 Gbps) interfaces as well as two SATA-I/II interfaces (1.5 to 3.0 Gbps) for recording to data drives. The SpaceCube 1.5 also features DDR2 SDRAM (double data rate synchronous dynamic random access memory); 4- Gbit Flash for storing application code for the CPU, FPGA, and DSP processing elements; and a Xilinx Platform Flash XL to store FPGA configuration files or application code. The system also incorporates a 12 bit analog to digital converter with the ability to read 32 discrete analog sensor inputs. The SpaceCube 1.5 design also has a built-in accelerometer. In addition, the system has 12 receive and transmit RS- 422 interfaces for legacy support. The SpaceCube 1.5 processor card represents the first NASA Goddard design in a compact form factor featuring the Xilinx Virtex- 5. The SpaceCube 1.5 incorporates backward compatibility with the Space- Cube 1.0 form factor and stackable architecture. It also makes use of low-cost commercial parts, but is designed for operation in harsh environments.

75 FR 7031 - Xilinx, Inc., Albuquerque, NM; Notice of Affirmative Determination Regarding Application for...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-16

... DEPARTMENT OF LABOR Employment and Training Administration [TA-W-71,608] Xilinx, Inc., Albuquerque, NM; Notice of Affirmative Determination Regarding Application for Reconsideration By application... After careful review of the application, I conclude that the claim is of sufficient weight to justify...

FPGA based hardware optimized implementation of signal processing system for LFM pulsed radar

NASA Astrophysics Data System (ADS)

Azim, Noor ul; Jun, Wang

2016-11-01

Signal processing is one of the main parts of any radar system. Different signal processing algorithms are used to extract information about different parameters like range, speed, direction etc, of a target in the field of radar communication. This paper presents LFM (Linear Frequency Modulation) pulsed radar signal processing algorithms which are used to improve target detection, range resolution and to estimate the speed of a target. Firstly, these algorithms are simulated in MATLAB to verify the concept and theory. After the conceptual verification in MATLAB, the simulation is converted into implementation on hardware using Xilinx FPGA. Chosen FPGA is Xilinx Virtex-6 (XC6LVX75T). For hardware implementation pipeline optimization is adopted and also other factors are considered for resources optimization in the process of implementation. Focusing algorithms in this work for improving target detection, range resolution and speed estimation are hardware optimized fast convolution processing based pulse compression and pulse Doppler processing.

Single event upset susceptibility testing of the Xilinx Virtex II FPGA

NASA Technical Reports Server (NTRS)

Yui, C.; Swift, G.; Carmichael, C.

2002-01-01

Heavy ion testing of the Xilinx Virtex IZ was conducted on the configuration, block RAM and user flip flop cells to determine their single event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA is used to reveal L1/e values and single-event-functional interrupt failures.

High-performance reconfigurable hardware architecture for restricted Boltzmann machines.

PubMed

Ly, Daniel Le; Chow, Paul

2010-11-01

Despite the popularity and success of neural networks in research, the number of resulting commercial or industrial applications has been limited. A primary cause for this lack of adoption is that neural networks are usually implemented as software running on general-purpose processors. Hence, a hardware implementation that can exploit the inherent parallelism in neural networks is desired. This paper investigates how the restricted Boltzmann machine (RBM), which is a popular type of neural network, can be mapped to a high-performance hardware architecture on field-programmable gate array (FPGA) platforms. The proposed modular framework is designed to reduce the time complexity of the computations through heavily customized hardware engines. A method to partition large RBMs into smaller congruent components is also presented, allowing the distribution of one RBM across multiple FPGA resources. The framework is tested on a platform of four Xilinx Virtex II-Pro XC2VP70 FPGAs running at 100 MHz through a variety of different configurations. The maximum performance was obtained by instantiating an RBM of 256 × 256 nodes distributed across four FPGAs, which resulted in a computational speed of 3.13 billion connection-updates-per-second and a speedup of 145-fold over an optimized C program running on a 2.8-GHz Intel processor.

Malleable architecture generator for FPGA computing

NASA Astrophysics Data System (ADS)

Gokhale, Maya; Kaba, James; Marks, Aaron; Kim, Jang

1996-10-01

The malleable architecture generator (MARGE) is a tool set that translates high-level parallel C to configuration bit streams for field-programmable logic based computing systems. MARGE creates an application-specific instruction set and generates the custom hardware components required to perform exactly those computations specified by the C program. In contrast to traditional fixed-instruction processors, MARGE's dynamic instruction set creation provides for efficient use of hardware resources. MARGE processes intermediate code in which each operation is annotated by the bit lengths of the operands. Each basic block (sequence of straight line code) is mapped into a single custom instruction which contains all the operations and logic inherent in the block. A synthesis phase maps the operations comprising the instructions into register transfer level structural components and control logic which have been optimized to exploit functional parallelism and function unit reuse. As a final stage, commercial technology-specific tools are used to generate configuration bit streams for the desired target hardware. Technology- specific pre-placed, pre-routed macro blocks are utilized to implement as much of the hardware as possible. MARGE currently supports the Xilinx-based Splash-2 reconfigurable accelerator and National Semiconductor's CLAy-based parallel accelerator, MAPA. The MARGE approach has been demonstrated on systolic applications such as DNA sequence comparison.

Radiation effects and mitigation strategies for modern FPGAs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stettler, M. W.; Caffrey, M. P.; Graham, P. S.

2004-01-01

Field Programmable Gate Array devices have become the technology of choice in small volume modern instrumentation and control systems. These devices have always offered significant advantages in flexibility, and recent advances in fabrication have greatly increased logic capacity, substantially increasing the number of applications for this technology. Unfortunately, the increased density (and corresponding shrinkage of process geometry), has made these devices more susceptible to failure due to external radiation. This has been an issue for space based systems for some time, but is now becoming an issue for terrestrial systems in elevated radiation environments and commercial avionics as well. Characterizingmore » the failure modes of Xilinx FPGAs, and developing mitigation strategies is the subject of ongoing research by a consortium of academic, industrial, and governmental laboratories. This paper presents background information of radiation effects and failure modes, as well as current and future mitigation techniques. In particular, the availability of very large FPGA devices, complete with generous amounts of RAM and embedded processor(s), has led to the implementation of complete digital systems on a single device, bringing issues of system reliability and redundancy management to the chip level. Radiation effects on a single FPGA are increasingly likely to have system level consequences, and will need to be addressed in current and future designs.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Learn, Mark Walter

Sandia National Laboratories is currently developing new processing and data communication architectures for use in future satellite payloads. These architectures will leverage the flexibility and performance of state-of-the-art static-random-access-memory-based Field Programmable Gate Arrays (FPGAs). One such FPGA is the radiation-hardened version of the Virtex-5 being developed by Xilinx. However, not all features of this FPGA are being radiation-hardened by design and could still be susceptible to on-orbit upsets. One such feature is the embedded hard-core PPC440 processor. Since this processor is implemented in the FPGA as a hard-core, traditional mitigation approaches such as Triple Modular Redundancy (TMR) are not availablemore » to improve the processor's on-orbit reliability. The goal of this work is to investigate techniques that can help mitigate the embedded hard-core PPC440 processor within the Virtex-5 FPGA other than TMR. Implementing various mitigation schemes reliably within the PPC440 offers a powerful reconfigurable computing resource to these node-based processing architectures. This document summarizes the work done on the cache mitigation scheme for the embedded hard-core PPC440 processor within the Virtex-5 FPGAs, and describes in detail the design of the cache mitigation scheme and the testing conducted at the radiation effects facility on the Texas A&M campus.« less

An FPGA-Based Rapid Wheezing Detection System

PubMed Central

Lin, Bor-Shing; Yen, Tian-Shiue

2014-01-01

Wheezing is often treated as a crucial indicator in the diagnosis of obstructive pulmonary diseases. A rapid wheezing detection system may help physicians to monitor patients over the long-term. In this study, a portable wheezing detection system based on a field-programmable gate array (FPGA) is proposed. This system accelerates wheezing detection, and can be used as either a single-process system, or as an integrated part of another biomedical signal detection system. The system segments sound signals into 2-second units. A short-time Fourier transform was used to determine the relationship between the time and frequency components of wheezing sound data. A spectrogram was processed using 2D bilateral filtering, edge detection, multithreshold image segmentation, morphological image processing, and image labeling, to extract wheezing features according to computerized respiratory sound analysis (CORSA) standards. These features were then used to train the support vector machine (SVM) and build the classification models. The trained model was used to analyze sound data to detect wheezing. The system runs on a Xilinx Virtex-6 FPGA ML605 platform. The experimental results revealed that the system offered excellent wheezing recognition performance (0.912). The detection process can be used with a clock frequency of 51.97 MHz, and is able to perform rapid wheezing classification. PMID:24481034

Palmprint and face score level fusion: hardware implementation of a contactless small sample biometric system

NASA Astrophysics Data System (ADS)

Poinsot, Audrey; Yang, Fan; Brost, Vincent

2011-02-01

Including multiple sources of information in personal identity recognition and verification gives the opportunity to greatly improve performance. We propose a contactless biometric system that combines two modalities: palmprint and face. Hardware implementations are proposed on the Texas Instrument Digital Signal Processor and Xilinx Field-Programmable Gate Array (FPGA) platforms. The algorithmic chain consists of a preprocessing (which includes palm extraction from hand images), Gabor feature extraction, comparison by Hamming distance, and score fusion. Fusion possibilities are discussed and tested first using a bimodal database of 130 subjects that we designed (uB database), and then two common public biometric databases (AR for face and PolyU for palmprint). High performance has been obtained for recognition and verification purpose: a recognition rate of 97.49% with AR-PolyU database and an equal error rate of 1.10% on the uB database using only two training samples per subject have been obtained. Hardware results demonstrate that preprocessing can easily be performed during the acquisition phase, and multimodal biometric recognition can be treated almost instantly (0.4 ms on FPGA). We show the feasibility of a robust and efficient multimodal hardware biometric system that offers several advantages, such as user-friendliness and flexibility.

Bitstream decoding processor for fast entropy decoding of variable length coding-based multiformat videos

NASA Astrophysics Data System (ADS)

Jo, Hyunho; Sim, Donggyu

2014-06-01

We present a bitstream decoding processor for entropy decoding of variable length coding-based multiformat videos. Since most of the computational complexity of entropy decoders comes from bitstream accesses and table look-up process, the developed bitstream processing unit (BsPU) has several designated instructions to access bitstreams and to minimize branch operations in the table look-up process. In addition, the instruction for bitstream access has the capability to remove emulation prevention bytes (EPBs) of H.264/AVC without initial delay, repeated memory accesses, and additional buffer. Experimental results show that the proposed method for EPB removal achieves a speed-up of 1.23 times compared to the conventional EPB removal method. In addition, the BsPU achieves speed-ups of 5.6 and 3.5 times in entropy decoding of H.264/AVC and MPEG-4 Visual bitstreams, respectively, compared to an existing processor without designated instructions and a new table mapping algorithm. The BsPU is implemented on a Xilinx Virtex5 LX330 field-programmable gate array. The MPEG-4 Visual (ASP, Level 5) and H.264/AVC (Main Profile, Level 4) are processed using the developed BsPU with a core clock speed of under 250 MHz in real time.

An FPGA Platform for Real-Time Simulation of Spiking Neuronal Networks

PubMed Central

Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi

2017-01-01

In the last years, the idea to dynamically interface biological neurons with artificial ones has become more and more urgent. The reason is essentially due to the design of innovative neuroprostheses where biological cell assemblies of the brain can be substituted by artificial ones. For closed-loop experiments with biological neuronal networks interfaced with in silico modeled networks, several technological challenges need to be faced, from the low-level interfacing between the living tissue and the computational model to the implementation of the latter in a suitable form for real-time processing. Field programmable gate arrays (FPGAs) can improve flexibility when simple neuronal models are required, obtaining good accuracy, real-time performance, and the possibility to create a hybrid system without any custom hardware, just programming the hardware to achieve the required functionality. In this paper, this possibility is explored presenting a modular and efficient FPGA design of an in silico spiking neural network exploiting the Izhikevich model. The proposed system, prototypically implemented on a Xilinx Virtex 6 device, is able to simulate a fully connected network counting up to 1,440 neurons, in real-time, at a sampling rate of 10 kHz, which is reasonable for small to medium scale extra-cellular closed-loop experiments. PMID:28293163

A 4.2 ps Time-Interval RMS Resolution Time-to-Digital Converter Using a Bin Decimation Method in an UltraScale FPGA

NASA Astrophysics Data System (ADS)

Wang, Yonggang; Liu, Chong

2016-10-01

The common solution for a field programmable gate array (FPGA)-based time-to-digital converter (TDC) is constructing a tapped delay line (TDL) for time interpolation to yield a sub-clock time resolution. The granularity and uniformity of the delay elements of TDL determine the TDC time resolution. In this paper, we propose a dual-sampling TDL architecture and a bin decimation method that could make the delay elements as small and uniform as possible, so that the implemented TDCs can achieve a high time resolution beyond the intrinsic cell delay. Two identical full hardware-based TDCs were implemented in a Xilinx UltraScale FPGA for performance evaluation. For fixed time intervals in the range from 0 to 440 ns, the average time-interval RMS resolution is measured by the two TDCs with 4.2 ps, thus the timestamp resolution of single TDC is derived as 2.97 ps. The maximum hit rate of the TDC is as high as half the system clock rate of FPGA, namely 250 MHz in our demo prototype. Because the conventional online bin-by-bin calibration is not needed, the implementation of the proposed TDC is straightforward and relatively resource-saving.

Open Component Portability Infrastructure (OPENCPI)

DTIC Science & Technology

2009-11-01

Disk Drive 7 1 www.antec.com P182 $120. ATX Mid Tower Computer Case 8 1 www.xilinx.com HW-V5-ML555-G $2200. Xilinx ML555 V5 Dev Kit Notes: Cost...s/ GEORGE RAMSEYER EDWARD J. JONES, Deputy Chief Work Unit Manager Advanced Computing ...uniquely positioned to meet the goals of the Software Systems Stockroom (S3) since in some sense component-based systems are computer -science’s

Generation of Custom DSP Transform IP Cores: Case Study Walsh-Hadamard Transform

DTIC Science & Technology

2002-09-01

mathematics and hardware design What I know: Finite state machine Pipelining Systolic array … What I know: Linear algebra Digital signal processing...state machine Pipelining Systolic array … What I know: Linear algebra Digital signal processing Adaptive filter theory … A math guy A hardware engineer...Synthesis Technology Libary Bit-width (8) HF factor (1,2,3,6) VF factor (1,2,4, ... 32) Xilinx FPGA Place&Route Xilinx FPGA Place&Route Performance

Aeroflex Technology as Class-Y Demonstrator

NASA Technical Reports Server (NTRS)

Suh, Jong-ook; Agarwal, Shri; Popelar, Scott

2014-01-01

Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.

Single event upset suspectibility testing of the Xilinx Virtex II FPGA

NASA Technical Reports Server (NTRS)

Carmichael, C.; Swift, C.; Yui, G.

2002-01-01

Heavy ion testing of the Xilinx Virtex II was conducted on the configuration, block RAM and user flip flop cells to determine their static single-event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA was used to reveal L1/e, values (the LET at which the cross section is l/e times the saturation cross-section) and single-event functional-interrupt failures.

In-situ FPGA debug driven by on-board microcontroller

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baker, Zachary Kent

2009-01-01

Often we are faced with the situation that the behavior of a circuit changes in an unpredictable way when chassis cover is attached or the system is not easily accessible. For instance, in a deployed environment, such as space, hardware can malfunction in unpredictable ways. What can a designer do to ascertain the cause of the problem? Register interrogations only go so far, and sometimes the problem being debugged is register transactions themselves, or the problem lies in FPGA programming. This work provides a solution to this; namely, the ability to drive a JTAG chain via an on-board microcontroller andmore » use a simple clone of the Xilinx Chipscope core without a Xilinx JTAG cable or any external interfaces required. We have demonstrated the functionality of the prototype system using a Xilinx Spartan 3E FPGA and a Microchip PIC18j2550 microcontroller. This paper will discuss the implementation details as well as present case studies describing how the tools have aided satellite hardware development.« less

Video rate morphological processor based on a redundant number representation

NASA Astrophysics Data System (ADS)

Kuczborski, Wojciech; Attikiouzel, Yianni; Crebbin, Gregory A.

1992-03-01

This paper presents a video rate morphological processor for automated visual inspection of printed circuit boards, integrated circuit masks, and other complex objects. Inspection algorithms are based on gray-scale mathematical morphology. Hardware complexity of the known methods of real-time implementation of gray-scale morphology--the umbra transform and the threshold decomposition--has prompted us to propose a novel technique which applied an arithmetic system without carrying propagation. After considering several arithmetic systems, a redundant number representation has been selected for implementation. Two options are analyzed here. The first is a pure signed digit number representation (SDNR) with the base of 4. The second option is a combination of the base-2 SDNR (to represent gray levels of images) and the conventional twos complement code (to represent gray levels of structuring elements). Operation principle of the morphological processor is based on the concept of the digit level systolic array. Individual processing units and small memory elements create a pipeline. The memory elements store current image windows (kernels). All operation primitives of processing units apply a unified direction of digit processing: most significant digit first (MSDF). The implementation technology is based on the field programmable gate arrays by Xilinx. This paper justified the rationality of a new approach to logic design, which is the decomposition of Boolean functions instead of Boolean minimization.

Extending the IEEE 802.15.4 Security Suite with a Compact Implementation of the NIST P-192/B-163 Elliptic Curves

PubMed Central

de la Piedra, Antonio; Braeken, An; Touhafi, Abdellah

2013-01-01

Typically, commercial sensor nodes are equipped with MCUsclocked at a low-frequency (i.e., within the 4–12 MHz range). Consequently, executing cryptographic algorithms in those MCUs generally requires a huge amount of time. In this respect, the required energy consumption can be higher than using a separate accelerator based on a Field-programmable Gate Array (FPGA) that is switched on when needed. In this manuscript, we present the design of a cryptographic accelerator suitable for an FPGA-based sensor node and compliant with the IEEE802.15.4 standard. All the embedded resources of the target platform (Xilinx Artix-7) have been maximized in order to provide a cost-effective solution. Moreover, we have added key negotiation capabilities to the IEEE 802.15.4 security suite based on Elliptic Curve Cryptography (ECC;. Our results suggest that tailored accelerators based on FPGA can behave better in terms of energy than contemporary software solutions for motes, such as the TinyECC and NanoECC libraries. In this regard, a point multiplication (PM) can be performed between 8.58- and 15.4-times faster, 3.40- to 23.59-times faster (Elliptic Curve Diffie-Hellman, ECDH) and between 5.45- and 34.26-times faster (Elliptic Curve Integrated Encryption Scheme, ECIES). Moreover, the energy consumption was also improved with a factor of 8.96 (PM). PMID:23899936

Area and power efficient DCT architecture for image compression

NASA Astrophysics Data System (ADS)

Dhandapani, Vaithiyanathan; Ramachandran, Seshasayanan

2014-12-01

The discrete cosine transform (DCT) is one of the major components in image and video compression systems. The final output of these systems is interpreted by the human visual system (HVS), which is not perfect. The limited perception of human visualization allows the algorithm to be numerically approximate rather than exact. In this paper, we propose a new matrix for discrete cosine transform. The proposed 8 × 8 transformation matrix contains only zeros and ones which requires only adders, thus avoiding the need for multiplication and shift operations. The new class of transform requires only 12 additions, which highly reduces the computational complexity and achieves a performance in image compression that is comparable to that of the existing approximated DCT. Another important aspect of the proposed transform is that it provides an efficient area and power optimization while implementing in hardware. To ensure the versatility of the proposal and to further evaluate the performance and correctness of the structure in terms of speed, area, and power consumption, the model is implemented on Xilinx Virtex 7 field programmable gate array (FPGA) device and synthesized with Cadence® RTL Compiler® using UMC 90 nm standard cell library. The analysis obtained from the implementation indicates that the proposed structure is superior to the existing approximation techniques with a 30% reduction in power and 12% reduction in area.

A Front-End Electronics Prototype Based on Gigabit Ethernet for the ATLAS Small-Strip Thin Gap Chamber

NASA Astrophysics Data System (ADS)

Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Wang, Xinxin; Geng, Tianru; Yang, Hang; Liu, Shengquan; Han, Liang; Jin, Ge

2017-06-01

A front-end electronics prototype for the ATLAS small-strip Thin Gap Chamber (sTGC) based on gigabit Ethernet has been developed. The prototype is designed to read out signals of pads, wires, and strips of the sTGC detector. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 field-programmable gate array (FPGA) used for the VMM2 configuration and the events storage, and a gigabit Ethernet transceiver PHY chip for interfacing with a computer. The VMM2 chip is designed for the readout of the Micromegas detector and sTGC detector, which is composed of 64 linear front-end channels. Each channel integrates a charge-sensitive amplifier, a shaper, several analog-to-digital converters, and other digital functions. For a bunch-crossing interval of 25 ns, events are continuously read out by the FPGA and forwarded to the computer. The interface between the computer and the prototype has been measured to reach an error-free rate of 900 Mb/s, therefore making a very effective use of the available bandwidth. Additionally, the computer can control several prototypes of this kind simultaneously via the Ethernet interface. At present, the prototype will be used for the sTGC performance test. The features of the prototype are described in detail.

Commodity cluster and hardware-based massively parallel implementations of hyperspectral imaging algorithms

NASA Astrophysics Data System (ADS)

Plaza, Antonio; Chang, Chein-I.; Plaza, Javier; Valencia, David

2006-05-01

The incorporation of hyperspectral sensors aboard airborne/satellite platforms is currently producing a nearly continual stream of multidimensional image data, and this high data volume has soon introduced new processing challenges. The price paid for the wealth spatial and spectral information available from hyperspectral sensors is the enormous amounts of data that they generate. Several applications exist, however, where having the desired information calculated quickly enough for practical use is highly desirable. High computing performance of algorithm analysis is particularly important in homeland defense and security applications, in which swift decisions often involve detection of (sub-pixel) military targets (including hostile weaponry, camouflage, concealment, and decoys) or chemical/biological agents. In order to speed-up computational performance of hyperspectral imaging algorithms, this paper develops several fast parallel data processing techniques. Techniques include four classes of algorithms: (1) unsupervised classification, (2) spectral unmixing, and (3) automatic target recognition, and (4) onboard data compression. A massively parallel Beowulf cluster (Thunderhead) at NASA's Goddard Space Flight Center in Maryland is used to measure parallel performance of the proposed algorithms. In order to explore the viability of developing onboard, real-time hyperspectral data compression algorithms, a Xilinx Virtex-II field programmable gate array (FPGA) is also used in experiments. Our quantitative and comparative assessment of parallel techniques and strategies may help image analysts in selection of parallel hyperspectral algorithms for specific applications.

FPGA in-the-loop simulations of cardiac excitation model under voltage clamp conditions

NASA Astrophysics Data System (ADS)

Othman, Norliza; Adon, Nur Atiqah; Mahmud, Farhanahani

2017-01-01

Voltage clamp technique allows the detection of single channel currents in biological membranes in identifying variety of electrophysiological problems in the cellular level. In this paper, a simulation study of the voltage clamp technique has been presented to analyse current-voltage (I-V) characteristics of ion currents based on Luo-Rudy Phase-I (LR-I) cardiac model by using a Field Programmable Gate Array (FPGA). Nowadays, cardiac models are becoming increasingly complex which can cause a vast amount of time to run the simulation. Thus, a real-time hardware implementation using FPGA could be one of the best solutions for high-performance real-time systems as it provides high configurability and performance, and able to executes in parallel mode operation. For shorter time development while retaining high confidence results, FPGA-based rapid prototyping through HDL Coder from MATLAB software has been used to construct the algorithm for the simulation system. Basically, the HDL Coder is capable to convert the designed MATLAB Simulink blocks into hardware description language (HDL) for the FPGA implementation. As a result, the voltage-clamp fixed-point design of LR-I model has been successfully conducted in MATLAB Simulink and the simulation of the I-V characteristics of the ionic currents has been verified on Xilinx FPGA Virtex-6 XC6VLX240T development board through an FPGA-in-the-loop (FIL) simulation.

Extending the IEEE 802.15.4 security suite with a compact implementation of the NIST P-192/B-163 elliptic curves.

PubMed

de la Piedra, Antonio; Braeken, An; Touhafi, Abdellah

2013-07-29

Typically, commercial sensor nodes are equipped with MCUsclocked at a low-frequency (i.e., within the 4-12 MHz range). Consequently, executing cryptographic algorithms in those MCUs generally requires a huge amount of time. In this respect, the required energy consumption can be higher than using a separate accelerator based on a Field-programmable Gate Array (FPGA) that is switched on when needed. In this manuscript, we present the design of a cryptographic accelerator suitable for an FPGA-based sensor node and compliant with the IEEE802.15.4 standard. All the embedded resources of the target platform (Xilinx Artix-7) have been maximized in order to provide a cost-effective solution. Moreover, we have added key negotiation capabilities to the IEEE 802.15.4 security suite based on Elliptic Curve Cryptography (ECC). Our results suggest that tailored accelerators based on FPGA can behave better in terms of energy than contemporary software solutions for motes, such as the TinyECC and NanoECC libraries. In this regard, a point multiplication (PM) can be performed between 8.58- and 15.4-times faster, 3.40- to 23.59-times faster (Elliptic Curve Diffie-Hellman, ECDH) and between 5.45- and 34.26-times faster (Elliptic Curve Integrated Encryption Scheme, ECIES). Moreover, the energy consumption was also improved with a factor of 8.96 (PM).

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

NASA Technical Reports Server (NTRS)

Petrick, Dave

2014-01-01

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

A memory efficient implementation scheme of Gauss error function in a Laguerre-Volterra network for neuroprosthetic devices

NASA Astrophysics Data System (ADS)

Li, Will X. Y.; Cui, Ke; Zhang, Wei

2017-04-01

Cognitive neural prosthesis is a manmade device which can be used to restore or compensate for lost human cognitive modalities. The generalized Laguerre-Volterra (GLV) network serves as a robust mathematical underpinning for the development of such prosthetic instrument. In this paper, a hardware implementation scheme of Gauss error function for the GLV network targeting reconfigurable platforms is reported. Numerical approximations are formulated which transform the computation of nonelementary function into combinational operations of elementary functions, and memory-intensive look-up table (LUT) based approaches can therefore be circumvented. The computational precision can be made adjustable with the utilization of an error compensation scheme, which is proposed based on the experimental observation of the mathematical characteristics of the error trajectory. The precision can be further customizable by exploiting the run-time characteristics of the reconfigurable system. Compared to the polynomial expansion based implementation scheme, the utilization of slice LUTs, occupied slices, and DSP48E1s on a Xilinx XC6VLX240T field-programmable gate array has decreased by 94.2%, 94.1%, and 90.0%, respectively. While compared to the look-up table based scheme, 1.0 ×1017 bits of storage can be spared under the maximum allowable error of 1.0 ×10-3 . The proposed implementation scheme can be employed in the study of large-scale neural ensemble activity and in the design and development of neural prosthetic device.

RFI Risk Reduction Activities Using New Goddard Digital Radiometry Capabilities

NASA Technical Reports Server (NTRS)

Bradley, Damon; Kim, Ed; Young, Peter; Miles, Lynn; Wong, Mark; Morris, Joel

2012-01-01

The Goddard Radio-Frequency Explorer (GREX) is the latest fast-sampling radiometer digital back-end processor that will be used for radiometry and radio-frequency interference (RFI) surveying at Goddard Space Flight Center. The system is compact and deployable, with a mass of about 40 kilograms. It is intended to be flown on aircraft. GREX is compatible with almost any aircraft, including P-3, twin otter, C-23, C-130, G3, and G5 types. At a minimum, the system can function as a clone of the Soil Moisture Active Passive (SMAP) ground-based development unit [1], or can be a completely independent system that is interfaced to any radiometer, provided that frequency shifting to GREX's intermediate frequency is performed prior to sampling. If the radiometer RF is less than 200MHz, then the band can be sampled and acquired directly by the system. A key feature of GREX is its ability to simultaneously sample two polarization channels simultaneously at up to 400MSPS, 14-bit resolution each. The sampled signals can be recorded continuously to a 23 TB solid-state RAID storage array. Data captures can be analyzed offline using the supercomputing facilities at Goddard Space Flight Center. In addition, various Field Programmable Gate Array (FPGA) - amenable radiometer signal processing and RFI detection algorithms can be implemented directly on the GREX system because it includes a high-capacity Xilinx Virtex-5 FPGA prototyping system that is user customizable.

All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement.

PubMed

Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

2016-01-30

This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of -20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system.

All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement

PubMed Central

Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

2016-01-01

This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of −20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system. PMID:26840316

FPGA implementation of sparse matrix algorithm for information retrieval

NASA Astrophysics Data System (ADS)

Bojanic, Slobodan; Jevtic, Ruzica; Nieto-Taladriz, Octavio

2005-06-01

Information text data retrieval requires a tremendous amount of processing time because of the size of the data and the complexity of information retrieval algorithms. In this paper the solution to this problem is proposed via hardware supported information retrieval algorithms. Reconfigurable computing may adopt frequent hardware modifications through its tailorable hardware and exploits parallelism for a given application through reconfigurable and flexible hardware units. The degree of the parallelism can be tuned for data. In this work we implemented standard BLAS (basic linear algebra subprogram) sparse matrix algorithm named Compressed Sparse Row (CSR) that is showed to be more efficient in terms of storage space requirement and query-processing timing over the other sparse matrix algorithms for information retrieval application. Although inverted index algorithm is treated as the de facto standard for information retrieval for years, an alternative approach to store the index of text collection in a sparse matrix structure gains more attention. This approach performs query processing using sparse matrix-vector multiplication and due to parallelization achieves a substantial efficiency over the sequential inverted index. The parallel implementations of information retrieval kernel are presented in this work targeting the Virtex II Field Programmable Gate Arrays (FPGAs) board from Xilinx. A recent development in scientific applications is the use of FPGA to achieve high performance results. Computational results are compared to implementations on other platforms. The design achieves a high level of parallelism for the overall function while retaining highly optimised hardware within processing unit.

Field Programmable Gate Array Based Parallel Strapdown Algorithm Design for Strapdown Inertial Navigation Systems

PubMed Central

Li, Zong-Tao; Wu, Tie-Jun; Lin, Can-Long; Ma, Long-Hua

2011-01-01

A new generalized optimum strapdown algorithm with coning and sculling compensation is presented, in which the position, velocity and attitude updating operations are carried out based on the single-speed structure in which all computations are executed at a single updating rate that is sufficiently high to accurately account for high frequency angular rate and acceleration rectification effects. Different from existing algorithms, the updating rates of the coning and sculling compensations are unrelated with the number of the gyro incremental angle samples and the number of the accelerometer incremental velocity samples. When the output sampling rate of inertial sensors remains constant, this algorithm allows increasing the updating rate of the coning and sculling compensation, yet with more numbers of gyro incremental angle and accelerometer incremental velocity in order to improve the accuracy of system. Then, in order to implement the new strapdown algorithm in a single FPGA chip, the parallelization of the algorithm is designed and its computational complexity is analyzed. The performance of the proposed parallel strapdown algorithm is tested on the Xilinx ISE 12.3 software platform and the FPGA device XC6VLX550T hardware platform on the basis of some fighter data. It is shown that this parallel strapdown algorithm on the FPGA platform can greatly decrease the execution time of algorithm to meet the real-time and high precision requirements of system on the high dynamic environment, relative to the existing implemented on the DSP platform. PMID:22164058

Fast and Adaptive Lossless On-Board Hyperspectral Data Compression System for Space Applications

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Bakhshi, Alireza; Keymeulen, Didier; Klimesh, Matthew

2009-01-01

Efficient on-board lossless hyperspectral data compression reduces the data volume necessary to meet NASA and DoD limited downlink capabilities. The techniques also improves signature extraction, object recognition and feature classification capabilities by providing exact reconstructed data on constrained downlink resources. At JPL a novel, adaptive and predictive technique for lossless compression of hyperspectral data was recently developed. This technique uses an adaptive filtering method and achieves a combination of low complexity and compression effectiveness that far exceeds state-of-the-art techniques currently in use. The JPL-developed 'Fast Lossless' algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. It is of low computational complexity and thus well-suited for implementation in hardware, which makes it practical for flight implementations of pushbroom instruments. A prototype of the compressor (and decompressor) of the algorithm is available in software, but this implementation may not meet speed and real-time requirements of some space applications. Hardware acceleration provides performance improvements of 10x-100x vs. the software implementation (about 1M samples/sec on a Pentium IV machine). This paper describes a hardware implementation of the JPL-developed 'Fast Lossless' compression algorithm on a Field Programmable Gate Array (FPGA). The FPGA implementation targets the current state of the art FPGAs (Xilinx Virtex IV and V families) and compresses one sample every clock cycle to provide a fast and practical real-time solution for Space applications.

Hardware Implementation of Lossless Adaptive and Scalable Hyperspectral Data Compression for Space

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Keymeulen, Didier; Bakhshi, Alireza; Klimesh, Matthew

2009-01-01

On-board lossless hyperspectral data compression reduces data volume in order to meet NASA and DoD limited downlink capabilities. The technique also improves signature extraction, object recognition and feature classification capabilities by providing exact reconstructed data on constrained downlink resources. At JPL a novel, adaptive and predictive technique for lossless compression of hyperspectral data was recently developed. This technique uses an adaptive filtering method and achieves a combination of low complexity and compression effectiveness that far exceeds state-of-the-art techniques currently in use. The JPL-developed 'Fast Lossless' algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. It is of low computational complexity and thus well-suited for implementation in hardware. A modified form of the algorithm that is better suited for data from pushbroom instruments is generally appropriate for flight implementation. A scalable field programmable gate array (FPGA) hardware implementation was developed. The FPGA implementation achieves a throughput performance of 58 Msamples/sec, which can be increased to over 100 Msamples/sec in a parallel implementation that uses twice the hardware resources This paper describes the hardware implementation of the 'Modified Fast Lossless' compression algorithm on an FPGA. The FPGA implementation targets the current state-of-the-art FPGAs (Xilinx Virtex IV and V families) and compresses one sample every clock cycle to provide a fast and practical real-time solution for space applications.

A 3.9 ps Time-Interval RMS Precision Time-to-Digital Converter Using a Dual-Sampling Method in an UltraScale FPGA

NASA Astrophysics Data System (ADS)

Wang, Yonggang; Liu, Chong

2016-10-01

Field programmable gate arrays (FPGAs) manufactured with more advanced processing technology have faster carry chains and smaller delay elements, which are favorable for the design of tapped delay line (TDL)-style time-to-digital converters (TDCs) in FPGA. However, new challenges are posed in using them to implement TDCs with a high time precision. In this paper, we propose a bin realignment method and a dual-sampling method for TDC implementation in a Xilinx UltraScale FPGA. The former realigns the disordered time delay taps so that the TDC precision can approach the limit of its delay granularity, while the latter doubles the number of taps in the delay line so that the TDC precision beyond the cell delay limitation can be expected. Two TDC channels were implemented in a Kintex UltraScale FPGA, and the effectiveness of the new methods was evaluated. For fixed time intervals in the range from 0 to 440 ns, the average RMS precision measured by the two TDC channels reaches 5.8 ps using the bin realignment, and it further improves to 3.9 ps by using the dual-sampling method. The time precision has a 5.6% variation in the measured temperature range. Every part of the TDC, including dual-sampling, encoding, and on-line calibration, could run at a 500 MHz clock frequency. The system measurement dead time is only 4 ns.

The characterization and application of a low resource FPGA-based time to digital converter

NASA Astrophysics Data System (ADS)

Balla, Alessandro; Mario Beretta, Matteo; Ciambrone, Paolo; Gatta, Maurizio; Gonnella, Francesco; Iafolla, Lorenzo; Mascolo, Matteo; Messi, Roberto; Moricciani, Dario; Riondino, Domenico

2014-03-01

Time to Digital Converters (TDCs) are very common devices in particles physics experiments. A lot of "off-the-shelf" TDCs can be employed but the necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the architectures developed so far are based on the tapped delay lines with precision down to 10 ps, obtained with high FPGA resources usage and non-linearity issues to be managed. Often such precision is not necessary; in this case TDC architectures with low resources occupancy are preferable allowing the implementation of data processing systems and of other utilities on the same device. In order to reconstruct γγ physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a 32 channel TDC with a precision of 255 ps and low non-linearity effects along with an embedded data acquisition system and the interface to the online FARM of KLOE-2. The TDC is based on a low resources occupancy technique: the 4×Oversampling technique which, in this work, is pushed to its best resolution and its performances were exhaustively measured.

FPGA implementation of adaptive beamforming in hearing aids.

PubMed

Samtani, Kartik; Thomas, Jobin; Varma, G Abhinav; Sumam, David S; Deepu, S P

2017-07-01

Beamforming is a spatial filtering technique used in hearing aids to improve target sound reception by reducing interference from other directions. In this paper we propose improvements in an existing architecture present for two omnidirectional microphone array based adaptive beamforming for hearing aid applications and implement the same on Xilinx Artix 7 FPGA using VHDL coding and Xilinx Vivado ® 2015.2. The nulls are introduced in particular directions by combination of two fixed polar patterns. This combination can be adaptively controlled to steer the null in the direction of noise. The beamform patterns and improvements in SNR values obtained from experiments in a conference room environment are analyzed.

A FPGA-based Measurement System for Nonvolatile Semiconductor Memory Characterization

NASA Astrophysics Data System (ADS)

Bu, Jiankang; White, Marvin

2002-03-01

Low voltage, long retention, high density SONOS nonvolatile semiconductor memory (NVSM) devices are ideally suited for PCMCIA, FLASH and 'smart' cards. The SONOS memory transistor requires characterization with an accurate, rapid measurement system with minimum disturbance to the device. The FPGA-based measurement system includes three parts: 1) a pattern generator implemented with XILINX FPGAs and corresponding software, 2) a high-speed, constant-current, threshold voltage detection circuit, 3) and a data evaluation program, implemented with a LABVIEW program. Fig. 1 shows the general block diagram of the FPGA-based measurement system. The function generator is designed and simulated with XILINX Foundation Software. Under the control of the specific erase/write/read pulses, the analog detect circuit applies operational modes to the SONOS device under test (DUT) and determines the change of the memory-state of the SONOS nonvolatile memory transistor. The TEK460 digitizes the analog threshold voltage output and sends to the PC computer. The data is filtered and averaged with a LABVIEWTM program running on the PC computer and displayed on the monitor in real time. We have implemented the pattern generator with XILINX FPGAs. Fig. 2 shows the block diagram of the pattern generator. We realized the logic control by a method of state machine design. Fig. 3 shows a small part of the state machine. The flexibility of the FPGAs enhances the capabilities of this system and allows measurement variations without hardware changes. The characterization of the nonvolatile memory transistor device under test (DUT), as function of programming voltage and time, is achieved by a high-speed, constant-current threshold voltage detection circuit. The analog detection circuit incorporating fast analog switches controlled digitally with the FPGAs. The schematic circuit diagram is shown in Fig. 4. The various operational modes for the DUT are realized with control signals applied to the analog switches (SW) as shown in Fig. 5. A LABVIEWTM program, on a PC platform, collects and processes the data. The data is displayed on the monitor in real time. This time-domain filtering reduces the digitizing error. Fig. 6 shows the data processing. SONOS nonvolatile semiconductor memories are characterized by erase/write, retention and endurance measurements. Fig. 7 shows the erase/write characteristics of an n-Channel, 5V prog-rammable SONOS memory transistor. Fig.8 shows the retention characteristic of the same SONOS transistor. We have used this system to characterize SONOS nonvolatile semiconductor memory transistors. The attractive features of the test system design lies in the cost-effectiveness and flexibility of the test pattern implementation, fast read-out of memory state, low power, high precision determination of the device threshold voltage, and perhaps most importantly, minimum disturbance, which is indispensable for nonvolatile memory characterization.

FPGA implemented testbed in 8-by-8 and 2-by-2 OFDM-MIMO channel estimation and design of baseband transceiver.

PubMed

Ramesh, S; Seshasayanan, R

2016-01-01

In this study, a baseband OFDM-MIMO framework with channel timing and estimation synchronization is composed and executed utilizing the FPGA innovation. The framework is prototyped in light of the IEEE 802.11a standard and the signals transmitted and received utilizing a data transmission of 20 MHz. With the assistance of the QPSK tweak, the framework can accomplish a throughput of 24 Mbps. Besides, the LS formula is executed and the estimation of a frequency-specific fading channel is illustrated. For the rough estimation of timing, MNC plan is examined and actualized. Above all else, the whole framework is demonstrated in MATLAB and a drifting point model is set up. At that point, the altered point model is made with the assistance of Simulink and Xilinx's System Generator for DSP. In this way, the framework is incorporated and actualized inside of Xilinx's ISE tools and focused to Xilinx Virtex 5 board. In addition, an equipment co-simulation is contrived to decrease the preparing time while figuring the BER of the fixed point model. The work concentrates on above all else venture for further examination of planning creative channel estimation strategies towards applications in the fourth era (4G) mobile correspondence frameworks.

FPGA-accelerated adaptive optics wavefront control

NASA Astrophysics Data System (ADS)

Mauch, S.; Reger, J.; Reinlein, C.; Appelfelder, M.; Goy, M.; Beckert, E.; Tünnermann, A.

2014-03-01

The speed of real-time adaptive optical systems is primarily restricted by the data processing hardware and computational aspects. Furthermore, the application of mirror layouts with increasing numbers of actuators reduces the bandwidth (speed) of the system and, thus, the number of applicable control algorithms. This burden turns out a key-impediment for deformable mirrors with continuous mirror surface and highly coupled actuator influence functions. In this regard, specialized hardware is necessary for high performance real-time control applications. Our approach to overcome this challenge is an adaptive optics system based on a Shack-Hartmann wavefront sensor (SHWFS) with a CameraLink interface. The data processing is based on a high performance Intel Core i7 Quadcore hard real-time Linux system. Employing a Xilinx Kintex-7 FPGA, an own developed PCie card is outlined in order to accelerate the analysis of a Shack-Hartmann Wavefront Sensor. A recently developed real-time capable spot detection algorithm evaluates the wavefront. The main features of the presented system are the reduction of latency and the acceleration of computation For example, matrix multiplications which in general are of complexity O(n3 are accelerated by using the DSP48 slices of the field-programmable gate array (FPGA) as well as a novel hardware implementation of the SHWFS algorithm. Further benefits are the Streaming SIMD Extensions (SSE) which intensively use the parallelization capability of the processor for further reducing the latency and increasing the bandwidth of the closed-loop. Due to this approach, up to 64 actuators of a deformable mirror can be handled and controlled without noticeable restriction from computational burdens.

TOT measurement implemented in FPGA TDC

NASA Astrophysics Data System (ADS)

Fan, Huan-Huan; Cao, Ping; Liu, Shu-Bin; An, Qi

2015-11-01

Time measurement plays a crucial role for the purpose of particle identification in high energy physics experiments. With increasingly demanding physics goals and the development of electronics, modern time measurement systems need to meet the requirement of excellent resolution specification as well as high integrity. Based on Field Programmable Gate Arrays (FPGAs), FPGA time-to-digital converters (TDCs) have become one of the most mature and prominent time measurement methods in recent years. For correcting the time-walk effect caused by leading timing, a time-over-threshold (TOT) measurement should be added to the FPGA TDC. TOT can be obtained by measuring the interval between the signal leading and trailing edges. Unfortunately, a traditional TDC can recognize only one kind of signal edge, the leading or the trailing. Generally, to measure the interval, two TDC channels need to be used at the same time, one for leading, the other for trailing. However, this method unavoidably increases the amount of FPGA resources used and reduces the TDC's integrity. This paper presents one method of TOT measurement implemented in a Xilinx Virtex-5 FPGA. In this method, TOT measurement can be achieved using only one TDC input channel. The consumed resources and time resolution can both be guaranteed. Testing shows that this TDC can achieve resolution better than 15ps for leading edge measurement and 37 ps for TOT measurement. Furthermore, the TDC measurement dead time is about two clock cycles, which makes it good for applications with higher physics event rates. Supported by National Natural Science Foundation of China (11079003, 10979003)

Integration of the Reconfigurable Self-Healing eDNA Architecture in an Embedded System

NASA Technical Reports Server (NTRS)

Boesen, Michael Reibel; Keymeulen, Didier; Madsen, Jan; Lu, Thomas; Chao, Tien-Hsin

2011-01-01

In this work we describe the first real world case study for the self-healing eDNA (electronic DNA) architecture by implementing the control and data processing of a Fourier Transform Spectrometer (FTS) on an eDNA prototype. For this purpose the eDNA prototype has been ported from a Xilinx Virtex 5 FPGA to an embedded system consisting of a PowerPC and a Xilinx Virtex 5 FPGA. The FTS instrument features a novel liquid crystal waveguide, which consequently eliminates all moving parts from the instrument. The addition of the eDNA architecture to do the control and data processing has resulted in a highly fault-tolerant FTS instrument. The case study has shown that the early stage prototype of the autonomous self-healing eDNA architecture is expensive in terms of execution time.

Virtex-II Pro PowerPC SEE Characterization Test Methods and Results

NASA Technical Reports Server (NTRS)

Petrick, David; Powell, Wesley; LaBel, Ken; Howard, James

2005-01-01

The Xilinx Vix-11 Pro is a platform FPGA that embeds multiple microprocessors within the fabric of an SRAM-based reprogrammable FPGA. The variety and quantity of resources provided by this family of devices make them very attractive for spaceflight applications. However,these devices will be susceptible to single event effects (SEE), which must be mitigated. Observations from prior testing of the Xilinx Virtex-II Pro suggest that the PowerPC core has significant vulnerability to SEES. However, these initial tests were not designed to exclusively target the functionality of the PowerPC, therefore making it difficult to distinguish processor upsets from fabric upsets. The main focus of this paper involves detailed SEE testing of the embedded PowerPC core. Due to the complexity of the PowerPC, various custom test applications, both static and dynamic, will be designed to isolate each Unit of the processor. Collective analysis of the test results will provide insight into the exact upset mechanism of the PowerPC. With this information, mitigations schemes can be developed and tested that address the specific susceptibilities of these devices. The test bed will be the Xilinx SEE Consortium Virtex-II Pro test board, which allows for configuration scrubbing, design triplication, and ease of data collection. Testing will be performed at the Indiana University Cyclotron Facility using protons of varying energy levels and fluencies. This paper will present the detailed test approach along with the results.

CoNNeCT Baseband Processor Module Boot Code SoftWare (BCSW)

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K.; Orozco, David S.; Byrne, D. J.; Allen, Steven J.; Sahasrabudhe, Adit; Lang, Minh

2012-01-01

This software provides essential startup and initialization routines for the CoNNeCT baseband processor module (BPM) hardware upon power-up. A command and data handling (C&DH) interface is provided via 1553 and diagnostic serial interfaces to invoke operational, reconfiguration, and test commands within the code. The BCSW has features unique to the hardware it is responsible for managing. In this case, the CoNNeCT BPM is configured with an updated CPU (Atmel AT697 SPARC processor) and a unique set of memory and I/O peripherals that require customized software to operate. These features include configuration of new AT697 registers, interfacing to a new HouseKeeper with a flash controller interface, a new dual Xilinx configuration/scrub interface, and an updated 1553 remote terminal (RT) core. The BCSW is intended to provide a "safe" mode for the BPM when initially powered on or when an unexpected trap occurs, causing the processor to reset. The BCSW allows the 1553 bus controller in the spacecraft or payload controller to operate the BPM over 1553 to upload code; upload Xilinx bit files; perform rudimentary tests; read, write, and copy the non-volatile flash memory; and configure the Xilinx interface. Commands also exist over 1553 to cause the CPU to jump or call a specified address to begin execution of user-supplied code. This may be in the form of a real-time operating system, test routine, or specific application code to run on the BPM.

Real-Time Spaceborne Synthetic Aperture Radar Float-Point Imaging System Using Optimized Mapping Methodology and a Multi-Node Parallel Accelerating Technique

PubMed Central

Li, Bingyi; Chen, Liang; Yu, Wenyue; Xie, Yizhuang; Bian, Mingming; Zhang, Qingjun; Pang, Long

2018-01-01

With the development of satellite load technology and very large-scale integrated (VLSI) circuit technology, on-board real-time synthetic aperture radar (SAR) imaging systems have facilitated rapid response to disasters. A key goal of the on-board SAR imaging system design is to achieve high real-time processing performance under severe size, weight, and power consumption constraints. This paper presents a multi-node prototype system for real-time SAR imaging processing. We decompose the commonly used chirp scaling (CS) SAR imaging algorithm into two parts according to the computing features. The linearization and logic-memory optimum allocation methods are adopted to realize the nonlinear part in a reconfigurable structure, and the two-part bandwidth balance method is used to realize the linear part. Thus, float-point SAR imaging processing can be integrated into a single Field Programmable Gate Array (FPGA) chip instead of relying on distributed technologies. A single-processing node requires 10.6 s and consumes 17 W to focus on 25-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384. The design methodology of the multi-FPGA parallel accelerating system under the real-time principle is introduced. As a proof of concept, a prototype with four processing nodes and one master node is implemented using a Xilinx xc6vlx315t FPGA. The weight and volume of one single machine are 10 kg and 32 cm × 24 cm × 20 cm, respectively, and the power consumption is under 100 W. The real-time performance of the proposed design is demonstrated on Chinese Gaofen-3 stripmap continuous imaging. PMID:29495637

An embedded face-classification system for infrared images on an FPGA

NASA Astrophysics Data System (ADS)

Soto, Javier E.; Figueroa, Miguel

2014-10-01

We present a face-classification architecture for long-wave infrared (IR) images implemented on a Field Programmable Gate Array (FPGA). The circuit is fast, compact and low power, can recognize faces in real time and be embedded in a larger image-processing and computer vision system operating locally on an IR camera. The algorithm uses Local Binary Patterns (LBP) to perform feature extraction on each IR image. First, each pixel in the image is represented as an LBP pattern that encodes the similarity between the pixel and its neighbors. Uniform LBP codes are then used to reduce the number of patterns to 59 while preserving more than 90% of the information contained in the original LBP representation. Then, the image is divided into 64 non-overlapping regions, and each region is represented as a 59-bin histogram of patterns. Finally, the algorithm concatenates all 64 regions to create a 3,776-bin spatially enhanced histogram. We reduce the dimensionality of this histogram using Linear Discriminant Analysis (LDA), which improves clustering and enables us to store an entire database of 53 subjects on-chip. During classification, the circuit applies LBP and LDA to each incoming IR image in real time, and compares the resulting feature vector to each pattern stored in the local database using the Manhattan distance. We implemented the circuit on a Xilinx Artix-7 XC7A100T FPGA and tested it with the UCHThermalFace database, which consists of 28 81 x 150-pixel images of 53 subjects in indoor and outdoor conditions. The circuit achieves a 98.6% hit ratio, trained with 16 images and tested with 12 images of each subject in the database. Using a 100 MHz clock, the circuit classifies 8,230 images per second, and consumes only 309mW.

An orthogonal wavelet division multiple-access processor architecture for LTE-advanced wireless/radio-over-fiber systems over heterogeneous networks

NASA Astrophysics Data System (ADS)

Mahapatra, Chinmaya; Leung, Victor CM; Stouraitis, Thanos

2014-12-01

The increase in internet traffic, number of users, and availability of mobile devices poses a challenge to wireless technologies. In long-term evolution (LTE) advanced system, heterogeneous networks (HetNet) using centralized coordinated multipoint (CoMP) transmitting radio over optical fibers (LTE A-ROF) have provided a feasible way of satisfying user demands. In this paper, an orthogonal wavelet division multiple-access (OWDMA) processor architecture is proposed, which is shown to be better suited to LTE advanced systems as compared to orthogonal frequency division multiple access (OFDMA) as in LTE systems 3GPP rel.8 (3GPP, http://www.3gpp.org/DynaReport/36300.htm). ROF systems are a viable alternative to satisfy large data demands; hence, the performance in ROF systems is also evaluated. To validate the architecture, the circuit is designed and synthesized on a Xilinx vertex-6 field-programmable gate array (FPGA). The synthesis results show that the circuit performs with a clock period as short as 7.036 ns (i.e., a maximum clock frequency of 142.13 MHz) for transform size of 512. A pipelined version of the architecture reduces the power consumption by approximately 89%. We compare our architecture with similar available architectures for resource utilization and timing and provide performance comparison with OFDMA systems for various quality metrics of communication systems. The OWDMA architecture is found to perform better than OFDMA for bit error rate (BER) performance versus signal-to-noise ratio (SNR) in wireless channel as well as ROF media. It also gives higher throughput and mitigates the bad effect of peak-to-average-power ratio (PAPR).

ICE: A Scalable, Low-Cost FPGA-Based Telescope Signal Processing and Networking System

NASA Astrophysics Data System (ADS)

Bandura, K.; Bender, A. N.; Cliche, J. F.; de Haan, T.; Dobbs, M. A.; Gilbert, A. J.; Griffin, S.; Hsyu, G.; Ittah, D.; Parra, J. Mena; Montgomery, J.; Pinsonneault-Marotte, T.; Siegel, S.; Smecher, G.; Tang, Q. Y.; Vanderlinde, K.; Whitehorn, N.

2016-03-01

We present an overview of the ‘ICE’ hardware and software framework that implements large arrays of interconnected field-programmable gate array (FPGA)-based data acquisition, signal processing and networking nodes economically. The system was conceived for application to radio, millimeter and sub-millimeter telescope readout systems that have requirements beyond typical off-the-shelf processing systems, such as careful control of interference signals produced by the digital electronics, and clocking of all elements in the system from a single precise observatory-derived oscillator. A new generation of telescopes operating at these frequency bands and designed with a vastly increased emphasis on digital signal processing to support their detector multiplexing technology or high-bandwidth correlators — data rates exceeding a terabyte per second — are becoming common. The ICE system is built around a custom FPGA motherboard that makes use of an Xilinx Kintex-7 FPGA and ARM-based co-processor. The system is specialized for specific applications through software, firmware and custom mezzanine daughter boards that interface to the FPGA through the industry-standard FPGA mezzanine card (FMC) specifications. For high density applications, the motherboards are packaged in 16-slot crates with ICE backplanes that implement a low-cost passive full-mesh network between the motherboards in a crate, allow high bandwidth interconnection between crates and enable data offload to a computer cluster. A Python-based control software library automatically detects and operates the hardware in the array. Examples of specific telescope applications of the ICE framework are presented, namely the frequency-multiplexed bolometer readout systems used for the South Pole Telescope (SPT) and Simons Array and the digitizer, F-engine, and networking engine for the Canadian Hydrogen Intensity Mapping Experiment (CHIME) and Hydrogen Intensity and Real-time Analysis eXperiment (HIRAX) radio interferometers.

Real-time implementation of a multispectral mine target detection algorithm

NASA Astrophysics Data System (ADS)

Samson, Joseph W.; Witter, Lester J.; Kenton, Arthur C.; Holloway, John H., Jr.

2003-09-01

Spatial-spectral anomaly detection (the "RX Algorithm") has been exploited on the USMC's Coastal Battlefield Reconnaissance and Analysis (COBRA) Advanced Technology Demonstration (ATD) and several associated technology base studies, and has been found to be a useful method for the automated detection of surface-emplaced antitank land mines in airborne multispectral imagery. RX is a complex image processing algorithm that involves the direct spatial convolution of a target/background mask template over each multispectral image, coupled with a spatially variant background spectral covariance matrix estimation and inversion. The RX throughput on the ATD was about 38X real time using a single Sun UltraSparc system. A goal to demonstrate RX in real-time was begun in FY01. We now report the development and demonstration of a Field Programmable Gate Array (FPGA) solution that achieves a real-time implementation of the RX algorithm at video rates using COBRA ATD data. The approach uses an Annapolis Microsystems Firebird PMC card containing a Xilinx XCV2000E FPGA with over 2,500,000 logic gates and 18MBytes of memory. A prototype system was configured using a Tek Microsystems VME board with dual-PowerPC G4 processors and two PMC slots. The RX algorithm was translated from its C programming implementation into the VHDL language and synthesized into gates that were loaded into the FPGA. The VHDL/synthesizer approach allows key RX parameters to be quickly changed and a new implementation automatically generated. Reprogramming the FPGA is done rapidly and in-circuit. Implementation of the RX algorithm in a single FPGA is a major first step toward achieving real-time land mine detection.

An FPGA-based High Speed Parallel Signal Processing System for Adaptive Optics Testbed

NASA Astrophysics Data System (ADS)

Kim, H.; Choi, Y.; Yang, Y.

In this paper a state-of-the-art FPGA (Field Programmable Gate Array) based high speed parallel signal processing system (SPS) for adaptive optics (AO) testbed with 1 kHz wavefront error (WFE) correction frequency is reported. The AO system consists of Shack-Hartmann sensor (SHS) and deformable mirror (DM), tip-tilt sensor (TTS), tip-tilt mirror (TTM) and an FPGA-based high performance SPS to correct wavefront aberrations. The SHS is composed of 400 subapertures and the DM 277 actuators with Fried geometry, requiring high speed parallel computing capability SPS. In this study, the target WFE correction speed is 1 kHz; therefore, it requires massive parallel computing capabilities as well as strict hard real time constraints on measurements from sensors, matrix computation latency for correction algorithms, and output of control signals for actuators. In order to meet them, an FPGA based real-time SPS with parallel computing capabilities is proposed. In particular, the SPS is made up of a National Instrument's (NI's) real time computer and five FPGA boards based on state-of-the-art Xilinx Kintex 7 FPGA. Programming is done with NI's LabView environment, providing flexibility when applying different algorithms for WFE correction. It also facilitates faster programming and debugging environment as compared to conventional ones. One of the five FPGA's is assigned to measure TTS and calculate control signals for TTM, while the rest four are used to receive SHS signal, calculate slops for each subaperture and correction signal for DM. With this parallel processing capabilities of the SPS the overall closed-loop WFE correction speed of 1 kHz has been achieved. System requirements, architecture and implementation issues are described; furthermore, experimental results are also given.

A bunch to bucket phase detector for the RHIC LLRF upgrade platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.S.; Harvey, M.; Hayes, T.

2011-03-28

As part of the overall development effort for the RHIC LLRF Upgrade Platform [1,2,3], a generic four channel 16 bit Analog-to-Digital Converter (ADC) daughter module was developed to provide high speed, wide dynamic range digitizing and processing of signals from DC to several hundred megahertz. The first operational use of this card was to implement the bunch to bucket phase detector for the RHIC LLRF beam control feedback loops. This paper will describe the design and performance features of this daughter module as a bunch to bucket phase detector, and also provide an overview of its place within the overallmore » LLRF platform architecture as a high performance digitizer and signal processing module suitable to a variety of applications. In modern digital control and signal processing systems, ADCs provide the interface between the analog and digital signal domains. Once digitized, signals are then typically processed using algorithms implemented in field programmable gate array (FPGA) logic, general purpose processors (GPPs), digital signal processors (DSPs) or a combination of these. For the recently developed and commissioned RHIC LLRF Upgrade Platform, we've developed a four channel ADC daughter module based on the Linear Technology LTC2209 16 bit, 160 MSPS ADC and the Xilinx V5FX70T FPGA. The module is designed to be relatively generic in application, and with minimal analog filtering on board, is capable of processing signals from DC to 500 MHz or more. The module's first application was to implement the bunch to bucket phase detector (BTB-PD) for the RHIC LLRF system. The same module also provides DC digitizing of analog processed BPM signals used by the LLRF system for radial feedback.« less

Dual Active Bridge based DC Transformer LabVIEW FPGA Control Code

DOE Office of Scientific and Technical Information (OSTI.GOV)

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The candidate software implements complete control algorithms in LabVIEW FPGA for a DC Transformer (DCX) based onmore » a dual active bridge (DAB). A DCX is an isolated bi-directional DC-DC converter designed to operate at unity conversion ratio, M, defined by where Vin is the primary-side DC bus voltage, Vout is the secondary-side DC bus voltage, and n is the turns ratio of the embedded high frequency transformer (HFX). The DCX based on a DAB incorporates two H-bridges, a resonant inductor, and an HFX to provide this functionality. The candidate software employs phase-shift modulation of the two H-bridges and a feedback loop to regulate the conversion ratio at unity. The software also includes alarm-handling capabilities as well as debugging and tuning tools. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, and user-settable switching frequencies and synchronized control loop update rates of tens of kHz.« less

Fast and Adaptive Lossless Onboard Hyperspectral Data Compression System

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh I.; Keymeulen, Didier; Kimesh, Matthew A.

2012-01-01

Modern hyperspectral imaging systems are able to acquire far more data than can be downlinked from a spacecraft. Onboard data compression helps to alleviate this problem, but requires a system capable of power efficiency and high throughput. Software solutions have limited throughput performance and are power-hungry. Dedicated hardware solutions can provide both high throughput and power efficiency, while taking the load off of the main processor. Thus a hardware compression system was developed. The implementation uses a field-programmable gate array (FPGA). The implementation is based on the fast lossless (FL) compression algorithm reported in Fast Lossless Compression of Multispectral-Image Data (NPO-42517), NASA Tech Briefs, Vol. 30, No. 8 (August 2006), page 26, which achieves excellent compression performance and has low complexity. This algorithm performs predictive compression using an adaptive filtering method, and uses adaptive Golomb coding. The implementation also packetizes the coded data. The FL algorithm is well suited for implementation in hardware. In the FPGA implementation, one sample is compressed every clock cycle, which makes for a fast and practical realtime solution for space applications. Benefits of this implementation are: 1) The underlying algorithm achieves a combination of low complexity and compression effectiveness that exceeds that of techniques currently in use. 2) The algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. 3) Hardware acceleration provides a throughput improvement of 10 to 100 times vs. the software implementation. A prototype of the compressor is available in software, but it runs at a speed that does not meet spacecraft requirements. The hardware implementation targets the Xilinx Virtex IV FPGAs, and makes the use of this compressor practical for Earth satellites as well as beyond-Earth missions with hyperspectral instruments.

Path planning on cellular nonlinear network using active wave computing technique

NASA Astrophysics Data System (ADS)

Yeniçeri, Ramazan; Yalçın, Müstak E.

2009-05-01

This paper introduces a simple algorithm to solve robot path finding problem using active wave computing techniques. A two-dimensional Cellular Neural/Nonlinear Network (CNN), consist of relaxation oscillators, has been used to generate active waves and to process the visual information. The network, which has been implemented on a Field Programmable Gate Array (FPGA) chip, has the feature of being programmed, controlled and observed by a host computer. The arena of the robot is modelled as the medium of the active waves on the network. Active waves are employed to cover the whole medium with their own dynamics, by starting from an initial point. The proposed algorithm is achieved by observing the motion of the wave-front of the active waves. Host program first loads the arena model onto the active wave generator network and command to start the generation. Then periodically pulls the network image from the generator hardware to analyze evolution of the active waves. When the algorithm is completed, vectorial data image is generated. The path from any of the pixel on this image to the active wave generating pixel is drawn by the vectors on this image. The robot arena may be a complicated labyrinth or may have a simple geometry. But, the arena surface always must be flat. Our Autowave Generator CNN implementation which is settled on the Xilinx University Program Virtex-II Pro Development System is operated by a MATLAB program running on the host computer. As the active wave generator hardware has 16, 384 neurons, an arena with 128 × 128 pixels can be modeled and solved by the algorithm. The system also has a monitor and network image is depicted on the monitor simultaneously.

Reconfigurable fault tolerant avionics system

NASA Astrophysics Data System (ADS)

Ibrahim, M. M.; Asami, K.; Cho, Mengu

This paper presents the design of a reconfigurable avionics system based on modern Static Random Access Memory (SRAM)-based Field Programmable Gate Array (FPGA) to be used in future generations of nano satellites. A major concern in satellite systems and especially nano satellites is to build robust systems with low-power consumption profiles. The system is designed to be flexible by providing the capability of reconfiguring itself based on its orbital position. As Single Event Upsets (SEU) do not have the same severity and intensity in all orbital locations, having the maximum at the South Atlantic Anomaly (SAA) and the polar cusps, the system does not have to be fully protected all the time in its orbit. An acceptable level of protection against high-energy cosmic rays and charged particles roaming in space is provided within the majority of the orbit through software fault tolerance. Check pointing and roll back, besides control flow assertions, is used for that level of protection. In the minority part of the orbit where severe SEUs are expected to exist, a reconfiguration for the system FPGA is initiated where the processor systems are triplicated and protection through Triple Modular Redundancy (TMR) with feedback is provided. This technique of reconfiguring the system as per the level of the threat expected from SEU-induced faults helps in reducing the average dynamic power consumption of the system to one-third of its maximum. This technique can be viewed as a smart protection through system reconfiguration. The system is built on the commercial version of the (XC5VLX50) Xilinx Virtex5 FPGA on bulk silicon with 324 IO. Simulations of orbit SEU rates were carried out using the SPENVIS web-based software package.

High-performance hardware implementation of a parallel database search engine for real-time peptide mass fingerprinting

PubMed Central

Bogdán, István A.; Rivers, Jenny; Beynon, Robert J.; Coca, Daniel

2008-01-01

Motivation: Peptide mass fingerprinting (PMF) is a method for protein identification in which a protein is fragmented by a defined cleavage protocol (usually proteolysis with trypsin), and the masses of these products constitute a ‘fingerprint’ that can be searched against theoretical fingerprints of all known proteins. In the first stage of PMF, the raw mass spectrometric data are processed to generate a peptide mass list. In the second stage this protein fingerprint is used to search a database of known proteins for the best protein match. Although current software solutions can typically deliver a match in a relatively short time, a system that can find a match in real time could change the way in which PMF is deployed and presented. In a paper published earlier we presented a hardware design of a raw mass spectra processor that, when implemented in Field Programmable Gate Array (FPGA) hardware, achieves almost 170-fold speed gain relative to a conventional software implementation running on a dual processor server. In this article we present a complementary hardware realization of a parallel database search engine that, when running on a Xilinx Virtex 2 FPGA at 100 MHz, delivers 1800-fold speed-up compared with an equivalent C software routine, running on a 3.06 GHz Xeon workstation. The inherent scalability of the design means that processing speed can be multiplied by deploying the design on multiple FPGAs. The database search processor and the mass spectra processor, running on a reconfigurable computing platform, provide a complete real-time PMF protein identification solution. Contact: d.coca@sheffield.ac.uk PMID:18453553

A custom hardware classifier for bruised apple detection in hyperspectral images

NASA Astrophysics Data System (ADS)

Cárdenas, Javier; Figueroa, Miguel; Pezoa, Jorge E.

2015-09-01

We present a custom digital architecture for bruised apple classification using hyperspectral images in the near infrared (NIR) spectrum. The algorithm classifies each pixel in an image into one of three classes: bruised, non-bruised, and background. We extract two 5-element feature vectors for each pixel using only 10 out of the 236 spectral bands provided by the hyperspectral camera, thereby greatly reducing both the requirements of the imager and the computational complexity of the algorithm. We then use two linear-kernel support vector machine (SVM) to classify each pixel. Each SVM was trained with 504 windows of size 17×17-pixel taken from 14 hyperspectral images of 320×320 pixels each, for each class. The architecture then computes the percentage of bruised pixels in each apple in order to adequately classify the fruit. We implemented the architecture on a Xilinx Zynq Z-7010 field-programmable gate array (FPGA) and tested it on images from a NIR N17E push-broom camera with a frame rate of 25 fps, a band-pixel rate of 1.888 MHz, and 236 spectral bands between 900 and 1700 nanometers in laboratory conditions. Using 28-bit fixed-point arithmetic, the circuit accurately discriminates 95.2% of the pixels corresponding to an apple, 81% of the pixels corresponding to a bruised apple, and 96.4% of the background. With the default threshold settings, the highest false positive (FP) for a bruised apple is 18.7%. The circuit operates at the native frame rate of the camera, consumes 67 mW of dynamic power, and uses less than 10% of the logic resources on the FPGA.

Fabless company mask technology approach: fabless but not fab-careless

NASA Astrophysics Data System (ADS)

Hisamura, Toshiyuki; Wu, Xin

2009-10-01

There are two different foundry-fabless working models in the aspect of mask. Some foundries have in-house mask facility while others contract with merchant mask vendors. Significant progress has been made in both kinds of situations. Xilinx as one of the pioneers of fabless semiconductor companies has been continually working very closely with both merchant mask vendors and mask facilities of foundries in past many years, contributed well in both technology development and benefited from corporations. Our involvement in manufacturing is driven by the following three elements: The first element is to understand the new fabrication and mask technologies and then find a suitable design / layout style to better utilize these new technologies and avoid potential risks. Because Xilinx has always been involved in early stage of advanced technology nodes, this early understanding and adoption is especially important. The second element is time to market. Reduction in mask and wafer manufacturing cycle-time can ensure faster time to market. The third element is quality. Commitment to quality is our highest priority for our customers. We have enough visibility on any manufacturing issues affecting the device functionality. Good correlation has consistently been observed between FPGA speed uniformity and the poly mask Critical Dimension (CD) uniformity performance. To achieve FPGA speed uniformity requirement, the manufacturing process as well as the mask and wafer CD uniformity has to be monitored. Xilinx works closely with the wafer foundries and mask suppliers to improve productivity and the yield from initial development stage of mask making operations. As an example, defect density reduction is one of the biggest challenges for mask supplier in development stage to meet the yield target satisfying the mask cost and mask turn-around-time (TAT) requirement. Historically, masks were considered to be defect free but at these advanced process nodes, that assumption no longer holds true. There is a need to be flexible enough on unrepairable defect at early stage but also a need for efficient risk management system on mask defect waivers. Mask defects are often waived in low design criticality area in favor of scrapping the mask and delaying the mask and wafer schedule. Xilinx's involvement in mask manufacturing has contributed significantly to our success in past many nodes and will continue.

Multi-DSP and FPGA based Multi-channel Direct IF/RF Digital receiver for atmospheric radar

NASA Astrophysics Data System (ADS)

Yasodha, Polisetti; Jayaraman, Achuthan; Kamaraj, Pandian; Durga rao, Meka; Thriveni, A.

2016-07-01

Modern phased array radars depend highly on digital signal processing (DSP) to extract the echo signal information and to accomplish reliability along with programmability and flexibility. The advent of ASIC technology has made various digital signal processing steps to be realized in one DSP chip, which can be programmed as per the application and can handle high data rates, to be used in the radar receiver to process the received signal. Further, recent days field programmable gate array (FPGA) chips, which can be re-programmed, also present an opportunity to utilize them to process the radar signal. A multi-channel direct IF/RF digital receiver (MCDRx) is developed at NARL, taking the advantage of high speed ADCs and high performance DSP chips/FPGAs, to be used for atmospheric radars working in HF/VHF bands. Multiple channels facilitate the radar t be operated in multi-receiver modes and also to obtain the wind vector with improved time resolution, without switching the antenna beam. MCDRx has six channels, implemented on a custom built digital board, which is realized using six numbers of ADCs for simultaneous processing of the six input signals, Xilinx vertex5 FPGA and Spartan6 FPGA, and two ADSPTS201 DSP chips, each of which performs one phase of processing. MCDRx unit interfaces with the data storage/display computer via two gigabit ethernet (GbE) links. One of the six channels is used for Doppler beam swinging (DBS) mode and the other five channels are used for multi-receiver mode operations, dedicatedly. Each channel has (i) ADC block, to digitize RF/IF signal, (ii) DDC block for digital down conversion of the digitized signal, (iii) decoding block to decode the phase coded signal, and (iv) coherent integration block for integrating the data preserving phase intact. ADC block consists of Analog devices make AD9467 16-bit ADCs, to digitize the input signal at 80 MSPS. The output of ADC is centered around (80 MHz - input frequency). The digitized data is fed to DDC block, which down converts the data to base-band. The DDC block has NCO, mixer and two chains of Bessel filters (fifth order cascaded integration comb filter, two FIR filters, two half band filters and programmable FIR filters) for in-phase (I) and Quadrature phase (Q) channels. The NCO has 32 bits and is set to match the output frequency of ADC. Further, DDC down samples (decimation) the data and reduces the data rate to 16 MSPS. This data is further decimated and the data rate is reduced down to 4/2/1/0.5/0.25/0.125/0.0625 MSPS for baud lengths 0.25/0.5/1/2/4/8/16 μs respectively. The down sampled data is then fed to decoding block, which performs cross correlation to achieve pulse compression of the binary-phase coded data to obtain better range resolution with maximum possible height coverage. This step improves the signal power by a factor equal to the length of the code. Coherent integration block integrates the decoded data coherently for successive pulses, which improves the signal to noise ratio and reduces the data volume. DDC, decoding and coherent integration blocks are implemented in Xilinx vertex5 FPGA. Till this point, function of all six channels is same for DBS mode and multi-receiver modes. Data from vertex5 FPGA is transferred to PC via GbE-1 interface for multi-modes or to two Analog devices make ADSP-TS201 DSP chips (A and B), via link port for DBS mode. ADSP-TS201 chips perform the normalization, DC removal, windowing, FFT computation and spectral averaging on the data, which is transferred to storage/display PC via GbE-2 interface for real-time data display and data storing. Physical layer of GbE interface is implemented in an external chip (Marvel 88E1111) and MAC layer is implemented internal to vertex5 FPGA. The MCDRx has total 4 GB of DDR2 memory for data storage. Spartan6 FPGA is used for generating timing signals, required for basic operation of the radar and testing of the MCDRx.

Field Programmable Gate Array Control of Power Systems in Graduate Student Laboratories

DTIC Science & Technology

2008-03-01

NAVAL POSTGRADUATE SCHOOL MONTEREY, CALIFORNIA THESIS Approved for public release; distribution is unlimited FIELD PROGRAMMABLE...REPORT TYPE AND DATES COVERED Master’s Thesis 4. TITLE AND SUBTITLE Field Programmable Gate Array Control of Power Systems in Graduate Student...Electronics curriculum track is the development of a design center that explores Field Programmable Gate Array (FPGA) control of power electronics

Modeling and Analysis of a Constant Power Series-Loaded Resonant Converter

DTIC Science & Technology

2011-06-01

Paperwork Reduction Project (0704-0188) Washington DC 20503. 1 . AGENCY USE ONLY (Leave blank) 2 . REPORT DATE June 2011 3. REPORT TYPE AND DATES...CONVERTER THEORY .......................8 1 . Converter Topology .............................................................................8 2 . Modes of...25 1 . Fixed-Point Numbers. ........................................................................25 2 . Xilinx

Design and implementation of power efficient 10-bit dual port SRAM on 28 nm technology

NASA Astrophysics Data System (ADS)

Gulati, Anmol; Gupta, Ashutosh; Murgai, Shruti; Bhaskar, Lala

2016-03-01

In this paper, 10 bit synchronous clock gated Dual port RAM has been designed. The negative latch based clock gating technique has been employed to optimize the power of the design. The design has been implemented on XV7K70T device, -3 speed grade, and kintex 7 FPGA family on Xilinx ISE Design Suite 14.7 using 28 nm technology. The design has been synthesized using Verilog HDL. We have been successful in achieving approximately 55 % reduction in total clock power, 81.55% reduction in BRAM power, 82.65%, 0.07%, 1.04% and 11.31% reduction in static power, 72.32%, 38.60%, 68.74% and 71.97%, reduction in dynamic power and 72.44%, 16.96%, 60.88% and 71.06% reduction in total supply power at 1 THz, 1GHz, 100 GHz and 1000 GHz frequency respectively. The power of the device has been calculated using XPower Analyzer tool of Xilinx ISE Design Suite 14.7.

Power efficient, clock gated multiplexer based full adder cell using 28 nm technology

NASA Astrophysics Data System (ADS)

Gupta, Ashutosh; Murgai, Shruti; Gulati, Anmol; Kumar, Pradeep

2016-03-01

Clock gating is a leading technique used for power saving. Full adders is one of the basic circuit that can be found in maximum VLSI circuits. In this paper clock gated multiplexer based full adder cell is implemented on 28 nm technology. We have designed a full adder cell using a multiplexer with a gated clock without degrading its performance of the cell. We have negative latch circuit for generating gated clock. This gated clock is used to control the multiplexer based full adder cell. The circuit has been synthesized on kintex FPGA through Xilinx ISE Design Suite 14.7 using 28 nm technology in Verilog HDL. The circuit has been simulated on Modelsim 10.3c. The design is verified using System Verilog on QuestaSim in UVM environment. The total power of the circuit has been reduced by 7.41% without degrading the performance of original circuit. The power has been calculated using XPower Analyzer tool of XILINX ISE DESIGN SUITE 14.3.

Fast semivariogram computation using FPGA architectures

NASA Astrophysics Data System (ADS)

Lagadapati, Yamuna; Shirvaikar, Mukul; Dong, Xuanliang

2015-02-01

The semivariogram is a statistical measure of the spatial distribution of data and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. The semivariogram is a plot of semivariances for different lag distances between pixels. A semi-variance, γ(h), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h. Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O(n2). Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz, but they can perform tens of thousands of calculations per clock cycle while operating in the low range of power. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. The design consists of several modules dedicated to the constituent computational tasks. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current implementation is focused on isotropic semivariogram computations only. Anisotropic semivariogram implementation is anticipated to be an extension of the current architecture, ostensibly based on refinements to the current modules. The algorithm is benchmarked using VHDL on a Xilinx XUPV5-LX110T development Kit, which utilizes the Virtex5 FPGA. Medical image data from MRI scans are utilized for the experiments. Computational speedup is measured with respect to Matlab implementation on a personal computer with an Intel i7 multi-core processor. Preliminary simulation results indicate that a significant advantage in speed can be attained by the architectures, making the algorithm viable for implementation in medical devices

Measuring Input Thresholds on an Existing Board

NASA Technical Reports Server (NTRS)

Kuperman, Igor; Gutrich, Daniel G.; Berkun, Andrew C.

2011-01-01

A critical PECL (positive emitter-coupled logic) interface to Xilinx interface needed to be changed on an existing flight board. The new Xilinx input interface used a CMOS (complementary metal-oxide semiconductor) type of input, and the driver could meet its thresholds typically, but not in worst-case, according to the data sheet. The previous interface had been based on comparison with an external reference, but the CMOS input is based on comparison with an internal divider from the power supply. A way to measure what the exact input threshold was for this device for 64 inputs on a flight board was needed. The measurement technique allowed an accurate measurement of the voltage required to switch a Xilinx input from high to low for each of the 64 lines, while only probing two of them. Directly driving an external voltage was considered too risky, and tests done on any other unit could not be used to qualify the flight board. The two lines directly probed gave an absolute voltage threshold calibration, while data collected on the remaining 62 lines without probing gave relative measurements that could be used to identify any outliers. The PECL interface was forced to a long-period square wave by driving a saturated square wave into the ADC (analog to digital converter). The active pull-down circuit was turned off, causing each line to rise rapidly and fall slowly according to the input s weak pull-down circuitry. The fall time shows up as a change in the pulse width of the signal ready by the Xilinx. This change in pulse width is a function of capacitance, pulldown current, and input threshold. Capacitance was known from the different trace lengths, plus a gate input capacitance, which is the same for all inputs. The pull-down current is the same for all inputs including the two that are probed directly. The data was combined, and the Excel solver tool was used to find input thresholds for the 62 lines. This was repeated over different supply voltages and temperatures to show that the interface had voltage margin under all worst case conditions. Gate input thresholds are normally measured at the manufacturer when the device is on a chip tester. A key function of this machine was duplicated on an existing flight board with no modifications to the nets to be tested, with the exception of changes in the FPGA program.

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Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-02

..., IRELAND; Freescale Semiconductor, Austin, TX; IBM, Hopewell Junction, NY; Jasper Design Automation..., San Jose, CA; Vayavya Labs, Belguam, INDIA; Verilab, Austin, TX; and Xilinx, Inc., San Jose, CA, have... DEPARTMENT OF JUSTICE Antitrust Division Notice Pursuant to the National Cooperative Research and...

Rapid algorithm prototyping and implementation for power quality measurement

NASA Astrophysics Data System (ADS)

Kołek, Krzysztof; Piątek, Krzysztof

2015-12-01

This article presents a Model-Based Design (MBD) approach to rapidly implement power quality (PQ) metering algorithms. Power supply quality is a very important aspect of modern power systems and will become even more important in future smart grids. In this case, maintaining the PQ parameters at the desired level will require efficient implementation methods of the metering algorithms. Currently, the development of new, advanced PQ metering algorithms requires new hardware with adequate computational capability and time intensive, cost-ineffective manual implementations. An alternative, considered here, is an MBD approach. The MBD approach focuses on the modelling and validation of the model by simulation, which is well-supported by a Computer-Aided Engineering (CAE) packages. This paper presents two algorithms utilized in modern PQ meters: a phase-locked loop based on an Enhanced Phase Locked Loop (EPLL), and the flicker measurement according to the IEC 61000-4-15 standard. The algorithms were chosen because of their complexity and non-trivial development. They were first modelled in the MATLAB/Simulink package, then tested and validated in a simulation environment. The models, in the form of Simulink diagrams, were next used to automatically generate C code. The code was compiled and executed in real-time on the Zynq Xilinx platform that combines a reconfigurable Field Programmable Gate Array (FPGA) with a dual-core processor. The MBD development of PQ algorithms, automatic code generation, and compilation form a rapid algorithm prototyping and implementation path for PQ measurements. The main advantage of this approach is the ability to focus on the design, validation, and testing stages while skipping over implementation issues. The code generation process renders production-ready code that can be easily used on the target hardware. This is especially important when standards for PQ measurement are in constant development, and the PQ issues in emerging smart grids will require tools for rapid development and implementation of such algorithms.

Reconfigurable Hardware for Compressing Hyperspectral Image Data

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

2010-01-01

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

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Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-12

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Federal Register 2010, 2011, 2012, 2013, 2014

2010-10-25

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FPGA Online Tracking Algorithm for the PANDA Straw Tube Tracker

NASA Astrophysics Data System (ADS)

Liang, Yutie; Ye, Hua; Galuska, Martin J.; Gessler, Thomas; Kuhn, Wolfgang; Lange, Jens Soren; Wagner, Milan N.; Liu, Zhen'an; Zhao, Jingzhou

2017-06-01

A novel FPGA based online tracking algorithm for helix track reconstruction in a solenoidal field, developed for the PANDA spectrometer, is described. Employing the Straw Tube Tracker detector with 4636 straw tubes, the algorithm includes a complex track finder, and a track fitter. Implemented in VHDL, the algorithm is tested on a Xilinx Virtex-4 FX60 FPGA chip with different types of events, at different event rates. A processing time of 7 $\\mu$s per event for an average of 6 charged tracks is obtained. The momentum resolution is about 3\\% (4\\%) for $p_t$ ($p_z$) at 1 GeV/c. Comparing to the algorithm running on a CPU chip (single core Intel Xeon E5520 at 2.26 GHz), an improvement of 3 orders of magnitude in processing time is obtained. The algorithm can handle severe overlapping of events which are typical for interaction rates above 10 MHz.

Efficient FIR Filter Implementations for Multichannel BCIs Using Xilinx System Generator.

PubMed

Ghani, Usman; Wasim, Muhammad; Khan, Umar Shahbaz; Mubasher Saleem, Muhammad; Hassan, Ali; Rashid, Nasir; Islam Tiwana, Mohsin; Hamza, Amir; Kashif, Amir

2018-01-01

Background . Brain computer interface (BCI) is a combination of software and hardware communication protocols that allow brain to control external devices. Main purpose of BCI controlled external devices is to provide communication medium for disabled persons. Now these devices are considered as a new way to rehabilitate patients with impunities. There are certain potentials present in electroencephalogram (EEG) that correspond to specific event. Main issue is to detect such event related potentials online in such a low signal to noise ratio (SNR). In this paper we propose a method that will facilitate the concept of online processing by providing an efficient filtering implementation in a hardware friendly environment by switching to finite impulse response (FIR). Main focus of this research is to minimize latency and computational delay of preprocessing related to any BCI application. Four different finite impulse response (FIR) implementations along with large Laplacian filter are implemented in Xilinx System Generator. Efficiency of 25% is achieved in terms of reduced number of coefficients and multiplications which in turn reduce computational delays accordingly.

Method and infrastructure for cycle-reproducible simulation on large scale digital circuits on a coordinated set of field-programmable gate arrays (FPGAs)

DOEpatents

Asaad, Sameh W; Bellofatto, Ralph E; Brezzo, Bernard; Haymes, Charles L; Kapur, Mohit; Parker, Benjamin D; Roewer, Thomas; Tierno, Jose A

2014-01-28

A plurality of target field programmable gate arrays are interconnected in accordance with a connection topology and map portions of a target system. A control module is coupled to the plurality of target field programmable gate arrays. A balanced clock distribution network is configured to distribute a reference clock signal, and a balanced reset distribution network is coupled to the control module and configured to distribute a reset signal to the plurality of target field programmable gate arrays. The control module and the balanced reset distribution network are cooperatively configured to initiate and control a simulation of the target system with the plurality of target field programmable gate arrays. A plurality of local clock control state machines reside in the target field programmable gate arrays. The local clock state machines are configured to generate a set of synchronized free-running and stoppable clocks to maintain cycle-accurate and cycle-reproducible execution of the simulation of the target system. A method is also provided.

RHrFPGA Radiation-Hardened Re-programmable Field-Programmable Gate Array

NASA Technical Reports Server (NTRS)

Sanders, A. B.; LaBel, K. A.; McCabe, J. F.; Gardner, G. A.; Lintz, J.; Ross, C.; Golke, K.; Burns, B.; Carts, M. A.; Kim, H. S.

2004-01-01

Viewgraphs on the development of the Radiation-Hardened Re-programmable Field-Programmable Gate Array (RHrFPGA) are presented. The topics include: 1) Radiation Test Suite; 2) Testing Interface; 3) Test Configuration; 4) Facilities; 5) Test Programs; 6) Test Procedure; and 7) Test Results. A summary of heavy ion and proton testing is also included.

Global Educational Ecosystem: Case Study of a Partnership with K-12 Schools, Community Organizations, and Business

ERIC Educational Resources Information Center

Lewis, Donna S.

2010-01-01

The purpose of this study was to describe a collaborative partnership model known as the Global Educational Ecosystem, which involves three K-12 schools in Northern California, community organizations (representing science, technology, health, and arts), and Xilinx, Inc. from the perspectives of the leaders of the involved partner organizations in…

Field programmable gate arrays: Evaluation report for space-flight application

NASA Technical Reports Server (NTRS)

Sandoe, Mike; Davarpanah, Mike; Soliman, Kamal; Suszko, Steven; Mackey, Susan

1992-01-01

Field Programmable Gate Arrays commonly called FPGA's are the newer generation of field programmable devices and offer more flexibility in the logic modules they incorporate and in how they are interconnected. The flexibility, the number of logic building blocks available, and the high gate densities achievable are why users find FPGA's attractive. These attributes are important in reducing product development costs and shortening the development cycle. The aerospace community is interested in incorporating this new generation of field programmable technology in space applications. To this end, a consortium was formed to evaluate the quality, reliability, and radiation performance of FPGA's. This report presents the test results on FPGA parts provided by ACTEL Corporation.

Scalable System Design for Covert MIMO Communications

DTIC Science & Technology

2014-06-01

Sample based resolution of the QRD and equalization processes in the MIMO receiver, for NQR = 11...55 5.1 NQR calculation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 5.2 Resources available on Xilinx Virtex-7 FPGAs...carried out for Na ∈ [2 3 4]. Extrapolation is used to determine trends as a function of the number of QRD blocks instantiated NQR and Na. This section

Thermal Interface Materials Selection and Application Guidelines: In Perspective of Xilinx Virtex-5QV Thermal Management

NASA Technical Reports Server (NTRS)

Suh, Jong-ook; Dillon, R. Peter; Tseng, Stephen

2015-01-01

The heat from high-power microdevices for space, such as Xilinx Virtex 4 and 5 (V4 and V5), has to be removed mainly through conduction in the space vacuum environment. The class-Y type packages are designed to remove the heat from the top of the package, and the most effective method to remove heat from the class-Y type packages is to attach a heat transfer device on the lid of the package and to transfer the heat to frame or chassis. When a heat transfer device is attached to the package lid, the surfaces roughness of the package lid and the heat transfer device reduces the effective contact area between the two. The reduced contact area results in increased thermal contact resistance, and a thermal interface material is required to reduce the thermal contact resistance by filling in the gap between the surfaces of the package lid and the heat transfer device. The current report describes JPL's FY14 NEPP task study on property requirements of TIM and impact of TIM properties on the packaging reliability. The current task also developed appratuses to investigate the performances of TIMs in the actual mission environment.

Design and implementation of low power clock gated 64-bit ALU on ultra scale FPGA

NASA Astrophysics Data System (ADS)

Gupta, Ashutosh; Murgai, Shruti; Gulati, Anmol; Kumar, Pradeep

2016-03-01

64-bit energy efficient Arithmetic and Logic Unit using negative latch based clock gating technique is designed in this paper. The 64-bit ALU is designed using multiplexer based full adder cell. We have designed a 64-bit ALU with a gated clock. We have used negative latch based circuit for generating gated clock. This gated clock is used to control the multiplexer based 64-bit ALU. The circuit has been synthesized on kintex FPGA through Xilinx ISE Design Suite 14.7 using 28 nm technology in Verilog HDL. The circuit has been simulated on Modelsim 10.3c. The design is verified using System Verilog on QuestaSim in UVM environment. We have achieved 74.07%, 92. 93% and 95.53% reduction in total clock power, 89.73%, 91.35% and 92.85% reduction in I/Os power, 67.14%, 62.84% and 74.34% reduction in dynamic power and 25.47%, 29.05% and 46.13% reduction in total supply power at 20 MHz, 200 MHz and 2 GHz frequency respectively. The power has been calculated using XPower Analyzer tool of Xilinx ISE Design Suite 14.3.

A Programmable and Configurable Mixed-Mode FPAA SoC

DTIC Science & Technology

2016-03-17

A Programmable and Configurable Mixed-Mode FPAA SoC Sahil Shah, Sihwan Kim, Farhan Adil, Jennifer Hasler, Suma George, Michelle Collins, Richard...Abstract: The authors present a Floating-Gate based, System-On-Chip large-scale Field- Programmable Analog Array IC that integrates divergent concepts...Floating-Gate, SoC, Command Word Classification This paper presents a Floating-Gate (FG) based, System- On-Chip (SoC) large-scale Field- Programmable

Semivariogram Analysis of Bone Images Implemented on FPGA Architectures.

PubMed

Shirvaikar, Mukul; Lagadapati, Yamuna; Dong, Xuanliang

2017-03-01

Osteoporotic fractures are a major concern for the healthcare of elderly and female populations. Early diagnosis of patients with a high risk of osteoporotic fractures can be enhanced by introducing second-order statistical analysis of bone image data using techniques such as variogram analysis. Such analysis is computationally intensive thereby creating an impediment for introduction into imaging machines found in common clinical settings. This paper investigates the fast implementation of the semivariogram algorithm, which has been proven to be effective in modeling bone strength, and should be of interest to readers in the areas of computer-aided diagnosis and quantitative image analysis. The semivariogram is a statistical measure of the spatial distribution of data, and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. A semi-variance, γ ( h ), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h . Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O ( n 2 ) Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current implementation is focused on isotropic semivariogram computations only. The algorithm is benchmarked using VHDL on a Xilinx XUPV5-LX110T development Kit, which utilizes the Virtex5 FPGA. Medical image data from DXA scans are utilized for the experiments. Implementation results show that a significant advantage in computational speed is attained by the architectures with respect to implementation on a personal computer with an Intel i7 multi-core processor.

Semivariogram Analysis of Bone Images Implemented on FPGA Architectures

PubMed Central

Shirvaikar, Mukul; Lagadapati, Yamuna; Dong, Xuanliang

2016-01-01

Osteoporotic fractures are a major concern for the healthcare of elderly and female populations. Early diagnosis of patients with a high risk of osteoporotic fractures can be enhanced by introducing second-order statistical analysis of bone image data using techniques such as variogram analysis. Such analysis is computationally intensive thereby creating an impediment for introduction into imaging machines found in common clinical settings. This paper investigates the fast implementation of the semivariogram algorithm, which has been proven to be effective in modeling bone strength, and should be of interest to readers in the areas of computer-aided diagnosis and quantitative image analysis. The semivariogram is a statistical measure of the spatial distribution of data, and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. A semi-variance, γ(h), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h. Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O (n2) Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current implementation is focused on isotropic semivariogram computations only. The algorithm is benchmarked using VHDL on a Xilinx XUPV5-LX110T development Kit, which utilizes the Virtex5 FPGA. Medical image data from DXA scans are utilized for the experiments. Implementation results show that a significant advantage in computational speed is attained by the architectures with respect to implementation on a personal computer with an Intel i7 multi-core processor. PMID:28428829

Fast particles identification in programmable form at level-0 trigger by means of the 3D-Flow system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Crosetto, Dario B.

1998-10-30

The 3D-Flow Processor system is a new, technology-independent concept in very fast, real-time system architectures. Based on either an FPGA or an ASIC implementation, it can address, in a fully programmable manner, applications where commercially available processors would fail because of throughput requirements. Possible applications include filtering-algorithms (pattern recognition) from the input of multiple sensors, as well as moving any input validated by these filtering-algorithms to a single output channel. Both operations can easily be implemented on a 3D-Flow system to achieve a real-time processing system with a very short lag time. This system can be built either with off-the-shelfmore » FPGAs or, for higher data rates, with CMOS chips containing 4 to 16 processors each. The basic building block of the system, a 3D-Flow processor, has been successfully designed in VHDL code written in ''Generic HDL'' (mostly made of reusable blocks that are synthesizable in different technologies, or FPGAs), to produce a netlist for a four-processor ASIC featuring 0.35 micron CBA (Ceil Base Array) technology at 3.3 Volts, 884 mW power dissipation at 60 MHz and 63.75 mm sq. die size. The same VHDL code has been targeted to three FPGA manufacturers (Altera EPF10K250A, ORCA-Lucent Technologies 0R3T165 and Xilinx XCV1000). A complete set of software tools, the 3D-Flow System Manager, equally applicable to ASIC or FPGA implementations, has been produced to provide full system simulation, application development, real-time monitoring, and run-time fault recovery. Today's technology can accommodate 16 processors per chip in a medium size die, at a cost per processor of less than $5 based on the current silicon die/size technology cost.« less

Defense Industrial Base Assessment: U.S. Integrated Circuit Design and Fabrication Capability

DTIC Science & Technology

2009-05-01

in the U.S for the period 2003-2006, with projections to 2011.6 The resulting draft OTE survey was field tested for accuracy and usability with a...custom application specific integrated circuits (ASICs) to field programmable gate arrays (FPGAs). Companies of all sizes can manufacture these IC...able to design one-time Electronically Programmable Gate Arrays (EPGAs) while nine are able to design Field Programmable Gate Arrays (FPGAs). Eight

Lessons learnt from a three-year pilot field epidemiology training programme.

PubMed

Hoy, Damian; Durand, A Mark; Hancock, Thane; Cash, Haley L; Hardie, Kate; Paterson, Beverley; Paulino, Yvette; White, Paul; Merritt, Tony; Fitzgibbons, Dawn; Gopalani, Sameer Vali; Flint, James; Edwin A Merilles, Onofre; Kashiwabara, Mina; Biaukula, Viema; Lepers, Christelle; Souares, Yvan; Nilles, Eric; Batikawai, Anaseini; Huseynova, Sevil; Patel, Mahomed; Saketa, Salanieta T; Durrheim, David; Henderson, Alden; Roth, Adam

2017-01-01

The Pacific region has widely dispersed populations, limited financial and human resources and a high burden of disease. There is an urgent need to improve the availability, reliability and timeliness of useable health data. The purpose of this paper is to share lessons learnt from a three-year pilot field epidemiology training programme that was designed to respond to these Pacific health challenges. The pilot programme built on and further developed an existing field epidemiology training programme for Pacific health staff. The programme was delivered in country by epidemiologists working for Pacific Public Health Surveillance Network partners. The programme consisted of five courses: four one-week classroom-based courses and one field epidemiology project. Sessions were structured so that theoretical understanding was achieved through interaction and reinforced through practical hands-on group activities, case studies and other interactive practical learning methods. As of September 2016, 258 students had commenced the programme. Twenty-six course workshops were delivered and one cohort of students had completed the full five-course programme. The programme proved popular and gained a high level of student engagement. Face-to-face delivery, a low student-to-facilitator ratio, substantial group work and practical exercises were identified as key factors that contributed to the students developing skills and confidence. Close engagement of leaders and the need to quickly evaluate and adapt the curriculum were important lessons, and the collaboration between external partners was considered important for promoting a harmonized approach to health needs in the Pacific.

Design and Implementation of Viterbi Decoder Using VHDL

NASA Astrophysics Data System (ADS)

Thakur, Akash; Chattopadhyay, Manju K.

2018-03-01

A digital design conversion of Viterbi decoder for ½ rate convolutional encoder with constraint length k = 3 is presented in this paper. The design is coded with the help of VHDL, simulated and synthesized using XILINX ISE 14.7. Synthesis results show a maximum frequency of operation for the design is 100.725 MHz. The requirement of memory is less as compared to conventional method.

Detection of Visual Field Loss in Pituitary Disease: Peripheral Kinetic Versus Central Static

PubMed Central

Rowe, Fiona J.; Cheyne, Christopher P.; García-Fiñana, Marta; Noonan, Carmel P.; Howard, Claire; Smith, Jayne; Adeoye, Joanne

2015-01-01

Abstract Visual field assessment is an important clinical evaluation for eye disease and neurological injury. We evaluated Octopus semi-automated kinetic peripheral perimetry (SKP) and Humphrey static automated central perimetry for detection of neurological visual field loss in patients with pituitary disease. We carried out a prospective cross-sectional diagnostic accuracy study comparing Humphrey central 30-2 SITA threshold programme with a screening protocol for SKP on Octopus perimetry. Humphrey 24-2 data were extracted from 30-2 results. Results were independently graded for presence/absence of field defect plus severity of defect. Fifty patients (100 eyes) were recruited (25 males and 25 females), with mean age of 52.4 years (SD = 15.7). Order of perimeter assessment (Humphrey/Octopus first) and order of eye tested (right/left first) were randomised. The 30-2 programme detected visual field loss in 85%, the 24-2 programme in 80%, and the Octopus combined kinetic/static strategy in 100% of eyes. Peripheral visual field loss was missed by central threshold assessment. Qualitative comparison of type of visual field defect demonstrated a match between Humphrey and Octopus results in 58%, with a match for severity of defect in 50%. Tests duration was 9.34 minutes (SD = 2.02) for Humphrey 30-2 versus 10.79 minutes (SD = 4.06) for Octopus perimetry. Octopus semi-automated kinetic perimetry was found to be superior to central static testing for detection of pituitary disease-related visual field loss. Where reliant on Humphrey central static perimetry, the 30-2 programme is recommended over the 24-2 programme. Where kinetic perimetry is available, this is preferable to central static programmes for increased detection of peripheral visual field loss. PMID:27928344

Impact of Magnetic Field on Pressures of Programmable Cerebrospinal Fluid Shunts: An Experimental Study.

PubMed

Altun, Idiris; Yuksel, Kasim Zafer; Mert, Tufan

2017-01-01

To investigate whether programmable cerebrospinal fluid (CSF) shunts are influenced by exposure to the magnetic field and to compare the effects of magnetic field in 4 different brands of programmable CSF shunts. This experimental study was performed in the laboratory using a novel design of magnetic field. Four types of programmable CSF shunts (Miethke®, Medtronic®, Sophysa® and Codman®Hakim®) were exposed to the magnetic field generated by an apparatus consisting of Helmholtz coil for 5 minutes. In every CSF shunt, initial pressures were adjusted to 110 mm H2O and pressures after exposure to magnetic field were noted. These measurements were implemented at frequencies of 5 Hz, 20 Hz, 30 Hz, 40 Hz, 60 Hz and 80 Hz. In each type, three shunts were utilized and evaluations were made twice for every shunt. At 5, 30, 40 and 60 Hz, Groups 1, 2 and 3 had significantly higher average pressures than Group 4. At 20 and 80 Hz, Groups 1 and 2 had notably different pressure values than Groups 3 and 4. Group 3 displayed the highest pressure, while Group 4 demonstrated the lowest pressure. Exposure to magnetic fields may affect the pressures of programmable CSF shunts. However, further controlled, clinical trials are warranted to elucidate the in-vivo effects of magnetic field exposure.

Lessons learnt from a three-year pilot field epidemiology training programme

PubMed Central

Durand, A Mark; Hancock, Thane; Cash, Haley L; Hardie, Kate; Paterson, Beverley; Paulino, Yvette; White, Paul; Merritt, Tony; Fitzgibbons, Dawn; Gopalani, Sameer Vali; Flint, James; Edwin A Merilles, Onofre; Kashiwabara, Mina; Biaukula, Viema; Lepers, Christelle; Souares, Yvan; Nilles, Eric; Batikawai, Anaseini; Huseynova, Sevil; Patel, Mahomed; Saketa, Salanieta T; Durrheim, David; Henderson, Alden; Roth, Adam

2017-01-01

Problem The Pacific region has widely dispersed populations, limited financial and human resources and a high burden of disease. There is an urgent need to improve the availability, reliability and timeliness of useable health data. Context The purpose of this paper is to share lessons learnt from a three-year pilot field epidemiology training programme that was designed to respond to these Pacific health challenges. The pilot programme built on and further developed an existing field epidemiology training programme for Pacific health staff. Action The programme was delivered in country by epidemiologists working for Pacific Public Health Surveillance Network partners. The programme consisted of five courses: four one-week classroom-based courses and one field epidemiology project. Sessions were structured so that theoretical understanding was achieved through interaction and reinforced through practical hands-on group activities, case studies and other interactive practical learning methods. Outcome As of September 2016, 258 students had commenced the programme. Twenty-six course workshops were delivered and one cohort of students had completed the full five-course programme. The programme proved popular and gained a high level of student engagement. Discussion Face-to-face delivery, a low student-to-facilitator ratio, substantial group work and practical exercises were identified as key factors that contributed to the students developing skills and confidence. Close engagement of leaders and the need to quickly evaluate and adapt the curriculum were important lessons, and the collaboration between external partners was considered important for promoting a harmonized approach to health needs in the Pacific. PMID:29051838

International Field Experience--What Do Student Teachers Learn?

ERIC Educational Resources Information Center

Lee, Jackie Fung King

2011-01-01

This inquiry aimed to examine the benefits of having international field experience for a group of Hong Kong postgraduate student teachers who joined a six-week immersion programme in New Zealand. Through participants' reflections, interviews and programme evaluations, the present investigation found that the overseas field experience not only…

Moving Horizon Estimation on a Chip

DTIC Science & Technology

2014-06-26

description, e.g. VHDL or Verilog, for FPGA implementation . Especially for those whose main expertise is in control system design, writing algorithms in C...ditional Kalman Filter(KF) where recursive solution is available. We devel- oped various MHE designs and implemented them on the Xilinx Zynq ZC702 FPGA...practical deployment of the MHE technology. 2.2 Implementation of MHE on FPGA The next paper demonstrated the feasibility of implementing MHE algo

Advanced Wireless Integrated Navy Network - AWINN

DTIC Science & Technology

2005-09-30

progress report No. 3 on AWINN hardware and software configurations of smart , wideband, multi-function antennas, secure configurable platform, close-in...results to the host PC via a UART soft core. The UART core used is a proprietary Xilinx core which incorporates features described in National...current software uses wheel odometry and visual landmarks to create a map and estimate position on an internal x, y grid . The wheel odometry provides a

Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays

NASA Technical Reports Server (NTRS)

Edwards, R. Timothy; Strohbehn, Kim; Jaskulek, Steven E.; Katz, Richard

1999-01-01

Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.

Wire like link for cycle reproducible and cycle accurate hardware accelerator

DOEpatents

Asaad, Sameh; Kapur, Mohit; Parker, Benjamin D

2015-04-07

First and second field programmable gate arrays are provided which implement first and second blocks of a circuit design to be simulated. The field programmable gate arrays are operated at a first clock frequency and a wire like link is provided to send a plurality of signals between them. The wire like link includes a serializer, on the first field programmable gate array, to serialize the plurality of signals; a deserializer on the second field programmable gate array, to deserialize the plurality of signals; and a connection between the serializer and the deserializer. The serializer and the deserializer are operated at a second clock frequency, greater than the first clock frequency, and the second clock frequency is selected such that latency of transmission and reception of the plurality of signals is less than the period corresponding to the first clock frequency.

Field programmable chemistry: integrated chemical and electronic processing of informational molecules towards electronic chemical cells.

PubMed

Wagler, Patrick F; Tangen, Uwe; Maeke, Thomas; McCaskill, John S

2012-07-01

The topic addressed is that of combining self-constructing chemical systems with electronic computation to form unconventional embedded computation systems performing complex nano-scale chemical tasks autonomously. The hybrid route to complex programmable chemistry, and ultimately to artificial cells based on novel chemistry, requires a solution of the two-way massively parallel coupling problem between digital electronics and chemical systems. We present a chemical microprocessor technology and show how it can provide a generic programmable platform for complex molecular processing tasks in Field Programmable Chemistry, including steps towards the grand challenge of constructing the first electronic chemical cells. Field programmable chemistry employs a massively parallel field of electrodes, under the control of latched voltages, which are used to modulate chemical activity. We implement such a field programmable chemistry which links to chemistry in rather generic, two-phase microfluidic channel networks that are separated into weakly coupled domains. Electric fields, produced by the high-density array of electrodes embedded in the channel floors, are used to control the transport of chemicals across the hydrodynamic barriers separating domains. In the absence of electric fields, separate microfluidic domains are essentially independent with only slow diffusional interchange of chemicals. Electronic chemical cells, based on chemical microprocessors, exploit a spatially resolved sandwich structure in which the electronic and chemical systems are locally coupled through homogeneous fine-grained actuation and sensor networks and play symmetric and complementary roles. We describe how these systems are fabricated, experimentally test their basic functionality, simulate their potential (e.g. for feed forward digital electrophoretic (FFDE) separation) and outline the application to building electronic chemical cells. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.

EHWPACK: An evolvable hardware environment using the SPICE simulator and the Field Programmable Transistor Array

NASA Technical Reports Server (NTRS)

Keymeulen, D.; Klimeck, G.; Zebulum, R.; Stoica, A.; Jin, Y.; Lazaro, C.

2000-01-01

This paper describes the EHW development system, a tool that performs the evolutionary synthesis of electronic circuits, using the SPICE simulator and the Field Programmable Transistor Array hardware (FPTA) developed at JPL.

Professional Field in the Accreditation Process: Examining Information Technology Programmes at Dutch Universities of Applied Sciences

ERIC Educational Resources Information Center

Frederik, Hans; Hasanefendic, Sandra; van der Sijde, Peter

2017-01-01

In this paper, we analyse 53 Dutch accreditation reports in the field of information technology to assess the mechanisms of the reported involvement of the professional field in the undergraduate programmes of universities of applied sciences. The results of qualitative content analysis reveal a coupling effect in reporting on mechanisms of…

Promoting Field Trip Confidence: Teachers Providing Insights for Pre-Service Education

ERIC Educational Resources Information Center

Ateskan, Armagan; Lane, Jennie F.

2016-01-01

Pre-service teachers need experiences in practical matters as a part of field trip preparations programmes. For 14 years, a private, non-profit university in Turkey has involved pre-service teachers in field trip planning, implementation and evaluation. A programme assessment was conducted through a case study to examine the long-term effects of…

Measuring interdisciplinary research and education outcomes in the Vienna Doctoral Programme on Water Resource Systems

NASA Astrophysics Data System (ADS)

Carr, Gemma; Loucks, Daniel Pete; Blaschke, Alfred Paul; Bucher, Christian; Farnleitner, Andreas; Fürnkranz-Prskawetz, Alexia; Parajka, Juraj; Pfeifer, Norbert; Rechberger, Helmut; Wagner, Wolfgang; Zessner, Matthias; Blöschl, Günter

2015-04-01

The interdisciplinary postgraduate research and education programme - the Vienna Doctoral Programme on Water Resource Systems - was initiated in 2009. To date, 35 research students, three post-docs and ten faculty members have been engaged in the Programme, from ten research fields (aquatic microbiology, hydrology, hydro-climatology, hydro-geology, mathematical economics, photogrammetry, remote sensing, resource management, structural mechanics, and water quality). The Programme aims to develop research students with the capacity to work across the disciplines, to conduct cutting edge research and foster an international perspective. To do this, a variety of mechanisms are adopted that include research cluster groups, joint study sites, joint supervision, a basic study programme and a research semester abroad. The Programme offers a unique case study to explore if and how these mechanisms lead to research and education outcomes. Outcomes are grouped according to whether they are tangible (publications with co-authors from more than one research field, analysis of graduate profiles and career destinations) or non-tangible (interaction between researchers, networks and trust). A mixed methods approach that includes bibliometric analysis combined with interviews with students is applied. Bibliometric analysis shows that as the Programme has evolved the amount of multi-disciplinary work has increased (32% of the 203 full papers produced by the programme's researchers have authors from more than one research field). Network analysis to explore which research fields collaborate most frequently show that hydrology plays a significant role and has collaborated with seven of the ten research fields. Hydrology researchers seem to interact the most strongly with other research fields as they contribute understanding on water system processes. Network analysis to explore which individuals collaborate shows that much joint work takes place through the five research cluster groups (water resource management, land-surface processes, Hydrological Open Air Laboratory, water and health, modelling and risk). Student interviews highlight that trust between colleagues and supervisors, and the role of spaces for interaction (joint study sites, cluster group meetings, shared offices etc.) are important for joint work. Graduate analysis shows that students develop skills and confidence to work across disciplines through collaborating on their doctoral research. Working collaboratively during the doctorate appears to be strongly correlated with continuing to work in this way after graduation.

Semantically Aware Foundation Environment (SAFE) for Clean-Slate Design of Resilient, Adaptive Secure Hosts (CRASH)

DTIC Science & Technology

2016-02-01

system consists of a high-fidelity hardware simulation using field programmable gate arrays (FPGAs), with a set of runtime services (ConcreteWare...perimeter protection, patch, and pray” is not aligned with the threat. Programmers will not bail us out of this situation (by writing defect free code...hosted on a Field Programmable Gate Array (FPGA), with a set of runtime services (concreteware) running on the hardware. Secure applications can be

FPGA Implementation of Reed-Solomon Decoder for IEEE 802.16 WiMAX Systems using Simulink-Sysgen Design Environment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bobrek, Miljko; Albright, Austin P

This paper presents FPGA implementation of the Reed-Solomon decoder for use in IEEE 802.16 WiMAX systems. The decoder is based on RS(255,239) code, and is additionally shortened and punctured according to the WiMAX specifications. Simulink model based on Sysgen library of Xilinx blocks was used for simulation and hardware implementation. At the end, simulation results and hardware implementation performances are presented.

FPGA Implementation of Burst-Mode Synchronization for SOQSPK-TG

DTIC Science & Technology

2014-06-01

is normalized to π. The proposed burst-mode architecture is written in VHDL and verified using Modelsim. The VHDL design is implemented on a Xilinx...Document Number: SET 2014-0043 412TW-PA-14298 FPGA Implementation of Burst-Mode Synchronization for SOQSPK-TG June 2014 Final Report Test...To) 9/11 -- 8/14 4. TITLE AND SUBTITLE FPGA Implementation of Burst-Mode Synchronization for SOQSPK-TG 5a. CONTRACT NUMBER: W900KK-11-C-0032 5b

Serial data acquisition for GEM-2D detector

NASA Astrophysics Data System (ADS)

Kolasinski, Piotr; Pozniak, Krzysztof T.; Czarski, Tomasz; Linczuk, Maciej; Byszuk, Adrian; Chernyshova, Maryna; Juszczyk, Bartlomiej; Kasprowicz, Grzegorz; Wojenski, Andrzej; Zabolotny, Wojciech; Zienkiewicz, Pawel; Mazon, Didier; Malard, Philippe; Herrmann, Albrecht; Vezinet, Didier

2014-11-01

This article debates about data fast acquisition and histogramming method for the X-ray GEM detector. The whole process of histogramming is performed by FPGA chips (Spartan-6 series from Xilinx). The results of the histogramming process are stored in an internal FPGA memory and then sent to PC. In PC data is merged and processed by MATLAB. The structure of firmware functionality implemented in the FPGAs is described. Examples of test measurements and results are presented.

Neuro-Inspired Spike-Based Motion: From Dynamic Vision Sensor to Robot Motor Open-Loop Control through Spike-VITE

PubMed Central

Perez-Peña, Fernando; Morgado-Estevez, Arturo; Linares-Barranco, Alejandro; Jimenez-Fernandez, Angel; Gomez-Rodriguez, Francisco; Jimenez-Moreno, Gabriel; Lopez-Coronado, Juan

2013-01-01

In this paper we present a complete spike-based architecture: from a Dynamic Vision Sensor (retina) to a stereo head robotic platform. The aim of this research is to reproduce intended movements performed by humans taking into account as many features as possible from the biological point of view. This paper fills the gap between current spike silicon sensors and robotic actuators by applying a spike processing strategy to the data flows in real time. The architecture is divided into layers: the retina, visual information processing, the trajectory generator layer which uses a neuroinspired algorithm (SVITE) that can be replicated into as many times as DoF the robot has; and finally the actuation layer to supply the spikes to the robot (using PFM). All the layers do their tasks in a spike-processing mode, and they communicate each other through the neuro-inspired AER protocol. The open-loop controller is implemented on FPGA using AER interfaces developed by RTC Lab. Experimental results reveal the viability of this spike-based controller. Two main advantages are: low hardware resources (2% of a Xilinx Spartan 6) and power requirements (3.4 W) to control a robot with a high number of DoF (up to 100 for a Xilinx Spartan 6). It also evidences the suitable use of AER as a communication protocol between processing and actuation. PMID:24264330

Neuro-inspired spike-based motion: from dynamic vision sensor to robot motor open-loop control through spike-VITE.

PubMed

Perez-Peña, Fernando; Morgado-Estevez, Arturo; Linares-Barranco, Alejandro; Jimenez-Fernandez, Angel; Gomez-Rodriguez, Francisco; Jimenez-Moreno, Gabriel; Lopez-Coronado, Juan

2013-11-20

In this paper we present a complete spike-based architecture: from a Dynamic Vision Sensor (retina) to a stereo head robotic platform. The aim of this research is to reproduce intended movements performed by humans taking into account as many features as possible from the biological point of view. This paper fills the gap between current spike silicon sensors and robotic actuators by applying a spike processing strategy to the data flows in real time. The architecture is divided into layers: the retina, visual information processing, the trajectory generator layer which uses a neuroinspired algorithm (SVITE) that can be replicated into as many times as DoF the robot has; and finally the actuation layer to supply the spikes to the robot (using PFM). All the layers do their tasks in a spike-processing mode, and they communicate each other through the neuro-inspired AER protocol. The open-loop controller is implemented on FPGA using AER interfaces developed by RTC Lab. Experimental results reveal the viability of this spike-based controller. Two main advantages are: low hardware resources (2% of a Xilinx Spartan 6) and power requirements (3.4 W) to control a robot with a high number of DoF (up to 100 for a Xilinx Spartan 6). It also evidences the suitable use of AER as a communication protocol between processing and actuation.

Adaptation, Evaluation and Inclusion

ERIC Educational Resources Information Center

Basson, R.

2011-01-01

In this article I reflect on a recent development currently shaping programme evaluation as field, which makes the case for evaluators facilitating evaluation training evaluees to self-evaluate and improve the programmes they teach. Fetterman argues persuasively that the practice was incipient in the field and required formalization and acceptance…

Convolutional Neural Network on Embedded Linux(trademark) System-on-Chip: A Methodology and Performance Benchmark

DTIC Science & Technology

2016-05-01

A9 CPU and 15 W for the i7 CPU. A method of accelerating this computation is by using a customized hardware unit called a field- programmable gate...implementation of custom logic to accelerate com- putational workloads. This FPGA fabric, in addition to the standard programmable logic, contains 220...chip; field- programmable gate array Daniel Gebhardt U U U U 18 (619) 553-2786 INITIAL DISTRIBUTION 84300 Library (2) 85300 Archive/Stock (1

Convolutional Neural Network on Embedded Linux System-on-Chip: A Methodology and Performance Benchmark

DTIC Science & Technology

2016-05-01

A9 CPU and 15 W for the i7 CPU. A method of accelerating this computation is by using a customized hardware unit called a field- programmable gate...implementation of custom logic to accelerate com- putational workloads. This FPGA fabric, in addition to the standard programmable logic, contains 220...chip; field- programmable gate array Daniel Gebhardt U U U U 18 (619) 553-2786 INITIAL DISTRIBUTION 84300 Library (2) 85300 Archive/Stock (1

Environmental Learning Using a Problem-Based Approach in the Field: A Case Study of a Hong Kong School

ERIC Educational Resources Information Center

Kwan, Tammy; So, Max

2008-01-01

This study investigated the environmental learning of a group of senior geography students through a problem-based learning (PBL) field programme to see if the goals of education "for" the environment could be accomplished. In the PBL field programme, the students were given a problem statement concerning a real-life scenario of an old…

Efficient Implementation of a Symbol Timing Estimator for Broadband PLC.

PubMed

Nombela, Francisco; García, Enrique; Mateos, Raúl; Hernández, Álvaro

2015-08-21

Broadband Power Line Communications (PLC) have taken advantage of the research advances in multi-carrier modulations to mitigate frequency selective fading, and their adoption opens up a myriad of applications in the field of sensory and automation systems, multimedia connectivity or smart spaces. Nonetheless, the use of these multi-carrier modulations, such as Wavelet-OFDM, requires a highly accurate symbol timing estimation for reliably recovering of transmitted data. Furthermore, the PLC channel presents some particularities that prevent the direct use of previous synchronization algorithms proposed in wireless communication systems. Therefore more research effort should be involved in the design and implementation of novel and robust synchronization algorithms for PLC, thus enabling real-time synchronization. This paper proposes a symbol timing estimator for broadband PLC based on cross-correlation with multilevel complementary sequences or Zadoff-Chu sequences and its efficient implementation in a FPGA; the obtained results show a 90% of success rate in symbol timing estimation for a certain PLC channel model and a reduced resource consumption for its implementation in a Xilinx Kyntex FPGA.

Report of the Director-General on the Long-Term Programme in the Field of Hydrology.

ERIC Educational Resources Information Center

United Nations Educational, Scientific, and Cultural Organization, Paris (France). General Conference.

The report describes the principal orientations of the International Hydrological Programme, as well as the procedures suggested for its execution. The origin and justification of the programme are presented. The objectives of the 1975 programme are stated and the contents, which include the activities, themes, application of new techniques in…

Enhancing Learning Effectiveness in Digital Design Courses through the Use of Programmable Logic Boards

ERIC Educational Resources Information Center

Zhu, Yi; Weng, T.; Cheng, Chung-Kuan

2009-01-01

Incorporating programmable logic devices (PLD) in digital design courses has become increasingly popular. The advantages of using PLDs, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGA), have been discussed before. However, previous studies have focused on the experiences from the point of view of the…

Expectations of Majlis Amanah Rakyat (MARA) Stakeholders on the Ulul Albab Curriculum at a MARA Junior Science College (MRSM)

ERIC Educational Resources Information Center

Manaf, Umi Kalthom Abdul; Alias, Nurul Fitriah; Azman, Ady Hameme Nor; Rahman, Fadzilah Abdul; Zulkifli, Hafizah

2014-01-01

Ulul Albab is an educational programme of integration between the existing programmes in MARA Junior Science College (MRSM) with the religious school programme including Tahfiz Al-Quran. MRSM Ulul Albab education programme is designed to produce professional experts, entrepreneurs and technocrats that are well versed in the field of religion-based…

Transition to blended learning: experiences from the first year of our blended learning Bachelor of Nursing Studies programme.

PubMed

Sweeney, Mary-Rose; Kirwan, Anne; Kelly, Mary; Corbally, Melissa; O Neill, Sandra; Kirwan, Mary; Hourican, Susan; Matthews, Anne; Hussey, Pamela

2016-10-01

The School of Nursing at Dublin City University offered a new blended learning Bachelor of Nursing Studies programme in the academic year 2011. To document the experiences of the academic team making the transition from a face-to-face classroom-delivered programme to the new blended learning format. Academics who delivered the programme were asked to describe their experiences of developing the new programme via two focus groups. Five dominant themes were identified: Staff Readiness; Student Readiness; Programme Delivery and Student Engagement; Assessment of Module Learning Outcomes and Feedback; and Reflecting on the First Year and Thinking of the Future. Face-to-face tutorials were identified as very important to both academics and students. Reservations about whether migrating the programme to an online format encouraged students to engage in additional practices of plagiarism were expressed by some. Student ability/readiness to engage with technology-enhanced learning was an important determinant of their own success academically. In the field of nursing blended learning is a relatively new and emerging field which will require huge cultural shifts for staff and students alike.

Design Considerations for a Computationally-Lightweight Authentication Mechanism for Passive RFID Tags

DTIC Science & Technology

2009-09-01

suffer the power and complexity requirements of a public key system. 28 In [18], a simulation of the SHA –1 algorithm is performed on a Xilinx FPGA ... 256 bits. Thus, the construction of a hash table would need 2512 independent comparisons. It is known that hash collisions of the SHA –1 algorithm... SHA –1 algorithm for small-core FPGA design. Small-core FPGA design is the process by which a circuit is adapted to use the minimal amount of logic

FPGA based charge fast histogramming for GEM detector

NASA Astrophysics Data System (ADS)

Poźniak, Krzysztof T.; Byszuk, A.; Chernyshova, M.; Cieszewski, R.; Czarski, T.; Dominik, W.; Jakubowska, K.; Kasprowicz, G.; Rzadkiewicz, J.; Scholz, M.; Zabolotny, W.

2013-10-01

This article presents a fast charge histogramming method for the position sensitive X-ray GEM detector. The energy resolved measurements are carried out simultaneously for 256 channels of the GEM detector. The whole process of histogramming is performed in 21 FPGA chips (Spartan-6 series from Xilinx) . The results of the histogramming process are stored in an external DDR3 memory. The structure of an electronic measuring equipment and a firmware functionality implemented in the FPGAs is described. Examples of test measurements are presented.

Fast data transmission from serial data acquisition for the GEM detector system

NASA Astrophysics Data System (ADS)

Kolasinski, Piotr; Pozniak, Krzysztof T.; Czarski, Tomasz; Byszuk, Adrian; Chernyshova, Maryna; Kasprowicz, Grzegorz; Krawczyk, Rafal D.; Wojenski, Andrzej; Zabolotny, Wojciech

2015-09-01

This article proposes new method of storing data and transferring it to PC in the X-ray GEM detector system. The whole process is performed by FPGA chips (Spartan-6 series from Xilinx). Comparing to previous methods, new approach allows to store much more data in the system. New, improved implementation of the communication algorithm significantly increases transfer rate between system and PC. In PC data is merged and processed by MATLAB. The structure of firmware implemented in the FPGAs is described.

Walking the Talk: Towards a More Inclusive Field of Disability Studies

ERIC Educational Resources Information Center

Opini, Bathseba

2016-01-01

This paper is a conversation about growing an inclusive field of disability studies. The paper draws on data collected through an analysis of existing disability studies programmes in selected Canadian universities. The paper makes a case for including diverse perspectives, experiences, viewpoints, and voices in these programmes. In this work, I…

Development of a Low-Cost and High-speed Single Event Effects Testers based on Reconfigurable Field Programmable Gate Arrays (FPGA)

NASA Technical Reports Server (NTRS)

Howard, J. W.; Kim, H.; Berg, M.; LaBel, K. A.; Stansberry, S.; Friendlich, M.; Irwin, T.

2006-01-01

A viewgraph presentation on the development of a low cost, high speed tester reconfigurable Field Programmable Gata Array (FPGA) is shown. The topics include: 1) Introduction; 2) Objectives; 3) Tester Descriptions; 4) Tester Validations and Demonstrations; 5) Future Work; and 6) Summary.

Beyond Constructivism: The Progressive Research Programme into Learning Science

ERIC Educational Resources Information Center

Taber, Keith S.

2006-01-01

In this paper, it is suggested that while there are a variety of frames or perspectives that guide research into learning science, a pre-paradigmatic field need not be a "free-for-all". Lakatos suggested that academic research fields were characterised by research programmes (RP), which offered heuristic guidance to researchers, and which…

A simple laser locking system based on a field-programmable gate array.

PubMed

Jørgensen, N B; Birkmose, D; Trelborg, K; Wacker, L; Winter, N; Hilliard, A J; Bason, M G; Arlt, J J

2016-07-01

Frequency stabilization of laser light is crucial in both scientific and industrial applications. Technological developments now allow analog laser stabilization systems to be replaced with digital electronics such as field-programmable gate arrays, which have recently been utilized to develop such locking systems. We have developed a frequency stabilization system based on a field-programmable gate array, with emphasis on hardware simplicity, which offers a user-friendly alternative to commercial and previous home-built solutions. Frequency modulation, lock-in detection, and a proportional-integral-derivative controller are programmed on the field-programmable gate array and only minimal additional components are required to frequency stabilize a laser. The locking system is administered from a host-computer which provides comprehensive, long-distance control through a versatile interface. Various measurements were performed to characterize the system. The linewidth of the locked laser was measured to be 0.7 ± 0.1 MHz with a settling time of 10 ms. The system can thus fully match laser systems currently in use for atom trapping and cooling applications.

A simple laser locking system based on a field-programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jørgensen, N. B.; Birkmose, D.; Trelborg, K.

Frequency stabilization of laser light is crucial in both scientific and industrial applications. Technological developments now allow analog laser stabilization systems to be replaced with digital electronics such as field-programmable gate arrays, which have recently been utilized to develop such locking systems. We have developed a frequency stabilization system based on a field-programmable gate array, with emphasis on hardware simplicity, which offers a user-friendly alternative to commercial and previous home-built solutions. Frequency modulation, lock-in detection, and a proportional-integral-derivative controller are programmed on the field-programmable gate array and only minimal additional components are required to frequency stabilize a laser. The lockingmore » system is administered from a host-computer which provides comprehensive, long-distance control through a versatile interface. Various measurements were performed to characterize the system. The linewidth of the locked laser was measured to be 0.7 ± 0.1 MHz with a settling time of 10 ms. The system can thus fully match laser systems currently in use for atom trapping and cooling applications.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Batista, Antonio J. N.; Santos, Bruno; Fernandes, Ana

The data acquisition and control instrumentation cubicles room of the ITER tokamak will be irradiated with neutrons during the fusion reactor operation. A Virtex-6 FPGA from Xilinx (XC6VLX365T-1FFG1156C) is used on the ATCA-IO-PROCESSOR board, included in the ITER Catalog of I and C products - Fast Controllers. The Virtex-6 is a re-programmable logic device where the configuration is stored in Static RAM (SRAM), functional data stored in dedicated Block RAM (BRAM) and functional state logic in Flip-Flops. Single Event Upsets (SEU) due to the ionizing radiation of neutrons causes soft errors, unintended changes (bit-flips) to the values stored in statemore » elements of the FPGA. The SEU monitoring and soft errors repairing, when possible, were explored in this work. An FPGA built-in Soft Error Mitigation (SEM) controller detects and corrects soft errors in the FPGA configuration memory. Novel SEU sensors with Error Correction Code (ECC) detect and repair the BRAM memories. Proper management of SEU can increase reliability and availability of control instrumentation hardware for nuclear applications. The results of the tests performed using the SEM controller and the BRAM SEU sensors are presented for a Virtex-6 FPGA (XC6VLX240T-1FFG1156C) when irradiated with neutrons from the Portuguese Research Reactor (RPI), a 1 MW nuclear fission reactor operated by IST in the neighborhood of Lisbon. Results show that the proposed SEU mitigation technique is able to repair the majority of the detected SEU errors in the configuration and BRAM memories. (authors)« less

Rethinking programme evaluation in health professions education: beyond 'did it work?'.

PubMed

Haji, Faizal; Morin, Marie-Paule; Parker, Kathryn

2013-04-01

For nearly 40 years, outcome-based models have dominated programme evaluation in health professions education. However, there is increasing recognition that these models cannot address the complexities of the health professions context and studies employing alternative evaluation approaches that are appearing in the literature. A similar paradigm shift occurred over 50 years ago in the broader discipline of programme evaluation. Understanding the development of contemporary paradigms within this field provides important insights to support the evolution of programme evaluation in the health professions. In this discussion paper, we review the historical roots of programme evaluation as a discipline, demonstrating parallels with the dominant approach to evaluation in the health professions. In tracing the evolution of contemporary paradigms within this field, we demonstrate how their aim is not only to judge a programme's merit or worth, but also to generate information for curriculum designers seeking to adapt programmes to evolving contexts, and researchers seeking to generate knowledge to inform the work of others. From this evolution, we distil seven essential elements of educational programmes that should be evaluated to achieve the stated goals. Our formulation is not a prescriptive method for conducting programme evaluation; rather, we use these elements as a guide for the development of a holistic 'programme of evaluation' that involves multiple stakeholders, uses a combination of available models and methods, and occurs throughout the life of a programme. Thus, these elements provide a roadmap for the programme evaluation process, which allows evaluators to move beyond asking whether a programme worked, to establishing how it worked, why it worked and what else happened. By engaging in this process, evaluators will generate a sound understanding of the relationships among programmes, the contexts in which they operate, and the outcomes that result from them. © Blackwell Publishing Ltd 2013.

An Undergraduate Course and Laboratory in Digital Signal Processing with Field Programmable Gate Arrays

ERIC Educational Resources Information Center

Meyer-Base, U.; Vera, A.; Meyer-Base, A.; Pattichis, M. S.; Perry, R. J.

2010-01-01

In this paper, an innovative educational approach to introducing undergraduates to both digital signal processing (DSP) and field programmable gate array (FPGA)-based design in a one-semester course and laboratory is described. While both DSP and FPGA-based courses are currently present in different curricula, this integrated approach reduces the…

School Inclusion Programmes (SIPS)

ERIC Educational Resources Information Center

Drossinou-Korea, Maria; Matousi, Dimitra; Panopoulos, Nikolaos; Paraskevopoulou, Aikaterini

2016-01-01

The purpose of this work was to understand the school inclusion programmes (SIPs) for students with special educational needs (SEN). The methodology was conducted in the field of special education (SE) and focuses on three case studies of students who was supported by SIPs. The Targeted, Individual, Structured, Inclusion Programme for students…

FPGA-based RF spectrum merging and adaptive hopset selection

NASA Astrophysics Data System (ADS)

McLean, R. K.; Flatley, B. N.; Silvius, M. D.; Hopkinson, K. M.

The radio frequency (RF) spectrum is a limited resource. Spectrum allotment disputes stem from this scarcity as many radio devices are confined to a fixed frequency or frequency sequence. One alternative is to incorporate cognition within a reconfigurable radio platform, therefore enabling the radio to adapt to dynamic RF spectrum environments. In this way, the radio is able to actively sense the RF spectrum, decide, and act accordingly, thereby sharing the spectrum and operating in more flexible manner. In this paper, we present a novel solution for merging many distributed RF spectrum maps into one map and for subsequently creating an adaptive hopset. We also provide an example of our system in operation, the result of which is a pseudorandom adaptive hopset. The paper then presents a novel hardware design for the frequency merger and adaptive hopset selector, both of which are written in VHDL and implemented as a custom IP core on an FPGA-based embedded system using the Xilinx Embedded Development Kit (EDK) software tool. The design of the custom IP core is optimized for area, and it can process a high-volume digital input via a low-latency circuit architecture. The complete embedded system includes the Xilinx PowerPC microprocessor, UART serial connection, and compact flash memory card IP cores, and our custom map merging/hopset selection IP core, all of which are targeted to the Virtex IV FPGA. This system is then incorporated into a cognitive radio prototype on a Rice University Wireless Open Access Research Platform (WARP) reconfigurable radio.

High speed wide field CMOS camera for Transneptunian Automatic Occultation Survey

NASA Astrophysics Data System (ADS)

Wang, Shiang-Yu; Geary, John C.; Amato, Stephen M.; Hu, Yen-Sang; Ling, Hung-Hsu; Huang, Pin-Jie; Furesz, Gabor; Chen, Hsin-Yo; Chang, Yin-Chang; Szentgyorgyi, Andrew; Lehner, Matthew; Norton, Timothy

2014-08-01

The Transneptunian Automated Occultation Survey (TAOS II) is a three robotic telescope project to detect the stellar occultation events generated by Trans Neptunian Objects (TNOs). TAOS II project aims to monitor about 10000 stars simultaneously at 20Hz to enable statistically significant event rate. The TAOS II camera is designed to cover the 1.7 degree diameter field of view (FoV) of the 1.3m telescope with 10 mosaic 4.5kx2k CMOS sensors. The new CMOS sensor has a back illumination thinned structure and high sensitivity to provide similar performance to that of the backillumination thinned CCDs. The sensor provides two parallel and eight serial decoders so the region of interests can be addressed and read out separately through different output channels efficiently. The pixel scale is about 0.6"/pix with the 16μm pixels. The sensors, mounted on a single Invar plate, are cooled to the operation temperature of about 200K by a cryogenic cooler. The Invar plate is connected to the dewar body through a supporting ring with three G10 bipods. The deformation of the cold plate is less than 10μm to ensure the sensor surface is always within ±40μm of focus range. The control electronics consists of analog part and a Xilinx FPGA based digital circuit. For each field star, 8×8 pixels box will be readout. The pixel rate for each channel is about 1Mpix/s and the total pixel rate for each camera is about 80Mpix/s. The FPGA module will calculate the total flux and also the centroid coordinates for every field star in each exposure.

Seven years of the field epidemiology training programme (FETP) at Chennai, Tamil Nadu, India: an internal evaluation

PubMed Central

2012-01-01

Background During 2001–2007, the National Institute of Epidemiology (NIE), Chennai, Tamil Nadu, India admitted 80 trainees in its two-year Field Epidemiology Training Programme (FETP). We evaluated the first seven years of the programme to identify strengths and weaknesses. Methods We identified core components of the programme and broke them down into input, process, output and outcome. We developed critical indicators to reflect the logic model. We reviewed documents including fieldwork reports, abstracts listed in proceedings and papers published in Medline-indexed journals. We conducted an anonymous online survey of the graduates to collect information on self-perceived competencies, learning activities, field assignments, supervision, curriculum, relevance to career goals, strengths and weaknesses. Results Of the 80 students recruited during 2001–2007, 69 (86%) acquired seven core competencies (epidemiology, surveillance, outbreaks, research, human subjects protection, communication and management) and graduated through completion of at least six field assignments. The faculty-to-student ratio ranged between 0.4 and 0.12 (expected: 0.25). The curriculum was continuously adapted with all resources available on-line. Fieldwork led to the production of 158 scientific communications presented at international meetings and to 29 manuscripts accepted in indexed, peer-reviewed journals. The online survey showed that while most graduates acquired competencies, unmet needs persisted in laboratory sciences, data analysis tools and faculty-to-student ratio. Conclusions NIE adapted the international FETP model to India. However, further efforts are required to scale up the programme and to develop career tracks for field epidemiologists in the country. PMID:23013473

Those Who Can, Teach: The Academic Quality of Preservice Students in Teacher Education Programmes in Taiwan

ERIC Educational Resources Information Center

Wang, Hsiou-Huai; Huang, Chin-Chun

2016-01-01

Difficulty in recruiting high-calibre individuals into teaching is a perennial issue in the field of teacher education. In some countries, students in teacher programmes are in general found to be lower in academic standing than their counterparts in other fields, which might lead to belief in the old saying that "those who cannot,…

The Broad Effectiveness of Seventy-Four Field Instances of Abstinence-Based Programming

ERIC Educational Resources Information Center

Birch, Paul James; White, Joseph M.; Fellows, Kaylene

2017-01-01

Evaluations of a large federally funded sexual risk avoidance education (SRAE) efforts in the USA have not been widely reported in the wake of funding cuts. The purpose of this study is to report results from a broad set of programmes to demonstrate the breadth of field effectiveness of these programmes. Twenty-seven separate community-based SRAE…

Systems and methods for detecting a failure event in a field programmable gate array

NASA Technical Reports Server (NTRS)

Ng, Tak-Kwong (Inventor); Herath, Jeffrey A. (Inventor)

2009-01-01

An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh operation in the FPGA. The method also includes reading an outcome value from the signature memory.

Parallel point-multiplication architecture using combined group operations for high-speed cryptographic applications

PubMed Central

Saeedi, Ehsan; Kong, Yinan

2017-01-01

In this paper, we propose a novel parallel architecture for fast hardware implementation of elliptic curve point multiplication (ECPM), which is the key operation of an elliptic curve cryptography processor. The point multiplication over binary fields is synthesized on both FPGA and ASIC technology by designing fast elliptic curve group operations in Jacobian projective coordinates. A novel combined point doubling and point addition (PDPA) architecture is proposed for group operations to achieve high speed and low hardware requirements for ECPM. It has been implemented over the binary field which is recommended by the National Institute of Standards and Technology (NIST). The proposed ECPM supports two Koblitz and random curves for the key sizes 233 and 163 bits. For group operations, a finite-field arithmetic operation, e.g. multiplication, is designed on a polynomial basis. The delay of a 233-bit point multiplication is only 3.05 and 3.56 μs, in a Xilinx Virtex-7 FPGA, for Koblitz and random curves, respectively, and 0.81 μs in an ASIC 65-nm technology, which are the fastest hardware implementation results reported in the literature to date. In addition, a 163-bit point multiplication is also implemented in FPGA and ASIC for fair comparison which takes around 0.33 and 0.46 μs, respectively. The area-time product of the proposed point multiplication is very low compared to similar designs. The performance (1Area×Time=1AT) and Area × Time × Energy (ATE) product of the proposed design are far better than the most significant studies found in the literature. PMID:28459831

Parallel point-multiplication architecture using combined group operations for high-speed cryptographic applications.

PubMed

Hossain, Md Selim; Saeedi, Ehsan; Kong, Yinan

2017-01-01

In this paper, we propose a novel parallel architecture for fast hardware implementation of elliptic curve point multiplication (ECPM), which is the key operation of an elliptic curve cryptography processor. The point multiplication over binary fields is synthesized on both FPGA and ASIC technology by designing fast elliptic curve group operations in Jacobian projective coordinates. A novel combined point doubling and point addition (PDPA) architecture is proposed for group operations to achieve high speed and low hardware requirements for ECPM. It has been implemented over the binary field which is recommended by the National Institute of Standards and Technology (NIST). The proposed ECPM supports two Koblitz and random curves for the key sizes 233 and 163 bits. For group operations, a finite-field arithmetic operation, e.g. multiplication, is designed on a polynomial basis. The delay of a 233-bit point multiplication is only 3.05 and 3.56 μs, in a Xilinx Virtex-7 FPGA, for Koblitz and random curves, respectively, and 0.81 μs in an ASIC 65-nm technology, which are the fastest hardware implementation results reported in the literature to date. In addition, a 163-bit point multiplication is also implemented in FPGA and ASIC for fair comparison which takes around 0.33 and 0.46 μs, respectively. The area-time product of the proposed point multiplication is very low compared to similar designs. The performance ([Formula: see text]) and Area × Time × Energy (ATE) product of the proposed design are far better than the most significant studies found in the literature.

An Efficient, Highly Flexible Multi-Channel Digital Downconverter Architecture

NASA Technical Reports Server (NTRS)

Goodhart, Charles E.; Soriano, Melissa A.; Navarro, Robert; Trinh, Joseph T.; Sigman, Elliott H.

2013-01-01

In this innovation, a digital downconverter has been created that produces a large (16 or greater) number of output channels of smaller bandwidths. Additionally, this design has the flexibility to tune each channel independently to anywhere in the input bandwidth to cover a wide range of output bandwidths (from 32 MHz down to 1 kHz). Both the flexibility in channel frequency selection and the more than four orders of magnitude range in output bandwidths (decimation rates from 32 to 640,000) presented significant challenges to be solved. The solution involved breaking the digital downconversion process into a two-stage process. The first stage is a 2 oversampled filter bank that divides the whole input bandwidth as a real input signal into seven overlapping, contiguous channels represented with complex samples. Using the symmetry of the sine and cosine functions in a similar way to that of an FFT (fast Fourier transform), this downconversion is very efficient and gives seven channels fixed in frequency. An arbitrary number of smaller bandwidth channels can be formed from second-stage downconverters placed after the first stage of downconversion. Because of the overlapping of the first stage, there is no gap in coverage of the entire input bandwidth. The input to any of the second-stage downconverting channels has a multiplexer that chooses one of the seven wideband channels from the first stage. These second-stage downconverters take up fewer resources because they operate at lower bandwidths than doing the entire downconversion process from the input bandwidth for each independent channel. These second-stage downconverters are each independent with fine frequency control tuning, providing extreme flexibility in positioning the center frequency of a downconverted channel. Finally, these second-stage downconverters have flexible decimation factors over four orders of magnitude The algorithm was developed to run in an FPGA (field programmable gate array) at input data sampling rates of up to 1,280 MHz. The current implementation takes a 1,280-MHz real input, and first breaks it up into seven 160-MHz complex channels, each spaced 80 MHz apart. The eighth channel at baseband was not required for this implementation, and led to more optimization. Afterwards, 16 second stage narrow band channels with independently tunable center frequencies and bandwidth settings are implemented A future implementation in a larger Xilinx FPGA will hold up to 32 independent second-stage channels.

In-beam experience with a highly granular DAQ and control network: TrbNet

NASA Astrophysics Data System (ADS)

Michel, J.; Korcyl, G.; Maier, L.; Traxler, M.

2013-02-01

Virtually all Data Acquisition Systems (DAQ) for nuclear and particle physics experiments use a large number of Field Programmable Gate Arrays (FPGAs) for data transport and more complex tasks as pattern recognition and data reduction. All these FPGAs in a large system have to share a common state like a trigger number or an epoch counter to keep the system synchronized for a consistent event/epoch building. Additionally, the collected data has to be transported with high bandwidth, optionally via the ubiquitous Ethernet protocol. Furthermore, the FPGAs' internal states and configuration memories have to be accessed for control and monitoring purposes. Another requirement for a modern DAQ-network is the fault-tolerance for intermittent data errors in the form of automatic retransmission of faulty data. As FPGAs suffer from Single Event Effects when exposed to ionizing particles, the system has to deal with failing FPGAs. The TrbNet protocol was developed taking all these requirements into account. Three virtual channels are merged on one physical medium: The trigger/epoch information is transported with the highest priority. The data channel is second in the priority order, while the control channel is the last. Combined with a small frame size of 80 bit this guarantees a low latency data transport: A system with 100 front-ends can be built with a one-way latency of 2.2 us. The TrbNet-protocol was implemented in each of the 550 FPGAs of the HADES upgrade project and has been successfully used during the Au+Au campaign in April 2012. With 2ṡ106/s Au-ions and 3% interaction ratio the accepted trigger rate is 10 kHz while data is written to storage with 150 MBytes/s. Errors are reliably mitigated via the implemented retransmission of packets and auto-shut-down of individual links. TrbNet was also used for full monitoring of the FEE status. The network stack is written in VHDL and was successfully deployed on various Lattice and Xilinx devices. The TrbNet is also used in other experiments, like systems for detector and electronics development for PANDA and CBM at FAIR. As a platform for such set-ups, e.g. for high-channel time measurement with 15 ps resolution, a generic FPGA platform (TRB3) has been developed.

Porting of an FPGA Based High Data Rate DVB-S2 Modulator

DTIC Science & Technology

2011-06-13

broadcast satellite market. The physical layer is detailed in the ETSI EN 302 307 V 1.1.2 (2006-06) standard. The waveform has seen broad adoption and...independent u IRRC Atar fi I I ii I .• DDS l; OAC Interface ~ (opCIontJ) " " 7 a RRC Filler V; ~ implementation, and one from Xilinx, which is...at 37- 38 is shown in Fignre 6. Additionally, the HDR DVB-S2 waveform running on the BDR-I was tested for interoperability at the physical layer

Electronic readout system for the Belle II imaging Time-Of-Propagation detector

NASA Astrophysics Data System (ADS)

Kotchetkov, Dmitri

2017-07-01

The imaging Time-Of-Propagation (iTOP) detector, constructed for the Belle II experiment at the SuperKEKB e+e- collider, is an 8192-channel high precision Cherenkov particle identification detector with timing resolution below 50 ps. To acquire data from the iTOP, a novel front-end electronic readout system was designed, built, and integrated. Switched-capacitor array application-specific integrated circuits are used to sample analog signals. Triggering, digitization, readout, and data transfer are controlled by Xilinx Zynq-7000 system on a chip devices.

A Mathematical Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms

DTIC Science & Technology

2010-08-01

FPGA throughput [billion samples per second] performance [ Gflop /s] 0 30 60 90 120 150 0 1 2 3 4 5 0 5,000 10,000 15,000 20,000 25,000...30,000 35,000 40,000 45,000 area [slices] DFT 64 (floating point) on Xilinx Virtex-6 FPGA throughput [billion samples per second] performance [ Gflop ...Virtex-6 FPGA throughput [billion samples per second] performance [ Gflop /s] 0 50 100 150 200 250 0 1 2 3 4 5 0 10,000 20,000 30,000 40,000

Skills Utilisation at Work, the Quality of the Study Programme and Fields of Study

ERIC Educational Resources Information Center

Støren, Liv Anne; Arnesen, Clara Åse

2016-01-01

This paper examines the factors that may have impact on the extent to which the knowledge and skills of master's degree graduates in Norway are utilised at work, three years after graduation. The focus is on the impact of the quality of the study programme as well as the graduates' fields of study, when also taking into account other factors…

Exploring the Development of Existing Sex Education Programmes for People with Intellectual Disabilities: An Intervention Mapping Approach

ERIC Educational Resources Information Center

Schaafsma, Dilana; Stoffelen, Joke M. T.; Kok, Gerjo; Curfs, Leopold M. G.

2013-01-01

Background: People with intellectual disabilities face barriers that affect their sexual health. Sex education programmes have been developed by professionals working in the field of intellectual disabilities with the aim to overcome these barriers. The aim of this study was to explore the development of these programmes. Methods: Sex education…

New pathways in the evaluation of programmes for men who perpetrate violence against their female partners.

PubMed

Wojnicka, Katarzyna; Scambor, Christian; Kraus, Heinrich

2016-08-01

Today, evaluation research in the field of intervention programmes for men who perpetrate violence against their female partners still makes a fragmentary impression. Across Europe various evaluation studies have been performed. However, the methodologies applied are too heterogeneous to allow the combination of the results in a meta-analytical way. In this paper we propose a future pathway for organising outcome evaluation studies of domestic violence perpetrator programmes in community settings, so that today's problems in this field can be overcome. In a pragmatic framework that acknowledges the limited pre-conditions for evaluation studies in the area of domestic violence perpetrator programmes as it is today, feasible approaches for outcome evaluation are outlined, with recent developments in the field taken as starting points. The framework for organising future evaluation studies of work with perpetrators of domestic violence is presented together with a strategy to promote this framework. International networks of practitioners and researchers play a central role in this strategy through upskilling the area of practical work, preparing the ground for evaluation research and improving cooperation between practitioners and researchers. This paper is based on the results of the European funded project IMPACT (under the Daphne-III-funding programme of the European Commission). Copyright © 2016 Elsevier Ltd. All rights reserved.

Stability of Programmable Shunt Valve Settings with Simultaneous Use of the Optune Transducer Array: A Case Report.

PubMed

Chan, Andrew K; Birk, Harjus S; Winkler, Ethan A; Viner, Jennifer A; Taylor, Jennie W; McDermott, Michael W

2016-07-07

The Optune® transducer array (Novocure Ltd., Haifa, Israel) is an FDA-approved noninvasive regional therapy that aims to inhibit the growth of glioblastoma multiforme (GBM) cells via utilization of alternating electric fields. Some patients with GBM may develop hydrocephalus and benefit from subsequent shunt placement, but special attention must be paid to patients in whom programmable valves are utilized, given the potential effect of the magnetic fields on valve settings. We present the first case report illustrating the stability of programmable shunt valve settings in a neurosurgical patient undergoing therapy with the Optune device. In this study, shunt valve settings were stable over a period of five days despite Optune therapy. This is reassuring for patients with GBM who require simultaneous treatment with both the Optune device and a programmable shunt system.

A software framework for pipelined arithmetic algorithms in field programmable gate arrays

NASA Astrophysics Data System (ADS)

Kim, J. B.; Won, E.

2018-03-01

Pipelined algorithms implemented in field programmable gate arrays are extensively used for hardware triggers in the modern experimental high energy physics field and the complexity of such algorithms increases rapidly. For development of such hardware triggers, algorithms are developed in C++, ported to hardware description language for synthesizing firmware, and then ported back to C++ for simulating the firmware response down to the single bit level. We present a C++ software framework which automatically simulates and generates hardware description language code for pipelined arithmetic algorithms.

Programmable valve shunts: are they really better?

PubMed

Kataria, Rashim; Kumar, Vimal; Mehta, Veer Singh

2012-01-01

Programmable valve shunts allows selection of opening pressure of shunt valve. In the presented article, a unique complication pertaining to programmable shunts has been discussed. A 5-year-old boy who had tectal plate low grade glioma with obstructive hydrocephalus was managed with Codman programmable ventriculoperitoneal shunt. There was a spontaneous change in the opening pressure of the shunt valve leading to shunt malfunction. Routinely used household appliances produce a magnetic field strong enough to cause change in the setting of shunt valve pressure and may lead to valve malfunction. Other causes of programmable valve malfunction also discussed.

Exploring the development of existing sex education programmes for people with intellectual disabilities: an intervention mapping approach.

PubMed

Schaafsma, Dilana; Stoffelen, Joke M T; Kok, Gerjo; Curfs, Leopold M G

2013-03-01

People with intellectual disabilities face barriers that affect their sexual health. Sex education programmes have been developed by professionals working in the field of intellectual disabilities with the aim to overcome these barriers. The aim of this study was to explore the development of these programmes. Sex education programmes geared to people with intellectual disabilities were examined in the context of the Intervention Mapping protocol. Data were obtained via interviews with the programme developers. All programmes lack specific programme outcomes, do not have a theoretical basis, did not involve members of relevant groups in the development process and lack systematic evaluation. Based on our findings and the literature, we conclude that these programmes are unlikely to be effective. Future programmes should be developed using a more systematic and theory- and evidence-based approach. © 2012 Blackwell Publishing Ltd.

Automatic Digital Hardware Synthesis

DTIC Science & Technology

1990-09-01

VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate array (FPGAI using...process of translating VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate...allows the engineer to use VHDL to create and validate a design, and then to implement it in a gate array. The development of software o translate VHDL

Roll Angle Estimation Using Thermopiles for a Flight Controlled Mortar

DTIC Science & Technology

2012-06-01

Using Xilinx’s System generator, the entire design was implemented at a relatively high level within Malab’s Simulink. This allowed VHDL code to...thermopile data with a Recursive Least Squares (RLS) filter implemented on a field programmable gate array (FPGA). These results demonstrate the...accurately estimated by processing the thermopile data with a Recursive Least Squares (RLS) filter implemented on a field programmable gate array (FPGA

Maladjustment of programmable ventricular shunt valves by inadvertent exposure to a common hospital device.

PubMed

Fujimura, R; Lober, R; Kamian, K; Kleiner, L

2018-01-01

Programmable ventricular shunt valves are commonly used to treat hydrocephalus. They can be adjusted to allow for varying amounts of cerebrospinal fluid (CSF) flow using an external magnetic programming device, and are susceptible to maladjustment from inadvertent exposure to magnetic fields. We describe the case of a 3-month-old girl treated for hydrocephalus with a programmable Strata TM II valve found at the incorrect setting on multiple occasions during her hospitalization despite frequent reprogramming and surveillance. We found that the Vocera badge, a common hands-free wireless communication system worn by our nursing staff, had a strong enough magnetic field to unintentionally change the shunt setting. The device is worn on the chest bringing it into close proximity to the shunt valve when care providers hold the baby, resulting in the maladjustment. Some commonly used medical devices have a magnetic field strong enough to alter programmable shunt valve settings. Here, we report that the magnetic field from the Vocera hands-free wireless communication system, combined with the worn position, results in shunt maladjustment for the Strata TM II valve. Healthcare facilities using the Vocera badges need to put protocols in place and properly educate staff members to ensure the safety of patients with Strata TM II valves.

English-Medium Programmes at Austrian Business Faculties: A Status Quo Survey on National Trends and a Case Study on Programme Design and Delivery

ERIC Educational Resources Information Center

Unterberger, Barbara

2012-01-01

Internationalisation processes have accelerated the implementation of English-medium programmes (EMPs) across European higher education institutions. The field of business and management studies has been particularly affected by this trend (Wachter & Maiworm 2008: 46) with numerous new EMPs introduced each year. This paper presents key…

Programmable Logic Device (PLD) Design Description for the Integrated Power, Avionics, and Software (iPAS) Space Telecommunications Radio System (STRS) Radio

NASA Technical Reports Server (NTRS)

Shalkhauser, Mary Jo W.

2017-01-01

The Space Telecommunications Radio System (STRS) provides a common, consistent framework for software defined radios (SDRs) to abstract the application software from the radio platform hardware. The STRS standard aims to reduce the cost and risk of using complex, configurable and reprogrammable radio systems across NASA missions. To promote the use of the STRS architecture for future NASA advanced exploration missions, NASA Glenn Research Center (GRC) developed an STRS compliant SDR on a radio platform used by the Advance Exploration System program at the Johnson Space Center (JSC) in their Integrated Power, Avionics, and Software (iPAS) laboratory. At the conclusion of the development, the software and hardware description language (HDL) code was delivered to JSC for their use in their iPAS test bed to get hands-on experience with the STRS standard, and for development of their own STRS Waveforms on the now STRS compliant platform.The iPAS STRS Radio was implemented on the Reconfigurable, Intelligently-Adaptive Communication System (RIACS) platform, currently being used for radio development at JSC. The platform consists of a Xilinx ML605 Virtex-6 FPGA board, an Analog Devices FMCOMMS1-EBZ RF transceiver board, and an Embedded PC (Axiomtek eBox 620-110-FL) running the Ubuntu 12.4 operating system. Figure 1 shows the RIACS platform hardware. The result of this development is a very low cost STRS compliant platform that can be used for waveform developments for multiple applications.The purpose of this document is to describe the design of the HDL code for the FPGA portion of the iPAS STRS Radio particularly the design of the FPGA wrapper and the test waveform.

FPGA wavelet processor design using language for instruction-set architectures (LISA)

NASA Astrophysics Data System (ADS)

Meyer-Bäse, Uwe; Vera, Alonzo; Rao, Suhasini; Lenk, Karl; Pattichis, Marios

2007-04-01

The design of an microprocessor is a long, tedious, and error-prone task consisting of typically three design phases: architecture exploration, software design (assembler, linker, loader, profiler), architecture implementation (RTL generation for FPGA or cell-based ASIC) and verification. The Language for instruction-set architectures (LISA) allows to model a microprocessor not only from instruction-set but also from architecture description including pipelining behavior that allows a design and development tool consistency over all levels of the design. To explore the capability of the LISA processor design platform a.k.a. CoWare Processor Designer we present in this paper three microprocessor designs that implement a 8/8 wavelet transform processor that is typically used in today's FBI fingerprint compression scheme. We have designed a 3 stage pipelined 16 bit RISC processor (NanoBlaze). Although RISC μPs are usually considered "fast" processors due to design concept like constant instruction word size, deep pipelines and many general purpose registers, it turns out that DSP operations consume essential processing time in a RISC processor. In a second step we have used design principles from programmable digital signal processor (PDSP) to improve the throughput of the DWT processor. A multiply-accumulate operation along with indirect addressing operation were the key to achieve higher throughput. A further improvement is possible with today's FPGA technology. Today's FPGAs offer a large number of embedded array multipliers and it is now feasible to design a "true" vector processor (TVP). A multiplication of two vectors can be done in just one clock cycle with our TVP, a complete scalar product in two clock cycles. Code profiling and Xilinx FPGA ISE synthesis results are provided that demonstrate the essential improvement that a TVP has compared with traditional RISC or PDSP designs.

PCI bus content-addressable-memory (CAM) implementation on FPGA for pattern recognition/image retrieval in a distributed environment

NASA Astrophysics Data System (ADS)

Megherbi, Dalila B.; Yan, Yin; Tanmay, Parikh; Khoury, Jed; Woods, C. L.

2004-11-01

Recently surveillance and Automatic Target Recognition (ATR) applications are increasing as the cost of computing power needed to process the massive amount of information continues to fall. This computing power has been made possible partly by the latest advances in FPGAs and SOPCs. In particular, to design and implement state-of-the-Art electro-optical imaging systems to provide advanced surveillance capabilities, there is a need to integrate several technologies (e.g. telescope, precise optics, cameras, image/compute vision algorithms, which can be geographically distributed or sharing distributed resources) into a programmable system and DSP systems. Additionally, pattern recognition techniques and fast information retrieval, are often important components of intelligent systems. The aim of this work is using embedded FPGA as a fast, configurable and synthesizable search engine in fast image pattern recognition/retrieval in a distributed hardware/software co-design environment. In particular, we propose and show a low cost Content Addressable Memory (CAM)-based distributed embedded FPGA hardware architecture solution with real time recognition capabilities and computing for pattern look-up, pattern recognition, and image retrieval. We show how the distributed CAM-based architecture offers a performance advantage of an order-of-magnitude over RAM-based architecture (Random Access Memory) search for implementing high speed pattern recognition for image retrieval. The methods of designing, implementing, and analyzing the proposed CAM based embedded architecture are described here. Other SOPC solutions/design issues are covered. Finally, experimental results, hardware verification, and performance evaluations using both the Xilinx Virtex-II and the Altera Apex20k are provided to show the potential and power of the proposed method for low cost reconfigurable fast image pattern recognition/retrieval at the hardware/software co-design level.

Hardware-Abbildung eines videobasierten Verfahrens zur echtzeitfähigen Auswertung von Winkelhistogrammen auf eine modulare Coprozessor-Architektur

NASA Astrophysics Data System (ADS)

Flatt, H.; Tarnowsky, A.; Blume, H.; Pirsch, P.

2010-10-01

Dieser Beitrag behandelt die Abbildung eines videobasierten Verfahrens zur echtzeitfähigen Auswertung von Winkelhistogrammen auf eine modulare Coprozessor-Architektur. Die Architektur besteht aus mehreren dedizierten Recheneinheiten zur parallelen Verarbeitung rechenintensiver Bildverarbeitungsverfahren und ist mit einem RISC-Prozessor verbunden. Eine konfigurierbare Architekturerweiterung um eine Recheneinheit zur Auswertung von Winkelhistogrammen von Objekten ermöglicht in Verbindung mit dem RISC eine echtzeitfähige Klassifikation. Je nach Konfiguration sind für die Architekturerweiterung auf einem Xilinx Virtex-5-FPGA zwischen 3300 und 12 000 Lookup-Tables erforderlich. Bei einer Taktfrequenz von 100 MHz können unabhängig von der Bildauflösung pro Einzelbild in einem 25-Hz-Videodatenstrom bis zu 100 Objekte der Größe 256×256 Pixel analysiert werden. This paper presents the mapping of a video-based approach for real-time evaluation of angular histograms on a modular coprocessor architecture. The architecture comprises several dedicated processing elements for parallel processing of computation-intensive image processing tasks and is coupled with a RISC processor. A configurable architecture extension, especially a processing element for evaluating angular histograms of objects in conjunction with a RISC processor, provides a real-time classification. Depending on the configuration of the architecture extension, 3 300 to 12 000 look-up tables are required for a Xilinx Virtex-5 FPGA implementation. Running at a clock frequency of 100 MHz and independently of the image resolution per frame, 100 objects of size 256×256 pixels are analyzed in a 25 Hz video stream by the architecture.

Radiation Effects on Current Field Programmable Technologies

NASA Technical Reports Server (NTRS)

Katz, R.; LaBel, K.; Wang, J. J.; Cronquist, B.; Koga, R.; Penzin, S.; Swift, G.

1997-01-01

Manufacturers of field programmable gate arrays (FPGAS) take different technological and architectural approaches that directly affect radiation performance. Similar y technological and architectural features are used in related technologies such as programmable substrates and quick-turn application specific integrated circuits (ASICs). After analyzing current technologies and architectures and their radiation-effects implications, this paper includes extensive test data quantifying various devices total dose and single event susceptibilities, including performance degradation effects and temporary or permanent re-configuration faults. Test results will concentrate on recent technologies being used in space flight electronic systems and those being developed for use in the near term. This paper will provide the first extensive study of various configuration memories used in programmable devices. Radiation performance limits and their impacts will be discussed for each design. In addition, the interplay between device scaling, process, bias voltage, design, and architecture will be explored. Lastly, areas of ongoing research will be discussed.

Research and design of portable photoelectric rotary table data-acquisition and analysis system

NASA Astrophysics Data System (ADS)

Yang, Dawei; Yang, Xiufang; Han, Junfeng; Yan, Xiaoxu

2015-02-01

Photoelectric rotary table as the main test tracking measurement platform, widely use in shooting range and aerospace fields. In the range of photoelectric tracking measurement system, in order to meet the photoelectric testing instruments and equipment of laboratory and field application demand, research and design the portable photoelectric rotary table data acquisition and analysis system, and introduces the FPGA device based on Xilinx company Virtex-4 series and its peripheral module of the system hardware design, and the software design of host computer in VC++ 6.0 programming platform and MFC package based on class libraries. The data acquisition and analysis system for data acquisition, display and storage, commission control, analysis, laboratory wave playback, transmission and fault diagnosis, and other functions into an organic whole, has the advantages of small volume, can be embedded, high speed, portable, simple operation, etc. By photoelectric tracking turntable as experimental object, carries on the system software and hardware alignment, the experimental results show that the system can realize the data acquisition, analysis and processing of photoelectric tracking equipment and control of turntable debugging good, and measurement results are accurate, reliable and good maintainability and extensibility. The research design for advancing the photoelectric tracking measurement equipment debugging for diagnosis and condition monitoring and fault analysis as well as the standardization and normalization of the interface and improve the maintainability of equipment is of great significance, and has certain innovative and practical value.

Making the Most Out of School-Based Prevention: Lessons from the Social and Emotional Aspects of Learning (SEAL) Programme

ERIC Educational Resources Information Center

Humphrey, Neil; Lendrum, Ann; Wigelsworth, Michael

2013-01-01

This paper considers the role played by universal, school-based social and emotional learning (SEL) programmes in addressing the mental health needs of children and young people. Theory and research in the field are discussed. Particular attention is paid to the social and emotional aspects of learning (SEAL) programme in England, a flagship…

Field-programmable logic devices with optical input-output.

PubMed

Szymanski, T H; Saint-Laurent, M; Tyan, V; Au, A; Supmonchai, B

2000-02-10

A field-programmable logic device (FPLD) with optical I/O is described. FPLD's with optical I/O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA's) on a 2 mm x 2 mm die. The devices were fabricated through the Lucent Technologies-Advanced Research Projects Agency-Consortium for Optical and Optoelectronic Technologies in Computing (Lucent/ARPA/COOP) workshop by use of 0.5-microm complementary metal-oxide semiconductor-self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 x 4 crossbar switches, which can realize more than 190 x 10(6) unique programmable input-output permutations. The same device scaled to a 2 cm x 2 cm substrate could support as many as 4000 optical I/O and 1 Tbit/s of optical I/O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.

Solder Joint Health Monitoring Testbed

NASA Technical Reports Server (NTRS)

Delaney, Michael M.; Flynn, James; Browder, Mark

2009-01-01

A method of monitoring the health of selected solder joints, called SJ-BIST, has been developed by Ridgetop Group Inc. under a Small Business Innovative Research (SBIR) contract. The primary goal of this research program is to test and validate this method in a flight environment using realistically seeded faults in selected solder joints. An additional objective is to gather environmental data for future development of physics-based and data-driven prognostics algorithms. A test board is being designed using a Xilinx FPGA. These boards will be tested both in flight and on the ground using a shaker table and an altitude chamber.

A Scalable Architecture of a Structured LDPC Decoder

NASA Technical Reports Server (NTRS)

Lee, Jason Kwok-San; Lee, Benjamin; Thorpe, Jeremy; Andrews, Kenneth; Dolinar, Sam; Hamkins, Jon

2004-01-01

We present a scalable decoding architecture for a certain class of structured LDPC codes. The codes are designed using a small (n,r) protograph that is replicated Z times to produce a decoding graph for a (Z x n, Z x r) code. Using this architecture, we have implemented a decoder for a (4096,2048) LDPC code on a Xilinx Virtex-II 2000 FPGA, and achieved decoding speeds of 31 Mbps with 10 fixed iterations. The implemented message-passing algorithm uses an optimized 3-bit non-uniform quantizer that operates with 0.2dB implementation loss relative to a floating point decoder.

Structured Doctoral Education in Hannover - Joint Programme IMPRS-GW and geo-Q RTG

NASA Astrophysics Data System (ADS)

Kawazoe, Fumiko; Bruns, Sandra

2018-02-01

Two structured doctoral programmes that we have in Hannover, the IMPRS on Gravitational Wave Astronomy and SFB on relativistic geodesy and gravimetry with quantum sensors geo-Q, have not only become major resources for education in each field but have also started to provide substantial synergy to members of both programmes. Our strong crossdisciplinary approach to create a joint programme has received excellent feedback not only from researchers inside the programme but also from various external committee. Building on experience that we have acquired over the last decade, we propose to set up a common doctoral programme within the international gravitational wave astronomy and physics. We envisage that with a common doctoral programme we will create a strong team of young researchers who will carry on building a strong network of third generation gravitational wave detectors and observatories.

Implementing a Microcontroller Watchdog with a Field-Programmable Gate Array (FPGA)

NASA Technical Reports Server (NTRS)

Straka, Bartholomew

2013-01-01

Reliability is crucial to safety. Redundancy of important system components greatly enhances reliability and hence safety. Field-Programmable Gate Arrays (FPGAs) are useful for monitoring systems and handling the logic necessary to keep them running with minimal interruption when individual components fail. A complete microcontroller watchdog with logic for failure handling can be implemented in a hardware description language (HDL.). HDL-based designs are vendor-independent and can be used on many FPGAs with low overhead.

Field Evaluation of Programmable Thermostats

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sachs, O.; Tiefenbeck, V.; Duvier, C.

2012-12-01

Prior research suggests that poor programmable thermostats usability may prevent their effective use to save energy. The Fraunhofer team hypothesized that home occupants with high-usability thermostats would be more likely to use them to save energy than people with a basic thermostats. In this report, the team discusses results of a project in which the team monitored and compared programmable thermostats with basic thermostats in an affordable housing apartment complex.

A hospital-based child protection programme evaluation instrument: a modified Delphi study.

PubMed

Wilson, Denise; Koziol-McLain, Jane; Garrett, Nick; Sharma, Pritika

2010-08-01

Refine instrument for auditing hospital-based child abuse and neglect violence intervention programmes prior to field-testing. A modified Delphi study to identify and rate items and domains indicative of an effective and quality child abuse and neglect intervention programme. Experts participated in four Delphi rounds: two surveys, a one-day workshop and the opportunity to comment on the penultimate instrument. New Zealand. Twenty-four experts in the field of care and protection of children. Items with panel agreement >or=85% and mean importance rating >or=4.0 (scale from 1 (not important) to 5 (very important)). There was high-level consensus on items across Rounds 1 and 2 (89% and 85%, respectively). In Round 3 an additional domain (safety and security) was agreed upon and cultural issues, alert systems for children at risk, and collaboration among primary care, community, non-government and government agencies were discussed. The final instrument included nine domains ('policies and procedures', 'safety and security', 'collaboration', 'cultural environment', 'training of providers', 'intervention services', 'documentation' 'evaluation' and 'physical environment') and 64 items. The refined instrument represents the hallmarks of an ideal child abuse and neglect programme given current knowledge and experience. The instrument enables rigorous evaluations of hospital-based child abuse and neglect intervention programmes for quality improvement and benchmarking with other programmes.

Field-Free Programmable Spin Logics via Chirality-Reversible Spin-Orbit Torque Switching.

PubMed

Wang, Xiao; Wan, Caihua; Kong, Wenjie; Zhang, Xuan; Xing, Yaowen; Fang, Chi; Tao, Bingshan; Yang, Wenlong; Huang, Li; Wu, Hao; Irfan, Muhammad; Han, Xiufeng

2018-06-21

Spin-orbit torque (SOT)-induced magnetization switching exhibits chirality (clockwise or counterclockwise), which offers the prospect of programmable spin-logic devices integrating nonvolatile spintronic memory cells with logic functions. Chirality is usually fixed by an applied or effective magnetic field in reported studies. Herein, utilizing an in-plane magnetic layer that is also switchable by SOT, the chirality of a perpendicular magnetic layer that is exchange-coupled with the in-plane layer can be reversed in a purely electrical way. In a single Hall bar device designed from this multilayer structure, three logic gates including AND, NAND, and NOT are reconfigured, which opens a gateway toward practical programmable spin-logic devices. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Strengthening Indonesia’s Field Epidemiology Training Programme to address International Health Regulations requirements

PubMed Central

Samaan, Gina; Santoso, Hari; Kushadiwijaya, Haripurnomo; Juwita, Ratna; Mohadir, Andi; Aditama, Tjandra

2010-01-01

Abstract Problem According to the International Health Regulations (IHR), countries need to strengthen core capacity for disease surveillance and response systems. Many countries are establishing or enhancing their field epidemiology training programmes (FETPs) to meet human resource needs but face challenges in sustainability and training quality. Indonesia is facing these challenges, which include limited resources for field training and limited coordination in a newly decentralized health system. Approach A national FETP workplan was developed based on an evaluation of the existing programme and projected human resource needs. A Ministry of Health Secretariat linking universities, national and international partners was established to oversee revision and implementation of the FETP. Local setting The FETP is integrated into the curriculum of Indonesian universities and field training is conducted in district and provincial health offices under the coordination of the universities and the FETP Secretariat. Relevant changes The FETP was included in the Ministry of Health workforce development strategy through governmental decree. Curricula have been enhanced and field placements strengthened to provide trainees with better learning experiences. To improve sustainability of the FETP, links were established with the Indonesian Epidemiologists’ Association, local governments and donors to cultivate future FETP champions and maintain funding. Courses, competitions and discussion forums were established for field supervisors and alumni. These changes have increased the geographic distribution of students, intersectoral and international participation and the quality of student performance. Lessons learnt The main lesson learnt is that linkages with universities, ministries and international agencies such as the World Health Organization are critical for building a sustainable high-quality programme. The most critical factors were development of trusting relationships and clear definitions of the responsibilities of each stakeholder. PMID:20428389

Single Event Test Methodologies and System Error Rate Analysis for Triple Modular Redundant Field Programmable Gate Arrays

NASA Technical Reports Server (NTRS)

Allen, Gregory; Edmonds, Larry D.; Swift, Gary; Carmichael, Carl; Tseng, Chen Wei; Heldt, Kevin; Anderson, Scott Arlo; Coe, Michael

2010-01-01

We present a test methodology for estimating system error rates of Field Programmable Gate Arrays (FPGAs) mitigated with Triple Modular Redundancy (TMR). The test methodology is founded in a mathematical model, which is also presented. Accelerator data from 90 nm Xilins Military/Aerospace grade FPGA are shown to fit the model. Fault injection (FI) results are discussed and related to the test data. Design implementation and the corresponding impact of multiple bit upset (MBU) are also discussed.

Using Programmable Calculators to Solve Electrostatics Problems.

ERIC Educational Resources Information Center

Yerian, Stephen C.; Denker, Dennis A.

1985-01-01

Provides a simple routine which allows first-year physics students to use programmable calculators to solve otherwise complex electrostatic problems. These problems involve finding electrostatic potential and electric field on the axis of a uniformly charged ring. Modest programing skills are required of students. (DH)

A hierarchical scheduling and management solution for dynamic reconfiguration in FPGA-based embedded systems

NASA Astrophysics Data System (ADS)

Cervero, T.; Gómez, A.; López, S.; Sarmiento, R.; Dondo, J.; Rincón, F.; López, J. C.

2013-05-01

One of the limiting factors that have prevented a widely dissemination of the reconfigurable technology is the absence of an appropriate model for certain target applications capable of offering a reliable control. Moreover, the lack of flexible and easy-to-use scheduling and management systems are also relevant drawbacks to be considered. Under static scenarios, it is relatively easy to schedule and manage the reconfiguration process since all the variations corresponding to predetermined and well-known tasks. However, the difficulty increases when the adaptation needs of the overall system change semi-randomly according to the environmental fluctuations. In this context, this work proposes a change in the paradigm of dynamically reconfigurable systems, by attending to the dynamically reconfigurable control problematic as a whole, in which the scheduling and the placement issues are packed together as a hierarchical management structure, interacting together as one entity from the system point of view, but performing their tasks with certain degree of independence each other. In this sense, the top hierarchical level corresponds with a dynamic scheduler in charge of planning and adjusting all the reconfigurable modules according to the variations of the external stimulus. The lower level interacts with the physical layer of the device by means of instantiating, relocating, removing a reconfigurable module following the scheduler's instructions. In regards to how fast is the proposed solution, the total partial reconfiguration time achieved with this proposal has been measured and compared with other two approaches: 1) using traditional Xilinx's tools; 2) using an optimized version of the Xilinx's drivers. The collected numbers demonstrate that our solution reaches a gain up to 10 times faster than the other approaches.

Primary investigation the impacts of the external memory (DDR3) failures on the performance of Xilinx Zynq-7010 SoC based system (MicroZed) using laser irradiation

NASA Astrophysics Data System (ADS)

Liu, Shuhuan; Du, Xuecheng; Du, Xiaozhi; Zhang, Yao; Mubashiru, Lawal Olarewaju; Luo, Dongyang; yuan, Yuan; Deng, Tianxiang; Li, Zhuoqi; Zang, Hang; Li, Yonghong; He, Chaohui; Ma, Yingqi; Shangguan, Shipeng

2017-09-01

The impacts of the external dynamic memory (DDR3) failures on the performance of 28 nm Xilinx Zynq-7010 SoC based system (MicroZed) were investigated with two sets of 1064 nm laser platforms. The failure sensitive area distributionsons on the back surface of the test DDR3 were primarily localized with a CW laser irradiation platform. During the CW laser scanning on the back surface of the DDR3 of the test board system, various failure modes except SEU and SEL (MBU, SEFI, data storage address error, rebooting, etc) were found in the testing embedded modules (ALU, PL, Register, Cache and DMA, etc) of SoC. Moreover, the experimental results demonstrated that there were 16 failure sensitive blocks symmetrically distributed on the back surface of the DDR3 with every sensitive block area measured was about 1 mm × 0.5 mm. The influence factors on the failure modes of the embedded modules were primarily analyzed and the SEE characteristics of DDR3 induced by the picoseconds pulsed laser were tested. The failure modes of DDR3 found were SEU, SEFI, SEL, test board rebooting by itself, unknown data, etc. Furthermore, the time interval distributions of failure occurrence in DDR3 changes with the pulsed laser irradiation energy and the CPU operating frequency were measured and compared. Meanwhile, the failure characteristics of DDR3 induced by pulsed laser irradiation were primarily explored. The measured results and the testing techniques designed in this paper provide some reference information for evaluating the reliability of the test system or other similar electronic system in harsh environment.

Programmable Pulse-Position-Modulation Encoder

NASA Technical Reports Server (NTRS)

Zhu, David; Farr, William

2006-01-01

A programmable pulse-position-modulation (PPM) encoder has been designed for use in testing an optical communication link. The encoder includes a programmable state machine and an electronic code book that can be updated to accommodate different PPM coding schemes. The encoder includes a field-programmable gate array (FPGA) that is programmed to step through the stored state machine and code book and that drives a custom high-speed serializer circuit board that is capable of generating subnanosecond pulses. The stored state machine and code book can be updated by means of a simple text interface through the serial port of a personal computer.

Integrated care.

PubMed

Warwick-Giles, Lynsey; Checkland, Kath

2018-03-19

Purpose The purpose of this paper is to try and understand how several organisations in one area in England are working together to develop an integrated care programme. Weick's (1995) concept of sensemaking is used as a lens to examine how the organisations are working collaboratively and maintaining the programme. Design/methodology/approach Qualitative methods included: non-participant observations of meetings, interviews with key stakeholders and the collection of documents relating to the programme. These provided wider contextual information about the programme. Comprehensive field notes were taken during observations and analysed alongside interview transcriptions using NVIVO software. Findings This paper illustrates the importance of the construction of a shared identity across all organisations involved in the programme. Furthermore, the wider policy discourse impacted on how the programme developed and influenced how organisations worked together. Originality/value The role of leaders from all organisations involved in the programme was of significance to the overall development of the programme and the sustained momentum behind the programme. Leaders were able to generate a "narrative of success" to drive the programme forward. This is of particular relevance to evaluators, highlighting the importance of using multiple methods to allow researchers to probe beneath the surface of programmes to ensure that evidence moves beyond this public narrative.

Field-programmable beam reconfiguring based on digitally-controlled coding metasurface

NASA Astrophysics Data System (ADS)

Wan, Xiang; Qi, Mei Qing; Chen, Tian Yi; Cui, Tie Jun

2016-02-01

Digital phase shifters have been applied in traditional phased array antennas to realize beam steering. However, the phase shifter deals with the phase of the induced current; hence, it has to be in the path of each element of the antenna array, making the phased array antennas very expensive. Metamaterials and/or metasurfaces enable the direct modulation of electromagnetic waves by designing subwavelength structures, which opens a new way to control the beam scanning. Here, we present a direct digital mechanism to control the scattered electromagnetic waves using coding metasurface, in which each unit cell loads a pin diode to produce binary coding states of “1” and “0”. Through data lines, the instant communications are established between the coding metasurface and the internal memory of field-programmable gate arrays (FPGA). Thus, we realize the digital modulation of electromagnetic waves, from which we present the field-programmable reflective antenna with good measurement performance. The proposed mechanism and functional device have great application potential in new-concept radar and communication systems.

Developing Online Doctoral Programmes

ERIC Educational Resources Information Center

Chipere, Ngoni

2015-01-01

The objectives of the study were to identify best practices in online doctoral programming and to synthesise these practices into a framework for developing online doctoral programmes. The field of online doctoral studies is nascent and presents challenges for conventional forms of literature review. The literature was therefore reviewed using a…

Programmable nanometer-scale electrolytic metal deposition and depletion

DOEpatents

Lee, James Weifu [Oak Ridge, TN; Greenbaum, Elias [Oak Ridge, TN

2002-09-10

A method of nanometer-scale deposition of a metal onto a nanostructure includes the steps of: providing a substrate having thereon at least two electrically conductive nanostructures spaced no more than about 50 .mu.m apart; and depositing metal on at least one of the nanostructures by electric field-directed, programmable, pulsed electrolytic metal deposition. Moreover, a method of nanometer-scale depletion of a metal from a nanostructure includes the steps of providing a substrate having thereon at least two electrically conductive nanostructures spaced no more than about 50 .mu.m apart, at least one of the nanostructures having a metal disposed thereon; and depleting at least a portion of the metal from the nanostructure by electric field-directed, programmable, pulsed electrolytic metal depletion. A bypass circuit enables ultra-finely controlled deposition.

Different elution modes and field programming in gravitational field-flow fractionation. III. Field programming by flow-rate gradient generated by a programmable pump.

PubMed

Plocková, J; Chmelík, J

2001-05-25

Gravitational field-flow fractionation (GFFF) utilizes the Earth's gravitational field as an external force that causes the settlement of particles towards the channel accumulation wall. Hydrodynamic lift forces oppose this action by elevating particles away from the channel accumulation wall. These two counteracting forces enable modulation of the resulting force field acting on particles in GFFF. In this work, force-field programming based on modulating the magnitude of hydrodynamic lift forces was implemented via changes of flow-rate, which was accomplished by a programmable pump. Several flow-rate gradients (step gradients, linear gradients, parabolic, and combined gradients) were tested and evaluated as tools for optimization of the separation of a silica gel particle mixture. The influence of increasing amount of sample injected on the peak resolution under flow-rate gradient conditions was also investigated. This is the first time that flow-rate gradients have been implemented for programming of the resulting force field acting on particles in GFFF.

A quasi-experimental feasibility study to determine the effect of a systematic treatment programme on the scores of the Nottingham Adjustment Scale of individuals with visual field deficits following stroke.

PubMed

Taylor, Lisa; Poland, Fiona; Harrison, Peter; Stephenson, Richard

2011-01-01

To evaluate a systematic treatment programme developed by the researcher that targeted aspects of visual functioning affected by visual field deficits following stroke. The study design was a non-equivalent control (conventional) group pretest-posttest quasi-experimental feasibility design, using multisite data collection methods at specified stages. The study was undertaken within three acute hospital settings as outpatient follow-up sessions. Individuals who had visual field deficits three months post stroke were studied. A treatment group received routine occupational therapy and an experimental group received, in addition, a systematic treatment programme. The treatment phase of both groups lasted six weeks. The Nottingham Adjustment Scale, a measure developed specifically for visual impairment, was used as the primary outcome measure. The change in Nottingham Adjustment Scale score was compared between the experimental (n = 7) and conventional (n = 8) treatment groups using the Wilcoxon signed ranks test. The result of Z = -2.028 (P = 0.043) showed that there was a statistically significant difference between the change in Nottingham Adjustment Scale score between both groups. The introduction of the systematic treatment programme resulted in a statistically significant change in the scores of the Nottingham Adjustment Scale.

A modularized pulse programmer for NMR spectroscopy

NASA Astrophysics Data System (ADS)

Mao, Wenping; Bao, Qingjia; Yang, Liang; Chen, Yiqun; Liu, Chaoyang; Qiu, Jianqing; Ye, Chaohui

2011-02-01

A modularized pulse programmer for a NMR spectrometer is described. It consists of a networked PCI-104 single-board computer and a field programmable gate array (FPGA). The PCI-104 is dedicated to translate the pulse sequence elements from the host computer into 48-bit binary words and download these words to the FPGA, while the FPGA functions as a sequencer to execute these binary words. High-resolution NMR spectra obtained on a home-built spectrometer with four pulse programmers working concurrently demonstrate the effectiveness of the pulse programmer. Advantages of the module include (1) once designed it can be duplicated and used to construct a scalable NMR/MRI system with multiple transmitter and receiver channels, (2) it is a totally programmable system in which all specific applications are determined by software, and (3) it provides enough reserve for possible new pulse sequences.

Application of segmented dental panoramic tomography among children: positive effect of continuing education in radiation protection

PubMed Central

Waltimo-Sirén, Janna; Laatikainen, Tuula; Haukka, Jari; Ekholm, Marja

2016-01-01

Objectives: Dental panoramic tomography is the most frequent examination among 7–12-year olds, according to the Radiation Safety and Nuclear Authority of Finland. At those ages, dental panoramic tomographs (DPTs) are mostly obtained for orthodontic reasons. Children's dose reduction by trimming the field size to the area of interest is important because of their high radiosensitivity. Yet, the majority of DPTs in this age group are still taken by using an adult programme and never by using a segmented programme. The purpose of the present study was to raise the awareness of dental staff with respect to children's radiation safety, to increase the application of segmented and child DPT programmes by further educating the whole dental team and to evaluate the outcome of the educational intervention. Methods: A five-step intervention programme, focusing on DPT field limitation possibilities, was carried out in community-based dental care as a part of mandatory continuing education in radiation protection. Application of segmented and child DPT programmes was thereafter prospectively followed up during a 1-year period and compared with our similar data from 2010 using a logistic regression analysis. Results: Application of the child programme increased by 9% and the segmented programme by 2%, reaching statistical significance (odds ratios 1.68; 95% confidence interval 1.23–2.30; p-value < 0.001). The number of repeated exposures remained at an acceptable level. The segmented DPTs were most frequently taken from the maxillary lateral incisor–canine area. Conclusions: The educational intervention resulted in improvement of radiological practice in respect to radiation safety of children during dental panoramic tomography. Segmented and child DPT programmes can be applied successfully in dental practice for children. PMID:27142159

Application of segmented dental panoramic tomography among children: positive effect of continuing education in radiation protection.

PubMed

Pakbaznejad Esmaeili, Elmira; Waltimo-Sirén, Janna; Laatikainen, Tuula; Haukka, Jari; Ekholm, Marja

2016-05-23

Dental panoramic tomography is the most frequent examination among 7-12-year olds, according to the Radiation Safety and Nuclear Authority of Finland. At those ages, dental panoramic tomographs (DPTs) are mostly obtained for orthodontic reasons. Children's dose reduction by trimming the field size to the area of interest is important because of their high radiosensitivity. Yet, the majority of DPTs in this age group are still taken by using an adult programme and never by using a segmented programme. The purpose of the present study was to raise the awareness of dental staff with respect to children's radiation safety, to increase the application of segmented and child DPT programmes by further educating the whole dental team and to evaluate the outcome of the educational intervention. A five-step intervention programme, focusing on DPT field limitation possibilities, was carried out in community-based dental care as a part of mandatory continuing education in radiation protection. Application of segmented and child DPT programmes was thereafter prospectively followed up during a 1-year period and compared with our similar data from 2010 using a logistic regression analysis. Application of the child programme increased by 9% and the segmented programme by 2%, reaching statistical significance (odds ratios 1.68; 95% confidence interval 1.23-2.30; p-value < 0.001). The number of repeated exposures remained at an acceptable level. The segmented DPTs were most frequently taken from the maxillary lateral incisor-canine area. The educational intervention resulted in improvement of radiological practice in respect to radiation safety of children during dental panoramic tomography. Segmented and child DPT programmes can be applied successfully in dental practice for children.

High performance embedded system for real-time pattern matching

NASA Astrophysics Data System (ADS)

Sotiropoulou, C.-L.; Luciano, P.; Gkaitatzis, S.; Citraro, S.; Giannetti, P.; Dell'Orso, M.

2017-02-01

In this paper we present an innovative and high performance embedded system for real-time pattern matching. This system is based on the evolution of hardware and algorithms developed for the field of High Energy Physics and more specifically for the execution of extremely fast pattern matching for tracking of particles produced by proton-proton collisions in hadron collider experiments. A miniaturized version of this complex system is being developed for pattern matching in generic image processing applications. The system works as a contour identifier able to extract the salient features of an image. It is based on the principles of cognitive image processing, which means that it executes fast pattern matching and data reduction mimicking the operation of the human brain. The pattern matching can be executed by a custom designed Associative Memory chip. The reference patterns are chosen by a complex training algorithm implemented on an FPGA device. Post processing algorithms (e.g. pixel clustering) are also implemented on the FPGA. The pattern matching can be executed on a 2D or 3D space, on black and white or grayscale images, depending on the application and thus increasing exponentially the processing requirements of the system. We present the firmware implementation of the training and pattern matching algorithm, performance and results on a latest generation Xilinx Kintex Ultrascale FPGA device.

Reconfigurable signal processor designs for advanced digital array radar systems

NASA Astrophysics Data System (ADS)

Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

2017-05-01

The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

The EuroDIVERSITY Programme: Challenges of Biodiversity Science in Europe

NASA Astrophysics Data System (ADS)

Jonckheere, I.

2009-04-01

In close cooperation with its Member Organisations, the European Science Foundation (ESF) has launched since late 2003 a series of European Collaborative Research (EUROCORES) Programmes. Their aim is to enable researchers in different European countries to develop cooperation and scientific synergy in areas where European scale and scope are required in a global context. The EUROCORES instrument represents the first large scale attempt of national research (funding) agencies to act together against fragmentation, asynchronicity and duplication of research (funding) within Europe. Although covering all scientific fields, there are presently 13 EUROCORES Programmes dealing with cutting edge science in the fields of Earth, Climate and Environmental Sciences. The aim of the EuroDIVERSITY Programme is to support the emergence of an integrated biodiversity science based on an understanding of fundamental ecological and social processes that drive biodiversity changes and their impacts on ecosystem functioning and society. Ecological systems across the globe are being threatened or transformed at unprecedented rates from local to global scales due to the ever-increasing human domination of natural ecosystems. In particular, massive biodiversity changes are currently taking place, and this trend is expected to continue over the coming decades, driven by the increasing extension and globalisation of human affairs. The EuroDIVERSITY Programme meets the research need triggered by the increasing human footprint worldwide with a focus on generalisations across particular systems and on the generation and validation of theory relevant to experimental and empirical data. The EURODIVERSITY Programme tries to bridge the gaps between the natural and social sciences, between research work on terrestrial, freshwater and marine ecosystems, and between research work on plants, animals and micro-organisms. The Programme was launched in April 2006 and includes 10 international, multidisciplinary collaborative research projects, which are expected to contribute to this goal by initiating or strengthening major collaborative research efforts. Some projects are dealing primarily with microbial diversity (COMIX, METHECO, MiCROSYSTEMS), others try to investigate the biogeochemistry in grassland and forest ecosystems (BEGIN, BioCycle), the landscape and community ecology of biodiversity changes (ASSEMBLE, AGRIPOPES, EcoTRADE), and others focus on the diversity in freshwater (BIOPOOL, MOLARCH). In 2009, the EuroDIVERSITY Programme will integrate the different European research teams involved with collaborative field work campaigns over Europe, international workshops and conferences, as well as joint peer-review publications. For more information about the Programme and its activities, please check the Programme website: www.esf.org/eurodiversity

Conflict or Cooperation: The Use of Backchannelling in ELF Negotiations

ERIC Educational Resources Information Center

Bjorge, Anne Kari

2010-01-01

The international business community relies heavily on English Lingua Franca (ELF) as a shared means of communication, and English business language programmes thus feature prominently within the field of English for Specific Purposes (ESP). Business ESP programmes, however, have little focus on active listening, which previous research has…

Effectiveness of Alcohol Media Literacy Programmes: A Systematic Literature Review

ERIC Educational Resources Information Center

Hindmarsh, Chloe S.; Jones, Sandra C.; Kervin, Lisa

2015-01-01

Alcohol media literacy is an emerging field that aims to address the link between exposure to alcohol advertising and subsequent expectancies and behaviours for children and adolescents. The design, rigour and results of alcohol media literacy programmes vary considerably, resulting in a number of unanswered questions about effectiveness. To…

In-Service Training Programmes for Inclusive Education in Serbia--Offer and Implementation

ERIC Educational Resources Information Center

Matovic, Nataša; Spasenovic, Vera

2015-01-01

The initial education and in-service training of all educators, particularly teachers, play a vital role in strengthening competences necessary for implementing inclusive educational practice. This paper analyses offered and implemented inservice training programmes for educators in the field of inclusive education or, more precisely, for working…

Students' Evaluation of Their English Language Learning Experience

ERIC Educational Resources Information Center

Maizatulliza, M.; Kiely, R.

2017-01-01

In the field of English language teaching and learning, there is a long history of investigating students' performance while they are undergoing specific learning programmes. This research study, however, focused on students' evaluation of their English language learning experience after they have completed their programme. The data were gathered…

Data from: Retrospective analysis of a classical biological control programme

USDA-ARS?s Scientific Manuscript database

This database contains the raw data for the publication entitled Naranjo, S.E. 2018. Retrospective analysis of a classical biological control programme. Journal of Applied Ecology https://doi.org/10.1111/1365-2664.13163. Specific data include field-based, partial life table data for immature stage...

Towards an Ethics of "Research Programmes" in Special Education

ERIC Educational Resources Information Center

Hausstatter, Rune Sarromaa; Connolley, Steven

2007-01-01

This article presents an analysis of the different perspectives and ideologies within the evolving field of special education research. This examination has claimed that Imre Lakatos' notion of "research programmes", which allows for a plurality of directions of research, provides a valuable guide for understanding the development and current…

Making Sense of Learning: Insights from an Experientially-Based Undergraduate Entrepreneurship Programme

ERIC Educational Resources Information Center

Blackwood, Tony; Round, Anna; Pugalis, Lee; Hatt, Lucy

2015-01-01

Entrepreneurial learning is complex, reflecting the distinctive dispositions of entrepreneurs (including nascent entrepreneurs at an early stage in their entrepreneurial life course). The surge in entrepreneurship education programmes over recent decades and the attendant increase in scholarship have often contributed to this convoluted field.…

Collaborations, Courses, and Competitions: Developing Entrepreneurship Programmes at UCL

ERIC Educational Resources Information Center

Chapman, David; Skinner, Jeff

2006-01-01

Purpose: This paper aims to detail a range of collaborative programmes developed by University College London (UCL) and the London Business School (LBS). These schemes have been developed to exploit synergies between the two institutions with the aim of promoting entrepreneurship within the fields of science and technology.…

`Discover, Understand, Implement, and Transfer': Effectiveness of an intervention programme to motivate students for science

NASA Astrophysics Data System (ADS)

Schütte, Kerstin; Köller, Olaf

2015-09-01

Considerable research has focused on how best to satisfy modern societies' needs for skilled labour in the field of science. The present study evaluated an intervention programme designed to increase secondary school students' motivation to pursue a science career. Students from 3 schools of the highest educational track participated for up to 2 years in the intervention programme, which was implemented as an elective in the school curriculum. Our longitudinal study design for evaluating the effectiveness of the intervention programme included all students at the grade levels involved in the programme with students who did not participate serving as a control group. Mixed-model analyses of variance showed none of the intended effects of the intervention programme on science motivation; latent growth models corroborated these results. When the programme began, students who enrolled in the science elective (n = 92) were already substantially more motivated than their classmates (n = 228). Offering such an intervention programme as an elective did not further increase the participating students' science motivation. It seems worthwhile to carry out intervention programmes with talented students who show (comparatively) little interest in science at the outset rather than with highly motivated students who self-select into the programme.

Low-power hardware implementation of movement decoding for brain computer interface with reduced-resolution discrete cosine transform.

PubMed

Minho Won; Albalawi, Hassan; Xin Li; Thomas, Donald E

2014-01-01

This paper describes a low-power hardware implementation for movement decoding of brain computer interface. Our proposed hardware design is facilitated by two novel ideas: (i) an efficient feature extraction method based on reduced-resolution discrete cosine transform (DCT), and (ii) a new hardware architecture of dual look-up table to perform discrete cosine transform without explicit multiplication. The proposed hardware implementation has been validated for movement decoding of electrocorticography (ECoG) signal by using a Xilinx FPGA Zynq-7000 board. It achieves more than 56× energy reduction over a reference design using band-pass filters for feature extraction.

UW VLSI chip tester

NASA Astrophysics Data System (ADS)

McKenzie, Neil

1989-12-01

We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

Field programmable gate array processing of eye-safe all-fiber coherent wind Doppler lidar return signals

NASA Astrophysics Data System (ADS)

Abdelazim, S.; Santoro, D.; Arend, M.; Moshary, F.; Ahmed, S.

2011-11-01

A field deployable all-fiber eye-safe Coherent Doppler LIDAR is being developed at the Optical Remote Sensing Lab at the City College of New York (CCNY) and is designed to monitor wind fields autonomously and continuously in urban settings. Data acquisition is accomplished by sampling lidar return signals at 400 MHz and performing onboard processing using field programmable gate arrays (FPGAs). The FPGA is programmed to accumulate signal information that is used to calculate the power spectrum of the atmospherically back scattered signal. The advantage of using FPGA is that signal processing will be performed at the hardware level, reducing the load on the host computer and allowing for 100% return signal processing. An experimental setup measured wind speeds at ranges of up to 3 km.

Qualification Strategies of Field Programmable Gate Arrays (FPGAs) for Space Application

NASA Technical Reports Server (NTRS)

Sheldon, Douglas; Schone, Harald

2005-01-01

This viewgraph document reviews the issue of using Field Programmable Gate Arrays (FPGAs) in Space Application, and the some of the strategies for qualifying the FPGA. Qualification and risk management of such complex systems requires new approaches. The paper presents a matrix approach to qualification has been presented that: - Complements historical specifications - Highlights the importance of device physics as a cornerstone to qualification. - Provides levels of risk management that expressly document trade offs. - Stresses the role of the FPGA vendor as team member in the development of modern spacecraft.

Protecting drinking water: water quality testing and PHAST in South Africa.

PubMed

Breslin, E D

2000-01-01

The paper presents an innovative field-based programme that uses a simple total coliform test and the approach of PHAST (Participatory Hygiene And Sanitation Transformation) to help communities exploring possible water quality problems and actions that can be taken to address them. The Mvula Trust, a South African water and environmental sanitation NGO, has developed the programme. It is currently being tested throughout South Africa. The paper provides two case studies on its implementation in the field, and suggests ways in which the initiative can be improved in the future.

The IMPACT Common Module - A Low Cost, Reconfigurable Building Block for Next Generation Phased Arrays

DTIC Science & Technology

2016-03-31

The SiGe receiver has two stages of programmable RF filtering and one stage of IF filtering. Each filter can be tuned in center frequency and...distribution unlimited. transmit, with an IF to RF upconversion chain that is split to programmable phase shifters and VGAs at each output port. Figure 2...These are optimized to run on medium grade Field Programmable Gate Arrays (FPGAs), such as the Altera Arria 10, and represent a few of the many

The Catalonian Expert Patient Programme for Chagas Disease: An Approach to Comprehensive Care Involving Affected Individuals.

PubMed

Claveria Guiu, Isabel; Caro Mendivelso, Johanna; Ouaarab Essadek, Hakima; González Mestre, Maria Asunción; Albajar-Viñas, Pedro; Gómez I Prat, Jordi

2017-02-01

The Catalonian Expert Patient Programme on Chagas disease is a initiative, which is part of the Chronic Disease Programme. It aims to boost responsibility of patients for their own health and to promote self-care. The programme is based on nine sessions conducted by an expert patient. Evaluation was focusing in: habits and lifestyle/self-care, knowledge of disease, perception of health, self-esteem, participant satisfaction, and compliance with medical follow-up visits. Eighteen participants initiated the programme and 15 completed it. The participants were Bolivians. The 66.7 % of them had been diagnosed with chagas disease in Spain. The 100 % mentioned that they would participate in this activity again and would recommend it to family and friends. The knowledge about disease improve after sessions. The method used in the programme could serve as a key strategy in the field of comprehensive care for individuals with this disease.

An Intensive Programme on Education for Sustainable Development: The Participants' Experience

ERIC Educational Resources Information Center

Biasutti, Michele

2015-01-01

This paper presents the framework of an intensive programme (IP) organised by UNESCO and addressed to young graduate professionals to prepare them for a career in fields related to sustainability. The aims of the IP were to address participants' environmental awareness and to develop attitudes and skills related to environmental planning and…

Backgrounder: The MAB Programme.

ERIC Educational Resources Information Center

United Nations Educational, Scientific, and Cultural Organization, Paris (France). Office of Public Information.

The Man and the Biosphere Programme (MAB) was launched in November 1971 under the auspices of Unesco. Its aim is to help to develop scientific knowledge with a view to the rational management and conservation of natural resources, to train qualified personnel in this field, and to disseminate the knowledge acquired both to the decision-makers and…

Field-Based Learning: The Challenge of Practising Participatory Knowledge

ERIC Educational Resources Information Center

Morrissey, John; Clavin, Alma; Reilly, Kathy

2013-01-01

In 2009, Geography at National University of Ireland, Galway, launched a new taught master's programme, the MA in Environment, Society and Development. The vision for the programme was to engage students in the analysis and critique of the array of interventionary practices of development and securitization in our contemporary world. A range of…

Marketing University Programmes in China: Innovative Experience in Executive and Professional Education

ERIC Educational Resources Information Center

Liu, Ning Rong; Crossley, Michael

2010-01-01

This article addresses the limited amount of research in the realm of programme marketing in the Chinese higher education sector. Original field research examines the emergence of marketing principles and strategies with specific reference to the experience of three higher education institutions in China. The development and promotion of executive…

Establishing a Portfolio Assessment Framework for Pre-Service Teachers: A Multiple Perspectives Approach

ERIC Educational Resources Information Center

Denney, Maria K.; Grier, Jeanne M.; Buchanan, Merilyn

2012-01-01

In the field of initial teacher training, portfolios are widely used to assess pre-service teachers' performance as well as the outcomes of university-based teacher preparation programmes. However, little is known about the explicit design of portfolio assessment mechanisms in teacher preparation programmes. Issues related to the design and…

Alternative Placements in Initial Teacher Education: An Evaluation

ERIC Educational Resources Information Center

Purdy, Noel; Gibson, Ken

2008-01-01

The paper evaluates a programme of short alternative placements for final-year B.Ed. students in Northern Ireland, which aims to broaden student teachers' experience and develop their transferable skills. The alternative placement programme is set first in an international context of evolving pre-service field placements and then set in a local…

Entrepreneurship for Bioscience Researchers: A Case Study of an Entrepreneurship Programme

ERIC Educational Resources Information Center

Heinonen, Jarna; Poikkijoki, Sari-Anne; Vento-Vierikko, Irma

2007-01-01

Entrepreneurship is reaching new areas in which the concept of business is more or less unfamiliar and remote. This study focuses on a specific entrepreneurship education programme in the fields of chemistry, physics, information technology and bioinformatics, life sciences and medicine development. The aim is to gain a deeper understanding of the…

Development of e-Career Guidance Programme for Secondary Schools in Akwa Ibom State

ERIC Educational Resources Information Center

John, Imitoro E.; Udofia, Nsikak-Abasi; Udoh, Nsisong A.; Anagbogu, Mercy A.

2016-01-01

This study developed and field tested an electronic career guidance package for secondary schools, the e-Career Guidance System. The study was an educational research and development study and thus utilised the instrumentation research design. The formative evaluation of the developed programme was carried out using the pretest-posttest…

European Association of Echocardiography: Research Grant Programme.

PubMed

Gargani, Luna; Muraru, Denisa; Badano, Luigi P; Lancellotti, Patrizio; Sicari, Rosa

2012-01-01

The European Society of Cardiology (ESC) offers a variety of grants/fellowships to help young professionals in the field of cardiological training or research activities throughout Europe. The number of grants has significantly increased in recent years with contributions from the Associations, Working Groups and Councils of the ESC. The European Association of Echocardiography (EAE) is a registered branch of the ESC and actively takes part in this initiative. One of the aims of EAE is to promote excellence in research in cardiovascular ultrasound and other imaging modalities in Europe. Therefore, since 2008, the EAE offers a Research Grant Programme to help young doctors to obtain research experience in a high standard academic centre (or similar institution oriented to clinical or pre-clinical research) in an ESC member country other than their own. This programme can be considered as a valorization of the geographical mobility as well as cultural exchanges and professional practice in the field of cardiovascular imaging. The programme has been very successful so far, therefore in 2012 the EAE has increased its offer to two grants of 25,000 euros per annum each.

[Big differences in leadership and management training within health care services. Leadership and issues concerning cooperation should be more emphasized in basic medical education].

PubMed

Hauptig, S; Collste, L; Hammar, M; Calltorp, J; Frischer, J; Haase, H; Lindquist, I; Andersson, C

1999-12-08

A recent survey of medical management programmes at universities across the country showed manifest national differences to exist, both quantitative and qualitative. Using a questionnaire, the Swedish Society of Medical Management examined the programmes for physiotherapists, occupational therapists, social workers, nurses and physicians, with respect to such issues as leadership, self-awareness and communication, health economics, and administration. It was concluded that knowledge acquired differs between fields; that physiotherapy programmes tend to have a very didactic approach; that nurses are taught the importance of participation in developmental processes; that doctors are exposed to somewhat the same approach but to a large extent on a voluntary basis; and that social workers obtain good insight into the administrative skills necessary to their work. In the article it is concluded that students would benefit from orientation in the diverse approaches used in the other fields than their own, and that pooling of resources among different programmes might be a more economic alternative to current practice.

ESF EUROCORES Programmes In Geosciences And Environmental Sciences

NASA Astrophysics Data System (ADS)

Jonckheere, I. G.

2007-12-01

In close cooperation with its Member Organisations, the European Science Foundation (ESF) has launched since late 2003 a series of European Collaborative Research (EUROCORES) Programmes. Their aim is to enable researchers in different European countries to develop cooperation and scientific synergy in areas where European scale and scope are required in a global context. The EUROCORES Scheme provides an open, flexible and transparent framework that allows national science funding and science performing agencies to join forces to support excellent European-led research, following a selection among many science-driven suggestions for new Programmes themes submitted by the scientific community. The EUROCORES instrument represents the first large scale attempt of national research (funding) agencies to act together against fragmentation, asynchronicity and duplication of research (funding) within Europe. There are presently 7 EUROCORES Programmes specifically dealing with cutting edge science in the fields of Earth, Climate and Environmental Sciences. The EUROCORES Programmes consist of a number of international, multidisciplinary collaborative research projects running for 3-4 years, selected through independent peer review. Under the overall responsibility of the participating funding agencies, those projects are coordinated and networked together through the scientific guidance of a Scientific Committee, with the support of a Programme Coordinator, responsible at ESF for providing planning, logistics, and the integration and dissemination of science. Strong links are aimed for with other major international programmes and initiatives worldwide. In this framework, linkage to IYPE would be of major interest for the scientific communities involved. Each Programme mobilises 5 to 13 million Euros in direct science funding from 9 to 27 national agencies from 8 to 20 countries. Additional funding for coordination, networking and dissemination is allocated by the ESF through these distinctive research initiatives, to build on the national research efforts and contribute to the capacity building, in relation with typically about 15-20 post-doc positions and/or PhD studentships supported nationally within each Programme. Typical networking activities are topical workshops, open sessions in a larger conference, Programme conference, (summer / winter) schools, exchange visits across projects or programmes. Overall, EUROCORES Programmes are supported by more than 60 national agencies from 30 countries and by the European Science Foundation (ESF) with support by the European Commission, DG Research (Sixth Framework Programme, contract ERAS-CT-2003-980409). In the framework of AGU, a series of present EUROCORES Programmes in the field of Geosciences and Environmental Sciences are presented (e.g., EuroDIVERSITY, EuroDEEP, EUROMARGINS, EuroCLIMATE, and EuroMinScI).

DMD-based programmable wide field spectrograph for Earth observation

NASA Astrophysics Data System (ADS)

Zamkotsian, Frédéric; Lanzoni, Patrick; Liotard, Arnaud; Viard, Thierry; Costes, Vincent; Hébert, Philippe-Jean

2015-03-01

In Earth Observation, Universe Observation and Planet Exploration, scientific return could be optimized in future missions using MOEMS devices. In Earth Observation, we propose an innovative reconfigurable instrument, a programmable wide-field spectrograph where both the FOV and the spectrum could be tailored thanks to a 2D micromirror array (MMA). For a linear 1D field of view (FOV), the principle is to use a MMA to select the wavelengths by acting on intensity. This component is placed in the focal plane of a first grating. On the MMA surface, the spatial dimension is along one side of the device and for each spatial point, its spectrum is displayed along the perpendicular direction: each spatial and spectral feature of the 1D FOV is then fully adjustable dynamically and/or programmable. A second stage with an identical grating recomposes the beam after wavelengths selection, leading to an output tailored 1D image. A mock-up has been designed, fabricated and tested. The micromirror array is the largest DMD in 2048 x 1080 mirrors format, with a pitch of 13.68μm. A synthetic linear FOV is generated and typical images have been recorded o at the output focal plane of the instrument. By tailoring the DMD, we could modify successfully each pixel of the input image: for example, it is possible to remove bright objects or, for each spatial pixel, modify the spectral signature. The very promising results obtained on the mock-up of the programmable wide-field spectrograph reveal the efficiency of this new instrument concept for Earth Observation.

Lessons from the evaluation of the UK's NHS R&D Implementation Methods Programme

PubMed Central

Soper, Bryony; Hanney, Stephen R

2007-01-01

Background Concern about the effective use of research was a major factor behind the creation of the NHS R&D Programme in 1991. In 1994, an advisory group was established to identify research priorities in research implementation. The Implementation Methods Programme (IMP) flowed from this, and its commissioning group funded 36 projects. In 2000 responsibility for the programme passed to the National Co-ordinating Centre for NHS Service Delivery and Organisation R&D, which asked the Health Economics Research Group (HERG), Brunel University, to conduct an evaluation in 2002. By then most projects had been completed. This evaluation was intended to cover: the quality of outputs, lessons to be learnt about the communication strategy and the commissioning process, and the benefits from the projects. Methods We adopted a wide range of quantitative and qualitative methods. They included: documentary analysis, interviews with key actors, questionnaires to the funded lead researchers, questionnaires to potential users, and desk analysis. Results Quantitative assessment of outputs and dissemination revealed that the IMP funded useful research projects, some of which had considerable impact against the various categories in the HERG payback model, such as publications, further research, research training, impact on health policy, and clinical practice. Qualitative findings from interviews with advisory and commissioning group members indicated that when the IMP was established, implementation research was a relatively unexplored field. This was reflected in the understanding brought to their roles by members of the advisory and commissioning groups, in the way priorities for research were chosen and developed, and in how the research projects were commissioned. The ideological and methodological debates associated with these decisions have continued among those working in this field. The need for an effective communication strategy for the programme as a whole was particularly important. However, such a strategy was never developed, making it difficult to establish the general influence of the IMP as a programme. Conclusion Our findings about the impact of the work funded, and the difficulties faced by those developing the IMP, have implications for the development of strategic programmes of research in general, as well as for the development of more effective research in this field. PMID:17309803

Barriers to community case management of malaria in Saraya, Senegal: training, and supply-chains.

PubMed

Blanas, Demetri A; Ndiaye, Youssoupha; Nichols, Kim; Jensen, Andrew; Siddiqui, Ammar; Hennig, Nils

2013-03-14

Health workers in sub-Saharan Africa can now diagnose and treat malaria in the field, using rapid diagnostic tests and artemisinin-based combination therapy in areas without microscopy and widespread resistance to previously effective drugs. This study evaluates communities' perceptions of a new community case management of malaria programme in the district of Saraya, south-eastern Senegal, the effectiveness of lay health worker trainings, and the availability of rapid diagnostic tests and artemisinin-based combination therapy in the field. The study employed qualitative and quantitative methods including focus groups with villagers, and pre- and post-training questionnaires with lay health workers. Communities approved of the community case management programme, but expressed concern about other general barriers to care, particularly transportation challenges. Most lay health workers acquired important skills, but a sizeable minority did not understand the rapid diagnostic test algorithm and were not able to correctly prescribe arteminisin-based combination therapy soon after the training. Further, few women lay health workers participated in the programme. Finally, the study identified stock-outs of rapid tests and anti-malaria medication products in over half of the programme sites two months after the start of the programme, thought due to a regional shortage. This study identified barriers to implementation of the community case management of malaria programme in Saraya that include lay health worker training, low numbers of women participants, and generalized stock-outs. These barriers warrant investigation into possible solutions of relevance to community case management generally.

Farmer and Veterinarian Attitudes towards the Bovine Tuberculosis Eradication Programme in Spain: What Is Going on in the Field?

PubMed

Ciaravino, Giovanna; Ibarra, Patricia; Casal, Ester; Lopez, Sergi; Espluga, Josep; Casal, Jordi; Napp, Sebastian; Allepuz, Alberto

2017-01-01

The effectiveness of health interventions against bovine tuberculosis (bTB) is influenced by several " non-biological " factors that may hamper bTB detection and control. Although the engagement of stakeholders is a key factor for the eradication programme's success, social factors have been often ignored in the control programmes of animal diseases, especially in developed countries. In this study, we used a qualitative approach to investigate perceptions, opinions, attitudes, and beliefs of farmers, and veterinarians who may influence the effectiveness of the Spanish bTB eradication programme. The study was carried out in two phases. First, 13 key representatives of different groups involved in the programme were interviewed through exploratory interviews to identify most relevant themes circulating in the population. Interviews focused on strong and weak points of the programme; reasons for failure to achieve eradication; benefits of being disease free; future perspectives, and proposed changes to the programme. Based on these results, a thematic guide was developed and detailed information was gained through face-to-face in-depth interviews conducted on a purposive sample of 39 farmers and veterinarians. Data were analysed following an ethnographic methodology. Main results suggested that the bTB programme is perceived as a law enforcement duty without an adequate motivation of some stakeholders and a general feeling of distrust arose. The complexity of bTB epidemiology combined with gaps in knowledge and weak communication throughout stakeholders contributed to causing disbeliefs, which in turn generated different kinds of guesses and interpretations. Low reliability in the routine skin test for bTB screening was expressed and the level of confidence on test results interpretation was linked with skills and experience of public and private veterinarians in the field. Lack of training for farmers and pressure faced by veterinarians during field activities also emerged. Few benefits of being bTB free were perceived and comparative grievances referred to wildlife and other domestic reservoirs, sector-specific legislation for bullfighting farms, and the absence of specific health legislation for game hunting farms were reported. Understanding reasons for demotivation and scepticism may help institutions to ensure stakeholders' collaboration and increase the acceptability of control measures leading to an earlier achievement of eradication.

Canaries in the coal mine: Interpersonal violence, gang violence, and violent extremism through a public health prevention lens.

PubMed

Eisenman, David P; Flavahan, Louise

2017-08-01

This paper asks what programmes and policies for preventing violent extremism (also called 'countering violent extremism', or CVE) can learn from the public health violence prevention field. The general answer is that addressing violent extremism within the wider domain of public health violence prevention connects the effort to a relevant field of research, evidence-based policy and programming, and a broader population reach. This answer is reached by examining conceptual alignments between the two fields at both the case-level and the theoretical level. To address extremist violence within the wider reach of violence prevention, having a shared model is seen as a first step. The World Health Organization uses the social-ecological framework for assessing the risk and protective factors for violence and developing effective public-health based programmes. This study illustrates how this model has been used for gang violence prevention and explores overlaps between gang violence prevention and preventing violent extremism. Finally, it provides policy and programme recommendations to align CVE with public health violence prevention.

Programmable Colored Illumination Microscopy (PCIM): A practical and flexible optical staining approach for microscopic contrast enhancement

NASA Astrophysics Data System (ADS)

Zuo, Chao; Sun, Jiasong; Feng, Shijie; Hu, Yan; Chen, Qian

2016-03-01

Programmable colored illumination microscopy (PCIM) has been proposed as a flexible optical staining technique for microscopic contrast enhancement. In this method, we replace the condenser diaphragm of a conventional microscope with a programmable thin film transistor-liquid crystal display (TFT-LCD). By displaying different patterns on the LCD, numerous established imaging modalities can be realized, such as bright field, dark field, phase contrast, oblique illumination, and Rheinberg illuminations, which conventionally rely on intricate alterations in the respective microscope setups. Furthermore, the ease of modulating both the color and the intensity distribution at the aperture of the condenser opens the possibility to combine multiple microscopic techniques, or even realize completely new methods for optical color contrast staining, such as iridescent dark-field and iridescent phase-contrast imaging. The versatility and effectiveness of PCIM is demonstrated by imaging of several transparent colorless specimens, such as unstained lung cancer cells, diatom, textile fibers, and a cryosection of mouse kidney. Finally, the potentialities of PCIM for RGB-splitting imaging with stained samples are also explored by imaging stained red blood cells and a histological section.

International education is a broken field: Can ubuntu education bring solutions?

NASA Astrophysics Data System (ADS)

Piper, Benjamin

2016-02-01

Ubuntu is an African philosophy of human kindness; applying it in the Global South would fundamentally alter the design of the education sector. This essay argues, however, that the field of international educational development is not, in fact, structured to support an education influenced by ubuntu ideals. Specifically, the educational development milieu includes donors, implementers and academicians who do not sufficiently question the power dynamics which underpin education development. This creates a field where the power imbalances between donors and host governments are not interrogated, where development workers place too much faith in their own knowledge rather than that of local education experts, and where development practitioners rarely appreciate the privilege of working in countries which are not their own. An ubuntu education would alter the educational development field in myriad critical ways, a few of which are suggested in this essay. Educational development programmes in universities and intake programmes for implementers and donors should teach officers humility, appreciating existing local talent and expertise. Donor programmes should incentivise reflective practice which formally embeds appreciation for local culture and expertise, thereby supporting structures which help educational development experts to review their metacognitive processes. The field should also dramatically increase the numbers of local, minority and female educational development practitioners and provide more avenues for advancement for those groups. These are activities which are critical to supporting the education development field, but require a fundamental change of attitude by practitioners to ensure the right kind of relationships between the West and the Global South.

Comparison of Octopus Semi-Automated Kinetic Perimetry and Humphrey Peripheral Static Perimetry in Neuro-Ophthalmic Cases

PubMed Central

Rowe, Fiona J.; Noonan, Carmel; Manuel, Melanie

2013-01-01

Aim. To compare semikinetic perimetry (SKP) on Octopus 900 perimetry to a peripheral static programme with Humphrey automated perimetry. Methods. Prospective cross-section study comparing Humphrey full field (FF) 120 two zone programme to a screening protocol for SKP on Octopus perimetry. Results were independently graded for presence/absence of field defect plus type and location of defect. Results. 64 patients (113 eyes) underwent dual perimetry assessment. Mean duration of assessment for SKP was 4.54 minutes ±0.18 and 6.17 ± 0.12 for FF120 (P = 0.0001). 80% of results were correctly matched for normal or abnormal visual fields using the I4e target versus FF120, and 73.5% were correctly matched using the I2e target versus FF120. When comparing Octopus results with combined I4e and I2e isopters to the FF120 result, a match for normal or abnormal fields was recorded in 87%. Conclusions. Humphrey perimetry test duration was generally longer than Octopus SKP. In the absence of kinetic perimetry, peripheral static suprathreshold programme options such as FF120 may be useful for detection of visual field defects. However, statokinetic dissociation may occur. Octopus SKP utilising both I4e and I2e targets provides detailed information of both the defect depth and size and may provide a more representative view of the actual visual field defect. PMID:24558605

Information barriers and social stratification in higher education: evidence from a field experiment.

PubMed

Abbiati, Giovanni; Argentin, Gianluca; Barone, Carlo; Schizzerotto, Antonio

2017-11-29

Our contribution assesses the role of information barriers for patterns of participation in Higher Education (HE) and the related social inequalities. For this purpose, we developed a large-scale clustered randomised experiment involving over 9,000 high school seniors from 62 Italian schools. We designed a counseling intervention to correct student misperceptions of the profitability of HE, that is, the costs, economic returns and chances of success of investments in different tertiary programs. We employed a longitudinal survey to test whether treated students' educational trajectories evolved differently relative to a control group. We find that, overall, treated students enrolled less often in less remunerative fields of study in favour of postsecondary vocational programmes. Most importantly, this effect varied substantially by parental social class and level of education. The shift towards vocational programmes was mainly due to the offspring of low-educated parents; in contrast, children of tertiary graduates increased their participation in more rewarding university fields. Similarly, the redistribution from weak fields to vocational programmes mainly involved the children of the petty bourgeoisie and the working class, while upper class students invested in more rewarding university fields. We argue that the status-maintenance model proposed by Breen and Goldthorpe can explain these socially differentiated treatment effects. Overall, our results challenge the claim that student misperceptions contribute to horizontal inequalities in access to HE. © London School of Economics and Political Science 2017.

[The SGO Health Research Promotion Program. XIII. Evaluation of the section 'Addiction Research'].

PubMed

van Rees-Wortelboer, M M

1999-01-02

As a part of the SGO Health Research Promotion Programme a research programme on addiction research was realized. Aim of the programme was to strengthen and concentrate the Dutch research into addiction. Within the Amsterdam Institute for Addiction Research (AIAR), a structural collaboration between the Jellinek Treatment Centre for Addiction, the University of Amsterdam and the Academic Hospital of the University of Amsterdam, strategic research programmes were developed on the borderland of addiction and psychiatry, notably 'Clinical epidemiology addiction' and 'Developmental disorders, addiction and psychotraumas'. The institution of a co-ordinating platform of research groups conducting socio-epidemiological addiction research improved the co-ordination of research lines in this field.

Association of strategic management with vaccination in the terms of globalization.

PubMed

Rabrenovic, Mihajlo; Cukanovic Karavidic, Marija; Stosic, Ivana

2018-04-01

Globalization is having an ever growing impact on the field of vaccine production and distribution in the world and domestically. In this article we examine the impact of taking a strategic approach to vaccination programmes by all the relevant actors: WHO, UNICEF, national immunization programmes, and vaccine manufacturers and distributors. The review of the relevant literature indicates that there are commonalities to the worldwide vaccination programmes. A comparative analysis of various vaccination strategies recommended by WHO and the immunization calendars of certain European countriesis made as well as an analysis of the Serbian vaccination programme. New and more expensive vaccines will continue to appear on the market in increasingly short periods of time.

Feasibility of an experiential community garden and nutrition programme for youth living in public housing.

PubMed

Grier, Karissa; Hill, Jennie L; Reese, Felicia; Covington, Constance; Bennette, Franchennette; MacAuley, Lorien; Zoellner, Jamie

2015-10-01

Few published community garden studies have focused on low socio-economic youth living in public housing or used a community-based participatory research approach in conjunction with youth-focused community garden programmes. The objective of the present study was to evaluate the feasibility (i.e. demand, acceptability, implementation and limited-effectiveness testing) of a 10-week experiential theory-based gardening and nutrition education programme targeting youth living in public housing. In this mixed-methods feasibility study, demand and acceptability were measured using a combination of pre- and post-programme surveys and interviews. Implementation was measured via field notes and attendance. Limited-effectiveness was measured quantitatively using a pre-post design and repeated-measures ANOVA tests. Two public housing sites in the Dan River Region of south central Virginia, USA. Forty-three youth (primarily African American), twenty-five parents and two site leaders. The positive demand and acceptability findings indicate the high potential of the programme to be used and be suitable for the youth, parents and site leaders. Field notes revealed numerous implementation facilitators and barriers. Youth weekly attendance averaged 4·6 of 10 sessions. Significant improvements (P<0·05) were found for some (e.g. fruit and vegetable asking self-efficacy, overall gardening knowledge, knowledge of MyPlate recommendations), but not all limited-effectiveness measures (e.g. willingness to try fruits and vegetables, fruit and vegetable eating self-efficacy). This community-based participatory research study demonstrates numerous factors that supported and threatened the feasibility of a gardening and nutrition programme targeting youth in public housing. Lessons learned are being used to adapt and strengthen the programme for future efforts targeting fruit and vegetable behaviours.

High-performance reconfigurable coincidence counting unit based on a field programmable gate array.

PubMed

Park, Byung Kwon; Kim, Yong-Su; Kwon, Osung; Han, Sang-Wook; Moon, Sung

2015-05-20

We present a high-performance reconfigurable coincidence counting unit (CCU) using a low-end field programmable gate array (FPGA) and peripheral circuits. Because of the flexibility guaranteed by the FPGA program, we can easily change system parameters, such as internal input delays, coincidence configurations, and the coincidence time window. In spite of a low-cost implementation, the proposed CCU architecture outperforms previous ones in many aspects: it has 8 logic inputs and 4 coincidence outputs that can measure up to eight-fold coincidences. The minimum coincidence time window and the maximum input frequency are 0.47 ns and 163 MHz, respectively. The CCU will be useful in various experimental research areas, including the field of quantum optics and quantum information.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Citterio, M.; Camplani, A.; Cannon, M.

SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less

Note: The design of thin gap chamber simulation signal source based on field programmable gate array.

PubMed

Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Liang, Futian; Jin, Ge

2015-01-01

The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability.

Reprogrammable field programmable gate array with integrated system for mitigating effects of single event upsets

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong (Inventor); Herath, Jeffrey A. (Inventor)

2010-01-01

An integrated system mitigates the effects of a single event upset (SEU) on a reprogrammable field programmable gate array (RFPGA). The system includes (i) a RFPGA having an internal configuration memory, and (ii) a memory for storing a configuration associated with the RFPGA. Logic circuitry programmed into the RFPGA and coupled to the memory reloads a portion of the configuration from the memory into the RFPGA's internal configuration memory at predetermined times. Additional SEU mitigation can be provided by logic circuitry on the RFPGA that monitors and maintains synchronized operation of the RFPGA's digital clock managers.

Note: The design of thin gap chamber simulation signal source based on field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hu, Kun; Wang, Xu; Li, Feng

The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability.

Field programmable gate array-assigned complex-valued computation and its limits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bernard-Schwarz, Maria, E-mail: maria.bernardschwarz@ni.com; Institute of Applied Physics, TU Wien, Wiedner Hauptstrasse 8, 1040 Wien; Zwick, Wolfgang

We discuss how leveraging Field Programmable Gate Array (FPGA) technology as part of a high performance computing platform reduces latency to meet the demanding real time constraints of a quantum optics simulation. Implementations of complex-valued operations using fixed point numeric on a Virtex-5 FPGA compare favorably to more conventional solutions on a central processing unit. Our investigation explores the performance of multiple fixed point options along with a traditional 64 bits floating point version. With this information, the lowest execution times can be estimated. Relative error is examined to ensure simulation accuracy is maintained.

A control system based on field programmable gate array for papermaking sewage treatment

NASA Astrophysics Data System (ADS)

Zhang, Zi Sheng; Xie, Chang; Qing Xiong, Yan; Liu, Zhi Qiang; Li, Qing

2013-03-01

A sewage treatment control system is designed to improve the efficiency of papermaking wastewater treatment system. The automation control system is based on Field Programmable Gate Array (FPGA), coded with Very-High-Speed Integrate Circuit Hardware Description Language (VHDL), compiled and simulated with Quartus. In order to ensure the stability of the data used in FPGA, the data is collected through temperature sensors, water level sensor and online PH measurement system. The automatic control system is more sensitive, and both the treatment efficiency and processing power are increased. This work provides a new method for sewage treatment control.

Radiation Hardened Electronics for Extreme Environments

NASA Technical Reports Server (NTRS)

Keys, Andrew S.; Watson, Michael D.

2007-01-01

The Radiation Hardened Electronics for Space Environments (RHESE) project consists of a series of tasks designed to develop and mature a broad spectrum of radiation hardened and low temperature electronics technologies. Three approaches are being taken to address radiation hardening: improved material hardness, design techniques to improve radiation tolerance, and software methods to improve radiation tolerance. Within these approaches various technology products are being addressed including Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA), MEMS Serial Processors, Reconfigurable Processors, and Parallel Processors. In addition to radiation hardening, low temperature extremes are addressed with a focus on material and design approaches.

Self-Adaptive System based on Field Programmable Gate Array for Extreme Temperature Electronics

NASA Technical Reports Server (NTRS)

Keymeulen, Didier; Zebulum, Ricardo; Rajeshuni, Ramesham; Stoica, Adrian; Katkoori, Srinivas; Graves, Sharon; Novak, Frank; Antill, Charles

2006-01-01

In this work, we report the implementation of a self-adaptive system using a field programmable gate array (FPGA) and data converters. The self-adaptive system can autonomously recover the lost functionality of a reconfigurable analog array (RAA) integrated circuit (IC) [3]. Both the RAA IC and the self-adaptive system are operating in extreme temperatures (from 120 C down to -180 C). The RAA IC consists of reconfigurable analog blocks interconnected by several switches and programmable by bias voltages. It implements filters/amplifiers with bandwidth up to 20 MHz. The self-adaptive system controls the RAA IC and is realized on Commercial-Off-The-Shelf (COTS) parts. It implements a basic compensation algorithm that corrects a RAA IC in less than a few milliseconds. Experimental results for the cold temperature environment (down to -180 C) demonstrate the feasibility of this approach.

A programmable controller based on CAN field bus embedded microprocessor and FPGA

NASA Astrophysics Data System (ADS)

Cai, Qizhong; Guo, Yifeng; Chen, Wenhei; Wang, Mingtao

2008-10-01

One kind of new programmable controller(PLC) is introduced in this paper. The advanced embedded microprocessor and Field-Programmable Gate Array (FPGA) device are applied in the PLC system. The PLC system structure was presented in this paper. It includes 32 bits Advanced RISC Machines (ARM) embedded microprocessor as control core, FPGA as control arithmetic coprocessor and CAN bus as data communication criteria protocol connected the host controller and its various extension modules. It is detailed given that the circuits and working principle, IiO interface circuit between ARM and FPGA and interface circuit between ARM and FPGA coprocessor. Furthermore the interface circuit diagrams between various modules are written. In addition, it is introduced that ladder chart program how to control the transfer info of control arithmetic part in FPGA coprocessor. The PLC, through nearly two months of operation to meet the design of the basic requirements.

Studies in Mindfulness: Widening the Field for All Involved in Pastoral Care

ERIC Educational Resources Information Center

Nixon, Graeme; McMurtry, David; Craig, Linda; Nevejan, Annick; Regan-Addis, Heather

2016-01-01

Since 2010, the University of Aberdeen, Scotland, UK, has offered an MSc in studies in mindfulness degree programme within its School of Education. The programme has attracted over 200 students from multiple professional contexts, providing the authors with the opportunity to gather and analyse demographic data, as well as data regarding student…

Lichen elements as pollution indicators: evaluation of methods for large monitoring programmes

Treesearch

Susan Will-Wolf; Sarah Jovan; Michael C. Amacher

2017-01-01

Lichen element content is a reliable indicator for relative air pollution load in research and monitoring programmes requiring both efficiency and representation of many sites. We tested the value of costly rigorous field and handling protocols for sample element analysis using five lichen species. No relaxation of rigour was supported; four relaxed protocols generated...

The International School Effectiveness Research Programme ISERP. First Results of the Quantitative Study.

ERIC Educational Resources Information Center

Creemers, Bert P. M.; And Others

The International School Effectiveness Research Programme (ISERP) is an example of the exchange of research and research results in the field of educational effectiveness. It aims to build on existing models of good practice and to avoid the variations in approach that limit the transferability of data within and between countries. A number of…

Changes and Challenges in Music Education: Reflections on a Norwegian Arts-in-Education Programme

ERIC Educational Resources Information Center

Christophersen, Catharina

2015-01-01

With a recent research study on a Norwegian arts-in-education programme "The Cultural Rucksack" as its starting point, this article addresses policy changes in the fields of culture and education and possible implications these could have on music education in schools. Familiar debates on the quality of education and the political…

Multiplying a Force for Good? the Impact of Security Sector Management Postgraduate Education in Ethiopia

ERIC Educational Resources Information Center

Macphee, Paula-Louise; Fitz-Gerald, Ann

2014-01-01

This paper argues for the importance, benefits and wider impact of a donor-funded, locally supported postgraduate programme in security sector management (SSM) for government officials in Ethiopia. With the exception of specialised education and training programmes within the field of peace and conflict studies, the role of education in…

Can an International Field Experience Assist Health and Physical Education Pre-Service Teachers to Develop Cultural Competency?

ERIC Educational Resources Information Center

Winslade, Matthew

2016-01-01

An emerging focus of teacher education courses within countries such as Australia centres on the development of cultural competency. An international practicum experience or student mobility programme embedded within pre-service teacher education programmes is one way to provide such an opportunity. In subject areas such as Health and Physical…

The Cognitive, Social and Emotional Processes of Teacher Identity Construction in a Pre-Service Teacher Education Programme

ERIC Educational Resources Information Center

Yuan, Rui; Lee, Icy

2015-01-01

This research investigates how three Government-funded Normal Students constructed and reconstructed their identities in a pre-service teacher education programme in China. Drawing upon data from interviews, field observation and the pre-service teachers' written reflections, the study explores the cognitive, social and emotional processes of…

Improving Practices in Early Childhood Classrooms in Pakistan: Issues and Challenges from the Field

ERIC Educational Resources Information Center

Juma, Audrey

2004-01-01

This article focuses on an early childhood programme that has been initiated by the Institute for Educational Development at the Aga Khan University in Karachi, Pakistan. The programme is a Certificate in Education and involves training teachers so as to enable them to understand early childhood education and development, and to become effective…

The European space exploration programme: current status of ESA's plans for Moon and Mars exploration.

PubMed

Messina, Piero; Vennemann, Dietrich

2005-01-01

After a large consultation with the scientific and industrial communities in Europe, the Aurora Space Exploration Programme was unanimously approved at the European Space Agency (ESA) Council at ministerial level in Edinburgh in 2001. This marked the start of the programme's preparation phase that was due to finish by the end of 2004. Aurora features technology development robotic and crewed rehearsal missions aimed at preparing a human mission to Mars by 2033. Due to the evolving context, both international and European, ESA has undertaken a review of the goals and approach of its exploration programme. While maintaining the main robotic missions that had been conceived during Aurora, the European Space Exploration Programme that is currently being proposed to the Aurora participating states and other ESA Member States has a reviewed approach and will feature a greater synergy with other ESA programmes. The paper will present the process that led to the revision of ESA's plans in the field of exploration and will give the current status of the programme. c2005 Published by Elsevier Ltd.

Virtex-5 CN Package Daisy Chain Evaluation Test Report

NASA Technical Reports Server (NTRS)

Suh, Jong-ook

2016-01-01

The board-level temperature cycling reliability of Xilinx Virtex-5 (V5) CN package was investigated. V5s were temperature cycled under two conditions, 0 to +100 C (0/100) and -55 to +100 C (-55/100). During the 0/100 test, no part out of 8 parts failed up to 6586 cycles. During the -55/100 test, one part out of 8 parts failed at 1236 cycle, and there were no additional failures up to 1705 cycles. The failure mode of the part that failed at 1236 cycles indicated that most likely the failure was not a solder fatigue failure, and therefore no obvious solder fatigue failure was observed throughout the tests.

NULL Convention Floating Point Multiplier

PubMed Central

Ramachandran, Seshasayanan

2015-01-01

Floating point multiplication is a critical part in high dynamic range and computational intensive digital signal processing applications which require high precision and low power. This paper presents the design of an IEEE 754 single precision floating point multiplier using asynchronous NULL convention logic paradigm. Rounding has not been implemented to suit high precision applications. The novelty of the research is that it is the first ever NULL convention logic multiplier, designed to perform floating point multiplication. The proposed multiplier offers substantial decrease in power consumption when compared with its synchronous version. Performance attributes of the NULL convention logic floating point multiplier, obtained from Xilinx simulation and Cadence, are compared with its equivalent synchronous implementation. PMID:25879069

NULL convention floating point multiplier.

PubMed

Albert, Anitha Juliette; Ramachandran, Seshasayanan

2015-01-01

Floating point multiplication is a critical part in high dynamic range and computational intensive digital signal processing applications which require high precision and low power. This paper presents the design of an IEEE 754 single precision floating point multiplier using asynchronous NULL convention logic paradigm. Rounding has not been implemented to suit high precision applications. The novelty of the research is that it is the first ever NULL convention logic multiplier, designed to perform floating point multiplication. The proposed multiplier offers substantial decrease in power consumption when compared with its synchronous version. Performance attributes of the NULL convention logic floating point multiplier, obtained from Xilinx simulation and Cadence, are compared with its equivalent synchronous implementation.

A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs

NASA Technical Reports Server (NTRS)

Lohn, Jason; Larchev, Greg; DeMara, Ronald; Korsmeyer, David (Technical Monitor)

2003-01-01

Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of transistors in a typical FPGA are dedicated to interconnect, nearly 80% according to one estimate, evolutionary fault-recovery systems should benefit hy accommodating routing. In this paper, we propose an evolutionary fault-recovery system employing a genetic representation that takes into account both logic and routing configurations. Experiments were run using a software model of the Xilinx Virtex FPGA. We report that using four Virtex combinational logic blocks, we were able to evolve a 100% accurate quadrature decoder finite state machine in the presence of a stuck-at-zero fault.

Programmable spectrometer using MOEMs devices for space applications

NASA Astrophysics Data System (ADS)

Viard, Thierry; Buisset, Christophe; Rejeaunier, Xavier; Zamkotsian, Frédéric; Venancio, Luis M.

2017-11-01

A new class of spectrometer can be designed using programmable components such as MOEMS which enable to tune the beam in spectral width and central wavelength. It becomes possible to propose for space applications a spectrometer with programmable resolution and adjustable spectral bandwidth. The proposed way to tune the output beam is to use the diffraction effect with the so-called PMDG (Programmable Micro Diffraction Gratings ) diffractive MEMS. In that case, small moving structures can form programmable gratings, diffracting or not the incoming light. In the proposed concept, the MOEMS is placed in the focal plane of a first diffracting stage (using a grating for instance). With such implementation, the MOEMS component can be used to select some wavelengths (for instance by reflecting them) and to switch-off the others (for instance by diffracting them). A second diffracting stage is used to recombine the beam composed by all the selected wavelengths. It becomes then possible to change and adjust the filter in λ and Δλ. This type of implementation is very interesting for space applications (Astronomy, Earth observation, planetary observation). Firstly because it becomes possible to tune the filtering function quasi instantaneously. And secondly because the focal plane dimension can be reduced to a single detector (for application without field of view) or to a linear detector instead of a 2D matrix detector (for application with field of view) thanks to a sequential acquisition of the signal.

[The necessity and possibility of developing skills in daily living activities in children attending a special kindergarten for the physically handicapped--demonstrated by means of a five-year-old boy suffering from spastic hemiparesis (author's transl)].

PubMed

Burgheim-Raguss, B

1980-02-01

Within the framework of an empirical study carried out in a special kindergarten it was attempted to answer the question whether it is necessary and possible in such an institution to develop the children's skills in daily living activities. A six month systematic programme was set up for a five-year-old boy suffering from spastic hemiparesis which was designed to develop his skills in personal hygiene, and general behaviour in the kitchen area. In preparing the programme each of the two fields was first treated separately in detail, then the common factors taken into account. The programm's subdivision into an ultimate goal and two partial goals assisted the implementation of the eighteen training steps. A comparision of the knowledge of, and skills in, the two fields before and after the training showed that they had increased both in quantity and quality. As the boy still showed a headway over his peers - comparable in their disabilities - three years after completion of the programme as far as independence was concerned, it can be said that special training in daily living activities can and must be carried out in a special kindergarten for physically handicapped children provided the training is based on a specialized and fully structured programme.

Effects of high-intensity power-frequency electric fields on implanted modern multiprogrammable cardiac pacemakers.

PubMed

Butrous, G S; Meldrum, S J; Barton, D G; Male, J C; Bonnell, J A; Camm, A J

1982-05-01

The effect on an implanted, multiprogrammable pacemaker of power-frequency (50 Hz) electric fields up to an intensity (unperturbed value measured at 1.7 m) of 20 kV/m were assessed in ten paced patients. Radiotelemetric monitoring of the electrocardiogram allowed supervision of the electrocardiogram throughout exposure to the alternating electric field. Displacement body currents of up to 300μA were achieved depending on the position and height of the patient. None of the pacemakers was inhibited, triggered or reverted to fixed rate operation during the exposure. The programmable functions, programmability or output characteristics were not affected. Small changes in cardiac rate and rhythm elicited the correct pacemaker responses. Unlike earlier models of pacemaker, this modern implanted pacemaker, which represents `the state of the art', is not affected by 50 Hz electric fields likely to be encountered when standing underneath power lines.

Veggie Rx: an outcome evaluation of a healthy food incentive programme.

PubMed

Cavanagh, Michelle; Jurkowski, Janine; Bozlak, Christine; Hastings, Julia; Klein, Amy

2017-10-01

One challenge to healthy nutrition, especially among low-income individuals, is access to and consumption of fresh fruits and vegetables. To address this problem, Veggie Rx, a healthy food incentive programme, was established within a community clinic to increase access to fresh produce for low-income patients diagnosed with obesity, hypertension and/or type 2 diabetes. The current research aimed to evaluate Veggie Rx programme effectiveness. A retrospective pre/post design using medical records and programme data was used to evaluate the programme. The study was approved by the University of Albany Institutional Review Board and the Patient Interest Committee of a community clinic. The study was conducted in a low-income, urban neighbourhood in upstate New York. Medical record data and Veggie Rx programme data were analysed for fifty-four eligible participants. An equal-sized control group of patients who were not programme participants were matched on age, ethnicity and co-morbidity status. A statistically significant difference in mean BMI change (P=0·02) between the intervention and the control group was calculated. The intervention group had a mean decrease in BMI of 0·74 kg/m2. Greater improvement in BMI was found among Veggie Rx programme participants. This information will guide programme changes and inform the field on the effectiveness of healthy food incentive programmes for improving health outcomes for low-income populations.

Veggie Rx: an outcome evaluation of a healthy food incentive programme

PubMed Central

Cavanagh, Michelle; Jurkowski, Janine; Bozlak, Christine; Hastings, Julia; Klein, Amy

2017-01-01

Objective One challenge to healthy nutrition, especially among low-income individuals, is access to and consumption of fresh fruits and vegetables. To address this problem, Veggie Rx, a healthy food incentive programme, was established within a community clinic to increase access to fresh produce for low-income patients diagnosed with obesity, hypertension and/or type 2 diabetes. The current research aimed to evaluate Veggie Rx programme effectiveness. Design A retrospective pre/post design using medical records and programme data was used to evaluate the programme. The study was approved by the University of Albany Institutional Review Board and the Patient Interest Committee of a community clinic. Setting The study was conducted in a low-income, urban neighbourhood in upstate New York. Subjects Medical record data and Veggie Rx programme data were analysed for fifty-four eligible participants. An equal-sized control group of patients who were not programme participants were matched on age, ethnicity and co-morbidity status. Results: A statistically significant difference in mean BMI change (P = 0.02) between the intervention and the control group was calculated. The intervention group had a mean decrease in BMI of 0.74 kg/m2. Conclusions Greater improvement in BMI was found among Veggie Rx programme participants. This information will guide programme changes and inform the field on the effectiveness of healthy food incentive programmes for improving health outcomes for low-income populations. PMID:27539192

Strategies used to guide the design and implementation of a national river monitoring programme in South Africa.

PubMed

Roux, D J

2001-06-01

This article explores the strategies that were, and are being, used to facilitate the transition from scientific development to operational application of the South African River Health Programme (RHP). Theoretical models from the field of the management of technology are used to provide insight into the dynamics that influence the relationship between the creation and application of environmental programmes, and the RHP in particular. Four key components of the RHP design are analysed, namely the (a) guiding team, (b) concepts, tools and methods, (c) infra-structural innovations and (d) communication. These key components evolved over three broad life stages of the programme, which are called the design, growth and anchoring stages.

The Field of Knowledge and the Policy Field in Education: PISA and the Production of Knowledge for Policy

ERIC Educational Resources Information Center

Mangez, Eric; Hilgers, Mathieu

2012-01-01

This article is about the Programme for International Student Assessment (PISA) and its actors. It analyses the development and role of PISA as a "cultural product" from the perspective of Bourdieu's field theory. The authors attempt to answer the following questions: Of which field is PISA the product? In which field and by whom is PISA…

Reclaiming the Disengaged? A Bourdieuian Analysis of Work-Based Learning for Young People in England

ERIC Educational Resources Information Center

Thompson, Ron

2011-01-01

This paper uses Bourdieu's concept of field to analyse findings from an ethnographic study of Entry to Employment (E2E) programmes in England. Entry to Employment is a work-based learning programme which aims to re-engage young people with "barriers to learning" inhibiting access to further education, training or employment. The paper…

Evaluation of an Innovative Programme for Training Teachers of Children with Learning and Behavioural Difficulties in New Zealand

ERIC Educational Resources Information Center

Pilgrim, Marcia; Hornby, Garry; Everatt, John; Macfarlane, Angus

2017-01-01

This article reports the views of recent graduates of a competency based, blended learning teacher education programme for specialist resource teachers of children with learning and behaviour difficulties in New Zealand. Identifying and developing the competencies needed by teachers in the field of special needs education is important in ensuring…

Education in the New Era: The Dissemination of Education for Sustainable Development in the Political Science Programmes at Notre Dame University--Louaize

ERIC Educational Resources Information Center

Labaki, Georges

2012-01-01

Sustainable development is continuous process of change requiring painful choices resting on political will. This paper examines the developments needed to engage with sustainable development in the field of political science through the following: the reform in political science programmes to cope with the need for sustainable development in…

"Discover, Understand, Implement, and Transfer": Effectiveness of an Intervention Programme to Motivate Students for Science

ERIC Educational Resources Information Center

Schütte, Kerstin; Köller, Olaf

2015-01-01

Considerable research has focused on how best to satisfy modern societies' needs for skilled labour in the field of science. The present study evaluated an intervention programme designed to increase secondary school students' motivation to pursue a science career. Students from 3 schools of the highest educational track participated for up to 2…

The Development of Innovative Online Problem-Based Learning: A Leadership Course for Leaders in European Public Health

ERIC Educational Resources Information Center

de Jong, Nynke; Könings, Karen D.; Czabanowska, Katarzyna

2014-01-01

The shift to a knowledge information society has given rise to a need for lifelong learning programmes. Such programmes are especially relevant for public health professionals, whose dynamic field of practice is subject to changes due to rapidly developing technologies, evolving expectations of the labour market and new health treats. Lifelong…

Overview of the Higher Education Systems in the Tempus Partner Countries: Central Asia. A Tempus Study. Issue 05

ERIC Educational Resources Information Center

Ruffio, Philippe; Heinamaki, Piia; Tchoukaline, Claire Chastang; Manthey, Anja; Reichboth, Veronika

2011-01-01

The main aim of the Tempus programme is to support the modernisation of higher education in Partner Countries outside the European Union. The targeted regions include Eastern Europe, Central Asia, Western Balkans and the Southern Mediterranean, with a total of 29 Partner Countries participating in the programme. In the field of cooperation in…

The Creation of Multimedia Resources to Support the Gaelic Athletic Association (GAA) Coach Education Programme (CEP)

ERIC Educational Resources Information Center

Crotty, Yvonne; D'Arcy, Jimmy; Sweeney, David

2016-01-01

The Gaelic Athletic Association (GAA) is an Irish amateur sporting and cultural organisation. It represents in excess of 20,000 teams nationwide and is committed to supporting the development of players and coaches through its Coach Education Programme (CEP). A strategic goal of the CEP is to supplement the traditional field based coach education…

Radiation testing campaign results for understanding the suitability of FPGAs in detector electronics

DOE PAGES

Citterio, M.; Camplani, A.; Cannon, M.; ...

2015-11-19

SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less

The first Spanish space programme 1968 1974

NASA Astrophysics Data System (ADS)

Dorado, José M.

2007-06-01

This paper presents the situation of the Spanish aeronautical industry in the early 1960s, the problems suffered during the first ESRO years, the situation in 1975 as a result of the first National Space Programme (1968-1974) and the specific developments carried out within that programme: the first Spanish satellite successfully launched in 1974 (INTASAT) and the first INTA sounding rockets launched from the own Arenosillo range. This justifies the importance of that Programme for the Spanish aeronautical industry, a programme that permitted its transition to the aerospace field. In parallel, agreements with NASA led to the installation of large space ground stations in Spain operated by INTA personnel, to support major NASA space missions, and to the operation of a very active rockets range. These actions allowed Spain to have one of the largest space sectors in Europe, in those years. This paper's purpose is to find out the main reasons behind this effort.

Stated Uptake of Physical Activity Rewards Programmes Among Active and Insufficiently Active Full-Time Employees.

PubMed

Ozdemir, Semra; Bilger, Marcel; Finkelstein, Eric A

2017-10-01

Employers are increasingly relying on rewards programmes in an effort to promote greater levels of activity among employees; however, if enrolment in these programmes is dominated by active employees, then they are unlikely to be a good use of resources. This study uses a stated-preference survey to better understand who participates in rewards-based physical activity programmes, and to quantify stated uptake by active and insufficiently active employees. The survey was fielded to a national sample of 950 full-time employees in Singapore between 2012 and 2013. Participants were asked to choose between hypothetical rewards programmes that varied along key dimensions and whether or not they would join their preferred programme if given the opportunity. A mixed logit model was used to analyse the data and estimate predicted uptake for specific programmes. We then simulated employer payments based on predictions for the percentage of each type of employee likely to meet the activity goal. Stated uptake ranged from 31 to 67% of employees, depending on programme features. For each programme, approximately two-thirds of those likely to enrol were insufficiently active. Results showed that insufficiently active employees, who represent the majority, are attracted to rewards-based physical activity programmes, and at approximately the same rate as active employees, even when enrolment fees are required. This suggests that a programme with generous rewards and a modest enrolment fee may have strong employee support and be within the range of what employers may be willing to spend.

Conceptual design of the SMART dosimeter

NASA Astrophysics Data System (ADS)

Johnson, Erik B.; Vogel, Sam; Frank, Rebecca; Stoddard, Graham; Vera, Alonzo; Alexander, David; Christian, James

2017-08-01

Active dosimeters for astronauts and space weather monitors are critical tools for mitigating radiation induced health issues or system failure on capital equipment. Commercial spaceflight, deep space flight, and satellites require smarter, smaller, and lower power dosimeters. There are a number of instruments with flight heritage, yet as identified in NASA's roadmaps, these technologies do not lend themselves to a viable solution for active dosimetry for an astronaut, particularly for deep space missions. For future missions, nano- and micro-satellites will require compact instruments that will accurately assess the radiation hazard without consuming major resources on the spacecraft. RMD has developed the methods for growing an advanced scintillation material called phenylcarbazole, which provides pulse shape discrimination between protons and electrons. When used in combination with an anti-coincidence detector system, an assessment of the dose from charged ions and neutral particles can be determined. This is valuable as damage on a system (such as silicon or tissue) is dependent on the particle species. Using this crystal with readout electronics developed in partnership with COSMIAC at the University of New Mexico, the design of the Small Mixed field Autonomous Radiation Tracker (SMART) Dosimeter consists of a low-power analog to digital conversion scheme with low-power digital signal processing algorithms, which are to be implemented within a compact system on a chip, such as the Xilinx Zynq series. A review of the conceptual design is presented.

Compact field programmable gate array-based pulse-sequencer and radio-frequency generator for experiments with trapped atoms.

PubMed

Pruttivarasin, Thaned; Katori, Hidetoshi

2015-11-01

We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.

Evolutionary Multiobjective Design Targeting a Field Programmable Transistor Array

NASA Technical Reports Server (NTRS)

Aguirre, Arturo Hernandez; Zebulum, Ricardo S.; Coello, Carlos Coello

2004-01-01

This paper introduces the ISPAES algorithm for circuit design targeting a Field Programmable Transistor Array (FPTA). The use of evolutionary algorithms is common in circuit design problems, where a single fitness function drives the evolution process. Frequently, the design problem is subject to several goals or operating constraints, thus, designing a suitable fitness function catching all requirements becomes an issue. Such a problem is amenable for multi-objective optimization, however, evolutionary algorithms lack an inherent mechanism for constraint handling. This paper introduces ISPAES, an evolutionary optimization algorithm enhanced with a constraint handling technique. Several design problems targeting a FPTA show the potential of our approach.

Compact field programmable gate array-based pulse-sequencer and radio-frequency generator for experiments with trapped atoms

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pruttivarasin, Thaned, E-mail: thaned.pruttivarasin@riken.jp; Katori, Hidetoshi; Innovative Space-Time Project, ERATO, JST, Bunkyo-ku, Tokyo 113-8656

We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.

Some innovative programmes in Astronomy education

NASA Astrophysics Data System (ADS)

Babu, G. S. D.; Sujatha, S.

In order to inculcate a systematic scientific awareness of the subject of Astronomy among the students and to motivate them to pursue careers in Astronomy and Astrophysics, various innovative educational programmes have been designed at MPBIFR. Among them, the main programme is termed as the ``100-hour Certificate Course in Astronomy and Astrophysics'' which has been designed basically for the students of the undergraduate level of B.Sc. and B.E. streams. The time duration of the 100 hours in this course is partitioned as 36 hours of classroom lectures, 34 hours of practicals and field trips and the remaining 30 hours being dedicated to dissertation writing and seminar presentations by the students. In addition, after the 100-hour course, the students have the option to take up specialized advance courses in the topics of Astrobiology, Astrochemistry, Radio Astronomy, Solar Astronomy and Cosmology as week-end classes. These courses are at the post graduate level and are covered in a span of 18 to 20 hours spread over a period of 9 to 10 weeks. As a preparatory programme, short-term introductory courses in the same subject are conducted for the high school students during the summer vacation period. Along with this, a three-week programme in basic Astronomy is also designed as an educational package for the general public. The students of these courses have the opportunity of being taken on field trips to various astronomical centers as well as the Radio, Solar and the Optical Observatories as part of their curriculum. The guided trips to the ISRO’s Satellite Centre at Bangalore and the Satellite Launching Station at SHAR provide high degree of motivation apart from giving thrilling experiences to the students. Further, the motivated students are encouraged to involve themselves in regular research programmes in Astronomy at MPBIFR for publishing research papers in national and international journals. The teaching and mentoring faculty for all these programmes includes the visiting Scientists and Professors from various Research Organizations located in and around Bangalore as well as the in-house Scientific staff. It is gratifying to note that several students, after going through one or more of these courses, have indeed made commitments to pursue Astronomy as their career, some of them even obtaining admissions in to the institutes and universities in India and abroad for further studies in this field.

Programmable shunts and headphones: Are they safe together?

PubMed

Spader, Heather S; Ratanaprasatporn, Linda; Morrison, John F; Grossberg, Jonathan A; Cosgrove, G Rees

2015-10-01

Programmable shunts have a valuable role in the treatment of patients with hydrocephalus, but because a magnet is used to change valve settings, interactions with external magnets may reprogram these shunts. Previous studies have demonstrated the ability of magnetic toys and iPads to erroneously reprogram shunts. Headphones are even more ubiquitous, and they contain an electromagnet for sound projection that sits on the head very close to the shunt valve. This study is the first to look at the magnetic field emissions of headphones and their effect on reprogrammable shunt valves to ascertain whether headphones are safe for patients with these shunts to wear. In this in vitro study of the magnetic properties of headphones and their interactions with 3 different programmable shunts, the authors evaluated Apple earbuds, Beats by Dr. Dre, and Bose QuietComfort Acoustic Noise Cancelling headphones. Each headphone was tested for electromagnetic field emissions using a direct current gaussmeter. The following valves were evaluated: Codman Hakim programmable valve, Medtronic Strata II valve, and Aesculap proGAV. Each valve was tested at distances of 0 to 50 mm (in 5-mm increments) from each headphone. The exposure time at each distance was 1 minute, and 3 trials were performed to confirm results at each valve setting and distance. All 3 headphones generated magnetic fields greater than the respective shunt manufacturer's recommended strength of exposure, but these fields did not persist beyond 5 mm. By 2 cm, the fields levels were below 20 G, well below the Medtronic recommendation of 90 G and the Codman recommendation of 80 G. Because the mechanism for the proGAV is different, there is no recommended gauss level. There was no change in gauss-level emissions by the headphones with changes in frequency and amplitude. Both the Strata and Codman-Hakim valves were reprogrammed by direct contact (distance 0 mm) with the Bose headphones. When a rotation component was added, all 3 headphones reprogrammed the Strata and Codman-Hakim valves at 0 mm. At all distances above 0 mm, the headphones did not affect the shunts. The proGAV valve was not affected by headphones at any distance. Although all the headphones studied generated significant gauss fields at distances less than 5 mm, the programmable valve settings only changed at a distance of 0 mm (i.e., with direct contact). Given the subcutaneous location of the valve, the authors conclude that is highly unlikely that commercially available or customary headphones can contribute to the reprogramming of shunts.

Current status of master of public health programmes in India: a scoping review.

PubMed

Tiwari, Ritika; Negandhi, Himanshu; Zodpey, Sanjay

2018-04-01

There is a recognized need to improve training in public health in India. Currently, several Indian institutions and universities offer the Master of Public Health (MPH) programme. However, in the absence of any formal body or council for regulating public health education in the country, there is limited information available on these programmes. This scoping review was therefore undertaken to review the current status of MPH programmes in India. Information on MPH programmes was obtained using a two-step process. First, a list of all institutions offering MPH programmes in India was compiled by use of an internet and literature search. Second, detailed information on each programme was collected via an internet and literature search and through direct contact with the institutions and recognized experts in public health education. Between 1997 and 2016-2017, the number of institutions offering MPH programmes increased from 2 to 44. The eligibility criteria for the MPH programmes are variable. All programmes include some field experience. The ratio of faculty number to students enrolled ranged from 1:0.1 to 1:42. In the 2016-2017 academic year, 1190 places were being offered on MPH programmes but only 704 students were enrolled. MPH programmes being offered in India have witnessed a rapid expansion in the past two decades. This growth in supply of public health graduates is not yet matched by an increased demand. Despite the recognized need to strengthen the public health workforce in India, there is no clearly defined career pathway for MPH graduates in the national public health infrastructure. Institutions and public health bodies must collaborate to design and deliver MPH programmes to overcome the shortage of public health professionals, such that the development goals for India might be met.

Research Capacity Strengthening in Low and Middle Income Countries - An Evaluation of the WHO/TDR Career Development Fellowship Programme.

PubMed

Käser, Michael; Maure, Christine; Halpaap, Beatrice M M; Vahedi, Mahnaz; Yamaka, Sara; Launois, Pascal; Casamitjana, Núria

2016-05-01

Between August 2012 and April 2013 the Career Development Fellowship programme of the Special Programme for Research and Training in Tropical Diseases (World Health Organization) underwent an external evaluation to assess its past performance and determine recommendations for future programme development and continuous performance improvement. The programme provides a year-long training experience for qualified researchers from low and middle income countries at pharmaceutical companies or product development partnerships. Independent evaluators from the Swiss Tropical and Public Health Institute and the Barcelona Institute for Global Health used a results-based methodology to review the programme. Data were gathered through document review, surveys, and interviews with a range of programme participants. The final evaluation report found the Career Development Fellowship to be relevant to organizers' and programme objectives, efficient in its operations, and effective in its training scheme, which was found to address needs and gaps for both fellows and their home institutions. Evaluators found that the programme has the potential for impact and sustainability beyond the programme period, especially with the successful reintegration of fellows into their home institutions, through which newly-developed skills can be shared at the institutional level. Recommendations included the development of a scheme to support the re-integration of fellows into their home institutions post-fellowship and to seek partnerships to facilitate the scaling-up of the programme. The impact of the Professional Membership Scheme, an online professional development tool launched through the programme, beyond the scope of the Career Development Fellowship programme itself to other applications, has been identified as a positive unintended outcome. The results of this evaluation may be of interest for other efforts in the field of research capacity strengthening in LMICs or, generally, to other professional development schemes of a similar structure.

Coordination and Data Management of the International Arctic Buoy Programme (IABP)

DTIC Science & Technology

2002-09-30

for forcing, validation and assimilation into numerical climate models , and for forecasting weather and ice conditions. TRANSITIONS Using IABP ...Coordination and Data Management of the International Arctic Buoy Programme ( IABP ) Ignatius G. Rigor 1013 NE 40th Street Polar Science Center...analyzed geophysical fields. APPROACH The IABP is a collaboration between 25 different institutions from 8 different countries, which work together

Marine Sciences in CMEA Countries: Programme and Results of Co-operation. Unesco Reports in Marine Science No. 38.

ERIC Educational Resources Information Center

Aksionov, A. A.

In 1971, the 25th Session of the Council for Mutual Economic Assistance (CMEA) adopted a Programme for the Development of Socialist Economic Integration. Later, part of this program became a program of cooperation in the field of oceanography, particularly the chemical, physical, and biological processes of certain important areas of the ocean. To…

Evaluative Study of M.A. Education Programmes of Teacher Education at Higher Education Level in Pakistan

ERIC Educational Resources Information Center

Fatima, Jabeen; Naseer Ud Din, Muhammad

2010-01-01

The study was aimed at evaluating the MA Education Programme of teacher education in Pakistan. Post-graduate teacher's training institutes in Pakistan grant the Master of Education (MA/M.Ed.), Master of Philosophy (M.Phil) and Doctor of Philosophy (Ph.D) post-graduate degrees in the field of education to enhance the careers and accelerate the…

Student Teachers of Technology and Design into Industry: A Northern Ireland Case Study

ERIC Educational Resources Information Center

Gibson, Ken

2013-01-01

This paper, based in Northern Ireland, is a case study of an innovative programme which places year 3 B.Ed. post-primary student teachers of Technology and Design into industry for a five-day period. The industrial placement programme is set in an international context of evolving pre-service field placements and in a local context defined by the…

Making Fieldwork Valuable: Designing fieldwork programmes to meet the needs of young geologists

NASA Astrophysics Data System (ADS)

Thorne, Michael

2016-04-01

This work presents the culmination of many years' in designing and operating field courses for students studying Geology at post-16 level in the context of the British schooling system. Provided is a toolkit, and accompanying rationale, for the educators use when building a sustainable and manageable programme of fieldwork for young geologists. Many educators, particularly under the confines of new regulations have found the promise of increased paper work and accountability challenging and consequently field courses often play a peripheral, even non-existent role in the scheme of work for a large number of young geologists. The process of designing a suitable programme of field study must take account of the relevant stakeholders, chief among these are the views of students and staff but also those of parents, potential destination universities, exam boards and qualification accrediting groups. An audit of desired characteristics a programme of fieldwork would contain was completed using information gained through first hand research with students as well as in conversation with local universities. The results of this audit highlighted several confining factors ranging from the potential cost implications for school and parents, the extent to which content would support learning in class, and the feasibility of achieving all characteristics given limitations on staff and time. Student perceptions of the value of fieldwork were gauged through various means; group interviews were conducted during a number of academic years, field course evaluations were completed following excursions, and questionnaires were distributed at the close of the 2014-2015 academic year. Findings demonstrated that student perceptions of the benefits offered by fieldwork were several fold; chiefly students felt the inclusion of fieldwork was a very important motivator in their decision to study the subject and maintain curiosity in their studies, the belief that fieldwork acts as a consolidator to abstract ideas in class and the importance of its role in team building exercises were also broadly held views. The strength of opinion demonstrated by students reinforces the importance of decisions made regarding fieldwork. Following the initial auditing stage potential field sites were then investigated by staff and assessed for their potential to meet the desired characteristics, where promise was shown these localities were then developed into individual courses where discrete skills could be developed. By assembling together the range of learning outcomes from each individual field trip a narrative 'learning journey' was developed with a clear end goal. Having been through this process and seeing the positive effects on student progress this work presents a toolkit to educators to provide assistance and framework in the development of further programmes of field study through equally considered design.

Training the next generation of psychotraumatologists: COllaborative Network for Training and EXcellence in psychoTraumatology (CONTEXT)

PubMed Central

Vallières, Frédérique; Hyland, Philip; Murphy, Jamie; Hansen, Maj; Shevlin, Mark; Elklit, Ask; Ceannt, Ruth; Armour, Cherie; Wiedemann, Nana; Munk, Mette; Dinesen, Cecilie; O’Hare, Geraldine; Cunningham, Twylla; Askerod, Ditte; Spitz, Pernille; Blackwell, Noeline; McCarthy, Angela; O’Dowd, Leonie; Scott, Shirley; Reid, Tracey; Mokake, Andreas; Halpin, Rory; Perera, Camila; Gleeson, Christina; Frost, Rachel; Flanagan, Natalie; Aldamman, Kinan; Tamrakar, Trina; Louison Vang, Maria; Sherwood, Larissa; Travers, Áine; Haahr-Pedersen, Ida; Walshe, Catherine; McDonagh, Tracey; Bramsen, Rikke Holm

2018-01-01

ABSTRACT In this paper we present a description of the Horizon2020, Marie Skłodowska-Curie Action funded, research and training programme CONTEXT: COllaborative Network for Training and EXcellence in psychoTraumatology. The three objectives of the programme are put forward, each of which refers to a key component of the CONTEXT programme. First, we summarize the 12 individual research projects that will take place across three priority populations: (i) refugees and asylum seekers, (ii) first responders, and (iii) perpetrators and survivors of childhood and gender-based violence. Second, we detail the mentoring and training programme central to CONTEXT. Finally, we describe how the research, together with the training, will contribute towards better policy, guidelines, and practice within the field of psychotraumatology. PMID:29372015

Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics

NASA Astrophysics Data System (ADS)

Seto, Daisaku; Watanabe, Minoru

2015-09-01

In this paper, we present a proposal for a radiation-hardened optically reconfigurable gate array (ORGA). The ORGA is a type of field programmable gate array (FPGA). The ORGA configuration can be executed by the exploitation of holographic memory characteristics even if 20% of the configuration data are damaged. Moreover, the optoelectronic technology enables the high-speed reconfiguration of the programmable gate array. Such a high-speed reconfiguration can increase the radiation tolerance of its programmable gate array to 9.3 × 104 times higher than that of current FPGAs. Through experimentation, this study clarified the configuration dependability using the impulse-noise emulation and high-speed configuration capabilities of the ORGA with corrupt configuration contexts. Moreover, the radiation tolerance of the programmable gate array was confirmed theoretically through probabilistic calculation.

Training the next generation of psychotraumatologists: COllaborative Network for Training and EXcellence in psychoTraumatology (CONTEXT).

PubMed

Vallières, Frédérique; Hyland, Philip; Murphy, Jamie; Hansen, Maj; Shevlin, Mark; Elklit, Ask; Ceannt, Ruth; Armour, Cherie; Wiedemann, Nana; Munk, Mette; Dinesen, Cecilie; O'Hare, Geraldine; Cunningham, Twylla; Askerod, Ditte; Spitz, Pernille; Blackwell, Noeline; McCarthy, Angela; O'Dowd, Leonie; Scott, Shirley; Reid, Tracey; Mokake, Andreas; Halpin, Rory; Perera, Camila; Gleeson, Christina; Frost, Rachel; Flanagan, Natalie; Aldamman, Kinan; Tamrakar, Trina; Louison Vang, Maria; Sherwood, Larissa; Travers, Áine; Haahr-Pedersen, Ida; Walshe, Catherine; McDonagh, Tracey; Bramsen, Rikke Holm

2018-01-01

In this paper we present a description of the Horizon2020, Marie Skłodowska-Curie Action funded, research and training programme CONTEXT: COllaborative Network for Training and EXcellence in psychoTraumatology. The three objectives of the programme are put forward, each of which refers to a key component of the CONTEXT programme. First, we summarize the 12 individual research projects that will take place across three priority populations: (i) refugees and asylum seekers, (ii) first responders, and (iii) perpetrators and survivors of childhood and gender-based violence. Second, we detail the mentoring and training programme central to CONTEXT. Finally, we describe how the research, together with the training, will contribute towards better policy, guidelines, and practice within the field of psychotraumatology.

Five road safety education programmes for young adolescent pedestrians and cyclists: a multi-programme evaluation in a field setting.

PubMed

Twisk, Divera A M; Vlakveld, Willem P; Commandeur, Jacques J F; Shope, Jean T; Kok, Gerjo

2014-05-01

A practical approach was developed to assess and compare the effects of five short road safety education (RSE) programmes for young adolescents that does not rely on injury or crash data but uses self reported behaviour. Questionnaires were administered just before and about one month after participation in the RSE programmes, both to youngsters who had participated in a RSE programme, the intervention group, and to a comparable reference group of youngsters who had not, the reference group. For each RSE programme, the answers to the questionnaires in the pre- and post-test were checked for internal consistency and then condensed into a single safety score using categorical principal components analysis. Next, an analysis of covariance was performed on the obtained safety scores in order to compare the post-test scores of the intervention and reference groups, corrected for their corresponding pre-test scores. It was found that three out of five RSE programmes resulted in significantly improved self-reported safety behaviour. However, the proportions of participants that changed their behaviour relative to the reference group were small, ranging from 3% to 20%. Comparisons among programme types showed cognitive approaches not to differ in effect from programmes that used fear-appeal approaches. The method used provides a useful tool to assess and compare the effects of different education programmes on self-reported behaviour. Copyright © 2014 Elsevier Ltd. All rights reserved.

The development of an intervention programme to reduce whole-body vibration exposure at work induced by a change in behaviour: a study protocol

PubMed Central

Tiemessen, Ivo JH; Hulshof, Carel TJ; Frings-Dresen, Monique HW

2007-01-01

Background Whole body vibration (WBV) exposure at work is common and studies found evidence that this exposure might cause low back pain (LBP). A recent review concluded there is a lack of evidence of effective strategies to reduce WBV exposure. Most research in this field is focussed on the technical implications, although changing behaviour towards WBV exposure might be promising as well. Therefore, we developed an intervention programme to reduce WBV exposure in a population of drivers with the emphasis on a change in behaviour of driver and employer. The hypothesis is that an effective reduction in WBV exposure, in time, will lead to a reduction in LBP as WBV exposure is a proxy for an increased risk of LBP. Methods/Design The intervention programme was developed specifically for the drivers of vibrating vehicles and their employers. The intervention programme will be based on the most important determinants of WBV exposure as track conditions, driving speed, quality of the seat, etc. By increasing knowledge and skills towards changing these determinants, the attitude, social influence and self-efficacy (ASE) of both drivers and employers will be affected having an effect on the level of exposure. We used the well-known ASE model to develop an intervention programme aiming at a change or the intention to change behaviour towards WBV exposure. The developed programme consists of: individual health surveillance, an information brochure, an informative presentation and a report of the performed field measurements. Discussion The study protocol described is advantageous as the intervention program actively tries to change behaviour towards WBV exposure. The near future will show if this intervention program is effective by showing a decrease in WBV exposure. PMID:18005400

Setting research priorities for HIV/AIDS-related research in a post-graduate training programme: lessons learnt from the Nigeria Field Epidemiology and Laboratory Training Programme scientific workshop.

PubMed

Poggensee, Gabriele; Waziri, Ndadilnasiya Endie; Bashorun, Adebobola; Nguku, Patrick Mboya; Fawole, Olufunmilayo Ibitola; Sabitu, Kabir

2014-01-01

In Nigeria the current prevalence of HIV is 4.1% with over 3.5 million infected and estimated 1.5 million in need of anti-retroviral treatment. Epidemiological and implementation studies are necessary for monitoring and evaluation of interventions. To define research areas which can be addressed by participants of the Nigeria Field Epidemiology and Training Programme (NFELTP) a workshop was held in April 2013 in Abuja, Nigeria. Priority research areas were identified using criteria lists for ranking of the relevance of research questions. Based on a research matrix, NFELTP residents developed the aims and objectives, study design for HIV-related research proposals. This workshop was the first workshop held by the NFELTP to establish an inventory of research questions which can be addressed by the residents within their training period. This inventory will help to increase HIV/AIDS-related activities of NFELTP which are in accordance with research needs in Nigeria and PEPFAR objectives.

Developing standards for malaria microscopy: external competency assessment for malaria microscopists in the Asia-Pacific.

PubMed

Ashraf, Sania; Kao, Angie; Hugo, Cecilia; Christophel, Eva M; Fatunmbi, Bayo; Luchavez, Jennifer; Lilley, Ken; Bell, David

2012-10-24

Malaria diagnosis has received renewed interest in recent years, associated with the increasing accessibility of accurate diagnosis through the introduction of rapid diagnostic tests and new World Health Organization guidelines recommending parasite-based diagnosis prior to anti-malarial therapy. However, light microscopy, established over 100 years ago and frequently considered the reference standard for clinical diagnosis, has been neglected in control programmes and in the malaria literature and evidence suggests field standards are commonly poor. Microscopy remains the most accessible method for parasite quantitation, for drug efficacy monitoring, and as a reference of assessing other diagnostic tools. This mismatch between quality and need highlights the importance of the establishment of reliable standards and procedures for assessing and assuring quality. This paper describes the development, function and impact of a multi-country microscopy external quality assurance network set up for this purpose in Asia. Surveys were used for key informants and past participants for feedback on the quality assurance programme. Competency scores for each country from 14 participating countries were compiled for analyses using paired sample t-tests. In-depth interviews were conducted with key informants including the programme facilitators and national level microscopists. External assessments and limited retraining through a formalized programme based on a reference slide bank has demonstrated an increase in standards of competence of senior microscopists over a relatively short period of time, at a potentially sustainable cost. The network involved in the programme now exceeds 14 countries in the Asia-Pacific, and the methods are extended to other regions. While the impact on national programmes varies, it has translated in some instances into a strengthening of national microscopy standards and offers a possibility both for supporting revival of national microcopy programmes, and for the development of globally recognized standards of competency needed both for patient management and field research.

Lessons learnt on implementing an interdisciplinary doctoral programme in water sciences

NASA Astrophysics Data System (ADS)

Carr, Gemma; Loucks, Daniel Pete; Blaschke, Alfred Paul; Bucher, Christian; Farnleitner, Andreas; Fürnkranz-Prskawetz, Alexia; Parajka, Juraj; Pfeifer, Norbert; Rechberger, Helmut; Wagner, Wolfgang; Zessner, Matthias; Blöschl, Günter

2015-04-01

Using the Vienna Doctoral Programme on Water Resource Systems as a case study, this work describes how the characteristics of the programme can be evaluated to identify which process features are important for developing interdisciplinary research at the doctoral level. The Programme has been running since 2009, and to date has engaged 35 research students, three post-docs and ten faculty members from ten research fields (aquatic microbiology, hydrology, hydro-climatology, hydro-geology, mathematical economics, photogrammetry, remote sensing, resource management, structural mechanics, and water quality). Collaborative, multi-disciplinary research is encouraged and supported through various mechanisms - shared offices, study programme, research cluster groups that hold regular meetings, joint study sites, annual and six-month symposia that bring all members of the programme together, seminar series, joint supervision, and social events. Interviews were conducted with 12 students and recent graduates to explore individual experiences of doing interdisciplinary research within the Programme, and to identify which mechanisms are perceived to be of the greatest benefit for collaborative work. Analysis revealed four important process features. Firstly, students noted that joint supervision and supervisors who are motivated to collaborate are essential for multi-disciplinary collaborative work. Secondly, interviewees described that they work with the people they sit close to or see most regularly. Physical places for collaboration between different discipline researchers such as shared offices and shared study sites are therefore important. Thirdly, the costs and benefits to doing interdisciplinary work were highlighted. Students make a trade-off when deciding if their time investment to develop their understanding of a new research field will support them in addressing their research question. The personal characteristics of the researcher seem to be particularly relevant to this decision making process and need to be considered during student selection. Finally, communication skills are critical. Students noted that they need to be able to understand what each other are doing in order to work together and the symposia and research cluster meetings are good places for developing these skills.

Developing standards for malaria microscopy: external competency assessment for malaria microscopists in the Asia-Pacific

PubMed Central

2012-01-01

Background Malaria diagnosis has received renewed interest in recent years, associated with the increasing accessibility of accurate diagnosis through the introduction of rapid diagnostic tests and new World Health Organization guidelines recommending parasite-based diagnosis prior to anti-malarial therapy. However, light microscopy, established over 100 years ago and frequently considered the reference standard for clinical diagnosis, has been neglected in control programmes and in the malaria literature and evidence suggests field standards are commonly poor. Microscopy remains the most accessible method for parasite quantitation, for drug efficacy monitoring, and as a reference of assessing other diagnostic tools. This mismatch between quality and need highlights the importance of the establishment of reliable standards and procedures for assessing and assuring quality. This paper describes the development, function and impact of a multi-country microscopy external quality assurance network set up for this purpose in Asia. Methods Surveys were used for key informants and past participants for feedback on the quality assurance programme. Competency scores for each country from 14 participating countries were compiled for analyses using paired sample t-tests. In-depth interviews were conducted with key informants including the programme facilitators and national level microscopists. Results External assessments and limited retraining through a formalized programme based on a reference slide bank has demonstrated an increase in standards of competence of senior microscopists over a relatively short period of time, at a potentially sustainable cost. The network involved in the programme now exceeds 14 countries in the Asia-Pacific, and the methods are extended to other regions. Conclusions While the impact on national programmes varies, it has translated in some instances into a strengthening of national microscopy standards and offers a possibility both for supporting revival of national microcopy programmes, and for the development of globally recognized standards of competency needed both for patient management and field research. PMID:23095668

DEMONSTRATION BULLETIN: FIELD ANALYTICAL SCREENING PROGRAM: PCB METHOD - U.S. ENVIRONMENTAL PROTECTION AGENCY

EPA Science Inventory

The field analytical screening program (FASP) polychlorinated biphenyl (PCB) method uses a temperature-programmable gas chromatograph (GC) equipped with an electron capture detector (ECD) to identify and quantify PCBs. Gas chromatography is an EPA-approved method for determi...

Assessing The Role Of Integrated Learning In The BSc International Field Geosciences (IFG) Joint Degree Programme At University College Cork, the University of Montana and the University of Potsdam.

NASA Astrophysics Data System (ADS)

Meere, Patrick; Hendrix, Marc; Strecker, Manfred; Berger, Andreas

2010-05-01

The Department of Geology at University College Cork (UCC), Ireland, in conjunction with the Universities of Montana (UM) and Potsdam (UP) launched a new BSc in International Field Geosciences in Autumn 2008. In this program superb natural field geoscience laboratories available in Europe and the western United States are utilized as learning environments forming the basis for a ‘Joint' Bachelor of Science undergraduate degree. This programme focuses on the documentation, interpretation, and synthesis of critical geological issues in the field. It rests upon a backbone of existing modules that are the foundation of current geology programs at three partner institutions complemented by an emphasis on the development of field-based learning in an intercultural setting. The core curriculum is identical to that required for the existing BSc Geology at UCC except the third Year is spent abroad at UM while additional courses are taken at the UP at the start the fourth year. The mobility component of the programme is funded as part of a joint EU/US ATLANTIS project. The motivation for the new programme was primarily driven by the growing international demand for geoscientists with integrated field skills. Over the last two decades existing geoscience programmes in Europe and the US have tended to progressively reduce their field based learning components. One of the major reasons for this neglect is the increasing cost associated with physically transporting students into the field and maintaining a safe outdoor working environment. Heath and safety considerations in an increasingly litigious society have led to increasingly limited choices for suitable field areas in the last few decades. Lastly, recent technological advances such as GIS and various other forms of remote sensing have led to new ways of analyzing geospatial data that, while certainly useful, divert the attention of the Geoscience community away from collecting ‘ground truth' data and making direct observations in the field. It is very much the case that the field experience is "greater than the sum of its parts" and that substantial time in the field; (1) allows students to make their own conceptual connections and adopt a problem solving approach that requires them to draw on and integrate various sub-disciplines in the geosciences. (2) provides students with direct access to their study subject (Earth) (3) allows students to acquire 3D visualization of geological structures and relationships (4) offers students an opportunity to take ownership and responsibility for their own learning experience (5) offers the opportunity for students to show personal learning initiative (6) raises awareness and enhances student appreciation for environmental issues and their complex feedback mechanisms (7) enhances generic scientific investigative skills (8) enhances personal development, through increased self-reliance, self-confidence and team-building (9) promotes deeper learning through direct experience and complete immersion We will use a variety of means of assessing the level of impact of the integrative learning aspects of our program, focusing both on the cognitive and affective domains. Cognitive activities are concerned with the direct processing of information and subsequent construction of meaning while the affective domain is related to processes that are concerned with the learner's emotional response (feelings and attitude) to learning.

A countrywide programme of continuing professional development in Argentina

PubMed Central

Lejarraga, H; Ageitos, M; Galli, A; Castro, C; Paediatrics, A. S.; Education, S. o.; SHRIBMAN, S

1998-01-01

The Argentinean Society of Paediatrics introduced in 1993 a continuing professional development (CPD) programme to raise standards of clinical practice. The aims of the project were to introduce a structured, distance learning programme accessible to all paediatricians in the country, but especially for those working far from centres of paediatric excellence. The programme is planned on an annual basis. It includes four activities: a written manual designed by a team of medical experts and educationalists comprising 12topics; field work for participants; annual meetings in several locations in the country for discussion of the subjects; and an evaluation based on centrally designed multiple choice questions distributed by mail. In spite of a registration fee of £90 a year, participation in the programme increased from 3357 in 1993 to 4126 in 1996, from a membership of 10 216 paediatricians in Argentina. The popularity of the programme may result from an appropriate interpretation of professional needs of paediatricians in Argentina, adequate organisational arrangements that reach all colleagues, including those working in remote areas, and a genuine motivation of paediatricians for participating in a learning process. 

 PMID:9713017

Programming jammed Codman Hakim programmable valves: study of an explanted valve and successful programming in a patient.

PubMed

Wong, Sui-To; Wen, Eleanor; Fong, Dawson

2013-08-01

Malfunction of a Codman Hakim programmable valve due to jamming of its programmable component may necessitate shunt revision. The authors report a method for programming jammed Codman Hakim programmable valves by using a Strata II magnet and additional neodymium magnets. The programming method was derived after studying a jammed valve in the laboratory that was explanted from an 10-year-old boy with a history of fourth ventricle ependymoma. Programming the explanted valve with a Codman programmer failed, but rotating a Strata II magnet above the valve resulted in rotation of the spiral cam in the valve. It was found that the Strata II magnet could be used to program the jammed valve by rotating the magnet 90° or multiples of 90° above the valve. The strength of the magnetic field of the Strata II magnet was able to be increased by putting neodymium magnets on it. The programming method was then successfully used in a patient with a jammed Codman Hakim programmable valve. After successful programming using this method, clinical and radiological follow-up of the patient was advised.

PORT (Programme of Recognition and Therapy): the first Polish recognition and treatment programme for patients with an at-risk mental state.

PubMed

Kotlicka-Antczak, Magdalena; Pawełczyk, Tomasz; Rabe-Jabłońska, Jolanta; Pawełczyk, Agnieszka

2015-08-01

To present the activities of the first early intervention centre in Poland and the Programme of Recognition and Therapy (PORT) run by the centre. An overview of the admission process, diagnostic procedures and therapeutic interventions offered to individuals with an at-risk mental state. The PORT programme, developed in 2010, included 81 individuals, aged 15-29 years so far. The diagnostic procedures consists of evaluation of symptoms with the use of the Comprehensive Assessment of At-Risk Mental State (CAARMS), assessment of premorbid and current personality traits and the evaluation of cognitive functions. Therapeutic interventions include cognitive behavioural therapy, diet supplementation with omega-3 fatty acids and pharmacological treatment. Overall rate of conversion into psychosis within the years 2010-2103 was 18.5%. The programme has also been a source of research in the field of early psychosis. The PORT programme enables young people with an ARMS an easy access to the specialized service offering treatment tailored to their specific needs. © 2014 Wiley Publishing Asia Pty Ltd.

Quality evaluation in the management of child sponsorship programmes.

PubMed

McDonnell, W A; McDonnell, T P

1994-08-01

Programme evaluation tactics for child sponsorship programmes have historically concentrated on quantitative analysis of service units, amount of money invested, number of countries served, the number of projects, and number of children in each project. While these are valuable measures of programme variables, they do not assess the impact of programmes on the lives of the children sponsored. Outcome measures designed to assess programme impact add greatly to the information available to child welfare professionals. This study collected data about the impact of the programme on the lives of the children. The Child Welfare League's Child Well-Being Scales (CWBS) were used to assess programme impact. Twelve scales were chosen as directly related in type to the programmes administered by Children International, a traditional and well established child sponsorship organization located in Kansas City, Missouri. A thirteenth scale was suggested by field workers in India as particularly relevant to Third World populations. The scales were translated into languages appropriate to each population in the programme countries. Social workers in each country were trained to administer and score them. This analysis used the emerging data technology becoming available to programmes in Third World countries. The system enables administrators in the Third World to evaluate, enhance and summarize their programmes in a way understandable across borders. Epi Info (Dean et al., 1990) was customized to provide the framework for the analysis. The population for this study was selected by a 5% random sampling of children currently enrolled as sponsored children (180,000+ worldwide). These were compared with a waiting-list control group selected randomly from lists of children who have applied for sponsorship but have not yet been receiving services (n = 50 from each project).(ABSTRACT TRUNCATED AT 250 WORDS)

Integrated Science and Logistical Planning to Support Big Questions in Antarctic Science

NASA Astrophysics Data System (ADS)

Vaughan, D. G.; Stockings, T. M.

2015-12-01

Each year, British Antarctic Survey (BAS) supports an extensive programme of science at five Antarctic and sub-Antarctic stations, ranging from the tiny Bird Island Research Station at 54°S in the South Atlantic, to the massive, and fully re-locatable, Halley Research Station on Brunt Ice Shelf at 75°S. The BAS logistics hub, Rothera Research Station on the Antarctic Peninsula supports deployment of deep-field and airborne field campaigns through much of the Antarctic continent, and an innovative new UK polar research vessel is under design, and planned to enter service in the Southern Ocean in 2019. BAS's core science programme covering all aspects of physical, biological and geological science is delivered by our own science teams, but every year many other UK scientists and overseas collaborators also access BAS's Antarctic logistics to support their own programmes. As an integrated science and logistics provider, BAS is continuously reviewing its capabilities and operational procedures to ensure that the future long-term requirements of science are optimally supported. Current trends are towards providing the capacity for heavier remote operations and larger-scale field camps, increasing use of autonomous ocean and airborne platforms, and increasing opportunities to provide turnkey solutions for low-cost experimental deployments. This talk will review of expected trends in Antarctic science and the opportunities to conduct science in Antarctica. It will outline the anticipated logistic developments required to support future stakeholder-led and strategically-directed science programmes, and the long-term ambitions of our science communities indentified in several recent horizon-scanning activities.

Programme Reporting Standards (PRS) for improving the reporting of sexual, reproductive, maternal, newborn, child and adolescent health programmes.

PubMed

Kågesten, Anna E; Tunçalp, Özge; Portela, Anayda; Ali, Moazzam; Tran, Nhan; Gülmezoglu, A Metin

2017-08-03

Information about design, implementation, monitoring and evaluation is central to understand the impact of programmes within the field of sexual, reproductive, maternal, newborn, child and adolescent health (SRMNCAH). Existing reporting guidelines do not orient on reporting of contextual and implementation issues in sufficient detail. We therefore developed Programme Reporting Standards (PRS) to be used by SRMNCAH programme implementers and researchers. Building on the first step of the PRS development (a systematic review to identify reporting items), we conducted a three-round online Delphi consensus survey with experts. Consensus was defined a-priori as 80% agreement of items as essential. This was followed by a technical consultation with a group of experts to refine the items, definitions and their structuring. The revised PRS was piloted to assess its relevance to current SRMNCAH programme reports and identify key issues regarding the use of the PRS. Of the 81 participants invited to the Delphi survey, 20 responded to all three rounds. In the final round, 27 items received consensus as essential; three items were ranked as "borderline" essential; 20 items as supplementary. The items were subsequently revised, followed by a technical consultation with 29 experts to further review and refine the PRS. The feedback resulted in substantial changes to the structure and content of the PRS into 24 items across five domains: Programme overview; Programme components and implementation; Monitoring of Implementation; Evaluation and Results; and Synthesis. This version was used in a piloting exercise, where questions regarding how much information to report and how to comment on the quality of the information reported were addressed. All items were kept in the PRS following the pilot although minor changes were made to the flow and description of items. The PRS 1.0 is the result of a structured, collaborative process, including methods to incorporate input from SRMNCAH stakeholders. The World Health Organization will develop a document that explains the items in greater detail, and will also apply the PRS to on-going initiatives. We welcome continuous input from the field, while it is being used, to improve its relevance and usefulness.

Hardware accelerator design for tracking in smart camera

NASA Astrophysics Data System (ADS)

Singh, Sanjay; Dunga, Srinivasa Murali; Saini, Ravi; Mandal, A. S.; Shekhar, Chandra; Vohra, Anil

2011-10-01

Smart Cameras are important components in video analysis. For video analysis, smart cameras needs to detect interesting moving objects, track such objects from frame to frame, and perform analysis of object track in real time. Therefore, the use of real-time tracking is prominent in smart cameras. The software implementation of tracking algorithm on a general purpose processor (like PowerPC) could achieve low frame rate far from real-time requirements. This paper presents the SIMD approach based hardware accelerator designed for real-time tracking of objects in a scene. The system is designed and simulated using VHDL and implemented on Xilinx XUP Virtex-IIPro FPGA. Resulted frame rate is 30 frames per second for 250x200 resolution video in gray scale.

HyspIRI Intelligent Payload Module(IPM) and Benchmarking Algorithms for Upload

NASA Technical Reports Server (NTRS)

Mandl, Daniel

2010-01-01

Features: Hardware: a) Xilinx Virtex-5 (GSFC Space Cube 2); b) 2 x 400MHz PPC; c) 100MHz Bus; d) 2 x 512MB SDRAM; e) Dual Gigabit Ethernet. Support Linux kernel 2.6.31 (gcc version 4.2.2). Support software running in stand alone mode for better performance. Can stream raw data up to 800 Mbps. Ready for operations. Software Application Examples: Band-stripping Algiotrhmsl:cloud, sulfur, flood, thermal, SWIL, NDVI, NDWI, SIWI, oil spills, algae blooms, etc. Corrections: geometric, radiometric, atmospheric. Core Flight System/dynamic software bus. CCSDS File Delivery Protocol. Delay Tolerant Network. CASPER /onboard planning. Fault monitoring/recovery software. S/C command and telemetry software. Data compression. Sensor Web for Autonomous Mission Operations.

The SMS4 cryptographic system design based on dynamic partial self-reconfiguration technology

NASA Astrophysics Data System (ADS)

Wang, Jianxin; Gao, Xianwei; Li, Xiuying; Sui, Meili

2013-03-01

This paper describes SMS4 algorithm by using dynamic partial self-reconfiguration. The design is implemented on Xilinx VirtexII-Pro XC2VP30 FPGA devices. The partial self-reconfiguration encryption/decryption module data throughput is up to 50Mb/s, key expansion and encryption/decryption modules use 1606 and 1570 slices respectively, and the resource utilization ratio of the key expansion by using partial self-reconfiguration technology is less 32.03% and slices are less 757 than the non-reconfiguration technology. SMS4 implementation gets a good balance between high performance and low complexity in area. The theoretical and practical research of dynamic partial self-reconfiguration has a broad space for development and application prospect.

VLSI implementation of RSA encryption system using ancient Indian Vedic mathematics

NASA Astrophysics Data System (ADS)

Thapliyal, Himanshu; Srinivas, M. B.

2005-06-01

This paper proposes the hardware implementation of RSA encryption/decryption algorithm using the algorithms of Ancient Indian Vedic Mathematics that have been modified to improve performance. The recently proposed hierarchical overlay multiplier architecture is used in the RSA circuitry for multiplication operation. The most significant aspect of the paper is the development of a division architecture based on Straight Division algorithm of Ancient Indian Vedic Mathematics and embedding it in RSA encryption/decryption circuitry for improved efficiency. The coding is done in Verilog HDL and the FPGA synthesis is done using Xilinx Spartan library. The results show that RSA circuitry implemented using Vedic division and multiplication is efficient in terms of area/speed compared to its implementation using conventional multiplication and division architectures.

Coordination and Data Management of the International Arctic Buoy Programme (IABP)

DTIC Science & Technology

2001-09-30

Coordination and Data Management of the International Arctic Buoy Programme ( IABP ) Ignatius G. Rigor 1013 NE 40th Street Polar Science Center...analyzed geophysical fields. APPROACH Coordination of the IABP falls into the categories of information, resource management, and meeting...the Polar Science Center (PSC) via anonymous ftp. These data and other research products of the IABP are available on the World Wide Web at http

Implementation of a Configurable Fault Tolerant Processor (CFTP) Using Internal Triple Modular Redundancy (TMR)

DTIC Science & Technology

2005-12-01

Upsets in SRAM FPGAs,” Military and Aerospace Applications of Programmable Logic Devices, September 2002. 8. Wakerly , John F,. “Microcomputer...change. The goal of the Configurable Fault Tolerant Processor (CFTP) Project is to explore, develop and demonstrate the applicability of using off-the...develop and demonstrate the applicability of using commercial-of-the-shelf (COTS) Field Programmable Gate Arrays (FPGA) in the design of

"Now That I'm Pregnant, I'm No Longer an Example": Peer Educator Experiences of an HIV Prevention Programme in Cape Town, South Africa

ERIC Educational Resources Information Center

Wolf, Kimberly; Africa, Adelene

2017-01-01

Despite the popularity of peer education as an HIV prevention strategy across a range of contexts, understanding of the experiences of those intimately placed within these programmes is limited. Instead, the majority of research in this field relies on hegemonic notions of rational human behaviour that operate under the assumption that knowledge…

Arts, health & wellbeing: reflections on a national seminar series and building a UK research network

PubMed Central

Stickley, Theo; Parr, Hester; Atkinson, Sarah; Daykin, Norma; Clift, Stephen; De Nora, Tia; Hacking, Sue; Camic, Paul M; Joss, Tim; White, Mike; Hogan, Susan J

2017-01-01

Abstract An account is provided of a UK national seminar series on Arts, Health and Wellbeing funded by the Economic and Social Research Council during 2012–13. Four seminars were organised addressing current issues and challenges facing the field. Details of the programme and its outputs are available online. A central concern of the seminar programme was to provide a foundation for creating a UK national network for researchers in the field to help promote evidence-based policy and practice. With funding from Lankelly Chase Foundation, and the support of the Royal Society for Public Health, a Special interest Group for Arts, Health and Wellbeing was launched in 2015. PMID:28163778

A new 4D chaotic system with hidden attractor and its engineering applications: Analog circuit design and field programmable gate array implementation

NASA Astrophysics Data System (ADS)

Abdolmohammadi, Hamid Reza; Khalaf, Abdul Jalil M.; Panahi, Shirin; Rajagopal, Karthikeyan; Pham, Viet-Thanh; Jafari, Sajad

2018-06-01

Nowadays, designing chaotic systems with hidden attractor is one of the most interesting topics in nonlinear dynamics and chaos. In this paper, a new 4D chaotic system is proposed. This new chaotic system has no equilibria, and so it belongs to the category of systems with hidden attractors. Dynamical features of this system are investigated with the help of its state-space portraits, bifurcation diagram, Lyapunov exponents diagram, and basin of attraction. Also a hardware realisation of this system is proposed by using field programmable gate arrays (FPGA). In addition, an electronic circuit design for the chaotic system is introduced.

Technology Developments in Radiation-Hardened Electronics for Space Environments

NASA Technical Reports Server (NTRS)

Keys, Andrew S.; Howell, Joe T.

2008-01-01

The Radiation Hardened Electronics for Space Environments (RHESE) project consists of a series of tasks designed to develop and mature a broad spectrum of radiation hardened and low temperature electronics technologies. Three approaches are being taken to address radiation hardening: improved material hardness, design techniques to improve radiation tolerance, and software methods to improve radiation tolerance. Within these approaches various technology products are being addressed including Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA), MEMS, Serial Processors, Reconfigurable Processors, and Parallel Processors. In addition to radiation hardening, low temperature extremes are addressed with a focus on material and design approaches. System level applications for the RHESE technology products are discussed.

A Lithography-Free and Field-Programmable Photonic Metacanvas.

PubMed

Dong, Kaichen; Hong, Sukjoon; Deng, Yang; Ma, He; Li, Jiachen; Wang, Xi; Yeo, Junyeob; Wang, Letian; Lou, Shuai; Tom, Kyle B; Liu, Kai; You, Zheng; Wei, Yang; Grigoropoulos, Costas P; Yao, Jie; Wu, Junqiao

2018-02-01

The unique correspondence between mathematical operators and photonic elements in wave optics enables quantitative analysis of light manipulation with individual optical devices. Phase-transition materials are able to provide real-time reconfigurability of these devices, which would create new optical functionalities via (re)compilation of photonic operators, as those achieved in other fields such as field-programmable gate arrays (FPGA). Here, by exploiting the hysteretic phase transition of vanadium dioxide, an all-solid, rewritable metacanvas on which nearly arbitrary photonic devices can be rapidly and repeatedly written and erased is presented. The writing is performed with a low-power laser and the entire process stays below 90 °C. Using the metacanvas, dynamic manipulation of optical waves is demonstrated for light propagation, polarization, and reconstruction. The metacanvas supports physical (re)compilation of photonic operators akin to that of FPGA, opening up possibilities where photonic elements can be field programmed to deliver complex, system-level functionalities. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Planetary Gravity Fields and Their Impact on a Spacecraft Trajectory

NASA Technical Reports Server (NTRS)

Weinwurm, G.; Weber, R.

2005-01-01

The present work touches an interdisciplinary aspect of space exploration: the improvement of spacecraft navigation by means of enhanced planetary interior model derivation. The better the bodies in our solar system are known and modelled, the more accurately (and safely) a spacecraft can be navigated. In addition, the information about the internal structure of a planet, moon or any other planetary body can be used in arguments for different theories of solar system evolution. The focus of the work lies in a new approach for modelling the gravity field of small planetary bodies: the implementation of complex ellipsoidal coordinates (figure 1, [4]) for irregularly shaped bodies that cannot be represented well by a straightforward spheroidal approach. In order to carry out the required calculations the computer programme GRASP (Gravity Field of a Planetary Body and its Influence on a Spacecraft Trajectory) has been developed [5]. The programme furthermore allows deriving the impact of the body s gravity field on a spacecraft trajectory and thus permits predictions for future space mission flybys.

Independent component analysis algorithm FPGA design to perform real-time blind source separation

NASA Astrophysics Data System (ADS)

Meyer-Baese, Uwe; Odom, Crispin; Botella, Guillermo; Meyer-Baese, Anke

2015-05-01

The conditions that arise in the Cocktail Party Problem prevail across many fields creating a need for of Blind Source Separation. The need for BSS has become prevalent in several fields of work. These fields include array processing, communications, medical signal processing, and speech processing, wireless communication, audio, acoustics and biomedical engineering. The concept of the cocktail party problem and BSS led to the development of Independent Component Analysis (ICA) algorithms. ICA proves useful for applications needing real time signal processing. The goal of this research was to perform an extensive study on ability and efficiency of Independent Component Analysis algorithms to perform blind source separation on mixed signals in software and implementation in hardware with a Field Programmable Gate Array (FPGA). The Algebraic ICA (A-ICA), Fast ICA, and Equivariant Adaptive Separation via Independence (EASI) ICA were examined and compared. The best algorithm required the least complexity and fewest resources while effectively separating mixed sources. The best algorithm was the EASI algorithm. The EASI ICA was implemented on hardware with Field Programmable Gate Arrays (FPGA) to perform and analyze its performance in real time.

Scholarship of teaching and learning: `what the hell' are we getting ourselves into?

NASA Astrophysics Data System (ADS)

Swart, Arthur James; Luwes, Nicolaas; Olwagen, Lienie; Greyling, Cameron; Korff, Carel

2017-11-01

Academics must be encouraged to reflect on their teaching, to apply new pedagogies to support student learning and to report on the results of these actions, which really forms part of programmes relating to Scholarship of Teaching and Learning (SoTL). However, there seems to be resistance among some academics to get involved in these programmes due to fear of change or discrimination. The purpose of this article is to highlight the perceptions of four academics from different engineering fields towards such a programme from a University of Technology in South Africa. A qualitative study is employed where a focus group interview was used to gather data which are correlated to the SoTL unicycle detailed in the article. A benefit of joining an SoTL programme includes 'developing a teaching action plan' while a key challenge relates to time concerns. An implication may be to stimulate awareness among non-participating academics about what an SoTL programme really engenders.

[How to assess and reduce social inequalities in cancer screening programmes].

PubMed

Binefa, Gemma; García, Montse; Peiró, Rosana; Molina-Barceló, Ana; Ibáñez, Raquel

2016-01-01

This field note presents the conclusions and recommendations made at the meeting 'How to reduce social inequalities in cancer screening programmes?' held at the XXVI School of Public Health of Mahon (Menorca, Spain). Participants developed recommendations based on experiences of population-based screening programmes (breast and colorectal) and opportunistic screening (cervical). The conclusions and recommendations focused on four main areas (information systems, evaluation and quality, research, and interventions): the inclusion of social variables at an individual level in health information systems; the establishment of minimum standards for gathering information regarding inequalities in access to preventive services; the performance of actions in vulnerable populations; and the promotion of the exchange of experiences and best practices through the Cancer Screening Programmes Network and working groups of the scientific societies. Copyright © 2016 SESPAS. Published by Elsevier Espana. All rights reserved.

Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

PubMed

Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

2014-09-01

The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

Science Teacher Education for Sustainable Development: A Case Study of a Residential Field Course in a Norwegian Pre-Service Teacher Education Programme

ERIC Educational Resources Information Center

Jegstad, Kirsti Marie; Gjøtterud, Sigrid Marie; Sinnes, Astrid Tonette

2018-01-01

In this paper, we explore how a Norwegian teacher education institution promotes education for sustainable development (ESD) through a residential field course. The residential field course was located in a mountain area and data were collected through participant observation. The data included--together with instructional artefacts--evaluation…

Infection rate of Leptospira interrogans in the field rodent, Apodemus agrarius, in Korea.

PubMed Central

Cho, M. K.; Kee, S. H.; Song, H. J.; Kim, K. H.; Song, K. J.; Baek, L. J.; Kim, H. H.; Oh, H. B.; Kim, Y. W.; Chang, W. H.

1998-01-01

Leptospirosis has significantly decreased in Korea since 1988, following the leptospiral vaccination programme initiated in 1988. Whether this wholly explains the decreased incidence is uncertain. As an initial step to answer this question, infection rates of Leptospira interrogans in field rodents, Apodemis agrarius, were examined and compared with previous data. Two hundred and twenty-two A. agrarius were captured during October-December 1996. Spirochaetes were isolated from 22 (9.9%) and leptospiral DNA was detected in an additional 6 rodents (12.6%). Subsequent microscopic agglutination tests (MAT) classified all these isolates as L. interrogans serogroup Icterohaemorrhagiae serovar lai. The above data did not significantly differ from previous surveys in 1984-7. There was no significant change of L. interrogans infection in field rodents following the introduction of the vaccination programme in Korea. Further studies are needed to determine the role of human vaccination in reducing incidence. PMID:10030719

Measuring management's perspective of data quality in Pakistan's Tuberculosis control programme: a test-based approach to identify data quality dimensions.

PubMed

Ali, Syed Mustafa; Anjum, Naveed; Kamel Boulos, Maged N; Ishaq, Muhammad; Aamir, Javariya; Haider, Ghulam Rasool

2018-01-16

Data quality is core theme of programme's performance assessment and many organizations do not have any data quality improvement strategy, wherein data quality dimensions and data quality assessment framework are important constituents. As there is limited published research about the data quality specifics that are relevant to the context of Pakistan's Tuberculosis control programme, this study aims at identifying the applicable data quality dimensions by using the 'fitness-for-purpose' perspective. Forty-two respondents pooled a total of 473 years of professional experience, out of which 223 years (47%) were in TB control related programmes. Based on the responses against 11 practical cases, adopted from the routine recording and reporting system of Pakistan's TB control programme (real identities of patient were masked), completeness, accuracy, consistency, vagueness, uniqueness and timeliness are the applicable data quality dimensions relevant to the programme's context, i.e. work settings and field of practice. Based on a 'fitness-for-purpose' approach to data quality, this study used a test-based approach to measure management's perspective and identified data quality dimensions pertinent to the programme and country specific requirements. Implementation of a data quality improvement strategy and achieving enhanced data quality would greatly help organizations in promoting data use for informed decision making.

Punch Card Programmable Microfluidics

PubMed Central

Korir, George; Prakash, Manu

2015-01-01

Small volume fluid handling in single and multiphase microfluidics provides a promising strategy for efficient bio-chemical assays, low-cost point-of-care diagnostics and new approaches to scientific discoveries. However multiple barriers exist towards low-cost field deployment of programmable microfluidics. Incorporating multiple pumps, mixers and discrete valve based control of nanoliter fluids and droplets in an integrated, programmable manner without additional required external components has remained elusive. Combining the idea of punch card programming with arbitrary fluid control, here we describe a self-contained, hand-crank powered, multiplex and robust programmable microfluidic platform. A paper tape encodes information as a series of punched holes. A mechanical reader/actuator reads these paper tapes and correspondingly executes operations onto a microfluidic chip coupled to the platform in a plug-and-play fashion. Enabled by the complexity of codes that can be represented by a series of holes in punched paper tapes, we demonstrate independent control of 15 on-chip pumps with enhanced mixing, normally-closed valves and a novel on-demand impact-based droplet generator. We demonstrate robustness of operation by encoding a string of characters representing the word “PUNCHCARD MICROFLUIDICS” using the droplet generator. Multiplexing is demonstrated by implementing an example colorimetric water quality assays for pH, ammonia, nitrite and nitrate content in different water samples. With its portable and robust design, low cost and ease-of-use, we envision punch card programmable microfluidics will bring complex control of microfluidic chips into field-based applications in low-resource settings and in the hands of children around the world. PMID:25738834

Punch card programmable microfluidics.

PubMed

Korir, George; Prakash, Manu

2015-01-01

Small volume fluid handling in single and multiphase microfluidics provides a promising strategy for efficient bio-chemical assays, low-cost point-of-care diagnostics and new approaches to scientific discoveries. However multiple barriers exist towards low-cost field deployment of programmable microfluidics. Incorporating multiple pumps, mixers and discrete valve based control of nanoliter fluids and droplets in an integrated, programmable manner without additional required external components has remained elusive. Combining the idea of punch card programming with arbitrary fluid control, here we describe a self-contained, hand-crank powered, multiplex and robust programmable microfluidic platform. A paper tape encodes information as a series of punched holes. A mechanical reader/actuator reads these paper tapes and correspondingly executes operations onto a microfluidic chip coupled to the platform in a plug-and-play fashion. Enabled by the complexity of codes that can be represented by a series of holes in punched paper tapes, we demonstrate independent control of 15 on-chip pumps with enhanced mixing, normally-closed valves and a novel on-demand impact-based droplet generator. We demonstrate robustness of operation by encoding a string of characters representing the word "PUNCHCARD MICROFLUIDICS" using the droplet generator. Multiplexing is demonstrated by implementing an example colorimetric water quality assays for pH, ammonia, nitrite and nitrate content in different water samples. With its portable and robust design, low cost and ease-of-use, we envision punch card programmable microfluidics will bring complex control of microfluidic chips into field-based applications in low-resource settings and in the hands of children around the world.

Doug Kirby's Contribution to the Field of Sex Education

ERIC Educational Resources Information Center

Kantor, Leslie M.; Rolleri, Lori; Kolios, Katherine

2014-01-01

Doug Kirby transformed the field of sex education by conducting rigorous research that led to new, critical insights about ways to strengthen programmes, evaluation and policies related to sexual health throughout the world. Throughout his career, Kirby was meticulous in compiling evidence and translating findings into actionable recommendations…

Structuralization of Doctoral Education in Germany: An Interdisciplinary Comparison

ERIC Educational Resources Information Center

Qin, Lin

2017-01-01

Taking the establishment of structured doctoral programmes in Germany as an example, this paper focuses on how knowledge production in certain academic fields reshapes their doctoral education in a widely changing policy context. Based on case studies of eight graduate schools in three research fields, namely economics, life sciences, and…

Participative Critical Enquiry in Graduate Field-Based Learning

ERIC Educational Resources Information Center

Reilly, Kathy; Clavin, Alma; Morrissey, John

2016-01-01

This paper outlines a critical pedagogic approach to field-based learning (FBL) at graduate level. Drawing on student experience stemming from a FBL module and as part of an MA programme in Environment, Society and Development, the paper addresses the complexities associated with student-led, participative critical enquiry during fieldwork in…

Promoting Interdisciplinary Education: The Vienna Doctoral Programme on Water Resource Systems

NASA Astrophysics Data System (ADS)

Blöschl, Günter; Bucher, Christian; Carr, Gemma; Farnleitner, Andreas; Rechberger, Helmut; Wagner, Wolfgang; Zessner, Matthias

2010-05-01

An interdisciplinary approach is often described as a valuable strategy to assist in overcoming the existing and emerging challenges to water resource management. The development of educational approaches to instil a culture of interdisciplinarity in the future generation of water resource professionals will help to meet this strategic need. The Vienna Doctoral Programme on Water Resource Systems demonstrates how the adoption of an interdisciplinary education framework has been applied to a graduate programme in the water sciences. The interdisciplinary approach aims to provide doctoral research students with an understanding of the wide spectrum of processes relevant to water resource systems. This will enable them to bring together a range of ideas, strategies and methods to their current research and future careers. The education programme also aims to teach the softer skills required for successful interdisciplinary work such as the ability to communicate clearly with non-specialist professionals and the capacity to listen to and accommodate suggestions from experts in different disciplines, which have often not traditionally been grouped together. The Vienna Doctoral Programme achieves these aims through teaching an appreciation for a wide variety of approaches including laboratory analysis, field studies and numerical methods across the fields of hydrology, remote sensing, hydrogeology, structural mechanics, microbiology, water quality and resource management. Teaching takes the form of a detailed study programme on topics such as socio-economic concepts, resource and river basin management, modelling and simulation methods, health related water quality targets, urban water management, spatial data from remote sensing and basics for stochastic mechanics. Courses are also held by internationally recognised top scientists, and a guest scientist seminar series allows doctoral researchers to profit from the expertise of senior researchers from around the world. Through a structured one-on-one mentoring programme close interaction is ensured between the students and the internationally reputed staff of the programme. This gives the opportunity for the encouragement of interdisciplinary thinking at the individual level. Interdisciplinarity also evolves passively through interactions between the doctoral students in their daily research work, during journal clubs, meetings, workshops and courses. A total of 22 doctoral students are enrolled in the programme at any time which allows for cross-fertilisation across the wide range of research projects. Finally, the programme is holistic, incorporating all aspects of the hydrological system at the catchment and multi-catchment scale. The ultimate aim is to provide an education programme which not only equips the students with an understanding of the need for interdisciplinarity, but also with the skills required to deliver interdisciplinary work in keeping with the holistic catchment management paradigm adopted by the hydrological science community.

Mentoring health researchers globally: Diverse experiences, programmes, challenges and responses.

PubMed

Cole, Donald C; Johnson, Nancy; Mejia, Raul; McCullough, Hazel; Turcotte-Tremblay, Anne-Marie; Barnoya, Joaquin; Falabella Luco, María Soledad

2016-10-01

Mentoring experiences and programmes are becoming increasingly recognised as important by those engaged in capacity strengthening in global health research. Using a primarily qualitative study design, we studied three experiences of mentorship and eight mentorship programmes for early career global health researchers based in high-income and low- and middle-income countries. For the latter, we drew upon programme materials, existing unpublished data and more formal mixed-method evaluations, supplemented by individual email questionnaire responses. Research team members wrote stories, and the team assembled and analysed them for key themes. Across the diverse experiences and programmes, key emergent themes included: great mentors inspire others in an inter-generational cascade, mentorship is transformative in personal and professional development and involves reciprocity, and finding the right balance in mentoring relationships and programmes includes responding creatively to failure. Among the challenges encountered were: struggling for more level playing fields for new health researchers globally, changing mindsets in institutions that do not have a culture of mentorship and building collaboration not competition. Mentoring networks spanning institutions and countries using multiple virtual and face-to-face methods are a potential avenue for fostering organisational cultures supporting quality mentorship in global health research.

Contextual factors affecting task distribution in two participatory ergonomic interventions: a qualitative study.

PubMed

Dixon, Shane Michael; Theberge, Nancy

2011-11-01

This article provides an analysis of the evolution of the division of labour in participatory ergonomics (PE) programmes in two worksites. The analysis is based on interviews and field observations in the worksites. In both settings there was meaningful participation by both worker and management members of ergonomic change teams (ECTs) in the hazard assessment and solution identification stages, but as the teams moved to the implementation stage, worker representatives were marginalised and the participatory nature of the programmes was severely curtailed. The removal of workers from the process was the outcome of the interplay among the type of activities pursued in the implementation stage, the skills and knowledge required to carry out those activities, and workers' limited influence in the organisational hierarchies. Findings highlight the salience of the social context in which participatory programmes are located and the importance of examining participatory programmes as they evolve over time. STATEMENT OF RELEVANCE: This article contributes to a growing literature on the process and implementation of PE programmes. The article's focus on social and organisational factors that affect the division of labour and attention to the evolution of involvement over time extend current understandings of participation in ergonomics programmes.

Mentoring health researchers globally: Diverse experiences, programmes, challenges and responses

PubMed Central

Cole, Donald C.; Johnson, Nancy; Mejia, Raul; McCullough, Hazel; Turcotte-Tremblay, Anne-Marie; Barnoya, Joaquin; Falabella Luco, (María) Soledad

2016-01-01

ABSTRACT Mentoring experiences and programmes are becoming increasingly recognised as important by those engaged in capacity strengthening in global health research. Using a primarily qualitative study design, we studied three experiences of mentorship and eight mentorship programmes for early career global health researchers based in high-income and low- and middle-income countries. For the latter, we drew upon programme materials, existing unpublished data and more formal mixed-method evaluations, supplemented by individual email questionnaire responses. Research team members wrote stories, and the team assembled and analysed them for key themes. Across the diverse experiences and programmes, key emergent themes included: great mentors inspire others in an inter-generational cascade, mentorship is transformative in personal and professional development and involves reciprocity, and finding the right balance in mentoring relationships and programmes includes responding creatively to failure. Among the challenges encountered were: struggling for more level playing fields for new health researchers globally, changing mindsets in institutions that do not have a culture of mentorship and building collaboration not competition. Mentoring networks spanning institutions and countries using multiple virtual and face-to-face methods are a potential avenue for fostering organisational cultures supporting quality mentorship in global health research. PMID:26234691

Rapid evolution of analog circuits configured on a field programmable transistor array

NASA Technical Reports Server (NTRS)

Stoica, A.; Ferguson, M. I.; Zebulum, R. S.; Keymeulen, D.; Duong, V.; Daud, T.

2002-01-01

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

Nine-channel mid-power bipolar pulse generator based on a field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Haylock, Ben, E-mail: benjamin.haylock2@griffithuni.edu.au; Lenzini, Francesco; Kasture, Sachin

Many channel arbitrary pulse sequence generation is required for the electro-optic reconfiguration of optical waveguide networks in Lithium Niobate. Here we describe a scalable solution to the requirement for mid-power bipolar parallel outputs, based on pulse patterns generated by an externally clocked field programmable gate array. Positive and negative pulses can be generated at repetition rates up to 80 MHz with pulse width adjustable in increments of 1.6 ns across nine independent outputs. Each channel can provide 1.5 W of RF power and can be synchronised with the operation of other components in an optical network such as light sourcesmore » and detectors through an external clock with adjustable delay.« less

Programmable LED-based integrating sphere light source for wide-field fluorescence microscopy.

PubMed

Rehman, Aziz Ul; Anwer, Ayad G; Goldys, Ewa M

2017-12-01

Wide-field fluorescence microscopy commonly uses a mercury lamp, which has limited spectral capabilities. We designed and built a programmable integrating sphere light (PISL) source which consists of nine LEDs, light-collecting optics, a commercially available integrating sphere and a baffle. The PISL source is tuneable in the range 365-490nm with a uniform spatial profile and a sufficient power at the objective to carry out spectral imaging. We retrofitted a standard fluorescence inverted microscope DM IRB (Leica) with a PISL source by mounting it together with a highly sensitive low- noise CMOS camera. The capabilities of the setup have been demonstrated by carrying out multispectral autofluorescence imaging of live BV2 cells. Copyright © 2017 Elsevier B.V. All rights reserved.

A Field Programmable Gate Array-Based Reconfigurable Smart-Sensor Network for Wireless Monitoring of New Generation Computer Numerically Controlled Machines

PubMed Central

Moreno-Tapia, Sandra Veronica; Vera-Salas, Luis Alberto; Osornio-Rios, Roque Alfredo; Dominguez-Gonzalez, Aurelio; Stiharu, Ion; de Jesus Romero-Troncoso, Rene

2010-01-01

Computer numerically controlled (CNC) machines have evolved to adapt to increasing technological and industrial requirements. To cover these needs, new generation machines have to perform monitoring strategies by incorporating multiple sensors. Since in most of applications the online Processing of the variables is essential, the use of smart sensors is necessary. The contribution of this work is the development of a wireless network platform of reconfigurable smart sensors for CNC machine applications complying with the measurement requirements of new generation CNC machines. Four different smart sensors are put under test in the network and their corresponding signal processing techniques are implemented in a Field Programmable Gate Array (FPGA)-based sensor node. PMID:22163602

A field programmable gate array-based reconfigurable smart-sensor network for wireless monitoring of new generation computer numerically controlled machines.

PubMed

Moreno-Tapia, Sandra Veronica; Vera-Salas, Luis Alberto; Osornio-Rios, Roque Alfredo; Dominguez-Gonzalez, Aurelio; Stiharu, Ion; Romero-Troncoso, Rene de Jesus

2010-01-01

Computer numerically controlled (CNC) machines have evolved to adapt to increasing technological and industrial requirements. To cover these needs, new generation machines have to perform monitoring strategies by incorporating multiple sensors. Since in most of applications the online Processing of the variables is essential, the use of smart sensors is necessary. The contribution of this work is the development of a wireless network platform of reconfigurable smart sensors for CNC machine applications complying with the measurement requirements of new generation CNC machines. Four different smart sensors are put under test in the network and their corresponding signal processing techniques are implemented in a Field Programmable Gate Array (FPGA)-based sensor node.

Occupational safety and health education under the lifelong learning framework in Serbia.

PubMed

Macuzic, Ivan; Giagloglou, Eva; Djapan, Marko; Todorovic, Petar; Jeremic, Branislav

2016-12-01

Serbia is aligning with European Union requirements and the occupational safety and health (OSH) administration is one of the most representative sectors of this alignment. Many efforts were made in this field, by introducing new laws and regulations, but it turned out to be insufficient. OSH professionals need to renovate and strengthen their knowledge in accordance with continuous, updated and improved OSH standards and regulation. Lifelong learning (LLL) programmes can contribute to forming professionals who are always up to date. This paper presents an implemented LLL programme, over the duration of two academic years, dedicated to OSH professionals, and investigates whether this programme will be helpful and accepted by professionals. The results from the study show that the given LLL programme had indeed a positive influence on the professional careers of the participants and that the LLL presents the future trend in OSH education.

Setting Research Priorities for HIV/AIDS-related research in a post-graduate training programme: lessons learnt from the Nigeria Field Epidemiology and Laboratory Training Programme scientific workshop

PubMed Central

Poggensee, Gabriele; Waziri, Ndadilnasiya Endie; Bashorun, Adebobola; Nguku, Patrick Mboya; Fawole, Olufunmilayo Ibitola; Sabitu, Kabir

2014-01-01

In Nigeria the current prevalence of HIV is 4.1% with over 3.5 million infected and estimated 1.5 million in need of anti-retroviral treatment. Epidemiological and implementation studies are necessary for monitoring and evaluation of interventions. To define research areas which can be addressed by participants of the Nigeria Field Epidemiology and Training Programme (NFELTP) a workshop was held in April 2013 in Abuja, Nigeria. Priority research areas were identified using criteria lists for ranking of the relevance of research questions. Based on a research matrix, NFELTP residents developed the aims and objectives, study design for HIV-related research proposals. This workshop was the first workshop held by the NFELTP to establish an inventory of research questions which can be addressed by the residents within their training period. This inventory will help to increase HIV/AIDS-related activities of NFELTP which are in accordance with research needs in Nigeria and PEPFAR objectives. PMID:25426209

Caught between conduct and free choice--a field study of an empowering programme in lifestyle change for obese patients.

PubMed

Knutsen, Ingrid Ruud; Foss, Christina

2011-03-01

The aim of this study was to investigate understandings and strategies of empowerment in Learning and Mastery Centres, in a course in lifestyle change for morbidly obese patients. A field study was conducted with nonparticipant observation, and data analysis was inspired by foucauldian discourse analysis. The analysis revealed powerful discourses underlying the course, and the analysis showed how different discourses were set at play within the teaching strategies in the course. The course leaders balanced powerful aspects that involved directing the participants towards strategies promoting their autonomy. The analysis revealed how strategies to reduce the impression of direction and conduct are powerful actions. From a foucauldian perspective of power, this analysis demonstrates how power is everywhere as a productive force. When creating programmes to empower patients to help them deal with their health, it seems vital that health professionals examine power. By accepting the presence of power, professionals can examine the truth motivation underlying an empowerment programme. © 2010 The Authors. Scandinavian Journal of Caring Sciences © 2010 Nordic College of Caring Science.

The magnetic map sense and its use in fine-tuning the migration programme of birds.

PubMed

Heyers, D; Elbers, D; Bulte, M; Bairlein, F; Mouritsen, H

2017-07-01

The Earth's magnetic field is one of several natural cues, which migratory birds can use to derive directional ("compass") information for orientation on their biannual migratory journeys. Moreover, magnetic field effects on prominent aspects of the migratory programme of birds, such as migratory restlessness behaviour, fuel deposition and directional orientation, implicate that geomagnetic information can also be used to derive positional ("map") information. While the magnetic "compass" in migratory birds is likely to be based on radical pair-forming molecules embedded in their visual system, the sensory correlates underlying a magnetic "map" sense currently remain elusive. Behavioural, physiological and neurobiological findings indicate that the sensor is most likely innervated by the ophthalmic branch of the trigeminal nerve and based on magnetic iron particles. Information from this unknown sensor is neither necessary nor sufficient for a functional magnetic compass, but instead could contribute important components of a multifactorial "map" for global positioning. Positional information could allow migratory birds to make vitally important dynamic adaptations of their migratory programme at any relevant point during their journeys.

Ranking of healthcare programmes based on health outcome, health costs and safe delivery of care in hospital pharmacy practice.

PubMed

Brisseau, Lionel; Bussières, Jean-François; Bois, Denis; Vallée, Marc; Racine, Marie-Claude; Bonnici, André

2013-02-01

To establish a consensual and coherent ranking of healthcare programmes that involve the presence of ward-based and clinic-based clinical pharmacists, based on health outcome, health costs and safe delivery of care. This descriptive study was derived from a structured dialogue (Delphi technique) among directors of pharmacy department. We established a quantitative profile of healthcare programmes at five sites that involved the provision of ward-based and clinic-based pharmaceutical care. A summary table of evidence established a unique quality rating per inpatient (clinic-based) or outpatient (ward-based) healthcare programme. Each director rated the perceived impact of pharmaceutical care per inpatient or outpatient healthcare programme on three fields: health outcome, health costs and safe delivery of care. They agreed by consensus on the final ranking of healthcare programmes. A ranking was assigned for each of the 18 healthcare programmes for outpatient care and the 17 healthcare programmes for inpatient care involving the presence of pharmacists, based on health outcome, health costs and safe delivery of care. There was a good correlation between ranking based on data from a 2007-2008 Canadian report on hospital pharmacy practice and the ranking proposed by directors of pharmacy department. Given the often limited human and financial resources, managers should consider the best evidence available on a profession's impact to plan healthcare services within an organization. Data are few on ranking healthcare programmes in order to prioritize which healthcare programme would mostly benefit from the delivery of pharmaceutical care by ward-based and clinic-based pharmacists. © 2012 The Authors. IJPP © 2012 Royal Pharmaceutical Society.

VLSI architecture for a Reed-Solomon decoder

NASA Technical Reports Server (NTRS)

Hsu, In-Shek (Inventor); Truong, Trieu-Kie (Inventor)

1992-01-01

A basic single-chip building block for a Reed-Solomon (RS) decoder system is partitioned into a plurality of sections, the first of which consists of a plurality of syndrome subcells each of which contains identical standard-basis finite-field multipliers that are programmable between 10 and 8 bit operation. A desired number of basic building blocks may be assembled to provide a RS decoder of any syndrome subcell size that is programmable between 10 and 8 bit operation.

The Styx field trial

PubMed Central

Gemmell, M. A.

1968-01-01

An assessment was made of the effectiveness of the generally accepted methods recommended for controlling hydatid disease during the course of a field-trial, initiated in 1943 in an isolated region of New Zealand. The results obtained during the first 21 years are described. Basically, the trial was an attempt to compare the effectiveness of a general public health educational programme and an anthelmintic programme using arecoline hydrobromide for treatment of dogs with that of a specific educational programme using this compound as a diagnostic agent. Arecoline hydrobromide was found to be too uncertain in its action to be of practical value as an anthelmintic. The development of diagnostic techniques, described in this paper, made it possible to use the compound for diagnostic purposes and thus for educational purposes, since each dog could be examined for tapeworms in the presence of the owner. Using changes in the annual prevalence rate in sheep of the cysts of E. granulosus and those of T. hydatigena as the principal indicators, the conclusion has been reached that the specific diagnostic approach achieved more success than the general educational and treatment programme. The principal reason for this appears to be that the former approach induced a greater awareness in owners of the need for strict management to prevent dogs gaining access to infective raw offal than that stimulated in the community when the dogs were dosed but not examined. ImagesFIG. 2FIG. 4FIG. 5 PMID:5303843

NASA Tech Briefs, February 2012

NASA Technical Reports Server (NTRS)

2012-01-01

This issue contains the following briefs: (1) Optical Comb from a Whispering Gallery Mode Resonator for Spectroscopy and Astronomy Instruments Calibration (2) Real-Time Flight Envelope Monitoring System (3) Nemesis Autonomous Test System (4) Mirror Metrology Using Nano-Probe Supports (5) Automated Lab-on-a-Chip Electrophoresis System (6) Techniques for Down-Sampling a Measured Surface Height Map for Model Validation (7) Multi-Component, Multi-Point Interferometric Rayleigh/Mie Doppler Velocimeter (8) Frequency to Voltage Converter Analog Front-End Prototype (9) Dust-Tolerant Intelligent Electrical Connection System (10) Gigabit Ethernet Asynchronous Clock Compensation FIFO (11) High-Speed, Multi-Channel Serial ADC LVDS Interface for Xilinx Virtex-5 FPGA (12) Glovebox for GeoLab Subsystem in HDU1-PEM (13) Modified Process Reduces Porosity when Soldering in Reduced Gravity Environments (14) Use of Functionalized Carbon Nanotubes for Covalent Attachment of Nanotubes to Silicon (15) Flexible Plug Repair for Shuttle Wing Leading Edge (16) Three Dimensionally Interlinked, Dense, Solid Form of Single-Walled CNT Ropes (17) Axel Robotic Platform for Crater and Extreme Terrain Exploration (18) Site Tamper and Material Plow Tool - STAMP (19) Magnetic Interface for Segmented Mirror Assembly (20) Transpiration-Cooled Spacecraft-Insulation-Repair Fasteners (21) Fluorescence-Based Sensor for Monitoring Activation of Lunar Dust (22) Aperture Ion Source (23) Virtual Ultrasound Guidance for Inexperienced Operators (24) Model-Based Fault Diagnosis: Performing Root Cause and Impact Analyses in Real Time (25) Interactive Schematic Integration Within the Propellant System Modeling Environment (26) Magnetic and Electric Field Polarizations of Oblique Magnetospheric Chorus Waves (27) Variable Sampling Mapping.

Hardware accelerator design for change detection in smart camera

NASA Astrophysics Data System (ADS)

Singh, Sanjay; Dunga, Srinivasa Murali; Saini, Ravi; Mandal, A. S.; Shekhar, Chandra; Chaudhury, Santanu; Vohra, Anil

2011-10-01

Smart Cameras are important components in Human Computer Interaction. In any remote surveillance scenario, smart cameras have to take intelligent decisions to select frames of significant changes to minimize communication and processing overhead. Among many of the algorithms for change detection, one based on clustering based scheme was proposed for smart camera systems. However, such an algorithm could achieve low frame rate far from real-time requirements on a general purpose processors (like PowerPC) available on FPGAs. This paper proposes the hardware accelerator capable of detecting real time changes in a scene, which uses clustering based change detection scheme. The system is designed and simulated using VHDL and implemented on Xilinx XUP Virtex-IIPro FPGA board. Resulted frame rate is 30 frames per second for QVGA resolution in gray scale.

A multi-rate DPSK modem for free-space laser communications

NASA Astrophysics Data System (ADS)

Spellmeyer, N. W.; Browne, C. A.; Caplan, D. O.; Carney, J. J.; Chavez, M. L.; Fletcher, A. S.; Fitzgerald, J. J.; Kaminsky, R. D.; Lund, G.; Hamilton, S. A.; Magliocco, R. J.; Mikulina, O. V.; Murphy, R. J.; Rao, H. G.; Scheinbart, M. S.; Seaver, M. M.; Wang, J. P.

2014-03-01

The multi-rate DPSK format, which enables efficient free-space laser communications over a wide range of data rates, is finding applications in NASA's Laser Communications Relay Demonstration. We discuss the design and testing of an efficient and robust multi-rate DPSK modem, including aspects of the electrical, mechanical, thermal, and optical design. The modem includes an optically preamplified receiver, an 0.5-W average power transmitter, a LEON3 rad-hard microcontroller that provides the command and telemetry interface and supervisory control, and a Xilinx Virtex-5 radhard reprogrammable FPGA that both supports the high-speed data flow to and from the modem and controls the modem's analog and digital subsystems. For additional flexibility, the transmitter and receiver can be configured to support operation with multi-rate PPM waveforms.

Irradiation setup at the U-120M cyclotron facility

NASA Astrophysics Data System (ADS)

Křížek, F.; Ferencei, J.; Matlocha, T.; Pospíšil, J.; Príbeli, P.; Raskina, V.; Isakov, A.; Štursa, J.; Vaňát, T.; Vysoká, K.

2018-06-01

This paper describes parameters of the proton beams provided by the U-120M cyclotron and the related irradiation setup at the open access irradiation facility at the Nuclear Physics Institute of the Czech Academy of Sciences. The facility is suitable for testing radiation hardness of various electronic components. The use of the setup is illustrated by a measurement of an error rate for errors caused by Single Event Transients in an SRAM-based Xilinx XC3S200 FPGA. This measurement provides an estimate of a possible occurrence of Single Event Transients. Data suggest that the variation of error rate of the Single Event Effects for different clock phase shifts is not significant enough to use clock phase alignment with the beam as a fault mitigation technique.

An Efficient VLSI Architecture of the Enhanced Three Step Search Algorithm

NASA Astrophysics Data System (ADS)

Biswas, Baishik; Mukherjee, Rohan; Saha, Priyabrata; Chakrabarti, Indrajit

2016-09-01

The intense computational complexity of any video codec is largely due to the motion estimation unit. The Enhanced Three Step Search is a popular technique that can be adopted for fast motion estimation. This paper proposes a novel VLSI architecture for the implementation of the Enhanced Three Step Search Technique. A new addressing mechanism has been introduced which enhances the speed of operation and reduces the area requirements. The proposed architecture when implemented in Verilog HDL on Virtex-5 Technology and synthesized using Xilinx ISE Design Suite 14.1 achieves a critical path delay of 4.8 ns while the area comes out to be 2.9K gate equivalent. It can be incorporated in commercial devices like smart-phones, camcorders, video conferencing systems etc.

Implementation of health promotion programmes in schools: an approach to understand the influence of contextual factors on the process?

PubMed

Darlington, Emily Joan; Violon, Nolwenn; Jourdan, Didier

2018-01-22

Implementing complex and multi-level public health programmes is challenging in school settings. Discrepancies between expected and actual programme outcomes are often reported. Such discrepancies are due to complex interactions between contextual factors. Contextual factors relate to the setting, the community, in which implementation occurs, the stakeholders involved, and the characteristics of the programme itself. This work uses realist evaluation to understand how contextual factors influence the implementation process, to result in variable programme outcomes. This study focuses on identifying contextual factors, pinpointing combinations of contextual factors, and understanding interactions and effects of such factors and combinations on programme outcomes on different levels of the implementation process. Schools which had participated in a school-based health promotion programme between 2012 and 2015 were included. Two sets of qualitative data were collected: semi-structured interviews with school staff and programme coordinators; and written documents about the actions implemented in a selection of four schools. Quantitative data included 1553 questionnaires targeting pupils aged 8 to 11 in 14 schools to describe the different school contexts. The comparison between what was expected from the programme (programme theory) and the outcomes identified in the field data, showed that some of the mechanisms expected to support the implementation of the programme, did not operate as anticipated (e.g. inclusion of training, initiation by decision-maker). Key factors which influenced the implementation process included, amongst other factors, the mode of introduction of the programme, home/school relationship, leadership of the management team, and the level of delegated power. Five types of interactions between contextual factors were put forward: enabling, hindering, neutral, counterbalancing and moderating effects. Recurrent combinations of factors were identified. Implementation was more challenging in vulnerable schools where school climate was poor. A single programme cannot be suited or introduced in the same manner in every context. However, key recurrent combinations of contextual factors could contribute to the design of implementation patterns, which could provide guidelines and recommendation for grass-root programme implementation.

How long does it take to become fit?

PubMed Central

Pearn, J

1980-01-01

To become fit an individual must generate optimal muscle strength and must develop cardiopulmonary reserve, or stamina. Physical fitness programmes require motivation, a graded series of appropriately designed exercises, and scientific surveillance. Motivation and efficiency in fitness programmes depends on early positive feedback to participants, confirming that stamina and strength are developing. A practical field experiment was performed to determine the minimum time that healthy young adults require to reach an initial plateau in objective measures of fitness. Fifty male university undergraduates were studied during an annual volunteer military training camp. Thirty had volunteered to take part in the fitness programme; the remaining 20 had initially rejected the offer but underwent the programme as part of their military training and acted as unmotivated controls. All the subjects became fit within 14 days of starting training, with objective improvement in both absolute strength and pulse recovery times. Non-motivated individuals, training with motivated individuals for 20 minutes each day, can therefore achieve levels of fitness indistinguishable from those of healthy highly motivated subjects. Fitness programmes must be carefully supervised, however, with medical examinations for those about to undergo vigorous exercise. PMID:7437862

Solid-state NMR imaging system

DOEpatents

Gopalsami, Nachappa; Dieckman, Stephen L.; Ellingson, William A.

1992-01-01

An apparatus for use with a solid-state NMR spectrometer includes a special imaging probe with linear, high-field strength gradient fields and high-power broadband RF coils using a back projection method for data acquisition and image reconstruction, and a real-time pulse programmer adaptable for use by a conventional computer for complex high speed pulse sequences.

Europeanizing Education: Governing a New Policy Space

ERIC Educational Resources Information Center

Lawn, Martin; Grek, Sotiria

2012-01-01

The study of common and diverse effects in the field of education across Europe is a growing field of inquiry and research. It is the result of many actions, networks and programmes over the last few decades and the development of common European education policies. "Europeanizing Education" describes the origins of European education…

Communicating Feedback in Teaching Practice Supervision in a Learning-Oriented Field Experience Assessment Framework

ERIC Educational Resources Information Center

Tang, Sylvia Yee Fang; Chow, Alice Wai Kwan

2007-01-01

This article seeks to understand the ways in which feedback was communicated in post-observation conferences in teaching practice supervision within the learning-oriented field experience assessment (LOFEA) framework. 32 post-observation conferences between 21 pairs of supervisors and participants of in-service teacher education programmes, and…

A novel productivity-driven logic element for field-programmable devices

NASA Astrophysics Data System (ADS)

Marconi, Thomas; Bertels, Koen; Gaydadjiev, Georgi

2014-06-01

Although various techniques have been proposed for power reduction in field-programmable devices (FPDs), they are still all based on conventional logic elements (LEs). In the conventional LE, the output of the combinational logic (e.g. the look-up table (LUT) in many field-programmable gate arrays (FPGAs)) is connected to the input of the storage element; while the D flip-flop (DFF) is always clocked even when not necessary. Such unnecessary transitions waste power. To address this problem, we propose a novel productivity-driven LE with reduced number of transitions. The differences between our LE and the conventional LE are in the FFs-type used and the internal LE organisation. In our LEs, DFFs have been replaced by T flip-flops with the T input permanently connected to logic value 1. Instead of connecting the output of the combinational logic to the FF input, we use it as the FF clock. The proposed LE has been validated via Simulation Program with Integrated Circuit Emphasis (SPICE) simulations for a 45-nm Complementary Metal-Oxide-Semiconductor (CMOS) technology as well as via a real Computer-Aided Design (CAD) tools on a real FPGA using the standard Microelectronic Center of North Carolina (MCNC) benchmark circuits. The experimental results show that FPDs using our proposal not only have 48% lower total power but also run 17% faster than conventional FPDs on average.

A truly international lunar base as the next logical step for human spaceflight

NASA Astrophysics Data System (ADS)

Bonneville, R.

2018-06-01

A human mission to Mars has been highlighted as the long term goal for space exploration, with intermediate stages such as missions to the Moon and/or to asteroids, but a human mission to Mars will not be feasible before several decades. For the time being the major ambitious accomplishment in the field of human spaceflight is the International Space Station but a human spaceflight programme which would be restricted to Low Earth orbit (LEO) has indeed little interest. Thus the next step in the field of human exploration should be the definition of a new exploration programme beyond LEO, built within a long term perspective. We must acknowledge that science is not the main driver of human space exploration and that the main success of the ISS is to have allowed its partners to work together. The main goal of a new human exploration programme will be to promote international cooperation between the major space-faring countries. The only sensible and feasible objective of a near/mid-term human spaceflight programme should be the edification of a lunar base, under the condition that this base is built as a truly international venture. The ISS in the 1990s had illustrated a calmed relation between the USA, together with Europe, Canada and Japan, and Russia; a lunar base would be the symbol of a similar calmed relation between the same partners and China, and possibly others such as India. For the benefit of all humankind this extra continent, the Moon, should be used only for peaceful purposes like Antarctica today, and should not become the theatre or the stake of conflicts. Such a programme is technically feasible and financially affordable in a rather short term. So let us go to the Moon, but let us get there together.

Optically Programmable Field Programmable Gate Arrays (FPGA) Systems

DTIC Science & Technology

2004-01-01

VCSEL requires placing the array far enough as to overlap the entire footprint of the signal beam in order to record the hologram. Therefore, these...hologram that self-focuses, due to phase -conjugation, on the array of detectors in the chip. VC A 10 m m 10 mm 18mm 16mm SEL RRAY OPTICAL MEMORY LOGIC...the VCSEL array , the chip and the optical material, and the requirements they have to meet for their use in the OPGA system. Section

Biomedical engineering education through global engineering teams.

PubMed

Scheffer, C; Blanckenberg, M; Garth-Davis, B; Eisenberg, M

2012-01-01

Most industrial projects require a team of engineers from a variety of disciplines. The team members are often culturally diverse and geographically dispersed. Many students do not acquire sufficient skills from typical university courses to function efficiently in such an environment. The Global Engineering Teams (GET) programme was designed to prepare students such a scenario in industry. This paper discusses five biomedical engineering themed projects completed by GET students. The benefits and success of the programme in educating students in the field of biomedical engineering are discussed.

Genome editing comes of age.

PubMed

Kim, Jin-Soo

2016-09-01

Genome editing harnesses programmable nucleases to cut and paste genetic information in a targeted manner in living cells and organisms. Here, I review the development of programmable nucleases, including zinc finger nucleases (ZFNs), TAL (transcription-activator-like) effector nucleases (TALENs) and CRISPR (cluster of regularly interspaced palindromic repeats)-Cas9 (CRISPR-associated protein 9) RNA-guided endonucleases (RGENs). I specifically highlight the key advances that set the foundation for the rapid and widespread implementation of CRISPR-Cas9 genome editing approaches that has revolutionized the field.

A Week-long Summer Programme in Astronomy for High-school Students

NASA Astrophysics Data System (ADS)

Mondim, P.

2016-12-01

The last four years have seen a considerable reduction in the number of candidates for the only Portuguese university degree course in astronomy. As a consequence, a number of measures were taken in order to increase the awareness of astronomy among high school students and to increase the number of students who ultimately decide to apply for the astronomy degree. Here, we present a week-long programme of experimental activities and lectures covering the major fields of astronomy, and an evaluation of its success.

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

NASA Astrophysics Data System (ADS)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

Programmable Logic Application Notes

NASA Technical Reports Server (NTRS)

Katz, Richard

2000-01-01

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.

Synthetic Morphogenesis.

PubMed

Teague, Brian P; Guye, Patrick; Weiss, Ron

2016-09-01

Throughout biology, function is intimately linked with form. Across scales ranging from subcellular to multiorganismal, the identity and organization of a biological structure's subunits dictate its properties. The field of molecular morphogenesis has traditionally been concerned with describing these links, decoding the molecular mechanisms that give rise to the shape and structure of cells, tissues, organs, and organisms. Recent advances in synthetic biology promise unprecedented control over these molecular mechanisms; this opens the path to not just probing morphogenesis but directing it. This review explores several frontiers in the nascent field of synthetic morphogenesis, including programmable tissues and organs, synthetic biomaterials and programmable matter, and engineering complex morphogenic systems de novo. We will discuss each frontier's objectives, current approaches, constraints and challenges, and future potential. Copyright © 2016 Cold Spring Harbor Laboratory Press; all rights reserved.

An inexpensive programmable illumination microscope with active feedback.

PubMed

Tompkins, Nathan; Fraden, Seth

2016-02-01

We have developed a programmable illumination system capable of tracking and illuminating numerous objects simultaneously using only low-cost and reused optical components. The active feedback control software allows for a closed-loop system that tracks and perturbs objects of interest automatically. Our system uses a static stage where the objects of interest are tracked computationally as they move across the field of view allowing for a large number of simultaneous experiments. An algorithmically determined illumination pattern can be applied anywhere in the field of view with simultaneous imaging and perturbation using different colors of light to enable spatially and temporally structured illumination. Our system consists of a consumer projector, camera, 35-mm camera lens, and a small number of other optical and scaffolding components. The entire apparatus can be assembled for under $4,000.

Field-Programmable Gate Array-based fluxgate magnetometer with digital integration

NASA Astrophysics Data System (ADS)

Butta, Mattia; Janosek, Michal; Ripka, Pavel

2010-05-01

In this paper, a digital magnetometer based on printed circuit board fluxgate is presented. The fluxgate is pulse excited and the signal is extracted by gate integration. We investigate the possibility to perform integration on very narrow gates (typically 500 ns) by using digital techniques. The magnetometer is based on field-programmable gate array (FPGA) card: we will show all the advantages and disadvantages, given by digitalization of fluxgate output voltage by means of analog-to-digital converter on FPGA card, as well as digitalization performed by external digitizer. Due to very narrow gate, it is shown that a magnetometer entirely based on a FPGA card is preferable, because it avoids noise due to trigger instability. Both open loop and feedback operative mode are described and achieved results are presented.

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

NASA Technical Reports Server (NTRS)

Al Hassan, Mohammad; Britton, Paul; Hatfield, Glen Spencer; Novack, Steven D.

2017-01-01

Today's launch vehicles complex electronic and avionics systems heavily utilize Field Programmable Gate Array (FPGA) integrated circuits (IC) for their superb speed and reconfiguration capabilities. Consequently, FPGAs are prevalent ICs in communication protocols such as MILSTD- 1553B and in control signal commands such as in solenoid valve actuations. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

Evolutionary Based Techniques for Fault Tolerant Field Programmable Gate Arrays

NASA Technical Reports Server (NTRS)

Larchev, Gregory V.; Lohn, Jason D.

2006-01-01

The use of SRAM-based Field Programmable Gate Arrays (FPGAs) is becoming more and more prevalent in space applications. Commercial-grade FPGAs are potentially susceptible to permanently debilitating Single-Event Latchups (SELs). Repair methods based on Evolutionary Algorithms may be applied to FPGA circuits to enable successful fault recovery. This paper presents the experimental results of applying such methods to repair four commonly used circuits (quadrature decoder, 3-by-3-bit multiplier, 3-by-3-bit adder, 440-7 decoder) into which a number of simulated faults have been introduced. The results suggest that evolutionary repair techniques can improve the process of fault recovery when used instead of or as a supplement to Triple Modular Redundancy (TMR), which is currently the predominant method for mitigating FPGA faults.

Real-time field programmable gate array architecture for computer vision

NASA Astrophysics Data System (ADS)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar

2001-01-01

This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low-level image processing. The field programmable gate array (FPGA)-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and it is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on dedicated very- large-scale-integrated devices to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real-time performance are discussed. Some results are presented and discussed.

Examining the pathways for young people with drug and alcohol dependence: a mixed-method design to examine the role of a treatment programme

PubMed Central

Nathan, Sally; Rawstorne, Patrick; Hayen, Andrew; Bryant, Joanne; Baldry, Eileen; Ferry, Mark; Williams, Megan; Shanahan, Marian; Jayasinha, Ranmalie

2016-01-01

Introduction Young people with drug and alcohol problems are likely to have poorer health and other psychosocial outcomes than other young people. Residential treatment programmes have been shown to lead to improved health and related outcomes for young people in the short term. There is very little robust research showing longer term outcomes or benefits of such programmes. This paper describes an innovative protocol to examine the longer term outcomes and experiences of young people referred to a residential life management and treatment programme in Australia designed to address alcohol and drug issues in a holistic manner. Methods and analysis This is a mixed-methods study that will retrospectively and prospectively examine young people's pathways into and out of a residential life management programme. The study involves 3 components: (1) retrospective data linkage of programme data to health and criminal justice administrative data sets, (2) prospective cohort (using existing programme baseline data and a follow-up survey) and (3) qualitative in-depth interviews with a subsample of the prospective cohort. The study will compare findings among young people who are referred and (a) stay 30 days or more in the programme (including those who go on to continuing care and those who do not); (b) start, but stay fewer than 30 days in the programme; (c) are assessed, but do not start the programme. Ethics and dissemination Ethics approval has been sought from several ethics committees including a university ethics committee, state health departments and an Aboriginal-specific ethics committee. The results of the study will be published in peer-reviewed journals, presented at research conferences, disseminated via a report for the general public and through Facebook communications. The study will inform the field more broadly about the value of different methods in evaluating programmes and examining the pathways and trajectories of vulnerable young people. PMID:27225650

Do preschools differ in promoting children's physical activity? An instrument for the assessment of preschool physical activity programmes.

PubMed

Sterdt, Elena; Pape, Natalie; Kramer, Silke; Urban, Michael; Werning, Rolf; Walter, Ulla

2013-09-03

Preschools offer high potential for preventive interventions. However, little is known about the structure of preschool programmes to promote physical activity (PA) in preschoolers although almost all children aged three to six years spend one third of the day at preschool. The aim of this study was to determine whether and to what extent preschools implement systematic PA promotion measures using an instrument specifically developed to assess and systematize preschool PA programmes. In the cross-sectional study a baseline survey of preschool education policies was conducted to identify and assess the type and extent of PA programmes and opportunities in preschools in the State of Lower Saxony, Germany. An assessment instrument was developed to identify preschools with systematic PA programmes (type 1) and those without PA programmes (type 2) based on the following quality criteria: A) written PA policy, B) structured weekly PA offerings for all children; C) at least one qualified physical education teacher; D) PA-friendly indoor and outdoor facilities (exercise room, situational PA opportunities, outdoor areas, play equipment etc.), and E) structured PA promotion in place for at least two years. A third type of preschool that promotes PA in children to some extent (i.e., that meets the criteria partially but not completely) was classified as "preschools with limited PA programmes". 2415 preschools participated in the survey (response rate: 59%). The results show that 26% (n = 554) have a systematic PA programme while 3% (n = 64) have no PA programme. Most (71%, n = 1514) were classified as limited PA programme preschools. All three types of preschools differed significantly (p = .000) from each other in terms of size (small vs. large). Most of the preschools without PA programmes are small half-day preschools. The study investigated an assessment-instrument providing extensive insight into the nature, extent and routine practical implementation of PA promotion in preschools. The criteria used to evaluate preschool PA programmes are well-suited to identify the different preschool PA programme types and target areas in the field of PA promotion in which specific measures (teacher education, structured PA offerings, etc.) can be implemented in future interventions.

Progress and Achievements at the Mid Term of the Dragon 3 Programme

NASA Astrophysics Data System (ADS)

Desnos, Yves-Louis; Li, Zengyuan; Zmuda, Andy; Gao, Zhihai

2014-11-01

The Dragon Programme is a joint undertaking between ESA and the Ministry of Science and Technology (MOST) of China and the National Remote Sensing Center of China (NRSCC). Its purpose is to encourage increased exploitation of ESA and Chinese space resources within China as well as stimulate increased scientific cooperation in the field of Earth Observation (EO) science and applications between China and Europe. Since 2004, this pioneering programme has become a model for scientific and technological cooperation between China and Europe. By successfully encouraging joint research using ESA, Third Party Missions and Chinese EO data across a range of thematic areas, Dragon continues to deliver outstanding scientific results. The programme has successfully completed two phases, Dragon 1 from 2004 to 2008, Dragon 2 from 2008 to 2012. The third phase of Dragon was started in 2012 and will be completed in 2016. The Dragon 3 project teams are led by leading EO scientists and young scientists are also engaged on the projects. Advanced training in land, ocean and atmospheric applications is a feature of the programme and a course on land and one course on ocean applications have been successfully held in 2012 and 2013 in China. Here-in provided is an overview of the results, reporting and training activities at the mid-term stage of the programme.

Interference of GSM mobile phones with communication between Cardiac Rhythm Management devices and programmers: A combined in vivo and in vitro study.

PubMed

Huang, Dong; Dong, Zhi-Feng; Chen, Yan; Wang, Fa-Bin; Wei, Zhi; Zhao, Wen-Bin; Li, Shuai; Liu, Ming-Ya; Zhu, Wei; Wei, Meng; Li, Jing-Bo

2015-07-01

To investigate interference, and how to avoid it, by high-frequency electromagnetic fields (EMFs) of Global System for Mobile Communications (GSM) mobile phone with communication between cardiac rhythm management devices (CRMs) and programmers, a combined in vivo and in vitro testing was conducted. During in vivo testing, GSM mobile phones interfered with CRM-programmer communication in 33 of 65 subjects tested (50.8%). Losing ventricle sensing was representative in this study. In terms of clinical symptoms, only 4 subjects (0.6%) felt dizzy during testing. CRM-programmer communication recovered upon termination of mobile phone communication. During in vitro testing, electromagnetic interference by high-frequency (700-950 MHz) EMFs reproducibly occurred in duplicate testing in 18 of 20 CRMs (90%). During each interference, the pacing pulse signal on the programmer would suddenly disappear while the synchronous signal was normal on the amplifier-oscilloscope. Simulation analysis showed that interference by radiofrequency emitting devices with CRM-programmer communication may be attributed to factors including materials, excitation source distance, and implant depth. Results suggested that patients implanted with CRMs should not be restricted from using GSM mobile phones; however, CRMs should be kept away from high-frequency EMFs of GSM mobile phone during programming. © 2015 Wiley Periodicals, Inc.

The efficacy of a movement control exercise programme to reduce injuries in youth rugby: a cluster randomised controlled trial

PubMed Central

Hislop, M D; Stokes, K A; Williams, S; McKay, C D; England, M; Kemp, S P T

2016-01-01

Background Injuries to youth rugby players have become an increasingly prominent health concern, highlighting the importance of developing and implementing appropriate preventive strategies. A growing body of evidence from other youth sports has demonstrated the efficacy of targeted exercise regimens to reduce injury risk. However, studies have yet to investigate the effect of such interventions in youth contact sport populations like rugby union. Objective To determine the efficacy of an evidence-based movement control exercise programme compared with a sham exercise programme to reduce injury risk in youth rugby players. Exercise programme compliance between trial arms and the effect of coach attitudes on compliance will also be evaluated. Setting School rugby coaches in England will be the target of the researcher intervention, with the effects of the injury prevention programmes being measured in male youth players aged 14–18 years in school rugby programmes over the 2015–2016 school winter term. Methods A cluster-randomised controlled trial with schools randomly allocated to either a movement control exercise programme or a sham exercise programme, both of which are coach-delivered. Injury measures will derive from field-based injury surveillance, with match and training exposure and compliance recorded. A questionnaire will be used to evaluate coach attitudes, knowledge, beliefs and behaviours both prior to and on the conclusion of the study period. Outcome measures Summary injury measures (incidence, severity and burden) will be compared between trial arms, as will the influence of coach attitudes on compliance and injury burden. Additionally, changes in these outcomes through using the exercise programmes will be evaluated. Trial registration number ISRTCNN13422001. PMID:27900148

High speed fault tolerant secure communication for muon chamber using FPGA based GBTx emulator

NASA Astrophysics Data System (ADS)

Sau, Suman; Mandal, Swagata; Saini, Jogender; Chakrabarti, Amlan; Chattopadhyay, Subhasis

2015-12-01

The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at the GSI. The CBM experiment will investigate the highly compressed nuclear matter using nucleus-nucleus collisions. This experiment will examine lieavy-ion collisions in fixed target geometry and will be able to measure hadrons, electrons and muons. CBM requires precise time synchronization, compact hardware, radiation tolerance, self-triggered front-end electronics, efficient data aggregation schemes and capability to handle high data rate (up to several TB/s). As a part of the implementation of read out chain of Muon Cliamber(MUCH) [1] in India, we have tried to implement FPGA based emulator of GBTx in India. GBTx is a radiation tolerant ASIC that can be used to implement multipurpose high speed bidirectional optical links for high-energy physics (HEP) experiments and is developed by CERN. GBTx will be used in highly irradiated area and more prone to be affected by multi bit error. To mitigate this effect instead of single bit error correcting RS code we have used two bit error correcting (15, 7) BCH code. It will increase the redundancy which in turn increases the reliability of the coded data. So the coded data will be less prone to be affected by noise due to radiation. The data will go from detector to PC through multiple nodes through the communication channel. The computing resources are connected to a network which can be accessed by authorized person to prevent unauthorized data access which might happen by compromising the network security. Thus data encryption is essential. In order to make the data communication secure, advanced encryption standard [2] (AES - a symmetric key cryptography) and RSA [3], [4] (asymmetric key cryptography) are used after the channel coding. We have implemented GBTx emulator on two Xilinx Kintex-7 boards (KC705). One will act as transmitter and other will act as receiver and they are connected through optical fiber through small form-factor pluggable (SFP) port. We have tested the setup in the runtime environment using Xilinx Cliipscope Pro Analyzer. We also measure the resource utilization, throughput., power optimization of implemented design.

Electronics for CMS Endcap Muon Level-1 Trigger System Phase-1 and HL LHC upgrades

NASA Astrophysics Data System (ADS)

Madorsky, A.

2017-07-01

To accommodate high-luminosity LHC operation at a 13 TeV collision energy, the CMS Endcap Muon Level-1 Trigger system had to be significantly modified. To provide robust track reconstruction, the trigger system must now import all available trigger primitives generated by the Cathode Strip Chambers and by certain other subsystems, such as Resistive Plate Chambers (RPC). In addition to massive input bandwidth, this also required significant increase in logic and memory resources. To satisfy these requirements, a new Sector Processor unit has been designed. It consists of three modules. The Core Logic module houses the large FPGA that contains the track-finding logic and multi-gigabit serial links for data exchange. The Optical module contains optical receivers and transmitters; it communicates with the Core Logic module via a custom backplane section. The Pt Lookup table (PTLUT) module contains 1 GB of low-latency memory that is used to assign the final Pt to reconstructed muon tracks. The μ TCA architecture (adopted by CMS) was used for this design. The talk presents the details of the hardware and firmware design of the production system based on Xilinx Virtex-7 FPGA family. The next round of LHC and CMS upgrades starts in 2019, followed by a major High-Luminosity (HL) LHC upgrade starting in 2024. In the course of these upgrades, new Gas Electron Multiplier (GEM) detectors and more RPC chambers will be added to the Endcap Muon system. In order to keep up with all these changes, a new Advanced Processor unit is being designed. This device will be based on Xilinx UltraScale+ FPGAs. It will be able to accommodate up to 100 serial links with bit rates of up to 25 Gb/s, and provide up to 2.5 times more logic resources than the device used currently. The amount of PTLUT memory will be significantly increased to provide more flexibility for the Pt assignment algorithm. The talk presents preliminary details of the hardware design program.

SPIDR, a general-purpose readout system for pixel ASICs

NASA Astrophysics Data System (ADS)

van der Heijden, B.; Visser, J.; van Beuzekom, M.; Boterenbrood, H.; Kulis, S.; Munneke, B.; Schreuder, F.

2017-02-01

The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a "soft core" CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four 10 Gigabit Ethernet links, and in addition provides the slow and fast control for the chip.

Public Hearing or `Hearing Public'? An Evaluation of the Participation of Local Stakeholders in Environmental Impact Assessment of Ghana's Jubilee Oil Fields

NASA Astrophysics Data System (ADS)

Bawole, Justice Nyigmah

2013-08-01

This article investigates the involvement of local stakeholders in the environmental impact assessment (EIA) processes of Ghana's first off-shore oil fields (the Jubilee fields). Adopting key informants interviews and documentary reviews, the article argues that the public hearings and the other stakeholder engagement processes were cosmetic and rhetoric with the view to meeting legal requirements rather than a purposeful interest in eliciting inputs from local stakeholders. It further argues that the operators appear to lack the social legitimacy and social license that will make them acceptable in the project communities. A rigorous community engagement along with a commitment to actively involving local stakeholders in the corporate social responsibility (CSR) programmes of the partners may enhance the image of the partners and improve their social legitimacy. Local government agencies should be capacitated to actively engage project organisers; and government must mitigate the impact of the oil projects through well-structured social support programmes.

Public hearing or 'hearing public'? an evaluation of the participation of local stakeholders in environmental impact assessment of Ghana's Jubilee oil fields.

PubMed

Bawole, Justice Nyigmah

2013-08-01

This article investigates the involvement of local stakeholders in the environmental impact assessment (EIA) processes of Ghana's first off-shore oil fields (the Jubilee fields). Adopting key informants interviews and documentary reviews, the article argues that the public hearings and the other stakeholder engagement processes were cosmetic and rhetoric with the view to meeting legal requirements rather than a purposeful interest in eliciting inputs from local stakeholders. It further argues that the operators appear to lack the social legitimacy and social license that will make them acceptable in the project communities. A rigorous community engagement along with a commitment to actively involving local stakeholders in the corporate social responsibility (CSR) programmes of the partners may enhance the image of the partners and improve their social legitimacy. Local government agencies should be capacitated to actively engage project organisers; and government must mitigate the impact of the oil projects through well-structured social support programmes.

Mentoring of young professionals in the field of rheumatology in Europe: results from an EMerging EUlar NETwork (EMEUNET) survey.

PubMed

Frank-Bertoncelj, Mojca; Hatemi, Gulen; Ospelt, Caroline; Ramiro, Sofia; Machado, Pedro; Mandl, Peter; Gossec, Laure; Buch, Maya H

2014-01-01

To explore perceptions of, participation in and satisfaction with mentoring programmes among young clinicians and researchers in rheumatology in Europe. To identify mentoring needs and expectations focusing on gender-specific differences. A survey on mentoring in rheumatology was distributed to young clinicians and researchers in rheumatology in Europe through the EMEUNET network. We received 248 responses from 30 European countries. Although 82% of respondents expressed the need for a formal mentoring scheme by EULAR, only 35% participated in mentoring programmes and merely 20% were very satisfied with mentoring. Respondents very satisfied with mentoring were more likely to participate in research, but not clinical mentoring programmes. Career mentoring was perceived as the most beneficial type of mentoring for career development by 46% of respondents, only 35% of respondents, however, declared the existence of career mentoring programmes in their country. There was no gender difference considering participation in mentoring programmes. Women, however, tended to be less satisfied than men with existing mentoring programmes and considered expectations from mentoring as more important for their career development, especially when pertaining to career planning, greater autonomy/responsibility and establishing new networks/collaborations. Career mentoring, especially in the clinical setting, was recognised as a major unmet need of existing mentoring programmes in rheumatology in Europe. Gender-specific differences were identified in the expectations from mentoring. Given this and the importance of mentoring for career prosperity of young physicians and scientists, our survey represents the first step towards developing and refining mentoring programmes in rheumatology in Europe.

Becoming an Academic: The Role of Doctoral Capital in the Field of Education

ERIC Educational Resources Information Center

Walker, Jude; Yoon, EeSeul

2017-01-01

This paper draws on Bourdieu's concepts of "field," "capital" and "habitus" to examine the learning and enculturation of alumni of a Canadian PhD programme in the discipline of Education. We introduce the concept of "doctoral capital" to help explain how and why some PhD graduates go on to secure faculty…

Status of Job Motivation and Job Performance of Field Level Extension Agents in Ogun State: Implications for Agricultural Development

ERIC Educational Resources Information Center

Fabusoro, E.; Awotunde, J. A.; Sodiya, C. I.; Alarima, C. I.

2008-01-01

The field level extension agents (FLEAs) are the lifeline of the agricultural extension system in Nigeria. Their motivation and job performance are therefore important to achieving faster agricultural development in Nigeria. The study identified the factors motivating the FLEAs working with Ogun State Agricultural development programme (OGADEP)…

SEURAT: Safety Evaluation Ultimately Replacing Animal Testing – Recommendations for future research in the field of predictive toxicology

EPA Science Inventory

The development of non-animal methodology to evaluate the potential for a chemical to cause systemic toxicity is one of the grand challenges of modern science. The European research programme SEURAT is active in this field and will conclude its first phase, SEURAT-1, in December ...

Introduction to FPGA Devices and The Challenges for Critical Application - A User's Perspective

NASA Technical Reports Server (NTRS)

Berg, Melanie; LaBel, Kenneth

2015-01-01

This presentation is an introduction to Field Programmable Gate Array (FPGA) devices and the challenges of critical application including: safety, reliability, availability, recoverability, and security.

Herd Immunity Against Foot-and-Mouth Disease Under Different Vaccination Practices in India.

PubMed

Sharma, G K; Mahajan, S; Matura, R; Biswal, J K; Ranjan, R; Subramaniam, S; Misri, J; Bambal, R G; Pattnaik, B

2017-08-01

A systematic vaccination programme is ongoing in India to control the three prevailing serotypes (A, O, Asia1) of foot-and-mouth disease (FMD) virus. Under the programme, more than 120 million bovine (term bovine applicable to both cattle and buffalo in this study) population of 221 of the 666 districts in the country are being bi-annually vaccinated with trivalent vaccine since 2010. Although clinical disease has reduced in these districts because of the systematic vaccinations, an abrupt increase in the number of FMD cases was recorded in 2013. Hence, a longitudinal field study was conducted in the year 2014 to estimate the serological herd immunity level in bovines, the impact of systematic vaccinations and field efficacy of the vaccines used. Serum samples (n = 115 963) collected from 295 districts of the 18 states of the country were analysed to estimate antibody titres against structural proteins of the three serotypes. The efficacy of the vaccine was demonstrated in the control group (group-D) where animals of the group were identified by ear tags for the purpose of repeated sampling after vaccination. Progressive building of the herd immunity in the field after systematic vaccination was demonstrated. The mean antibody titre against the serotypes O, A and Asia1 was estimated as log 10 1.93 (95% CI 1.92-1.93), 2.02 (2.02-2.02) and 2.02 (2.02-2.02), respectively, in the states covered under the control programme. However, in other states herd immunity was significantly low [mean titre log 10 1.68 (95% CI 1.67-1.69), 1.77 (1.76-1.78) and 1.85 (1.84-1.86) against the three serotypes]. Inverse relationship between the herd immunity and FMD incidences was observed the states following different vaccination practices. The study helped in demarcation of FMD risk zones in the country with low herd immunity. Estimation of herd immunity kinetics in the field helped in refining the vaccination schedule under the control programme. © 2016 Blackwell Verlag GmbH.

Introduction of BaSnO3 and BaZrO3 artificial pinning centres into 2G HTS wires based on PLD-GdBCO films. Phase I of the industrial R&D programme at SuperOx

NASA Astrophysics Data System (ADS)

Chepikov, V.; Mineev, N.; Degtyarenko, P.; Lee, S.; Petrykin, V.; Ovcharov, A.; Vasiliev, A.; Kaul, A.; Amelichev, V.; Kamenev, A.; Molodyk, A.; Samoilenkov, S.

2017-12-01

An industrial R&D programme is ongoing at SuperOx, aimed at improving 2G HTS wire performance in magnetic field. We introduce perovskite artificial pinning centres (APC) into the HTS layer matrix. In contrast to most studies described in the literature, we use the high rate production processing parameters and PLD equipment at SuperOx. This paper reports the results of Phase I of this programme. We fabricated 2G HTS wires by pulsed laser deposition of GdBCO films doped with 6%, 12% and 18% (molar) of BaSnO3 and 6% (molar) of BaZrO3, and compared their performance with an undoped reference sample. The depositions were carried out at production growth rates of 375, 560 and 750 nm min-1 by varying laser pulse frequency. BaZrO3 and BaSnO3 formed columnar semi-coherent nanoinclusions in the GdBCO film matrix. The average transverse size of the nanocolumns was about 5 nm, and their volume density correlated with the dopant concentration. All doped samples exhibited much lower angular anisotropy of in-field critical current and higher lift-factors than the undoped sample. Samples containing 6% BaSnO3 and deposited at the lower growth rates, had higher I c than the undoped sample in the entire temperature range, in a wide range of magnetic field (B//c). The sample containing 6% BaZrO3 had higher I c than the undoped sample at 20 and 4.2 K. These results are an encouraging start of our programme, as they show a positive impact of APC introduced into 2G HTS wires fabricated at production throughput. Phase II work will be focussed on maximising the improvements in specific temperature and field conditions, as well as on the verification of reproducibility of the improvements in production wires.

Programmable shunt valve interactions with osseointegrated hearing devices.

PubMed

Pierson, Matthew J; Wehrmann, Daniel; Albers, J Andrew; El Tecle, Najib E; Costa, Dary; Elbabaa, Samer K

2017-04-01

OBJECTIVE Patients with ventriculoperitoneal (VP) shunts with programmable valves who would benefit from osseointegrated hearing devices (OIHDs) represent a unique population. The aim of this study was to evaluate the magnetic field strengths of 4 OIHDs and their interactions with 5 programmable VP shunt valves. METHODS Magnetic field strength was measured as a function of distance for each hearing device (Cochlear Baha 5, Cochlear Baha BP110, Oticon Ponto Plus Power, and Medtronic Sophono) in the following modes: inactive, active in quiet, and active in 60 decibels of background noise in the sound booth. The hearing devices were introduced to each shunt valve (Aesculap proGAV, Aesculap proGAV 2.0, Codman Hakim, Codman Certas, and Medtronic Strata II) also as a function of distance in these identical 3 settings. Each trial was repeated 5 times. Between each trial, the valves were assessed for a change in setting. Finally, using a skull model, the devices were introduced to each other in standard anatomical locations and the valves were assessed for a change in settings. RESULTS The maximum magnetic field strengths generated by the Cochlear Baha 5, BP110, and Oticon OIHDs were 1.1, 36.2, and 48.7 gauss (G), respectively. The maximum strength generated by the Sophono device was > 800 G. The magnetic field strength of the hearing devices decreased markedly with increasing distance from the device. The strength of the Sophono's magnetic attachment decreased to 34.8 G at 5 mm. The Codman Hakim, Codman Certas, and Medtronic Strata II valve settings changed when rotating the valves next to the Sophono abutment. No other changes in valve settings occurred in the distance or anatomical models for any other trials. CONCLUSIONS This is the first study evaluating the interaction between OIHDs and programmable VP shunt valves. The findings suggest that it is safe to use these devices together without having to switch to a nonprogrammable valve or move the shunt valve to a more distant location. Still, care should be taken if the Sophono device is used to ensure that the valve is ≥ 5 mm away from the magnetic attachment.

Programmable, very low noise current source.

PubMed

Scandurra, G; Cannatà, G; Giusi, G; Ciofi, C

2014-12-01

We propose a new approach for the realization of very low noise programmable current sources mainly intended for application in the field of low frequency noise measurements. The design is based on a low noise Junction Field Effect Transistor (JFET) acting as a high impedance current source and programmability is obtained by resorting to a low noise, programmable floating voltage source that allows to set the sourced current at the desired value. The floating voltage source is obtained by exploiting the properties of a standard photovoltaic MOSFET driver. Proper filtering and a control network employing super-capacitors allow to reduce the low frequency output noise to that due to the low noise JFET down to frequencies as low as 100 mHz while allowing, at the same time, to set the desired current by means of a standard DA converter with an accuracy better than 1%. A prototype of the system capable of supplying currents from a few hundreds of μA up to a few mA demonstrates the effectiveness of the approach we propose. When delivering a DC current of about 2 mA, the power spectral density of the current fluctuations at the output is found to be less than 25 pA/√Hz at 100 mHz and less than 6 pA/√Hz for f > 1 Hz, resulting in an RMS noise in the bandwidth from 0.1 to 10 Hz of less than 14 pA.

Programmable, very low noise current source

NASA Astrophysics Data System (ADS)

Scandurra, G.; Cannatà, G.; Giusi, G.; Ciofi, C.

2014-12-01

We propose a new approach for the realization of very low noise programmable current sources mainly intended for application in the field of low frequency noise measurements. The design is based on a low noise Junction Field Effect Transistor (JFET) acting as a high impedance current source and programmability is obtained by resorting to a low noise, programmable floating voltage source that allows to set the sourced current at the desired value. The floating voltage source is obtained by exploiting the properties of a standard photovoltaic MOSFET driver. Proper filtering and a control network employing super-capacitors allow to reduce the low frequency output noise to that due to the low noise JFET down to frequencies as low as 100 mHz while allowing, at the same time, to set the desired current by means of a standard DA converter with an accuracy better than 1%. A prototype of the system capable of supplying currents from a few hundreds of μA up to a few mA demonstrates the effectiveness of the approach we propose. When delivering a DC current of about 2 mA, the power spectral density of the current fluctuations at the output is found to be less than 25 pA/√Hz at 100 mHz and less than 6 pA/√Hz for f > 1 Hz, resulting in an RMS noise in the bandwidth from 0.1 to 10 Hz of less than 14 pA.

A Delphi study to determine the European core curriculum for Master programmes in genetic counselling.

PubMed

Skirton, Heather; Barnoy, Sivia; Ingvoldstad, Charlotta; van Kessel, Ingrid; Patch, Christine; O'Connor, Anita; Serra-Juhe, Clara; Stayner, Barbara; Voelckel, Marie-Antoinette

2013-10-01

Genetic counsellors have been working in some European countries for at least 30 years. Although there are great disparities between the numbers, education, practice and acceptance of these professionals across Europe, it is evident that genetic counsellors and genetic nurses in Europe are working autonomously within teams to deliver patient care. The aim of this study was to use the Delphi research method to develop a core curriculum to guide the educational preparation of these professionals in Europe. The Delphi method enables the researcher to utilise the views and opinions of a group of recognised experts in the field of study; this study consisted of four phases. Phases 1 and 4 consisted of expert workshops, whereas data were collected in phases 2 and 3 (n=35) via online surveys. All participants in the study were considered experts in the field of genetic counselling. The topics considered essential for genetic counsellor training have been organised under the following headings: (1) counselling; (2) psychological issues; (3) medical genetics; (4) human genetics; (5) ethics, law and sociology; (6) professional practice; and (7) education and research. Each topic includes the knowledge, skills and attitudes required to enable genetic counsellors to develop competence. In addition, it was considered by the experts that clinical practice should comprise 50% of the educational programme. The core Master programme curriculum will enable current courses to be assessed and inform the design of future educational programmes for European genetic counsellors.

Exploring indicators of interdisciplinary research and education success

NASA Astrophysics Data System (ADS)

Carr, Gemma; Blanch, Anicet; Blaschke, Alfred Paul; Brouwer, Roy; Bucher, Christian; Farnleitner, Andreas; Fürnkranz-Prskawetz, Alexia; Loucks, Daniel Pete; Morgenroth, Eberhard; Parajka, Juraj; Pfeifer, Norbert; Rechberger, Helmut; Wagner, Wolfgang; Zessner, Matthias; Blöschl, Günter

2017-04-01

Interdisciplinary research and education programmes aim to produce groundbreaking research, often on socially relevant topics, and to produce experts with the skills to work across disciplines. However, there are many outstanding questions on the effectiveness of interdisciplinary programmes. Such as whether they produce novel and groundbreaking research, whether interdisciplinary graduates are leading to a more interdisciplinary culture of research and practice in academia and beyond, and whether an interdisciplinary approach can more effectively address issues of societal relevance than a mono-disciplinary approach. The Vienna Doctoral Programme on Water Resource Systems at Vienna University of Technology is currently in its eighth year and offers a valuable case study to contribute to understanding interdisciplinary research and education. Ten different research fields are covered by the Programme and because collaborative research takes place both between researchers from different research fields (cross-disciplinary research) and from researchers from the same research field (mono-disciplinary research) we are able to compare the impacts of each research type. We specifically explored three questions: i) whether cross-disciplinary research leads to more innovative scientific findings than mono-disciplinary research, ii) whether cross-disciplinary researchers develop professional skills that benefit their future careers, and iii) whether cross-disciplinary research produces findings of greater societal relevance than mono-disciplinary research. To conduct the evaluation we identified a variety of indicators. Journal impact factors (IF) and citation rates of ISI indexed publications were used to compare scientific innovativeness. Based on these indicators, our findings suggest that cross-disciplinary work is more innovative. The cross-disciplinary work is published in journals with a slightly higher impact factor (mean IF is 2.36) and receives slightly more citations (mean number of citations per paper is 8) than mono-disciplinary work (mean IF is 2.09, mean number of citations per paper is 5). Graduate interdisciplinary skills were explored by categorising each graduate as either a cross-disciplinary or mono-disciplinary researcher based on their doctoral studies and comparing this to their post-doctoral work. Findings suggest that researchers who learn to work across the disciplines for their PhDs continue to work this way in their ongoing careers indicating that valuable skills have been acquired. To examine the societal relevance of the Programme's research the number of media engagements or policy impacts relating to research results were collated. Findings suggest that both cross-disciplinary and mono-disciplinary research address topics of societal value but researchers often expand their understanding of a societal interest topic by bringing in new research fields.

HEP Software Foundation Community White Paper Working Group - Detector Simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Apostolakis, J.

A working group on detector simulation was formed as part of the high-energy physics (HEP) Software Foundation's initiative to prepare a Community White Paper that describes the main software challenges and opportunities to be faced in the HEP field over the next decade. The working group met over a period of several months in order to review the current status of the Full and Fast simulation applications of HEP experiments and the improvements that will need to be made in order to meet the goals of future HEP experimental programmes. The scope of the topics covered includes the main componentsmore » of a HEP simulation application, such as MC truth handling, geometry modeling, particle propagation in materials and fields, physics modeling of the interactions of particles with matter, the treatment of pileup and other backgrounds, as well as signal processing and digitisation. The resulting work programme described in this document focuses on the need to improve both the software performance and the physics of detector simulation. The goals are to increase the accuracy of the physics models and expand their applicability to future physics programmes, while achieving large factors in computing performance gains consistent with projections on available computing resources.« less

Implementation of data acquisition interface using on-board field-programmable gate array (FPGA) universal serial bus (USB) link

NASA Astrophysics Data System (ADS)

Yussup, N.; Ibrahim, M. M.; Lombigit, L.; Rahman, N. A. A.; Zin, M. R. M.

2014-02-01

Typically a system consists of hardware as the controller and software which is installed in the personal computer (PC). In the effective nuclear detection, the hardware involves the detection setup and the electronics used, with the software consisting of analysis tools and graphical display on PC. A data acquisition interface is necessary to enable the communication between the controller hardware and PC. Nowadays, Universal Serial Bus (USB) has become a standard connection method for computer peripherals and has replaced many varieties of serial and parallel ports. However the implementation of USB is complex. This paper describes the implementation of data acquisition interface between a field-programmable gate array (FPGA) board and a PC by exploiting the USB link of the FPGA board. The USB link is based on an FTDI chip which allows direct access of input and output to the Joint Test Action Group (JTAG) signals from a USB host and a complex programmable logic device (CPLD) with a 24 MHz clock input to the USB link. The implementation and results of using the USB link of FPGA board as the data interfacing are discussed.

Implementation of data acquisition interface using on-board field-programmable gate array (FPGA) universal serial bus (USB) link

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yussup, N.; Ibrahim, M. M.; Lombigit, L.

Typically a system consists of hardware as the controller and software which is installed in the personal computer (PC). In the effective nuclear detection, the hardware involves the detection setup and the electronics used, with the software consisting of analysis tools and graphical display on PC. A data acquisition interface is necessary to enable the communication between the controller hardware and PC. Nowadays, Universal Serial Bus (USB) has become a standard connection method for computer peripherals and has replaced many varieties of serial and parallel ports. However the implementation of USB is complex. This paper describes the implementation of datamore » acquisition interface between a field-programmable gate array (FPGA) board and a PC by exploiting the USB link of the FPGA board. The USB link is based on an FTDI chip which allows direct access of input and output to the Joint Test Action Group (JTAG) signals from a USB host and a complex programmable logic device (CPLD) with a 24 MHz clock input to the USB link. The implementation and results of using the USB link of FPGA board as the data interfacing are discussed.« less

Programmable logic construction kits for hyper-real-time neuronal modeling.

PubMed

Guerrero-Rivera, Ruben; Morrison, Abigail; Diesmann, Markus; Pearce, Tim C

2006-11-01

Programmable logic designs are presented that achieve exact integration of leaky integrate-and-fire soma and dynamical synapse neuronal models and incorporate spike-time dependent plasticity and axonal delays. Highly accurate numerical performance has been achieved by modifying simpler forward-Euler-based circuitry requiring minimal circuit allocation, which, as we show, behaves equivalently to exact integration. These designs have been implemented and simulated at the behavioral and physical device levels, demonstrating close agreement with both numerical and analytical results. By exploiting finely grained parallelism and single clock cycle numerical iteration, these designs achieve simulation speeds at least five orders of magnitude faster than the nervous system, termed here hyper-real-time operation, when deployed on commercially available field-programmable gate array (FPGA) devices. Taken together, our designs form a programmable logic construction kit of commonly used neuronal model elements that supports the building of large and complex architectures of spiking neuron networks for real-time neuromorphic implementation, neurophysiological interfacing, or efficient parameter space investigations.

Predicting origami-inspired programmable self-folding of hydrogel trilayers

NASA Astrophysics Data System (ADS)

An, Ning; Li, Meie; Zhou, Jinxiong

2016-11-01

Imitating origami principles in active or programmable materials opens the door for development of origami-inspired self-folding structures for not only aesthetic but also functional purposes. A variety of programmable materials enabled self-folding structures have been demonstrated across various fields and scales. These folding structures have finite thickness and the mechanical properties of the active materials dictate the folding process. Yet formalizing the use of origami rules for use in computer modeling has been challenging, owing to the zero-thickness theory and the exclusion of mechanical properties in current models. Here, we describe a physics-based finite element simulation scheme to predict programmable self-folding of temperature-sensitive hydrogel trilayers. Patterning crease and assigning mountain or valley folds are highlighted for complex origami such as folding of the Randlett’s flapping bird and the crane. Our efforts enhance the understanding and facilitate the design of origami-inspired self-folding structures, broadening the realization and application of reconfigurable structures.

Development and implementation of a peer-based mental health support programme for adolescents orphaned by HIV/AIDS in South Africa.

PubMed

Thupayagale-Tshweneagae, Gloria

2011-12-01

The article describes a framework and the process for the development of the peer-based mental health support programme and its implementation. The development of a peer-based mental health support programme is based on Erikson's theory on the adolescent phase of development, the psycho-educational processes; the peer approach and the orphaned adolescents lived experiences as conceptual framework. A triangulation of five qualitative methods of photography, reflective diaries, focus groups, event history calendar and field notes were used to capture the lived experiences of adolescents orphaned to HIV and AIDS. Analysis of data followed Colaizzi's method of data analysis. The combination of psycho-education, Erikson's stages of development and peer support assisted the participants to gain knowledge and skills to overcome adversity and to assist them to become to more resilient. The peer based mental health support programme if used would enhance the mental health of adolescent orphans.

[Evaluation of a workplace health promotion program].

PubMed

Forette, Françoise; Brieu, Marie-Anne; Lemasson, Hervé; Salord, Jean-Claude; Le Pen, Claude

2014-01-01

Some studies suggest that a workplace prevention programme could reduce health inequalities related to education level and improve the health status of the employees. The objective of the study was to demonstrate the advantages for a company to implement a health prevention programme in the workplace in order to: 1-improve health literacy 2 - change health-related behaviours 3-improve the company image. A "before - after" methodology was used in a population of 2153 employees of three companies. Three areas of prevention were considered: nutrition, physical activity and prevention of back pain. The successive steps of the EBS programme included general communication, group workshops and individual coaching. Data collection was carried out using anonymous questionnaires sent by e-mail. A global assessment was performed based on the companies' pooled data, with separate analysis according to the steps of the programme. The programme mobilized employees with participation rates ranging from 25% to 45.5%. After completion of the full programme, 77.5% of respondents reported an improvement of their health knowledge versus 50.3% of those who only received general communication. Behavioural modification was observed, especially in the fields of nutrition and back pain.. EBS can be considered to be a vector of the company image for almost 7 out of 10 employees. A health prevention education programme provided by the company in the workplace mobilizes employees and contributes to improvement of health knowledge and behaviour change. All approaches tested were important and applicable to various types of companies or workers.

A Systematic Review of Reporting Tools Applicable to Sexual and Reproductive Health Programmes: Step 1 in Developing Programme Reporting Standards

PubMed Central

Ali, Moazzam; Chandra-Mouli, Venkatraman; Tran, Nhan; Gülmezoglu, A. Metin

2015-01-01

Background Complete and accurate reporting of programme preparation, implementation and evaluation processes in the field of sexual and reproductive health (SRH) is essential to understand the impact of SRH programmes, as well as to guide their replication and scale-up. Objectives To provide an overview of existing reporting tools and identify core items used in programme reporting with a focus on programme preparation, implementation and evaluation processes. Methods A systematic review was completed for the period 2000–2014. Reporting guidelines, checklists and tools, irrespective of study design, applicable for reporting on programmes targeting SRH outcomes, were included. Two independent reviewers screened the title and abstract of all records. Full texts were assessed in duplicate, followed by data extraction on the focus, content area, year of publication, validation and description of reporting items. Data was synthesized using an iterative thematic approach, where items related to programme preparation, implementation and evaluation in each tool were extracted and aggregated into a consolidated list. Results Out of the 3,656 records screened for title and abstracts, full texts were retrieved for 182 articles, out of which 108 were excluded. Seventy-four full text articles corresponding to 45 reporting tools were retained for synthesis. The majority of tools were developed for reporting on intervention research (n = 15), randomized controlled trials (n = 8) and systematic reviews (n = 7). We identified a total of 50 reporting items, across three main domains and corresponding sub-domains: programme preparation (objective/focus, design, piloting); programme implementation (content, timing/duration/location, providers/staff, participants, delivery, implementation outcomes), and programme evaluation (process evaluation, implementation barriers/facilitators, outcome/impact evaluation). Conclusions Over the past decade a wide range of tools have been developed to improve the reporting of health research. Development of Programme Reporting Standards (PRS) for SRH can fill a significant gap in existing reporting tools. This systematic review is the first step in the development of such standards. In the next steps, we will draft a preliminary version of the PRS based on the aggregate list of identified items, and finalize the tool using a consensus process among experts and user-testing. PMID:26418859

A Systematic Review of Reporting Tools Applicable to Sexual and Reproductive Health Programmes: Step 1 in Developing Programme Reporting Standards.

PubMed

Kågesten, Anna; Tunçalp, Ӧzge; Ali, Moazzam; Chandra-Mouli, Venkatraman; Tran, Nhan; Gülmezoglu, A Metin

2015-01-01

Complete and accurate reporting of programme preparation, implementation and evaluation processes in the field of sexual and reproductive health (SRH) is essential to understand the impact of SRH programmes, as well as to guide their replication and scale-up. To provide an overview of existing reporting tools and identify core items used in programme reporting with a focus on programme preparation, implementation and evaluation processes. A systematic review was completed for the period 2000-2014. Reporting guidelines, checklists and tools, irrespective of study design, applicable for reporting on programmes targeting SRH outcomes, were included. Two independent reviewers screened the title and abstract of all records. Full texts were assessed in duplicate, followed by data extraction on the focus, content area, year of publication, validation and description of reporting items. Data was synthesized using an iterative thematic approach, where items related to programme preparation, implementation and evaluation in each tool were extracted and aggregated into a consolidated list. Out of the 3,656 records screened for title and abstracts, full texts were retrieved for 182 articles, out of which 108 were excluded. Seventy-four full text articles corresponding to 45 reporting tools were retained for synthesis. The majority of tools were developed for reporting on intervention research (n = 15), randomized controlled trials (n = 8) and systematic reviews (n = 7). We identified a total of 50 reporting items, across three main domains and corresponding sub-domains: programme preparation (objective/focus, design, piloting); programme implementation (content, timing/duration/location, providers/staff, participants, delivery, implementation outcomes), and programme evaluation (process evaluation, implementation barriers/facilitators, outcome/impact evaluation). Over the past decade a wide range of tools have been developed to improve the reporting of health research. Development of Programme Reporting Standards (PRS) for SRH can fill a significant gap in existing reporting tools. This systematic review is the first step in the development of such standards. In the next steps, we will draft a preliminary version of the PRS based on the aggregate list of identified items, and finalize the tool using a consensus process among experts and user-testing.

Implant dentistry in postgraduate university education. Present conditions, potential, limitations and future trends.

PubMed

Mattheos, N; Wismeijer, D; Shapira, L

2014-03-01

In recent years, opportunities for postgraduate university education in implant dentistry have increased significantly, with an increase in both the number but also the complexity of available postgraduate programmes. However, there appears to be a lack of standards directing the learning outcomes of such programmes. A scientific literature search was conducted for publications reporting on university programmes within implant dentistry, including description of programmes and evaluation of learning outcomes. A separate Internet search was conducted to collect information on existing university programmes as presented on university websites. Implant dentistry has reached a critical mass of an independent, multidisciplinary and vibrant domain of science, which combines knowledge and discovery from many clinical and basic sciences. Many university programmes conclude with a master's or equivalent degree, but there appears to be a great diversity with regard to duration and learning objectives, as well as targeted skills and competences. The importance of implant dentistry has also increased within established specialist training programmes. There was little indication, however, that the comprehensive aspects of implant dentistry are present in all specialist training programmes where implants are being covered. Although universities should maintain the options of designing academic programmes as they best see fit, it is imperative for them to introduce some form of transparent and comparable criteria, which will allow the profession and the public to relate the degree and academic credentials to the actual skills and competences of the degree holder. With regard to established specialist training programmes, the interdisciplinary and comprehensive nature of implant dentistry needs to be emphasised, covering both surgical and restorative aspects. Finally, implant dentistry is not, at present, a dental specialty. The profession has not reached a consensus as to whether the introduction of a new recognised specialist field is either necessary or desired. © 2014 John Wiley & Sons A/S. Published by John Wiley & Sons Ltd.

Process evaluation of the implementation of scorecard-based antenatal risk assessment, care pathways and interdisciplinary consultation: the Healthy Pregnancy 4 All study.

PubMed

Vos, A A; van Voorst, S F; Posthumus, A G; Waelput, A J M; Denktaş, S; Steegers, E A P

2017-09-01

To evaluate the implementation of a complex intervention in the antenatal healthcare field in 14 Dutch municipalities. The intervention consisted of the implementation of a systematic scorecard-based risk assessment in pregnancy, subsequent patient-tailored care pathways, and consultations of professionals from different medical and social disciplines. Saunders's seven-step method was used for the development of a programme implementation monitoring plan, with specific attention to the setting and context of the programme. Data were triangulated from multiple sources, and prespecified criteria were applied to examine the evidence for implementation. Six out of 11 municipalities (54%) met the implementation criteria for the entire risk assessment programme, whereas three municipalities (27%) met the criteria if the three components of implementation were analysed separately. A process evaluation of implementation of a complex intervention is possible. The results can be used to improve understanding of the associations between specific programme elements and programme outcomes on effectiveness of the intervention. Additionally, the results are important for formative purposes to assess how future implementation of antenatal risk assessment can be improved in comparable contexts. Copyright © 2017. Published by Elsevier Ltd.

PROGRAPE-1: A Programmable, Multi-Purpose Computer for Many-Body Simulations

NASA Astrophysics Data System (ADS)

Hamada, Tsuyoshi; Fukushige, Toshiyuki; Kawai, Atsushi; Makino, Junichiro

2000-10-01

We have developed PROGRAPE-1 (PROgrammable GRAPE-1), a programmable multi-purpose computer for many-body simulations. The main difference between PROGRAPE-1 and ``traditional'' GRAPE systems is that the former uses FPGA (Field Programmable Gate Array) chips as the processing elements, while the latter relies on a hardwired pipeline processor specialized to gravitational interactions. Since the logic implemented in FPGA chips can be reconfigured, we can use PROGRAPE-1 to calculate not only gravitational interactions, but also other forms of interactions, such as the van der Waals force, hydro\\-dynamical interactions in the SPHr calculation, and so on. PROGRAPE-1 comprises two Altera EPF10K100 FPGA chips, each of which contains nominally 100000 gates. To evaluate the programmability and performance of PROGRAPE-1, we implemented a pipeline for gravitational interactions similar to that of GRAPE-3. One pipeline is fitted into a single FPGA chip, operated at 16 MHz clock. Thus, for gravitational interactions, PROGRAPE-1 provided a speed of 0.96 Gflops-equivalent. PROGRAPE will prove to be useful for a wide-range of particle-based simulations in which the calculation cost of interactions other than gravity is high, such as the evaluation of SPH interactions.

Effectiveness of alcohol media literacy programmes: a systematic literature review.

PubMed

Gordon, Chloe S; Hindmarsh, Chloe S; Jones, Sandra C; Kervin, Lisa

2015-06-01

Alcohol media literacy is an emerging field that aims to address the link between exposure to alcohol advertising and subsequent expectancies and behaviours for children and adolescents. The design, rigour and results of alcohol media literacy programmes vary considerably, resulting in a number of unanswered questions about effectiveness. To provide insight into some of these questions, a systematic literature review of alcohol media literacy studies was conducted. The review was guided by the following research question: What considerations are needed to develop an effective school-based alcohol media literacy programme? On the basis of a critical synthesis of 10 interventions (published in the period 1997 to May 2014), our findings provide a comprehensive understanding of the descriptive, methodological and outcome characteristics of this small body of significant research. The review provides considerations for future alcohol media literacy programmes, including the need for an interactive pedagogical approach within the naturalistic school setting, implementation fidelity and a holistic approach to programme evaluation, a means for maintaining relevance, consideration of gender differences, relevance for an international audience and use of follow-up and longitudinal data. © The Author 2015. Published by Oxford University Press. All rights reserved. For permissions, please email: journals.permissions@oup.com.

National tuberculosis programme review: experience over the period 1990-95.

PubMed Central

Pio, A.; Luelmo, F.; Kumaresan, J.; Spinaci, S.

1997-01-01

Since 1990 the WHO Global Tuberculosis Programme (GTB) has promoted the revision of national tuberculosis programmes to strengthen the focus on directly observed treatment, short-course (DOTS) and close monitoring of treatment outcomes. GTB has encouraged in-depth evaluation of activities through a comprehensive programme review. Over the period 1990-95, WHO supported 12 such programme reviews. The criteria for selection were as follows: large population (Bangladesh, Brazil, China, Ethiopia, India, Indonesia, Mexico, and Thailand); good prospects of developing a model programme for a region (Nepal, Zimbabwe); or at advanced stage of implementation of a model programme for a region (Guinea, Peru). The estimated combined incidence of smear-positive pulmonary tuberculosis was 82 per 100,000 population, about 43% of the global incidence. The prevalence of infection with human immunodeficiency virus (HIV) was variable, being very high in Ethiopia and Zimbabwe, but negligible in Bangladesh, China, Nepal and Peru. The programme reviews were conducted by teams of 15-35 experts representing a wide range of national and external institutions. After a 2-3-month preparatory period, the conduct of the review usually lasted 2-3 weeks, including a first phase of meetings with authorities and review of documents, a second phase for field visits, and a third phase of discussion of findings and recommendations. The main lessons learned from the programme reviews were as follows: programme review is a useful tool to secure government commitment, reorient the tuberculosis control policies and replan the activities on solid grounds; the involvement of public health and academic institutions, cooperating agencies, and nongovernmental organizations secured a broad support to the new policies; programme success is linked to a centralized direction which supports a decentralized implementation through the primary health care services; monitoring and evaluation of case management functions well if it is based on the right classification of cases and quarterly reports on cohorts of patients; a comprehensive programme review should include teaching about tuberculosis in medical, nursing, and laboratory workers' schools; good quality diagnosis and treatment are the essential requirements for expanding a programme beyond the pilot testing; and control targets cannot be achieved if private and social security patients are left outside the programme scope. The methodology of comprehensive programme review should be recommended to all countries which require programme reorientation; it is also appropriate for carrying out evaluations at 4-5-year intervals in countries that are implementing the correct tuberculosis control policies. PMID:9509630

National tuberculosis programme review: experience over the period 1990-95.

PubMed

Pio, A; Luelmo, F; Kumaresan, J; Spinaci, S

1997-01-01

Since 1990 the WHO Global Tuberculosis Programme (GTB) has promoted the revision of national tuberculosis programmes to strengthen the focus on directly observed treatment, short-course (DOTS) and close monitoring of treatment outcomes. GTB has encouraged in-depth evaluation of activities through a comprehensive programme review. Over the period 1990-95, WHO supported 12 such programme reviews. The criteria for selection were as follows: large population (Bangladesh, Brazil, China, Ethiopia, India, Indonesia, Mexico, and Thailand); good prospects of developing a model programme for a region (Nepal, Zimbabwe); or at advanced stage of implementation of a model programme for a region (Guinea, Peru). The estimated combined incidence of smear-positive pulmonary tuberculosis was 82 per 100,000 population, about 43% of the global incidence. The prevalence of infection with human immunodeficiency virus (HIV) was variable, being very high in Ethiopia and Zimbabwe, but negligible in Bangladesh, China, Nepal and Peru. The programme reviews were conducted by teams of 15-35 experts representing a wide range of national and external institutions. After a 2-3-month preparatory period, the conduct of the review usually lasted 2-3 weeks, including a first phase of meetings with authorities and review of documents, a second phase for field visits, and a third phase of discussion of findings and recommendations. The main lessons learned from the programme reviews were as follows: programme review is a useful tool to secure government commitment, reorient the tuberculosis control policies and replan the activities on solid grounds; the involvement of public health and academic institutions, cooperating agencies, and nongovernmental organizations secured a broad support to the new policies; programme success is linked to a centralized direction which supports a decentralized implementation through the primary health care services; monitoring and evaluation of case management functions well if it is based on the right classification of cases and quarterly reports on cohorts of patients; a comprehensive programme review should include teaching about tuberculosis in medical, nursing, and laboratory workers' schools; good quality diagnosis and treatment are the essential requirements for expanding a programme beyond the pilot testing; and control targets cannot be achieved if private and social security patients are left outside the programme scope. The methodology of comprehensive programme review should be recommended to all countries which require programme reorientation; it is also appropriate for carrying out evaluations at 4-5-year intervals in countries that are implementing the correct tuberculosis control policies.

Programmable diagnostic devices made from paper and tape.

PubMed

Martinez, Andres W; Phillips, Scott T; Nie, Zhihong; Cheng, Chao-Min; Carrilho, Emanuel; Wiley, Benjamin J; Whitesides, George M

2010-10-07

This paper describes three-dimensional microfluidic paper-based analytical devices (3-D microPADs) that can be programmed (postfabrication) by the user to generate multiple patterns of flow through them. These devices are programmed by pressing single-use 'on' buttons, using a stylus or a ballpoint pen. Pressing a button closes a small space (gap) between two vertically aligned microfluidic channels, and allows fluids to wick from one channel to the other. These devices are simple to fabricate, and are made entirely out of paper and double-sided adhesive tape. Programmable devices expand the capabilities of microPADs and provide a simple method for controlling the movement of fluids in paper-based channels. They are the conceptual equivalent of field-programmable gate arrays (FPGAs) widely used in electronics.

Implementation in an FPGA circuit of Edge detection algorithm based on the Discrete Wavelet Transforms

NASA Astrophysics Data System (ADS)

Bouganssa, Issam; Sbihi, Mohamed; Zaim, Mounia

2017-07-01

The 2D Discrete Wavelet Transform (DWT) is a computationally intensive task that is usually implemented on specific architectures in many imaging systems in real time. In this paper, a high throughput edge or contour detection algorithm is proposed based on the discrete wavelet transform. A technique for applying the filters on the three directions (Horizontal, Vertical and Diagonal) of the image is used to present the maximum of the existing contours. The proposed architectures were designed in VHDL and mapped to a Xilinx Sparten6 FPGA. The results of the synthesis show that the proposed architecture has a low area cost and can operate up to 100 MHz, which can perform 2D wavelet analysis for a sequence of images while maintaining the flexibility of the system to support an adaptive algorithm.

A minimal SATA III Host Controller based on FPGA

NASA Astrophysics Data System (ADS)

Liu, Hailiang

2018-03-01

SATA (Serial Advanced Technology Attachment) is an advanced serial bus which has a outstanding performance in transmitting high speed real-time data applied in Personal Computers, Financial Industry, astronautics and aeronautics, etc. In this express, a minimal SATA III Host Controller based on Xilinx Kintex 7 serial FPGA is designed and implemented. Compared to the state-of-art, registers utilization are reduced 25.3% and LUTs utilization are reduced 65.9%. According to the experimental results, the controller works precisely and steady with the reading bandwidth of up to 536 MB per second and the writing bandwidth of up to 512 MB per second, both of which are close to the maximum bandwidth of the SSD(Solid State Disk) device. The host controller is very suitable for high speed data transmission and mass data storage.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications.

PubMed

Revathy, M; Saravanan, R

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures.

A radiation tolerant Data link board for the ATLAS Tile Cal upgrade

NASA Astrophysics Data System (ADS)

Åkerstedt, H.; Bohm, C.; Muschter, S.; Silverstein, S.; Valdes, E.

2016-01-01

This paper describes the latest, full-functionality revision of the high-speed data link board developed for the Phase-2 upgrade of ATLAS hadronic Tile Calorimeter. The link board design is highly redundant, with digital functionality implemented in two Xilinx Kintex-7 FPGAs, and two Molex QSFP+ electro-optic modules with uplinks run at 10 Gbps. The FPGAs are remotely configured through two radiation-hard CERN GBTx deserialisers (GBTx), which also provide the LHC-synchronous system clock. The redundant design eliminates virtually all single-point error modes, and a combination of triple-mode redundancy (TMR), internal and external scrubbing will provide adequate protection against radiation-induced errors. The small portion of the FPGA design that cannot be protected by TMR will be the dominant source of radiation-induced errors, even if that area is small.

Evolution of Analog Circuits on Field Programmable Transistor Arrays

NASA Technical Reports Server (NTRS)

Stoica, A.; Keymeulen, D.; Zebulum, R.; Thakoor, A.; Daud, T.; Klimeck, G.; Jin, Y.; Tawel, R.; Duong, V.

2000-01-01

Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing also a set of selected applications.

A SEU-Hard Flip-Flop for Antifuse FPGAs

NASA Technical Reports Server (NTRS)

Katz, R.; Wang, J. J.; McCollum, J.; Cronquist, B.; Chan, R.; Yu, D.; Kleyner, I.; Day, John H. (Technical Monitor)

2001-01-01

A single event upset (SEU)-hardened flip-flop has been designed and developed for antifuse Field Programmable Gate Array (FPGA) application. Design and application issues, testability, test methods, simulation, and results are discussed.